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with 3d9bea75ab6b0ed1ab47ae98e4e4e3ff34cf2f19 Fixing some ARM regressions | |
############################################# just like head(wrong offset calc) | |
| 0x08020a62 dff8680e ldr.w r0, [pc, 0xe68] ; [0x80218d0:4]=0x2001affc | |
| 0x08020a6a 4ff48072 mov.w r2, 0x100 ; 256 | |
| 0x08020a6e 4ff40051 mov.w r1, 0x2000 | |
| 0x08020a72 dff85c0e ldr.w r0, [pc, 0xe5c] ; [0x80218d4:4]=0x2240b580 | |
| 0x08020a76 0ff0a1fb bl spiflash_Read_Security_Registers_48h ;[1] | |
| 0x08020a7a dff8500e ldr.w r0, [pc, 0xe50] ; [0x80218d0:4]=0x2001affc | |
| 0x08020a7e 007c ldrb r0, [r0, 0x10] | |
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with 26f71f342b9c11b14de30873e81d904d927a93bd Update capstone from -next | |
############################################# correct offset calc ... UPDATE not from all addres | |
| 0x08020a62 dff8680e ldr.w r0, [pc, 0xe68] ; [0x80218cc:4]=0x2001aefc | |
| 0x08020a6a 4ff48072 mov.w r2, 0x100 ; 256 | |
| 0x08020a6e 4ff40051 mov.w r1, 0x2000 | |
| 0x08020a72 dff85c0e ldr.w r0, [pc, 0xe5c] ; [0x80218d0:4]=0x2001affc | |
| 0x08020a76 0ff0a1fb bl spiflash_Read_Security_Registers_48h ;[1] | |
| 0x08020a7a dff8500e ldr.w r0, [pc, 0xe50] ; [0x80218cc:4]=0x2001aefc | |
| 0x08020a7e 007c ldrb r0, [r0, 0x10] | |
| 0x08020a80 dff8481e ldr.w r1, [pc, 0xe48] ; [0x80218cc:4]=0x2001aefc | |
| 0x08020a84 897c ldrb r1, [r1, 0x12] | |
with 889ff52f3711ad4233d36acf8bf62742a6ee1b72 Bring back the previous disasm changes | |
############################################# correct offset calc not an all addresses | |
| 0x08020a62 dff8680e ldr.w r0, [pc, 0xe68] ; [0x80218cc:4]=0x2001aefc | |
| 0x08020a6a 4ff48072 mov.w r2, 0x100 ; 256 | |
| 0x08020a6e 4ff40051 mov.w r1, 0x2000 | |
| 0x08020a72 dff85c0e ldr.w r0, [pc, 0xe5c] ; [0x80218d0:4]=0x2001affc | |
| 0x08020a76 0ff0a1fb bl spiflash_Read_Security_Registers_48h ;[1] | |
| 0x08020a7a dff8500e ldr.w r0, [pc, 0xe50] ; [0x80218cc:4]=0x2001aefc | |
| | |
with b829244c19b577a00c68ef866a0fb319de3f4fd4 Fixes for thumb/arm string references and endian refptr | |
############################################# wrong offset calc | |
| 0x08020a62 dff8680e ldr.w r0, [pc, 0xe68] ; [0x80218cc:4]=0xfcaf0120 | |
| 0x08020a66 0ff0a9fb bl spiflash_Read_Security_Registers_48h ;[1] | |
| 0x08020a6e 4ff40051 mov.w r1, 0x2000 | |
| 0x08020a72 dff85c0e ldr.w r0, [pc, 0xe5c] ; [0x80218d0:4]=0x80b54022 | |
| 0x08020a76 0ff0a1fb bl spiflash_Read_Security_Registers_48h ;[1] | |
| 0x08020a7a dff8500e ldr.w r0, [pc, 0xe50] ; [0x80218cc:4]=0xfcaf0120 | |
| | |
with 8f6c4716e0b1272eebff9cb74c289b1033a6da9b | |
############################################# correct | |
| 0x08020a62 dff8680e ldr.w r0, [pc, 0xe68] ; [0x80218cc:4]=0x2001aefc | |
| 0x08020a66 0ff0a9fb bl spiflash_Read_Security_Registers_48h ;[1] | |
| 0x08020a6e 4ff40051 mov.w r1, 0x2000 | |
| 0x08020a72 dff85c0e ldr.w r0, [pc, 0xe5c] ; [0x80218d0:4]=0x2001affc | |
| 0x08020a76 0ff0a1fb bl spiflash_Read_Security_Registers_48h ;[1] | |
| 0x08020a7a dff8500e ldr.w r0, [pc, 0xe50] ; [0x80218cc:4]=0x2001aefc | |
| 0x08020a7e 007c ldrb r0, [r0, 0x10] | |
| 0x08020a80 dff8481e ldr.w r1, [pc, 0xe48] ; [0x80218cc:4]=0x2001aefc | |
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