Created
September 7, 2019 13:19
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| /dts-v1/; | |
| / { | |
| interrupt-parent = <0x01>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| model = "Xunlong Orange Pi Zero"; | |
| compatible = "xunlong,orangepi-zero\0allwinner,sun8i-h2-plus"; | |
| chosen { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| ranges; | |
| stdout-path = "serial0:115200n8"; | |
| framebuffer-hdmi { | |
| compatible = "allwinner,simple-framebuffer\0simple-framebuffer"; | |
| allwinner,pipeline = "mixer0-lcd0-hdmi"; | |
| clocks = <0x02 0x06 0x03 0x66 0x03 0x6f>; | |
| status = "disabled"; | |
| }; | |
| framebuffer-tve { | |
| compatible = "allwinner,simple-framebuffer\0simple-framebuffer"; | |
| allwinner,pipeline = "mixer1-lcd1-tve"; | |
| clocks = <0x02 0x07 0x03 0x67>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| clocks { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| ranges; | |
| osc24M_clk { | |
| #clock-cells = <0x00>; | |
| compatible = "fixed-clock"; | |
| clock-frequency = <0x16e3600>; | |
| clock-output-names = "osc24M"; | |
| phandle = <0x0f>; | |
| }; | |
| osc32k_clk { | |
| #clock-cells = <0x00>; | |
| compatible = "fixed-clock"; | |
| clock-frequency = <0x8000>; | |
| clock-output-names = "osc32k"; | |
| phandle = <0x10>; | |
| }; | |
| internal-osc-clk { | |
| #clock-cells = <0x00>; | |
| compatible = "fixed-clock"; | |
| clock-frequency = <0xf42400>; | |
| clock-accuracy = <0x11e1a300>; | |
| clock-output-names = "iosc"; | |
| phandle = <0x25>; | |
| }; | |
| }; | |
| display-engine { | |
| compatible = "allwinner,sun8i-h3-display-engine"; | |
| allwinner,pipelines = <0x04>; | |
| status = "disabled"; | |
| }; | |
| soc { | |
| compatible = "simple-bus"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| ranges; | |
| clock@1000000 { | |
| reg = <0x1000000 0x100000>; | |
| clocks = <0x03 0x65 0x03 0x30>; | |
| clock-names = "mod\0bus"; | |
| resets = <0x03 0x22>; | |
| #clock-cells = <0x01>; | |
| #reset-cells = <0x01>; | |
| compatible = "allwinner,sun8i-h3-de2-clk"; | |
| phandle = <0x02>; | |
| }; | |
| mixer@1100000 { | |
| compatible = "allwinner,sun8i-h3-de2-mixer-0"; | |
| reg = <0x1100000 0x100000>; | |
| clocks = <0x02 0x00 0x02 0x06>; | |
| clock-names = "bus\0mod"; | |
| resets = <0x02 0x00>; | |
| phandle = <0x04>; | |
| ports { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| port@1 { | |
| reg = <0x01>; | |
| endpoint { | |
| remote-endpoint = <0x05>; | |
| phandle = <0x06>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| syscon@1c00000 { | |
| compatible = "allwinner,sun8i-h3-system-controller\0syscon"; | |
| reg = <0x1c00000 0x1000>; | |
| phandle = <0x11>; | |
| }; | |
| dma-controller@1c02000 { | |
| compatible = "allwinner,sun8i-h3-dma"; | |
| reg = <0x1c02000 0x1000>; | |
| interrupts = <0x00 0x32 0x04>; | |
| clocks = <0x03 0x15>; | |
| resets = <0x03 0x06>; | |
| #dma-cells = <0x01>; | |
| phandle = <0x14>; | |
| }; | |
| lcd-controller@1c0c000 { | |
| compatible = "allwinner,sun8i-h3-tcon-tv\0allwinner,sun8i-a83t-tcon-tv"; | |
| reg = <0x1c0c000 0x1000>; | |
| interrupts = <0x00 0x56 0x04>; | |
| clocks = <0x03 0x2a 0x03 0x66>; | |
| clock-names = "ahb\0tcon-ch1"; | |
| resets = <0x03 0x1b>; | |
| reset-names = "lcd"; | |
| ports { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| port@0 { | |
| reg = <0x00>; | |
| endpoint { | |
| remote-endpoint = <0x06>; | |
| phandle = <0x05>; | |
| }; | |
| }; | |
| port@1 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x01>; | |
| endpoint@1 { | |
| reg = <0x01>; | |
| remote-endpoint = <0x07>; | |
| phandle = <0x24>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| mmc@1c0f000 { | |
| reg = <0x1c0f000 0x1000>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x08>; | |
| resets = <0x03 0x07>; | |
| reset-names = "ahb"; | |
| interrupts = <0x00 0x3c 0x04>; | |
| status = "okay"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "allwinner,sun7i-a20-mmc"; | |
| clocks = <0x03 0x16 0x03 0x47 0x03 0x49 0x03 0x48>; | |
| clock-names = "ahb\0mmc\0output\0sample"; | |
| vmmc-supply = <0x09>; | |
| bus-width = <0x04>; | |
| cd-gpios = <0x0a 0x05 0x06 0x01>; | |
| }; | |
| mmc@1c10000 { | |
| reg = <0x1c10000 0x1000>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x0b>; | |
| resets = <0x03 0x08>; | |
| reset-names = "ahb"; | |
| interrupts = <0x00 0x3d 0x04>; | |
| status = "okay"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "allwinner,sun7i-a20-mmc"; | |
| clocks = <0x03 0x17 0x03 0x4a 0x03 0x4c 0x03 0x4b>; | |
| clock-names = "ahb\0mmc\0output\0sample"; | |
| vmmc-supply = <0x0c>; | |
| mmc-pwrseq = <0x0d>; | |
| bus-width = <0x04>; | |
| non-removable; | |
| sdio_wifi@1 { | |
| reg = <0x01>; | |
| }; | |
| }; | |
| mmc@1c11000 { | |
| reg = <0x1c11000 0x1000>; | |
| resets = <0x03 0x09>; | |
| reset-names = "ahb"; | |
| interrupts = <0x00 0x3e 0x04>; | |
| status = "disabled"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "allwinner,sun7i-a20-mmc"; | |
| clocks = <0x03 0x18 0x03 0x4d 0x03 0x4f 0x03 0x4e>; | |
| clock-names = "ahb\0mmc\0output\0sample"; | |
| }; | |
| usb@1c19000 { | |
| compatible = "allwinner,sun8i-h3-musb"; | |
| reg = <0x1c19000 0x400>; | |
| clocks = <0x03 0x20>; | |
| resets = <0x03 0x11>; | |
| interrupts = <0x00 0x47 0x04>; | |
| interrupt-names = "mc"; | |
| phys = <0x0e 0x00>; | |
| phy-names = "usb"; | |
| extcon = <0x0e 0x00>; | |
| status = "okay"; | |
| dr_mode = "peripheral"; | |
| }; | |
| phy@1c19400 { | |
| compatible = "allwinner,sun8i-h3-usb-phy"; | |
| reg = <0x1c19400 0x2c 0x1c1a800 0x04 0x1c1b800 0x04 0x1c1c800 0x04 0x1c1d800 0x04>; | |
| reg-names = "phy_ctrl\0pmu0\0pmu1\0pmu2\0pmu3"; | |
| clocks = <0x03 0x58 0x03 0x59 0x03 0x5a 0x03 0x5b>; | |
| clock-names = "usb0_phy\0usb1_phy\0usb2_phy\0usb3_phy"; | |
| resets = <0x03 0x00 0x03 0x01 0x03 0x02 0x03 0x03>; | |
| reset-names = "usb0_reset\0usb1_reset\0usb2_reset\0usb3_reset"; | |
| status = "okay"; | |
| #phy-cells = <0x01>; | |
| usb0_id_det-gpios = <0x0a 0x06 0x0c 0x00>; | |
| phandle = <0x0e>; | |
| }; | |
| usb@1c1a000 { | |
| compatible = "allwinner,sun8i-h3-ehci\0generic-ehci"; | |
| reg = <0x1c1a000 0x100>; | |
| interrupts = <0x00 0x48 0x04>; | |
| clocks = <0x03 0x21 0x03 0x25>; | |
| resets = <0x03 0x12 0x03 0x16>; | |
| status = "okay"; | |
| }; | |
| usb@1c1a400 { | |
| compatible = "allwinner,sun8i-h3-ohci\0generic-ohci"; | |
| reg = <0x1c1a400 0x100>; | |
| interrupts = <0x00 0x49 0x04>; | |
| clocks = <0x03 0x21 0x03 0x25 0x03 0x5c>; | |
| resets = <0x03 0x12 0x03 0x16>; | |
| status = "okay"; | |
| }; | |
| usb@1c1b000 { | |
| compatible = "allwinner,sun8i-h3-ehci\0generic-ehci"; | |
| reg = <0x1c1b000 0x100>; | |
| interrupts = <0x00 0x4a 0x04>; | |
| clocks = <0x03 0x22 0x03 0x26>; | |
| resets = <0x03 0x13 0x03 0x17>; | |
| phys = <0x0e 0x01>; | |
| phy-names = "usb"; | |
| status = "okay"; | |
| }; | |
| usb@1c1b400 { | |
| compatible = "allwinner,sun8i-h3-ohci\0generic-ohci"; | |
| reg = <0x1c1b400 0x100>; | |
| interrupts = <0x00 0x4b 0x04>; | |
| clocks = <0x03 0x22 0x03 0x26 0x03 0x5d>; | |
| resets = <0x03 0x13 0x03 0x17>; | |
| phys = <0x0e 0x01>; | |
| phy-names = "usb"; | |
| status = "okay"; | |
| }; | |
| usb@1c1c000 { | |
| compatible = "allwinner,sun8i-h3-ehci\0generic-ehci"; | |
| reg = <0x1c1c000 0x100>; | |
| interrupts = <0x00 0x4c 0x04>; | |
| clocks = <0x03 0x23 0x03 0x27>; | |
| resets = <0x03 0x14 0x03 0x18>; | |
| phys = <0x0e 0x02>; | |
| phy-names = "usb"; | |
| status = "okay"; | |
| }; | |
| usb@1c1c400 { | |
| compatible = "allwinner,sun8i-h3-ohci\0generic-ohci"; | |
| reg = <0x1c1c400 0x100>; | |
| interrupts = <0x00 0x4d 0x04>; | |
| clocks = <0x03 0x23 0x03 0x27 0x03 0x5e>; | |
| resets = <0x03 0x14 0x03 0x18>; | |
| phys = <0x0e 0x02>; | |
| phy-names = "usb"; | |
| status = "okay"; | |
| }; | |
| usb@1c1d000 { | |
| compatible = "allwinner,sun8i-h3-ehci\0generic-ehci"; | |
| reg = <0x1c1d000 0x100>; | |
| interrupts = <0x00 0x4e 0x04>; | |
| clocks = <0x03 0x24 0x03 0x28>; | |
| resets = <0x03 0x15 0x03 0x19>; | |
| phys = <0x0e 0x03>; | |
| phy-names = "usb"; | |
| status = "disabled"; | |
| }; | |
| usb@1c1d400 { | |
| compatible = "allwinner,sun8i-h3-ohci\0generic-ohci"; | |
| reg = <0x1c1d400 0x100>; | |
| interrupts = <0x00 0x4f 0x04>; | |
| clocks = <0x03 0x24 0x03 0x28 0x03 0x5f>; | |
| resets = <0x03 0x15 0x03 0x19>; | |
| phys = <0x0e 0x03>; | |
| phy-names = "usb"; | |
| status = "disabled"; | |
| }; | |
| clock@1c20000 { | |
| reg = <0x1c20000 0x400>; | |
| clocks = <0x0f 0x10>; | |
| clock-names = "hosc\0losc"; | |
| #clock-cells = <0x01>; | |
| #reset-cells = <0x01>; | |
| compatible = "allwinner,sun8i-h3-ccu"; | |
| phandle = <0x03>; | |
| }; | |
| pinctrl@1c20800 { | |
| reg = <0x1c20800 0x400>; | |
| interrupts = <0x00 0x0b 0x04 0x00 0x11 0x04>; | |
| clocks = <0x03 0x36 0x0f 0x10>; | |
| clock-names = "apb\0hosc\0losc"; | |
| gpio-controller; | |
| #gpio-cells = <0x03>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x03>; | |
| compatible = "allwinner,sun8i-h3-pinctrl"; | |
| phandle = <0x0a>; | |
| emac0 { | |
| pins = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD7\0PD8\0PD9\0PD10\0PD12\0PD13\0PD15\0PD16\0PD17"; | |
| function = "emac"; | |
| drive-strength = <0x28>; | |
| }; | |
| i2c0 { | |
| pins = "PA11\0PA12"; | |
| function = "i2c0"; | |
| phandle = <0x20>; | |
| }; | |
| i2c1 { | |
| pins = "PA18\0PA19"; | |
| function = "i2c1"; | |
| phandle = <0x21>; | |
| }; | |
| i2c2 { | |
| pins = "PE12\0PE13"; | |
| function = "i2c2"; | |
| phandle = <0x22>; | |
| }; | |
| mmc0 { | |
| pins = "PF0\0PF1\0PF2\0PF3\0PF4\0PF5"; | |
| function = "mmc0"; | |
| drive-strength = <0x1e>; | |
| bias-pull-up; | |
| phandle = <0x08>; | |
| }; | |
| mmc1 { | |
| pins = "PG0\0PG1\0PG2\0PG3\0PG4\0PG5"; | |
| function = "mmc1"; | |
| drive-strength = <0x1e>; | |
| bias-pull-up; | |
| phandle = <0x0b>; | |
| }; | |
| mmc2_8bit { | |
| pins = "PC5\0PC6\0PC8\0PC9\0PC10\0PC11\0PC12\0PC13\0PC14\0PC15\0PC16"; | |
| function = "mmc2"; | |
| drive-strength = <0x1e>; | |
| bias-pull-up; | |
| }; | |
| spdif { | |
| pins = "PA17"; | |
| function = "spdif"; | |
| }; | |
| spi0 { | |
| pins = "PC0\0PC1\0PC2\0PC3"; | |
| function = "spi0"; | |
| phandle = <0x15>; | |
| }; | |
| spi1 { | |
| pins = "PA15\0PA16\0PA14\0PA13"; | |
| function = "spi1"; | |
| phandle = <0x16>; | |
| }; | |
| uart0 { | |
| pins = "PA4\0PA5"; | |
| function = "uart0"; | |
| phandle = <0x1d>; | |
| }; | |
| uart1 { | |
| pins = "PG6\0PG7"; | |
| function = "uart1"; | |
| phandle = <0x1e>; | |
| }; | |
| uart1_rts_cts { | |
| pins = "PG8\0PG9"; | |
| function = "uart1"; | |
| }; | |
| uart2 { | |
| pins = "PA0\0PA1"; | |
| function = "uart2"; | |
| phandle = <0x1f>; | |
| }; | |
| uart3 { | |
| pins = "PA13\0PA14"; | |
| function = "uart3"; | |
| }; | |
| uart3_rts_cts { | |
| pins = "PA15\0PA16"; | |
| function = "uart3"; | |
| }; | |
| spi0_cs1 { | |
| pins = "PA18"; | |
| function = "gpio_out"; | |
| output-high; | |
| phandle = <0x17>; | |
| }; | |
| }; | |
| timer@1c20c00 { | |
| compatible = "allwinner,sun4i-a10-timer"; | |
| reg = <0x1c20c00 0xa0>; | |
| interrupts = <0x00 0x12 0x04 0x00 0x13 0x04>; | |
| clocks = <0x0f>; | |
| }; | |
| ethernet@1c30000 { | |
| compatible = "allwinner,sun8i-h3-emac"; | |
| syscon = <0x11>; | |
| reg = <0x1c30000 0x10000>; | |
| interrupts = <0x00 0x52 0x04>; | |
| interrupt-names = "macirq"; | |
| resets = <0x03 0x0c>; | |
| reset-names = "stmmaceth"; | |
| clocks = <0x03 0x1b>; | |
| clock-names = "stmmaceth"; | |
| status = "okay"; | |
| phy-handle = <0x12>; | |
| phy-mode = "mii"; | |
| allwinner,leds-active-low; | |
| mdio { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "snps,dwmac-mdio"; | |
| phandle = <0x13>; | |
| }; | |
| mdio-mux { | |
| compatible = "allwinner,sun8i-h3-mdio-mux"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| mdio-parent-bus = <0x13>; | |
| mdio@1 { | |
| compatible = "allwinner,sun8i-h3-mdio-internal"; | |
| reg = <0x01>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| ethernet-phy@1 { | |
| compatible = "ethernet-phy-ieee802.3-c22"; | |
| reg = <0x01>; | |
| clocks = <0x03 0x43>; | |
| resets = <0x03 0x27>; | |
| phandle = <0x12>; | |
| }; | |
| }; | |
| mdio@2 { | |
| reg = <0x02>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| }; | |
| }; | |
| }; | |
| spi@1c68000 { | |
| compatible = "allwinner,sun8i-h3-spi"; | |
| reg = <0x1c68000 0x1000>; | |
| interrupts = <0x00 0x41 0x04>; | |
| clocks = <0x03 0x1e 0x03 0x52>; | |
| clock-names = "ahb\0mod"; | |
| dmas = <0x14 0x17 0x14 0x17>; | |
| dma-names = "rx\0tx"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x15>; | |
| resets = <0x03 0x0f>; | |
| status = "disabled"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| flash@0 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| compatible = "mxicy,mx25l1606e\0winbond,w25q128"; | |
| reg = <0x00>; | |
| spi-max-frequency = <0x2625a00>; | |
| }; | |
| }; | |
| spi@1c69000 { | |
| compatible = "allwinner,sun8i-h3-spi"; | |
| reg = <0x1c69000 0x1000>; | |
| interrupts = <0x00 0x42 0x04>; | |
| clocks = <0x03 0x1f 0x03 0x53>; | |
| clock-names = "ahb\0mod"; | |
| dmas = <0x14 0x18 0x14 0x18>; | |
| dma-names = "rx\0tx"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x16>; | |
| resets = <0x03 0x10>; | |
| status = "okay"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| pinctrl-1 = <0x17>; | |
| cs-gpios = <0x00 0x0a 0x00 0x12 0x00>; | |
| mcp2515_2@0 { | |
| compatible = "microchip,mcp2515"; | |
| reg = <0x01>; | |
| clocks = <0x18>; | |
| interrupt-parent = <0x0a>; | |
| interrupts = <0x00 0x13 0x02>; | |
| spi-max-frequency = <0x989680>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x19>; | |
| status = "okay"; | |
| oscillator { | |
| #clock-cells = <0x00>; | |
| compatible = "fixed-clock"; | |
| clock-frequency = <0x7a1200>; | |
| phandle = <0x18>; | |
| }; | |
| can1_pin_irq@0 { | |
| allwinner,pins = "PA19"; | |
| allwinner,function = "irq"; | |
| allwinner,drive = <0x00>; | |
| allwinner,pull = <0x01>; | |
| phandle = <0x19>; | |
| }; | |
| }; | |
| mcp2515_1@0 { | |
| compatible = "microchip,mcp2515"; | |
| reg = <0x00>; | |
| clocks = <0x1a>; | |
| interrupt-parent = <0x0a>; | |
| interrupts = <0x00 0x02 0x02>; | |
| spi-max-frequency = <0x989680>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x1b>; | |
| status = "okay"; | |
| oscillator { | |
| #clock-cells = <0x00>; | |
| compatible = "fixed-clock"; | |
| clock-frequency = <0x7a1200>; | |
| phandle = <0x1a>; | |
| }; | |
| can0_pin_irq@0 { | |
| allwinner,pins = "PA2"; | |
| allwinner,function = "irq"; | |
| allwinner,drive = <0x00>; | |
| allwinner,pull = <0x01>; | |
| phandle = <0x1b>; | |
| }; | |
| }; | |
| }; | |
| watchdog@1c20ca0 { | |
| compatible = "allwinner,sun6i-a31-wdt"; | |
| reg = <0x1c20ca0 0x20>; | |
| interrupts = <0x00 0x19 0x04>; | |
| }; | |
| spdif@1c21000 { | |
| #sound-dai-cells = <0x00>; | |
| compatible = "allwinner,sun8i-h3-spdif"; | |
| reg = <0x1c21000 0x400>; | |
| interrupts = <0x00 0x0c 0x04>; | |
| clocks = <0x03 0x35 0x03 0x57>; | |
| resets = <0x03 0x29>; | |
| clock-names = "apb\0spdif"; | |
| dmas = <0x14 0x02>; | |
| dma-names = "tx"; | |
| status = "disabled"; | |
| }; | |
| pwm@1c21400 { | |
| compatible = "allwinner,sun8i-h3-pwm"; | |
| reg = <0x1c21400 0x08>; | |
| clocks = <0x0f>; | |
| #pwm-cells = <0x03>; | |
| status = "disabled"; | |
| }; | |
| i2s@1c22000 { | |
| #sound-dai-cells = <0x00>; | |
| compatible = "allwinner,sun8i-h3-i2s"; | |
| reg = <0x1c22000 0x400>; | |
| interrupts = <0x00 0x0d 0x04>; | |
| clocks = <0x03 0x38 0x03 0x54>; | |
| clock-names = "apb\0mod"; | |
| dmas = <0x14 0x03 0x14 0x03>; | |
| resets = <0x03 0x2b>; | |
| dma-names = "rx\0tx"; | |
| status = "disabled"; | |
| }; | |
| i2s@1c22400 { | |
| #sound-dai-cells = <0x00>; | |
| compatible = "allwinner,sun8i-h3-i2s"; | |
| reg = <0x1c22400 0x400>; | |
| interrupts = <0x00 0x0e 0x04>; | |
| clocks = <0x03 0x39 0x03 0x55>; | |
| clock-names = "apb\0mod"; | |
| dmas = <0x14 0x04 0x14 0x04>; | |
| resets = <0x03 0x2c>; | |
| dma-names = "rx\0tx"; | |
| status = "disabled"; | |
| }; | |
| codec@1c22c00 { | |
| #sound-dai-cells = <0x00>; | |
| compatible = "allwinner,sun8i-h3-codec"; | |
| reg = <0x1c22c00 0x400>; | |
| interrupts = <0x00 0x1d 0x04>; | |
| clocks = <0x03 0x34 0x03 0x6d>; | |
| clock-names = "apb\0codec"; | |
| resets = <0x03 0x28>; | |
| dmas = <0x14 0x0f 0x14 0x0f>; | |
| dma-names = "rx\0tx"; | |
| allwinner,codec-analog-controls = <0x1c>; | |
| status = "disabled"; | |
| }; | |
| serial@1c28000 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = <0x1c28000 0x400>; | |
| interrupts = <0x00 0x00 0x04>; | |
| reg-shift = <0x02>; | |
| reg-io-width = <0x04>; | |
| clocks = <0x03 0x3e>; | |
| resets = <0x03 0x31>; | |
| dmas = <0x14 0x06 0x14 0x06>; | |
| dma-names = "rx\0tx"; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x1d>; | |
| }; | |
| serial@1c28400 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = <0x1c28400 0x400>; | |
| interrupts = <0x00 0x01 0x04>; | |
| reg-shift = <0x02>; | |
| reg-io-width = <0x04>; | |
| clocks = <0x03 0x3f>; | |
| resets = <0x03 0x32>; | |
| dmas = <0x14 0x07 0x14 0x07>; | |
| dma-names = "rx\0tx"; | |
| status = "disabled"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x1e>; | |
| }; | |
| serial@1c28800 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = <0x1c28800 0x400>; | |
| interrupts = <0x00 0x02 0x04>; | |
| reg-shift = <0x02>; | |
| reg-io-width = <0x04>; | |
| clocks = <0x03 0x40>; | |
| resets = <0x03 0x33>; | |
| dmas = <0x14 0x08 0x14 0x08>; | |
| dma-names = "rx\0tx"; | |
| status = "disabled"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x1f>; | |
| }; | |
| serial@1c28c00 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = <0x1c28c00 0x400>; | |
| interrupts = <0x00 0x03 0x04>; | |
| reg-shift = <0x02>; | |
| reg-io-width = <0x04>; | |
| clocks = <0x03 0x41>; | |
| resets = <0x03 0x34>; | |
| dmas = <0x14 0x09 0x14 0x09>; | |
| dma-names = "rx\0tx"; | |
| status = "disabled"; | |
| }; | |
| i2c@1c2ac00 { | |
| compatible = "allwinner,sun6i-a31-i2c"; | |
| reg = <0x1c2ac00 0x400>; | |
| interrupts = <0x00 0x06 0x04>; | |
| clocks = <0x03 0x3b>; | |
| resets = <0x03 0x2e>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x20>; | |
| status = "okay"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| }; | |
| i2c@1c2b000 { | |
| compatible = "allwinner,sun6i-a31-i2c"; | |
| reg = <0x1c2b000 0x400>; | |
| interrupts = <0x00 0x07 0x04>; | |
| clocks = <0x03 0x3c>; | |
| resets = <0x03 0x2f>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x21>; | |
| status = "disabled"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| }; | |
| i2c@1c2b400 { | |
| compatible = "allwinner,sun6i-a31-i2c"; | |
| reg = <0x1c2b400 0x400>; | |
| interrupts = <0x00 0x08 0x04>; | |
| clocks = <0x03 0x3d>; | |
| resets = <0x03 0x30>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x22>; | |
| status = "disabled"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| }; | |
| interrupt-controller@1c81000 { | |
| compatible = "arm,gic-400"; | |
| reg = <0x1c81000 0x1000 0x1c82000 0x2000 0x1c84000 0x2000 0x1c86000 0x2000>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x03>; | |
| interrupts = <0x01 0x09 0xf04>; | |
| phandle = <0x01>; | |
| }; | |
| hdmi@1ee0000 { | |
| compatible = "allwinner,sun8i-h3-dw-hdmi\0allwinner,sun8i-a83t-dw-hdmi"; | |
| reg = <0x1ee0000 0x10000>; | |
| reg-io-width = <0x01>; | |
| interrupts = <0x00 0x58 0x04>; | |
| clocks = <0x03 0x2f 0x03 0x70 0x03 0x6f>; | |
| clock-names = "iahb\0isfr\0tmds"; | |
| resets = <0x03 0x21>; | |
| reset-names = "ctrl"; | |
| phys = <0x23>; | |
| phy-names = "hdmi-phy"; | |
| status = "disabled"; | |
| ports { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| port@0 { | |
| reg = <0x00>; | |
| endpoint { | |
| remote-endpoint = <0x24>; | |
| phandle = <0x07>; | |
| }; | |
| }; | |
| port@1 { | |
| reg = <0x01>; | |
| }; | |
| }; | |
| }; | |
| hdmi-phy@1ef0000 { | |
| compatible = "allwinner,sun8i-h3-hdmi-phy"; | |
| reg = <0x1ef0000 0x10000>; | |
| clocks = <0x03 0x2f 0x03 0x70 0x03 0x06>; | |
| clock-names = "bus\0mod\0pll-0"; | |
| resets = <0x03 0x20>; | |
| reset-names = "phy"; | |
| #phy-cells = <0x00>; | |
| phandle = <0x23>; | |
| }; | |
| rtc@1f00000 { | |
| compatible = "allwinner,sun6i-a31-rtc"; | |
| reg = <0x1f00000 0x54>; | |
| interrupts = <0x00 0x28 0x04 0x00 0x29 0x04>; | |
| }; | |
| clock@1f01400 { | |
| compatible = "allwinner,sun8i-h3-r-ccu"; | |
| reg = <0x1f01400 0x100>; | |
| clocks = <0x0f 0x10 0x25 0x03 0x09>; | |
| clock-names = "hosc\0losc\0iosc\0pll-periph"; | |
| #clock-cells = <0x01>; | |
| #reset-cells = <0x01>; | |
| phandle = <0x26>; | |
| }; | |
| codec-analog@1f015c0 { | |
| compatible = "allwinner,sun8i-h3-codec-analog"; | |
| reg = <0x1f015c0 0x04>; | |
| phandle = <0x1c>; | |
| }; | |
| ir@1f02000 { | |
| compatible = "allwinner,sun5i-a13-ir"; | |
| clocks = <0x26 0x04 0x26 0x0b>; | |
| clock-names = "apb\0ir"; | |
| resets = <0x26 0x00>; | |
| interrupts = <0x00 0x25 0x04>; | |
| reg = <0x1f02000 0x40>; | |
| status = "disabled"; | |
| }; | |
| i2c@1f02400 { | |
| compatible = "allwinner,sun6i-a31-i2c"; | |
| reg = <0x1f02400 0x400>; | |
| interrupts = <0x00 0x2c 0x04>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x27>; | |
| clocks = <0x26 0x09>; | |
| resets = <0x26 0x05>; | |
| status = "disabled"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| }; | |
| pinctrl@1f02c00 { | |
| compatible = "allwinner,sun8i-h3-r-pinctrl"; | |
| reg = <0x1f02c00 0x400>; | |
| interrupts = <0x00 0x2d 0x04>; | |
| clocks = <0x26 0x03 0x0f 0x10>; | |
| clock-names = "apb\0hosc\0losc"; | |
| gpio-controller; | |
| #gpio-cells = <0x03>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x03>; | |
| phandle = <0x2a>; | |
| ir { | |
| pins = "PL11"; | |
| function = "s_cir_rx"; | |
| }; | |
| r-i2c { | |
| pins = "PL0\0PL1"; | |
| function = "s_i2c"; | |
| phandle = <0x27>; | |
| }; | |
| }; | |
| system-control@1c00000 { | |
| compatible = "allwinner,sun8i-h3-system-control"; | |
| reg = <0x1c00000 0x30>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| ranges; | |
| sram@1d00000 { | |
| compatible = "mmio-sram"; | |
| reg = <0x1d00000 0x80000>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| ranges = <0x00 0x1d00000 0x80000>; | |
| sram-section@0 { | |
| compatible = "allwinner,sun8i-h3-sram-c1\0allwinner,sun4i-a10-sram-c1"; | |
| reg = <0x00 0x80000>; | |
| }; | |
| }; | |
| }; | |
| gpu@1c40000 { | |
| compatible = "allwinner,sun8i-h3-mali\0arm,mali-400"; | |
| reg = <0x1c40000 0x10000>; | |
| interrupts = <0x00 0x61 0x04 0x00 0x62 0x04 0x00 0x63 0x04 0x00 0x64 0x04 0x00 0x66 0x04 0x00 0x67 0x04 0x00 0x65 0x04>; | |
| interrupt-names = "gp\0gpmmu\0pp0\0ppmmu0\0pp1\0ppmmu1\0pmu"; | |
| clocks = <0x03 0x31 0x03 0x72>; | |
| clock-names = "bus\0core"; | |
| resets = <0x03 0x23>; | |
| assigned-clocks = <0x03 0x72>; | |
| assigned-clock-rates = <0x16e36000>; | |
| }; | |
| }; | |
| opp_table0 { | |
| compatible = "operating-points-v2"; | |
| opp-shared; | |
| phandle = <0x28>; | |
| opp@648000000 { | |
| opp-hz = <0x00 0x269fb200>; | |
| opp-microvolt = <0xfde80 0xfde80 0x13d620>; | |
| clock-latency-ns = <0x3b9b0>; | |
| }; | |
| opp@816000000 { | |
| opp-hz = <0x00 0x30a32c00>; | |
| opp-microvolt = <0x10c8e0 0x10c8e0 0x13d620>; | |
| clock-latency-ns = <0x3b9b0>; | |
| }; | |
| opp@1008000000 { | |
| opp-hz = <0x00 0x3c14dc00>; | |
| opp-microvolt = <0x124f80 0x124f80 0x13d620>; | |
| clock-latency-ns = <0x3b9b0>; | |
| }; | |
| }; | |
| cpus { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| cpu@0 { | |
| compatible = "arm,cortex-a7"; | |
| device_type = "cpu"; | |
| reg = <0x00>; | |
| clocks = <0x03 0x0e>; | |
| clock-names = "cpu"; | |
| operating-points-v2 = <0x28>; | |
| #cooling-cells = <0x02>; | |
| cpu-supply = <0x29>; | |
| }; | |
| cpu@1 { | |
| compatible = "arm,cortex-a7"; | |
| device_type = "cpu"; | |
| reg = <0x01>; | |
| clocks = <0x03 0x0e>; | |
| clock-names = "cpu"; | |
| operating-points-v2 = <0x28>; | |
| #cooling-cells = <0x02>; | |
| }; | |
| cpu@2 { | |
| compatible = "arm,cortex-a7"; | |
| device_type = "cpu"; | |
| reg = <0x02>; | |
| clocks = <0x03 0x0e>; | |
| clock-names = "cpu"; | |
| operating-points-v2 = <0x28>; | |
| #cooling-cells = <0x02>; | |
| }; | |
| cpu@3 { | |
| compatible = "arm,cortex-a7"; | |
| device_type = "cpu"; | |
| reg = <0x03>; | |
| clocks = <0x03 0x0e>; | |
| clock-names = "cpu"; | |
| operating-points-v2 = <0x28>; | |
| #cooling-cells = <0x02>; | |
| }; | |
| }; | |
| timer { | |
| compatible = "arm,armv7-timer"; | |
| interrupts = <0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08>; | |
| }; | |
| ahci-5v { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "ahci-5v"; | |
| regulator-min-microvolt = <0x4c4b40>; | |
| regulator-max-microvolt = <0x4c4b40>; | |
| regulator-boot-on; | |
| enable-active-high; | |
| gpio = <0x0a 0x01 0x08 0x00>; | |
| status = "disabled"; | |
| }; | |
| usb0-vbus { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "usb0-vbus"; | |
| regulator-min-microvolt = <0x4c4b40>; | |
| regulator-max-microvolt = <0x4c4b40>; | |
| enable-active-high; | |
| gpio = <0x0a 0x01 0x09 0x00>; | |
| status = "disabled"; | |
| }; | |
| usb1-vbus { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "usb1-vbus"; | |
| regulator-min-microvolt = <0x4c4b40>; | |
| regulator-max-microvolt = <0x4c4b40>; | |
| regulator-boot-on; | |
| enable-active-high; | |
| gpio = <0x0a 0x07 0x06 0x00>; | |
| status = "disabled"; | |
| }; | |
| usb2-vbus { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "usb2-vbus"; | |
| regulator-min-microvolt = <0x4c4b40>; | |
| regulator-max-microvolt = <0x4c4b40>; | |
| regulator-boot-on; | |
| enable-active-high; | |
| gpio = <0x0a 0x07 0x03 0x00>; | |
| status = "disabled"; | |
| }; | |
| vcc3v0 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "vcc3v0"; | |
| regulator-min-microvolt = <0x2dc6c0>; | |
| regulator-max-microvolt = <0x2dc6c0>; | |
| }; | |
| vcc3v3 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "vcc3v3"; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| phandle = <0x09>; | |
| }; | |
| vcc5v0 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "vcc5v0"; | |
| regulator-min-microvolt = <0x4c4b40>; | |
| regulator-max-microvolt = <0x4c4b40>; | |
| }; | |
| aliases { | |
| serial0 = "/soc/serial@1c28000"; | |
| ethernet0 = "/soc/ethernet@1c30000"; | |
| ethernet1 = "/soc/mmc@1c10000/sdio_wifi@1"; | |
| i2c0 = "/soc/i2c@01c2ac00"; | |
| i2c1 = "/soc/i2c@01c2b000"; | |
| }; | |
| leds { | |
| compatible = "gpio-leds"; | |
| pwr_led { | |
| label = "orangepi:green:pwr"; | |
| gpios = <0x2a 0x00 0x0a 0x00>; | |
| default-state = "on"; | |
| }; | |
| status_led { | |
| label = "orangepi:red:status"; | |
| gpios = <0x0a 0x00 0x11 0x00>; | |
| }; | |
| }; | |
| reg_vcc_wifi { | |
| compatible = "regulator-fixed"; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| regulator-name = "vcc-wifi"; | |
| enable-active-high; | |
| gpio = <0x0a 0x00 0x14 0x00>; | |
| phandle = <0x0c>; | |
| }; | |
| vdd-cpux-regulator { | |
| compatible = "regulator-gpio"; | |
| regulator-name = "vdd-cpux"; | |
| regulator-type = "voltage"; | |
| regulator-boot-on; | |
| regulator-always-on; | |
| regulator-min-microvolt = <0x10c8e0>; | |
| regulator-max-microvolt = <0x13d620>; | |
| regulator-ramp-delay = <0x32>; | |
| gpios = <0x2a 0x00 0x06 0x00>; | |
| enable-active-high; | |
| gpios-states = <0x01>; | |
| states = <0x10c8e0 0x00 0x13d620 0x01>; | |
| phandle = <0x29>; | |
| }; | |
| wifi_pwrseq { | |
| compatible = "mmc-pwrseq-simple"; | |
| reset-gpios = <0x2a 0x00 0x07 0x01>; | |
| post-power-on-delay-ms = <0xc8>; | |
| phandle = <0x0d>; | |
| }; | |
| }; |
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