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| /dts-v1/; | |
| / { | |
| #address-cells = < 0x1 >; | |
| #size-cells = < 0x1 >; | |
| model = "STMicroelectronics STM32WB55RG-NUCLEO board"; | |
| compatible = "st,stm32wb55rg-nucleo"; | |
| chosen { | |
| zephyr,entropy = &rng; | |
| zephyr,flash-controller = &flash; | |
| zephyr,console = &usart1; | |
| zephyr,shell-uart = &usart1; | |
| zephyr,bt-mon-uart = &lpuart1; | |
| zephyr,bt-c2h-uart = &lpuart1; | |
| zephyr,sram = &sram0; | |
| zephyr,flash = &flash0; | |
| zephyr,code-partition = &slot0_partition; | |
| }; | |
| aliases { | |
| led0 = &green_led_2; | |
| sw0 = &user_button_1; | |
| sw1 = &user_button_2; | |
| sw2 = &user_button_3; | |
| watchdog0 = &iwdg; | |
| die-temp0 = &die_temp; | |
| volt-sensor0 = &vref; | |
| volt-sensor1 = &vbat; | |
| }; | |
| soc { | |
| #address-cells = < 0x1 >; | |
| #size-cells = < 0x1 >; | |
| compatible = "st,stm32wb55", "st,stm32wb", "simple-bus"; | |
| interrupt-parent = < &nvic >; | |
| ranges; | |
| nvic: interrupt-controller@e000e100 { | |
| #address-cells = < 0x1 >; | |
| compatible = "arm,v7m-nvic"; | |
| reg = < 0xe000e100 0xc00 >; | |
| interrupt-controller; | |
| #interrupt-cells = < 0x2 >; | |
| arm,num-irq-priority-bits = < 0x4 >; | |
| phandle = < 0x1 >; | |
| }; | |
| systick: timer@e000e010 { | |
| compatible = "arm,armv7m-systick"; | |
| reg = < 0xe000e010 0x10 >; | |
| }; | |
| flash: flash-controller@58004000 { | |
| compatible = "st,stm32-flash-controller", "st,stm32wb-flash-controller"; | |
| reg = < 0x58004000 0x400 >; | |
| interrupts = < 0x4 0x0 >; | |
| clocks = < &rcc 0x50 0x2000000 >; | |
| #address-cells = < 0x1 >; | |
| #size-cells = < 0x1 >; | |
| flash0: flash@8000000 { | |
| compatible = "st,stm32-nv-flash", "soc-nv-flash"; | |
| write-block-size = < 0x8 >; | |
| erase-block-size = < 0x1000 >; | |
| max-erase-time = < 0x19 >; | |
| reg = < 0x8000000 0xca000 >; | |
| partitions { | |
| compatible = "fixed-partitions"; | |
| #address-cells = < 0x1 >; | |
| #size-cells = < 0x1 >; | |
| boot_partition: partition@0 { | |
| label = "mcuboot"; | |
| reg = < 0x0 0xc000 >; | |
| }; | |
| slot0_partition: partition@c000 { | |
| label = "image-0"; | |
| reg = < 0xc000 0x64000 >; | |
| }; | |
| slot1_partition: partition@70000 { | |
| label = "image-1"; | |
| reg = < 0x70000 0x64000 >; | |
| }; | |
| scratch_partition: partition@d4000 { | |
| label = "image-scratch"; | |
| reg = < 0xd4000 0x4000 >; | |
| }; | |
| storage_partition: partition@d8000 { | |
| label = "storage"; | |
| reg = < 0xd8000 0x2000 >; | |
| }; | |
| }; | |
| }; | |
| }; | |
| rcc: rcc@58000000 { | |
| compatible = "st,stm32wb-rcc"; | |
| #clock-cells = < 0x2 >; | |
| reg = < 0x58000000 0x400 >; | |
| clocks = < &clk_hse >; | |
| clock-frequency = < 0x1e84800 >; | |
| cpu1-prescaler = < 0x1 >; | |
| cpu2-prescaler = < 0x1 >; | |
| ahb4-prescaler = < 0x1 >; | |
| apb1-prescaler = < 0x1 >; | |
| apb2-prescaler = < 0x1 >; | |
| phandle = < 0x2 >; | |
| rctl: reset-controller { | |
| compatible = "st,stm32-rcc-rctl"; | |
| #reset-cells = < 0x1 >; | |
| phandle = < 0x4 >; | |
| }; | |
| }; | |
| exti: interrupt-controller@58000800 { | |
| compatible = "st,stm32-exti"; | |
| interrupt-controller; | |
| #interrupt-cells = < 0x1 >; | |
| #address-cells = < 0x1 >; | |
| reg = < 0x58000800 0x400 >; | |
| num-lines = < 0x10 >; | |
| interrupts = < 0x6 0x0 >, < 0x7 0x0 >, < 0x8 0x0 >, < 0x9 0x0 >, < 0xa 0x0 >, < 0x17 0x0 >, < 0x28 0x0 >; | |
| interrupt-names = "line0", "line1", "line2", "line3", "line4", "line5-9", "line10-15"; | |
| line-ranges = < 0x0 0x1 >, < 0x1 0x1 >, < 0x2 0x1 >, < 0x3 0x1 >, < 0x4 0x1 >, < 0x5 0x5 >, < 0xa 0x6 >; | |
| }; | |
| pinctrl: pin-controller@48000000 { | |
| compatible = "st,stm32-pinctrl"; | |
| #address-cells = < 0x1 >; | |
| #size-cells = < 0x1 >; | |
| reg = < 0x48000000 0x2000 >; | |
| gpioa: gpio@48000000 { | |
| compatible = "st,stm32-gpio"; | |
| gpio-controller; | |
| #gpio-cells = < 0x2 >; | |
| reg = < 0x48000000 0x400 >; | |
| clocks = < &rcc 0x4c 0x1 >; | |
| phandle = < 0x20 >; | |
| }; | |
| gpiob: gpio@48000400 { | |
| compatible = "st,stm32-gpio"; | |
| gpio-controller; | |
| #gpio-cells = < 0x2 >; | |
| reg = < 0x48000400 0x400 >; | |
| clocks = < &rcc 0x4c 0x2 >; | |
| phandle = < 0x21 >; | |
| }; | |
| gpioc: gpio@48000800 { | |
| compatible = "st,stm32-gpio"; | |
| gpio-controller; | |
| #gpio-cells = < 0x2 >; | |
| reg = < 0x48000800 0x400 >; | |
| clocks = < &rcc 0x4c 0x4 >; | |
| phandle = < 0x1f >; | |
| }; | |
| gpiod: gpio@48000c00 { | |
| compatible = "st,stm32-gpio"; | |
| gpio-controller; | |
| #gpio-cells = < 0x2 >; | |
| reg = < 0x48000c00 0x400 >; | |
| clocks = < &rcc 0x4c 0x8 >; | |
| phandle = < 0x22 >; | |
| }; | |
| gpioe: gpio@48001000 { | |
| compatible = "st,stm32-gpio"; | |
| gpio-controller; | |
| #gpio-cells = < 0x2 >; | |
| reg = < 0x48001000 0x400 >; | |
| clocks = < &rcc 0x4c 0x10 >; | |
| }; | |
| gpioh: gpio@48001c00 { | |
| compatible = "st,stm32-gpio"; | |
| gpio-controller; | |
| #gpio-cells = < 0x2 >; | |
| reg = < 0x48001c00 0x400 >; | |
| clocks = < &rcc 0x4c 0x80 >; | |
| }; | |
| adc1_in3_pc2: adc1_in3_pc2 { | |
| pinmux = < 0x450 >; | |
| phandle = < 0x15 >; | |
| }; | |
| i2c1_scl_pb8: i2c1_scl_pb8 { | |
| pinmux = < 0x304 >; | |
| bias-pull-up; | |
| drive-open-drain; | |
| phandle = < 0x7 >; | |
| }; | |
| i2c3_scl_pc0: i2c3_scl_pc0 { | |
| pinmux = < 0x404 >; | |
| bias-pull-up; | |
| drive-open-drain; | |
| phandle = < 0x9 >; | |
| }; | |
| i2c1_sda_pb9: i2c1_sda_pb9 { | |
| pinmux = < 0x324 >; | |
| bias-pull-up; | |
| drive-open-drain; | |
| phandle = < 0x8 >; | |
| }; | |
| i2c3_sda_pc1: i2c3_sda_pc1 { | |
| pinmux = < 0x424 >; | |
| bias-pull-up; | |
| drive-open-drain; | |
| phandle = < 0xa >; | |
| }; | |
| spi1_miso_pa6: spi1_miso_pa6 { | |
| pinmux = < 0xc5 >; | |
| bias-pull-down; | |
| phandle = < 0xd >; | |
| }; | |
| spi1_mosi_pa7: spi1_mosi_pa7 { | |
| pinmux = < 0xe5 >; | |
| bias-pull-down; | |
| phandle = < 0xe >; | |
| }; | |
| spi1_nss_pa4: spi1_nss_pa4 { | |
| pinmux = < 0x85 >; | |
| bias-pull-up; | |
| phandle = < 0xb >; | |
| }; | |
| spi1_sck_pa5: spi1_sck_pa5 { | |
| pinmux = < 0xa5 >; | |
| bias-pull-down; | |
| slew-rate = "very-high-speed"; | |
| phandle = < 0xc >; | |
| }; | |
| tim1_ch1_pa8: tim1_ch1_pa8 { | |
| pinmux = < 0x101 >; | |
| phandle = < 0x13 >; | |
| }; | |
| tim2_ch1_pa15: tim2_ch1_pa15 { | |
| pinmux = < 0x1e1 >; | |
| phandle = < 0x14 >; | |
| }; | |
| lpuart1_cts_pa6: lpuart1_cts_pa6 { | |
| pinmux = < 0xc8 >; | |
| bias-pull-up; | |
| drive-open-drain; | |
| phandle = < 0x11 >; | |
| }; | |
| lpuart1_rts_pb12: lpuart1_rts_pb12 { | |
| pinmux = < 0x388 >; | |
| bias-pull-up; | |
| drive-open-drain; | |
| phandle = < 0x12 >; | |
| }; | |
| usart1_rx_pb7: usart1_rx_pb7 { | |
| pinmux = < 0x2e7 >; | |
| phandle = < 0x6 >; | |
| }; | |
| lpuart1_rx_pc0: lpuart1_rx_pc0 { | |
| pinmux = < 0x408 >; | |
| phandle = < 0x10 >; | |
| }; | |
| usart1_tx_pb6: usart1_tx_pb6 { | |
| pinmux = < 0x2c7 >; | |
| bias-pull-up; | |
| phandle = < 0x5 >; | |
| }; | |
| lpuart1_tx_pc1: lpuart1_tx_pc1 { | |
| pinmux = < 0x428 >; | |
| bias-pull-up; | |
| phandle = < 0xf >; | |
| }; | |
| usb_dm_pa11: usb_dm_pa11 { | |
| pinmux = < 0x16a >; | |
| phandle = < 0x17 >; | |
| }; | |
| usb_dp_pa12: usb_dp_pa12 { | |
| pinmux = < 0x18a >; | |
| phandle = < 0x18 >; | |
| }; | |
| }; | |
| wwdg: watchdog@40002c00 { | |
| compatible = "st,stm32-window-watchdog"; | |
| reg = < 0x40002c00 0x400 >; | |
| clocks = < &rcc 0x58 0x800 >; | |
| interrupts = < 0x0 0x7 >; | |
| status = "disabled"; | |
| }; | |
| usart1: serial@40013800 { | |
| compatible = "st,stm32-usart", "st,stm32-uart"; | |
| reg = < 0x40013800 0x400 >; | |
| clocks = < &rcc 0x60 0x4000 >; | |
| resets = < &rctl 0x80e >; | |
| interrupts = < 0x24 0x0 >; | |
| status = "okay"; | |
| pinctrl-0 = < &usart1_tx_pb6 &usart1_rx_pb7 >; | |
| pinctrl-names = "default"; | |
| current-speed = < 0x1c200 >; | |
| }; | |
| i2c1: arduino_i2c: i2c@40005400 { | |
| compatible = "st,stm32-i2c-v2"; | |
| clock-frequency = < 0x61a80 >; | |
| #address-cells = < 0x1 >; | |
| #size-cells = < 0x0 >; | |
| reg = < 0x40005400 0x400 >; | |
| clocks = < &rcc 0x58 0x200000 >; | |
| interrupts = < 0x1e 0x0 >, < 0x1f 0x0 >; | |
| interrupt-names = "event", "error"; | |
| status = "okay"; | |
| pinctrl-0 = < &i2c1_scl_pb8 &i2c1_sda_pb9 >; | |
| pinctrl-names = "default"; | |
| phandle = < 0x1d >; | |
| }; | |
| i2c3: i2c@40005c00 { | |
| compatible = "st,stm32-i2c-v2"; | |
| clock-frequency = < 0x61a80 >; | |
| #address-cells = < 0x1 >; | |
| #size-cells = < 0x0 >; | |
| reg = < 0x40005c00 0x400 >; | |
| clocks = < &rcc 0x58 0x800000 >; | |
| interrupts = < 0x20 0x0 >, < 0x21 0x0 >; | |
| interrupt-names = "event", "error"; | |
| status = "okay"; | |
| pinctrl-0 = < &i2c3_scl_pc0 &i2c3_sda_pc1 >; | |
| pinctrl-names = "default"; | |
| phandle = < 0x1e >; | |
| }; | |
| rtc: rtc@40002800 { | |
| compatible = "st,stm32-rtc"; | |
| reg = < 0x40002800 0x400 >; | |
| interrupts = < 0x29 0x0 >; | |
| clocks = < &rcc 0x58 0x400 >, < &rcc 0x3 0x26890 >; | |
| prescaler = < 0x8000 >; | |
| status = "okay"; | |
| bbram: backup_regs { | |
| compatible = "st,stm32-bbram"; | |
| st,backup-regs = < 0x14 >; | |
| status = "okay"; | |
| }; | |
| }; | |
| spi1: arduino_spi: spi@40013000 { | |
| compatible = "st,stm32-spi-fifo", "st,stm32-spi"; | |
| #address-cells = < 0x1 >; | |
| #size-cells = < 0x0 >; | |
| reg = < 0x40013000 0x400 >; | |
| interrupts = < 0x22 0x5 >; | |
| clocks = < &rcc 0x60 0x1000 >; | |
| status = "okay"; | |
| pinctrl-0 = < &spi1_nss_pa4 &spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7 >; | |
| pinctrl-names = "default"; | |
| }; | |
| spi2: spi@40003800 { | |
| compatible = "st,stm32-spi-fifo", "st,stm32-spi"; | |
| #address-cells = < 0x1 >; | |
| #size-cells = < 0x0 >; | |
| reg = < 0x40003800 0x400 >; | |
| interrupts = < 0x23 0x5 >; | |
| clocks = < &rcc 0x58 0x4000 >; | |
| status = "disabled"; | |
| }; | |
| lpuart1: arduino_serial: serial@40008000 { | |
| compatible = "st,stm32-lpuart", "st,stm32-uart"; | |
| reg = < 0x40008000 0x400 >; | |
| clocks = < &rcc 0x5c 0x1 >; | |
| resets = < &rctl 0x780 >; | |
| interrupts = < 0x25 0x0 >; | |
| status = "okay"; | |
| pinctrl-0 = < &lpuart1_tx_pc1 &lpuart1_rx_pc0 &lpuart1_cts_pa6 &lpuart1_rts_pb12 >; | |
| hw-flow-control; | |
| pinctrl-names = "default"; | |
| current-speed = < 0x1c200 >; | |
| }; | |
| timers1: timers@40012c00 { | |
| compatible = "st,stm32-timers"; | |
| reg = < 0x40012c00 0x400 >; | |
| clocks = < &rcc 0x60 0x800 >; | |
| resets = < &rctl 0x80b >; | |
| interrupts = < 0x18 0x0 >, < 0x19 0x0 >, < 0x1a 0x0 >, < 0x1b 0x0 >; | |
| interrupt-names = "brk", "up", "trgcom", "cc"; | |
| st,prescaler = < 0x2710 >; | |
| status = "okay"; | |
| pwm1: pwm { | |
| compatible = "st,stm32-pwm"; | |
| status = "okay"; | |
| #pwm-cells = < 0x3 >; | |
| pinctrl-0 = < &tim1_ch1_pa8 >; | |
| pinctrl-names = "default"; | |
| }; | |
| }; | |
| timers2: timers@40000000 { | |
| compatible = "st,stm32-timers"; | |
| reg = < 0x40000000 0x400 >; | |
| clocks = < &rcc 0x58 0x1 >; | |
| resets = < &rctl 0x700 >; | |
| interrupts = < 0x1c 0x0 >; | |
| interrupt-names = "global"; | |
| st,prescaler = < 0x0 >; | |
| status = "okay"; | |
| pwm2: pwm { | |
| compatible = "st,stm32-pwm"; | |
| status = "okay"; | |
| #pwm-cells = < 0x3 >; | |
| pinctrl-0 = < &tim2_ch1_pa15 >; | |
| pinctrl-names = "default"; | |
| }; | |
| counter { | |
| compatible = "st,stm32-counter"; | |
| status = "disabled"; | |
| }; | |
| }; | |
| timers16: timers@40014400 { | |
| compatible = "st,stm32-timers"; | |
| reg = < 0x40014400 0x400 >; | |
| clocks = < &rcc 0x60 0x20000 >; | |
| resets = < &rctl 0x811 >; | |
| interrupts = < 0x19 0x0 >; | |
| interrupt-names = "global"; | |
| st,prescaler = < 0x0 >; | |
| status = "disabled"; | |
| pwm { | |
| compatible = "st,stm32-pwm"; | |
| status = "disabled"; | |
| #pwm-cells = < 0x3 >; | |
| }; | |
| counter { | |
| compatible = "st,stm32-counter"; | |
| status = "disabled"; | |
| }; | |
| }; | |
| timers17: timers@40014800 { | |
| compatible = "st,stm32-timers"; | |
| reg = < 0x40014800 0x400 >; | |
| clocks = < &rcc 0x60 0x40000 >; | |
| resets = < &rctl 0x812 >; | |
| interrupts = < 0x1a 0x0 >; | |
| interrupt-names = "global"; | |
| st,prescaler = < 0x0 >; | |
| status = "disabled"; | |
| pwm { | |
| compatible = "st,stm32-pwm"; | |
| status = "disabled"; | |
| #pwm-cells = < 0x3 >; | |
| }; | |
| counter { | |
| compatible = "st,stm32-counter"; | |
| status = "disabled"; | |
| }; | |
| }; | |
| adc1: adc@50040000 { | |
| compatible = "st,stm32-adc"; | |
| reg = < 0x50040000 0x400 >; | |
| clocks = < &rcc 0x4c 0x2000 >; | |
| interrupts = < 0x12 0x0 >; | |
| status = "okay"; | |
| #io-channel-cells = < 0x1 >; | |
| resolutions = < 0x60630c 0x51630c 0x42630c 0x33630c >; | |
| sampling-times = < 0x3 0x7 0xd 0x19 0x30 0x5d 0xf8 0x281 >; | |
| st,adc-sequencer = < 0x1 >; | |
| pinctrl-0 = < &adc1_in3_pc2 >; | |
| pinctrl-names = "default"; | |
| st,adc-clock-source = < 0x1 >; | |
| st,adc-prescaler = < 0x4 >; | |
| phandle = < 0x1c >; | |
| }; | |
| iwdg: watchdog@40003000 { | |
| compatible = "st,stm32-watchdog"; | |
| reg = < 0x40003000 0x400 >; | |
| status = "okay"; | |
| }; | |
| lptim1: stm32_lp_tick_source: timers@40007c00 { | |
| compatible = "st,stm32-lptim"; | |
| clocks = < &rcc 0x58 0x80000000 >, < &rcc 0x2 0x37288 >; | |
| #address-cells = < 0x1 >; | |
| #size-cells = < 0x0 >; | |
| reg = < 0x40007c00 0x400 >; | |
| interrupts = < 0x2f 0x1 >; | |
| interrupt-names = "wakeup"; | |
| status = "okay"; | |
| }; | |
| dma1: dma@40020000 { | |
| compatible = "st,stm32-dma-v2"; | |
| #dma-cells = < 0x3 >; | |
| reg = < 0x40020000 0x400 >; | |
| interrupts = < 0xb 0x0 0xc 0x0 0xd 0x0 0xe 0x0 0xf 0x0 0x10 0x0 0x11 0x0 >; | |
| clocks = < &rcc 0x48 0x1 >; | |
| dma-requests = < 0x7 >; | |
| dma-offset = < 0x0 >; | |
| status = "disabled"; | |
| }; | |
| dma2: dma@40020400 { | |
| compatible = "st,stm32-dma-v2"; | |
| #dma-cells = < 0x3 >; | |
| reg = < 0x40020400 0x400 >; | |
| interrupts = < 0x37 0x0 0x38 0x0 0x39 0x0 0x3a 0x0 0x3b 0x0 0x3c 0x0 0x3d 0x0 >; | |
| clocks = < &rcc 0x48 0x2 >; | |
| dma-requests = < 0x7 >; | |
| dma-offset = < 0x7 >; | |
| status = "disabled"; | |
| }; | |
| dmamux1: dmamux@40020800 { | |
| compatible = "st,stm32-dmamux"; | |
| #dma-cells = < 0x3 >; | |
| reg = < 0x40020800 0x400 >; | |
| interrupts = < 0x3e 0x0 >; | |
| clocks = < &rcc 0x48 0x4 >; | |
| dma-channels = < 0xe >; | |
| dma-generators = < 0x4 >; | |
| dma-requests = < 0x24 >; | |
| status = "disabled"; | |
| }; | |
| usb: zephyr_udc0: usb@40006800 { | |
| compatible = "st,stm32-usb"; | |
| reg = < 0x40006800 0x400 >; | |
| interrupts = < 0x14 0x0 >, < 0x13 0x0 >; | |
| interrupt-names = "usb", "usbhp"; | |
| num-bidir-endpoints = < 0x8 >; | |
| ram-size = < 0x400 >; | |
| phys = < &usb_fs_phy >; | |
| clocks = < &rcc 0x58 0x4000000 >, < &rcc 0x5 0x7a88 >; | |
| status = "okay"; | |
| pinctrl-0 = < &usb_dm_pa11 &usb_dp_pa12 >; | |
| pinctrl-names = "default"; | |
| }; | |
| quadspi: quadspi@a0001000 { | |
| compatible = "st,stm32-qspi"; | |
| #address-cells = < 0x1 >; | |
| #size-cells = < 0x0 >; | |
| reg = < 0xa0001000 0x400 >; | |
| interrupts = < 0x32 0x0 >; | |
| clocks = < &rcc 0x50 0x100 >; | |
| status = "disabled"; | |
| }; | |
| rng: rng@58001000 { | |
| compatible = "st,stm32-rng"; | |
| reg = < 0x58001000 0x400 >; | |
| interrupts = < 0x35 0x0 >; | |
| clocks = < &rcc 0x50 0x40000 >; | |
| status = "okay"; | |
| }; | |
| aes1: aes@50060000 { | |
| compatible = "st,stm32-aes"; | |
| reg = < 0x50060000 0x400 >; | |
| clocks = < &rcc 0x4c 0x10000 >; | |
| interrupts = < 0x33 0x0 >; | |
| status = "okay"; | |
| }; | |
| }; | |
| cpus { | |
| #address-cells = < 0x1 >; | |
| #size-cells = < 0x0 >; | |
| cpu0: cpu@0 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-m4f"; | |
| reg = < 0x0 >; | |
| cpu-power-states = < &stop0 &stop1 &stop2 >; | |
| }; | |
| power-states { | |
| stop0: state0 { | |
| compatible = "zephyr,power-state"; | |
| power-state-name = "suspend-to-idle"; | |
| substate-id = < 0x1 >; | |
| min-residency-us = < 0x64 >; | |
| phandle = < 0x19 >; | |
| }; | |
| stop1: state1 { | |
| compatible = "zephyr,power-state"; | |
| power-state-name = "suspend-to-idle"; | |
| substate-id = < 0x2 >; | |
| min-residency-us = < 0x1f4 >; | |
| phandle = < 0x1a >; | |
| }; | |
| stop2: state2 { | |
| compatible = "zephyr,power-state"; | |
| power-state-name = "suspend-to-idle"; | |
| substate-id = < 0x3 >; | |
| min-residency-us = < 0x384 >; | |
| phandle = < 0x1b >; | |
| }; | |
| }; | |
| }; | |
| sram0: memory@20000000 { | |
| compatible = "mmio-sram"; | |
| reg = < 0x20000000 0x30000 >; | |
| }; | |
| sram1: memory@20030000 { | |
| compatible = "zephyr,memory-region", "mmio-sram"; | |
| reg = < 0x20030000 0x2800 >; | |
| zephyr,memory-region = "SRAM1"; | |
| }; | |
| sram2: memory@20038000 { | |
| compatible = "zephyr,memory-region", "mmio-sram"; | |
| reg = < 0x20038000 0x5000 >; | |
| zephyr,memory-region = "SRAM2"; | |
| }; | |
| clocks { | |
| clk_hse: clk-hse { | |
| #clock-cells = < 0x0 >; | |
| compatible = "fixed-clock"; | |
| clock-frequency = < 0x1e84800 >; | |
| status = "okay"; | |
| phandle = < 0x3 >; | |
| }; | |
| clk_hsi: clk-hsi { | |
| #clock-cells = < 0x0 >; | |
| compatible = "fixed-clock"; | |
| clock-frequency = < 0xf42400 >; | |
| status = "disabled"; | |
| }; | |
| clk_hsi48: clk-hsi48 { | |
| #clock-cells = < 0x0 >; | |
| compatible = "fixed-clock"; | |
| clock-frequency = < 0x2dc6c00 >; | |
| status = "okay"; | |
| }; | |
| clk_msi: clk-msi { | |
| #clock-cells = < 0x0 >; | |
| compatible = "st,stm32-msi-clock"; | |
| msi-range = < 0x6 >; | |
| status = "disabled"; | |
| }; | |
| clk_lse: clk-lse { | |
| #clock-cells = < 0x0 >; | |
| compatible = "st,stm32-lse-clock"; | |
| clock-frequency = < 0x8000 >; | |
| driving-capability = < 0x0 >; | |
| status = "okay"; | |
| }; | |
| clk_lsi1: clk-lsi1 { | |
| #clock-cells = < 0x0 >; | |
| compatible = "fixed-clock"; | |
| clock-frequency = < 0x7d00 >; | |
| status = "okay"; | |
| }; | |
| clk_lsi2: clk-lsi2 { | |
| #clock-cells = < 0x0 >; | |
| compatible = "fixed-clock"; | |
| clock-frequency = < 0x7d00 >; | |
| status = "disabled"; | |
| }; | |
| pll: pll { | |
| #clock-cells = < 0x0 >; | |
| compatible = "st,stm32wb-pll-clock"; | |
| status = "disabled"; | |
| }; | |
| clk48: clk48 { | |
| #clock-cells = < 0x0 >; | |
| compatible = "st,stm32-clock-mux"; | |
| status = "disabled"; | |
| clocks = < &rcc 0x5 0x7a88 >; | |
| }; | |
| }; | |
| die_temp: dietemp { | |
| compatible = "st,stm32-temp-cal"; | |
| ts-cal1-addr = < 0x1fff75a8 >; | |
| ts-cal2-addr = < 0x1fff75ca >; | |
| ts-cal1-temp = < 0x1e >; | |
| ts-cal2-temp = < 0x82 >; | |
| ts-cal-vrefanalog = < 0xbb8 >; | |
| io-channels = < &adc1 0x11 >; | |
| status = "okay"; | |
| }; | |
| vref: vref { | |
| compatible = "st,stm32-vref"; | |
| vrefint-cal-addr = < 0x1fff75aa >; | |
| vrefint-cal-mv = < 0xe10 >; | |
| io-channels = < &adc1 0x0 >; | |
| status = "okay"; | |
| }; | |
| vbat: vbat { | |
| compatible = "st,stm32-vbat"; | |
| ratio = < 0x3 >; | |
| io-channels = < &adc1 0x12 >; | |
| status = "okay"; | |
| }; | |
| usb_fs_phy: usbphy { | |
| compatible = "usb-nop-xceiv"; | |
| #phy-cells = < 0x0 >; | |
| phandle = < 0x16 >; | |
| }; | |
| ble_rf: ble_rf { | |
| compatible = "st,stm32wb-rf"; | |
| clocks = < &rcc 0x50 0x100000 >, < &rcc 0x2 0x16e94 >; | |
| }; | |
| smbus1: smbus1 { | |
| compatible = "st,stm32-smbus"; | |
| #address-cells = < 0x1 >; | |
| #size-cells = < 0x0 >; | |
| i2c = < &i2c1 >; | |
| status = "disabled"; | |
| }; | |
| smbus3: smbus3 { | |
| compatible = "st,stm32-smbus"; | |
| #address-cells = < 0x1 >; | |
| #size-cells = < 0x0 >; | |
| i2c = < &i2c3 >; | |
| status = "disabled"; | |
| }; | |
| arduino_header: connector { | |
| compatible = "arduino-header-r3"; | |
| #gpio-cells = < 0x2 >; | |
| gpio-map-mask = < 0xffffffff 0xffffffc0 >; | |
| gpio-map-pass-thru = < 0x0 0x3f >; | |
| gpio-map = < 0x0 0x0 &gpioc 0x0 0x0 >, < 0x1 0x0 &gpioc 0x1 0x0 >, < 0x2 0x0 &gpioa 0x1 0x0 >, < 0x3 0x0 &gpioa 0x0 0x0 >, < 0x4 0x0 &gpioc 0x3 0x0 >, < 0x5 0x0 &gpioc 0x2 0x0 >, < 0x6 0x0 &gpioa 0x3 0x0 >, < 0x7 0x0 &gpioa 0x2 0x0 >, < 0x8 0x0 &gpioc 0x6 0x0 >, < 0x9 0x0 &gpioa 0xa 0x0 >, < 0xa 0x0 &gpioc 0xa 0x0 >, < 0xb 0x0 &gpioa 0xf 0x0 >, < 0xc 0x0 &gpioa 0x8 0x0 >, < 0xd 0x0 &gpioc 0xd 0x0 >, < 0xe 0x0 &gpioc 0xc 0x0 >, < 0xf 0x0 &gpioa 0x9 0x0 >, < 0x10 0x0 &gpioa 0x4 0x0 >, < 0x11 0x0 &gpioa 0x7 0x0 >, < 0x12 0x0 &gpioa 0x6 0x0 >, < 0x13 0x0 &gpioa 0x5 0x0 >, < 0x14 0x0 &gpiob 0x9 0x0 >, < 0x15 0x0 &gpiob 0x8 0x0 >; | |
| }; | |
| leds: leds { | |
| compatible = "gpio-leds"; | |
| blue_led_1: led_0 { | |
| gpios = < &gpiob 0x5 0x0 >; | |
| label = "User LED1"; | |
| }; | |
| green_led_2: led_1 { | |
| gpios = < &gpiob 0x0 0x0 >; | |
| label = "User LED2"; | |
| }; | |
| green_led_3: led_2 { | |
| gpios = < &gpiob 0x1 0x0 >; | |
| label = "User LED3"; | |
| }; | |
| }; | |
| gpio_keys { | |
| compatible = "gpio-keys"; | |
| user_button_1: button_0 { | |
| label = "SW1"; | |
| gpios = < &gpioc 0x4 0x11 >; | |
| zephyr,code = < 0xb >; | |
| }; | |
| user_button_2: button_1 { | |
| label = "SW2"; | |
| gpios = < &gpiod 0x0 0x11 >; | |
| zephyr,code = < 0x2 >; | |
| }; | |
| user_button_3: button_2 { | |
| label = "SW3"; | |
| gpios = < &gpiod 0x1 0x11 >; | |
| zephyr,code = < 0x3 >; | |
| }; | |
| }; | |
| }; |
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