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June 13, 2020 21:55
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diff --git a/board/bmw/bmw/Kconfig b/board/bmw/bmw/Kconfig | |
new file mode 100644 | |
index 0000000000..b83c553d52 | |
--- /dev/null | |
+++ b/board/bmw/bmw/Kconfig | |
@@ -0,0 +1,18 @@ | |
+if TARGET_BMW | |
+ | |
+config SYS_BOARD | |
+ default "bmw" | |
+ | |
+config SYS_VENDOR | |
+ default "bmw" | |
+ | |
+config SYS_SOC | |
+ default "mxs" | |
+ | |
+config SYS_CONFIG_NAME | |
+ default "bmw" | |
+ | |
+config ENV_SIZE | |
+ default 0x2000 | |
+ | |
+endif | |
diff --git a/board/bmw/bmw/Makefile b/board/bmw/bmw/Makefile | |
new file mode 100644 | |
index 0000000000..24ef643c83 | |
--- /dev/null | |
+++ b/board/bmw/bmw/Makefile | |
@@ -0,0 +1,5 @@ | |
+ifndef CONFIG_SPL_BUILD | |
+obj-y := bmw.o | |
+else | |
+obj-y := iomux.o | |
+endif | |
\ No newline at end of file | |
diff --git a/board/bmw/bmw/bmw.c b/board/bmw/bmw/bmw.c | |
new file mode 100644 | |
index 0000000000..e18483364a | |
--- /dev/null | |
+++ b/board/bmw/bmw/bmw.c | |
@@ -0,0 +1,60 @@ | |
+#include <common.h> | |
+#include <init.h> | |
+#include <net.h> | |
+#include <asm/gpio.h> | |
+#include <asm/io.h> | |
+#include <asm/arch/imx-regs.h> | |
+#include <asm/arch/iomux-mx28.h> | |
+#include <asm/arch/clock.h> | |
+#include <asm/arch/sys_proto.h> | |
+#include <linux/delay.h> | |
+#include <linux/mii.h> | |
+#include <miiphy.h> | |
+#include <netdev.h> | |
+#include <errno.h> | |
+ | |
+DECLARE_GLOBAL_DATA_PTR; | |
+ | |
+/* | |
+ * Functions | |
+ */ | |
+int board_early_init_f(void) | |
+{ | |
+ /* IO0 clock at 480MHz */ | |
+ mxs_set_ioclk(MXC_IOCLK0, 480000); | |
+ /* IO1 clock at 480MHz */ | |
+ mxs_set_ioclk(MXC_IOCLK1, 480000); | |
+ | |
+ /* SSP0 clock at 96MHz */ | |
+ mxs_set_sspclk(MXC_SSPCLK0, 96000, 0); | |
+ /* SSP2 clock at 160MHz */ | |
+ mxs_set_sspclk(MXC_SSPCLK2, 160000, 0); | |
+ | |
+#ifdef CONFIG_CMD_USB | |
+ mxs_iomux_setup_pad(MX28_PAD_SSP2_SS1__USB1_OVERCURRENT); | |
+ mxs_iomux_setup_pad(MX28_PAD_AUART2_RX__GPIO_3_8 | | |
+ MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL); | |
+ gpio_direction_output(MX28_PAD_AUART2_RX__GPIO_3_8, 1); | |
+#endif | |
+ | |
+ /* Power on LCD */ | |
+ gpio_direction_output(MX28_PAD_LCD_RESET__GPIO_3_30, 1); | |
+ | |
+ /* Set contrast to maximum */ | |
+ gpio_direction_output(MX28_PAD_PWM2__GPIO_3_18, 1); | |
+ | |
+ return 0; | |
+} | |
+ | |
+int dram_init(void) | |
+{ | |
+ return mxs_dram_init(); | |
+} | |
+ | |
+int board_init(void) | |
+{ | |
+ /* Adress of boot parameters */ | |
+ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; | |
+ | |
+ return 0; | |
+} | |
diff --git a/board/bmw/bmw/iomux.c b/board/bmw/bmw/iomux.c | |
new file mode 100644 | |
index 0000000000..cc0c858854 | |
--- /dev/null | |
+++ b/board/bmw/bmw/iomux.c | |
@@ -0,0 +1,205 @@ | |
+// SPDX-License-Identifier: GPL-2.0+ | |
+/* | |
+ * Freescale MX28EVK IOMUX setup | |
+ * | |
+ * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> | |
+ * on behalf of DENX Software Engineering GmbH | |
+ */ | |
+ | |
+#include <common.h> | |
+#include <config.h> | |
+#include <asm/io.h> | |
+#include <asm/arch/iomux-mx28.h> | |
+#include <asm/arch/imx-regs.h> | |
+#include <asm/arch/sys_proto.h> | |
+ | |
+#define MUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) | |
+#define MUX_CONFIG_GPMI (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL) | |
+#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) | |
+#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL) | |
+#define MUX_CONFIG_SSP2 (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP) | |
+#define MUX_CONFIG_LCD (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL) | |
+ | |
+const iomux_cfg_t iomux_setup[] = { | |
+ /* DUART */ | |
+ MX28_PAD_PWM0__DUART_RX, | |
+ MX28_PAD_PWM1__DUART_TX, | |
+ | |
+ /* MMC0 */ | |
+ MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0, | |
+ MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0, | |
+ MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0, | |
+ MX28_PAD_SSP0_DATA3__SSP0_D3 | MUX_CONFIG_SSP0, | |
+ MX28_PAD_SSP0_DATA4__SSP0_D4 | MUX_CONFIG_SSP0, | |
+ MX28_PAD_SSP0_DATA5__SSP0_D5 | MUX_CONFIG_SSP0, | |
+ MX28_PAD_SSP0_DATA6__SSP0_D6 | MUX_CONFIG_SSP0, | |
+ MX28_PAD_SSP0_DATA7__SSP0_D7 | MUX_CONFIG_SSP0, | |
+ MX28_PAD_SSP0_CMD__SSP0_CMD | MUX_CONFIG_SSP0, | |
+ MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT | | |
+ (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | |
+ MX28_PAD_SSP0_SCK__SSP0_SCK | | |
+ (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | |
+ /* write protect */ | |
+ MX28_PAD_SSP1_SCK__GPIO_2_12, | |
+ /* MMC0 slot power enable */ | |
+ MX28_PAD_PWM3__GPIO_3_28 | | |
+ (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
+ | |
+#ifdef CONFIG_NAND_MXS | |
+ /* GPMI NAND */ | |
+ MX28_PAD_GPMI_D00__GPMI_D0 | MUX_CONFIG_GPMI, | |
+ MX28_PAD_GPMI_D01__GPMI_D1 | MUX_CONFIG_GPMI, | |
+ MX28_PAD_GPMI_D02__GPMI_D2 | MUX_CONFIG_GPMI, | |
+ MX28_PAD_GPMI_D03__GPMI_D3 | MUX_CONFIG_GPMI, | |
+ MX28_PAD_GPMI_D04__GPMI_D4 | MUX_CONFIG_GPMI, | |
+ MX28_PAD_GPMI_D05__GPMI_D5 | MUX_CONFIG_GPMI, | |
+ MX28_PAD_GPMI_D06__GPMI_D6 | MUX_CONFIG_GPMI, | |
+ MX28_PAD_GPMI_D07__GPMI_D7 | MUX_CONFIG_GPMI, | |
+ MX28_PAD_GPMI_CE0N__GPMI_CE0N | MUX_CONFIG_GPMI, | |
+ MX28_PAD_GPMI_RDY0__GPMI_READY0 | MUX_CONFIG_GPMI, | |
+ MX28_PAD_GPMI_RDN__GPMI_RDN | | |
+ (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP), | |
+ MX28_PAD_GPMI_WRN__GPMI_WRN | MUX_CONFIG_GPMI, | |
+ MX28_PAD_GPMI_ALE__GPMI_ALE | MUX_CONFIG_GPMI, | |
+ MX28_PAD_GPMI_CLE__GPMI_CLE | MUX_CONFIG_GPMI, | |
+ MX28_PAD_GPMI_RESETN__GPMI_RESETN | MUX_CONFIG_GPMI, | |
+#endif | |
+ | |
+ /* FEC0 */ | |
+ MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET, | |
+ MX28_PAD_ENET0_MDIO__ENET0_MDIO | MUX_CONFIG_ENET, | |
+ MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MUX_CONFIG_ENET, | |
+ MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MUX_CONFIG_ENET, | |
+ MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MUX_CONFIG_ENET, | |
+ MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MUX_CONFIG_ENET, | |
+ MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET, | |
+ MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET, | |
+ MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET, | |
+ /* FEC0 Enable */ | |
+ MX28_PAD_SSP1_DATA3__GPIO_2_15 | | |
+ (MXS_PAD_12MA | MXS_PAD_3V3), | |
+ /* FEC0 Reset */ | |
+ MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | | |
+ (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
+ | |
+ /* FEC1 */ | |
+ MX28_PAD_ENET0_COL__ENET1_TX_EN | MUX_CONFIG_ENET, | |
+ MX28_PAD_ENET0_CRS__ENET1_RX_EN | MUX_CONFIG_ENET, | |
+ MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MUX_CONFIG_ENET, | |
+ MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MUX_CONFIG_ENET, | |
+ MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MUX_CONFIG_ENET, | |
+ MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MUX_CONFIG_ENET, | |
+ | |
+ /* EMI */ | |
+ MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI, | |
+ | |
+ MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_A13__EMI_ADDR13 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_A14__EMI_ADDR14 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI, | |
+ MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI, | |
+ | |
+ /* SPI2 (for SPI flash) */ | |
+ MX28_PAD_SSP2_SCK__SSP2_SCK | MUX_CONFIG_SSP2, | |
+ MX28_PAD_SSP2_MOSI__SSP2_CMD | MUX_CONFIG_SSP2, | |
+ MX28_PAD_SSP2_MISO__SSP2_D0 | MUX_CONFIG_SSP2, | |
+ MX28_PAD_SSP2_SS0__SSP2_D3 | | |
+ (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP), | |
+ /* I2C */ | |
+ MX28_PAD_I2C0_SCL__I2C0_SCL, | |
+ MX28_PAD_I2C0_SDA__I2C0_SDA, | |
+ | |
+ /* LCD */ | |
+ MX28_PAD_LCD_D00__LCD_D0 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D01__LCD_D1 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D02__LCD_D2 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D03__LCD_D3 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D04__LCD_D4 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D05__LCD_D5 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D06__LCD_D6 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D07__LCD_D7 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D08__LCD_D8 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D09__LCD_D9 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D10__LCD_D10 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D11__LCD_D11 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D12__LCD_D12 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D13__LCD_D13 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D14__LCD_D14 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D15__LCD_D15 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D16__LCD_D16 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D17__LCD_D17 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D18__LCD_D18 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D19__LCD_D19 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D20__LCD_D20 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D21__LCD_D21 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D22__LCD_D22 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_D23__LCD_D23 | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_RD_E__LCD_VSYNC | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_RS__LCD_DOTCLK | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_CS__LCD_ENABLE | MUX_CONFIG_LCD, | |
+ MX28_PAD_LCD_RESET__GPIO_3_30 | MUX_CONFIG_LCD, /* LCD power */ | |
+ MX28_PAD_PWM2__GPIO_3_18 | MUX_CONFIG_LCD, /* LCD contrast */ | |
+}; | |
+ | |
+#define HW_DRAM_CTL29 (0x74 >> 2) | |
+#define CS_MAP 0xf | |
+#define COLUMN_SIZE 0x2 | |
+#define ADDR_PINS 0x1 | |
+#define APREBIT 0xa | |
+ | |
+#define HW_DRAM_CTL29_CONFIG (CS_MAP << 24 | COLUMN_SIZE << 16 | \ | |
+ ADDR_PINS << 8 | APREBIT) | |
+ | |
+void mxs_adjust_memory_params(uint32_t *dram_vals) | |
+{ | |
+ dram_vals[HW_DRAM_CTL29] = HW_DRAM_CTL29_CONFIG; | |
+} | |
+ | |
+void board_init_ll(const uint32_t arg, const uint32_t *resptr) | |
+{ | |
+ mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup)); | |
+} | |
diff --git a/build.sh b/build.sh | |
new file mode 100644 | |
index 0000000000..b4f9cc0cc2 | |
--- /dev/null | |
+++ b/build.sh | |
@@ -0,0 +1,7 @@ | |
+#!/bin/sh | |
+ | |
+#ARCH=arm | |
+#export CROSS_COMPILE=arm-linux-gnueabi- | |
+# sudo apt install cpp-8-arm-linux-gnueabi g++-8-arm-linux-gnueabi gcc-8-arm-linux-gnueabi pkg-config-arm-linux-gnueabi binutils-arm-linux-gnueabi | |
+make ARCH=arm CROSS_COMPILE=/media/psf/src/bmw/linux-2.6.35.3-imx28/cross-toolchain/arm-fsl-linux-gnueabi/bin/arm-fsl-linux-gnueabi- bmw_defconfig | |
+make ARCH=arm CROSS_COMPILE=/media/psf/src/bmw/linux-2.6.35.3-imx28/cross-toolchain/arm-fsl-linux-gnueabi/bin/arm-fsl-linux-gnueabi- | |
\ No newline at end of file | |
diff --git a/configs/bmw_defconfig b/configs/bmw_defconfig | |
new file mode 100644 | |
index 0000000000..15e7c4eb41 | |
--- /dev/null | |
+++ b/configs/bmw_defconfig | |
@@ -0,0 +1,35 @@ | |
+CONFIG_ARM=y | |
+CONFIG_ARCH_MX28=y | |
+CONFIG_SYS_TEXT_BASE=0x40002000 | |
+#CONFIG_SPL_GPIO_SUPPORT=y | |
+#CONFIG_SPL_LIBCOMMON_SUPPORT=y | |
+#CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
+CONFIG_ENV_SIZE=0x4000 | |
+CONFIG_ENV_OFFSET=0x40000 | |
+CONFIG_TARGET_BMW=y | |
+#CONFIG_SPL_SERIAL_SUPPORT=y | |
+CONFIG_NR_DRAM_BANKS=1 | |
+#CONFIG_SPL=y | |
+#CONFIG_SPL_TEXT_BASE=0x00001000 | |
+CONFIG_FIT=y | |
+# CONFIG_CONSOLE_MUX is not set | |
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y | |
+CONFIG_VERSION_VARIABLE=y | |
+# CONFIG_DISPLAY_BOARDINFO is not set | |
+CONFIG_ARCH_MISC_INIT=y | |
+# CONFIG_SPL_FRAMEWORK is not set | |
+CONFIG_HUSH_PARSER=y | |
+CONFIG_CMD_BOOTZ=y | |
+# CONFIG_CMD_FLASH is not set | |
+CONFIG_CMD_GPIO=y | |
+CONFIG_CMD_CACHE=y | |
+CONFIG_CMD_EXT2=y | |
+CONFIG_CMD_FS_GENERIC=y | |
+CONFIG_CMD_MTDPARTS=y | |
+CONFIG_MTDIDS_DEFAULT="nor0=spi0.0" | |
+CONFIG_MTDPARTS_DEFAULT="spi0.0:512k(bootloader)ro,2304k(kernel),48m(rootfs),2304k(recovery),9m(recovery_fs),1536k(config),256k(bw_image_raw_data),256k(temp_image_raw_data)" | |
+CONFIG_MXS_GPIO=y | |
+CONFIG_MTD=y | |
+CONFIG_CONS_INDEX=0 | |
+CONFIG_SPI=y | |
+CONFIG_SECURE_BOOT=y | |
diff --git a/include/configs/bmw.h b/include/configs/bmw.h | |
new file mode 100644 | |
index 0000000000..02b3280eb8 | |
--- /dev/null | |
+++ b/include/configs/bmw.h | |
@@ -0,0 +1,25 @@ | |
+#ifndef __CONFIGS_BMW_H__ | |
+#define __CONFIGS_BMW_H__ | |
+ | |
+#include <linux/sizes.h> | |
+ | |
+/* System configurations */ | |
+#define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK | |
+ | |
+/* Memory configuration */ | |
+#define PHYS_SDRAM_1 0x40000000 /* Base address */ | |
+#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ | |
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
+ | |
+/* Environment */ | |
+//#define CONFIG_ENV_OVERWRITE | |
+ | |
+/* Boot Linux */ | |
+#define CONFIG_BOOTFILE "uImage" | |
+#define CONFIG_LOADADDR 0x42000000 | |
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
+ | |
+/* The rest of the configuration is shared */ | |
+#include <configs/mxs.h> | |
+ | |
+#endif /* _CONFIGS_BMW_H__ */ | |
\ No newline at end of file | |
diff --git a/arch/arm/mach-imx/mxs/Kconfig b/arch/arm/mach-imx/mxs/Kconfig | |
index b90d7b6e41..c83f74dd6f 100644 | |
--- a/arch/arm/mach-imx/mxs/Kconfig | |
+++ b/arch/arm/mach-imx/mxs/Kconfig | |
@@ -63,6 +63,9 @@ config TARGET_TS4600 | |
config TARGET_XEA | |
bool "Support XEA" | |
+config TARGET_BMW | |
+ bool "Support BMW" | |
+ | |
endchoice | |
config SYS_SOC | |
@@ -74,5 +77,6 @@ source "board/liebherr/xea/Kconfig" | |
source "board/ppcag/bg0900/Kconfig" | |
source "board/schulercontrol/sc_sps_1/Kconfig" | |
source "board/technologic/ts4600/Kconfig" | |
+source "board/bmw/bmw/Kconfig" | |
endif |
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