u-boot2.patch

diff --git a/board/bmw/bmw/Kconfig b/board/bmw/bmw/Kconfig
new file mode 100644
index 0000000000..b83c553d52
--- /dev/null
+++ b/board/bmw/bmw/Kconfig
@@ -0,0 +1,18 @@
+if TARGET_BMW
+
+config SYS_BOARD
+	default "bmw"
+
+config SYS_VENDOR
+	default "bmw"
+
+config SYS_SOC
+	default "mxs"
+
+config SYS_CONFIG_NAME
+	default "bmw"
+
+config ENV_SIZE
+	default 0x2000
+
+endif
diff --git a/board/bmw/bmw/Makefile b/board/bmw/bmw/Makefile
new file mode 100644
index 0000000000..24ef643c83
--- /dev/null
+++ b/board/bmw/bmw/Makefile
@@ -0,0 +1,5 @@
+ifndef	CONFIG_SPL_BUILD
+obj-y	:= bmw.o
+else
+obj-y	:= iomux.o
+endif
\ No newline at end of file
diff --git a/board/bmw/bmw/bmw.c b/board/bmw/bmw/bmw.c
new file mode 100644
index 0000000000..e18483364a
--- /dev/null
+++ b/board/bmw/bmw/bmw.c
@@ -0,0 +1,60 @@
+#include <common.h>
+#include <init.h>
+#include <net.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/iomux-mx28.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/sys_proto.h>
+#include <linux/delay.h>
+#include <linux/mii.h>
+#include <miiphy.h>
+#include <netdev.h>
+#include <errno.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Functions
+ */
+int board_early_init_f(void)
+{
+	/* IO0 clock at 480MHz */
+	mxs_set_ioclk(MXC_IOCLK0, 480000);
+	/* IO1 clock at 480MHz */
+	mxs_set_ioclk(MXC_IOCLK1, 480000);
+
+	/* SSP0 clock at 96MHz */
+	mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
+	/* SSP2 clock at 160MHz */
+	mxs_set_sspclk(MXC_SSPCLK2, 160000, 0);
+
+#ifdef	CONFIG_CMD_USB
+	mxs_iomux_setup_pad(MX28_PAD_SSP2_SS1__USB1_OVERCURRENT);
+	mxs_iomux_setup_pad(MX28_PAD_AUART2_RX__GPIO_3_8 |
+			MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL);
+	gpio_direction_output(MX28_PAD_AUART2_RX__GPIO_3_8, 1);
+#endif
+
+	/* Power on LCD */
+	gpio_direction_output(MX28_PAD_LCD_RESET__GPIO_3_30, 1);
+
+	/* Set contrast to maximum */
+	gpio_direction_output(MX28_PAD_PWM2__GPIO_3_18, 1);
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	return mxs_dram_init();
+}
+
+int board_init(void)
+{
+	/* Adress of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+	return 0;
+}
diff --git a/board/bmw/bmw/spl_boot.c b/board/bmw/bmw/spl_boot.c
new file mode 100644
index 0000000000..93a83c4139
--- /dev/null
+++ b/board/bmw/bmw/spl_boot.c
@@ -0,0 +1,223 @@
+#include <common.h>
+#include <config.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/iomux-mx28.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/iomux-mx28.h>
+
+#include <spl.h>
+
+#define	MUX_CONFIG_SSP0	(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
+#define	MUX_CONFIG_GPMI	(MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
+#define	MUX_CONFIG_ENET	(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
+#define	MUX_CONFIG_EMI	(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
+#define	MUX_CONFIG_SSP2	(MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
+#define	MUX_CONFIG_LCD	(MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
+
+const iomux_cfg_t iomux_setup[] = {
+	/* DUART */
+	MX28_PAD_PWM0__DUART_RX,
+	MX28_PAD_PWM1__DUART_TX,
+
+	/* EMI */
+	MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI,
+
+	MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A13__EMI_ADDR13 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A14__EMI_ADDR14 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
+
+	/* SPI2 (for SPI flash) */
+	MX28_PAD_SSP2_SCK__SSP2_SCK | MUX_CONFIG_SSP2,
+	MX28_PAD_SSP2_MOSI__SSP2_CMD | MUX_CONFIG_SSP2,
+	MX28_PAD_SSP2_MISO__SSP2_D0 | MUX_CONFIG_SSP2,
+	MX28_PAD_SSP2_SS0__SSP2_D3 |
+		(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),
+	
+	/* I2C */
+	MX28_PAD_I2C0_SCL__I2C0_SCL,
+	MX28_PAD_I2C0_SDA__I2C0_SDA,
+
+	/* LCD */
+	MX28_PAD_LCD_D00__LCD_D0 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D01__LCD_D1 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D02__LCD_D2 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D03__LCD_D3 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D04__LCD_D4 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D05__LCD_D5 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D06__LCD_D6 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D07__LCD_D7 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D08__LCD_D8 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D09__LCD_D9 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D10__LCD_D10 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D11__LCD_D11 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D12__LCD_D12 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D13__LCD_D13 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D14__LCD_D14 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D15__LCD_D15 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D16__LCD_D16 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D17__LCD_D17 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D18__LCD_D18 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D19__LCD_D19 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D20__LCD_D20 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D21__LCD_D21 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D22__LCD_D22 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_D23__LCD_D23 | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_RD_E__LCD_VSYNC | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_RS__LCD_DOTCLK | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_CS__LCD_ENABLE | MUX_CONFIG_LCD,
+	MX28_PAD_LCD_RESET__GPIO_3_30 | MUX_CONFIG_LCD, /* LCD power */
+	MX28_PAD_PWM2__GPIO_3_18 | MUX_CONFIG_LCD, /* LCD contrast */
+};
+
+void mxs_adjust_memory_params(uint32_t *dram_vals)
+{
+	/* mDDR configuration values */
+	dram_vals[0]  = 0x00000000;
+	dram_vals[16] = 0x00000000;
+	dram_vals[21] = 0x00000000;
+	dram_vals[22] = 0x00000000;
+	dram_vals[23] = 0x00000000;
+	dram_vals[24] = 0x00000000;
+	dram_vals[25] = 0x00000000;
+	dram_vals[26] = 0x00010101;
+	dram_vals[27] = 0x01010101;
+	dram_vals[28] = 0x000f0f01;
+	dram_vals[29] = 0x0f02010a;
+	dram_vals[31] = 0x00000101;
+	dram_vals[32] = 0x00000100;
+	dram_vals[33] = 0x00000100;
+	dram_vals[34] = 0x01000000;
+	dram_vals[35] = 0x00000002;
+	dram_vals[36] = 0x01010000;
+	dram_vals[37] = 0x08060301;
+	dram_vals[38] = 0x06000001;
+	dram_vals[39] = 0x0a000000;
+	dram_vals[40] = 0x02009c40;
+	dram_vals[41] = 0x0002030b;
+	dram_vals[42] = 0x0036a608;
+	dram_vals[43] = 0x03160305;
+	dram_vals[44] = 0x03030002;
+	dram_vals[45] = 0x001f001c;
+	dram_vals[48] = 0x00012100;
+	dram_vals[49] = 0xffff0303;
+	dram_vals[50] = 0x00012100;
+	dram_vals[51] = 0xffff0303;
+	dram_vals[52] = 0x00012100;
+	dram_vals[53] = 0xffff0303;
+	dram_vals[54] = 0x00012100;
+	dram_vals[55] = 0xffff0303;
+	dram_vals[56] = 0x00000003;
+	dram_vals[58] = 0x00000000;
+	dram_vals[66] = 0x00000305;
+	dram_vals[67] = 0x01000f02;
+	dram_vals[69] = 0x00000200;
+	dram_vals[70] = 0x00020007;
+	dram_vals[71] = 0xf3004a27;
+	dram_vals[72] = 0xf3004a27;
+	dram_vals[75] = 0x07000310;
+	dram_vals[76] = 0x07000310;
+	dram_vals[79] = 0x00800004;
+	dram_vals[80] = 0x00000000;
+	dram_vals[81] = 0x00000000;
+	dram_vals[82] = 0x01000000;
+	dram_vals[83] = 0x01020408;
+	dram_vals[84] = 0x08040201;
+	dram_vals[85] = 0x000f1133;
+	dram_vals[87] = 0x00001f08;
+	dram_vals[88] = 0x00001f08;
+	dram_vals[91] = 0x00001f01;
+	dram_vals[92] = 0x00001f01;
+	dram_vals[162] = 0x00000000;
+	dram_vals[163] = 0x00010301;
+	dram_vals[164] = 0x00000002;
+	dram_vals[171] = 0x01010000;
+	dram_vals[172] = 0x01000100;
+	dram_vals[173] = 0x03030000;
+	dram_vals[174] = 0x00020303;
+	dram_vals[175] = 0x01010202;
+	dram_vals[176] = 0x00000000;
+	dram_vals[177] = 0x01030101;
+	dram_vals[178] = 0x21002101;
+	dram_vals[179] = 0x00030500;
+	dram_vals[180] = 0x03050305;
+	dram_vals[181] = 0x00320032;
+	dram_vals[182] = 0x00320032;
+	dram_vals[183] = 0x00000000;
+	dram_vals[184] = 0x00000000;
+	dram_vals[185] = 0x00000000;
+	dram_vals[186] = 0x00000000;
+	dram_vals[187] = 0x00000000;
+	dram_vals[188] = 0x00000000;
+	dram_vals[189] = 0xffffffff;
+}
+
+void putc2(char ch) {
+	int loop = 0;
+	while (*(uint32_t*)(0x80074018) & 0x00000020) {
+		loop++;
+		if (loop > 10000)
+			break;
+	}
+	*(uint32_t*)(0x80074000) = ch;
+}
+
+void board_init_ll(const uint32_t arg, const uint32_t *resptr)
+{
+	putc2('a');
+
+	mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
+
+	putc2('b');
+}
diff --git a/configs/bmw_defconfig b/configs/bmw_defconfig
new file mode 100644
index 0000000000..15e7c4eb41
--- /dev/null
+++ b/configs/bmw_defconfig
@@ -0,0 +1,35 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX28=y
+CONFIG_SYS_TEXT_BASE=0x40002000
+#CONFIG_SPL_GPIO_SUPPORT=y
+#CONFIG_SPL_LIBCOMMON_SUPPORT=y
+#CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SIZE=0x4000
+CONFIG_ENV_OFFSET=0x40000
+CONFIG_TARGET_BMW=y
+#CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=1
+#CONFIG_SPL=y
+#CONFIG_SPL_TEXT_BASE=0x00001000
+CONFIG_FIT=y
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_VERSION_VARIABLE=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_ARCH_MISC_INIT=y
+# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
+CONFIG_MTDPARTS_DEFAULT="spi0.0:512k(bootloader)ro,2304k(kernel),48m(rootfs),2304k(recovery),9m(recovery_fs),1536k(config),256k(bw_image_raw_data),256k(temp_image_raw_data)"
+CONFIG_MXS_GPIO=y
+CONFIG_MTD=y
+CONFIG_CONS_INDEX=0
+CONFIG_SPI=y
+CONFIG_SECURE_BOOT=y
diff --git a/include/configs/bmw.h b/include/configs/bmw.h
new file mode 100644
index 0000000000..02b3280eb8
--- /dev/null
+++ b/include/configs/bmw.h
@@ -0,0 +1,25 @@
+#ifndef __CONFIGS_BMW_H__
+#define __CONFIGS_BMW_H__
+
+#include <linux/sizes.h>
+
+/* System configurations */
+#define CONFIG_MACH_TYPE	MACH_TYPE_MX28EVK
+
+/* Memory configuration */
+#define PHYS_SDRAM_1			0x40000000	/* Base address */
+#define PHYS_SDRAM_1_SIZE		0x40000000	/* Max 1 GB RAM */
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+
+/* Environment */
+//#define CONFIG_ENV_OVERWRITE
+
+/* Boot Linux */
+#define CONFIG_BOOTFILE		"uImage"
+#define CONFIG_LOADADDR		0x42000000
+#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
+
+/* The rest of the configuration is shared */
+#include <configs/mxs.h>
+
+#endif /* _CONFIGS_BMW_H__ */
\ No newline at end of file
diff --git a/Makefile b/Makefile
index 3851dd9fa0..632fd80679 100644
--- a/Makefile
+++ b/Makefile
@@ -2027,7 +2027,7 @@ CLEAN_DIRS  += $(MODVERDIR) \
 			$(filter-out include, $(shell ls -1 $d 2>/dev/null))))
 
 CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h tools/version.h \
-	       boot* u-boot* MLO* SPL System.map fit-dtb.blob* \
+	       boot* u-boot* MLO* System.map fit-dtb.blob* \
 	       u-boot-ivt.img.log u-boot-dtb.imx.log SPL.log u-boot.imx.log \
 	       lpc32xx-* bl31.c bl31.elf bl31_*.bin image.map tispl.bin* \
 	       idbloader.img flash.bin flash.log defconfig
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index a94803ee93..1f14e2dab5 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -102,6 +102,8 @@ static void initialize_dram_values(void)
 	int i;
 
 	debug("SPL: Setting mx28 board specific SDRAM parameters\n");
+	for (i = 0; i < ARRAY_SIZE(mxs_dram_vals); i++)
+		mxs_dram_vals[i] = readl(MXS_DRAM_BASE + (4 * i));
 	mxs_adjust_memory_params(mxs_dram_vals);
 
 	debug("SPL: Applying SDRAM parameters\n");
@@ -316,9 +318,30 @@ static void mx28_mem_init(void)
 
 	debug("SPL: Initialising mx28 SDRAM Controller\n");
 
-	/* Set DDR2 mode */
-	writel(PINCTRL_EMI_DS_CTRL_DDR_MODE_DDR2,
-		&pinctrl_regs->hw_pinctrl_emi_ds_ctrl_set);
+#ifndef CONFIG_SYS_MXS_mDDR
+ 	/* Set DDR2 mode */
+ 	writel(PINCTRL_EMI_DS_CTRL_DDR_MODE_DDR2,
+ 		&pinctrl_regs->hw_pinctrl_emi_ds_ctrl_set);
+#else
+	/* Set mDDR mode */
+	writel(PINCTRL_EMI_DS_CTRL_DDR_MODE_mDDR,
+ 		&pinctrl_regs->hw_pinctrl_emi_ds_ctrl_set);
+
+	writel(	PINCTRL_EMI_DS_CTRL_ADDRESS_MA_MASK |
+		PINCTRL_EMI_DS_CTRL_CONTROL_MA_MASK |
+		PINCTRL_EMI_DS_CTRL_DUALPAD_MA_MASK |
+		PINCTRL_EMI_DS_CTRL_SLICE3_MA_MASK |
+		PINCTRL_EMI_DS_CTRL_SLICE2_MA_MASK |
+		PINCTRL_EMI_DS_CTRL_SLICE1_MA_MASK |
+		PINCTRL_EMI_DS_CTRL_SLICE0_MA_MASK,
+	 &pinctrl_regs->hw_pinctrl_emi_ds_ctrl);
+
+	/* Configure Pins 0-15 as EMI pins */
+	writel(0, &pinctrl_regs->hw_pinctrl_muxsel10);
+	writel(0, &pinctrl_regs->hw_pinctrl_muxsel11);
+	writel(0, &pinctrl_regs->hw_pinctrl_muxsel12);
+	writel(0, &pinctrl_regs->hw_pinctrl_muxsel13);
+#endif
 
 	/*
 	 * Configure the DRAM registers
diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd
index c60615a456..faf0dc1e91 100644
--- a/arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd
+++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd
@@ -1,3 +1,8 @@
+options {
+	driveTag = 0x00;
+	flags = 0x01;
+}
+
 sources {
 	u_boot_spl="spl/u-boot-spl.bin";
 	u_boot="u-boot.bin";
@@ -5,7 +10,7 @@ sources {
 
 section (0) {
 	load u_boot_spl > 0x0000;
-	load ivt (entry = 0x0014) > 0x8000;
+	load ivt (entry = 0x0044) > 0x8000;
 	hab call 0x8000;
 
 	load u_boot > 0x40000100;
diff --git a/arch/arm/mach-imx/mxs/Kconfig b/arch/arm/mach-imx/mxs/Kconfig
index b90d7b6e41..40bd77fe89 100644
--- a/arch/arm/mach-imx/mxs/Kconfig
+++ b/arch/arm/mach-imx/mxs/Kconfig
@@ -63,16 +63,25 @@ config TARGET_TS4600
 config TARGET_XEA
 	bool "Support XEA"
 
+config TARGET_BMW
+	bool "Support BMW"
+	select BOARD_EARLY_INIT_F
+
 endchoice
 
 config SYS_SOC
 	default "mxs"
 
+config SYS_MXS_mDDR
+	bool
+	default y
+
 source "board/bluegiga/apx4devkit/Kconfig"
 source "board/freescale/mx28evk/Kconfig"
 source "board/liebherr/xea/Kconfig"
 source "board/ppcag/bg0900/Kconfig"
 source "board/schulercontrol/sc_sps_1/Kconfig"
 source "board/technologic/ts4600/Kconfig"
+source "board/bmw/bmw/Kconfig"
 
 endif
diff --git a/board/bmw/bmw/Makefile b/board/bmw/bmw/Makefile
index 24ef643c83..d65b4c43b1 100644
--- a/board/bmw/bmw/Makefile
+++ b/board/bmw/bmw/Makefile
@@ -1,5 +1,5 @@
 ifndef	CONFIG_SPL_BUILD
 obj-y	:= bmw.o
 else
-obj-y	:= iomux.o
-endif
\ No newline at end of file
+obj-y	:= spl_boot.o
+endif
diff --git a/configs/bmw_defconfig b/configs/bmw_defconfig
index 15e7c4eb41..d06f5284ce 100644
--- a/configs/bmw_defconfig
+++ b/configs/bmw_defconfig
@@ -1,35 +1,54 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX28=y
 CONFIG_SYS_TEXT_BASE=0x40002000
-#CONFIG_SPL_GPIO_SUPPORT=y
-#CONFIG_SPL_LIBCOMMON_SUPPORT=y
-#CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x4000
 CONFIG_ENV_OFFSET=0x40000
 CONFIG_TARGET_BMW=y
-#CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
-#CONFIG_SPL=y
-#CONFIG_SPL_TEXT_BASE=0x00001000
 CONFIG_FIT=y
 # CONFIG_CONSOLE_MUX is not set
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_ARCH_MISC_INIT=y
-# CONFIG_SPL_FRAMEWORK is not set
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
-CONFIG_CMD_FS_GENERIC=y
+#CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
+CONFIG_MTDIDS_DEFAULT="nor0=spi0.2"
 CONFIG_MTDPARTS_DEFAULT="spi0.0:512k(bootloader)ro,2304k(kernel),48m(rootfs),2304k(recovery),9m(recovery_fs),1536k(config),256k(bw_image_raw_data),256k(temp_image_raw_data)"
 CONFIG_MXS_GPIO=y
 CONFIG_MTD=y
-CONFIG_CONS_INDEX=0
 CONFIG_SPI=y
 CONFIG_SECURE_BOOT=y
+CONFIG_SYS_MXS_mDDR=y
+
+# Fix up vectors
+CONFIG_ARCH_MISC_INIT=y
+
+# Set up SPL
+CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0x00001000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+#CONFIG_SPL_BOARD_INIT=y
+#CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_SPL_FRAMEWORK is not set
+
+# Serial port
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_PL011_SERIAL=y
+CONFIG_CONS_INDEX=0
+
+# I don't think DEBUG_UART functions are needed
+#CONFIG_DEBUG_UART=y
+#CONFIG_DEBUG_UART_BASE=0x80074000
+#CONFIG_DEBUG_UART_CLOCK=25000000
+#CONFIG_DEBUG_UART_PL011=y
+#CONFIG_DEBUG_UART_SKIP_INIT=y
+#CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+
+
diff --git a/include/configs/bmw.h b/include/configs/bmw.h
index 02b3280eb8..c6eb3c73f1 100644
--- a/include/configs/bmw.h
+++ b/include/configs/bmw.h
@@ -3,12 +3,19 @@
 
 #include <linux/sizes.h>
 
+#define DEBUG
+
 /* System configurations */
 #define CONFIG_MACH_TYPE	MACH_TYPE_MX28EVK
 
+// /* SPL */
+// #define CONFIG_SPL_STACK		0x20000
+
+// #define CONFIG_SYS_SPL_ARGS_ADDR	0x44000000
+
 /* Memory configuration */
 #define PHYS_SDRAM_1			0x40000000	/* Base address */
-#define PHYS_SDRAM_1_SIZE		0x40000000	/* Max 1 GB RAM */
+#define PHYS_SDRAM_1_SIZE		0x08000000	/* Max 128 MB RAM */
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
 
 /* Environment */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index fe9a1971cc..9b87fe7974 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -3179,6 +3179,7 @@ CONFIG_SYS_MX6_HCLK
 CONFIG_SYS_MX7_CLK32
 CONFIG_SYS_MX7_HCLK
 CONFIG_SYS_MXS_VDD5V_ONLY
+CONFIG_SYS_MXS_mDDR
 CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
 CONFIG_SYS_NAND_4_ADDR_CYCLE
 CONFIG_SYS_NAND_5_ADDR_CYCLE