6502 16-Bit Vector Extension

v16.txt

# 6502 16-bit vector extension
(The opcodes of this extension are choosen with the w65c02 in mind)
This extension is designed to speed up 2-D vector and memory operations.

## Registers
This extension adds one single SIMD register:

### V
A 16-bit general purpose register.

## Instructions
This extension adds numerous instructions related to the `V` register.

### LDV
Loads a 16-bit location at the given memory address into the `V` register (little endian).

Addressing modes:
- `a,x`  absolute indexed with `X`    0x23    6-8 cycles
- `a,y`  absolute indexed with `Y`    0x33    6-8 cycles
- `a`    absolute                     0x42    6-7 cycles
- `zp`   zero page                    0x43    4   cycles

### STV
Stores the value of the `V` register into a 16-bit memory location (little endian).

Addressing modes:
- `a,x`  absolute indexed with `X`    0x02    6-8 cycles
- `a,y`  absolute indexed with `Y`    0x03    6-8 cycles
- `a`    absolute                     0x13    6-7 cycles
- `zp`   zero page                    0x22    4   cycles

### TVL
Moves the value of the `A` register into the low byte of the `V` register.

Addressing modes:
- `i`    implied                      0x44    2   cycles

### TVH
Moves the value of the `A` register into the high byte of the `V` register.

Addressing modes:
- `i`    implied                      0x53    2   cycles

### TLV
Moves the low byte of the `V` register into `A` register.

Addressing modes:
- `i`    implied                      0x62    2   cycles

### THV
Moves the high byte of the `V` register into `A` register.

Addressing modes:
- `i`    implied                      0x63    2   cycles

### SWV
Swaps the high and low byte in `V`

Addressing modes:
- `i`    implied                      0x54    3   cycles

### ADV
Adds the value of `V` with a 16-bit memory location (little endian) and carry into `V`.

Addressing modes:
- `a,x`  absolute indexed with `X`    0x73    8-9 cycles
- `a,y`  absolute indexed with `Y`    0x82    8-9 cycles
- `a`    absolute                     0x83    8   cycles
- `zp`   zero page                    0x93    5   cycles

### ADP
Adds the low byte of `V` with the low byte of a 16-bit memory location (little endian) and carry into the low byte of `V` and the high byte of that location with carry into the high byte of `V`

Addressing modes:
- `a,x`  absolute indexed with `X`    0xA3    8-9 cycles
- `a,y`  absolute indexed with `Y`    0xB3    8-9 cycles
- `a`    absolute                     0xC2    8   cycles
- `zp`   zero page                    0xC3    5   cycles

### CPV
Compares the `V` register to a 16-bit memory location.

Addressing modes:
- `a,x`  absolute indexed with `X`    0xD3    8-9 cycles
- `a,y`  absolute indexed with `Y`    0xD4    8-9 cycles
- `a`    absolute                     0xE2    8   cycles
- `zp`   zero page                    0xE3    5   cycles

### CLV
Compares the low byte of the `V` register with the `A` register

Addressing modes:
- `i`    implied                      0xF3    2   cycles

### CHV
Compares the high byte of the `V` register with the `A` register

Addressing modes:
- `i`    implied                      0xF4    2   cycles

### IXX
Increments the `X` register by two.

Addressing modes:
- `i`    implied                      0x0B    2   cycles

### IYY
Increments the `Y` register by two.

Addressing modes:
- `i`    implied                      0x1B    2   cycles

### MX2
Multiplies the `X` register by two.

Addressing modes:
- `i`    implied                      0x7B    2   cycles