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.set DEVICE = 2313
.set CHAR_DELAY = 244
.set LINE_DELAY = 488
.equ CONF_N = 8
.equ CONF_F = 0 //4
.equ CONF_D = 4
.equ CONF_C = 0 //2
.equ CONF_B = 0 //1
.equ CONF_ID = 2
.equ CONF_SH = 0 //1
.equ FREQ = 1 // In MHz
.def Rtowrite8 = R16
.def Rtowrite4 = R17
.def Rseqlength = R18
.def RInttimer0 = R19
.def RInttimer1 = R20
.def RLine = R21
.def RCharDelay = R22
.def RLED = R23
// Use R17
.macro SET_T1
ldi R17, High(- @0 )
out TCNT1H, R17
ldi R17, Low(- @0 )
out TCNT1L, R17
.endm
.macro SET_T1_F
out TCNT1H, @0
out TCNT1L, @1
.endm
.macro LOAD_TW
ldi R17, High(- @0 )
mov @1, R17
ldi R17, Low(- @0 )
mov @2, R17
.endm
// Mem start
rjmp Start
// Interrupts
.org 0x0005
rjmp ITimer1_OVF
.org 0x0006
rjmp ITimer0_OVF
// Main program
.org 0x0007
.include "msg-couple.inc"
//.include "msg-rel-elders.inc"
//.include "msg-rel-youngers.inc"
//.include "msg-rel-elder-1.inc"
//.include "msg-single.inc"
.include "hal.inc"
ITimer0_OVF:
cli
push R16
in R16, SREG
push R16
push R17
tst RLED
breq ITimer0_OVF_0
clr RLED
rjmp ITimer0_OVF_1
ITimer0_OVF_0:
// Change state
ser RLED
in R16, PORTA
ldi R17, 0x03
eor R16, R17
out PORTA, R16
ITimer0_OVF_1:
pop R17
pop R16
out SREG, R16
pop R16
sei
reti
// Timer1 overflow routine
// Use R0 (counter), R1-R2 (period)
ITimer1_OVF:
cli
push R16
in R16, SREG
push R16
dec R0
brne ITimer1_OVF_0
// Switch off
in R16, TIMSK_1
cbr R16, (1 << TOIE1)
out TIMSK_1, R16
rjmp ITimer1_OVF_out
ITimer1_OVF_0:
SET_T1_F R1, R2
ITimer1_OVF_out:
pop R16
out SREG, R16
pop R16
sei
reti
CInitSequence:
.db 0x32, (0x20 | CONF_N | CONF_F), \
(0x08 | CONF_D | CONF_C | CONF_B), (0x04 | CONF_ID | CONF_SH), 0x1
.equ CInitLength = 5
// Write 4 bits to LCD
// Use R17, R19, R20, T
Write4: // R17 to write, T if data
clr RInttimer1
ldi RInttimer0, 5
andi Rtowrite4, 0xF0
brtc Write4_0
ori Rtowrite4, 0x1
Write4_0:
out PORT_LCD, Rtowrite4
sbi PORT_LCD, 2
rcall SuperShortDelay
cbi PORT_LCD, 2
ldi RInttimer1, 3
rcall LongDelay
ret
// Use R16, R17, R19, R20, T
WriteDisplay: // R16 to write, T if data
mov Rtowrite4,Rtowrite8
rcall Write4
mov Rtowrite4,Rtowrite8
swap Rtowrite4
rcall Write4
ret
// Use R16, R17, R18, R19, R20, R30, R31, T
DispInit:
clt
ldi Rtowrite4, 0x30 // Init to 8-bit
rcall Write4
ldi ZH,High(CInitSequence*2)
ldi ZL,Low(CInitSequence*2)
ldi Rseqlength,CInitLength
clr R1
rcall FireSequence
ret
// Use R0, R1, R2, R16, R17, R18, R19, R20, R22, R23, R30, R31, T
FireSequence: // Sequence start in Z, sequence length in R18
lpm Rtowrite8, Z+
mov R23, Rtowrite8
rcall WriteDisplay
cpi R23, 0x20
breq FireSequence_0
tst R1
breq FireSequence_0
clr R0
inc R0
rcall WaitT1
FireSequence_0:
dec Rseqlength
brne FireSequence
ret
// Delay procedure, R19 delay cycles
LongDelay: // Use R19, R20
tst RInttimer1
breq LongDelayOut
dec RInttimer1
ShortDelay: // Use R19
ser RInttimer0
SuperShortDelay: // Use R19
dec RInttimer0
brne SuperShortDelay
rjmp LongDelay
LongDelayOut:
ret
// Use
WaitT1:
cli
push R16
clr R16
out TCCR1A, R16
ldi R16, 0x5
out TCCR1B, R16
in R16, TIMSK_1
ori R16, (1 << TOIE1)
out TIMSK_1, R16
SET_T1_F R1, R2
sei
WaitLineLoop:
tst R0
brne WaitLineLoop
pop R16
ret
Start:
// Init stack (Init by default)
INIT_STACK
// Init port
ser R16
out DDR_LCD, R16
out DDRD, R16
out DDRA, R16
clr R16
out PORT_LCD, R16
cbi PORTA, 0
sbi PORTA, 1
sbi PORTD, 2
// Initial delay
ldi RInttimer1, (45000 / 512) // 45ms for 1MHz
rcall LongDelay
// Init LEDs
clr R16
out TCCR0A, R16
ldi R16, 1 << CS02
out TCCR0B, R16
ldi R16, 1 << TOIE0
out TIMSK, R16
sei
rcall DispInit
// Show lines
set
ldi ZH,High(NumOfLines*2)
ldi ZL,Low(NumOfLines*2)
lpm RLine, Z
ldi ZH,High(Lines*2)
ldi ZL,Low(Lines*2)
ShowLine:
ldi Rtowrite8, 0x01 // Set address to line 1
clt
rcall WriteDisplay
set
ldi Rseqlength, 8
LOAD_TW CHAR_DELAY, R1, R2
rcall FireSequence
ldi Rtowrite8, 0xC0 // Set address to line 2
clt
rcall WriteDisplay
set
ldi Rseqlength, 8
rcall FireSequence
LOAD_TW LINE_DELAY, R1, R2
clr R0
inc R0
rcall WaitT1
dec RLine
brne ShowLine
// Go to sleep
cli
clr R16
out PORTA, R16
out PORTD, R16
out PORT_LCD, R16
out DDR_LCD, R16
out DDRD, R16
out DDRA, R16
ldi R16, (1 << SM0) | (1 << SE)
out MCUCR, R16
//meganop:
//rjmp meganop
sleep
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