Skip to content

Instantly share code, notes, and snippets.

@altercation
Last active August 29, 2015 14:06
Show Gist options
  • Star 0 You must be signed in to star a gist
  • Fork 0 You must be signed in to fork a gist
  • Save altercation/376510d6db1b97a5e5ee to your computer and use it in GitHub Desktop.
Save altercation/376510d6db1b97a5e5ee to your computer and use it in GitHub Desktop.
surface pro 3 - power button not detected bug - ACPI DSDT decompiled (no edits)
f/*
* Intel ACPI Component Architecture
* AML Disassembler version 20140724-64 [Aug 2 2014]
* Copyright (c) 2000 - 2014 Intel Corporation
*
* Disassembly of dsdt.dat, Wed Sep 3 01:32:31 2014
*
* Original Table Header:
* Signature "DSDT"
* Length 0x0000D003 (53251)
* Revision 0x02
* Checksum 0x51
* OEM ID "OEMC"
* OEM Table ID "O E M C "
* OEM Revision 0x00000300 (768)
* Compiler ID "INTL"
* Compiler Version 0x20120913 (538052883)
*/
DefinitionBlock ("dsdt.aml", "DSDT", 2, "OEMC", "O E M C ", 0x00000300)
{
/*
* iASL Warning: There were 10 external control methods found during
* disassembly, but additional ACPI tables to resolve these externals
* were not specified. This resulting disassembler output file may not
* compile because the disassembler did not know how many arguments
* to assign to these methods. To specify the tables needed to resolve
* external control method references, the -e option can be used to
* specify the filenames. Example iASL invocations:
* iasl -e ssdt1.aml ssdt2.aml ssdt3.aml -d dsdt.aml
* iasl -e dsdt.aml ssdt2.aml -d ssdt1.aml
* iasl -e ssdt*.aml -d dsdt.aml
*
* In addition, the -fe option can be used to specify a file containing
* control method external declarations with the associated method
* argument counts. Each line of the file must be of the form:
* External (<method pathname>, MethodObj, <argument count>)
* Invocation:
* iasl -fe refs.txt -d dsdt.aml
*
* The following methods were unresolved and many not compile properly
* because the disassembler had to guess at the number of arguments
* required for each:
*/
External (_SB_.PCI0.GFX0.GSCI, MethodObj) // Warning: Unresolved method, guessing 0 arguments
External (_SB_.PCI0.PAUD.PUAM, MethodObj) // Warning: Unresolved method, guessing 0 arguments
External (_SB_.PCI0.PEG0.HPME, MethodObj) // Warning: Unresolved method, guessing 0 arguments
External (_SB_.PCI0.PEG0.PEGP.EPON, MethodObj) // Warning: Unresolved method, guessing 0 arguments
External (_SB_.PCI0.PEG1.HPME, MethodObj) // Warning: Unresolved method, guessing 0 arguments
External (_SB_.PCI0.PEG2.HPME, MethodObj) // Warning: Unresolved method, guessing 0 arguments
External (_SB_.PCI0.RP05.PEGP.EPON, MethodObj) // Warning: Unresolved method, guessing 0 arguments
External (_SB_.PCI0.XHC_.DUAM, MethodObj) // Warning: Unresolved method, guessing 0 arguments
External (PS0X, MethodObj) // Warning: Unresolved method, guessing 0 arguments
External (PS3X, MethodObj) // Warning: Unresolved method, guessing 0 arguments
External (_PR_.CFGD, UnknownObj)
External (_PR_.CPU0._PPC, UnknownObj)
External (_PR_.CPU0._PSS, UnknownObj)
External (_SB_.IAOE.ECTM, UnknownObj)
External (_SB_.IAOE.ITMR, UnknownObj)
External (_SB_.IAOE.PTSL, UnknownObj)
External (_SB_.IAOE.RCTM, UnknownObj)
External (_SB_.IETM, UnknownObj)
External (_SB_.PCCD, UnknownObj)
External (_SB_.PCCD.PENB, UnknownObj)
External (_SB_.PCI0.B0D3.ABAR, IntObj)
External (_SB_.PCI0.B0D3.BARA, UnknownObj)
External (_SB_.PCI0.GFX0.CLID, UnknownObj)
External (_SB_.PCI0.GFX0.DD1F, UnknownObj)
External (_SB_.PCI0.GFX0.GSSE, UnknownObj)
External (_SB_.PCI0.P0P1, UnknownObj)
External (_SB_.PCI0.PEG0, UnknownObj)
External (_SB_.PCI0.PEG0.PEGP, UnknownObj)
External (_SB_.PCI0.PEG1, UnknownObj)
External (_SB_.PCI0.PEG2, UnknownObj)
External (ACMU, UnknownObj)
External (ALSE, UnknownObj)
External (D1F0, UnknownObj)
External (D1F1, UnknownObj)
External (D1F2, UnknownObj)
External (DIDX, UnknownObj)
External (GSMI, UnknownObj)
External (LHIH, UnknownObj)
External (LLOW, UnknownObj)
External (MDBG, IntObj)
External (PDC0, UnknownObj)
External (PDC1, UnknownObj)
External (PDC2, UnknownObj)
External (PDC3, UnknownObj)
External (PDC4, UnknownObj)
External (PDC5, UnknownObj)
External (PDC6, UnknownObj)
External (PDC7, UnknownObj)
External (SB__.ADFU, UnknownObj)
External (SB__.IADP, UnknownObj)
External (SGMD, UnknownObj)
Name (PEBS, 0xE0000000)
Name (LAPB, 0xFEE00000)
Name (PELN, 0x10000000)
Name (MCHB, 0xFED10000)
Name (MCHL, 0x8000)
Name (EGPB, 0xFED19000)
Name (EGPL, 0x1000)
Name (DMIB, 0xFED18000)
Name (DMIL, 0x1000)
Name (VTDS, 0xFED90000)
Name (VTDL, 0x4000)
Name (CPVD, Zero)
Name (SMBS, 0x0580)
Name (SMBL, 0x20)
Name (SRCB, 0xFED1C000)
Name (SRCL, 0x4000)
Name (GPBS, 0x1C00)
Name (GPLN, 0x0400)
Name (APCB, 0xFEC00000)
Name (APCL, 0x1000)
Name (RCRL, 0x4000)
Name (TCBR, 0xFED08000)
Name (TCLT, 0x1000)
Name (SUSW, 0xFF)
Name (PMBS, 0x1800)
Name (PMLN, 0x80)
Name (SMIP, 0xB2)
Name (PM30, 0x1830)
Name (HPTB, 0xFED00000)
Name (HPTC, 0xFED1F404)
Name (SMCR, 0x1830)
Name (ASSB, Zero)
Name (AOTB, Zero)
Name (AAXB, Zero)
Name (PEHP, Zero)
Name (SHPC, Zero)
Name (PEPM, Zero)
Name (PEER, Zero)
Name (PECS, Zero)
Name (ITKE, Zero)
Name (MBEC, 0xFFFF)
Name (FMBL, One)
Name (FDTP, 0x02)
Name (FUPS, 0x03)
Name (FUWS, 0x04)
Name (FEMD, 0x05)
Name (TRTP, One)
Name (WDTE, One)
Name (TRTD, 0x02)
Name (TRTI, 0x03)
Name (PFTI, 0x04)
Name (GCDD, One)
Name (DSTA, 0x0A)
Name (DSLO, 0x0C)
Name (DSLC, 0x0E)
Name (PITS, 0x10)
Name (SBCS, 0x12)
Name (SALS, 0x13)
Name (LSSS, 0x2A)
Name (SOOT, 0x35)
Name (PDBR, 0x4D)
Name (SRSI, 0xB2)
Name (CSMI, 0x61)
Name (DSSP, Zero)
Name (FHPP, Zero)
Name (SMIA, 0xB2)
Name (SMIB, 0xB3)
Name (OFST, 0x35)
Name (TRST, 0x02)
Name (TCMF, Zero)
Name (TMF1, Zero)
Name (TMF2, Zero)
Name (TMF3, Zero)
Name (TTPF, One)
Name (TTDP, One)
Name (TPMF, Zero)
Name (VDA1, Zero)
Name (VDA2, Zero)
Name (VDA3, Zero)
Name (VIR1, 0x04)
Name (VIR2, Zero)
Name (VIR3, Zero)
Name (UID1, Zero)
Name (UID2, One)
Name (UID3, Zero)
Name (HSCS, One)
Name (SS1, Zero)
Name (SS2, Zero)
Name (SS3, Zero)
Name (SS4, One)
Name (IOST, 0x0000)
Name (TOPM, 0x00000000)
Name (ROMS, 0xFFE00000)
Name (VGAF, One)
OperationRegion (GNVS, SystemMemory, 0xABB51000, 0x02B2)
Field (GNVS, AnyAcc, Lock, Preserve)
{
OSYS, 16,
SMIF, 8,
PRM0, 8,
PRM1, 8,
SCIF, 8,
PRM2, 8,
PRM3, 8,
LCKF, 8,
PRM4, 8,
PRM5, 8,
P80D, 32,
PWRS, 8,
DBGS, 8,
THOF, 8,
ACT1, 8,
ACTT, 8,
PSVT, 8,
TC1V, 8,
TC2V, 8,
TSPV, 8,
CRTT, 8,
DTSE, 8,
DTS1, 8,
DTS2, 8,
DTSF, 8,
Offset (0x1E),
Offset (0x25),
REVN, 8,
Offset (0x28),
APIC, 8,
TCNT, 8,
PCP0, 8,
PCP1, 8,
PPCM, 8,
PPMF, 32,
C67L, 8,
NATP, 8,
CMAP, 8,
CMBP, 8,
LPTP, 8,
FDCP, 8,
CMCP, 8,
CIRP, 8,
SMSC, 8,
W381, 8,
SMC1, 8,
EMAE, 8,
EMAP, 16,
EMAL, 16,
Offset (0x42),
MEFE, 8,
DSTS, 8,
Offset (0x48),
MORD, 8,
TCGP, 8,
PPRP, 32,
PPRQ, 8,
LPPR, 8,
GTF0, 56,
GTF2, 56,
IDEM, 8,
GTF1, 56,
BID, 16,
PLID, 8,
ECTG, 8,
Offset (0x70),
OSCC, 8,
NEXP, 8,
SBV1, 8,
SBV2, 8,
Offset (0x7A),
DSEN, 8,
ECON, 8,
GPIC, 8,
CTYP, 8,
L01C, 8,
VFN0, 8,
VFN1, 8,
VFN2, 8,
VFN3, 8,
VFN4, 8,
VFN5, 8,
VFN6, 8,
VFN7, 8,
VFN8, 8,
VFN9, 8,
Offset (0x8F),
ATMC, 8,
PTMC, 8,
ATRA, 8,
PTRA, 8,
PNHM, 32,
TBAB, 32,
TBAH, 32,
RTIP, 8,
TSOD, 8,
ATPC, 8,
PTPC, 8,
PFLV, 8,
BREV, 8,
PDTS, 8,
PKGA, 8,
PAMT, 8,
AC0F, 8,
AC1F, 8,
DTS3, 8,
DTS4, 8,
Offset (0xB0),
LTR1, 8,
LTR2, 8,
LTR3, 8,
LTR4, 8,
LTR5, 8,
LTR6, 8,
LTR7, 8,
LTR8, 8,
OBF1, 8,
OBF2, 8,
OBF3, 8,
OBF4, 8,
OBF5, 8,
OBF6, 8,
OBF7, 8,
OBF8, 8,
XHCI, 8,
XTUB, 32,
XTUS, 32,
XMPB, 32,
DDRF, 8,
RTD3, 8,
PEP0, 8,
PEP3, 8,
DPTF, 8,
SADE, 8,
SACR, 8,
SAHT, 8,
PCHD, 8,
PCHC, 8,
PCHH, 8,
CTDP, 8,
LPMP, 8,
LPMV, 8,
ECEU, 8,
TGFG, 16,
MEMD, 8,
MEMC, 8,
MEMH, 8,
FND1, 8,
FND2, 8,
AMBD, 8,
AMAT, 8,
AMPT, 8,
AMCT, 8,
AMHT, 8,
SKDE, 8,
SKAT, 8,
SKPT, 8,
SKCT, 8,
SKHT, 8,
EFDE, 8,
EFAT, 8,
EFPT, 8,
EFCT, 8,
EFHT, 8,
VRDE, 8,
VRAT, 8,
VRPT, 8,
VRCT, 8,
VRHT, 8,
DPAP, 8,
DPPP, 8,
DPCP, 8,
DCMP, 8,
TRTV, 8,
LPOE, 8,
LPOP, 8,
LPOS, 8,
LPOW, 8,
LPER, 8,
PPSZ, 32,
DISE, 8,
PFMA, 64,
PFMS, 8,
PFIA, 16,
ICNF, 8,
DSP0, 32,
DSP1, 32,
NFCE, 8,
CODS, 8,
SNHE, 8,
S0ID, 8,
CTDB, 8,
Offset (0x207),
PWRE, 8,
PWRP, 8,
XHPR, 8,
SDS0, 8,
SDS1, 16,
SDS2, 8,
SDS3, 8,
SDS4, 8,
SDS5, 8,
SDS6, 8,
RIC0, 8,
PEPY, 8,
DVS0, 8,
DVS1, 8,
DVS2, 8,
DVS3, 8,
GBSX, 8,
IUBE, 8,
IUCE, 8,
IUDE, 8,
ECNO, 8,
AUDD, 16,
DSPD, 16,
IC0D, 16,
IC1D, 16,
IC1S, 16,
VRRD, 16,
PSCP, 8,
RWAG, 8,
I20D, 16,
I21D, 16,
Offset (0x231),
RCG0, 8,
ECDB, 8,
P2ME, 8,
SSH0, 16,
SSL0, 16,
SSD0, 16,
FMH0, 16,
FML0, 16,
FMD0, 16,
FPH0, 16,
FPL0, 16,
FPD0, 16,
SSH1, 16,
SSL1, 16,
SSD1, 16,
FMH1, 16,
FML1, 16,
FMD1, 16,
FPH1, 16,
FPL1, 16,
FPD1, 16,
M0C0, 16,
M1C0, 16,
M2C0, 16,
M0C1, 16,
M1C1, 16,
M2C1, 16,
M0C2, 16,
M1C2, 16,
M0C3, 16,
M1C3, 16,
M0C4, 16,
M1C4, 16,
M0C5, 16,
M1C5, 16,
TBSF, 8,
GIRQ, 32,
DMTP, 8,
DMTD, 8,
DMSH, 8,
LANP, 8,
Offset (0x27E),
SHSB, 8,
PLCS, 8,
PLVL, 16,
GN1E, 8,
G1AT, 8,
G1PT, 8,
G1CT, 8,
G1HT, 8,
GN2E, 8,
G2AT, 8,
G2PT, 8,
G2CT, 8,
G2HT, 8,
WWSD, 8,
CVSD, 8,
SSDD, 8,
INLD, 8,
IFAT, 8,
IFPT, 8,
IFCT, 8,
IFHT, 8,
DOSD, 8,
USBH, 8,
BCV4, 8,
WTV0, 8,
WTV1, 8,
APFU, 8,
SOHP, 8,
NOHP, 8,
TBSE, 8,
WKFN, 8,
PEPC, 16,
VRSD, 16,
PB1E, 8,
WAND, 8,
WWAT, 8,
WWPT, 8,
WWCT, 8,
WWHT, 8,
Offset (0x2AD),
MPLT, 16,
GR13, 8,
SPST, 8,
ECLP, 8
}
Scope (_SB)
{
Name (PRSA, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{3,4,5,6,10,11,12,14,15}
})
Alias (PRSA, PRSB)
Alias (PRSA, PRSC)
Alias (PRSA, PRSD)
Alias (PRSA, PRSE)
Alias (PRSA, PRSF)
Alias (PRSA, PRSG)
Alias (PRSA, PRSH)
Name (PR00, Package (0x24)
{
Package (0x04)
{
0x0001FFFF,
Zero,
LNKA,
Zero
},
Package (0x04)
{
0x0001FFFF,
One,
LNKB,
Zero
},
Package (0x04)
{
0x0001FFFF,
0x02,
LNKC,
Zero
},
Package (0x04)
{
0x0001FFFF,
0x03,
LNKD,
Zero
},
Package (0x04)
{
0x0003FFFF,
Zero,
LNKA,
Zero
},
Package (0x04)
{
0x0004FFFF,
Zero,
LNKA,
Zero
},
Package (0x04)
{
0x0004FFFF,
One,
LNKB,
Zero
},
Package (0x04)
{
0x0004FFFF,
0x02,
LNKC,
Zero
},
Package (0x04)
{
0x0004FFFF,
0x03,
LNKD,
Zero
},
Package (0x04)
{
0x001FFFFF,
One,
LNKD,
Zero
},
Package (0x04)
{
0x001FFFFF,
0x02,
LNKC,
Zero
},
Package (0x04)
{
0x0014FFFF,
Zero,
LNKA,
Zero
},
Package (0x04)
{
0x001DFFFF,
Zero,
LNKH,
Zero
},
Package (0x04)
{
0x001DFFFF,
One,
LNKD,
Zero
},
Package (0x04)
{
0x001DFFFF,
0x02,
LNKA,
Zero
},
Package (0x04)
{
0x001DFFFF,
0x03,
LNKC,
Zero
},
Package (0x04)
{
0x001AFFFF,
Zero,
LNKA,
Zero
},
Package (0x04)
{
0x001AFFFF,
One,
LNKF,
Zero
},
Package (0x04)
{
0x001AFFFF,
0x02,
LNKC,
Zero
},
Package (0x04)
{
0x001AFFFF,
0x03,
LNKD,
Zero
},
Package (0x04)
{
0x001BFFFF,
Zero,
LNKG,
Zero
},
Package (0x04)
{
0x0019FFFF,
Zero,
LNKE,
Zero
},
Package (0x04)
{
0x0016FFFF,
Zero,
LNKA,
Zero
},
Package (0x04)
{
0x0016FFFF,
One,
LNKD,
Zero
},
Package (0x04)
{
0x0016FFFF,
0x02,
LNKC,
Zero
},
Package (0x04)
{
0x0016FFFF,
0x03,
LNKB,
Zero
},
Package (0x04)
{
0x001CFFFF,
Zero,
LNKA,
Zero
},
Package (0x04)
{
0x001CFFFF,
One,
LNKB,
Zero
},
Package (0x04)
{
0x001CFFFF,
0x02,
LNKC,
Zero
},
Package (0x04)
{
0x001CFFFF,
0x03,
LNKD,
Zero
},
Package (0x04)
{
0x0015FFFF,
One,
LNKE,
Zero
},
Package (0x04)
{
0x0015FFFF,
0x02,
LNKF,
Zero
},
Package (0x04)
{
0x0015FFFF,
0x03,
LNKF,
Zero
},
Package (0x04)
{
0x0017FFFF,
Zero,
LNKG,
Zero
},
Package (0x04)
{
0x001FFFFF,
Zero,
LNKF,
Zero
},
Package (0x04)
{
0x001FFFFF,
0x03,
LNKA,
Zero
}
})
Name (AR00, Package (0x24)
{
Package (0x04)
{
0x0001FFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x0001FFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0x0001FFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0x0001FFFF,
0x03,
Zero,
0x13
},
Package (0x04)
{
0x0003FFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x0004FFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x0004FFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0x0004FFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0x0004FFFF,
0x03,
Zero,
0x13
},
Package (0x04)
{
0x001FFFFF,
One,
Zero,
0x13
},
Package (0x04)
{
0x001FFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0x0014FFFF,
Zero,
Zero,
0x15
},
Package (0x04)
{
0x001DFFFF,
Zero,
Zero,
0x17
},
Package (0x04)
{
0x001DFFFF,
One,
Zero,
0x13
},
Package (0x04)
{
0x001DFFFF,
0x02,
Zero,
0x10
},
Package (0x04)
{
0x001DFFFF,
0x03,
Zero,
0x12
},
Package (0x04)
{
0x001AFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x001AFFFF,
One,
Zero,
0x15
},
Package (0x04)
{
0x001AFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0x001AFFFF,
0x03,
Zero,
0x13
},
Package (0x04)
{
0x001BFFFF,
Zero,
Zero,
0x16
},
Package (0x04)
{
0x0019FFFF,
Zero,
Zero,
0x14
},
Package (0x04)
{
0x0016FFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x0016FFFF,
One,
Zero,
0x13
},
Package (0x04)
{
0x0016FFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0x0016FFFF,
0x03,
Zero,
0x11
},
Package (0x04)
{
0x001CFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x001CFFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0x001CFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0x001CFFFF,
0x03,
Zero,
0x13
},
Package (0x04)
{
0x0015FFFF,
One,
Zero,
0x14
},
Package (0x04)
{
0x0015FFFF,
0x02,
Zero,
0x15
},
Package (0x04)
{
0x0015FFFF,
0x03,
Zero,
0x15
},
Package (0x04)
{
0x0017FFFF,
Zero,
Zero,
0x16
},
Package (0x04)
{
0x001FFFFF,
Zero,
Zero,
0x15
},
Package (0x04)
{
0x001FFFFF,
0x03,
Zero,
0x10
}
})
Name (PG03, Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
LNKA,
Zero
},
Package (0x04)
{
0xFFFF,
One,
LNKB,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
LNKC,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
LNKD,
Zero
}
})
Name (AG03, Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x13
}
})
Name (PG04, Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
LNKB,
Zero
},
Package (0x04)
{
0xFFFF,
One,
LNKC,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
LNKD,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
LNKA,
Zero
}
})
Name (AG04, Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x13
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x10
}
})
Name (PG05, Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
LNKC,
Zero
},
Package (0x04)
{
0xFFFF,
One,
LNKD,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
LNKA,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
LNKB,
Zero
}
})
Name (AG05, Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x13
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x11
}
})
Name (PG0B, Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
LNKF,
Zero
},
Package (0x04)
{
0xFFFF,
One,
LNKG,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
LNKH,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
LNKE,
Zero
}
})
Name (AG0B, Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x15
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x16
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x17
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x14
}
})
Name (PG17, Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
LNKC,
Zero
},
Package (0x04)
{
0xFFFF,
One,
LNKD,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
LNKA,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
LNKB,
Zero
}
})
Name (AG17, Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x13
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x11
}
})
Name (PG18, Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
LNKA,
Zero
},
Package (0x04)
{
0xFFFF,
One,
LNKB,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
LNKC,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
LNKD,
Zero
}
})
Name (AG18, Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x13
}
})
Name (PG19, Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
LNKA,
Zero
},
Package (0x04)
{
0xFFFF,
One,
LNKB,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
LNKC,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
LNKD,
Zero
}
})
Name (AG19, Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x13
}
})
}
Scope (_SB)
{
Device (PCI0)
{
Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID
Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID
Name (_ADR, Zero) // _ADR: Address
Method (^BN00, 0, NotSerialized)
{
Return (Zero)
}
Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
{
Return (BN00 ())
}
Name (_UID, Zero) // _UID: Unique ID
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (PICM)
{
Return (AR00) /* \_SB_.AR00 */
}
Return (PR00) /* \_SB_.PR00 */
}
OperationRegion (HBUS, PCI_Config, Zero, 0x0100)
Field (HBUS, DWordAcc, NoLock, Preserve)
{
Offset (0x40),
EPEN, 1,
, 11,
EPBR, 20,
Offset (0x48),
MHEN, 1,
, 14,
MHBR, 17,
Offset (0x50),
GCLK, 1,
Offset (0x54),
D0EN, 1,
D1F2, 1,
D1F1, 1,
D1F0, 1,
Offset (0x60),
PXEN, 1,
PXSZ, 2,
, 23,
PXBR, 6,
Offset (0x68),
DIEN, 1,
, 11,
DIBR, 20,
Offset (0x70),
, 20,
MEBR, 12,
Offset (0x80),
, 4,
PM0H, 2,
Offset (0x81),
PM1L, 2,
, 2,
PM1H, 2,
Offset (0x82),
PM2L, 2,
, 2,
PM2H, 2,
Offset (0x83),
PM3L, 2,
, 2,
PM3H, 2,
Offset (0x84),
PM4L, 2,
, 2,
PM4H, 2,
Offset (0x85),
PM5L, 2,
, 2,
PM5H, 2,
Offset (0x86),
PM6L, 2,
, 2,
PM6H, 2,
Offset (0x87),
Offset (0xA8),
, 20,
TUUD, 19,
Offset (0xBC),
, 20,
TLUD, 12,
Offset (0xC8),
, 7,
HTSE, 1
}
OperationRegion (MCHT, SystemMemory, 0xFED10000, 0x1100)
Name (BUF0, ResourceTemplate ()
{
WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
0x0000, // Granularity
0x0000, // Range Minimum
0x00FF, // Range Maximum
0x0000, // Translation Offset
0x0100, // Length
,, _Y00)
DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
0x00000000, // Granularity
0x00000000, // Range Minimum
0x00000CF7, // Range Maximum
0x00000000, // Translation Offset
0x00000CF8, // Length
,, , TypeStatic)
IO (Decode16,
0x0CF8, // Range Minimum
0x0CF8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
0x00000000, // Granularity
0x00000D00, // Range Minimum
0x0000FFFF, // Range Maximum
0x00000000, // Translation Offset
0x0000F300, // Length
,, , TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000A0000, // Range Minimum
0x000BFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00020000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000C0000, // Range Minimum
0x000C3FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y01, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000C4000, // Range Minimum
0x000C7FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y02, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000C8000, // Range Minimum
0x000CBFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y03, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000CC000, // Range Minimum
0x000CFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y04, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000D0000, // Range Minimum
0x000D3FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y05, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000D4000, // Range Minimum
0x000D7FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y06, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000D8000, // Range Minimum
0x000DBFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y07, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000DC000, // Range Minimum
0x000DFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y08, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000E0000, // Range Minimum
0x000E3FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y09, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000E4000, // Range Minimum
0x000E7FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y0A, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000E8000, // Range Minimum
0x000EBFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y0B, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000EC000, // Range Minimum
0x000EFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y0C, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000F0000, // Range Minimum
0x000FFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00010000, // Length
,, _Y0D, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
0x00000000, // Granularity
0xFED40000, // Range Minimum
0xFED44FFF, // Range Maximum
0x00000000, // Translation Offset
0x00005000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x00000000, // Range Minimum
0xFEAFFFFF, // Range Maximum
0x00000000, // Translation Offset
0xFEB00000, // Length
,, _Y0E, AddressRangeMemory, TypeStatic)
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
CreateWordField (BUF0, \_SB.PCI0._Y00._MAX, PBMX) // _MAX: Maximum Base Address
Store (Subtract (ShiftRight (PELN, 0x14), 0x02), PBMX) /* \_SB_.PCI0._CRS.PBMX */
CreateWordField (BUF0, \_SB.PCI0._Y00._LEN, PBLN) // _LEN: Length
Store (Subtract (ShiftRight (PELN, 0x14), One), PBLN) /* \_SB_.PCI0._CRS.PBLN */
If (PM1L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y01._LEN, C0LN) // _LEN: Length
Store (Zero, C0LN) /* \_SB_.PCI0._CRS.C0LN */
}
If (LEqual (PM1L, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y01._RW, C0RW) // _RW_: Read-Write Status
Store (Zero, C0RW) /* \_SB_.PCI0._CRS.C0RW */
}
If (PM1H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y02._LEN, C4LN) // _LEN: Length
Store (Zero, C4LN) /* \_SB_.PCI0._CRS.C4LN */
}
If (LEqual (PM1H, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y02._RW, C4RW) // _RW_: Read-Write Status
Store (Zero, C4RW) /* \_SB_.PCI0._CRS.C4RW */
}
If (PM2L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y03._LEN, C8LN) // _LEN: Length
Store (Zero, C8LN) /* \_SB_.PCI0._CRS.C8LN */
}
If (LEqual (PM2L, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y03._RW, C8RW) // _RW_: Read-Write Status
Store (Zero, C8RW) /* \_SB_.PCI0._CRS.C8RW */
}
If (PM2H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y04._LEN, CCLN) // _LEN: Length
Store (Zero, CCLN) /* \_SB_.PCI0._CRS.CCLN */
}
If (LEqual (PM2H, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y04._RW, CCRW) // _RW_: Read-Write Status
Store (Zero, CCRW) /* \_SB_.PCI0._CRS.CCRW */
}
If (PM3L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y05._LEN, D0LN) // _LEN: Length
Store (Zero, D0LN) /* \_SB_.PCI0._CRS.D0LN */
}
If (LEqual (PM3L, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y05._RW, D0RW) // _RW_: Read-Write Status
Store (Zero, D0RW) /* \_SB_.PCI0._CRS.D0RW */
}
If (PM3H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y06._LEN, D4LN) // _LEN: Length
Store (Zero, D4LN) /* \_SB_.PCI0._CRS.D4LN */
}
If (LEqual (PM3H, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y06._RW, D4RW) // _RW_: Read-Write Status
Store (Zero, D4RW) /* \_SB_.PCI0._CRS.D4RW */
}
If (PM4L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y07._LEN, D8LN) // _LEN: Length
Store (Zero, D8LN) /* \_SB_.PCI0._CRS.D8LN */
}
If (LEqual (PM4L, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y07._RW, D8RW) // _RW_: Read-Write Status
Store (Zero, D8RW) /* \_SB_.PCI0._CRS.D8RW */
}
If (PM4H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y08._LEN, DCLN) // _LEN: Length
Store (Zero, DCLN) /* \_SB_.PCI0._CRS.DCLN */
}
If (LEqual (PM4H, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y08._RW, DCRW) // _RW_: Read-Write Status
Store (Zero, DCRW) /* \_SB_.PCI0._CRS.DCRW */
}
If (PM5L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y09._LEN, E0LN) // _LEN: Length
Store (Zero, E0LN) /* \_SB_.PCI0._CRS.E0LN */
}
If (LEqual (PM5L, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y09._RW, E0RW) // _RW_: Read-Write Status
Store (Zero, E0RW) /* \_SB_.PCI0._CRS.E0RW */
}
If (PM5H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y0A._LEN, E4LN) // _LEN: Length
Store (Zero, E4LN) /* \_SB_.PCI0._CRS.E4LN */
}
If (LEqual (PM5H, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y0A._RW, E4RW) // _RW_: Read-Write Status
Store (Zero, E4RW) /* \_SB_.PCI0._CRS.E4RW */
}
If (PM6L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y0B._LEN, E8LN) // _LEN: Length
Store (Zero, E8LN) /* \_SB_.PCI0._CRS.E8LN */
}
If (LEqual (PM6L, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y0B._RW, E8RW) // _RW_: Read-Write Status
Store (Zero, E8RW) /* \_SB_.PCI0._CRS.E8RW */
}
If (PM6H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y0C._LEN, ECLN) // _LEN: Length
Store (Zero, ECLN) /* \_SB_.PCI0._CRS.ECLN */
}
If (LEqual (PM6H, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y0C._RW, ECRW) // _RW_: Read-Write Status
Store (Zero, ECRW) /* \_SB_.PCI0._CRS.ECRW */
}
If (PM0H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y0D._LEN, F0LN) // _LEN: Length
Store (Zero, F0LN) /* \_SB_.PCI0._CRS.F0LN */
}
If (LEqual (PM0H, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y0D._RW, F0RW) // _RW_: Read-Write Status
Store (Zero, F0RW) /* \_SB_.PCI0._CRS.F0RW */
}
CreateDWordField (BUF0, \_SB.PCI0._Y0E._MIN, M1MN) // _MIN: Minimum Base Address
CreateDWordField (BUF0, \_SB.PCI0._Y0E._MAX, M1MX) // _MAX: Maximum Base Address
CreateDWordField (BUF0, \_SB.PCI0._Y0E._LEN, M1LN) // _LEN: Length
ShiftLeft (TLUD, 0x14, M1MN) /* \_SB_.PCI0._CRS.M1MN */
Add (Subtract (M1MX, M1MN), One, M1LN) /* \_SB_.PCI0._CRS.M1LN */
Return (BUF0) /* \_SB_.PCI0.BUF0 */
}
Name (GUID, ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)
Name (SUPP, Zero)
Name (CTRL, Zero)
Name (XCNT, Zero)
Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities
{
Store (Arg3, Local0)
CreateDWordField (Local0, Zero, CDW1)
CreateDWordField (Local0, 0x04, CDW2)
CreateDWordField (Local0, 0x08, CDW3)
If (^XHC.CUID (Arg0))
{
Return (^XHC.POSC (Arg1, Arg2, Arg3))
}
Else
{
If (LGreaterEqual (OSYS, 0x07DC))
{
If (LEqual (XCNT, Zero))
{
^XHC.XSEL ()
Increment (XCNT)
}
}
}
If (LAnd (LEqual (Arg0, GUID), NEXP))
{
Store (CDW2, SUPP) /* \_SB_.PCI0.SUPP */
Store (CDW3, CTRL) /* \_SB_.PCI0.CTRL */
If (Not (And (CDW1, One)))
{
If (And (CTRL, One))
{
NHPG ()
}
If (And (CTRL, 0x04))
{
Store (0x77, DBG8) /* \DBG8 */
NPME ()
}
}
If (LNotEqual (Arg1, One))
{
Or (CDW1, 0x08, CDW1) /* \_SB_.PCI0._OSC.CDW1 */
}
If (LNotEqual (CDW3, CTRL))
{
Or (CDW1, 0x10, CDW1) /* \_SB_.PCI0._OSC.CDW1 */
}
Store (CTRL, CDW3) /* \_SB_.PCI0._OSC.CDW3 */
Store (CTRL, OSCC) /* \OSCC */
Return (Local0)
}
Else
{
Or (CDW1, 0x04, CDW1) /* \_SB_.PCI0._OSC.CDW1 */
Return (Local0)
}
}
Method (SPTS, 1, NotSerialized)
{
Store (One, SLPX) /* \_SB_.PCI0.SLPX */
Store (One, SLPE) /* \_SB_.PCI0.SLPE */
}
Method (SWAK, 1, NotSerialized)
{
Store (Zero, SLPE) /* \_SB_.PCI0.SLPE */
}
OperationRegion (SMIE, SystemIO, PMBS, 0x04)
Field (SMIE, ByteAcc, NoLock, Preserve)
{
, 10,
RTCS, 1,
, 3,
PEXS, 1,
WAKS, 1,
Offset (0x03),
PWBT, 1,
Offset (0x04)
}
OperationRegion (SLPR, SystemIO, SMCR, 0x08)
Field (SLPR, ByteAcc, NoLock, Preserve)
{
, 4,
SLPE, 1,
, 31,
SLPX, 1,
Offset (0x08)
}
Name (PA0H, Zero)
Name (PA1H, Zero)
Name (PA1L, Zero)
Name (PA2H, Zero)
Name (PA2L, Zero)
Name (PA3H, Zero)
Name (PA3L, Zero)
Name (PA4H, Zero)
Name (PA4L, Zero)
Name (PA5H, Zero)
Name (PA5L, Zero)
Name (PA6H, Zero)
Name (PA6L, Zero)
Method (NPTS, 1, NotSerialized)
{
Store (PM0H, PA0H) /* \_SB_.PCI0.PA0H */
Store (PM1H, PA1H) /* \_SB_.PCI0.PA1H */
Store (PM1L, PA1L) /* \_SB_.PCI0.PA1L */
Store (PM2H, PA2H) /* \_SB_.PCI0.PA2H */
Store (PM2L, PA2L) /* \_SB_.PCI0.PA2L */
Store (PM3H, PA3H) /* \_SB_.PCI0.PA3H */
Store (PM3L, PA3L) /* \_SB_.PCI0.PA3L */
Store (PM4H, PA4H) /* \_SB_.PCI0.PA4H */
Store (PM4L, PA4L) /* \_SB_.PCI0.PA4L */
Store (PM5H, PA5H) /* \_SB_.PCI0.PA5H */
Store (PM5L, PA5L) /* \_SB_.PCI0.PA5L */
Store (PM6H, PA6H) /* \_SB_.PCI0.PA6H */
Store (PM6L, PA6L) /* \_SB_.PCI0.PA6L */
}
Method (NWAK, 1, NotSerialized)
{
Store (PA0H, PM0H) /* \_SB_.PCI0.PM0H */
Store (PA1H, PM1H) /* \_SB_.PCI0.PM1H */
Store (PA1L, PM1L) /* \_SB_.PCI0.PM1L */
Store (PA2H, PM2H) /* \_SB_.PCI0.PM2H */
Store (PA2L, PM2L) /* \_SB_.PCI0.PM2L */
Store (PA3H, PM3H) /* \_SB_.PCI0.PM3H */
Store (PA3L, PM3L) /* \_SB_.PCI0.PM3L */
Store (PA4H, PM4H) /* \_SB_.PCI0.PM4H */
Store (PA4L, PM4L) /* \_SB_.PCI0.PM4L */
Store (PA5H, PM5H) /* \_SB_.PCI0.PM5H */
Store (PA5L, PM5L) /* \_SB_.PCI0.PM5L */
Store (PA6H, PM6H) /* \_SB_.PCI0.PM6H */
Store (PA6L, PM6L) /* \_SB_.PCI0.PM6L */
}
Device (BR03)
{
Name (_ADR, 0x00010000) // _ADR: Address
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (PICM)
{
Return (AG03) /* \_SB_.AG03 */
}
Return (PG03) /* \_SB_.PG03 */
}
Device (D006)
{
Name (_ADR, 0xFF) // _ADR: Address
}
}
Device (BR04)
{
Name (_ADR, 0x00010001) // _ADR: Address
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (PICM)
{
Return (AG04) /* \_SB_.AG04 */
}
Return (PG04) /* \_SB_.PG04 */
}
Device (D007)
{
Name (_ADR, 0xFF) // _ADR: Address
}
}
Device (BR05)
{
Name (_ADR, 0x00010002) // _ADR: Address
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (PICM)
{
Return (AG05) /* \_SB_.AG05 */
}
Return (PG05) /* \_SB_.PG05 */
}
Device (D008)
{
Name (_ADR, 0xFF) // _ADR: Address
}
}
Device (BR0B)
{
Name (_ADR, 0x001E0000) // _ADR: Address
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (PICM)
{
Return (AG0B) /* \_SB_.AG0B */
}
Return (PG0B) /* \_SB_.PG0B */
}
Device (D00C)
{
Name (_ADR, 0xFF) // _ADR: Address
}
}
Device (D016)
{
Name (_ADR, 0x00160000) // _ADR: Address
}
Device (RP01)
{
Name (_ADR, 0x001C0000) // _ADR: Address
OperationRegion (PXCS, PCI_Config, Zero, 0x0380)
Field (PXCS, AnyAcc, NoLock, Preserve)
{
VDID, 32,
Offset (0x50),
L0SE, 1,
, 3,
LDIS, 1,
Offset (0x51),
Offset (0x52),
, 13,
LASX, 1,
Offset (0x5A),
ABPX, 1,
, 2,
PDCX, 1,
, 2,
PDSX, 1,
Offset (0x5B),
Offset (0x60),
Offset (0x62),
PSPX, 1,
Offset (0xA4),
D3HT, 2,
Offset (0xD8),
, 30,
HPEX, 1,
PMEX, 1,
Offset (0xE2),
, 2,
L23E, 1,
L23R, 1,
Offset (0x324),
, 3,
LEDM, 1
}
Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
{
Offset (0xDC),
, 30,
HPSX, 1,
PMSX, 1
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (VDID, 0xFFFFFFFF))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
Name (LTRV, Package (0x04)
{
Zero,
Zero,
Zero,
Zero
})
Name (OPTS, Zero)
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
While (One)
{
Store (ToInteger (Arg0), _T_0) /* \_SB_.PCI0.RP01._DSM._T_0 */
If (LEqual (_T_0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
{
While (One)
{
Store (ToInteger (Arg2), _T_1) /* \_SB_.PCI0.RP01._DSM._T_1 */
If (LEqual (_T_1, Zero))
{
If (LEqual (Arg1, 0x02))
{
Store (One, OPTS) /* \_SB_.PCI0.RP01.OPTS */
If (LTRE)
{
Or (OPTS, 0x40, OPTS) /* \_SB_.PCI0.RP01.OPTS */
}
If (OBFF)
{
Or (OPTS, 0x10, OPTS) /* \_SB_.PCI0.RP01.OPTS */
}
Return (OPTS) /* \_SB_.PCI0.RP01.OPTS */
}
Else
{
Return (Zero)
}
}
Else
{
If (LEqual (_T_1, 0x04))
{
If (LEqual (Arg1, 0x02))
{
If (OBFF)
{
Return (Buffer (0x10)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 /* ........ */
})
}
Else
{
Return (Buffer (0x10)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* ........ */
})
}
}
}
Else
{
If (LEqual (_T_1, 0x06))
{
If (LEqual (Arg1, 0x02))
{
If (LTRE)
{
If (LOr (LEqual (LMSL, 0xFFFFFFFF), LEqual (LNSL, 0xFFFFFFFF)))
{
If (LEqual (PCHS, One))
{
Store (0x0846, LMSL) /* \_SB_.PCI0.LMSL */
Store (0x0846, LNSL) /* \_SB_.PCI0.LNSL */
}
Else
{
If (LEqual (PCHS, 0x02))
{
Store (0x1003, LMSL) /* \_SB_.PCI0.LMSL */
Store (0x1003, LNSL) /* \_SB_.PCI0.LNSL */
}
}
}
Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,
Zero))
Store (And (LMSL, 0x03FF), Index (LTRV, One))
Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,
0x02))
Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))
Return (LTRV) /* \_SB_.PCI0.RP01.LTRV */
}
Else
{
Return (Zero)
}
}
}
}
}
Break
}
}
Break
}
Return (Buffer (One)
{
0x00 /* . */
})
}
Method (HPME, 0, Serialized)
{
If (PMSX)
{
Store (0xC8, Local0)
While (Local0)
{
Store (One, PMSX) /* \_SB_.PCI0.RP01.PMSX */
If (PMSX)
{
Decrement (Local0)
}
Else
{
Store (Zero, Local0)
}
}
}
}
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (PICM)
{
Return (AG17) /* \_SB_.AG17 */
}
Return (PG17) /* \_SB_.PG17 */
}
Device (WIFI)
{
Name (_ADR, Zero) // _ADR: Address
}
}
Device (RP02)
{
Name (_ADR, 0x001C0001) // _ADR: Address
OperationRegion (PXCS, PCI_Config, Zero, 0x0380)
Field (PXCS, AnyAcc, NoLock, Preserve)
{
VDID, 32,
Offset (0x50),
L0SE, 1,
, 3,
LDIS, 1,
Offset (0x51),
Offset (0x52),
, 13,
LASX, 1,
Offset (0x5A),
ABPX, 1,
, 2,
PDCX, 1,
, 2,
PDSX, 1,
Offset (0x5B),
Offset (0x60),
Offset (0x62),
PSPX, 1,
Offset (0xA4),
D3HT, 2,
Offset (0xD8),
, 30,
HPEX, 1,
PMEX, 1,
Offset (0xE2),
, 2,
L23E, 1,
L23R, 1,
Offset (0x324),
, 3,
LEDM, 1
}
Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
{
Offset (0xDC),
, 30,
HPSX, 1,
PMSX, 1
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (VDID, 0xFFFFFFFF))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
Name (LTRV, Package (0x04)
{
Zero,
Zero,
Zero,
Zero
})
Name (OPTS, Zero)
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
While (One)
{
Store (ToInteger (Arg0), _T_0) /* \_SB_.PCI0.RP02._DSM._T_0 */
If (LEqual (_T_0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
{
While (One)
{
Store (ToInteger (Arg2), _T_1) /* \_SB_.PCI0.RP02._DSM._T_1 */
If (LEqual (_T_1, Zero))
{
If (LEqual (Arg1, 0x02))
{
Store (One, OPTS) /* \_SB_.PCI0.RP02.OPTS */
If (LTRE)
{
Or (OPTS, 0x40, OPTS) /* \_SB_.PCI0.RP02.OPTS */
}
If (OBFF)
{
Or (OPTS, 0x10, OPTS) /* \_SB_.PCI0.RP02.OPTS */
}
Return (OPTS) /* \_SB_.PCI0.RP02.OPTS */
}
Else
{
Return (Zero)
}
}
Else
{
If (LEqual (_T_1, 0x04))
{
If (LEqual (Arg1, 0x02))
{
If (OBFF)
{
Return (Buffer (0x10)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 /* ........ */
})
}
Else
{
Return (Buffer (0x10)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* ........ */
})
}
}
}
Else
{
If (LEqual (_T_1, 0x06))
{
If (LEqual (Arg1, 0x02))
{
If (LTRE)
{
If (LOr (LEqual (LMSL, 0xFFFFFFFF), LEqual (LNSL, 0xFFFFFFFF)))
{
If (LEqual (PCHS, One))
{
Store (0x0846, LMSL) /* \_SB_.PCI0.LMSL */
Store (0x0846, LNSL) /* \_SB_.PCI0.LNSL */
}
Else
{
If (LEqual (PCHS, 0x02))
{
Store (0x1003, LMSL) /* \_SB_.PCI0.LMSL */
Store (0x1003, LNSL) /* \_SB_.PCI0.LNSL */
}
}
}
Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,
Zero))
Store (And (LMSL, 0x03FF), Index (LTRV, One))
Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,
0x02))
Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))
Return (LTRV) /* \_SB_.PCI0.RP02.LTRV */
}
Else
{
Return (Zero)
}
}
}
}
}
Break
}
}
Break
}
Return (Buffer (One)
{
0x00 /* . */
})
}
Method (HPME, 0, Serialized)
{
If (PMSX)
{
Store (0xC8, Local0)
While (Local0)
{
Store (One, PMSX) /* \_SB_.PCI0.RP02.PMSX */
If (PMSX)
{
Decrement (Local0)
}
Else
{
Store (Zero, Local0)
}
}
}
}
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (PICM)
{
Return (AG18) /* \_SB_.AG18 */
}
Return (PG18) /* \_SB_.PG18 */
}
Device (D030)
{
Name (_ADR, 0xFF) // _ADR: Address
}
}
Device (RP03)
{
Name (_ADR, 0x001C0002) // _ADR: Address
OperationRegion (PXCS, PCI_Config, Zero, 0x0380)
Field (PXCS, AnyAcc, NoLock, Preserve)
{
VDID, 32,
Offset (0x50),
L0SE, 1,
, 3,
LDIS, 1,
Offset (0x51),
Offset (0x52),
, 13,
LASX, 1,
Offset (0x5A),
ABPX, 1,
, 2,
PDCX, 1,
, 2,
PDSX, 1,
Offset (0x5B),
Offset (0x60),
Offset (0x62),
PSPX, 1,
Offset (0xA4),
D3HT, 2,
Offset (0xD8),
, 30,
HPEX, 1,
PMEX, 1,
Offset (0xE2),
, 2,
L23E, 1,
L23R, 1,
Offset (0x324),
, 3,
LEDM, 1
}
Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
{
Offset (0xDC),
, 30,
HPSX, 1,
PMSX, 1
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (VDID, 0xFFFFFFFF))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
Name (LTRV, Package (0x04)
{
Zero,
Zero,
Zero,
Zero
})
Name (OPTS, Zero)
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
While (One)
{
Store (ToInteger (Arg0), _T_0) /* \_SB_.PCI0.RP03._DSM._T_0 */
If (LEqual (_T_0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
{
While (One)
{
Store (ToInteger (Arg2), _T_1) /* \_SB_.PCI0.RP03._DSM._T_1 */
If (LEqual (_T_1, Zero))
{
If (LEqual (Arg1, 0x02))
{
Store (One, OPTS) /* \_SB_.PCI0.RP03.OPTS */
If (LTRE)
{
Or (OPTS, 0x40, OPTS) /* \_SB_.PCI0.RP03.OPTS */
}
If (OBFF)
{
Or (OPTS, 0x10, OPTS) /* \_SB_.PCI0.RP03.OPTS */
}
Return (OPTS) /* \_SB_.PCI0.RP03.OPTS */
}
Else
{
Return (Zero)
}
}
Else
{
If (LEqual (_T_1, 0x04))
{
If (LEqual (Arg1, 0x02))
{
If (OBFF)
{
Return (Buffer (0x10)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 /* ........ */
})
}
Else
{
Return (Buffer (0x10)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* ........ */
})
}
}
}
Else
{
If (LEqual (_T_1, 0x06))
{
If (LEqual (Arg1, 0x02))
{
If (LTRE)
{
If (LOr (LEqual (LMSL, 0xFFFFFFFF), LEqual (LNSL, 0xFFFFFFFF)))
{
If (LEqual (PCHS, One))
{
Store (0x0846, LMSL) /* \_SB_.PCI0.LMSL */
Store (0x0846, LNSL) /* \_SB_.PCI0.LNSL */
}
Else
{
If (LEqual (PCHS, 0x02))
{
Store (0x1003, LMSL) /* \_SB_.PCI0.LMSL */
Store (0x1003, LNSL) /* \_SB_.PCI0.LNSL */
}
}
}
Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,
Zero))
Store (And (LMSL, 0x03FF), Index (LTRV, One))
Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,
0x02))
Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))
Return (LTRV) /* \_SB_.PCI0.RP03.LTRV */
}
Else
{
Return (Zero)
}
}
}
}
}
Break
}
}
Break
}
Return (Buffer (One)
{
0x00 /* . */
})
}
Method (HPME, 0, Serialized)
{
If (PMSX)
{
Store (0xC8, Local0)
While (Local0)
{
Store (One, PMSX) /* \_SB_.PCI0.RP03.PMSX */
If (PMSX)
{
Decrement (Local0)
}
Else
{
Store (Zero, Local0)
}
}
}
}
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (PICM)
{
Return (AG19) /* \_SB_.AG19 */
}
Return (PG19) /* \_SB_.PG19 */
}
Device (D031)
{
Name (_ADR, 0xFF) // _ADR: Address
}
}
Device (RP04)
{
Name (_ADR, 0x001C0003) // _ADR: Address
OperationRegion (PXCS, PCI_Config, Zero, 0x0380)
Field (PXCS, AnyAcc, NoLock, Preserve)
{
VDID, 32,
Offset (0x50),
L0SE, 1,
, 3,
LDIS, 1,
Offset (0x51),
Offset (0x52),
, 13,
LASX, 1,
Offset (0x5A),
ABPX, 1,
, 2,
PDCX, 1,
, 2,
PDSX, 1,
Offset (0x5B),
Offset (0x60),
Offset (0x62),
PSPX, 1,
Offset (0xA4),
D3HT, 2,
Offset (0xD8),
, 30,
HPEX, 1,
PMEX, 1,
Offset (0xE2),
, 2,
L23E, 1,
L23R, 1,
Offset (0x324),
, 3,
LEDM, 1
}
Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
{
Offset (0xDC),
, 30,
HPSX, 1,
PMSX, 1
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (VDID, 0xFFFFFFFF))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
Name (LTRV, Package (0x04)
{
Zero,
Zero,
Zero,
Zero
})
Name (OPTS, Zero)
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
While (One)
{
Store (ToInteger (Arg0), _T_0) /* \_SB_.PCI0.RP04._DSM._T_0 */
If (LEqual (_T_0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
{
While (One)
{
Store (ToInteger (Arg2), _T_1) /* \_SB_.PCI0.RP04._DSM._T_1 */
If (LEqual (_T_1, Zero))
{
If (LEqual (Arg1, 0x02))
{
Store (One, OPTS) /* \_SB_.PCI0.RP04.OPTS */
If (LTRE)
{
Or (OPTS, 0x40, OPTS) /* \_SB_.PCI0.RP04.OPTS */
}
If (OBFF)
{
Or (OPTS, 0x10, OPTS) /* \_SB_.PCI0.RP04.OPTS */
}
Return (OPTS) /* \_SB_.PCI0.RP04.OPTS */
}
Else
{
Return (Zero)
}
}
Else
{
If (LEqual (_T_1, 0x04))
{
If (LEqual (Arg1, 0x02))
{
If (OBFF)
{
Return (Buffer (0x10)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 /* ........ */
})
}
Else
{
Return (Buffer (0x10)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* ........ */
})
}
}
}
Else
{
If (LEqual (_T_1, 0x06))
{
If (LEqual (Arg1, 0x02))
{
If (LTRE)
{
If (LOr (LEqual (LMSL, 0xFFFFFFFF), LEqual (LNSL, 0xFFFFFFFF)))
{
If (LEqual (PCHS, One))
{
Store (0x0846, LMSL) /* \_SB_.PCI0.LMSL */
Store (0x0846, LNSL) /* \_SB_.PCI0.LNSL */
}
Else
{
If (LEqual (PCHS, 0x02))
{
Store (0x1003, LMSL) /* \_SB_.PCI0.LMSL */
Store (0x1003, LNSL) /* \_SB_.PCI0.LNSL */
}
}
}
Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,
Zero))
Store (And (LMSL, 0x03FF), Index (LTRV, One))
Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,
0x02))
Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))
Return (LTRV) /* \_SB_.PCI0.RP04.LTRV */
}
Else
{
Return (Zero)
}
}
}
}
}
Break
}
}
Break
}
Return (Buffer (One)
{
0x00 /* . */
})
}
Method (HPME, 0, Serialized)
{
If (PMSX)
{
Store (0xC8, Local0)
While (Local0)
{
Store (One, PMSX) /* \_SB_.PCI0.RP04.PMSX */
If (PMSX)
{
Decrement (Local0)
}
Else
{
Store (Zero, Local0)
}
}
}
}
}
Device (RP05)
{
Name (_ADR, 0x001C0004) // _ADR: Address
OperationRegion (PXCS, PCI_Config, Zero, 0x0380)
Field (PXCS, AnyAcc, NoLock, Preserve)
{
VDID, 32,
Offset (0x50),
L0SE, 1,
, 3,
LDIS, 1,
Offset (0x51),
Offset (0x52),
, 13,
LASX, 1,
Offset (0x5A),
ABPX, 1,
, 2,
PDCX, 1,
, 2,
PDSX, 1,
Offset (0x5B),
Offset (0x60),
Offset (0x62),
PSPX, 1,
Offset (0xA4),
D3HT, 2,
Offset (0xD8),
, 30,
HPEX, 1,
PMEX, 1,
Offset (0xE2),
, 2,
L23E, 1,
L23R, 1,
Offset (0x324),
, 3,
LEDM, 1
}
Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
{
Offset (0xDC),
, 30,
HPSX, 1,
PMSX, 1
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (VDID, 0xFFFFFFFF))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
Name (LTRV, Package (0x04)
{
Zero,
Zero,
Zero,
Zero
})
Name (OPTS, Zero)
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
While (One)
{
Store (ToInteger (Arg0), _T_0) /* \_SB_.PCI0.RP05._DSM._T_0 */
If (LEqual (_T_0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
{
While (One)
{
Store (ToInteger (Arg2), _T_1) /* \_SB_.PCI0.RP05._DSM._T_1 */
If (LEqual (_T_1, Zero))
{
If (LEqual (Arg1, 0x02))
{
Store (One, OPTS) /* \_SB_.PCI0.RP05.OPTS */
If (LTRE)
{
Or (OPTS, 0x40, OPTS) /* \_SB_.PCI0.RP05.OPTS */
}
If (OBFF)
{
Or (OPTS, 0x10, OPTS) /* \_SB_.PCI0.RP05.OPTS */
}
Return (OPTS) /* \_SB_.PCI0.RP05.OPTS */
}
Else
{
Return (Zero)
}
}
Else
{
If (LEqual (_T_1, 0x04))
{
If (LEqual (Arg1, 0x02))
{
If (OBFF)
{
Return (Buffer (0x10)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 /* ........ */
})
}
Else
{
Return (Buffer (0x10)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* ........ */
})
}
}
}
Else
{
If (LEqual (_T_1, 0x06))
{
If (LEqual (Arg1, 0x02))
{
If (LTRE)
{
If (LOr (LEqual (LMSL, 0xFFFFFFFF), LEqual (LNSL, 0xFFFFFFFF)))
{
If (LEqual (PCHS, One))
{
Store (0x0846, LMSL) /* \_SB_.PCI0.LMSL */
Store (0x0846, LNSL) /* \_SB_.PCI0.LNSL */
}
Else
{
If (LEqual (PCHS, 0x02))
{
Store (0x1003, LMSL) /* \_SB_.PCI0.LMSL */
Store (0x1003, LNSL) /* \_SB_.PCI0.LNSL */
}
}
}
Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,
Zero))
Store (And (LMSL, 0x03FF), Index (LTRV, One))
Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,
0x02))
Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))
Return (LTRV) /* \_SB_.PCI0.RP05.LTRV */
}
Else
{
Return (Zero)
}
}
}
}
}
Break
}
}
Break
}
Return (Buffer (One)
{
0x00 /* . */
})
}
Method (HPME, 0, Serialized)
{
If (PMSX)
{
Store (0xC8, Local0)
While (Local0)
{
Store (One, PMSX) /* \_SB_.PCI0.RP05.PMSX */
If (PMSX)
{
Decrement (Local0)
}
Else
{
Store (Zero, Local0)
}
}
}
}
}
Device (RP06)
{
Name (_ADR, 0x001C0005) // _ADR: Address
OperationRegion (PXCS, PCI_Config, Zero, 0x0380)
Field (PXCS, AnyAcc, NoLock, Preserve)
{
VDID, 32,
Offset (0x50),
L0SE, 1,
, 3,
LDIS, 1,
Offset (0x51),
Offset (0x52),
, 13,
LASX, 1,
Offset (0x5A),
ABPX, 1,
, 2,
PDCX, 1,
, 2,
PDSX, 1,
Offset (0x5B),
Offset (0x60),
Offset (0x62),
PSPX, 1,
Offset (0xA4),
D3HT, 2,
Offset (0xD8),
, 30,
HPEX, 1,
PMEX, 1,
Offset (0xE2),
, 2,
L23E, 1,
L23R, 1,
Offset (0x324),
, 3,
LEDM, 1
}
Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
{
Offset (0xDC),
, 30,
HPSX, 1,
PMSX, 1
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (VDID, 0xFFFFFFFF))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
Name (LTRV, Package (0x04)
{
Zero,
Zero,
Zero,
Zero
})
Name (OPTS, Zero)
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
While (One)
{
Store (ToInteger (Arg0), _T_0) /* \_SB_.PCI0.RP06._DSM._T_0 */
If (LEqual (_T_0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
{
While (One)
{
Store (ToInteger (Arg2), _T_1) /* \_SB_.PCI0.RP06._DSM._T_1 */
If (LEqual (_T_1, Zero))
{
If (LEqual (Arg1, 0x02))
{
Store (One, OPTS) /* \_SB_.PCI0.RP06.OPTS */
If (LTRE)
{
Or (OPTS, 0x40, OPTS) /* \_SB_.PCI0.RP06.OPTS */
}
If (OBFF)
{
Or (OPTS, 0x10, OPTS) /* \_SB_.PCI0.RP06.OPTS */
}
Return (OPTS) /* \_SB_.PCI0.RP06.OPTS */
}
Else
{
Return (Zero)
}
}
Else
{
If (LEqual (_T_1, 0x04))
{
If (LEqual (Arg1, 0x02))
{
If (OBFF)
{
Return (Buffer (0x10)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 /* ........ */
})
}
Else
{
Return (Buffer (0x10)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* ........ */
})
}
}
}
Else
{
If (LEqual (_T_1, 0x06))
{
If (LEqual (Arg1, 0x02))
{
If (LTRE)
{
If (LOr (LEqual (LMSL, 0xFFFFFFFF), LEqual (LNSL, 0xFFFFFFFF)))
{
If (LEqual (PCHS, One))
{
Store (0x0846, LMSL) /* \_SB_.PCI0.LMSL */
Store (0x0846, LNSL) /* \_SB_.PCI0.LNSL */
}
Else
{
If (LEqual (PCHS, 0x02))
{
Store (0x1003, LMSL) /* \_SB_.PCI0.LMSL */
Store (0x1003, LNSL) /* \_SB_.PCI0.LNSL */
}
}
}
Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,
Zero))
Store (And (LMSL, 0x03FF), Index (LTRV, One))
Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,
0x02))
Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))
Return (LTRV) /* \_SB_.PCI0.RP06.LTRV */
}
Else
{
Return (Zero)
}
}
}
}
}
Break
}
}
Break
}
Return (Buffer (One)
{
0x00 /* . */
})
}
Method (HPME, 0, Serialized)
{
If (PMSX)
{
Store (0xC8, Local0)
While (Local0)
{
Store (One, PMSX) /* \_SB_.PCI0.RP06.PMSX */
If (PMSX)
{
Decrement (Local0)
}
Else
{
Store (Zero, Local0)
}
}
}
}
}
Device (RP07)
{
Name (_ADR, 0x001C0006) // _ADR: Address
OperationRegion (PXCS, PCI_Config, Zero, 0x0380)
Field (PXCS, AnyAcc, NoLock, Preserve)
{
VDID, 32,
Offset (0x50),
L0SE, 1,
, 3,
LDIS, 1,
Offset (0x51),
Offset (0x52),
, 13,
LASX, 1,
Offset (0x5A),
ABPX, 1,
, 2,
PDCX, 1,
, 2,
PDSX, 1,
Offset (0x5B),
Offset (0x60),
Offset (0x62),
PSPX, 1,
Offset (0xA4),
D3HT, 2,
Offset (0xD8),
, 30,
HPEX, 1,
PMEX, 1,
Offset (0xE2),
, 2,
L23E, 1,
L23R, 1,
Offset (0x324),
, 3,
LEDM, 1
}
Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
{
Offset (0xDC),
, 30,
HPSX, 1,
PMSX, 1
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (VDID, 0xFFFFFFFF))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
Name (LTRV, Package (0x04)
{
Zero,
Zero,
Zero,
Zero
})
Name (OPTS, Zero)
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
While (One)
{
Store (ToInteger (Arg0), _T_0) /* \_SB_.PCI0.RP07._DSM._T_0 */
If (LEqual (_T_0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
{
While (One)
{
Store (ToInteger (Arg2), _T_1) /* \_SB_.PCI0.RP07._DSM._T_1 */
If (LEqual (_T_1, Zero))
{
If (LEqual (Arg1, 0x02))
{
Store (One, OPTS) /* \_SB_.PCI0.RP07.OPTS */
If (LTRE)
{
Or (OPTS, 0x40, OPTS) /* \_SB_.PCI0.RP07.OPTS */
}
If (OBFF)
{
Or (OPTS, 0x10, OPTS) /* \_SB_.PCI0.RP07.OPTS */
}
Return (OPTS) /* \_SB_.PCI0.RP07.OPTS */
}
Else
{
Return (Zero)
}
}
Else
{
If (LEqual (_T_1, 0x04))
{
If (LEqual (Arg1, 0x02))
{
If (OBFF)
{
Return (Buffer (0x10)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 /* ........ */
})
}
Else
{
Return (Buffer (0x10)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* ........ */
})
}
}
}
Else
{
If (LEqual (_T_1, 0x06))
{
If (LEqual (Arg1, 0x02))
{
If (LTRE)
{
If (LOr (LEqual (LMSL, 0xFFFFFFFF), LEqual (LNSL, 0xFFFFFFFF)))
{
If (LEqual (PCHS, One))
{
Store (0x0846, LMSL) /* \_SB_.PCI0.LMSL */
Store (0x0846, LNSL) /* \_SB_.PCI0.LNSL */
}
Else
{
If (LEqual (PCHS, 0x02))
{
Store (0x1003, LMSL) /* \_SB_.PCI0.LMSL */
Store (0x1003, LNSL) /* \_SB_.PCI0.LNSL */
}
}
}
Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,
Zero))
Store (And (LMSL, 0x03FF), Index (LTRV, One))
Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,
0x02))
Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))
Return (LTRV) /* \_SB_.PCI0.RP07.LTRV */
}
Else
{
Return (Zero)
}
}
}
}
}
Break
}
}
Break
}
Return (Buffer (One)
{
0x00 /* . */
})
}
Method (HPME, 0, Serialized)
{
If (PMSX)
{
Store (0xC8, Local0)
While (Local0)
{
Store (One, PMSX) /* \_SB_.PCI0.RP07.PMSX */
If (PMSX)
{
Decrement (Local0)
}
Else
{
Store (Zero, Local0)
}
}
}
}
}
Device (RP08)
{
Name (_ADR, 0x001C0007) // _ADR: Address
OperationRegion (PXCS, PCI_Config, Zero, 0x0380)
Field (PXCS, AnyAcc, NoLock, Preserve)
{
VDID, 32,
Offset (0x50),
L0SE, 1,
, 3,
LDIS, 1,
Offset (0x51),
Offset (0x52),
, 13,
LASX, 1,
Offset (0x5A),
ABPX, 1,
, 2,
PDCX, 1,
, 2,
PDSX, 1,
Offset (0x5B),
Offset (0x60),
Offset (0x62),
PSPX, 1,
Offset (0xA4),
D3HT, 2,
Offset (0xD8),
, 30,
HPEX, 1,
PMEX, 1,
Offset (0xE2),
, 2,
L23E, 1,
L23R, 1,
Offset (0x324),
, 3,
LEDM, 1
}
Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
{
Offset (0xDC),
, 30,
HPSX, 1,
PMSX, 1
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (VDID, 0xFFFFFFFF))
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
Name (LTRV, Package (0x04)
{
Zero,
Zero,
Zero,
Zero
})
Name (OPTS, Zero)
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
While (One)
{
Store (ToInteger (Arg0), _T_0) /* \_SB_.PCI0.RP08._DSM._T_0 */
If (LEqual (_T_0, ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
{
While (One)
{
Store (ToInteger (Arg2), _T_1) /* \_SB_.PCI0.RP08._DSM._T_1 */
If (LEqual (_T_1, Zero))
{
If (LEqual (Arg1, 0x02))
{
Store (One, OPTS) /* \_SB_.PCI0.RP08.OPTS */
If (LTRE)
{
Or (OPTS, 0x40, OPTS) /* \_SB_.PCI0.RP08.OPTS */
}
If (OBFF)
{
Or (OPTS, 0x10, OPTS) /* \_SB_.PCI0.RP08.OPTS */
}
Return (OPTS) /* \_SB_.PCI0.RP08.OPTS */
}
Else
{
Return (Zero)
}
}
Else
{
If (LEqual (_T_1, 0x04))
{
If (LEqual (Arg1, 0x02))
{
If (OBFF)
{
Return (Buffer (0x10)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 /* ........ */
})
}
Else
{
Return (Buffer (0x10)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* ........ */
})
}
}
}
Else
{
If (LEqual (_T_1, 0x06))
{
If (LEqual (Arg1, 0x02))
{
If (LTRE)
{
If (LOr (LEqual (LMSL, 0xFFFFFFFF), LEqual (LNSL, 0xFFFFFFFF)))
{
If (LEqual (PCHS, One))
{
Store (0x0846, LMSL) /* \_SB_.PCI0.LMSL */
Store (0x0846, LNSL) /* \_SB_.PCI0.LNSL */
}
Else
{
If (LEqual (PCHS, 0x02))
{
Store (0x1003, LMSL) /* \_SB_.PCI0.LMSL */
Store (0x1003, LNSL) /* \_SB_.PCI0.LNSL */
}
}
}
Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,
Zero))
Store (And (LMSL, 0x03FF), Index (LTRV, One))
Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,
0x02))
Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))
Return (LTRV) /* \_SB_.PCI0.RP08.LTRV */
}
Else
{
Return (Zero)
}
}
}
}
}
Break
}
}
Break
}
Return (Buffer (One)
{
0x00 /* . */
})
}
Method (HPME, 0, Serialized)
{
If (PMSX)
{
Store (0xC8, Local0)
While (Local0)
{
Store (One, PMSX) /* \_SB_.PCI0.RP08.PMSX */
If (PMSX)
{
Decrement (Local0)
}
Else
{
Store (Zero, Local0)
}
}
}
}
}
Device (SBRG)
{
Name (_ADR, 0x001F0000) // _ADR: Address
Scope (\_SB)
{
OperationRegion (PCI0.SBRG.LPC1, PCI_Config, Zero, 0x0100)
Field (PCI0.SBRG.LPC1, AnyAcc, NoLock, Preserve)
{
Offset (0x02),
CDID, 16,
Offset (0x08),
CRID, 8,
Offset (0x60),
PARC, 8,
PBRC, 8,
PCRC, 8,
PDRC, 8,
Offset (0x68),
PERC, 8,
PFRC, 8,
PGRC, 8,
PHRC, 8,
Offset (0xAC),
Offset (0xAD),
Offset (0xAE),
XUSB, 1
}
Device (LNKA)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, One) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
Or (PARC, 0x80, PARC) /* \_SB_.PARC */
}
Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings
{
Return (PRSA) /* \_SB_.PRSA */
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLA, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLA, One, IRQ0)
Store (Zero, IRQ0) /* \_SB_.LNKA._CRS.IRQ0 */
ShiftLeft (One, And (PARC, 0x0F), IRQ0) /* \_SB_.LNKA._CRS.IRQ0 */
Return (RTLA) /* \_SB_.LNKA._CRS.RTLA */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Store (Local0, PARC) /* \_SB_.PARC */
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (And (PARC, 0x80))
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKB)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x02) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
Or (PBRC, 0x80, PBRC) /* \_SB_.PBRC */
}
Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings
{
Return (PRSB) /* \_SB_.PRSB */
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLB, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLB, One, IRQ0)
Store (Zero, IRQ0) /* \_SB_.LNKB._CRS.IRQ0 */
ShiftLeft (One, And (PBRC, 0x0F), IRQ0) /* \_SB_.LNKB._CRS.IRQ0 */
Return (RTLB) /* \_SB_.LNKB._CRS.RTLB */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Store (Local0, PBRC) /* \_SB_.PBRC */
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (And (PBRC, 0x80))
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKC)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x03) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
Or (PCRC, 0x80, PCRC) /* \_SB_.PCRC */
}
Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings
{
Return (PRSC) /* \_SB_.PRSC */
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLC, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLC, One, IRQ0)
Store (Zero, IRQ0) /* \_SB_.LNKC._CRS.IRQ0 */
ShiftLeft (One, And (PCRC, 0x0F), IRQ0) /* \_SB_.LNKC._CRS.IRQ0 */
Return (RTLC) /* \_SB_.LNKC._CRS.RTLC */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Store (Local0, PCRC) /* \_SB_.PCRC */
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (And (PCRC, 0x80))
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKD)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x04) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
Or (PDRC, 0x80, PDRC) /* \_SB_.PDRC */
}
Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings
{
Return (PRSD) /* \_SB_.PRSD */
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLD, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLD, One, IRQ0)
Store (Zero, IRQ0) /* \_SB_.LNKD._CRS.IRQ0 */
ShiftLeft (One, And (PDRC, 0x0F), IRQ0) /* \_SB_.LNKD._CRS.IRQ0 */
Return (RTLD) /* \_SB_.LNKD._CRS.RTLD */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Store (Local0, PDRC) /* \_SB_.PDRC */
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (And (PDRC, 0x80))
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKE)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x05) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
Or (PERC, 0x80, PERC) /* \_SB_.PERC */
}
Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings
{
Return (PRSE) /* \_SB_.PRSE */
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLE, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLE, One, IRQ0)
Store (Zero, IRQ0) /* \_SB_.LNKE._CRS.IRQ0 */
ShiftLeft (One, And (PERC, 0x0F), IRQ0) /* \_SB_.LNKE._CRS.IRQ0 */
Return (RTLE) /* \_SB_.LNKE._CRS.RTLE */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Store (Local0, PERC) /* \_SB_.PERC */
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (And (PERC, 0x80))
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKF)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x06) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
Or (PFRC, 0x80, PFRC) /* \_SB_.PFRC */
}
Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings
{
Return (PRSF) /* \_SB_.PRSF */
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLF, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLF, One, IRQ0)
Store (Zero, IRQ0) /* \_SB_.LNKF._CRS.IRQ0 */
ShiftLeft (One, And (PFRC, 0x0F), IRQ0) /* \_SB_.LNKF._CRS.IRQ0 */
Return (RTLF) /* \_SB_.LNKF._CRS.RTLF */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Store (Local0, PFRC) /* \_SB_.PFRC */
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (And (PFRC, 0x80))
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKG)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x07) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
Or (PGRC, 0x80, PGRC) /* \_SB_.PGRC */
}
Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings
{
Return (PRSG) /* \_SB_.PRSG */
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLG, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLG, One, IRQ0)
Store (Zero, IRQ0) /* \_SB_.LNKG._CRS.IRQ0 */
ShiftLeft (One, And (PGRC, 0x0F), IRQ0) /* \_SB_.LNKG._CRS.IRQ0 */
Return (RTLG) /* \_SB_.LNKG._CRS.RTLG */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Store (Local0, PGRC) /* \_SB_.PGRC */
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (And (PGRC, 0x80))
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKH)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x08) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
Or (PHRC, 0x80, PHRC) /* \_SB_.PHRC */
}
Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings
{
Return (PRSH) /* \_SB_.PRSH */
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLH, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLH, One, IRQ0)
Store (Zero, IRQ0) /* \_SB_.LNKH._CRS.IRQ0 */
ShiftLeft (One, And (PHRC, 0x0F), IRQ0) /* \_SB_.LNKH._CRS.IRQ0 */
Return (RTLH) /* \_SB_.LNKH._CRS.RTLH */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Store (Local0, PHRC) /* \_SB_.PHRC */
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (And (PHRC, 0x80))
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
}
OperationRegion (LPC0, PCI_Config, 0x40, 0xC0)
Field (LPC0, AnyAcc, NoLock, Preserve)
{
Offset (0x40),
IOD0, 8,
IOD1, 8,
Offset (0x78),
, 6,
GR03, 2,
Offset (0x7A),
GR08, 2,
GR09, 2,
GR0A, 2,
GR0B, 2,
Offset (0x7C),
, 2,
GR19, 2,
Offset (0x80),
Offset (0xB0),
RAEN, 1,
, 13,
RCBA, 18
}
}
Device (P_EC)
{
Name (_ADR, 0x00EF0003) // _ADR: Address
Scope (\)
{
OperationRegion (DP80, SystemIO, 0x80, One)
Field (DP80, ByteAcc, NoLock, Preserve)
{
DBG8, 8
}
}
Scope (^SBRG)
{
Name (LIDS, One)
Device (LID0)
{
Name (_HID, EisaId ("PNP0C0D") /* Lid Device */) // _HID: Hardware ID
Method (_LID, 0, NotSerialized) // _LID: Lid Status
{
Return (LIDS) /* \_SB_.PCI0.SBRG.LIDS */
}
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x38,
0x03
})
}
Device (EC0)
{
Name (_HID, EisaId ("PNP0C09") /* Embedded Controller Device */) // _HID: Hardware ID
Name (_UID, One) // _UID: Unique ID
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (BFFR, ResourceTemplate ()
{
IO (Decode16,
0x0062, // Range Minimum
0x0062, // Range Maximum
0x00, // Alignment
0x01, // Length
)
IO (Decode16,
0x0066, // Range Minimum
0x0066, // Range Maximum
0x00, // Alignment
0x01, // Length
)
})
Return (BFFR) /* \_SB_.PCI0.SBRG.EC0_._CRS.BFFR */
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
Store (0x03, ^^^GFX0.CLID) /* External reference */
Return (0x0F)
}
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x38,
0x03
})
OperationRegion (ECMM, EmbeddedControl, Zero, 0x0100)
Field (ECMM, ByteAcc, Lock, Preserve)
{
VRPN, 8,
VRMA, 8,
VRMI, 8,
VRTS, 8,
Offset (0x09),
PSFL, 8,
SPFL, 8,
BTFL, 8,
EBTF, 8,
F0RM, 16,
F0DT, 8,
F1RM, 16,
F1DT, 8,
CTYF, 8,
CUTP, 8,
CRTS, 8,
PAST, 8,
ACTO, 8,
PHTP, 8,
DIMT, 8,
INLE, 8,
PANT, 8,
THOT, 8,
TTCC, 8,
BDID, 8,
RBDI, 16,
RPUI, 16,
SDRN, 8,
Offset (0x30),
LSFV, 32,
SMFV, 32,
SLSV, 32,
PNFV, 16,
PLSV, 16,
AYFV, 32,
ALSV, 32,
AGID, 32,
Offset (0x53),
B0TP, 16,
B0VL, 16,
B0CR, 16,
B0AC, 16,
B0ME, 16,
B0RS, 16,
B0RC, 16,
B0FC, 16,
B0MC, 16,
B0MV, 16,
B0ST, 16,
B0CC, 16,
B0DC, 16,
B0DV, 16,
B0SI, 16,
B0MD, 16,
B0SN, 16,
B0MN, 8,
Offset (0x81),
B0DN, 8,
Offset (0x89),
B0CM, 8,
Offset (0x8F),
B0MA, 8,
Offset (0xA3),
B1TP, 16,
B1VL, 16,
B1CR, 16,
B1AC, 16,
B1ME, 16,
B1RS, 16,
B1RC, 16,
B1FC, 16,
B1MC, 16,
B1MV, 16,
B1ST, 16,
B1CC, 16,
B1DC, 16,
B1DV, 16,
B1SI, 16,
B1MD, 16,
B1SN, 16,
B1MN, 8,
Offset (0xD1),
B1DN, 8,
Offset (0xD9),
B1CM, 8,
Offset (0xDF),
B1MA, 8,
Offset (0xF0),
POSF, 8,
B0TR, 8,
B1TR, 8,
B0WP, 8,
B0AH, 16,
B1AH, 16,
B1CP, 8,
Offset (0xFA),
DD3T, 8,
CMCM, 8,
CMD1, 8,
CMD2, 8,
CMD3, 8,
CMD4, 8
}
OperationRegion (PWRS, EmbeddedControl, 0x09, One)
Field (PWRS, ByteAcc, NoLock, Preserve)
{
ACIN, 1,
B0PT, 1,
B1PT, 1,
Offset (0x01)
}
OperationRegion (BATS, EmbeddedControl, 0x0B, 0x02)
Field (BATS, ByteAcc, NoLock, Preserve)
{
B0DG, 1,
B0CG, 1,
B0CL, 1,
, 1,
, 1,
B0FD, 1,
, 1,
Offset (0x01),
B1DG, 1,
B1CG, 1,
B1CL, 1,
, 1,
, 1,
B1FD, 1,
, 1,
Offset (0x02)
}
Method (_REG, 2, Serialized) // _REG: Region Availability
{
If (LEqual (Arg0, 0x03))
{
Store (Arg1, ECFL) /* \_SB_.PCI0.SBRG.EC0_.ECFL */
Store (ACIN, \PWRS)
PNOT ()
}
If (ECFL)
{
Notify (BAT0, 0x81) // Information Change
Notify (BAT1, 0x81) // Information Change
Notify (BAT0, 0x80) // Status Change
Notify (BAT1, 0x80) // Status Change
}
}
Name (_GPE, 0x38) // _GPE: General Purpose Events
Name (ECFL, Zero)
Method (ECAV, 0, NotSerialized)
{
Return (ECFL) /* \_SB_.PCI0.SBRG.EC0_.ECFL */
}
Method (GBTT, 1, Serialized)
{
If (ECAV ())
{
If (LEqual (Arg0, Zero))
{
Store (B0PT, Local0)
}
Else
{
Store (B1PT, Local0)
}
}
Else
{
Store (0xFF, Local0)
}
Return (Local0)
}
Method (ACAP, 0, Serialized)
{
Store (One, Local0)
If (ECAV ())
{
Return (ACIN) /* \_SB_.PCI0.SBRG.EC0_.ACIN */
}
Return (Local0)
}
Method (BCHG, 1, Serialized)
{
Store (Zero, Local0)
If (Arg0)
{
If (ECAV ())
{
If (B1CG)
{
If (B1DG)
{
Store (Zero, Local0)
}
Else
{
Store (One, Local0)
}
}
}
}
Else
{
If (ECAV ())
{
If (B0CG)
{
If (B0DG)
{
Store (Zero, Local0)
}
Else
{
Store (One, Local0)
}
}
}
}
Return (Local0)
}
Method (BIF0, 0, NotSerialized)
{
Return (One)
}
Method (BIF1, 0, Serialized)
{
If (ECAV ())
{
Store (B0DC, Local0)
And (Local0, 0xFFFF, Local0)
}
Else
{
Store (Ones, Local0)
}
Return (Local0)
}
Method (BIX1, 0, Serialized)
{
If (ECAV ())
{
Store (B1DC, Local0)
And (Local0, 0xFFFF, Local0)
}
Else
{
Store (Ones, Local0)
}
Return (Local0)
}
Method (BIF2, 0, Serialized)
{
If (ECAV ())
{
Store (B0FC, Local0)
And (Local0, 0xFFFF, Local0)
}
Else
{
Store (Ones, Local0)
}
Return (Local0)
}
Method (BIX2, 0, Serialized)
{
If (ECAV ())
{
Store (B1FC, Local0)
And (Local0, 0xFFFF, Local0)
}
Else
{
Store (Ones, Local0)
}
Return (Local0)
}
Method (BIF3, 0, NotSerialized)
{
Return (One)
}
Method (BIF4, 0, Serialized)
{
If (ECAV ())
{
Store (B0DV, Local0)
}
Else
{
Store (Ones, Local0)
}
Return (Local0)
}
Method (BIX4, 0, Serialized)
{
If (ECAV ())
{
Store (B1DV, Local0)
}
Else
{
Store (Ones, Local0)
}
Return (Local0)
}
Method (BST1, 0, Serialized)
{
Store (Ones, Local0)
If (ECAV ())
{
Store (Zero, Local0)
If (B0DG)
{
Or (Local0, One, Local0)
}
Else
{
If (B0CG)
{
Or (Local0, 0x02, Local0)
}
}
If (B0CL)
{
Or (Local0, 0x04, Local0)
}
}
Return (Local0)
}
Method (BST2, 0, Serialized)
{
Store (Ones, Local0)
If (ECAV ())
{
Store (Zero, Local0)
If (B1DG)
{
Or (Local0, One, Local0)
}
Else
{
If (B1CG)
{
Or (Local0, 0x02, Local0)
}
}
If (B1CL)
{
Or (Local0, 0x04, Local0)
}
}
Return (Local0)
}
Method (BCR1, 0, Serialized)
{
If (ECAV ())
{
Store (B0CR, Local0)
}
Else
{
Store (Ones, Local0)
}
Return (Local0)
}
Method (BCR2, 0, Serialized)
{
If (ECAV ())
{
Store (B1CR, Local0)
}
Else
{
Store (Ones, Local0)
}
Return (Local0)
}
Method (BRC1, 0, Serialized)
{
If (ECAV ())
{
Store (B0RC, Local0)
If (LEqual (Local0, 0xFFFF))
{
Store (Ones, Local0)
}
}
Else
{
Store (Ones, Local0)
}
Return (Local0)
}
Method (BRC2, 0, Serialized)
{
If (ECAV ())
{
Store (B1RC, Local0)
If (LEqual (Local0, 0xFFFF))
{
Store (Ones, Local0)
}
}
Else
{
Store (Ones, Local0)
}
Return (Local0)
}
Method (BVO1, 0, Serialized)
{
If (ECAV ())
{
Store (B0VL, Local0)
}
Else
{
Store (Ones, Local0)
}
Return (Local0)
}
Method (BVO2, 0, Serialized)
{
If (ECAV ())
{
Store (B1VL, Local0)
}
Else
{
Store (Ones, Local0)
}
Return (Local0)
}
Method (_Q00, 0, NotSerialized) // _Qxx: EC Query
{
}
Method (_Q01, 0, Serialized) // _Qxx: EC Query
{
Notify (AC0, 0x81) // Information Change
Store (One, \PWRS)
PNOT ()
}
Method (_Q02, 0, Serialized) // _Qxx: EC Query
{
Notify (AC0, 0x81) // Information Change
Store (Zero, \PWRS)
PNOT ()
}
Method (_Q07, 0, Serialized) // _Qxx: EC Query
{
Notify (BAT0, 0x04) // Device Check Light
Sleep (0x012C)
Notify (BAT0, 0x81) // Information Change
Sleep (0x012C)
}
Method (_Q08, 0, Serialized) // _Qxx: EC Query
{
Notify (BAT0, 0x04) // Device Check Light
Notify (BAT0, 0x81) // Information Change
}
Method (_Q09, 0, Serialized) // _Qxx: EC Query
{
Notify (BAT0, 0x80) // Status Change
}
Method (_Q0A, 0, Serialized) // _Qxx: EC Query
{
Notify (BAT0, 0x80) // Status Change
}
Method (_Q0B, 0, Serialized) // _Qxx: EC Query
{
Notify (BAT0, 0x80) // Status Change
}
Method (_Q0C, 0, Serialized) // _Qxx: EC Query
{
Notify (BAT0, 0x80) // Status Change
}
Method (_Q0D, 0, Serialized) // _Qxx: EC Query
{
Notify (BAT0, 0x80) // Status Change
}
Method (_Q0E, 0, Serialized) // _Qxx: EC Query
{
Notify (BAT0, 0x80) // Status Change
}
Method (_Q0F, 0, NotSerialized) // _Qxx: EC Query
{
}
Method (_Q10, 0, Serialized) // _Qxx: EC Query
{
Notify (BAT0, 0x80) // Status Change
If (LEqual (ISB2, One))
{
Notify (BAT1, 0x80) // Status Change
}
}
Name (ISB2, Zero)
Method (_Q17, 0, Serialized) // _Qxx: EC Query
{
Store (PSFL, Local0)
Store (One, ISB2) /* \_SB_.PCI0.SBRG.EC0_.ISB2 */
Notify (BAT1, Zero) // Bus Check
}
Method (_Q18, 0, Serialized) // _Qxx: EC Query
{
Store (PSFL, Local0)
Store (Zero, ISB2) /* \_SB_.PCI0.SBRG.EC0_.ISB2 */
Notify (BAT1, 0x03) // Eject Request
}
Method (_Q19, 0, Serialized) // _Qxx: EC Query
{
Store (EBTF, Local0)
If (LEqual (ISB2, One))
{
Notify (BAT1, 0x80) // Status Change
}
}
Method (_Q36, 0, Serialized) // _Qxx: EC Query
{
Store (Zero, LIDS) /* \_SB_.PCI0.SBRG.LIDS */
Store (0x36, DBG8) /* \DBG8 */
Notify (LID0, 0x80) // Status Change
}
Method (_Q37, 0, Serialized) // _Qxx: EC Query
{
Store (One, LIDS) /* \_SB_.PCI0.SBRG.LIDS */
}
Method (_Q39, 0, Serialized) // _Qxx: EC Query
{
Notify (\_TZ.TZ0, 0x80) // Thermal Status Change
Notify (\_TZ.TZ0, 0x81) // Thermal Trip Point Change
}
Method (_Q41, 0, NotSerialized) // _Qxx: EC Query
{
Store (One, \SB.IADP) /* External reference */
Notify (\SB.ADFU, Zero) // Bus Check
}
Method (_Q42, 0, NotSerialized) // _Qxx: EC Query
{
Store (Zero, \SB.IADP) /* External reference */
Notify (\SB.ADFU, Zero) // Bus Check
}
Method (_Q50, 0, NotSerialized) // _Qxx: EC Query
{
Notify (VGBI, 0xC4) // Hardware-Specific
}
Method (_Q51, 0, NotSerialized) // _Qxx: EC Query
{
Notify (VGBI, 0xC5) // Hardware-Specific
}
Method (_Q52, 0, NotSerialized) // _Qxx: EC Query
{
Notify (VGBI, 0xC0) // Hardware-Specific
}
Method (_Q53, 0, NotSerialized) // _Qxx: EC Query
{
Notify (VGBI, 0xC1) // Hardware-Specific
}
Method (_Q54, 0, NotSerialized) // _Qxx: EC Query
{
Notify (VGBI, 0xC2) // Hardware-Specific
}
Method (_Q55, 0, NotSerialized) // _Qxx: EC Query
{
Notify (VGBI, 0xC3) // Hardware-Specific
}
Method (_Q40, 0, NotSerialized) // _Qxx: EC Query
{
}
Method (_Q60, 0, NotSerialized) // _Qxx: EC Query
{
Notify (VGBI, 0xC6) // Hardware-Specific
Store (0x60, DBG8) /* \DBG8 */
}
Method (_Q61, 0, NotSerialized) // _Qxx: EC Query
{
Notify (VGBI, 0xC7) // Hardware-Specific
Store (0x61, DBG8) /* \DBG8 */
}
Method (ECPS, 1, NotSerialized)
{
}
}
}
Scope (^SBRG)
{
Device (BIND)
{
Name (_HID, "MSHW0029") // _HID: Hardware ID
Name (_CID, "PNP0C40" /* Standard Button Controller */) // _CID: Compatible ID
Method (_STA, 0, Serialized) // _STA: Status
{
Return (0x0F)
}
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
If (LEqual (Arg0, ToUUID ("dfbcf3c5-e7a5-44e6-9c1f-29c76f6e059c") /* Power Button Device */))
{
If (LEqual (Zero, ToInteger (Arg1)))
{
While (One)
{
Store (ToInteger (Arg2), _T_0) /* \_SB_.PCI0.SBRG.BIND._DSM._T_0 */
If (LEqual (_T_0, Zero))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
Else
{
If (LEqual (_T_0, One))
{
Return (0x07)
}
}
Break
}
}
}
Return (Buffer (One)
{
0x00 /* . */
})
}
}
Device (VGBI)
{
Name (_HID, "MSHW0028") // _HID: Hardware ID
Name (VBDS, Zero)
Name (ONTM, Zero)
Method (_STA, 0, Serialized) // _STA: Status
{
Return (0x0F)
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (SBFI, ResourceTemplate ()
{
I2cSerialBus (0x002D, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C0",
0x00, ResourceConsumer, ,
)
})
Return (SBFI) /* \_SB_.PCI0.SBRG.VGBI._CRS.SBFI */
}
}
}
Scope (^^PCI0)
{
Device (AC0)
{
Name (_DEP, Package (0x01) // _DEP: Dependencies
{
^SBRG.EC0
})
Name (_HID, "ACPI0003" /* Power Source Device */) // _HID: Hardware ID
Method (_PSR, 0, Serialized) // _PSR: Power Source
{
Return (^^SBRG.EC0.ACAP ())
}
Name (_PCL, Package (0x01) // _PCL: Power Consumer List
{
PCI0
})
}
Name (\ECPM, Zero)
Method (ECEN, 1, Serialized)
{
If (LEqual (DSST, One))
{
Store (Zero, ECPM) /* \ECPM */
Return (Zero)
}
If (LEqual (Arg0, One))
{
Increment (ECPM)
If (LEqual (RDGP (0x58), Zero))
{
WTGP (0x58, One)
Stall (0xFF)
}
}
Else
{
If (LEqual (ECPM, One))
{
WTGP (0x58, Zero)
Stall (0xFF)
}
Decrement (ECPM)
}
}
Device (BAT0)
{
Name (_DEP, Package (0x01) // _DEP: Dependencies
{
^SBRG.EC0
})
Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */) // _HID: Hardware ID
Name (_UID, Zero) // _UID: Unique ID
Name (_PCL, Package (0x01) // _PCL: Power Consumer List
{
PCI0
})
Name (PUNT, One)
Name (LFCC, 0x1770)
Method (_STA, 0, Serialized) // _STA: Status
{
ECEN (One)
If (LEqual (^^SBRG.EC0.GBTT (Zero), Zero))
{
ECEN (Zero)
Return (0x0F)
}
Else
{
ECEN (Zero)
Return (0x1F)
}
}
Name (NBIF, Package (0x14)
{
Zero,
Zero,
0xFFFFFFFF,
0xFFFFFFFF,
One,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
Zero,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
"",
"",
"",
""
})
Name (PBIF, Package (0x14)
{
Zero,
Zero,
0xFFFFFFFF,
0xFFFFFFFF,
One,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
Zero,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
"",
"",
"",
""
})
Method (_BIX, 0, Serialized) // _BIX: Battery Information Extended
{
ECEN (One)
P8XH (0x02, 0x73)
If (LEqual (^^SBRG.EC0.GBTT (Zero), Zero))
{
Store (0xE6, DBG8) /* \DBG8 */
ECEN (Zero)
Return (NBIF) /* \_SB_.PCI0.BAT0.NBIF */
}
If (LEqual (^^SBRG.EC0.GBTT (Zero), 0xFF))
{
Store (0xE7, DBG8) /* \DBG8 */
ECEN (Zero)
Return (NBIF) /* \_SB_.PCI0.BAT0.NBIF */
}
Store (^^SBRG.EC0.BIF0 (), Local0)
Store (^^SBRG.EC0.BIF1 (), Local1)
Store (^^SBRG.EC0.BIF2 (), Local2)
Store (^^SBRG.EC0.BIF3 (), Local3)
Store (^^SBRG.EC0.BIF4 (), Local4)
If (LNotEqual (Local0, Ones))
{
If (LNotEqual (Local1, Ones))
{
If (LNotEqual (Local2, Ones))
{
If (LNotEqual (Local3, Ones))
{
If (LNotEqual (Local4, Ones))
{
FBIF (Local0, Local1, Local2, Local3, Local4)
Store (0xAC, DBG8) /* \DBG8 */
ECEN (Zero)
Return (PBIF) /* \_SB_.PCI0.BAT0.PBIF */
}
}
}
}
}
Store (0xE8, DBG8) /* \DBG8 */
ECEN (Zero)
Return (NBIF) /* \_SB_.PCI0.BAT0.NBIF */
}
Method (_BTP, 1, Serialized) // _BTP: Battery Trip Point
{
ECEN (One)
If (^^SBRG.EC0.B0PT)
{
Store (Arg0, ^^SBRG.EC0.B0AH) /* \_SB_.PCI0.SBRG.EC0_.B0AH */
}
Else
{
Store (0x05, ^^SBRG.EC0.B0AH) /* \_SB_.PCI0.SBRG.EC0_.B0AH */
}
Store (0xAF, DBG8) /* \DBG8 */
ECEN (Zero)
}
Method (FBIF, 5, Serialized)
{
Store (Arg0, PUNT) /* \_SB_.PCI0.BAT0.PUNT */
Store (Arg1, Local1)
Store (Arg2, Local2)
Store (Arg0, Index (PBIF, One))
Store (Local1, Index (PBIF, 0x02))
Store (Local2, Index (PBIF, 0x03))
Store (Local2, LFCC) /* \_SB_.PCI0.BAT0.LFCC */
Store (Arg3, Index (PBIF, 0x04))
Store (Arg4, Index (PBIF, 0x05))
Divide (Local1, 0x0A, Local3, Local5)
Store (Local5, Index (PBIF, 0x06))
Divide (Local5, 0x03, Local3, Local6)
Store (Local6, Index (PBIF, 0x07))
ECEN (One)
Store (^^SBRG.EC0.B0CC, Index (PBIF, 0x08))
Divide (^^SBRG.EC0.B0RC, Local2, Local2, Local0)
Multiply (Local0, 0x000186A0, Local0)
Store (Local0, Index (PBIF, 0x09))
Divide (Local1, 0x64, Local3, Local7)
Store (Local7, Index (PBIF, 0x0E))
Store (Local7, Index (PBIF, 0x0F))
If (LEqual (^^SBRG.EC0.B0MN, 0x4C))
{
Store ("X863568", Index (PBIF, 0x10))
Store ("1F11", Index (PBIF, 0x11))
Store ("LION", Index (PBIF, 0x12))
Store ("LGC_LGC", Index (PBIF, 0x13))
}
Else
{
Store ("X863568", Index (PBIF, 0x10))
Store ("291E", Index (PBIF, 0x11))
Store ("LION", Index (PBIF, 0x12))
Store ("SDI", Index (PBIF, 0x13))
}
ECEN (Zero)
}
Name (PBST, Package (0x04)
{
Zero,
0x05FF,
0x146B,
0x1367
})
Name (NBST, Package (0x04)
{
Zero,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF
})
Method (_BST, 0, Serialized) // _BST: Battery Status
{
ECEN (One)
If (LEqual (^^SBRG.EC0.GBTT (Zero), Zero))
{
Store (0xE9, DBG8) /* \DBG8 */
ECEN (Zero)
Return (NBST) /* \_SB_.PCI0.BAT0.NBST */
}
If (LEqual (^^SBRG.EC0.GBTT (Zero), 0xFF))
{
Store (0xEA, DBG8) /* \DBG8 */
ECEN (Zero)
Return (NBST) /* \_SB_.PCI0.BAT0.NBST */
}
Store (^^SBRG.EC0.BST1 (), Local0)
Store (^^SBRG.EC0.BCR1 (), Local1)
Store (^^SBRG.EC0.BRC1 (), Local2)
Store (^^SBRG.EC0.BVO1 (), Local3)
If (LNotEqual (Local0, Ones))
{
If (LNotEqual (Local1, Ones))
{
If (LNotEqual (Local2, Ones))
{
If (LNotEqual (Local3, Ones))
{
FBST (Local0, Local1, Local2, Local3)
Store (0xAD, DBG8) /* \DBG8 */
ECEN (Zero)
Return (PBST) /* \_SB_.PCI0.BAT0.PBST */
}
}
}
}
Store (0xEB, DBG8) /* \DBG8 */
ECEN (Zero)
Return (NBST) /* \_SB_.PCI0.BAT0.NBST */
}
Method (FBST, 4, Serialized)
{
And (Arg1, 0xFFFF, Local1)
Store (Zero, Local0)
Store (Zero, Local3)
ECEN (One)
If (^^SBRG.EC0.ACAP ())
{
If (^^SBRG.EC0.BCHG (Zero))
{
Store (0x02, Local0)
}
Else
{
Store (Zero, Local0)
}
}
Else
{
And (Arg0, One, Local0)
}
And (Arg0, 0x04, Local2)
Or (Local0, Local2, Local0)
If (LGreaterEqual (Local1, 0x8000))
{
Subtract (0xFFFF, Local1, Local1)
}
Store (Arg2, Local2)
Store (Local0, Index (PBST, Zero))
Store (Local1, Index (PBST, One))
Store (Local2, Index (PBST, 0x02))
Store (Arg3, Index (PBST, 0x03))
ECEN (Zero)
}
}
}
Scope (^^PCI0)
{
Device (BAT1)
{
Name (_DEP, Package (0x01) // _DEP: Dependencies
{
^SBRG.EC0
})
Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */) // _HID: Hardware ID
Name (_UID, One) // _UID: Unique ID
Name (_PCL, Package (0x01) // _PCL: Power Consumer List
{
PCI0
})
Name (PUNT, One)
Name (LFCC, 0x1770)
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
{
}
Method (_STA, 0, Serialized) // _STA: Status
{
ECEN (One)
If (LEqual (^^SBRG.EC0.GBTT (One), Zero))
{
ECEN (Zero)
Return (Zero)
}
Else
{
ECEN (Zero)
Return (0x1F)
}
}
Name (NBIF, Package (0x14)
{
Zero,
Zero,
0xFFFFFFFF,
0xFFFFFFFF,
One,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
Zero,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
"",
"",
"",
""
})
Name (PBIF, Package (0x14)
{
Zero,
Zero,
0xFFFFFFFF,
0xFFFFFFFF,
One,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
Zero,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF,
"",
"",
"",
""
})
Method (_BIX, 0, Serialized) // _BIX: Battery Information Extended
{
ECEN (One)
P8XH (Zero, 0x71)
If (LEqual (^^SBRG.EC0.GBTT (One), Zero))
{
Store (0xE3, DBG8) /* \DBG8 */
ECEN (Zero)
Return (NBIF) /* \_SB_.PCI0.BAT1.NBIF */
}
If (LEqual (^^SBRG.EC0.GBTT (One), 0xFF))
{
Store (0xE4, DBG8) /* \DBG8 */
ECEN (Zero)
Return (NBIF) /* \_SB_.PCI0.BAT1.NBIF */
}
Store (^^SBRG.EC0.BIF0 (), Local0)
Store (^^SBRG.EC0.BIX1 (), Local1)
Store (^^SBRG.EC0.BIX2 (), Local2)
Store (^^SBRG.EC0.BIF3 (), Local3)
Store (^^SBRG.EC0.BIX4 (), Local4)
If (LNotEqual (Local0, Ones))
{
If (LNotEqual (Local1, Ones))
{
If (LNotEqual (Local2, Ones))
{
If (LNotEqual (Local3, Ones))
{
If (LNotEqual (Local4, Ones))
{
FBIF (Local0, Local1, Local2, Local3, Local4)
Store (0xAB, DBG8) /* \DBG8 */
ECEN (Zero)
Return (PBIF) /* \_SB_.PCI0.BAT1.PBIF */
}
}
}
}
}
Store (0xE5, DBG8) /* \DBG8 */
ECEN (Zero)
Return (NBIF) /* \_SB_.PCI0.BAT1.NBIF */
}
Method (_BTP, 1, Serialized) // _BTP: Battery Trip Point
{
ECEN (One)
If (^^SBRG.EC0.B1PT)
{
Store (Arg0, ^^SBRG.EC0.B1AH) /* \_SB_.PCI0.SBRG.EC0_.B1AH */
}
Else
{
Store (0x05, ^^SBRG.EC0.B1AH) /* \_SB_.PCI0.SBRG.EC0_.B1AH */
}
ECEN (Zero)
}
Method (FBIF, 5, Serialized)
{
Store (Arg0, PUNT) /* \_SB_.PCI0.BAT1.PUNT */
Store (Arg1, Local1)
Store (Arg2, Local2)
Store (Arg0, Index (PBIF, One))
Store (Local1, Index (PBIF, 0x02))
Store (Local2, Index (PBIF, 0x03))
Store (Local2, LFCC) /* \_SB_.PCI0.BAT1.LFCC */
Store (Arg3, Index (PBIF, 0x04))
Store (Arg4, Index (PBIF, 0x05))
Divide (Local1, 0x0A, Local3, Local5)
Store (Local5, Index (PBIF, 0x06))
Divide (Local5, 0x03, Local3, Local6)
Store (Local6, Index (PBIF, 0x07))
ECEN (One)
Store (^^SBRG.EC0.B1CC, Index (PBIF, 0x08))
Divide (^^SBRG.EC0.B1RC, Local2, Local2, Local0)
Multiply (Local0, 0x000186A0, Local0)
Store (Local0, Index (PBIF, 0x09))
Divide (Local1, 0x64, Local3, Local7)
Store (Local7, Index (PBIF, 0x0E))
Store (Local7, Index (PBIF, 0x0F))
If (LEqual (^^SBRG.EC0.B1MN, 0x4C))
{
Store ("X863568", Index (PBIF, 0x10))
Store ("1F11", Index (PBIF, 0x11))
Store ("LION", Index (PBIF, 0x12))
Store ("LGC_LGC", Index (PBIF, 0x13))
}
Else
{
Store ("X863568", Index (PBIF, 0x10))
Store ("291E", Index (PBIF, 0x11))
Store ("LION", Index (PBIF, 0x12))
Store ("SDI", Index (PBIF, 0x13))
}
ECEN (Zero)
}
Name (PBST, Package (0x04)
{
Zero,
0x05FF,
0x146B,
0x1367
})
Name (NBST, Package (0x04)
{
Zero,
0xFFFFFFFF,
0xFFFFFFFF,
0xFFFFFFFF
})
Method (_BST, 0, Serialized) // _BST: Battery Status
{
P8XH (One, 0x72)
ECEN (One)
If (LEqual (^^SBRG.EC0.GBTT (One), Zero))
{
Store (0xE0, DBG8) /* \DBG8 */
ECEN (Zero)
Return (NBST) /* \_SB_.PCI0.BAT1.NBST */
}
If (LEqual (^^SBRG.EC0.GBTT (One), 0xFF))
{
Store (0xE1, DBG8) /* \DBG8 */
ECEN (Zero)
Return (NBST) /* \_SB_.PCI0.BAT1.NBST */
}
Store (^^SBRG.EC0.BST2 (), Local0)
Store (^^SBRG.EC0.BCR2 (), Local1)
Store (^^SBRG.EC0.BRC2 (), Local2)
Store (^^SBRG.EC0.BVO2 (), Local3)
If (LNotEqual (Local0, Ones))
{
If (LNotEqual (Local1, Ones))
{
If (LNotEqual (Local2, Ones))
{
If (LNotEqual (Local3, Ones))
{
FBST (Local0, Local1, Local2, Local3)
Store (0xAA, DBG8) /* \DBG8 */
ECEN (Zero)
Return (PBST) /* \_SB_.PCI0.BAT1.PBST */
}
}
}
}
Store (0xE2, DBG8) /* \DBG8 */
ECEN (Zero)
Return (NBST) /* \_SB_.PCI0.BAT1.NBST */
}
Method (FBST, 4, Serialized)
{
And (Arg1, 0xFFFF, Local1)
Store (Zero, Local0)
Store (Zero, Local3)
ECEN (One)
If (^^SBRG.EC0.ACAP ())
{
If (^^SBRG.EC0.BCHG (One))
{
Store (0x02, Local0)
}
Else
{
Store (Zero, Local0)
}
}
Else
{
And (Arg0, One, Local0)
}
And (Arg0, 0x04, Local2)
Or (Local0, Local2, Local0)
If (LGreaterEqual (Local1, 0x8000))
{
Subtract (0xFFFF, Local1, Local1)
}
Store (Arg2, Local2)
Store (Local0, Index (PBST, Zero))
Store (Local1, Index (PBST, One))
Store (Local2, Index (PBST, 0x02))
Store (Arg3, Index (PBST, 0x03))
ECEN (Zero)
}
}
}
Scope (\_TZ)
{
ThermalZone (TZ0)
{
Name (_DEP, Package (0x01) // _DEP: Dependencies
{
\_SB.PCI0.SBRG.EC0
})
Method (_CRT, 0, NotSerialized) // _CRT: Critical Temperature
{
Return (\_SB.PCI0.SBRG.EC0.CRTS)
}
Method (_HOT, 0, NotSerialized) // _HOT: Hot Temperature
{
Return (\_SB.PCI0.SBRG.EC0.THOT)
}
Method (_TMP, 0, NotSerialized) // _TMP: Temperature
{
Return (\_SB.PCI0.SBRG.EC0.CUTP)
}
}
}
}
}
}
Scope (_GPE)
{
}
Name (_S0, Package (0x04) // _S0_: S0 System State
{
Zero,
Zero,
Zero,
Zero
})
Name (XS1, Package (0x04)
{
One,
Zero,
Zero,
Zero
})
Name (XS3, Package (0x04)
{
0x05,
Zero,
Zero,
Zero
})
Name (_S4, Package (0x04) // _S4_: S4 System State
{
0x06,
Zero,
Zero,
Zero
})
Name (_S5, Package (0x04) // _S5_: S5 System State
{
0x07,
Zero,
Zero,
Zero
})
Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep
{
If (Arg0)
{
\_SB.PCI0.NPTS (Arg0)
RPTS (Arg0)
\_SB.PCI0.SPTS (Arg0)
}
}
Method (_WAK, 1, NotSerialized) // _WAK: Wake
{
\_SB.PCI0.SWAK (Arg0)
RWAK (Arg0)
\_SB.PCI0.NWAK (Arg0)
Return (WAKP) /* \WAKP */
}
Scope (_PR)
{
Processor (CPU0, 0x01, 0x00001810, 0x06)
{
Method (_DEP, 0, NotSerialized) // _DEP: Dependencies
{
ADBG ("CPU0 DEP Call")
If (LEqual (S0ID, One))
{
ADBG ("CPU0 DEP")
Return (Package (0x01)
{
\_SB.PEPD
})
}
Else
{
ADBG ("CPU0 DEP NULL")
Return (Package (0x00) {})
}
}
}
Processor (CPU1, 0x02, 0x00001810, 0x06)
{
Method (_DEP, 0, NotSerialized) // _DEP: Dependencies
{
ADBG ("CPU1 DEP Call")
If (LEqual (S0ID, One))
{
ADBG ("CPU1 DEP")
Return (Package (0x01)
{
\_SB.PEPD
})
}
Else
{
ADBG ("CPU1 DEP NULL")
Return (Package (0x00) {})
}
}
}
Processor (CPU2, 0x03, 0x00001810, 0x06)
{
Method (_DEP, 0, NotSerialized) // _DEP: Dependencies
{
ADBG ("CPU2 DEP Call")
If (LEqual (S0ID, One))
{
ADBG ("CPU2 DEP")
Return (Package (0x01)
{
\_SB.PEPD
})
}
Else
{
ADBG ("CPU2 DEP NULL")
Return (Package (0x00) {})
}
}
}
Processor (CPU3, 0x04, 0x00001810, 0x06)
{
Method (_DEP, 0, NotSerialized) // _DEP: Dependencies
{
ADBG ("CPU3 DEP Call")
If (LEqual (S0ID, One))
{
ADBG ("CPU3 DEP")
Return (Package (0x01)
{
\_SB.PEPD
})
}
Else
{
ADBG ("CPU3 DEP NULL")
Return (Package (0x00) {})
}
}
}
Processor (CPU4, 0x05, 0x00001810, 0x06)
{
Method (_DEP, 0, NotSerialized) // _DEP: Dependencies
{
ADBG ("CPU4 DEP Call")
If (LEqual (S0ID, One))
{
ADBG ("CPU4 DEP")
Return (Package (0x01)
{
\_SB.PEPD
})
}
Else
{
ADBG ("CPU4 DEP NULL")
Return (Package (0x00) {})
}
}
}
Processor (CPU5, 0x06, 0x00001810, 0x06)
{
Method (_DEP, 0, NotSerialized) // _DEP: Dependencies
{
ADBG ("CPU5 DEP Call")
If (LEqual (S0ID, One))
{
ADBG ("CPU5 DEP")
Return (Package (0x01)
{
\_SB.PEPD
})
}
Else
{
ADBG ("CPU5 DEP NULL")
Return (Package (0x00) {})
}
}
}
Processor (CPU6, 0x07, 0x00001810, 0x06)
{
Method (_DEP, 0, NotSerialized) // _DEP: Dependencies
{
ADBG ("CPU6 DEP Call")
If (LEqual (S0ID, One))
{
ADBG ("CPU6 DEP")
Return (Package (0x01)
{
\_SB.PEPD
})
}
Else
{
ADBG ("CPU6 DEP NULL")
Return (Package (0x00) {})
}
}
}
Processor (CPU7, 0x08, 0x00001810, 0x06)
{
Method (_DEP, 0, NotSerialized) // _DEP: Dependencies
{
ADBG ("CPU7 DEP Call")
If (LEqual (S0ID, One))
{
ADBG ("CPU7 DEP")
Return (Package (0x01)
{
\_SB.PEPD
})
}
Else
{
ADBG ("CPU7 DEP NULL")
Return (Package (0x00) {})
}
}
}
}
Scope (_SB.PCI0)
{
Device (PDRC)
{
Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID
Name (_UID, One) // _UID: Unique ID
Name (BUF0, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00004000, // Address Length
_Y0F)
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00008000, // Address Length
_Y12)
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00001000, // Address Length
_Y13)
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00001000, // Address Length
_Y14)
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00000000, // Address Length
_Y15)
Memory32Fixed (ReadWrite,
0xFED20000, // Address Base
0x00020000, // Address Length
)
Memory32Fixed (ReadOnly,
0xFED90000, // Address Base
0x00004000, // Address Length
)
Memory32Fixed (ReadOnly,
0xFF000000, // Address Base
0x01000000, // Address Length
)
Memory32Fixed (ReadOnly,
0xFEE00000, // Address Base
0x00100000, // Address Length
)
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00001000, // Address Length
_Y10)
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00010000, // Address Length
_Y11)
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y0F._BAS, RBR0) // _BAS: Base Address
ShiftLeft (^^SBRG.RCBA, 0x0E, RBR0) /* \_SB_.PCI0.PDRC._CRS.RBR0 */
CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y10._BAS, TBR0) // _BAS: Base Address
Store (TBAB, TBR0) /* \_SB_.PCI0.PDRC._CRS.TBR0 */
CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y10._LEN, TBLN) // _LEN: Length
If (LEqual (TBAB, Zero))
{
Store (Zero, TBLN) /* \_SB_.PCI0.PDRC._CRS.TBLN */
}
CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y11._BAS, SNR0) // _BAS: Base Address
Store (SRMB, SNR0) /* \_SB_.PCI0.PDRC._CRS.SNR0 */
CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y12._BAS, MBR0) // _BAS: Base Address
ShiftLeft (MHBR, 0x0F, MBR0) /* \_SB_.PCI0.PDRC._CRS.MBR0 */
CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y13._BAS, DBR0) // _BAS: Base Address
ShiftLeft (DIBR, 0x0C, DBR0) /* \_SB_.PCI0.PDRC._CRS.DBR0 */
CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y14._BAS, EBR0) // _BAS: Base Address
ShiftLeft (EPBR, 0x0C, EBR0) /* \_SB_.PCI0.PDRC._CRS.EBR0 */
CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y15._BAS, XBR0) // _BAS: Base Address
ShiftLeft (PXBR, 0x1A, XBR0) /* \_SB_.PCI0.PDRC._CRS.XBR0 */
CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y15._LEN, XSZ0) // _LEN: Length
ShiftRight (0x10000000, PXSZ, XSZ0) /* \_SB_.PCI0.PDRC._CRS.XSZ0 */
Return (BUF0) /* \_SB_.PCI0.PDRC.BUF0 */
}
}
}
Method (BRTN, 1, Serialized)
{
If (LEqual (And (DIDX, 0x0F00), 0x0400))
{
Notify (\_SB.PCI0.GFX0.DD1F, Arg0)
}
}
Name (RPA0, 0x001C0002)
Name (RPA1, 0x001C0001)
Name (RPA2, 0x001C0000)
Name (RPA3, 0x001C0003)
Name (RPA4, 0x001C0004)
Name (RPA5, 0x001C0005)
Name (RPA6, 0x001C0006)
Name (RPA7, 0x001C0007)
Name (PCHS, 0x00000002)
Name (SRMB, 0xAF210000)
Name (PML1, 0x00001003)
Name (PML2, 0x00001003)
Name (PML3, 0x00001003)
Name (PML4, 0x00001003)
Name (PML5, 0x00001003)
Name (PML6, 0x00001003)
Name (PML7, 0xFFFFFFFF)
Name (PML8, 0xFFFFFFFF)
Name (PNL1, 0x00001003)
Name (PNL2, 0x00001003)
Name (PNL3, 0x00001003)
Name (PNL4, 0x00001003)
Name (PNL5, 0x00001003)
Name (PNL6, 0x00001003)
Name (PNL7, 0xFFFFFFFF)
Name (PNL8, 0xFFFFFFFF)
Scope (\)
{
OperationRegion (IO_D, SystemIO, 0x0810, 0x04)
Field (IO_D, ByteAcc, NoLock, Preserve)
{
TRPD, 8
}
OperationRegion (IO_H, SystemIO, 0x1000, 0x04)
Field (IO_H, ByteAcc, NoLock, Preserve)
{
TRPH, 8
}
OperationRegion (PMIO, SystemIO, PMBS, 0x80)
Field (PMIO, ByteAcc, NoLock, Preserve)
{
Offset (0x28),
Offset (0x2A),
, 3,
GPE3, 1,
, 7,
GPEB, 1,
Offset (0x3C),
, 1,
UPRW, 1,
Offset (0x42),
, 1,
GPEC, 1
}
Field (PMIO, ByteAcc, NoLock, WriteAsZeros)
{
Offset (0x20),
Offset (0x22),
, 3,
GPS3, 1,
, 7,
GPSB, 1,
Offset (0x64),
, 9,
SCIS, 1,
Offset (0x66)
}
OperationRegion (PMLP, SystemIO, Add (PMBS, 0x80), 0x20)
Field (PMLP, ByteAcc, NoLock, Preserve)
{
Offset (0x10),
Offset (0x11),
GE08, 1,
GE09, 1,
GE10, 1,
, 6,
GE17, 1,
, 9,
GE27, 1,
, 17,
GE45, 1,
, 5,
GE51, 1,
, 8,
GE60, 1,
Offset (0x20)
}
Field (PMLP, ByteAcc, NoLock, WriteAsZeros)
{
Offset (0x01),
GS08, 1,
GS09, 1,
GS10, 1,
, 6,
GS17, 1,
, 9,
GS27, 1,
, 17,
GS45, 1,
, 5,
GS51, 1,
, 8,
GS60, 1,
Offset (0x10)
}
OperationRegion (GPR, SystemIO, GPBS, 0x0400)
Field (GPR, ByteAcc, NoLock, Preserve)
{
GU00, 8,
GU01, 8,
GU02, 8,
GU03, 8,
GIO0, 8,
GIO1, 8,
GIO2, 8,
GIO3, 8,
Offset (0x0C),
GL00, 8,
GL01, 8,
GL02, 8,
GP24, 1,
, 2,
GP27, 1,
GP28, 1,
Offset (0x10),
Offset (0x18),
GB00, 8,
GB01, 8,
GB02, 8,
GB03, 8,
Offset (0x2C),
GIV0, 8,
GIV1, 8,
GIV2, 8,
GIV3, 8,
GU04, 8,
GU05, 8,
GU06, 8,
GU07, 8,
GIO4, 8,
GIO5, 8,
GIO6, 8,
GIO7, 8,
GL04, 8,
GL05, 8,
GL06, 8,
GL07, 8,
Offset (0x40),
GU08, 8,
GU09, 8,
GU0A, 8,
GU0B, 8,
GIO8, 8,
GIO9, 8,
GIOA, 8,
GIOB, 8,
GL08, 8,
GL09, 8,
GL0A, 8,
GL0B, 8
}
OperationRegion (GPRL, SystemIO, GPBS, 0x40)
Field (GPRL, ByteAcc, NoLock, Preserve)
{
Offset (0x01),
GO08, 1,
GO09, 1,
, 3,
GO13, 1,
GO14, 1,
, 2,
GO17, 1,
, 9,
GO27, 1,
, 17,
GO45, 1,
, 5,
GO51, 1,
Offset (0x10),
Offset (0x30),
GR00, 32,
GR01, 32,
GR02, 32
}
OperationRegion (RCRB, SystemMemory, SRCB, 0x4000)
Field (RCRB, DWordAcc, Lock, Preserve)
{
Offset (0x1000),
Offset (0x2330),
AFEA, 32,
AFED, 32,
AFES, 16,
AFER, 16,
Offset (0x3000),
Offset (0x331C),
Offset (0x331F),
PMFS, 1,
Offset (0x3320),
CKEN, 32,
Offset (0x3404),
HPAS, 2,
, 5,
HPAE, 1,
Offset (0x3418),
, 1,
ADSD, 1,
SATD, 1,
SMBD, 1,
HDAD, 1,
Offset (0x341A),
RP1D, 1,
RP2D, 1,
RP3D, 1,
RP4D, 1,
RP5D, 1,
RP6D, 1,
RP7D, 1,
RP8D, 1,
Offset (0x359C),
UP0D, 1,
UP1D, 1,
UP2D, 1,
UP3D, 1,
UP4D, 1,
UP5D, 1,
UP6D, 1,
UP7D, 1,
UP8D, 1,
UP9D, 1,
UPAD, 1,
UPBD, 1,
UPCD, 1,
UPDD, 1,
, 1,
Offset (0x359E)
}
OperationRegion (IO_P, SystemIO, 0x1000, 0x04)
Field (IO_P, ByteAcc, NoLock, Preserve)
{
TRPF, 8
}
}
Scope (_SB)
{
Method (RDGI, 1, Serialized)
{
If (LLessEqual (Arg0, 0x5E))
{
Store (Add (Add (GPBS, 0x0100), Multiply (Arg0, 0x08)
), Local0)
OperationRegion (LGPI, SystemIO, Local0, 0x04)
Field (LGPI, AnyAcc, NoLock, Preserve)
{
, 30,
TEMP, 1
}
Return (TEMP) /* \_SB_.RDGI.TEMP */
}
}
Method (RDGP, 1, Serialized)
{
If (LLessEqual (Arg0, 0x5E))
{
Store (Add (Add (GPBS, 0x0100), Multiply (Arg0, 0x08)
), Local0)
OperationRegion (LGPI, SystemIO, Local0, 0x04)
Field (LGPI, AnyAcc, NoLock, Preserve)
{
, 31,
TEMP, 1
}
Return (TEMP) /* \_SB_.RDGP.TEMP */
}
}
Method (WTGP, 2, Serialized)
{
If (LLessEqual (Arg0, 0x5E))
{
Store (Add (Add (GPBS, 0x0100), Multiply (Arg0, 0x08)
), Local0)
OperationRegion (LGPI, SystemIO, Local0, 0x04)
Field (LGPI, AnyAcc, NoLock, Preserve)
{
, 31,
TEMP, 1
}
Store (Arg1, TEMP) /* \_SB_.WTGP.TEMP */
}
}
Method (WTIN, 2, Serialized)
{
If (LLessEqual (Arg0, 0x5E))
{
Store (Add (Add (GPBS, 0x0100), Multiply (Arg0, 0x08)
), Local0)
OperationRegion (LGPI, SystemIO, Local0, 0x04)
Field (LGPI, ByteAcc, NoLock, Preserve)
{
, 3,
TEMP, 1
}
Store (Arg1, TEMP) /* \_SB_.WTIN.TEMP */
}
}
Method (RDIN, 1, Serialized)
{
If (LLessEqual (Arg0, 0x5E))
{
Store (Add (Add (GPBS, 0x0100), Multiply (Arg0, 0x08)
), Local0)
OperationRegion (LGPI, SystemIO, Local0, 0x04)
Field (LGPI, ByteAcc, NoLock, Preserve)
{
, 3,
TEMP, 1
}
Return (TEMP) /* \_SB_.RDIN.TEMP */
}
}
Method (WPGP, 2, Serialized)
{
If (LLessEqual (Arg0, 0x5E))
{
Store (Add (Add (GPBS, 0x0104), Multiply (Arg0, 0x08)
), Local0)
OperationRegion (LGPI, SystemIO, Local0, 0x04)
Field (LGPI, AnyAcc, NoLock, Preserve)
{
TEMP, 2
}
Store (Arg1, TEMP) /* \_SB_.WPGP.TEMP */
}
}
Method (GP2N, 2, Serialized)
{
If (LLessEqual (Arg0, 0x5E))
{
Store (Add (Add (GPBS, 0x0100), Multiply (Arg0, 0x08)
), Local0)
OperationRegion (LGPI, SystemIO, Local0, 0x04)
Field (LGPI, AnyAcc, NoLock, Preserve)
{
TEMP, 1
}
Store (Arg1, TEMP) /* \_SB_.GP2N.TEMP */
}
}
Method (GP2A, 2, Serialized)
{
If (LLessEqual (Arg0, 0x5E))
{
Store (Add (Add (GPBS, 0x0104), Multiply (Arg0, 0x08)
), Local0)
OperationRegion (LGP2, SystemIO, Local0, 0x04)
Field (LGP2, AnyAcc, NoLock, Preserve)
{
GPWP, 2,
GPIS, 1
}
If (LEqual (Arg1, One))
{
Store (Zero, GPIS) /* \_SB_.GP2A.GPIS */
Store (Zero, GPWP) /* \_SB_.GP2A.GPWP */
}
Else
{
Store (0x02, GPWP) /* \_SB_.GP2A.GPWP */
Store (One, GPIS) /* \_SB_.GP2A.GPIS */
}
Store (Add (GPBS, 0x10), Local0)
OperationRegion (LGPI, SystemIO, Local0, 0x02)
Field (LGPI, AnyAcc, NoLock, Preserve)
{
TEMP, 16
}
If (LGreaterEqual (Arg0, 0x2D))
{
Subtract (Arg0, 0x28, Local1)
}
Else
{
If (LLessEqual (Arg0, 0x0A))
{
Subtract (Arg0, 0x08, Local1)
}
Else
{
Subtract (Arg0, 0x0A, Local1)
}
}
Store (ShiftLeft (One, Local1), Local2)
If (Arg1)
{
Or (TEMP, Local2, TEMP) /* \_SB_.GP2A.TEMP */
}
Else
{
And (TEMP, Not (Local2), TEMP) /* \_SB_.GP2A.TEMP */
}
}
}
Method (GP2B, 2, Serialized)
{
If (LLessEqual (Arg0, 0x5E))
{
Store (Add (GPBS, 0x10), Local0)
OperationRegion (LGPI, SystemIO, Local0, 0x02)
Field (LGPI, AnyAcc, NoLock, Preserve)
{
TEMP, 16
}
If (LGreaterEqual (Arg0, 0x2D))
{
Subtract (Arg0, 0x28, Local1)
}
Else
{
If (LLessEqual (Arg0, 0x0A))
{
Subtract (Arg0, 0x08, Local1)
}
Else
{
Subtract (Arg0, 0x0A, Local1)
}
}
Store (ShiftLeft (One, Local1), Local2)
If (Arg1)
{
Or (TEMP, Local2, TEMP) /* \_SB_.GP2B.TEMP */
}
Else
{
And (TEMP, Not (Local2), TEMP) /* \_SB_.GP2B.TEMP */
}
}
}
}
Scope (_SB.PCI0)
{
Name (LTRE, Zero)
Name (OBFF, Zero)
Name (LMSL, Zero)
Name (LNSL, Zero)
Device (XHC)
{
Name (_ADR, 0x00140000) // _ADR: Address
Method (_DEP, 0, NotSerialized) // _DEP: Dependencies
{
If (LEqual (S0ID, One))
{
Return (Package (0x01)
{
PEPD
})
}
Else
{
Return (Package (0x00) {})
}
}
OperationRegion (XPRT, PCI_Config, Zero, 0x0100)
Field (XPRT, AnyAcc, NoLock, Preserve)
{
DVID, 16,
Offset (0x40),
, 11,
SWAI, 1,
Offset (0x44),
, 12,
SAIP, 2,
Offset (0x48),
Offset (0x74),
D0D3, 2,
Offset (0x75),
PMEE, 1,
, 6,
PMES, 1,
Offset (0xB0),
, 13,
MB13, 1,
MB14, 1,
Offset (0xB4),
Offset (0xD0),
PR2, 32,
PR2M, 32,
PR3, 32,
PR3M, 32
}
OperationRegion (XHCP, SystemMemory, Add (PEBS, 0x000A0000), 0x0100)
Field (XHCP, AnyAcc, Lock, Preserve)
{
Offset (0x04),
PDBM, 16,
Offset (0x10),
MEMB, 64
}
Method (PR2S, 1, Serialized)
{
Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
If (LEqual (And (CDID, 0xF000), 0x8000))
{
While (One)
{
Store (Arg0, _T_0) /* \_SB_.PCI0.XHC_.PR2S._T_0 */
If (LEqual (_T_0, One))
{
Return (One)
}
Else
{
If (LEqual (_T_0, 0x02))
{
Return (0x02)
}
Else
{
If (LEqual (_T_0, 0x03))
{
Return (0x04)
}
Else
{
If (LEqual (_T_0, 0x04))
{
Return (0x08)
}
Else
{
If (LEqual (_T_0, 0x05))
{
Return (0x0100)
}
Else
{
If (LEqual (_T_0, 0x06))
{
Return (0x0200)
}
Else
{
If (LEqual (_T_0, 0x07))
{
Return (0x0400)
}
Else
{
If (LEqual (_T_0, 0x08))
{
Return (0x0800)
}
Else
{
If (LEqual (_T_0, 0x09))
{
Return (0x10)
}
Else
{
If (LEqual (_T_0, 0x0A))
{
Return (0x20)
}
Else
{
If (LEqual (_T_0, 0x0B))
{
Return (0x1000)
}
Else
{
If (LEqual (_T_0, 0x0C))
{
Return (0x2000)
}
Else
{
If (LEqual (_T_0, 0x0D))
{
Return (0x40)
}
Else
{
If (LEqual (_T_0, 0x0E))
{
Return (0x80)
}
Else
{
If (LEqual (_T_0, 0x0F))
{
Return (0x4000)
}
}
}
}
}
}
}
}
}
}
}
}
}
}
}
Break
}
}
Else
{
While (One)
{
Store (Arg0, _T_1) /* \_SB_.PCI0.XHC_.PR2S._T_1 */
If (LEqual (_T_1, One))
{
Return (One)
}
Else
{
If (LEqual (_T_1, 0x02))
{
Return (0x02)
}
Else
{
If (LEqual (_T_1, 0x03))
{
Return (0x04)
}
Else
{
If (LEqual (_T_1, 0x04))
{
Return (0x08)
}
Else
{
If (LEqual (_T_1, 0x05))
{
Return (0x10)
}
Else
{
If (LEqual (_T_1, 0x06))
{
Return (0x20)
}
Else
{
If (LEqual (_T_1, 0x07))
{
Return (0x40)
}
Else
{
If (LEqual (_T_1, 0x08))
{
Return (0x80)
}
Else
{
If (LEqual (_T_1, 0x09))
{
Return (0x0100)
}
}
}
}
}
}
}
}
}
Break
}
}
}
Name (XRST, Zero)
Method (_PS0, 0, Serialized) // _PS0: Power State 0
{
If (LEqual (DVID, 0xFFFF))
{
Return (Zero)
}
Store (MEMB, Local2)
Store (PDBM, Local1)
And (PDBM, 0xFFFFFFFFFFFFFFF9, PDBM) /* \_SB_.PCI0.XHC_.PDBM */
Store (D0D3, Local3)
Store (Zero, D0D3) /* \_SB_.PCI0.XHC_.D0D3 */
Store (SRMB, MEMB) /* \_SB_.PCI0.XHC_.MEMB */
Or (Local1, 0x02, PDBM) /* \_SB_.PCI0.XHC_.PDBM */
OperationRegion (MCA1, SystemMemory, SRMB, 0x9000)
Field (MCA1, DWordAcc, Lock, Preserve)
{
Offset (0x510),
PSC1, 32,
Offset (0x520),
PSC2, 32,
Offset (0x530),
PSC3, 32,
Offset (0x540),
PSC4, 32,
Offset (0x80E0),
, 15,
AX15, 1,
Offset (0x8154),
, 31,
CLK2, 1,
Offset (0x816C),
, 2,
CLK0, 1,
, 11,
CLK1, 1
}
If (LEqual (PCHS, 0x02))
{
Store (Zero, MB13) /* \_SB_.PCI0.XHC_.MB13 */
Store (Zero, MB14) /* \_SB_.PCI0.XHC_.MB14 */
Store (Zero, CLK0) /* \_SB_.PCI0.XHC_._PS0.CLK0 */
Store (Zero, CLK1) /* \_SB_.PCI0.XHC_._PS0.CLK1 */
}
Store (One, CLK2) /* \_SB_.PCI0.XHC_._PS0.CLK2 */
If (LEqual (PCHS, 0x02))
{
While (LOr (LOr (LEqual (And (PSC1, 0x03F8), 0x02E0), LEqual (
And (PSC2, 0x03F8), 0x02E0)), LOr (LEqual (And (PSC3, 0x03F8),
0x02E0), LEqual (And (PSC4, 0x03F8), 0x02E0))))
{
Stall (0x0A)
}
Store (Zero, Local4)
And (PSC1, 0xFFFFFFFFFFFFFFFD, Local0)
If (LEqual (And (Local0, 0x000203F9), 0x02A0))
{
Or (Local0, 0x80000000, PSC1) /* \_SB_.PCI0.XHC_._PS0.PSC1 */
Or (Local4, One, Local4)
}
And (PSC2, 0xFFFFFFFFFFFFFFFD, Local0)
If (LEqual (And (Local0, 0x000203F9), 0x02A0))
{
Or (Local0, 0x80000000, PSC2) /* \_SB_.PCI0.XHC_._PS0.PSC2 */
Or (Local4, 0x02, Local4)
}
And (PSC3, 0xFFFFFFFFFFFFFFFD, Local0)
If (LEqual (And (Local0, 0x000203F9), 0x02A0))
{
Or (Local0, 0x80000000, PSC3) /* \_SB_.PCI0.XHC_._PS0.PSC3 */
Or (Local4, 0x04, Local4)
}
And (PSC4, 0xFFFFFFFFFFFFFFFD, Local0)
If (LEqual (And (Local0, 0x000203F9), 0x02A0))
{
Or (Local0, 0x80000000, PSC4) /* \_SB_.PCI0.XHC_._PS0.PSC4 */
Or (Local4, 0x08, Local4)
}
If (Local4)
{
Sleep (0x65)
If (And (Local4, One))
{
And (PSC1, 0xFFFFFFFFFFFFFFFD, Local0)
Or (Local0, 0x00FE0000, PSC1) /* \_SB_.PCI0.XHC_._PS0.PSC1 */
}
If (And (Local4, 0x02))
{
And (PSC2, 0xFFFFFFFFFFFFFFFD, Local0)
Or (Local0, 0x00FE0000, PSC2) /* \_SB_.PCI0.XHC_._PS0.PSC2 */
}
If (And (Local4, 0x04))
{
And (PSC3, 0xFFFFFFFFFFFFFFFD, Local0)
Or (Local0, 0x00FE0000, PSC3) /* \_SB_.PCI0.XHC_._PS0.PSC3 */
}
If (And (Local4, 0x08))
{
And (PSC4, 0xFFFFFFFFFFFFFFFD, Local0)
Or (Local0, 0x00FE0000, PSC4) /* \_SB_.PCI0.XHC_._PS0.PSC4 */
}
}
Store (One, AX15) /* \_SB_.PCI0.XHC_._PS0.AX15 */
}
Store (Zero, SWAI) /* \_SB_.PCI0.XHC_.SWAI */
Store (Zero, SAIP) /* \_SB_.PCI0.XHC_.SAIP */
If (CondRefOf (\_SB.PCI0.XHC.PS0X))
{
PS0X ()
}
And (PDBM, 0xFFFFFFFFFFFFFFFD, PDBM) /* \_SB_.PCI0.XHC_.PDBM */
Store (Local2, MEMB) /* \_SB_.PCI0.XHC_.MEMB */
Store (Local1, PDBM) /* \_SB_.PCI0.XHC_.PDBM */
}
Method (_PS3, 0, Serialized) // _PS3: Power State 3
{
If (LEqual (DVID, 0xFFFF))
{
Return (Zero)
}
Store (One, PMES) /* \_SB_.PCI0.XHC_.PMES */
Store (One, PMEE) /* \_SB_.PCI0.XHC_.PMEE */
Store (MEMB, Local2)
Store (PDBM, Local1)
And (PDBM, 0xFFFFFFFFFFFFFFF9, PDBM) /* \_SB_.PCI0.XHC_.PDBM */
Store (SRMB, MEMB) /* \_SB_.PCI0.XHC_.MEMB */
Or (PDBM, 0x02, PDBM) /* \_SB_.PCI0.XHC_.PDBM */
OperationRegion (MCA1, SystemMemory, SRMB, 0x9000)
Field (MCA1, DWordAcc, Lock, Preserve)
{
Offset (0x80E0),
, 15,
AX15, 1,
Offset (0x8154),
, 31,
CLK2, 1,
Offset (0x816C),
, 2,
CLK0, 1,
, 11,
CLK1, 1,
Offset (0x8170)
}
Store (D0D3, Local3)
If (LEqual (Local3, 0x03))
{
Store (Zero, D0D3) /* \_SB_.PCI0.XHC_.D0D3 */
}
If (LEqual (PCHS, 0x02))
{
Store (One, MB13) /* \_SB_.PCI0.XHC_.MB13 */
Store (One, MB14) /* \_SB_.PCI0.XHC_.MB14 */
Store (One, CLK0) /* \_SB_.PCI0.XHC_._PS3.CLK0 */
Store (One, CLK1) /* \_SB_.PCI0.XHC_._PS3.CLK1 */
}
Store (Zero, CLK2) /* \_SB_.PCI0.XHC_._PS3.CLK2 */
If (LEqual (PCHS, 0x02))
{
Store (Zero, AX15) /* \_SB_.PCI0.XHC_._PS3.AX15 */
}
Store (One, SWAI) /* \_SB_.PCI0.XHC_.SWAI */
Store (One, SAIP) /* \_SB_.PCI0.XHC_.SAIP */
If (CondRefOf (\_SB.PCI0.XHC.PS3X))
{
PS3X ()
}
If (LEqual (Local3, 0x03))
{
Store (0x03, D0D3) /* \_SB_.PCI0.XHC_.D0D3 */
}
And (PDBM, 0xFFFFFFFFFFFFFFFD, PDBM) /* \_SB_.PCI0.XHC_.PDBM */
Store (Local2, MEMB) /* \_SB_.PCI0.XHC_.MEMB */
Store (Local1, PDBM) /* \_SB_.PCI0.XHC_.PDBM */
}
Method (CUID, 1, Serialized)
{
If (LEqual (Arg0, ToUUID ("7c9512a9-1705-4cb4-af7d-506a2423ab71")))
{
Return (One)
}
Return (Zero)
}
Method (POSC, 3, Serialized)
{
CreateDWordField (Arg2, Zero, CDW1)
CreateDWordField (Arg2, 0x08, CDW3)
If (LEqual (XHCI, Zero))
{
Or (CDW1, 0x02, CDW1) /* \_SB_.PCI0.XHC_.POSC.CDW1 */
}
If (LNot (And (CDW1, One)))
{
If (And (CDW3, One))
{
ESEL ()
}
Else
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
If (LGreater (Arg0, One))
{
XSEL ()
}
Else
{
Or (CDW1, 0x0A, CDW1) /* \_SB_.PCI0.XHC_.POSC.CDW1 */
}
}
Else
{
If (LGreater (Arg0, 0x02))
{
XSEL ()
}
Else
{
Or (CDW1, 0x0A, CDW1) /* \_SB_.PCI0.XHC_.POSC.CDW1 */
}
}
}
}
Return (Arg2)
}
Method (XSEL, 0, Serialized)
{
If (LOr (LEqual (XHCI, 0x02), LEqual (XHCI, 0x03)))
{
Store (One, XUSB) /* \_SB_.XUSB */
Store (One, XRST) /* \_SB_.PCI0.XHC_.XRST */
Store (Zero, Local0)
And (PR3, 0xFFFFFFC0, Local0)
Or (Local0, PR3M, PR3) /* \_SB_.PCI0.XHC_.PR3_ */
Store (Zero, Local0)
And (PR2, 0xFFFF8000, Local0)
Or (Local0, PR2M, PR2) /* \_SB_.PCI0.XHC_.PR2_ */
}
}
Method (ESEL, 0, Serialized)
{
If (LOr (LEqual (XHCI, 0x02), LEqual (XHCI, 0x03)))
{
And (PR3, 0xFFFFFFC0, PR3) /* \_SB_.PCI0.XHC_.PR3_ */
And (PR2, 0xFFFF8000, PR2) /* \_SB_.PCI0.XHC_.PR2_ */
Store (Zero, XUSB) /* \_SB_.XUSB */
Store (Zero, XRST) /* \_SB_.PCI0.XHC_.XRST */
}
}
Method (XWAK, 0, Serialized)
{
If (LOr (LEqual (XUSB, One), LEqual (XRST, One)))
{
XSEL ()
}
}
Device (RHUB)
{
Name (_ADR, Zero) // _ADR: Address
Device (HS01)
{
Name (_ADR, One) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
0xFF,
0x03,
Zero,
Zero
})
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS01._UPC.UPCP */
}
Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
{
Name (PLDP, Package (0x01)
{
Buffer (0x14)
{
/* 0000 */ 0x02, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, /* ..r..... */
/* 0008 */ 0x19, 0x0D, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, /* ........ */
/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF /* .... */
}
})
Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS01._PLD.PLDP */
}
Name (_S0W, 0x03) // _S0W: S0 Device Wake State
Name (_S4W, 0x03) // _S4W: S4 Device Wake State
}
Device (HS02)
{
Name (_ADR, 0x02) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
0xFF,
0x03,
Zero,
Zero
})
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS02._UPC.UPCP */
}
Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
{
Name (PLDP, Package (0x01)
{
Buffer (0x14)
{
/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, /* ........ */
/* 0010 */ 0xFF, 0xFF, 0x7F, 0xFF /* .... */
}
})
Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS02._PLD.PLDP */
}
Name (_S0W, 0x03) // _S0W: S0 Device Wake State
Name (_S4W, 0x03) // _S4W: S4 Device Wake State
}
Device (HS03)
{
Name (_ADR, 0x03) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
0xFF,
0xFF,
Zero,
Zero
})
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS03._UPC.UPCP */
}
Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
{
Name (PLDP, Package (0x01)
{
Buffer (0x14)
{
/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, /* ........ */
/* 0010 */ 0xFF, 0x7F, 0xFF, 0xFF /* .... */
}
})
Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS03._PLD.PLDP */
}
Name (_S0W, 0x03) // _S0W: S0 Device Wake State
Name (_S4W, 0x03) // _S4W: S4 Device Wake State
Device (V3BL)
{
Name (_ADR, 0x03) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
0xFF,
0xFF,
Zero,
Zero
})
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS03.V3BL._UPC.UPCP */
}
Name (_S0W, 0x03) // _S0W: S0 Device Wake State
Name (_S4W, 0x03) // _S4W: S4 Device Wake State
}
}
Device (HS04)
{
Name (_ADR, 0x04) // _ADR: Address
Name (_STA, Zero) // _STA: Status
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
Zero,
Zero,
Zero,
Zero
})
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS04._UPC.UPCP */
}
}
Device (HS05)
{
Name (_ADR, 0x05) // _ADR: Address
Name (_STA, Zero) // _STA: Status
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
Zero,
Zero,
Zero,
Zero
})
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS05._UPC.UPCP */
}
}
Device (HS06)
{
Name (_ADR, 0x06) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
0xFF,
One,
Zero,
Zero
})
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS06._UPC.UPCP */
}
Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
{
Name (PLDP, Package (0x01)
{
Buffer (0x14)
{
/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0010 */ 0x7F, 0xFF, 0xFF, 0xFF /* .... */
}
})
Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS06._PLD.PLDP */
}
Name (_S0W, 0x03) // _S0W: S0 Device Wake State
Method (_PS0, 0, Serialized) // _PS0: Power State 0
{
}
Method (_PS3, 0, Serialized) // _PS3: Power State 3
{
}
Device (MRBT)
{
Name (_ADR, 0x06) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
0xFF,
0xFF,
Zero,
Zero
})
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS06.MRBT._UPC.UPCP */
}
Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
{
Name (PLDP, Package (0x01)
{
Buffer (0x14)
{
/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0010 */ 0x7F, 0xFF, 0xFF, 0xFF /* .... */
}
})
Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS06.MRBT._PLD.PLDP */
}
Name (_S0W, 0x02) // _S0W: S0 Device Wake State
}
}
PowerResource (CAMP, 0x00, 0x0000)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
Store (0x15, DBG8) /* \DBG8 */
If (LEqual (RDGP (0x19), One))
{
Store (One, DBG8) /* \DBG8 */
Return (One)
}
Else
{
Store (Zero, DBG8) /* \DBG8 */
Return (Zero)
}
}
Method (_ON, 0, NotSerialized) // _ON_: Power On
{
WTGP (0x19, One)
Sleep (0x0A)
Store (0x15, DBG8) /* \DBG8 */
Store (0x11, DBG8) /* \DBG8 */
}
Method (_OFF, 0, NotSerialized) // _OFF: Power Off
{
WTGP (0x19, Zero)
Sleep (0x0A)
Store (0x15, DBG8) /* \DBG8 */
Store (0xFF, DBG8) /* \DBG8 */
}
}
Device (HS07)
{
Name (_ADR, 0x07) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
0xFF,
Zero,
Zero,
Zero
})
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS07._UPC.UPCP */
}
Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
{
Name (PLDP, Package (0x01)
{
Buffer (0x14)
{
/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF /* .... */
}
})
Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS07._PLD.PLDP */
}
Name (_S0W, 0x04) // _S0W: S0 Device Wake State
Name (_PR0, Package (0x01) // _PR0: Power Resources for D0
{
CAMP
})
Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot
{
CAMP
})
Device (FCAM)
{
Name (_ADR, 0x07) // _ADR: Address
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
0xFF,
0xFF,
Zero,
Zero
})
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS07.FCAM._UPC.UPCP */
}
Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
{
Name (PLDP, Package (0x01)
{
Buffer (0x14)
{
/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x21, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* !....... */
/* 0010 */ 0xC1, 0x00, 0x91, 0x00 /* .... */
}
})
Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS07.FCAM._PLD.PLDP */
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
}
}
Device (HS08)
{
Name (_ADR, 0x08) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
0xFF,
Zero,
Zero,
Zero
})
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS08._UPC.UPCP */
}
Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
{
Name (PLDP, Package (0x01)
{
Buffer (0x14)
{
/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0010 */ 0xFF, 0x7F, 0xFF, 0x7F /* .... */
}
})
Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS08._PLD.PLDP */
}
Name (_S0W, 0x04) // _S0W: S0 Device Wake State
Name (_PR0, Package (0x01) // _PR0: Power Resources for D0
{
CAMP
})
Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot
{
CAMP
})
Device (BCAM)
{
Name (_ADR, 0x08) // _ADR: Address
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
0xFF,
0xFF,
Zero,
Zero
})
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS08.BCAM._UPC.UPCP */
}
Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
{
Name (PLDP, Package (0x01)
{
Buffer (0x14)
{
/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x2B, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* +....... */
/* 0010 */ 0xC0, 0x00, 0xA3, 0x00 /* .... */
}
})
Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HS08.BCAM._PLD.PLDP */
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
}
}
Device (HS09)
{
Name (_ADR, 0x09) // _ADR: Address
Method (_STA, 0, Serialized) // _STA: Status
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
Zero,
0xFF,
Zero,
Zero
})
If (LNot (And (PR2S (0x09), PR2)))
{
Store (Zero, Index (UPCP, Zero))
}
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS09._UPC.UPCP */
}
}
Device (HS10)
{
Method (_ADR, 0, Serialized) // _ADR: Address
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x0A)
}
Else
{
Return (0xFA)
}
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
Zero,
0xFF,
Zero,
Zero
})
If (LNot (And (PR2S (0x0A), PR2)))
{
Store (Zero, Index (UPCP, Zero))
}
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS10._UPC.UPCP */
}
}
Device (HS11)
{
Method (_ADR, 0, Serialized) // _ADR: Address
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x0B)
}
Else
{
Return (0xFB)
}
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
Zero,
0xFF,
Zero,
Zero
})
If (LNot (And (PR2S (0x0B), PR2)))
{
Store (Zero, Index (UPCP, Zero))
}
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS11._UPC.UPCP */
}
}
Device (HS12)
{
Method (_ADR, 0, Serialized) // _ADR: Address
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x0C)
}
Else
{
Return (0xFC)
}
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
Zero,
0xFF,
Zero,
Zero
})
If (LNot (And (PR2S (0x0C), PR2)))
{
Store (Zero, Index (UPCP, Zero))
}
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS12._UPC.UPCP */
}
}
Device (HS13)
{
Method (_ADR, 0, Serialized) // _ADR: Address
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x0D)
}
Else
{
Return (0xFD)
}
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
Zero,
0xFF,
Zero,
Zero
})
If (LNot (And (PR2S (0x0D), PR2)))
{
Store (Zero, Index (UPCP, Zero))
}
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS13._UPC.UPCP */
}
}
Device (HS14)
{
Name (_ADR, 0x0E) // _ADR: Address
Method (_STA, 0, Serialized) // _STA: Status
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
Zero,
0xFF,
Zero,
Zero
})
If (LNot (And (PR2S (0x0E), PR2)))
{
Store (Zero, Index (UPCP, Zero))
}
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS14._UPC.UPCP */
}
}
Device (HS15)
{
Name (_ADR, 0x0F) // _ADR: Address
Method (_STA, 0, Serialized) // _STA: Status
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
Zero,
0xFF,
Zero,
Zero
})
If (LNot (And (PR2S (0x0F), PR2)))
{
Store (Zero, Index (UPCP, Zero))
}
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HS15._UPC.UPCP */
}
}
Device (SSP1)
{
Method (_ADR, 0, Serialized) // _ADR: Address
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x10)
}
Else
{
Return (0x0A)
}
}
Name (_STA, 0x0F) // _STA: Status
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
0xFF,
0x03,
Zero,
Zero
})
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.SSP1._UPC.UPCP */
}
Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
{
Name (PLDP, Package (0x01)
{
Buffer (0x14)
{
/* 0000 */ 0x02, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, /* ..r..... */
/* 0008 */ 0x19, 0x0D, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, /* ........ */
/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF /* .... */
}
})
Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.SSP1._PLD.PLDP */
}
Name (_S0W, 0x03) // _S0W: S0 Device Wake State
Name (_S4W, 0x03) // _S4W: S4 Device Wake State
}
Device (SSP2)
{
Method (_ADR, 0, Serialized) // _ADR: Address
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x11)
}
Else
{
Return (0x0B)
}
}
Name (_STA, 0x0F) // _STA: Status
Name (_S0W, 0x03) // _S0W: S0 Device Wake State
Name (_S4W, 0x03) // _S4W: S4 Device Wake State
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
0xFF,
0x03,
Zero,
Zero
})
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.SSP2._UPC.UPCP */
}
Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
{
Name (PLDP, Package (0x01)
{
Buffer (0x14)
{
/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, /* ........ */
/* 0010 */ 0xFF, 0xFF, 0x7F, 0xFF /* .... */
}
})
Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.SSP2._PLD.PLDP */
}
}
Device (SSP3)
{
Method (_ADR, 0, Serialized) // _ADR: Address
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x12)
}
Else
{
Return (0x0C)
}
}
Name (_STA, Zero) // _STA: Status
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
Zero,
0xFF,
Zero,
Zero
})
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.SSP3._UPC.UPCP */
}
}
Device (SSP4)
{
Method (_ADR, 0, Serialized) // _ADR: Address
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x13)
}
Else
{
Return (0x0D)
}
}
Name (_S0W, 0x02) // _S0W: S0 Device Wake State
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
0xFF,
0x03,
Zero,
Zero
})
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.SSP4._UPC.UPCP */
}
Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
{
Name (PLDP, Package (0x01)
{
Buffer (0x14)
{
/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, /* ........ */
/* 0010 */ 0xFF, 0xFF, 0xFF, 0x7F /* .... */
}
})
Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.SSP4._PLD.PLDP */
}
Device (SDXC)
{
Method (_ADR, 0, Serialized) // _ADR: Address
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x13)
}
Else
{
Return (0x0D)
}
}
Name (_S0W, 0x02) // _S0W: S0 Device Wake State
Name (_STA, 0x0F) // _STA: Status
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
0xFF,
0xFF,
Zero,
Zero
})
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.SSP4.SDXC._UPC.UPCP */
}
Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
{
Name (PLDP, Package (0x01)
{
Buffer (0x14)
{
/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x99, 0x0D, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, /* ........ */
/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF /* .... */
}
})
Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.SSP4.SDXC._PLD.PLDP */
}
}
}
Device (SSP5)
{
Name (_ADR, 0x14) // _ADR: Address
Method (_STA, 0, Serialized) // _STA: Status
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
Zero,
0xFF,
Zero,
Zero
})
If (LNot (And (PR3, 0x10)))
{
Store (Zero, Index (UPCP, Zero))
}
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.SSP5._UPC.UPCP */
}
}
Device (SSP6)
{
Name (_ADR, 0x15) // _ADR: Address
Method (_STA, 0, Serialized) // _STA: Status
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
{
Name (UPCP, Package (0x04)
{
Zero,
0xFF,
Zero,
Zero
})
If (LNot (And (PR3, 0x20)))
{
Store (Zero, Index (UPCP, Zero))
}
Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.SSP6._UPC.UPCP */
}
}
}
Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
{
Return (GPRW (0x6D, 0x04))
}
}
Device (HDEF)
{
Name (_ADR, 0x001B0000) // _ADR: Address
OperationRegion (HDAR, PCI_Config, 0x4C, 0x10)
Field (HDAR, WordAcc, NoLock, Preserve)
{
DCKA, 1,
Offset (0x01),
DCKM, 1,
, 6,
DCKS, 1,
Offset (0x08),
Offset (0x09),
PMEE, 1,
, 6,
PMES, 1
}
Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
{
Return (GPRW (0x6D, 0x03))
}
Name (_S0W, 0x03) // _S0W: S0 Device Wake State
Method (_PS0, 0, Serialized) // _PS0: Power State 0
{
}
Method (_PS3, 0, Serialized) // _PS3: Power State 3
{
}
}
Scope (\_SB.PCI0)
{
Device (SIRC)
{
Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID
Name (_UID, 0x04) // _UID: Unique ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LLess (OSYS, 0x07DC))
{
Return (Zero)
}
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (Zero)
}
Return (0x0F)
}
Name (BUF1, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00001000, // Address Length
_Y16)
})
Name (BUF2, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0xFE104000, // Address Base
0x00001000, // Address Length
_Y17)
})
Name (BUF3, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0xFE106000, // Address Base
0x00001000, // Address Length
_Y18)
})
Name (BUF4, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00001000, // Address Length
_Y19)
})
Name (BUF5, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00001000, // Address Length
_Y1A)
})
Name (BUF6, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00001000, // Address Length
_Y1B)
})
Name (BUF7, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00001000, // Address Length
_Y1C)
})
Name (BUF8, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00001000, // Address Length
_Y1D)
})
Name (BUFL, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00000008, // Address Length
_Y1E)
})
Name (BUFH, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00000FEC, // Address Length
_Y1F)
})
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Store (ResourceTemplate ()
{
}, Local0)
CreateDWordField (BUF1, \_SB.PCI0.SIRC._Y16._BAS, BR01) // _BAS: Base Address
CreateDWordField (BUF2, \_SB.PCI0.SIRC._Y17._BAS, BR02) // _BAS: Base Address
CreateDWordField (BUF3, \_SB.PCI0.SIRC._Y18._BAS, BR03) // _BAS: Base Address
CreateDWordField (BUF4, \_SB.PCI0.SIRC._Y19._BAS, BR04) // _BAS: Base Address
CreateDWordField (BUF5, \_SB.PCI0.SIRC._Y1A._BAS, BR05) // _BAS: Base Address
CreateDWordField (BUF6, \_SB.PCI0.SIRC._Y1B._BAS, BR06) // _BAS: Base Address
CreateDWordField (BUF7, \_SB.PCI0.SIRC._Y1C._BAS, BR07) // _BAS: Base Address
CreateDWordField (BUF8, \_SB.PCI0.SIRC._Y1D._BAS, BR08) // _BAS: Base Address
If (LNotEqual (BR01, Zero))
{
ConcatenateResTemplate (Local0, BUF1, Local0)
}
If (LNotEqual (BR02, Zero))
{
ConcatenateResTemplate (Local0, BUF2, Local0)
}
If (LNotEqual (BR03, Zero))
{
ConcatenateResTemplate (Local0, BUF3, Local0)
}
If (LNotEqual (BR04, Zero))
{
ConcatenateResTemplate (Local0, BUF4, Local0)
}
If (LNotEqual (BR05, Zero))
{
ConcatenateResTemplate (Local0, BUF5, Local0)
}
If (LNotEqual (BR06, Zero))
{
ConcatenateResTemplate (Local0, BUF6, Local0)
}
If (LNotEqual (BR07, Zero))
{
ConcatenateResTemplate (Local0, BUF7, Local0)
}
If (LNotEqual (BR08, Zero))
{
ConcatenateResTemplate (Local0, BUF8, Local0)
OperationRegion (SDCH, SystemMemory, BR08, 0x40)
Field (SDCH, DWordAcc, NoLock, Preserve)
{
Offset (0x10),
BAR0, 32
}
CreateDWordField (BUFL, \_SB.PCI0.SIRC._Y1E._BAS, LBAS) // _BAS: Base Address
CreateDWordField (BUFH, \_SB.PCI0.SIRC._Y1F._BAS, HBAS) // _BAS: Base Address
Add (BAR0, 0x1000, LBAS) /* \_SB_.PCI0.SIRC._CRS.LBAS */
Add (BAR0, 0x1014, HBAS) /* \_SB_.PCI0.SIRC._CRS.HBAS */
ConcatenateResTemplate (Local0, BUFL, Local0)
ConcatenateResTemplate (Local0, BUFH, Local0)
}
Return (Local0)
}
Method (CNTR, 1, Serialized)
{
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
While (One)
{
Store (ToInteger (Arg0), _T_0) /* \_SB_.PCI0.SIRC.CNTR._T_0 */
If (LEqual (_T_0, One))
{
CreateDWordField (BUF1, \_SB.PCI0.SIRC._Y16._BAS, BAR1) // _BAS: Base Address
Return (BAR1) /* \_SB_.PCI0.SIRC.CNTR.BAR1 */
}
Else
{
If (LEqual (_T_0, 0x02))
{
CreateDWordField (BUF2, \_SB.PCI0.SIRC._Y17._BAS, BAR2) // _BAS: Base Address
Return (BAR2) /* \_SB_.PCI0.SIRC.CNTR.BAR2 */
}
Else
{
If (LEqual (_T_0, 0x03))
{
CreateDWordField (BUF3, \_SB.PCI0.SIRC._Y18._BAS, BAR3) // _BAS: Base Address
Return (BAR3) /* \_SB_.PCI0.SIRC.CNTR.BAR3 */
}
Else
{
If (LEqual (_T_0, 0x04))
{
CreateDWordField (BUF4, \_SB.PCI0.SIRC._Y19._BAS, BAR4) // _BAS: Base Address
Return (BAR4) /* \_SB_.PCI0.SIRC.CNTR.BAR4 */
}
Else
{
If (LEqual (_T_0, 0x05))
{
CreateDWordField (BUF5, \_SB.PCI0.SIRC._Y1A._BAS, BAR5) // _BAS: Base Address
Return (BAR5) /* \_SB_.PCI0.SIRC.CNTR.BAR5 */
}
Else
{
If (LEqual (_T_0, 0x06))
{
CreateDWordField (BUF6, \_SB.PCI0.SIRC._Y1B._BAS, BAR6) // _BAS: Base Address
Return (BAR6) /* \_SB_.PCI0.SIRC.CNTR.BAR6 */
}
Else
{
If (LEqual (_T_0, 0x07))
{
CreateDWordField (BUF7, \_SB.PCI0.SIRC._Y1C._BAS, BAR7) // _BAS: Base Address
Return (BAR7) /* \_SB_.PCI0.SIRC.CNTR.BAR7 */
}
Else
{
If (LEqual (_T_0, 0x08))
{
CreateDWordField (BUF8, \_SB.PCI0.SIRC._Y1D._BAS, BAR8) // _BAS: Base Address
Return (BAR8) /* \_SB_.PCI0.SIRC.CNTR.BAR8 */
}
Else
{
Return (0xFFFFFFFF)
}
}
}
}
}
}
}
}
Break
}
}
}
Device (GPI0)
{
Name (_HID, "INT33C7" /* Intel Serial I/O GPIO Host Controller */) // _HID: Hardware ID
Name (_CID, "INT33C7" /* Intel Serial I/O GPIO Host Controller */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (RBUF, ResourceTemplate ()
{
DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
0x00000000, // Granularity
0x00001C00, // Range Minimum
0x00001FFF, // Range Maximum
0x00000000, // Translation Offset
0x00000400, // Length
,, _Y20, TypeStatic)
})
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Return (RBUF) /* \_SB_.PCI0.GPI0.RBUF */
}
Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision
{
Return (CRID) /* \_SB_.CRID */
}
CreateDWordField (RBUF, \_SB.PCI0.GPI0._Y20._MIN, BVAL) // _MIN: Minimum Base Address
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
}
Device (SDMA)
{
Name (_HID, "INTL9C60" /* Intel Baytrail SOC DMA Controller */) // _HID: Hardware ID
Name (_UID, One) // _UID: Unique ID
Name (_ADR, 0x00150000) // _ADR: Address
Name (RBUF, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00001000, // Address Length
_Y21)
Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, )
{
0x00000014,
}
})
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Return (RBUF) /* \_SB_.PCI0.SDMA.RBUF */
}
Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision
{
Return (CRID) /* \_SB_.CRID */
}
Method (PTD3, 0, NotSerialized)
{
If (LNotEqual (^^SIRC.CNTR (One), Zero))
{
Add (^^SIRC.CNTR (One), 0x84, Local0)
OperationRegion (DMB1, SystemMemory, Local0, 0x04)
Field (DMB1, DWordAcc, NoLock, Preserve)
{
TEMP, 32
}
Or (TEMP, 0x03, TEMP) /* \_SB_.PCI0.SDMA.PTD3.TEMP */
}
}
CreateDWordField (RBUF, \_SB.PCI0.SDMA._Y21._BAS, BVAL) // _BAS: Base Address
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
}
Device (I2C0)
{
Name (_HID, "INT33C2" /* Intel Serial I/O I2C Host Controller */) // _HID: Hardware ID
Name (_CID, "INT33C2" /* Intel Serial I/O I2C Host Controller */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (_ADR, 0x00150001) // _ADR: Address
Method (_DEP, 0, NotSerialized) // _DEP: Dependencies
{
ADBG ("I2C0 DEP Call")
If (LEqual (S0ID, One))
{
ADBG ("I2C0 DEP")
Return (Package (0x01)
{
PEPD
})
}
Else
{
ADBG ("I2C0 DEP NULL")
Return (Package (0x00) {})
}
}
Method (SSCN, 0, NotSerialized)
{
Name (PKG, Package (0x03)
{
0x01B0,
0x01FB,
0x09
})
Store (SSH0, Index (PKG, Zero))
Store (SSL0, Index (PKG, One))
Store (SSD0, Index (PKG, 0x02))
Return (PKG) /* \_SB_.PCI0.I2C0.SSCN.PKG_ */
}
Method (FMCN, 0, NotSerialized)
{
Name (PKG, Package (0x03)
{
0x48,
0xA0,
0x09
})
Store (FMH0, Index (PKG, Zero))
Store (FML0, Index (PKG, One))
Store (FMD0, Index (PKG, 0x02))
Return (PKG) /* \_SB_.PCI0.I2C0.FMCN.PKG_ */
}
Method (FPCN, 0, NotSerialized)
{
Name (PKG, Package (0x03)
{
0x1A,
0x32,
0x05
})
Store (FPH0, Index (PKG, Zero))
Store (FPL0, Index (PKG, One))
Store (FPD0, Index (PKG, 0x02))
Return (PKG) /* \_SB_.PCI0.I2C0.FPCN.PKG_ */
}
Method (M0D3, 0, NotSerialized)
{
Name (PKG, Package (0x01)
{
0xC8
})
Store (M0C0, Index (PKG, Zero))
Return (PKG) /* \_SB_.PCI0.I2C0.M0D3.PKG_ */
}
Method (M1D3, 0, NotSerialized)
{
Name (PKG, Package (0x01)
{
0x07D0
})
Store (M1C0, Index (PKG, Zero))
Return (PKG) /* \_SB_.PCI0.I2C0.M1D3.PKG_ */
}
Method (M0D0, 0, NotSerialized)
{
Name (PKG, Package (0x01)
{
Zero
})
Store (M2C0, Index (PKG, Zero))
Return (PKG) /* \_SB_.PCI0.I2C0.M0D0.PKG_ */
}
Name (RBUF, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0xFE103000, // Address Base
0x00001000, // Address Length
_Y22)
Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, )
{
0x00000007,
}
})
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (DBUF, ResourceTemplate ()
{
FixedDMA (0x0018, 0x0004, Width32bit, )
FixedDMA (0x0019, 0x0005, Width32bit, )
})
If (LNotEqual (^^SDMA._STA (), Zero))
{
Return (ConcatenateResTemplate (RBUF, DBUF))
}
Else
{
Return (RBUF) /* \_SB_.PCI0.I2C0.RBUF */
}
}
Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision
{
Return (CRID) /* \_SB_.CRID */
}
CreateDWordField (RBUF, \_SB.PCI0.I2C0._Y22._BAS, BVAL) // _BAS: Base Address
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
Method (_PS0, 0, Serialized) // _PS0: Power State 0
{
ADBG ("I2C0 Ctrlr D0")
If (LNotEqual (^^SIRC.CNTR (0x02), Zero))
{
Add (^^SIRC.CNTR (0x02), 0x84, Local0)
OperationRegion (ICB1, SystemMemory, Local0, 0x04)
Field (ICB1, DWordAcc, NoLock, Preserve)
{
TEMP, 32
}
And (TEMP, 0xFFFFFFFC, TEMP) /* \_SB_.PCI0.I2C0._PS0.TEMP */
Store (TEMP, Local0)
}
If (CondRefOf (\_SB.PCI0.I2C0.PS0X))
{
PS0X ()
}
}
Method (_PS3, 0, Serialized) // _PS3: Power State 3
{
ADBG ("I2C0 Ctrlr D3")
If (LNotEqual (^^SIRC.CNTR (0x02), Zero))
{
Add (^^SIRC.CNTR (0x02), 0x84, Local0)
OperationRegion (ICB1, SystemMemory, Local0, 0x04)
Field (ICB1, DWordAcc, NoLock, Preserve)
{
TEMP, 32
}
Or (TEMP, 0x03, TEMP) /* \_SB_.PCI0.I2C0._PS3.TEMP */
Store (TEMP, Local0)
}
If (CondRefOf (\_SB.PCI0.I2C0.PS3X))
{
PS3X ()
}
}
}
Device (I2C1)
{
Name (_HID, "INT33C3" /* Intel Serial I/O I2C Host Controller */) // _HID: Hardware ID
Name (_CID, "INT33C3" /* Intel Serial I/O I2C Host Controller */) // _CID: Compatible ID
Name (_UID, 0x02) // _UID: Unique ID
Name (_ADR, 0x00150002) // _ADR: Address
Method (_DEP, 0, NotSerialized) // _DEP: Dependencies
{
ADBG ("I2C1 DEP Call")
If (LEqual (S0ID, One))
{
ADBG ("I2C1 DEP")
Return (Package (0x01)
{
PEPD
})
}
Else
{
ADBG ("I2C1 DEP NULL")
Return (Package (0x00) {})
}
}
Method (SSCN, 0, NotSerialized)
{
Name (PKG, Package (0x03)
{
0x01B0,
0x01FB,
0x09
})
Store (SSH1, Index (PKG, Zero))
Store (SSL1, Index (PKG, One))
Store (SSD1, Index (PKG, 0x02))
Return (PKG) /* \_SB_.PCI0.I2C1.SSCN.PKG_ */
}
Method (FMCN, 0, NotSerialized)
{
Name (PKG, Package (0x03)
{
0x48,
0xA0,
0x09
})
Store (FMH1, Index (PKG, Zero))
Store (FML1, Index (PKG, One))
Store (FMD1, Index (PKG, 0x02))
Return (PKG) /* \_SB_.PCI0.I2C1.FMCN.PKG_ */
}
Method (FPCN, 0, NotSerialized)
{
Name (PKG, Package (0x03)
{
0x1A,
0x32,
0x05
})
Store (FPH1, Index (PKG, Zero))
Store (FPL1, Index (PKG, One))
Store (FPD1, Index (PKG, 0x02))
Return (PKG) /* \_SB_.PCI0.I2C1.FPCN.PKG_ */
}
Method (M0D3, 0, NotSerialized)
{
Name (PKG, Package (0x01)
{
0xC8
})
Store (M0C1, Index (PKG, Zero))
Return (PKG) /* \_SB_.PCI0.I2C1.M0D3.PKG_ */
}
Method (M1D3, 0, NotSerialized)
{
Name (PKG, Package (0x01)
{
0x07D0
})
Store (M1C1, Index (PKG, Zero))
Return (PKG) /* \_SB_.PCI0.I2C1.M1D3.PKG_ */
}
Method (M0D0, 0, NotSerialized)
{
Name (PKG, Package (0x01)
{
Zero
})
Store (M2C1, Index (PKG, Zero))
Return (PKG) /* \_SB_.PCI0.I2C1.M0D0.PKG_ */
}
Name (RBUF, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0xFE105000, // Address Base
0x00001000, // Address Length
_Y23)
Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, )
{
0x00000007,
}
})
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (DBUF, ResourceTemplate ()
{
FixedDMA (0x001A, 0x0006, Width32bit, )
FixedDMA (0x001B, 0x0007, Width32bit, )
})
If (LNotEqual (^^SDMA._STA (), Zero))
{
Return (ConcatenateResTemplate (RBUF, DBUF))
}
Else
{
Return (RBUF) /* \_SB_.PCI0.I2C1.RBUF */
}
}
Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision
{
Return (CRID) /* \_SB_.CRID */
}
CreateDWordField (RBUF, \_SB.PCI0.I2C1._Y23._BAS, BVAL) // _BAS: Base Address
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
Method (_PS0, 0, Serialized) // _PS0: Power State 0
{
ADBG ("I2C1 Ctrlr D0")
If (LNotEqual (^^SIRC.CNTR (0x03), Zero))
{
If (CondRefOf (\_SB.PCI0.I2C1.PS0X))
{
PS0X ()
}
Add (^^SIRC.CNTR (0x03), 0x84, Local0)
OperationRegion (ICB1, SystemMemory, Local0, 0x04)
Field (ICB1, DWordAcc, NoLock, Preserve)
{
TEMP, 32
}
And (TEMP, 0xFFFFFFFC, TEMP) /* \_SB_.PCI0.I2C1._PS0.TEMP */
Store (TEMP, Local0)
}
}
Method (_PS3, 0, Serialized) // _PS3: Power State 3
{
ADBG ("I2C1 Ctrlr D3")
If (LNotEqual (^^SIRC.CNTR (0x03), Zero))
{
Add (^^SIRC.CNTR (0x03), 0x84, Local0)
OperationRegion (ICB1, SystemMemory, Local0, 0x04)
Field (ICB1, DWordAcc, NoLock, Preserve)
{
TEMP, 32
}
Or (TEMP, 0x03, TEMP) /* \_SB_.PCI0.I2C1._PS3.TEMP */
Store (TEMP, Local0)
}
}
}
Device (SPI0)
{
Name (_HID, "INT33C0" /* Intel Serial I/O SPI Host Controller */) // _HID: Hardware ID
Name (_CID, "INT33C0" /* Intel Serial I/O SPI Host Controller */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (_ADR, 0x00150003) // _ADR: Address
Method (M0D3, 0, NotSerialized)
{
Name (PKG, Package (0x01)
{
0xC8
})
Store (M0C2, Index (PKG, Zero))
Return (PKG) /* \_SB_.PCI0.SPI0.M0D3.PKG_ */
}
Method (M1D3, 0, NotSerialized)
{
Name (PKG, Package (0x01)
{
0x07D0
})
Store (M1C2, Index (PKG, Zero))
Return (PKG) /* \_SB_.PCI0.SPI0.M1D3.PKG_ */
}
Name (RBUF, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00001000, // Address Length
_Y24)
Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, )
{
0x00000015,
}
})
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Return (RBUF) /* \_SB_.PCI0.SPI0.RBUF */
}
Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision
{
Return (CRID) /* \_SB_.CRID */
}
CreateDWordField (RBUF, \_SB.PCI0.SPI0._Y24._BAS, BVAL) // _BAS: Base Address
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (BVAL, Zero))
{
Return (Zero)
}
If (LLess (OSYS, 0x07DC))
{
Return (Zero)
}
If (LEqual (S0ID, One))
{
Return (0x0F)
}
Return (Zero)
}
Method (_PS0, 0, Serialized) // _PS0: Power State 0
{
ADBG ("SPI0 Ctrlr D0")
If (LNotEqual (^^SIRC.CNTR (0x04), Zero))
{
Add (^^SIRC.CNTR (0x04), 0x84, Local0)
OperationRegion (ICB1, SystemMemory, Local0, 0x04)
Field (ICB1, DWordAcc, NoLock, Preserve)
{
TEMP, 32
}
And (TEMP, 0xFFFFFFFC, TEMP) /* \_SB_.PCI0.SPI0._PS0.TEMP */
Store (TEMP, Local0)
}
}
Method (_PS3, 0, Serialized) // _PS3: Power State 3
{
ADBG ("SPI0 Ctrlr D3")
If (LNotEqual (^^SIRC.CNTR (0x04), Zero))
{
Add (^^SIRC.CNTR (0x04), 0x84, Local0)
OperationRegion (ICB1, SystemMemory, Local0, 0x04)
Field (ICB1, DWordAcc, NoLock, Preserve)
{
TEMP, 32
}
Or (TEMP, 0x03, TEMP) /* \_SB_.PCI0.SPI0._PS3.TEMP */
Store (TEMP, Local0)
}
}
}
Device (SPI1)
{
Name (_HID, "INT33C1" /* Intel Serial I/O SPI Host Controller */) // _HID: Hardware ID
Name (_CID, "INT33C1" /* Intel Serial I/O SPI Host Controller */) // _CID: Compatible ID
Name (_UID, 0x02) // _UID: Unique ID
Name (_ADR, 0x00150004) // _ADR: Address
Method (M0D3, 0, NotSerialized)
{
Name (PKG, Package (0x01)
{
0xC8
})
Store (M0C3, Index (PKG, Zero))
Return (PKG) /* \_SB_.PCI0.SPI1.M0D3.PKG_ */
}
Method (M1D3, 0, NotSerialized)
{
Name (PKG, Package (0x01)
{
0x07D0
})
Store (M1C3, Index (PKG, Zero))
Return (PKG) /* \_SB_.PCI0.SPI1.M1D3.PKG_ */
}
Name (RBUF, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00001000, // Address Length
_Y25)
Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, )
{
0x00000015,
}
})
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (DBUF, ResourceTemplate ()
{
FixedDMA (0x0010, 0x0000, Width32bit, )
FixedDMA (0x0011, 0x0001, Width32bit, )
})
If (LNotEqual (^^SDMA._STA (), Zero))
{
Return (ConcatenateResTemplate (RBUF, DBUF))
}
Else
{
Return (RBUF) /* \_SB_.PCI0.SPI1.RBUF */
}
}
Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision
{
Return (CRID) /* \_SB_.CRID */
}
CreateDWordField (RBUF, \_SB.PCI0.SPI1._Y25._BAS, BVAL) // _BAS: Base Address
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (BVAL, Zero))
{
Return (Zero)
}
If (LLess (OSYS, 0x07DC))
{
Return (Zero)
}
If (LEqual (S0ID, One))
{
Return (0x0F)
}
Return (Zero)
}
Method (_PS0, 0, Serialized) // _PS0: Power State 0
{
ADBG ("SPI1 Ctrlr D0")
If (LNotEqual (^^SIRC.CNTR (0x05), Zero))
{
Add (^^SIRC.CNTR (0x05), 0x84, Local0)
OperationRegion (ICB1, SystemMemory, Local0, 0x04)
Field (ICB1, DWordAcc, NoLock, Preserve)
{
TEMP, 32
}
And (TEMP, 0xFFFFFFFC, TEMP) /* \_SB_.PCI0.SPI1._PS0.TEMP */
Store (TEMP, Local0)
}
}
Method (_PS3, 0, Serialized) // _PS3: Power State 3
{
ADBG ("SPI1 Ctrlr D3")
If (LNotEqual (^^SIRC.CNTR (0x05), Zero))
{
Add (^^SIRC.CNTR (0x05), 0x84, Local0)
OperationRegion (ICB1, SystemMemory, Local0, 0x04)
Field (ICB1, DWordAcc, NoLock, Preserve)
{
TEMP, 32
}
Or (TEMP, 0x03, TEMP) /* \_SB_.PCI0.SPI1._PS3.TEMP */
Store (TEMP, Local0)
}
}
}
Device (UA00)
{
Name (_HID, "INT33C4" /* Intel Serial I/O UART Host Controller */) // _HID: Hardware ID
Name (_CID, "INT33C4" /* Intel Serial I/O UART Host Controller */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (_ADR, 0x00150005) // _ADR: Address
Method (_DEP, 0, NotSerialized) // _DEP: Dependencies
{
ADBG ("UA00 DEP Call")
If (LEqual (S0ID, One))
{
ADBG ("UA00 DEP")
Return (Package (0x01)
{
PEPD
})
}
Else
{
ADBG ("UA00 DEP NULL")
Return (Package (0x00) {})
}
}
Method (M0D3, 0, NotSerialized)
{
Name (PKG, Package (0x01)
{
0xC8
})
Store (M0C4, Index (PKG, Zero))
Return (PKG) /* \_SB_.PCI0.UA00.M0D3.PKG_ */
}
Method (M1D3, 0, NotSerialized)
{
Name (PKG, Package (0x01)
{
0xC8
})
Store (M1C4, Index (PKG, Zero))
Return (PKG) /* \_SB_.PCI0.UA00.M1D3.PKG_ */
}
Name (RBUF, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00001000, // Address Length
_Y26)
Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, )
{
0x00000015,
}
})
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Return (RBUF) /* \_SB_.PCI0.UA00.RBUF */
}
Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision
{
Return (CRID) /* \_SB_.CRID */
}
CreateDWordField (RBUF, \_SB.PCI0.UA00._Y26._BAS, BVAL) // _BAS: Base Address
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (BVAL, Zero))
{
Return (Zero)
}
If (LLess (OSYS, 0x07DC))
{
Return (Zero)
}
If (LEqual (S0ID, One))
{
Return (0x0F)
}
Return (Zero)
}
Method (_PS0, 0, Serialized) // _PS0: Power State 0
{
ADBG ("UAR0 Ctrlr D0")
If (LNotEqual (^^SIRC.CNTR (0x06), Zero))
{
Add (^^SIRC.CNTR (0x06), 0x84, Local0)
OperationRegion (ICB1, SystemMemory, Local0, 0x04)
Field (ICB1, DWordAcc, NoLock, Preserve)
{
TEMP, 32
}
And (TEMP, 0xFFFFFFFC, TEMP) /* \_SB_.PCI0.UA00._PS0.TEMP */
Store (TEMP, Local0)
}
}
Method (_PS3, 0, Serialized) // _PS3: Power State 3
{
ADBG ("UAR0 Ctrlr D3")
If (LNotEqual (^^SIRC.CNTR (0x06), Zero))
{
Add (^^SIRC.CNTR (0x06), 0x84, Local0)
OperationRegion (ICB1, SystemMemory, Local0, 0x04)
Field (ICB1, DWordAcc, NoLock, Preserve)
{
TEMP, 32
}
Or (TEMP, 0x03, TEMP) /* \_SB_.PCI0.UA00._PS3.TEMP */
Store (TEMP, Local0)
}
}
}
Device (UA01)
{
Name (_HID, "INT33C5" /* Intel Serial I/O UART Host Controller */) // _HID: Hardware ID
Name (_CID, "INT33C5" /* Intel Serial I/O UART Host Controller */) // _CID: Compatible ID
Name (_UID, 0x02) // _UID: Unique ID
Name (_ADR, 0x00150006) // _ADR: Address
Method (_DEP, 0, NotSerialized) // _DEP: Dependencies
{
ADBG ("UA01 DEP Call")
If (LEqual (S0ID, One))
{
ADBG ("UA01 DEP")
Return (Package (0x01)
{
PEPD
})
}
Else
{
ADBG ("UA01 DEP NULL")
Return (Package (0x00) {})
}
}
Method (M0D3, 0, NotSerialized)
{
Name (PKG, Package (0x01)
{
0xC8
})
Store (M0C5, Index (PKG, Zero))
Return (PKG) /* \_SB_.PCI0.UA01.M0D3.PKG_ */
}
Method (M1D3, 0, NotSerialized)
{
Name (PKG, Package (0x01)
{
0xC8
})
Store (M1C5, Index (PKG, Zero))
Return (PKG) /* \_SB_.PCI0.UA01.M1D3.PKG_ */
}
Name (RBUF, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00001000, // Address Length
_Y27)
Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, )
{
0x00000015,
}
})
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (DBUF, ResourceTemplate ()
{
FixedDMA (0x0016, 0x0002, Width32bit, )
FixedDMA (0x0017, 0x0003, Width32bit, )
})
If (LNotEqual (^^SDMA._STA (), Zero))
{
Return (ConcatenateResTemplate (RBUF, DBUF))
}
Else
{
Return (RBUF) /* \_SB_.PCI0.UA01.RBUF */
}
}
Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision
{
Return (CRID) /* \_SB_.CRID */
}
CreateDWordField (RBUF, \_SB.PCI0.UA01._Y27._BAS, BVAL) // _BAS: Base Address
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (BVAL, Zero))
{
Return (Zero)
}
If (LLess (OSYS, 0x07DC))
{
Return (Zero)
}
If (LEqual (S0ID, One))
{
Return (0x0F)
}
Return (Zero)
}
Method (_PS0, 0, Serialized) // _PS0: Power State 0
{
ADBG ("UAR1 Ctrlr D0")
If (LNotEqual (^^SIRC.CNTR (0x07), Zero))
{
Add (^^SIRC.CNTR (0x07), 0x84, Local0)
OperationRegion (ICB1, SystemMemory, Local0, 0x04)
Field (ICB1, DWordAcc, NoLock, Preserve)
{
TEMP, 32
}
And (TEMP, 0xFFFFFFFC, TEMP) /* \_SB_.PCI0.UA01._PS0.TEMP */
Store (TEMP, Local0)
}
}
Method (_PS3, 0, Serialized) // _PS3: Power State 3
{
ADBG ("UAR1 Ctrlr D3")
If (LNotEqual (^^SIRC.CNTR (0x07), Zero))
{
Add (^^SIRC.CNTR (0x07), 0x84, Local0)
OperationRegion (ICB1, SystemMemory, Local0, 0x04)
Field (ICB1, DWordAcc, NoLock, Preserve)
{
TEMP, 32
}
Or (TEMP, 0x03, TEMP) /* \_SB_.PCI0.UA01._PS3.TEMP */
Store (TEMP, Local0)
}
}
}
Device (SDHC)
{
Name (_HID, "INT33C6" /* Intel SD Host Controller */) // _HID: Hardware ID
Name (_CID, "PNP0D40" /* SDA Standard Compliant SD Host Controller */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (_ADR, 0x00170000) // _ADR: Address
Method (_DEP, 0, NotSerialized) // _DEP: Dependencies
{
ADBG ("SDHC DEP Call")
If (LEqual (S0ID, One))
{
ADBG ("SDHC DEP")
Return (Package (0x01)
{
PEPD
})
}
Else
{
ADBG ("SDHC DEP NULL")
Return (Package (0x00) {})
}
}
Name (RBUF, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00001000, // Address Length
_Y28)
Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, )
{
0x00000016,
}
})
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Return (RBUF) /* \_SB_.PCI0.SDHC.RBUF */
}
CreateDWordField (RBUF, \_SB.PCI0.SDHC._Y28._BAS, BVAL) // _BAS: Base Address
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (BVAL, Zero))
{
Return (Zero)
}
If (LLess (OSYS, 0x07DC))
{
Return (Zero)
}
If (LEqual (S0ID, One))
{
Return (0x0F)
}
Return (Zero)
}
Method (_PS0, 0, Serialized) // _PS0: Power State 0
{
ADBG ("SDHC Ctrlr D0")
If (LNotEqual (^^SIRC.CNTR (0x08), Zero))
{
Add (^^SIRC.CNTR (0x08), 0x84, Local0)
OperationRegion (ICB1, SystemMemory, Local0, 0x04)
Field (ICB1, DWordAcc, NoLock, Preserve)
{
TEMP, 32
}
And (TEMP, 0xFFFFFFFC, TEMP) /* \_SB_.PCI0.SDHC._PS0.TEMP */
Store (TEMP, Local0)
}
If (CondRefOf (\_SB.PCI0.SDHC.PS0X))
{
PS0X ()
}
}
Method (_PS3, 0, Serialized) // _PS3: Power State 3
{
ADBG ("SDHC Ctrlr D3")
If (LNotEqual (^^SIRC.CNTR (0x08), Zero))
{
Add (^^SIRC.CNTR (0x08), 0x84, Local0)
OperationRegion (ICB1, SystemMemory, Local0, 0x04)
Field (ICB1, DWordAcc, NoLock, Preserve)
{
TEMP, 32
}
Or (TEMP, 0x03, TEMP) /* \_SB_.PCI0.SDHC._PS3.TEMP */
Store (TEMP, Local0)
}
}
}
}
Scope (\_SB.PCI0)
{
}
Scope (I2C0)
{
Name (_S0W, 0x03) // _S0W: S0 Device Wake State
Device (ACD0)
{
Name (_ADR, 0x1C) // _ADR: Address
Name (_HID, "INT33CA" /* Intel SPB Peripheral */) // _HID: Hardware ID
Name (_CID, "INT33CA" /* Intel SPB Peripheral */) // _CID: Compatible ID
Name (_DDN, "Intel(R) Smart Sound Technology Audio Codec - INT33CA") // _DDN: DOS Device Name
Name (_UID, One) // _UID: Unique ID
Name (MCLK, Zero)
Name (SCLK, 0x09)
Name (SSPM, Zero)
Name (RBUF, ResourceTemplate ()
{
I2cSerialBus (0x001C, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C0",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake, ,, )
{
0x00000025,
}
})
Name (EOD, One)
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Return (RBUF) /* \_SB_.PCI0.I2C0.ACD0.RBUF */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
Store (One, EOD) /* \_SB_.PCI0.I2C0.ACD0.EOD_ */
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LOr (LNotEqual (CODS, Zero), LNotEqual (ADSD, Zero)))
{
Return (Zero)
}
If (And (EOD, One, EOD) /* \_SB_.PCI0.I2C0.ACD0.EOD_ */)
{
Return (0x0F)
}
Else
{
Return (0x0D)
}
}
Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
{
Store (Zero, EOD) /* \_SB_.PCI0.I2C0.ACD0.EOD_ */
}
}
Device (ACD1)
{
Name (_ADR, 0x4A) // _ADR: Address
Name (_HID, "INT33C9" /* Wolfson Microelectronics Audio WM5102 */) // _HID: Hardware ID
Name (_CID, "INT33C9" /* Wolfson Microelectronics Audio WM5102 */) // _CID: Compatible ID
Name (_DDN, "Intel(R) Smart Sound Technology Audio Codec - INT33C9") // _DDN: DOS Device Name
Name (_UID, One) // _UID: Unique ID
Name (MCLK, 0x06)
Name (SCLK, Zero)
Name (SSPM, One)
Name (RBUF, ResourceTemplate ()
{
I2cSerialBus (0x004A, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C0",
0x00, ResourceConsumer, ,
)
})
Name (EOD, One)
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Store (One, EOD) /* \_SB_.PCI0.I2C0.ACD1.EOD_ */
Return (RBUF) /* \_SB_.PCI0.I2C0.ACD1.RBUF */
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LOr (LNotEqual (CODS, One), LNotEqual (ADSD, Zero)))
{
Return (Zero)
}
If (And (EOD, One, EOD) /* \_SB_.PCI0.I2C0.ACD1.EOD_ */)
{
Return (0x0F)
}
Else
{
Return (0x0D)
}
}
Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
{
Store (Zero, EOD) /* \_SB_.PCI0.I2C0.ACD1.EOD_ */
}
}
Device (ACD2)
{
Name (_ADR, 0x69) // _ADR: Address
Name (_HID, "INT33CB" /* Intel Smart Sound Technology Audio Codec */) // _HID: Hardware ID
Name (_CID, "INT33CB" /* Intel Smart Sound Technology Audio Codec */) // _CID: Compatible ID
Name (_DDN, "Intel(R) Smart Sound Technology Audio Codec - INT33CB") // _DDN: DOS Device Name
Name (_UID, One) // _UID: Unique ID
Name (MCLK, 0x18)
Name (SCLK, 0x09)
Name (SSPM, Zero)
Name (RBUF, ResourceTemplate ()
{
I2cSerialBus (0x0069, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C0",
0x00, ResourceConsumer, ,
)
GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionInputOnly,
"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,
)
{ // Pin list
0x0033
}
GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionInputOnly,
"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,
)
{ // Pin list
0x0035
}
Interrupt (ResourceConsumer, Edge, ActiveHigh, ExclusiveAndWake, ,, )
{
0x00000023,
}
Interrupt (ResourceConsumer, Edge, ActiveHigh, ExclusiveAndWake, ,, )
{
0x00000025,
}
})
Name (EOD, One)
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Return (RBUF) /* \_SB_.PCI0.I2C0.ACD2.RBUF */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
Store (One, EOD) /* \_SB_.PCI0.I2C0.ACD2.EOD_ */
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LOr (LNotEqual (CODS, 0x02), LNotEqual (ADSD, Zero)))
{
Return (Zero)
}
If (And (EOD, One, EOD) /* \_SB_.PCI0.I2C0.ACD2.EOD_ */)
{
Return (0x0F)
}
Else
{
Return (0x0D)
}
}
Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
{
Store (Zero, EOD) /* \_SB_.PCI0.I2C0.ACD2.EOD_ */
}
}
Device (SHUB)
{
Name (_HID, "INT33D1" /* Intel GPIO Buttons */) // _HID: Hardware ID
Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID
Name (_ADR, Zero) // _ADR: Address
Name (_UID, One) // _UID: Unique ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LNotEqual (And (SDS0, One), One))
{
Return (Zero)
}
If (LAnd (LEqual (RDGP (0x2C), One), LEqual (_HID, "INT33D1")))
{
Return (0x0F)
}
If (LAnd (LEqual (RDGP (0x2C), Zero), LEqual (_HID, "INT33D7")))
{
Return (0x0F)
}
Return (Zero)
}
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If (LEqual (Arg0, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */))
{
If (LEqual (Arg2, Zero))
{
If (LEqual (Arg1, One))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
}
If (LEqual (Arg2, One))
{
Return (One)
}
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (SBFI, ResourceTemplate ()
{
I2cSerialBus (0x0040, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C0",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, )
{
0x0000001C,
}
})
Return (SBFI) /* \_SB_.PCI0.I2C0.SHUB._CRS.SBFI */
}
}
Device (DFUD)
{
Name (_HID, "INT33D7") // _HID: Hardware ID
Name (_ADR, Zero) // _ADR: Address
Name (_UID, One) // _UID: Unique ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LNotEqual (And (SDS0, One), One))
{
Return (Zero)
}
If (LAnd (LEqual (RDGP (0x2C), One), LEqual (_HID, "INT33D1")))
{
Return (0x0F)
}
If (LAnd (LEqual (RDGP (0x2C), Zero), LEqual (_HID, "INT33D7")))
{
Return (0x0F)
}
Return (Zero)
}
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If (LEqual (Arg0, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */))
{
If (LEqual (Arg2, Zero))
{
If (LEqual (Arg1, One))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
}
If (LEqual (Arg2, One))
{
Return (One)
}
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (SBFI, ResourceTemplate ()
{
I2cSerialBus (0x0040, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C0",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, )
{
0x0000001C,
}
})
Return (SBFI) /* \_SB_.PCI0.I2C0.DFUD._CRS.SBFI */
}
}
Device (TPD4)
{
Name (_ADR, Zero) // _ADR: Address
Name (_HID, "MSFT1111") // _HID: Hardware ID
Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If (LEqual (Arg0, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */))
{
If (LEqual (Arg2, Zero))
{
If (LEqual (Arg1, One))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
}
If (LEqual (Arg2, One))
{
Return (One)
}
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (And (SDS0, 0x04), 0x04))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (SBFI, ResourceTemplate ()
{
I2cSerialBus (0x0060, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C0",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, )
{
0x0000001C,
}
})
Return (SBFI) /* \_SB_.PCI0.I2C0.TPD4._CRS.SBFI */
}
Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
{
Return (Package (0x02)
{
0x0E,
0x04
})
}
Method (_S3W, 0, NotSerialized) // _S3W: S3 Device Wake State
{
Return (0x03)
}
Method (_S4W, 0, NotSerialized) // _S4W: S4 Device Wake State
{
Return (0x03)
}
Method (_PS0, 0, Serialized) // _PS0: Power State 0
{
ADBG ("TPD4 Ctrlr D0")
WTIN (0x0E, Zero)
Store (One, GO14) /* \GO14 */
}
Method (_PS3, 0, Serialized) // _PS3: Power State 3
{
ADBG ("TPD4 Ctrlr D3")
WTIN (0x0E, One)
Store (Zero, GO14) /* \GO14 */
}
}
}
Scope (I2C1)
{
Name (_S0W, 0x03) // _S0W: S0 Device Wake State
Device (TPL0)
{
Name (_ADR, Zero) // _ADR: Address
Name (_HID, "ATML1000" /* Atmel Touchscreen Controller */) // _HID: Hardware ID
Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (_S0W, 0x04) // _S0W: S0 Device Wake State
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If (LEqual (Arg0, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */))
{
If (LEqual (Arg2, Zero))
{
If (LEqual (Arg1, One))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
If (LEqual (Arg2, One))
{
Return (Zero)
}
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (And (SDS1, One), One))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (SBFI, ResourceTemplate ()
{
I2cSerialBus (0x004C, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C1",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, )
{
0x00000022,
}
})
Return (SBFI) /* \_SB_.PCI0.I2C1.TPL0._CRS.SBFI */
}
}
Device (TPFU)
{
Name (_ADR, Zero) // _ADR: Address
Name (_HID, "ATML2000") // _HID: Hardware ID
Name (_CID, "PNP0C02" /* PNP Motherboard Resources */) // _CID: Compatible ID
Name (_UID, 0x0A) // _UID: Unique ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LAnd (And (SDS1, One), And (APFU, One)))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (SBFI, ResourceTemplate ()
{
I2cSerialBus (0x0026, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C1",
0x00, ResourceConsumer, ,
)
I2cSerialBus (0x0027, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C1",
0x00, ResourceConsumer, ,
)
})
Return (SBFI) /* \_SB_.PCI0.I2C1.TPFU._CRS.SBFI */
}
}
Device (TPL1)
{
Name (_HID, "ELAN1001") // _HID: Hardware ID
Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (_S0W, 0x04) // _S0W: S0 Device Wake State
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If (LEqual (Arg0, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */))
{
If (LEqual (Arg2, Zero))
{
If (LEqual (Arg1, One))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
If (LEqual (Arg2, One))
{
Return (One)
}
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (And (SDS1, 0x02), 0x02))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (SBFI, ResourceTemplate ()
{
I2cSerialBus (0x0010, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C1",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, )
{
0x00000022,
}
})
Return (SBFI) /* \_SB_.PCI0.I2C1.TPL1._CRS.SBFI */
}
}
Device (TPL2)
{
Name (_ADR, One) // _ADR: Address
Name (_HID, "NTRG0001") // _HID: Hardware ID
Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (_S0W, 0x04) // _S0W: S0 Device Wake State
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If (LEqual (Arg0, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */))
{
If (LEqual (Arg2, Zero))
{
If (LEqual (Arg1, One))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
If (LEqual (Arg2, One))
{
Return (One)
}
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (And (SDS1, 0x20), 0x20))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (SBFI, ResourceTemplate ()
{
I2cSerialBus (0x0007, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C1",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, )
{
0x00000022,
}
})
Return (SBFI) /* \_SB_.PCI0.I2C1.TPL2._CRS.SBFI */
}
}
Device (TPL3)
{
Name (_ADR, One) // _ADR: Address
Name (_HID, "EETI7900") // _HID: Hardware ID
Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (_S0W, 0x04) // _S0W: S0 Device Wake State
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If (LEqual (Arg0, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */))
{
If (LEqual (Arg2, Zero))
{
If (LEqual (Arg1, One))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
If (LEqual (Arg2, One))
{
Return (0x0F)
}
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (And (SDS1, 0x40), 0x40))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (SBFI, ResourceTemplate ()
{
I2cSerialBus (0x002A, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C1",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, )
{
0x00000022,
}
})
Return (SBFI) /* \_SB_.PCI0.I2C1.TPL3._CRS.SBFI */
}
}
Device (TPD0)
{
Name (_ADR, One) // _ADR: Address
Name (_HID, "ELAN1000") // _HID: Hardware ID
Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (_S0W, 0x04) // _S0W: S0 Device Wake State
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If (LEqual (Arg0, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */))
{
If (LEqual (Arg2, Zero))
{
If (LEqual (Arg1, One))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
If (LEqual (Arg2, One))
{
Return (One)
}
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (And (SDS1, 0x04), 0x04))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (SBFI, ResourceTemplate ()
{
I2cSerialBus (0x0015, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C1",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, _Y29)
{
0x00000027,
}
})
If (LEqual (GR13, One))
{
CreateByteField (SBFI, \_SB.PCI0.I2C1.TPD0._CRS._Y29._INT, VAL3) // _INT: Interrupts
Store (0x1B, VAL3) /* \_SB_.PCI0.I2C1.TPD0._CRS.VAL3 */
}
Return (SBFI) /* \_SB_.PCI0.I2C1.TPD0._CRS.SBFI */
}
}
Device (TPD1)
{
Name (_ADR, One) // _ADR: Address
Name (_HID, "MSFT0001") // _HID: Hardware ID
Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (_S0W, 0x04) // _S0W: S0 Device Wake State
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If (LEqual (Arg0, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */))
{
If (LEqual (Arg2, Zero))
{
If (LEqual (Arg1, One))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
If (LEqual (Arg2, One))
{
Return (0x20)
}
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (And (SDS1, 0x08), 0x08))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (SBFI, ResourceTemplate ()
{
I2cSerialBus (0x0020, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C1",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, _Y2A)
{
0x00000027,
}
})
If (LEqual (GR13, One))
{
CreateByteField (SBFI, \_SB.PCI0.I2C1.TPD1._CRS._Y2A._INT, VAL3) // _INT: Interrupts
Store (0x1B, VAL3) /* \_SB_.PCI0.I2C1.TPD1._CRS.VAL3 */
}
Return (SBFI) /* \_SB_.PCI0.I2C1.TPD1._CRS.SBFI */
}
}
Device (TPD2)
{
Name (_ADR, One) // _ADR: Address
Name (_HID, "ALP0001") // _HID: Hardware ID
Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (_S0W, 0x04) // _S0W: S0 Device Wake State
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If (LEqual (Arg0, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */))
{
If (LEqual (Arg2, Zero))
{
If (LEqual (Arg1, One))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
If (LEqual (Arg2, One))
{
Return (One)
}
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (And (SDS1, 0x80), 0x80))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (SBFI, ResourceTemplate ()
{
I2cSerialBus (0x002A, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C1",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, _Y2B)
{
0x00000027,
}
})
If (LEqual (GR13, One))
{
CreateByteField (SBFI, \_SB.PCI0.I2C1.TPD2._CRS._Y2B._INT, VAL3) // _INT: Interrupts
Store (0x1B, VAL3) /* \_SB_.PCI0.I2C1.TPD2._CRS.VAL3 */
}
Return (SBFI) /* \_SB_.PCI0.I2C1.TPD2._CRS.SBFI */
}
}
Device (TPD3)
{
Name (_ADR, One) // _ADR: Address
Name (_HID, "CYP0001") // _HID: Hardware ID
Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (_S0W, 0x04) // _S0W: S0 Device Wake State
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If (LEqual (Arg0, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */))
{
If (LEqual (Arg2, Zero))
{
If (LEqual (Arg1, One))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
If (LEqual (Arg2, One))
{
Return (One)
}
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (And (SDS1, 0x0100), 0x0100))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (SBFI, ResourceTemplate ()
{
I2cSerialBus (0x0024, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C1",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, _Y2C)
{
0x00000027,
}
})
If (LEqual (GR13, One))
{
CreateByteField (SBFI, \_SB.PCI0.I2C1.TPD3._CRS._Y2C._INT, VAL3) // _INT: Interrupts
Store (0x1B, VAL3) /* \_SB_.PCI0.I2C1.TPD3._CRS.VAL3 */
}
Return (SBFI) /* \_SB_.PCI0.I2C1.TPD3._CRS.SBFI */
}
}
Device (TPD7)
{
Name (_ADR, One) // _ADR: Address
Name (_HID, "ELAN1010") // _HID: Hardware ID
Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (_S0W, 0x03) // _S0W: S0 Device Wake State
Method (_S3W, 0, NotSerialized) // _S3W: S3 Device Wake State
{
If (LEqual (S0ID, Zero))
{
Return (0x03)
}
Else
{
Return (Zero)
}
}
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If (LEqual (Arg0, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */))
{
If (LEqual (Arg2, Zero))
{
If (LEqual (Arg1, One))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
If (LEqual (Arg2, One))
{
Return (One)
}
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (And (SDS1, 0x0800), 0x0800))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (SBFI, ResourceTemplate ()
{
I2cSerialBus (0x0015, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C1",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake, ,, _Y2D)
{
0x00000027,
}
})
If (LEqual (GR13, One))
{
CreateByteField (SBFI, \_SB.PCI0.I2C1.TPD7._CRS._Y2D._INT, VAL3) // _INT: Interrupts
Store (0x1B, VAL3) /* \_SB_.PCI0.I2C1.TPD7._CRS.VAL3 */
If (LEqual (S0ID, Zero))
{
CreateByteField (SBFI, 0x24, VAL4)
And (VAL4, 0xE7, VAL4) /* \_SB_.PCI0.I2C1.TPD7._CRS.VAL4 */
}
}
Return (SBFI) /* \_SB_.PCI0.I2C1.TPD7._CRS.SBFI */
}
Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
{
If (LAnd (LEqual (S0ID, Zero), LEqual (GR13, One)))
{
Return (Package (0x02)
{
0x0D,
0x03
})
}
Return (Package (0x02)
{
Zero,
Zero
})
}
Method (_PS0, 0, Serialized) // _PS0: Power State 0
{
ADBG ("TPD7 Ctrlr D0")
If (LAnd (LEqual (S0ID, Zero), LEqual (GR13, One)))
{
WTIN (0x0D, Zero)
Store (One, GO13) /* \GO13 */
}
If (CondRefOf (\_SB.PCI0.I2C1.TPD7.PS0X))
{
PS0X ()
}
}
Method (_PS3, 0, Serialized) // _PS3: Power State 3
{
ADBG ("TPD7 Ctrlr D3")
If (LAnd (LEqual (S0ID, Zero), LEqual (GR13, One)))
{
WTIN (0x0D, One)
Store (Zero, GO13) /* \GO13 */
}
}
}
Device (TPD8)
{
Name (_ADR, One) // _ADR: Address
Name (_HID, "SYNA2393") // _HID: Hardware ID
Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (_S0W, 0x03) // _S0W: S0 Device Wake State
Method (_S3W, 0, NotSerialized) // _S3W: S3 Device Wake State
{
If (LEqual (S0ID, Zero))
{
Return (0x03)
}
Else
{
Return (Zero)
}
}
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If (LEqual (Arg0, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */))
{
If (LEqual (Arg2, Zero))
{
If (LEqual (Arg1, One))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
If (LEqual (Arg2, One))
{
Return (0x20)
}
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (And (SDS1, 0x1000), 0x1000))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (SBFI, ResourceTemplate ()
{
I2cSerialBus (0x0020, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C1",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake, ,, _Y2E)
{
0x00000027,
}
})
If (LEqual (GR13, One))
{
CreateByteField (SBFI, \_SB.PCI0.I2C1.TPD8._CRS._Y2E._INT, VAL3) // _INT: Interrupts
Store (0x1B, VAL3) /* \_SB_.PCI0.I2C1.TPD8._CRS.VAL3 */
If (LEqual (S0ID, Zero))
{
CreateByteField (SBFI, 0x24, VAL4)
And (VAL4, 0xE7, VAL4) /* \_SB_.PCI0.I2C1.TPD8._CRS.VAL4 */
}
}
Return (SBFI) /* \_SB_.PCI0.I2C1.TPD8._CRS.SBFI */
}
Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
{
If (LAnd (LEqual (S0ID, Zero), LEqual (GR13, One)))
{
Return (Package (0x02)
{
0x0D,
0x03
})
}
Return (Package (0x02)
{
Zero,
Zero
})
}
Method (_PS0, 0, Serialized) // _PS0: Power State 0
{
ADBG ("TPD8 Ctrlr D0")
If (LAnd (LEqual (S0ID, Zero), LEqual (GR13, One)))
{
WTIN (0x0D, Zero)
Store (One, GO13) /* \GO13 */
}
If (CondRefOf (\_SB.PCI0.I2C1.TPD8.PS0X))
{
PS0X ()
}
}
Method (_PS3, 0, Serialized) // _PS3: Power State 3
{
ADBG ("TPD8 Ctrlr D3")
If (LAnd (LEqual (S0ID, Zero), LEqual (GR13, One)))
{
WTIN (0x0D, One)
Store (Zero, GO13) /* \GO13 */
}
}
}
}
Scope (SPI0)
{
}
Scope (SPI1)
{
}
Scope (UA00)
{
Device (BTH0)
{
Name (_HID, "INT33E0") // _HID: Hardware ID
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (UBUF, ResourceTemplate ()
{
UartSerialBus (0x0001C200, DataBitsEight, StopBitsOne,
0xC0, LittleEndian, ParityTypeNone, FlowControlHardware,
0x0020, 0x0020, "\\_SB.PCI0.UA00",
0x00, ResourceConsumer, ,
)
})
Return (UBUF) /* \_SB_.PCI0.UA00.BTH0._CRS.UBUF */
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (And (SDS4, One), One))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
}
Scope (UA01)
{
Device (BTH1)
{
Name (_HID, "INT33E0") // _HID: Hardware ID
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (UBUF, ResourceTemplate ()
{
UartSerialBus (0x0001C200, DataBitsEight, StopBitsOne,
0xC0, LittleEndian, ParityTypeNone, FlowControlHardware,
0x0020, 0x0020, "\\_SB.PCI0.UA01",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Level, ActiveLow, SharedAndWake, ,, )
{
0x00000019,
}
GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,
"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,
)
{ // Pin list
0x0057
}
})
Return (UBUF) /* \_SB_.PCI0.UA01.BTH1._CRS.UBUF */
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (And (SDS5, One), One))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
Device (BTH2)
{
Method (_HID, 0, NotSerialized) // _HID: Hardware ID
{
If (LEqual (BCV4, Zero))
{
Return ("BCM2E20")
}
Else
{
Return ("BCM2E40")
}
}
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (UBUF, ResourceTemplate ()
{
UartSerialBus (0x0001C200, DataBitsEight, StopBitsOne,
0xC0, LittleEndian, ParityTypeNone, FlowControlHardware,
0x0020, 0x0020, "\\_SB.PCI0.UA01",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Edge, ActiveLow, Exclusive, ,, )
{
0x00000019,
}
GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,
"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,
)
{ // Pin list
0x0039
}
GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,
"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,
)
{ // Pin list
0x0057
}
})
Return (UBUF) /* \_SB_.PCI0.UA01.BTH2._CRS.UBUF */
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (And (SDS5, 0x02), 0x02))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Name (_S0W, 0x02) // _S0W: S0 Device Wake State
}
}
Scope (I2C0)
{
Device (SAM)
{
Name (_DEP, Package (0x01) // _DEP: Dependencies
{
^^SBRG.EC0
})
Name (_ADR, Zero) // _ADR: Address
Name (_HID, "MSHW0030") // _HID: Hardware ID
Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If (LEqual (Arg0, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */))
{
If (LEqual (Arg2, Zero))
{
If (LEqual (Arg1, One))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
If (LEqual (Arg2, One))
{
Return (One)
}
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (SBF0, ResourceTemplate ()
{
I2cSerialBus (0x0028, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C0",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
{
0x0000001C,
}
})
\_GPE._L0A ()
Return (SBF0) /* \_SB_.PCI0.I2C0.SAM_._CRS.SBF0 */
}
Name (DDBH, Zero)
Name (HRVX, 0x1001)
Name (HIDX, "MSHW0034")
Name (SUBX, "MSAY0001")
Name (AIRB, Zero)
Method (LATB, 0, NotSerialized)
{
If (LEqual (DDBH, Zero))
{
Store (LoadTable ("WDSA", "OEMC", "ACTABL", "", "", Zero), Local0)
Store (ToInteger (Local0), DDBH) /* \_SB_.PCI0.I2C0.SAM_.DDBH */
If (LNotEqual (DDBH, Zero))
{
Notify (ACMU, One) // Device Check
}
}
}
Method (UATB, 0, NotSerialized)
{
If (LNotEqual (DDBH, Zero))
{
Notify (ACMU, One) // Device Check
Unload (DDBH)
Store (Zero, DDBH) /* \_SB_.PCI0.I2C0.SAM_.DDBH */
}
}
Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision
{
Name (TEM1, Zero)
Name (TEM2, Zero)
Name (SAMV, Zero)
Store (^^^SBRG.EC0.SMFV, TEM2) /* \_SB_.PCI0.I2C0.SAM_._HRV.TEM2 */
And (TEM2, 0xFF, TEM1) /* \_SB_.PCI0.I2C0.SAM_._HRV.TEM1 */
ShiftLeft (TEM1, 0x18, SAMV) /* \_SB_.PCI0.I2C0.SAM_._HRV.SAMV */
And (TEM2, 0xFF00, TEM1) /* \_SB_.PCI0.I2C0.SAM_._HRV.TEM1 */
ShiftLeft (TEM1, 0x08, TEM1) /* \_SB_.PCI0.I2C0.SAM_._HRV.TEM1 */
Or (SAMV, TEM1, SAMV) /* \_SB_.PCI0.I2C0.SAM_._HRV.SAMV */
And (TEM2, 0x00FF0000, TEM1) /* \_SB_.PCI0.I2C0.SAM_._HRV.TEM1 */
ShiftRight (TEM1, 0x08, TEM1) /* \_SB_.PCI0.I2C0.SAM_._HRV.TEM1 */
Or (SAMV, TEM1, SAMV) /* \_SB_.PCI0.I2C0.SAM_._HRV.SAMV */
And (TEM2, 0xFF000000, TEM1) /* \_SB_.PCI0.I2C0.SAM_._HRV.TEM1 */
ShiftRight (TEM1, 0x18, TEM1) /* \_SB_.PCI0.I2C0.SAM_._HRV.TEM1 */
Or (SAMV, TEM1, SAMV) /* \_SB_.PCI0.I2C0.SAM_._HRV.SAMV */
Return (SAMV) /* \_SB_.PCI0.I2C0.SAM_._HRV.SAMV */
}
}
Name (ACC1, ResourceTemplate ()
{
I2cSerialBus (0x0028, ControllerInitiated, 0x00061A80,
AddressingMode7Bit, "\\_SB.PCI0.I2C0",
0x00, ResourceConsumer, ,
)
})
OperationRegion (ACOP, GenericSerialBus, Zero, 0x0100)
Field (ACOP, BufferAcc, NoLock, Preserve)
{
Connection (ACC1),
Offset (0x54),
AccessAs (BufferAcc, AttribBytes (0x04)),
AREV, 32,
AccessAs (BufferAcc, AttribBytes (0x08)),
ASUB, 64
}
Name (BUFF, Buffer (0x0A) {})
CreateByteField (BUFF, Zero, STT)
CreateByteField (BUFF, One, LN)
CreateDWordField (BUFF, 0x02, DTD)
CreateField (BUFF, 0x10, 0x40, DBF)
}
Scope (I2C1)
{
PowerResource (TPWR, 0x00, 0x0000)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (RDGP (0x59), One))
{
Return (One)
}
Else
{
Return (Zero)
}
}
Method (_ON, 0, NotSerialized) // _ON_: Power On
{
WTGP (0x59, One)
Sleep (0x32)
Store (Zero, ^^TCH1.DXST) /* \_SB_.PCI0.I2C1.TCH1.DXST */
}
Method (_OFF, 0, NotSerialized) // _OFF: Power Off
{
WTGP (0x59, Zero)
Sleep (0x0A)
Store (0x03, ^^TCH1.DXST) /* \_SB_.PCI0.I2C1.TCH1.DXST */
}
}
Device (TCH1)
{
Name (_ADR, One) // _ADR: Address
Name (_HID, "NTRG0001") // _HID: Hardware ID
Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (_S0W, 0x04) // _S0W: S0 Device Wake State
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If (LEqual (Arg0, ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */))
{
If (LEqual (Arg2, Zero))
{
If (LEqual (Arg1, One))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
If (LEqual (Arg2, One))
{
Return (One)
}
}
Else
{
Return (Buffer (One)
{
0x00 /* . */
})
}
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (SBFI, ResourceTemplate ()
{
I2cSerialBus (0x0060, ControllerInitiated, 0x000F4240,
AddressingMode7Bit, "\\_SB.PCI0.I2C1",
0x00, ResourceConsumer, ,
)
Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, )
{
0x00000022,
}
})
Return (SBFI) /* \_SB_.PCI0.I2C1.TCH1._CRS.SBFI */
}
Name (DXST, Zero)
Method (_PSC, 0, Serialized) // _PSC: Power State Current
{
Return (DXST) /* \_SB_.PCI0.I2C1.TCH1.DXST */
}
Name (_PR0, Package (0x01) // _PR0: Power Resources for D0
{
TPWR
})
Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot
{
TPWR
})
Name (_PRE, Package (0x01) // _PRE: Power Resources for Enumeration
{
TPWR
})
}
}
Device (ADSP)
{
Name (_ADR, Zero) // _ADR: Address
Name (_HID, "INT33C8" /* Intel Smart Sound Technology Host Controller */) // _HID: Hardware ID
Name (_CID, "INT33C8" /* Intel Smart Sound Technology Host Controller */) // _CID: Compatible ID
Name (_DDN, "Intel(R) Smart Sound Technology Host Controller - INT33C8") // _DDN: DOS Device Name
Name (_UID, One) // _UID: Unique ID
Method (_DEP, 0, NotSerialized) // _DEP: Dependencies
{
ADBG ("ADSP DEP Call")
If (LEqual (S0ID, One))
{
ADBG ("ADSP DEP")
Return (Package (0x01)
{
PEPD
})
}
Else
{
ADBG ("ADSP DEP NULL")
Return (Package (0x00) {})
}
}
Name (MCLK, Zero)
Name (SCLK, 0x09)
Name (SSPM, Zero)
Name (ABTH, Zero)
Name (RBUF, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00100000, // Address Length
_Y2F)
Memory32Fixed (ReadWrite,
0x00000000, // Address Base
0x00001000, // Address Length
)
Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, )
{
0x00000003,
}
})
Name (EOD, One)
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
While (One)
{
Store (ToInteger (CODS), _T_0) /* \_SB_.PCI0.ADSP._CRS._T_0 */
If (LEqual (_T_0, Zero))
{
Store (^^I2C0.ACD0.MCLK, MCLK) /* \_SB_.PCI0.ADSP.MCLK */
Store (^^I2C0.ACD0.SCLK, SCLK) /* \_SB_.PCI0.ADSP.SCLK */
Store (^^I2C0.ACD0.SSPM, SSPM) /* \_SB_.PCI0.ADSP.SSPM */
}
Else
{
If (LEqual (_T_0, One))
{
Store (^^I2C0.ACD1.MCLK, MCLK) /* \_SB_.PCI0.ADSP.MCLK */
Store (^^I2C0.ACD1.SCLK, SCLK) /* \_SB_.PCI0.ADSP.SCLK */
Store (^^I2C0.ACD1.SSPM, SSPM) /* \_SB_.PCI0.ADSP.SSPM */
}
Else
{
If (LEqual (_T_0, 0x02))
{
Store (^^I2C0.ACD2.MCLK, MCLK) /* \_SB_.PCI0.ADSP.MCLK */
Store (^^I2C0.ACD2.SCLK, SCLK) /* \_SB_.PCI0.ADSP.SCLK */
Store (^^I2C0.ACD2.SSPM, SSPM) /* \_SB_.PCI0.ADSP.SSPM */
}
Else
{
Store (^^I2C0.ACD0.MCLK, MCLK) /* \_SB_.PCI0.ADSP.MCLK */
Store (^^I2C0.ACD0.SCLK, SCLK) /* \_SB_.PCI0.ADSP.SCLK */
Store (^^I2C0.ACD0.SSPM, SSPM) /* \_SB_.PCI0.ADSP.SSPM */
}
}
}
Break
}
Return (RBUF) /* \_SB_.PCI0.ADSP.RBUF */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
Store (One, EOD) /* \_SB_.PCI0.ADSP.EOD_ */
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LGreaterEqual (OSYS, 0x07DC))
{
If (LEqual (S0ID, One))
{
CreateDWordField (RBUF, \_SB.PCI0.ADSP._Y2F._BAS, BVAL) // _BAS: Base Address
If (LEqual (BVAL, Zero))
{
Return (Zero)
}
If (And (EOD, One, EOD) /* \_SB_.PCI0.ADSP.EOD_ */)
{
Return (0x0F)
}
Else
{
Return (0x0D)
}
}
}
Return (Zero)
}
Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
{
Store (Zero, EOD) /* \_SB_.PCI0.ADSP.EOD_ */
}
Device (I2S0)
{
Name (_ADR, Zero) // _ADR: Address
}
Device (I2S1)
{
Name (_ADR, One) // _ADR: Address
}
}
Device (SAT0)
{
Name (_ADR, 0x001F0002) // _ADR: Address
Device (PRT0)
{
Name (_ADR, 0xFFFF) // _ADR: Address
Name (FDEV, Zero)
Name (FDRP, Zero)
Method (_SDD, 1, Serialized) // _SDD: Set Device Data
{
CreateByteField (Arg0, 0x9D, BFDS)
ToInteger (BFDS, FDEV) /* \_SB_.PCI0.SAT0.PRT0.FDEV */
CreateByteField (Arg0, 0x9A, BFRP)
ToInteger (BFRP, FDRP) /* \_SB_.PCI0.SAT0.PRT0.FDRP */
}
Method (_GTF, 0, Serialized) // _GTF: Get Task File
{
If (LAnd (LAnd (LEqual (DVS0, One), LEqual (And (FDEV, One
), One)), LEqual (And (FDRP, 0x80), 0x80)))
{
Name (PIB1, Buffer (0x07)
{
0x10, 0x09, 0x00, 0x00, 0x00, 0xB0, 0xEF /* ....... */
})
Return (PIB1) /* \_SB_.PCI0.SAT0.PRT0._GTF.PIB1 */
}
Name (PIB2, Buffer (0x07)
{
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* ....... */
})
Return (PIB2) /* \_SB_.PCI0.SAT0.PRT0._GTF.PIB2 */
}
}
Device (PRT1)
{
Name (_ADR, 0x0001FFFF) // _ADR: Address
Name (FDEV, Zero)
Name (FDRP, Zero)
Method (_SDD, 1, Serialized) // _SDD: Set Device Data
{
CreateByteField (Arg0, 0x9D, BFDS)
ToInteger (BFDS, FDEV) /* \_SB_.PCI0.SAT0.PRT1.FDEV */
CreateByteField (Arg0, 0x9A, BFRP)
ToInteger (BFRP, FDRP) /* \_SB_.PCI0.SAT0.PRT1.FDRP */
}
Method (_GTF, 0, Serialized) // _GTF: Get Task File
{
If (LAnd (LAnd (LEqual (DVS1, One), LEqual (And (FDEV, One
), One)), LEqual (And (FDRP, 0x80), 0x80)))
{
Name (PIB1, Buffer (0x07)
{
0x10, 0x09, 0x00, 0x00, 0x00, 0xB0, 0xEF /* ....... */
})
Return (PIB1) /* \_SB_.PCI0.SAT0.PRT1._GTF.PIB1 */
}
Name (PIB2, Buffer (0x07)
{
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* ....... */
})
Return (PIB2) /* \_SB_.PCI0.SAT0.PRT1._GTF.PIB2 */
}
}
Device (PRT2)
{
Name (_ADR, 0x0002FFFF) // _ADR: Address
Name (FDEV, Zero)
Name (FDRP, Zero)
Method (_SDD, 1, Serialized) // _SDD: Set Device Data
{
CreateByteField (Arg0, 0x9D, BFDS)
ToInteger (BFDS, FDEV) /* \_SB_.PCI0.SAT0.PRT2.FDEV */
CreateByteField (Arg0, 0x9A, BFRP)
ToInteger (BFRP, FDRP) /* \_SB_.PCI0.SAT0.PRT2.FDRP */
}
Method (_GTF, 0, Serialized) // _GTF: Get Task File
{
If (LAnd (LAnd (LEqual (DVS2, One), LEqual (And (FDEV, One
), One)), LEqual (And (FDRP, 0x80), 0x80)))
{
Name (PIB1, Buffer (0x07)
{
0x10, 0x09, 0x00, 0x00, 0x00, 0xB0, 0xEF /* ....... */
})
Return (PIB1) /* \_SB_.PCI0.SAT0.PRT2._GTF.PIB1 */
}
Name (PIB2, Buffer (0x07)
{
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* ....... */
})
Return (PIB2) /* \_SB_.PCI0.SAT0.PRT2._GTF.PIB2 */
}
}
Device (PRT3)
{
Name (_ADR, 0x0003FFFF) // _ADR: Address
Name (FDEV, Zero)
Name (FDRP, Zero)
Method (_SDD, 1, Serialized) // _SDD: Set Device Data
{
CreateByteField (Arg0, 0x9D, BFDS)
ToInteger (BFDS, FDEV) /* \_SB_.PCI0.SAT0.PRT3.FDEV */
CreateByteField (Arg0, 0x9A, BFRP)
ToInteger (BFRP, FDRP) /* \_SB_.PCI0.SAT0.PRT3.FDRP */
}
Method (_GTF, 0, Serialized) // _GTF: Get Task File
{
If (LAnd (LAnd (LEqual (DVS3, One), LEqual (And (FDEV, One
), One)), LEqual (And (FDRP, 0x80), 0x80)))
{
Name (PIB1, Buffer (0x07)
{
0x10, 0x09, 0x00, 0x00, 0x00, 0xB0, 0xEF /* ....... */
})
Return (PIB1) /* \_SB_.PCI0.SAT0.PRT3._GTF.PIB1 */
}
Name (PIB2, Buffer (0x07)
{
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* ....... */
})
Return (PIB2) /* \_SB_.PCI0.SAT0.PRT3._GTF.PIB2 */
}
}
}
Device (SAT1)
{
Name (_ADR, 0x001F0005) // _ADR: Address
}
Device (SBUS)
{
Name (_ADR, 0x001F0003) // _ADR: Address
OperationRegion (SMBP, PCI_Config, 0x40, 0xC0)
Field (SMBP, DWordAcc, NoLock, Preserve)
{
, 2,
I2CE, 1
}
OperationRegion (SMPB, PCI_Config, 0x20, 0x04)
Field (SMPB, DWordAcc, NoLock, Preserve)
{
, 5,
SBAR, 11
}
OperationRegion (SMBI, SystemIO, ShiftLeft (SBAR, 0x05), 0x10)
Field (SMBI, ByteAcc, NoLock, Preserve)
{
HSTS, 8,
Offset (0x02),
HCON, 8,
HCOM, 8,
TXSA, 8,
DAT0, 8,
DAT1, 8,
HBDR, 8,
PECR, 8,
RXSA, 8,
SDAT, 16
}
Method (SSXB, 2, Serialized)
{
If (STRT ())
{
Return (Zero)
}
Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
Store (0x48, HCON) /* \_SB_.PCI0.SBUS.HCON */
If (COMP ())
{
Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Return (One)
}
Return (Zero)
}
Method (SRXB, 1, Serialized)
{
If (STRT ())
{
Return (0xFFFF)
}
Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
Store (0x44, HCON) /* \_SB_.PCI0.SBUS.HCON */
If (COMP ())
{
Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Return (DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
}
Return (0xFFFF)
}
Method (SWRB, 3, Serialized)
{
If (STRT ())
{
Return (Zero)
}
Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
Store (Arg2, DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
Store (0x48, HCON) /* \_SB_.PCI0.SBUS.HCON */
If (COMP ())
{
Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Return (One)
}
Return (Zero)
}
Method (SRDB, 2, Serialized)
{
If (STRT ())
{
Return (0xFFFF)
}
Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
Store (0x48, HCON) /* \_SB_.PCI0.SBUS.HCON */
If (COMP ())
{
Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Return (DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
}
Return (0xFFFF)
}
Method (SWRW, 3, Serialized)
{
If (STRT ())
{
Return (Zero)
}
Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
And (Arg2, 0xFF, DAT1) /* \_SB_.PCI0.SBUS.DAT1 */
And (ShiftRight (Arg2, 0x08), 0xFF, DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
Store (0x4C, HCON) /* \_SB_.PCI0.SBUS.HCON */
If (COMP ())
{
Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Return (One)
}
Return (Zero)
}
Method (SRDW, 2, Serialized)
{
If (STRT ())
{
Return (0xFFFF)
}
Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
Store (0x4C, HCON) /* \_SB_.PCI0.SBUS.HCON */
If (COMP ())
{
Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Return (Or (ShiftLeft (DAT0, 0x08), DAT1))
}
Return (0xFFFFFFFF)
}
Method (SBLW, 4, Serialized)
{
If (STRT ())
{
Return (Zero)
}
Store (Arg3, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
Store (SizeOf (Arg2), DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
Store (Zero, Local1)
Store (DerefOf (Index (Arg2, Zero)), HBDR) /* \_SB_.PCI0.SBUS.HBDR */
Store (0x54, HCON) /* \_SB_.PCI0.SBUS.HCON */
While (LGreater (SizeOf (Arg2), Local1))
{
Store (0x0FA0, Local0)
While (LAnd (LNot (And (HSTS, 0x80)), Local0))
{
Decrement (Local0)
Stall (0x32)
}
If (LNot (Local0))
{
KILL ()
Return (Zero)
}
Store (0x80, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Increment (Local1)
If (LGreater (SizeOf (Arg2), Local1))
{
Store (DerefOf (Index (Arg2, Local1)), HBDR) /* \_SB_.PCI0.SBUS.HBDR */
}
}
If (COMP ())
{
Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Return (One)
}
Return (Zero)
}
Method (SBLR, 3, Serialized)
{
Name (TBUF, Buffer (0x0100) {})
If (STRT ())
{
Return (Zero)
}
Store (Arg2, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
Store (0x54, HCON) /* \_SB_.PCI0.SBUS.HCON */
Store (0x0FA0, Local0)
While (LAnd (LNot (And (HSTS, 0x80)), Local0))
{
Decrement (Local0)
Stall (0x32)
}
If (LNot (Local0))
{
KILL ()
Return (Zero)
}
Store (DAT0, Index (TBUF, Zero))
Store (0x80, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Store (One, Local1)
While (LLess (Local1, DerefOf (Index (TBUF, Zero))))
{
Store (0x0FA0, Local0)
While (LAnd (LNot (And (HSTS, 0x80)), Local0))
{
Decrement (Local0)
Stall (0x32)
}
If (LNot (Local0))
{
KILL ()
Return (Zero)
}
Store (HBDR, Index (TBUF, Local1))
Store (0x80, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Increment (Local1)
}
If (COMP ())
{
Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Return (TBUF) /* \_SB_.PCI0.SBUS.SBLR.TBUF */
}
Return (Zero)
}
Method (STRT, 0, Serialized)
{
Store (0xC8, Local0)
While (Local0)
{
If (And (HSTS, 0x40))
{
Decrement (Local0)
Sleep (One)
If (LEqual (Local0, Zero))
{
Return (One)
}
}
Else
{
Store (Zero, Local0)
}
}
Store (0x0FA0, Local0)
While (Local0)
{
If (And (HSTS, One))
{
Decrement (Local0)
Stall (0x32)
If (LEqual (Local0, Zero))
{
KILL ()
}
}
Else
{
Return (Zero)
}
}
Return (One)
}
Method (COMP, 0, Serialized)
{
Store (0x0FA0, Local0)
While (Local0)
{
If (And (HSTS, 0x02))
{
Return (One)
}
Else
{
Decrement (Local0)
Stall (0x32)
If (LEqual (Local0, Zero))
{
KILL ()
}
}
}
Return (Zero)
}
Method (KILL, 0, Serialized)
{
Or (HCON, 0x02, HCON) /* \_SB_.PCI0.SBUS.HCON */
Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
}
}
}
Name (ECUP, One)
Mutex (EHLD, 0x00)
Name (BGR, One)
Name (BFR, 0x02)
Name (BBR, 0x03)
Name (BWC, 0x04)
Name (BGRP, 0x09)
Name (BGRC, 0x0A)
Name (BFRP, 0x0B)
Name (BBRP, 0x0C)
Name (BRPS, 0x10)
Name (BRCS, 0x11)
Name (BRDS, 0x12)
Name (BR4S, 0x13)
Name (BR5S, 0x14)
Name (BWT1, 0x20)
Name (BW1P, 0x21)
Name (BW2C, 0x22)
Name (BW2P, 0x23)
Name (BSPC, 0x24)
Name (BSPP, 0x25)
Name (BTS, 0x26)
Name (BICO, 0x27)
Name (BICC, 0x28)
Name (BHB, 0x30)
Name (BFS2, 0x31)
Name (BFS3, 0x32)
Name (BFS4, 0x33)
Name (BRH, 0x35)
Name (BFHC, 0x40)
Name (BFHP, 0x41)
Name (BFCP, 0x42)
Name (BFCC, 0x44)
Name (BHCP, 0x45)
Name (BCOC, 0x46)
Name (BFD1, 0x47)
Name (BFD2, 0x48)
Name (BTDT, 0x50)
Name (BTMB, 0x51)
Name (BBGB, 0x52)
Name (BHC2, 0x53)
Scope (\)
{
Device (NFC1)
{
Name (_HID, EisaId ("SKTD000")) // _HID: Hardware ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (NFCE, 0x03))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
Device (NFC2)
{
Name (_HID, EisaId ("NXP5442") /* NXP 5442 Near Field Communications Controller */) // _HID: Hardware ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (NFCE, 0x02))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
Device (NFC3)
{
Name (_HID, EisaId ("ICV0A12")) // _HID: Hardware ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (NFCE, One))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
}
Mutex (MUTX, 0x00)
Mutex (OSUM, 0x00)
Mutex (WFDM, 0x00)
OperationRegion (PRT0, SystemIO, 0x80, 0x04)
Field (PRT0, DWordAcc, Lock, Preserve)
{
P80H, 32
}
Method (P8XH, 2, Serialized)
{
If (LEqual (Arg0, Zero))
{
Store (Or (And (P80D, 0xFFFFFF00), Arg1), P80D) /* \P80D */
}
If (LEqual (Arg0, One))
{
Store (Or (And (P80D, 0xFFFF00FF), ShiftLeft (Arg1, 0x08)
), P80D) /* \P80D */
}
If (LEqual (Arg0, 0x02))
{
Store (Or (And (P80D, 0xFF00FFFF), ShiftLeft (Arg1, 0x10)
), P80D) /* \P80D */
}
If (LEqual (Arg0, 0x03))
{
Store (Or (And (P80D, 0x00FFFFFF), ShiftLeft (Arg1, 0x18)
), P80D) /* \P80D */
}
Store (P80D, P80H) /* \P80H */
}
Method (ADBG, 1, Serialized)
{
If (CondRefOf (MDBG))
{
Return (MDBG) /* External reference */
Arg0
}
Return (Zero)
}
OperationRegion (SPRT, SystemIO, 0xB2, 0x02)
Field (SPRT, ByteAcc, Lock, Preserve)
{
SSMP, 8
}
Name (WAKP, Package (0x02)
{
Zero,
Zero
})
Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model
{
Store (Arg0, GPIC) /* \GPIC */
Store (Arg0, PICM) /* \PICM */
}
Method (RPTS, 1, Serialized)
{
Store (Zero, P80D) /* \P80D */
P8XH (Zero, Arg0)
\_SB.WTGP (0x58, One)
Sleep (0x64)
ADBG (Concatenate ("RPTS=", ToHexString (Arg0)))
If (LOr (LEqual (BID, BICO), LEqual (BID, BICC)))
{
Acquire (WFDM, 0xFFFF)
Store (Zero, WKFN) /* \WKFN */
Release (WFDM)
}
If (And (ICNF, 0x10))
{
If (CondRefOf (\_SB.IAOE.PTSL))
{
Store (Arg0, \_SB.IAOE.PTSL) /* External reference */
}
}
If (LEqual (Arg0, 0x03))
{
If (LAnd (DTSE, LGreater (TCNT, One)))
{
TRAP (TRTD, 0x1E)
}
}
}
Method (MMRP, 0, NotSerialized)
{
Store (PEBS, Local0)
Add (Local0, 0x000E0000, Local0)
Subtract (ToInteger (TBSE), One, Local1)
Multiply (Local1, 0x1000, Local1)
Add (Local0, Local1, Local0)
Return (Local0)
}
Method (RWAK, 1, Serialized)
{
P8XH (One, 0xAB)
ADBG ("RWAK")
If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)))
{
If (CondRefOf (\_SB.PCI0.PEG0.PEGP.EPON))
{
\_SB.PCI0.PEG0.PEGP.EPON ()
}
If (CondRefOf (\_SB.PCI0.RP05.PEGP.EPON))
{
\_SB.PCI0.RP05.PEGP.EPON ()
}
}
If (LAnd (LNotEqual (And (\_SB.PCI0.B0D3.ABAR, 0xFFFFC004), 0xFFFFC004),
LNotEqual (And (\_SB.PCI0.B0D3.ABAR, 0xFFFFC000), Zero)))
{
Store (\_SB.PCI0.B0D3.ABAR, \_SB.PCI0.B0D3.BARA) /* External reference */
}
If (And (ICNF, 0x10))
{
If (CondRefOf (\_SB.IAOE.PTSL))
{
Store (Zero, \_SB.IAOE.PTSL) /* External reference */
}
If (LEqual (\_SB.IAOE.ITMR, Zero)) {}
If (CondRefOf (\_SB.IAOE.ECTM))
{
Store (Zero, \_SB.IAOE.ECTM) /* External reference */
}
If (CondRefOf (\_SB.IAOE.RCTM))
{
Store (Zero, \_SB.IAOE.RCTM) /* External reference */
}
}
If (NEXP)
{
If (And (OSCC, 0x02))
{
\_SB.PCI0.NHPG ()
}
If (And (OSCC, 0x04))
{
\_SB.PCI0.NPME ()
}
}
If (LEqual (Arg0, 0x03))
{
If (LEqual (Zero, ACTT))
{
If (LEqual (ECON, One)) {}
}
}
If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)))
{
If (LAnd (DTSE, LGreater (TCNT, One)))
{
TRAP (TRTD, 0x14)
}
If (LEqual (OSYS, 0x07D2))
{
If (And (\_PR.CFGD, One))
{
If (LGreater (\_PR.CPU0._PPC, Zero))
{
Subtract (\_PR.CPU0._PPC, One, \_PR.CPU0._PPC) /* External reference */
PNOT ()
Add (\_PR.CPU0._PPC, One, \_PR.CPU0._PPC) /* External reference */
PNOT ()
}
Else
{
Add (\_PR.CPU0._PPC, One, \_PR.CPU0._PPC) /* External reference */
PNOT ()
Subtract (\_PR.CPU0._PPC, One, \_PR.CPU0._PPC) /* External reference */
PNOT ()
}
}
}
If (LOr (LEqual (BID, BICO), LEqual (BID, BICC)))
{
Acquire (OSUM, 0xFFFF)
Store (MMRP (), Local0)
OperationRegion (RP_X, SystemMemory, Local0, 0x20)
Field (RP_X, DWordAcc, NoLock, Preserve)
{
REG0, 32,
REG1, 32,
REG2, 32,
REG3, 32,
REG4, 32,
REG5, 32,
REG6, 32,
REG7, 32
}
Store (REG6, Local1)
Store (0x00F0F000, REG6) /* \RWAK.REG6 */
Store (\_GPE.MMTB (), Local2)
\_GPE.OSUP (Local2)
Store (Local1, REG6) /* \RWAK.REG6 */
Release (OSUM)
}
If (LEqual (RP1D, Zero))
{
Notify (\_SB.PCI0.RP01, Zero) // Bus Check
}
If (LEqual (RP2D, Zero))
{
Notify (\_SB.PCI0.RP02, Zero) // Bus Check
}
If (LEqual (RP3D, Zero))
{
Notify (\_SB.PCI0.RP03, Zero) // Bus Check
}
If (LEqual (RP4D, Zero))
{
Notify (\_SB.PCI0.RP04, Zero) // Bus Check
}
If (LEqual (RP5D, Zero))
{
Notify (\_SB.PCI0.RP05, Zero) // Bus Check
}
If (LEqual (RP6D, Zero))
{
Notify (\_SB.PCI0.RP06, Zero) // Bus Check
}
If (LEqual (RP7D, Zero))
{
If (LEqual (DSTS, Zero))
{
Notify (\_SB.PCI0.RP07, Zero) // Bus Check
}
}
If (LEqual (RP8D, Zero))
{
If (LEqual (DSTS, Zero))
{
Notify (\_SB.PCI0.RP08, Zero) // Bus Check
}
}
}
If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)))
{
\_SB.PCI0.XHC.XWAK ()
}
If (LOr (LEqual (BID, BICO), LEqual (BID, BICC)))
{
Acquire (WFDM, 0xFFFF)
Store (One, WKFN) /* \WKFN */
Release (WFDM)
ADBG (Concatenate ("_WAK=", ToHexString (Timer)))
}
Return (Package (0x02)
{
Zero,
Zero
})
}
Method (GETB, 3, Serialized)
{
Multiply (Arg0, 0x08, Local0)
Multiply (Arg1, 0x08, Local1)
CreateField (Arg2, Local0, Local1, TBF3)
Return (TBF3) /* \GETB.TBF3 */
}
Method (PNOT, 0, Serialized)
{
If (CondRefOf (\_SB.PCCD.PENB))
{
Notify (\_SB.PCCD, 0x82) // Device-Specific Change
}
Else
{
If (LGreater (TCNT, One))
{
If (And (PDC0, 0x08))
{
Notify (\_PR.CPU0, 0x80) // Performance Capability Change
}
If (And (PDC1, 0x08))
{
Notify (\_PR.CPU1, 0x80) // Performance Capability Change
}
If (And (PDC2, 0x08))
{
Notify (\_PR.CPU2, 0x80) // Performance Capability Change
}
If (And (PDC3, 0x08))
{
Notify (\_PR.CPU3, 0x80) // Performance Capability Change
}
If (And (PDC4, 0x08))
{
Notify (\_PR.CPU4, 0x80) // Performance Capability Change
}
If (And (PDC5, 0x08))
{
Notify (\_PR.CPU5, 0x80) // Performance Capability Change
}
If (And (PDC6, 0x08))
{
Notify (\_PR.CPU6, 0x80) // Performance Capability Change
}
If (And (PDC7, 0x08))
{
Notify (\_PR.CPU7, 0x80) // Performance Capability Change
}
}
Else
{
Notify (\_PR.CPU0, 0x80) // Performance Capability Change
}
}
If (LGreater (TCNT, One))
{
If (LAnd (And (PDC0, 0x08), And (PDC0, 0x10)))
{
Notify (\_PR.CPU0, 0x81) // C-State Change
}
If (LAnd (And (PDC1, 0x08), And (PDC1, 0x10)))
{
Notify (\_PR.CPU1, 0x81) // C-State Change
}
If (LAnd (And (PDC2, 0x08), And (PDC2, 0x10)))
{
Notify (\_PR.CPU2, 0x81) // C-State Change
}
If (LAnd (And (PDC3, 0x08), And (PDC3, 0x10)))
{
Notify (\_PR.CPU3, 0x81) // C-State Change
}
If (LAnd (And (PDC4, 0x08), And (PDC4, 0x10)))
{
Notify (\_PR.CPU4, 0x81) // C-State Change
}
If (LAnd (And (PDC5, 0x08), And (PDC5, 0x10)))
{
Notify (\_PR.CPU5, 0x81) // C-State Change
}
If (LAnd (And (PDC6, 0x08), And (PDC6, 0x10)))
{
Notify (\_PR.CPU6, 0x81) // C-State Change
}
If (LAnd (And (PDC7, 0x08), And (PDC7, 0x10)))
{
Notify (\_PR.CPU7, 0x81) // C-State Change
}
}
Else
{
Notify (\_PR.CPU0, 0x81) // C-State Change
}
If (LEqual (DPTF, One))
{
Notify (\_SB.IETM, 0x86) // Device-Specific
}
}
OperationRegion (MBAR, SystemMemory, Add (ShiftLeft (\_SB.PCI0.MHBR, 0x0F), 0x5000), 0x1000)
Field (MBAR, ByteAcc, NoLock, Preserve)
{
Offset (0x938),
PWRU, 4,
Offset (0x9A0),
PPL1, 15,
PL1E, 1,
CLP1, 1
}
Name (CLMP, Zero)
Name (PLEN, Zero)
Name (PLSV, 0x8000)
Name (CSEM, Zero)
Method (SPL1, 0, Serialized)
{
Name (PPUU, Zero)
If (LEqual (CSEM, One))
{
Return (Zero)
}
Store (One, CSEM) /* \CSEM */
Store (PPL1, PLSV) /* \PLSV */
Store (PL1E, PLEN) /* \PLEN */
Store (CLP1, CLMP) /* \CLMP */
If (LEqual (PWRU, Zero))
{
Store (One, PPUU) /* \SPL1.PPUU */
}
Else
{
ShiftLeft (Decrement (PWRU), 0x02, PPUU) /* \SPL1.PPUU */
}
Multiply (PLVL, PPUU, Local0)
Divide (Local0, 0x03E8, , Local1)
Store (Local1, PPL1) /* \PPL1 */
Store (One, PL1E) /* \PL1E */
Store (One, CLP1) /* \CLP1 */
}
Method (RPL1, 0, Serialized)
{
Store (PLSV, PPL1) /* \PPL1 */
Store (PLEN, PL1E) /* \PL1E */
Store (CLMP, CLP1) /* \CLP1 */
Store (Zero, CSEM) /* \CSEM */
}
Name (DDPS, Zero)
Name (UAMS, Zero)
Method (GUAM, 1, Serialized)
{
If (LNotEqual (Arg0, DDPS))
{
Store (Arg0, DDPS) /* \DDPS */
Store (LAnd (Arg0, Not (PWRS)), UAMS) /* \UAMS */
If (Arg0)
{
ADBG ("Enter CS")
If (PSCP)
{
If (LAnd (CondRefOf (\_PR.CPU0._PSS), CondRefOf (\_PR.CPU0._PPC)))
{
Subtract (SizeOf (\_PR.CPU0._PSS), One, \_PR.CPU0._PPC) /* External reference */
PNOT ()
}
}
If (PLCS)
{
SPL1 ()
}
ENCS ()
}
Else
{
ADBG ("Exit CS")
If (PSCP)
{
If (CondRefOf (\_PR.CPU0._PPC))
{
Store (Zero, \_PR.CPU0._PPC) /* External reference */
PNOT ()
}
}
If (PLCS)
{
RPL1 ()
}
EXCS ()
}
P_CS ()
}
}
Method (P_CS, 0, Serialized)
{
If (CondRefOf (\_SB.PCI0.PAUD.PUAM))
{
\_SB.PCI0.PAUD.PUAM ()
}
If (LEqual (OSYS, 0x07DC))
{
If (CondRefOf (\_SB.PCI0.XHC.DUAM))
{
\_SB.PCI0.XHC.DUAM ()
}
}
}
Method (TRAP, 2, Serialized)
{
Store (Arg1, SMIF) /* \SMIF */
If (LEqual (Arg0, TRTD))
{
Store (Arg1, DTSF) /* \DTSF */
Store (Zero, TRPD) /* \TRPD */
Return (DTSF) /* \DTSF */
}
If (LEqual (Arg0, TRTI))
{
Store (Zero, TRPH) /* \TRPH */
}
If (LEqual (Arg0, PFTI))
{
Store (Zero, TRPF) /* \TRPF */
}
Return (SMIF) /* \SMIF */
}
Name (DSST, One)
Method (ENCS, 0, Serialized)
{
Store (Zero, DSST) /* \DSST */
\_SB.WTGP (0x58, Zero)
Stall (0xFF)
}
Method (EXCS, 0, Serialized)
{
Store (One, DSST) /* \DSST */
If (LEqual (\_SB.RDGP (0x58), Zero))
{
\_SB.WTGP (0x58, One)
Sleep (0x32)
}
}
Scope (_SB)
{
Method (BRID, 0, Serialized)
{
Store (RDGI (0x55), Local0)
ShiftLeft (Local0, One, Local0)
Or (RDGI (0x31), Local0, Local0)
ShiftLeft (Local0, One, Local0)
Or (RDGI (0x33), Local0, Local0)
ShiftLeft (Local0, One, Local0)
Or (RDGI (0x25), Local0, Local0)
Return (Local0)
}
}
Scope (_SB.PCI0.XHC.RHUB.SSP4)
{
Method (_STA, 0, Serialized) // _STA: Status
{
If (LEqual (RDGI (0x3C), Zero))
{
Return (0x0F)
}
Return (Zero)
}
}
Scope (_GPE)
{
OperationRegion (BLAD, SystemIO, 0x1D50, 0x80)
Field (BLAD, ByteAcc, NoLock, Preserve)
{
, 3,
BLC, 1,
, 26,
BLST, 1
}
Method (_L3C, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
Store (\_SB.BRID (), Local0)
If (LGreater (Local0, One))
{
If (LEqual (\_SB.RDGI (0x3C), Zero))
{
\_SB.WTIN (0x3C, Zero)
Store (One, GS60) /* \GS60 */
If (LEqual (\_SB.RDGP (0x26), Zero))
{
\_SB.WTGP (0x26, One)
Sleep (0x0F)
}
}
Else
{
\_SB.WTIN (0x3C, One)
Store (One, GS60) /* \GS60 */
\_SB.WTGP (0x26, Zero)
Sleep (0x05)
}
Notify (\_SB.PCI0.XHC.RHUB.SSP4, One) // Device Check
}
}
Method (_L0A, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
Store (\_SB.BRID (), Local0)
If (LGreater (Local0, One))
{
If (LEqual (BLC, One))
{
Store (Zero, BLC) /* \_GPE.BLC_ */
}
Else
{
Store (One, BLC) /* \_GPE.BLC_ */
}
Store (BLST, \_SB.PCI0.I2C0.SAM.AIRB)
If (LEqual (\_SB.PCI0.I2C0.SAM.AIRB, One))
{
Store (\_SB.PCI0.I2C0.AREV, \_SB.PCI0.I2C0.BUFF)
Store (\_SB.PCI0.I2C0.DTD, \_SB.PCI0.I2C0.SAM.HRVX)
Store (\_SB.PCI0.I2C0.ASUB, \_SB.PCI0.I2C0.BUFF)
Store (\_SB.PCI0.I2C0.DBF, \_SB.PCI0.I2C0.SAM.SUBX)
\_SB.PCI0.I2C0.SAM.LATB ()
}
Else
{
\_SB.PCI0.I2C0.SAM.UATB ()
}
}
}
}
Scope (_SB)
{
Device (WSLT)
{
Method (_HID, 0, NotSerialized) // _HID: Hardware ID
{
Return ("MSHW0005")
}
Name (_CID, "PNP0C60" /* Display Sensor Device */) // _CID: Compatible ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
}
Device (WSAF)
{
Method (_HID, 0, NotSerialized) // _HID: Hardware ID
{
Return ("MSHW0006")
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
}
Device (WSID)
{
Method (_HID, 0, NotSerialized) // _HID: Hardware ID
{
Return ("MSHW0009")
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
}
Device (WSTM)
{
Method (_HID, 0, NotSerialized) // _HID: Hardware ID
{
Return ("MSHW0027")
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
}
Device (SDCA)
{
Method (_HID, 0, NotSerialized) // _HID: Hardware ID
{
Return ("MSHW0036")
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
}
}
Scope (_SB.PCI0)
{
Method (PTMA, 0, NotSerialized)
{
Return (PFMA) /* \PFMA */
}
Method (PTMS, 0, NotSerialized)
{
Return (PFMS) /* \PFMS */
}
Method (PTIA, 0, NotSerialized)
{
Return (PFIA) /* \PFIA */
}
Method (_INI, 0, NotSerialized) // _INI: Initialize
{
Store (0x07D0, OSYS) /* \OSYS */
If (CondRefOf (\_OSI, Local0))
{
If (_OSI ("Linux"))
{
Store (0x03E8, OSYS) /* \OSYS */
}
If (_OSI ("Windows 2001"))
{
Store (0x07D1, OSYS) /* \OSYS */
}
If (_OSI ("Windows 2001 SP1"))
{
Store (0x07D1, OSYS) /* \OSYS */
}
If (_OSI ("Windows 2001 SP2"))
{
Store (0x07D2, OSYS) /* \OSYS */
}
If (_OSI ("Windows 2001.1"))
{
Store (0x07D3, OSYS) /* \OSYS */
}
If (_OSI ("Windows 2006"))
{
Store (0x07D6, OSYS) /* \OSYS */
}
If (_OSI ("Windows 2009"))
{
Store (0x07D9, OSYS) /* \OSYS */
}
If (_OSI ("Windows 2012"))
{
Store (0x07DC, OSYS) /* \OSYS */
}
If (_OSI ("Windows 2013"))
{
Store (0x07DD, OSYS) /* \OSYS */
}
}
If (LOr (LEqual (BID, BICO), LEqual (BID, BICC)))
{
Acquire (OSUM, 0xFFFF)
Store (MMRP (), Local1)
OperationRegion (RP_X, SystemMemory, Local1, 0x20)
Field (RP_X, DWordAcc, NoLock, Preserve)
{
REG0, 32,
REG1, 32,
REG2, 32,
REG3, 32,
REG4, 32,
REG5, 32,
REG6, 32,
REG7, 32
}
Store (REG6, Local2)
Store (0x00F0F000, REG6) /* \_SB_.PCI0._INI.REG6 */
Store (\_GPE.MMTB (), Local3)
\_GPE.OSUP (Local3)
Store (Local2, REG6) /* \_SB_.PCI0._INI.REG6 */
Release (OSUM)
Acquire (WFDM, 0xFFFF)
Store (One, WKFN) /* \WKFN */
Release (WFDM)
}
}
Method (NHPG, 0, Serialized)
{
Store (Zero, ^RP01.HPEX) /* \_SB_.PCI0.RP01.HPEX */
Store (Zero, ^RP02.HPEX) /* \_SB_.PCI0.RP02.HPEX */
Store (Zero, ^RP03.HPEX) /* \_SB_.PCI0.RP03.HPEX */
Store (Zero, ^RP04.HPEX) /* \_SB_.PCI0.RP04.HPEX */
Store (Zero, ^RP05.HPEX) /* \_SB_.PCI0.RP05.HPEX */
Store (Zero, ^RP06.HPEX) /* \_SB_.PCI0.RP06.HPEX */
Store (Zero, ^RP07.HPEX) /* \_SB_.PCI0.RP07.HPEX */
Store (Zero, ^RP08.HPEX) /* \_SB_.PCI0.RP08.HPEX */
Store (One, ^RP01.HPSX) /* \_SB_.PCI0.RP01.HPSX */
Store (One, ^RP02.HPSX) /* \_SB_.PCI0.RP02.HPSX */
Store (One, ^RP03.HPSX) /* \_SB_.PCI0.RP03.HPSX */
Store (One, ^RP04.HPSX) /* \_SB_.PCI0.RP04.HPSX */
Store (One, ^RP05.HPSX) /* \_SB_.PCI0.RP05.HPSX */
Store (One, ^RP06.HPSX) /* \_SB_.PCI0.RP06.HPSX */
Store (One, ^RP07.HPSX) /* \_SB_.PCI0.RP07.HPSX */
Store (One, ^RP08.HPSX) /* \_SB_.PCI0.RP08.HPSX */
}
Method (NPME, 0, Serialized)
{
Store (Zero, ^RP01.PMEX) /* \_SB_.PCI0.RP01.PMEX */
Store (Zero, ^RP02.PMEX) /* \_SB_.PCI0.RP02.PMEX */
Store (Zero, ^RP03.PMEX) /* \_SB_.PCI0.RP03.PMEX */
Store (Zero, ^RP04.PMEX) /* \_SB_.PCI0.RP04.PMEX */
Store (Zero, ^RP05.PMEX) /* \_SB_.PCI0.RP05.PMEX */
Store (Zero, ^RP06.PMEX) /* \_SB_.PCI0.RP06.PMEX */
Store (Zero, ^RP07.PMEX) /* \_SB_.PCI0.RP07.PMEX */
Store (Zero, ^RP08.PMEX) /* \_SB_.PCI0.RP08.PMEX */
Store (One, ^RP01.PMSX) /* \_SB_.PCI0.RP01.PMSX */
Store (One, ^RP02.PMSX) /* \_SB_.PCI0.RP02.PMSX */
Store (One, ^RP03.PMSX) /* \_SB_.PCI0.RP03.PMSX */
Store (One, ^RP04.PMSX) /* \_SB_.PCI0.RP04.PMSX */
Store (One, ^RP05.PMSX) /* \_SB_.PCI0.RP05.PMSX */
Store (One, ^RP06.PMSX) /* \_SB_.PCI0.RP06.PMSX */
Store (One, ^RP07.PMSX) /* \_SB_.PCI0.RP07.PMSX */
Store (One, ^RP08.PMSX) /* \_SB_.PCI0.RP08.PMSX */
}
}
Scope (\)
{
Name (PICM, Zero)
Name (PRWP, Package (0x02)
{
Zero,
Zero
})
Method (GPRW, 2, NotSerialized)
{
Store (Arg0, Index (PRWP, Zero))
Store (ShiftLeft (SS1, One), Local0)
Or (Local0, ShiftLeft (SS2, 0x02), Local0)
Or (Local0, ShiftLeft (SS3, 0x03), Local0)
Or (Local0, ShiftLeft (SS4, 0x04), Local0)
If (And (ShiftLeft (One, Arg1), Local0))
{
Store (Arg1, Index (PRWP, One))
}
Else
{
ShiftRight (Local0, One, Local0)
FindSetLeftBit (Local0, Index (PRWP, One))
}
Return (PRWP) /* \PRWP */
}
}
Scope (_SB)
{
Name (OSCI, Zero)
Name (OSCO, Zero)
Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities
{
CreateDWordField (Arg3, Zero, STS0)
CreateDWordField (Arg3, 0x04, CAP0)
If (LEqual (Arg0, ToUUID ("0811b06e-4a27-44f9-8d60-3cbbc22e7b48") /* Platform-wide Capabilities */))
{
If (LEqual (Arg1, One))
{
If (And (CAP0, 0x04))
{
Store (0x04, OSCO) /* \_SB_.OSCO */
If (LNotEqual (And (SGMD, 0x0F), 0x02))
{
If (LEqual (RTD3, Zero))
{
And (CAP0, 0x3B, CAP0) /* \_SB_._OSC.CAP0 */
Or (STS0, 0x10, STS0) /* \_SB_._OSC.STS0 */
}
}
}
If (And (CAP0, 0x20))
{
If (CondRefOf (\_SB.PCCD.PENB))
{
If (LEqual (^PCCD.PENB, Zero))
{
And (CAP0, 0x1F, CAP0) /* \_SB_._OSC.CAP0 */
Or (STS0, 0x10, STS0) /* \_SB_._OSC.STS0 */
}
}
Else
{
And (CAP0, 0x1F, CAP0) /* \_SB_._OSC.CAP0 */
Or (STS0, 0x10, STS0) /* \_SB_._OSC.STS0 */
}
}
}
Else
{
And (STS0, 0xFFFFFF00, STS0) /* \_SB_._OSC.STS0 */
Or (STS0, 0x0A, STS0) /* \_SB_._OSC.STS0 */
}
}
Else
{
And (STS0, 0xFFFFFF00, STS0) /* \_SB_._OSC.STS0 */
Or (STS0, 0x06, STS0) /* \_SB_._OSC.STS0 */
}
Return (Arg3)
}
Device (PEPD)
{
Name (_HID, "INT33A1" /* Intel Power Engine */) // _HID: Hardware ID
Name (_CID, EisaId ("PNP0D80") /* Windows-compatible System Power Management Controller */) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (PEPP, Zero)
Name (DEVS, Package (0x03)
{
0x02,
Package (0x01)
{
"\\_SB.PCI0.GFX0"
},
Package (0x01)
{
"\\_SB.PCI0.SAT0.PRT0"
}
})
Name (DEVX, Package (0x06)
{
Package (0x02)
{
"\\_SB.PCI0.GFX0",
0xFFFFFFFF
},
Package (0x02)
{
"\\_SB.PCI0.SAT0.PRT0",
0xFFFFFFFF
},
Package (0x02)
{
"\\_SB.PCI0.I2C0",
0xFFFFFFFF
},
Package (0x02)
{
"\\_SB.PCI0.I2C1",
0xFFFFFFFF
},
Package (0x02)
{
"\\_SB.PCI0.XHC",
0xFFFFFFFF
},
Package (0x02)
{
"HDAUDIO\\FUNC_01&VEN_10EC&DEV_0288*",
0xFFFFFFFF
}
})
Name (DEVY, Package (0x0A)
{
Package (0x03)
{
"\\_PR.CPU0",
One,
Package (0x02)
{
Zero,
Package (0x02)
{
0xFF,
Zero
}
}
},
Package (0x03)
{
"\\_PR.CPU1",
One,
Package (0x02)
{
Zero,
Package (0x02)
{
0xFF,
Zero
}
}
},
Package (0x03)
{
"\\_PR.CPU2",
One,
Package (0x02)
{
Zero,
Package (0x02)
{
0xFF,
Zero
}
}
},
Package (0x03)
{
"\\_PR.CPU3",
One,
Package (0x02)
{
Zero,
Package (0x02)
{
0xFF,
Zero
}
}
},
Package (0x03)
{
"\\_SB.PCI0.GFX0",
One,
Package (0x02)
{
Zero,
Package (0x02)
{
0xFF,
0x03
}
}
},
Package (0x03)
{
"\\_SB.PCI0.SAT0.PRT0",
One,
Package (0x02)
{
Zero,
Package (0x03)
{
0xFF,
Zero,
0x81
}
}
},
Package (0x03)
{
"\\_SB.PCI0.I2C0",
One,
Package (0x02)
{
Zero,
Package (0x02)
{
0xFF,
0x03
}
}
},
Package (0x03)
{
"\\_SB.PCI0.I2C1",
One,
Package (0x02)
{
Zero,
Package (0x02)
{
0xFF,
0x03
}
}
},
Package (0x03)
{
"\\_SB.PCI0.XHC",
One,
Package (0x02)
{
Zero,
Package (0x02)
{
0xFF,
0x03
}
}
},
Package (0x03)
{
"HDAUDIO\\FUNC_01&VEN_10EC&DEV_0288*",
One,
Package (0x03)
{
Zero,
Package (0x02)
{
Zero,
Zero
},
Package (0x02)
{
One,
0x03
}
}
}
})
Name (BCCD, Package (0x02)
{
Package (0x02)
{
"\\_SB.PCI0.SAT0",
Package (0x01)
{
Package (0x03)
{
Package (0x05)
{
One,
0x08,
Zero,
One,
0xB2
},
Package (0x03)
{
Zero,
0xCD,
One
},
0x3E80
}
}
},
Package (0x02)
{
"\\_SB.PCI0.SAT0.PRT0",
Package (0x01)
{
Package (0x03)
{
Package (0x05)
{
One,
0x08,
Zero,
One,
0xB2
},
Package (0x03)
{
Zero,
0xCD,
One
},
0x3E80
}
}
}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LGreaterEqual (OSYS, 0x07DC))
{
If (LEqual (And (CDID, 0xF000), 0x9000))
{
If (LEqual (S0ID, One))
{
Return (0x0F)
}
}
}
Return (Zero)
}
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
If (LEqual (Arg0, ToUUID ("b8febfe0-baf8-454b-aecd-49fb91137b21")))
{
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x07 /* . */
})
}
If (LEqual (Arg2, One))
{
Store (One, PEPP) /* \_SB_.PEPD.PEPP */
Return (0x0F)
}
If (LEqual (Arg2, 0x02))
{
If (LEqual (Arg1, Zero))
{
While (One)
{
Store (PEPY, _T_0) /* \_SB_.PEPD._DSM._T_0 */
If (LEqual (_T_0, One))
{
Return (Package (0x02)
{
One,
Package (0x01)
{
"\\_SB.PCI0.GFX0"
}
})
}
Else
{
If (LEqual (_T_0, 0x02))
{
Return (Package (0x02)
{
One,
Package (0x01)
{
"\\_SB.PCI0.SAT0.PRT0"
}
})
}
Else
{
If (LEqual (_T_0, 0x03))
{
Return (DEVS) /* \_SB_.PEPD.DEVS */
}
Else
{
Return (Package (0x01)
{
Zero
})
}
}
}
Break
}
}
If (LEqual (Arg1, One))
{
Return (DEVX) /* \_SB_.PEPD.DEVX */
}
}
}
If (LEqual (Arg0, ToUUID ("c4eb40a0-6cd2-11e2-bcfd-0800200c9a66")))
{
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x07 /* . */
})
}
If (LEqual (Arg2, One))
{
Return (DEVY) /* \_SB_.PEPD.DEVY */
}
If (LEqual (Arg2, 0x02))
{
Return (BCCD) /* \_SB_.PEPD.BCCD */
}
}
Return (One)
}
}
}
Scope (_SB)
{
Device (BTKL)
{
Name (_HID, "INT3420" /* Intel Bluetooth RF Kill */) // _HID: Hardware ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (_OSI ("Windows 2012"))
{
If (LEqual (BID, BW2C))
{
Return (0x0F)
}
}
Return (Zero)
}
Method (_PS0, 0, Serialized) // _PS0: Power State 0
{
And (GL0A, 0x7F, GL0A) /* \GL0A */
}
Method (_PS3, 0, Serialized) // _PS3: Power State 3
{
Or (GL0A, 0x80, GL0A) /* \GL0A */
}
Method (PSTS, 0, NotSerialized)
{
Return (RDGP (0x57))
}
}
}
OperationRegion (_SB.PCI0.SBRG.LPCR, PCI_Config, 0x80, 0x04)
Field (\_SB.PCI0.SBRG.LPCR, ByteAcc, NoLock, Preserve)
{
CADR, 3,
, 1,
CBDR, 3,
Offset (0x01),
LTDR, 2,
, 2,
FDDR, 1,
Offset (0x02),
CALE, 1,
CBLE, 1,
LTLE, 1,
FDLE, 1,
Offset (0x03),
GLLE, 1,
GHLE, 1,
KCLE, 1,
MCLE, 1,
C1LE, 1,
C2LE, 1,
Offset (0x04)
}
Method (UXDV, 1, Serialized)
{
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
Store (0xFF, Local0)
While (One)
{
Store (Add (Arg0, Zero), _T_0) /* \UXDV._T_0 */
If (LEqual (_T_0, 0x03F8))
{
Store (Zero, Local0)
}
Else
{
If (LEqual (_T_0, 0x02F8))
{
Store (One, Local0)
}
Else
{
If (LEqual (_T_0, 0x0220))
{
Store (0x02, Local0)
}
Else
{
If (LEqual (_T_0, 0x0228))
{
Store (0x03, Local0)
}
Else
{
If (LEqual (_T_0, 0x0238))
{
Store (0x04, Local0)
}
Else
{
If (LEqual (_T_0, 0x02E8))
{
Store (0x05, Local0)
}
Else
{
If (LEqual (_T_0, 0x0338))
{
Store (0x06, Local0)
}
Else
{
If (LEqual (_T_0, 0x03E8))
{
Store (0x07, Local0)
}
}
}
}
}
}
}
}
Break
}
Return (Local0)
}
Method (RRIO, 4, Serialized)
{
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
While (One)
{
Store (Add (Arg0, Zero), _T_0) /* \RRIO._T_0 */
If (LEqual (_T_0, Zero))
{
Store (Zero, CALE) /* \CALE */
Store (UXDV (Arg2), Local0)
If (LNotEqual (Local0, 0xFF))
{
Store (Local0, CADR) /* \CADR */
}
If (Arg1)
{
Store (One, CALE) /* \CALE */
}
}
Else
{
If (LEqual (_T_0, One))
{
Store (Zero, CBLE) /* \CBLE */
Store (UXDV (Arg2), Local0)
If (LNotEqual (Local0, 0xFF))
{
Store (Local0, CBDR) /* \CBDR */
}
If (Arg1)
{
Store (One, CBLE) /* \CBLE */
}
}
Else
{
If (LEqual (_T_0, 0x02))
{
Store (Zero, LTLE) /* \LTLE */
If (LEqual (Arg2, 0x0378))
{
Store (Zero, LTDR) /* \LTDR */
}
If (LEqual (Arg2, 0x0278))
{
Store (One, LTDR) /* \LTDR */
}
If (LEqual (Arg2, 0x03BC))
{
Store (0x02, LTDR) /* \LTDR */
}
If (Arg1)
{
Store (One, LTLE) /* \LTLE */
}
}
Else
{
If (LEqual (_T_0, 0x03))
{
Store (Zero, FDLE) /* \FDLE */
If (LEqual (Arg2, 0x03F0))
{
Store (Zero, FDDR) /* \FDDR */
}
If (LEqual (Arg2, 0x0370))
{
Store (One, FDDR) /* \FDDR */
}
If (Arg1)
{
Store (One, FDLE) /* \FDLE */
}
}
Else
{
If (LEqual (_T_0, 0x08))
{
If (LEqual (Arg2, 0x0200))
{
If (Arg1)
{
Store (One, GLLE) /* \GLLE */
}
Else
{
Store (Zero, GLLE) /* \GLLE */
}
}
If (LEqual (Arg2, 0x0208))
{
If (Arg1)
{
Store (One, GHLE) /* \GHLE */
}
Else
{
Store (Zero, GHLE) /* \GHLE */
}
}
}
Else
{
If (LEqual (_T_0, 0x09))
{
If (LEqual (Arg2, 0x0200))
{
If (Arg1)
{
Store (One, GLLE) /* \GLLE */
}
Else
{
Store (Zero, GLLE) /* \GLLE */
}
}
If (LEqual (Arg2, 0x0208))
{
If (Arg1)
{
Store (One, GHLE) /* \GHLE */
}
Else
{
Store (Zero, GHLE) /* \GHLE */
}
}
}
Else
{
If (LEqual (_T_0, 0x0A))
{
If (LOr (LEqual (Arg2, 0x60), LEqual (Arg2, 0x64)))
{
If (Arg1)
{
Store (One, KCLE) /* \KCLE */
}
Else
{
Store (Zero, KCLE) /* \KCLE */
}
}
}
Else
{
If (LEqual (_T_0, 0x0B))
{
If (LOr (LEqual (Arg2, 0x62), LEqual (Arg2, 0x66)))
{
If (Arg1)
{
Store (One, MCLE) /* \MCLE */
}
Else
{
Store (Zero, MCLE) /* \MCLE */
}
}
}
Else
{
If (LEqual (_T_0, 0x0C))
{
If (LEqual (Arg2, 0x2E))
{
If (Arg1)
{
Store (One, C1LE) /* \C1LE */
}
Else
{
Store (Zero, C1LE) /* \C1LE */
}
}
If (LEqual (Arg2, 0x4E))
{
If (Arg1)
{
Store (One, C2LE) /* \C2LE */
}
Else
{
Store (Zero, C2LE) /* \C2LE */
}
}
}
Else
{
If (LEqual (_T_0, 0x0D))
{
If (LEqual (Arg2, 0x2E))
{
If (Arg1)
{
Store (One, C1LE) /* \C1LE */
}
Else
{
Store (Zero, C1LE) /* \C1LE */
}
}
If (LEqual (Arg2, 0x4E))
{
If (Arg1)
{
Store (One, C2LE) /* \C2LE */
}
Else
{
Store (Zero, C2LE) /* \C2LE */
}
}
}
}
}
}
}
}
}
}
}
}
Break
}
}
Method (RDMA, 3, NotSerialized)
{
}
Scope (_GPE)
{
Method (_L6B, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
Notify (\_SB.PCI0.P0P1, 0x02) // Device Wake
}
Method (_L69, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
If (LEqual (RP1D, Zero))
{
\_SB.PCI0.RP01.HPME ()
Notify (\_SB.PCI0.RP01, 0x02) // Device Wake
}
If (LEqual (RP2D, Zero))
{
\_SB.PCI0.RP02.HPME ()
Notify (\_SB.PCI0.RP02, 0x02) // Device Wake
}
If (LEqual (RP3D, Zero))
{
\_SB.PCI0.RP03.HPME ()
Notify (\_SB.PCI0.RP03, 0x02) // Device Wake
}
If (LEqual (RP4D, Zero))
{
\_SB.PCI0.RP04.HPME ()
Notify (\_SB.PCI0.RP04, 0x02) // Device Wake
}
If (LEqual (RP5D, Zero))
{
\_SB.PCI0.RP05.HPME ()
Notify (\_SB.PCI0.RP05, 0x02) // Device Wake
}
If (LEqual (RP6D, Zero))
{
\_SB.PCI0.RP06.HPME ()
Notify (\_SB.PCI0.RP06, 0x02) // Device Wake
}
If (LEqual (RP7D, Zero))
{
\_SB.PCI0.RP07.HPME ()
Notify (\_SB.PCI0.RP07, 0x02) // Device Wake
}
If (LEqual (RP8D, Zero))
{
\_SB.PCI0.RP08.HPME ()
Notify (\_SB.PCI0.RP08, 0x02) // Device Wake
}
If (LEqual (D1F0, One))
{
\_SB.PCI0.PEG0.HPME ()
Notify (\_SB.PCI0.PEG0, 0x02) // Device Wake
Notify (\_SB.PCI0.PEG0.PEGP, 0x02) // Device Wake
}
If (LEqual (D1F1, One))
{
\_SB.PCI0.PEG1.HPME ()
Notify (\_SB.PCI0.PEG1, 0x02) // Device Wake
}
If (LEqual (D1F2, One))
{
\_SB.PCI0.PEG2.HPME ()
Notify (\_SB.PCI0.PEG2, 0x02) // Device Wake
}
}
Method (_L6D, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
If (LAnd (\_SB.PCI0.XHC.PMEE, \_SB.PCI0.XHC.PMES))
{
Notify (\_SB.PCI0.XHC, 0x02) // Device Wake
}
Else
{
If (LEqual (\_SB.PCI0.XHC.PMEE, Zero))
{
Store (One, \_SB.PCI0.XHC.PMES)
}
}
If (LAnd (\_SB.PCI0.HDEF.PMEE, \_SB.PCI0.HDEF.PMES))
{
Notify (\_SB.PCI0.HDEF, 0x02) // Device Wake
}
}
Method (_L66, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
If (LAnd (\_SB.PCI0.GFX0.GSSE, LNot (GSMI)))
{
\_SB.PCI0.GFX0.GSCI ()
}
}
Method (_L67, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
Store (0x20, \_SB.PCI0.SBUS.HSTS)
}
Method (_L68, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
}
Method (OSUP, 1, NotSerialized)
{
Add (Arg0, 0x0548, Local0)
OperationRegion (PXVD, SystemMemory, Local0, 0x08)
Field (PXVD, DWordAcc, NoLock, Preserve)
{
TB2P, 32,
P2TB, 32
}
Store (0x64, Local1)
Store (0x0D, P2TB) /* \_GPE.OSUP.P2TB */
While (LGreater (Local1, Zero))
{
Store (Subtract (Local1, One), Local1)
Store (TB2P, Local2)
If (LEqual (Local2, 0xFFFFFFFF))
{
Return (0x02)
}
If (And (Local2, One))
{
Break
}
Sleep (0x32)
}
Store (Zero, P2TB) /* \_GPE.OSUP.P2TB */
Return (One)
}
Method (MMTB, 0, NotSerialized)
{
ADBG ("MMTB")
Store (PEBS, Local0)
Add (Local0, 0x000E0000, Local0)
Subtract (ToInteger (TBSE), One, Local1)
Multiply (Local1, 0x1000, Local1)
Add (Local0, Local1, Local0)
OperationRegion (MMMM, SystemMemory, Local0, 0x1A)
Field (MMMM, AnyAcc, NoLock, Preserve)
{
Offset (0x19),
SBUS, 8
}
Store (SBUS, Local2)
Store (PEBS, Local0)
Multiply (Local2, 0x00100000, Local2)
Add (Local2, Local0, Local0)
Return (Local0)
}
Method (OSUW, 0, NotSerialized)
{
ADBG ("OSUW")
Store (MMTB (), Local0)
OperationRegion (PXVD, SystemMemory, Local0, 0x04)
Field (PXVD, DWordAcc, NoLock, Preserve)
{
VEDI, 32
}
Store (VEDI, Local1)
If (LNotEqual (Local1, 0xFFFFFFFF))
{
Return (OSUP (Local0))
}
Else
{
Return (Zero)
}
}
Method (TBFF, 0, NotSerialized)
{
ADBG ("TBFF")
Store (MMTB (), Local0)
OperationRegion (PXVD, SystemMemory, Local0, 0x04)
Field (PXVD, DWordAcc, NoLock, Preserve)
{
VEDI, 32
}
Store (VEDI, Local1)
If (LEqual (Local1, 0xFFFFFFFF))
{
Return (OSUP (Local0))
}
Else
{
Return (Zero)
}
}
Method (TSUB, 0, NotSerialized)
{
Store (PEBS, Local0)
Add (Local0, 0x000E0000, Local0)
Subtract (ToInteger (TBSE), One, Local1)
Multiply (Local1, 0x1000, Local1)
Add (Local0, Local1, Local0)
OperationRegion (MMMM, SystemMemory, Local0, 0x1A)
Field (MMMM, AnyAcc, NoLock, Preserve)
{
Offset (0x19),
SBUS, 8
}
Return (SBUS) /* \_GPE.TSUB.SBUS */
}
Method (WSUB, 0, NotSerialized)
{
Store (Zero, Local0)
Store (Zero, Local1)
While (One)
{
Store (TSUB (), Local1)
If (Local1)
{
Break
}
Else
{
Add (Local0, One, Local0)
If (LGreater (Local0, 0x03E8))
{
Sleep (0x03E8)
ADBG ("WSUB Deadlock")
}
Else
{
Sleep (0x10)
}
}
}
}
Method (WWAK, 0, NotSerialized)
{
Store (Zero, Local0)
Store (Zero, Local1)
While (One)
{
Acquire (WFDM, 0xFFFF)
Store (WKFN, Local0)
Release (WFDM)
If (Local0)
{
Break
}
Else
{
Add (Local1, One, Local1)
If (LGreater (Local1, 0x03E8))
{
Sleep (0x03E8)
ADBG ("WWAK Deadlock")
}
Else
{
Sleep (0x10)
}
}
}
Return (Local1)
}
Method (_E2A, 0, NotSerialized) // _Exx: Edge-Triggered GPE
{
WWAK ()
WSUB ()
OperationRegion (SPRT, SystemIO, 0xB2, 0x02)
Field (SPRT, ByteAcc, Lock, Preserve)
{
SSMP, 8
}
ADBG ("_E2A")
Acquire (OSUM, 0xFFFF)
Store (TBFF (), Local0)
If (LEqual (Local0, One))
{
Sleep (0x10)
Release (OSUM)
Return (Zero)
}
If (LEqual (Local0, 0x02))
{
If (NOHP)
{
ADBG ("_E2A Ntfy")
If (LEqual (TBSE, 0x05))
{
Notify (\_SB.PCI0.RP05, Zero) // Bus Check
}
If (LEqual (TBSE, 0x03))
{
Notify (\_SB.PCI0.RP03, Zero) // Bus Check
}
}
Sleep (0x10)
Release (OSUM)
Return (Zero)
}
If (LEqual (SOHP, One))
{
ADBG ("_E2A SMI")
Store (0x15, TBSF) /* \TBSF */
Store (0xF7, SSMP) /* \_GPE._E2A.SSMP */
}
If (LEqual (NOHP, One))
{
ADBG ("_E2A Ntfy")
If (LEqual (TBSE, 0x05))
{
Notify (\_SB.PCI0.RP05, Zero) // Bus Check
}
If (LEqual (TBSE, 0x03))
{
Notify (\_SB.PCI0.RP03, Zero) // Bus Check
}
}
Sleep (0x10)
Release (OSUM)
}
}
Scope (_SB.PCI0.SBRG)
{
}
Scope (_SB)
{
Device (LID0)
{
Name (_HID, EisaId ("PNP0C0D") /* Lid Device */) // _HID: Hardware ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (Zero)
}
}
}
Scope (_SB.PCI0.SBRG)
{
Device (DMAC)
{
Name (_HID, EisaId ("PNP0200") /* PC-class DMA Controller */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0000, // Range Minimum
0x0000, // Range Maximum
0x01, // Alignment
0x20, // Length
)
IO (Decode16,
0x0081, // Range Minimum
0x0081, // Range Maximum
0x01, // Alignment
0x11, // Length
)
IO (Decode16,
0x0093, // Range Minimum
0x0093, // Range Maximum
0x01, // Alignment
0x0D, // Length
)
IO (Decode16,
0x00C0, // Range Minimum
0x00C0, // Range Maximum
0x01, // Alignment
0x20, // Length
)
DMA (Compatibility, NotBusMaster, Transfer8_16, )
{4}
})
}
Device (FWHD)
{
Name (_HID, EisaId ("INT0800") /* Intel 82802 Firmware Hub Device */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Memory32Fixed (ReadOnly,
0xFF000000, // Address Base
0x01000000, // Address Length
)
})
}
Device (HPET)
{
Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID
Name (_UID, Zero) // _UID: Unique ID
Name (BUF0, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0xFED00000, // Address Base
0x00000400, // Address Length
_Y30)
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LGreaterEqual (OSYS, 0x07D1))
{
If (HPAE)
{
Return (0x0F)
}
}
Else
{
If (HPAE)
{
Return (0x0B)
}
}
Return (Zero)
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
If (HPAE)
{
CreateDWordField (BUF0, \_SB.PCI0.SBRG.HPET._Y30._BAS, HPT0) // _BAS: Base Address
If (LEqual (HPAS, One))
{
Store (0xFED01000, HPT0) /* \_SB_.PCI0.SBRG.HPET._CRS.HPT0 */
}
If (LEqual (HPAS, 0x02))
{
Store (0xFED02000, HPT0) /* \_SB_.PCI0.SBRG.HPET._CRS.HPT0 */
}
If (LEqual (HPAS, 0x03))
{
Store (0xFED03000, HPT0) /* \_SB_.PCI0.SBRG.HPET._CRS.HPT0 */
}
}
Return (BUF0) /* \_SB_.PCI0.SBRG.HPET.BUF0 */
}
}
Device (IPIC)
{
Name (_HID, EisaId ("PNP0000") /* 8259-compatible Programmable Interrupt Controller */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0020, // Range Minimum
0x0020, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0024, // Range Minimum
0x0024, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0028, // Range Minimum
0x0028, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x002C, // Range Minimum
0x002C, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0030, // Range Minimum
0x0030, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0034, // Range Minimum
0x0034, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0038, // Range Minimum
0x0038, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x003C, // Range Minimum
0x003C, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00A0, // Range Minimum
0x00A0, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00A4, // Range Minimum
0x00A4, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00A8, // Range Minimum
0x00A8, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00AC, // Range Minimum
0x00AC, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00B0, // Range Minimum
0x00B0, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00B4, // Range Minimum
0x00B4, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00B8, // Range Minimum
0x00B8, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00BC, // Range Minimum
0x00BC, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x04D0, // Range Minimum
0x04D0, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IRQNoFlags ()
{2}
})
}
Device (MATH)
{
Name (_HID, EisaId ("PNP0C04") /* x87-compatible Floating Point Processing Unit */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x00F0, // Range Minimum
0x00F0, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IRQNoFlags ()
{13}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x1F)
}
Else
{
Return (Zero)
}
}
}
Device (LDRC)
{
Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID
Name (_UID, 0x02) // _UID: Unique ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x002E, // Range Minimum
0x002E, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x004E, // Range Minimum
0x004E, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0061, // Range Minimum
0x0061, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0063, // Range Minimum
0x0063, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0065, // Range Minimum
0x0065, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0067, // Range Minimum
0x0067, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0070, // Range Minimum
0x0070, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0080, // Range Minimum
0x0080, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0092, // Range Minimum
0x0092, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x00B2, // Range Minimum
0x00B2, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0680, // Range Minimum
0x0680, // Range Maximum
0x01, // Alignment
0x20, // Length
)
IO (Decode16,
0xFFFF, // Range Minimum
0xFFFF, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0xFFFF, // Range Minimum
0xFFFF, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0xFFFF, // Range Minimum
0xFFFF, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x1800, // Range Minimum
0x1800, // Range Maximum
0x01, // Alignment
0xFF, // Length
)
IO (Decode16,
0x164E, // Range Minimum
0x164E, // Range Maximum
0x01, // Alignment
0x02, // Length
)
})
}
Device (LDR2)
{
Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID
Name (_UID, 0x05) // _UID: Unique ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0800, // Range Minimum
0x0800, // Range Maximum
0x01, // Alignment
0x80, // Length
)
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (And (CDID, 0xF000), 0x8000))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
Device (RTC)
{
Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum
0x0070, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQNoFlags ()
{8}
})
}
Device (TIMR)
{
Name (_HID, EisaId ("PNP0100") /* PC-class System Timer */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0040, // Range Minimum
0x0040, // Range Maximum
0x01, // Alignment
0x04, // Length
)
IO (Decode16,
0x0050, // Range Minimum
0x0050, // Range Maximum
0x10, // Alignment
0x04, // Length
)
IRQNoFlags ()
{0}
})
}
Device (CWDT)
{
Name (_HID, EisaId ("INT3F0D") /* ACPI Motherboard Resources */) // _HID: Hardware ID
Name (_CID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _CID: Compatible ID
Name (BUF0, ResourceTemplate ()
{
IO (Decode16,
0x1854, // Range Minimum
0x1854, // Range Maximum
0x04, // Alignment
0x04, // Length
)
})
Method (_STA, 0, Serialized) // _STA: Status
{
If (LEqual (WDTE, One))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Return (BUF0) /* \_SB_.PCI0.SBRG.CWDT.BUF0 */
}
}
}
Device (ALSD)
{
Name (_HID, "ACPI0008" /* Ambient Light Sensor Device */) // _HID: Hardware ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (ALSE, 0x02))
{
Return (0x0B)
}
Return (Zero)
}
Method (_ALI, 0, NotSerialized) // _ALI: Ambient Light Illuminance
{
Return (Or (ShiftLeft (LHIH, 0x08), LLOW))
}
Name (_ALR, Package (0x05) // _ALR: Ambient Light Response
{
Package (0x02)
{
0x46,
Zero
},
Package (0x02)
{
0x49,
0x0A
},
Package (0x02)
{
0x55,
0x50
},
Package (0x02)
{
0x64,
0x012C
},
Package (0x02)
{
0x96,
0x03E8
}
})
}
Scope (_SB.PCI0.SBRG)
{
Device (TPM)
{
Method (_HID, 0, NotSerialized) // _HID: Hardware ID
{
Return ("MSFT0101")
}
Name (_S0W, 0x03) // _S0W: S0 Device Wake State
Method (_PS0, 0, Serialized) // _PS0: Power State 0
{
Store (0xDD, DBG8) /* \DBG8 */
Store (Zero, DBG8) /* \DBG8 */
}
Method (_PS3, 0, Serialized) // _PS3: Power State 3
{
Store (0xDD, DBG8) /* \DBG8 */
Store (0x33, DBG8) /* \DBG8 */
}
Method (_STR, 0, NotSerialized) // _STR: Description String
{
If (LEqual (TTDP, Zero))
{
Return (Unicode ("TPM 1.2 Device"))
}
Else
{
Return (Unicode ("TPM 2.0 Device"))
}
}
Name (_UID, One) // _UID: Unique ID
Name (CRST, ResourceTemplate ()
{
DWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
0x00000000, // Granularity
0x00000000, // Range Minimum
0x00000000, // Range Maximum
0x00000000, // Translation Offset
0x00000000, // Length
,, _Y31, AddressRangeMemory, TypeStatic)
})
OperationRegion (TMMB, SystemMemory, 0xFED40000, 0x5000)
Field (TMMB, ByteAcc, Lock, Preserve)
{
ACCS, 8,
Offset (0x18),
TSTA, 8,
TBCA, 8,
Offset (0xF00),
TVID, 16,
TDID, 16
}
OperationRegion (TPMR, SystemMemory, 0xFED70000, 0x1000)
Field (TPMR, AnyAcc, NoLock, Preserve)
{
Offset (0x04),
FERR, 32,
Offset (0x0C),
BEGN, 32
}
OperationRegion (CRBD, SystemMemory, 0xFED70000, 0x1000)
Field (CRBD, AnyAcc, NoLock, Preserve)
{
Offset (0x04),
HERR, 32,
Offset (0x40),
HCMD, 32,
HSTS, 32
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LEqual (TTDP, Zero))
{
If (TPMF)
{
Return (0x0F)
}
Return (Zero)
}
Else
{
If (LEqual (TTDP, One))
{
Return (0x0F)
}
}
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
If (LEqual (TTPF, One))
{
CreateDWordField (CRST, \_SB.PCI0.SBRG.TPM._Y31._MIN, MTFD) // _MIN: Minimum Base Address
CreateDWordField (CRST, \_SB.PCI0.SBRG.TPM._Y31._MAX, XTFD) // _MAX: Maximum Base Address
CreateDWordField (CRST, \_SB.PCI0.SBRG.TPM._Y31._LEN, LTFD) // _LEN: Length
Store (0xFED40000, MTFD) /* \_SB_.PCI0.SBRG.TPM_._CRS.MTFD */
Store (0xFED44FFF, XTFD) /* \_SB_.PCI0.SBRG.TPM_._CRS.XTFD */
Store (0x5000, LTFD) /* \_SB_.PCI0.SBRG.TPM_._CRS.LTFD */
}
Else
{
If (LEqual (TTPF, Zero))
{
CreateDWordField (CRST, \_SB.PCI0.SBRG.TPM._Y31._MIN, MTFF) // _MIN: Minimum Base Address
CreateDWordField (CRST, \_SB.PCI0.SBRG.TPM._Y31._MAX, XTFF) // _MAX: Maximum Base Address
CreateDWordField (CRST, \_SB.PCI0.SBRG.TPM._Y31._LEN, LTFF) // _LEN: Length
Store (0xFED70000, MTFF) /* \_SB_.PCI0.SBRG.TPM_._CRS.MTFF */
Store (0xFED70FFF, XTFF) /* \_SB_.PCI0.SBRG.TPM_._CRS.XTFF */
Store (0x1000, LTFF) /* \_SB_.PCI0.SBRG.TPM_._CRS.LTFF */
}
}
Return (CRST) /* \_SB_.PCI0.SBRG.TPM_.CRST */
}
Method (STRT, 3, Serialized)
{
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
While (One)
{
Store (ToInteger (Arg1), _T_0) /* \_SB_.PCI0.SBRG.TPM_.STRT._T_0 */
If (LEqual (_T_0, Zero))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
Else
{
If (LEqual (_T_0, One))
{
If (LEqual (Or (And (HSTS, 0x02), And (HSTS, One
)), 0x03))
{
Store (One, HCMD) /* \_SB_.PCI0.SBRG.TPM_.HCMD */
}
Else
{
Store (One, FERR) /* \_SB_.PCI0.SBRG.TPM_.FERR */
Store (Zero, BEGN) /* \_SB_.PCI0.SBRG.TPM_.BEGN */
}
Return (Zero)
}
}
Break
}
Return (Zero)
}
Method (CRYF, 3, Serialized)
{
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
While (One)
{
Store (ToInteger (Arg1), _T_0) /* \_SB_.PCI0.SBRG.TPM_.CRYF._T_0 */
If (LEqual (_T_0, Zero))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
Else
{
If (LEqual (_T_0, One))
{
Name (TPMV, Package (0x02)
{
One,
Package (0x02)
{
One,
0x20
}
})
Return (TPMV) /* \_SB_.PCI0.SBRG.TPM_.CRYF.TPMV */
}
}
Break
}
Return (Buffer (One)
{
0x00 /* . */
})
}
}
}
Scope (_SB.PCI0.SBRG.TPM)
{
OperationRegion (ASMI, SystemIO, SMIA, One)
Field (ASMI, ByteAcc, NoLock, Preserve)
{
INQ, 8
}
OperationRegion (BSMI, SystemIO, SMIB, One)
Field (BSMI, ByteAcc, NoLock, Preserve)
{
DAT, 8
}
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler
Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler
If (LEqual (Arg0, ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653") /* Physical Presence Interface */))
{
While (One)
{
Store (ToInteger (Arg2), _T_0) /* \_SB_.PCI0.SBRG.TPM_._DSM._T_0 */
If (LEqual (_T_0, Zero))
{
Return (Buffer (0x02)
{
0xFF, 0x01 /* .. */
})
}
Else
{
If (LEqual (_T_0, One))
{
Return ("1.2")
}
Else
{
If (LEqual (_T_0, 0x02))
{
ToInteger (DerefOf (Index (Arg3, Zero)), TMF2) /* \TMF2 */
Store (0x12, TMF1) /* \TMF1 */
Store (TMF1, DAT) /* \_SB_.PCI0.SBRG.TPM_.DAT_ */
Store (OFST, INQ) /* \_SB_.PCI0.SBRG.TPM_.INQ_ */
If (LEqual (DAT, 0xFF))
{
Return (0x02)
}
Store (TMF2, DAT) /* \_SB_.PCI0.SBRG.TPM_.DAT_ */
Store (OFST, INQ) /* \_SB_.PCI0.SBRG.TPM_.INQ_ */
If (LEqual (DAT, 0xFF))
{
Return (0x02)
}
If (LEqual (DAT, 0xF1))
{
Return (One)
}
Return (Zero)
}
Else
{
If (LEqual (_T_0, 0x03))
{
Name (PPI1, Package (0x02)
{
Zero,
Zero
})
Store (0x11, DAT) /* \_SB_.PCI0.SBRG.TPM_.DAT_ */
Store (OFST, INQ) /* \_SB_.PCI0.SBRG.TPM_.INQ_ */
If (LEqual (DAT, 0xFF))
{
Return (One)
}
Store (DAT, Index (PPI1, One))
Return (PPI1) /* \_SB_.PCI0.SBRG.TPM_._DSM.PPI1 */
}
Else
{
If (LEqual (_T_0, 0x04))
{
Return (TRST) /* \TRST */
}
Else
{
If (LEqual (_T_0, 0x05))
{
Name (PPI2, Package (0x03)
{
Zero,
Zero,
Zero
})
Store (0x21, DAT) /* \_SB_.PCI0.SBRG.TPM_.DAT_ */
Store (OFST, INQ) /* \_SB_.PCI0.SBRG.TPM_.INQ_ */
Store (DAT, Index (PPI2, One))
If (LEqual (DAT, 0xFF))
{
Return (0x02)
}
Store (0x31, DAT) /* \_SB_.PCI0.SBRG.TPM_.DAT_ */
Store (OFST, INQ) /* \_SB_.PCI0.SBRG.TPM_.INQ_ */
If (LEqual (DAT, 0xFF))
{
Return (0x02)
}
If (LEqual (DAT, 0xF0))
{
Store (0x51, DAT) /* \_SB_.PCI0.SBRG.TPM_.DAT_ */
Store (OFST, INQ) /* \_SB_.PCI0.SBRG.TPM_.INQ_ */
If (LEqual (DAT, 0xFF))
{
Store (0xFFFFFFF0, Index (PPI2, 0x02))
Return (PPI2) /* \_SB_.PCI0.SBRG.TPM_._DSM.PPI2 */
}
}
Else
{
If (LEqual (DAT, 0xF1))
{
Store (0x51, DAT) /* \_SB_.PCI0.SBRG.TPM_.DAT_ */
Store (OFST, INQ) /* \_SB_.PCI0.SBRG.TPM_.INQ_ */
If (LEqual (DAT, 0xFF))
{
Store (0xFFFFFFF1, Index (PPI2, 0x02))
Return (PPI2) /* \_SB_.PCI0.SBRG.TPM_._DSM.PPI2 */
}
}
Else
{
Store (DAT, Index (PPI2, 0x02))
}
}
Return (PPI2) /* \_SB_.PCI0.SBRG.TPM_._DSM.PPI2 */
}
Else
{
If (LEqual (_T_0, 0x06))
{
Return (0x03)
}
Else
{
If (LEqual (_T_0, 0x07))
{
ToInteger (DerefOf (Index (Arg3, Zero)), TMF2) /* \TMF2 */
Store (0x12, TMF1) /* \TMF1 */
Store (TMF1, DAT) /* \_SB_.PCI0.SBRG.TPM_.DAT_ */
Store (OFST, INQ) /* \_SB_.PCI0.SBRG.TPM_.INQ_ */
If (LEqual (DAT, 0xFF))
{
Return (0x02)
}
Store (TMF2, DAT) /* \_SB_.PCI0.SBRG.TPM_.DAT_ */
Store (OFST, INQ) /* \_SB_.PCI0.SBRG.TPM_.INQ_ */
If (LEqual (DAT, 0xFF))
{
Return (0x02)
}
If (LEqual (DAT, 0xF1))
{
Return (One)
}
Return (Zero)
}
Else
{
If (LEqual (_T_0, 0x08))
{
ToInteger (DerefOf (Index (Arg3, Zero)), TMF2) /* \TMF2 */
Store (0x43, TMF1) /* \TMF1 */
Store (TMF1, DAT) /* \_SB_.PCI0.SBRG.TPM_.DAT_ */
Store (OFST, INQ) /* \_SB_.PCI0.SBRG.TPM_.INQ_ */
Store (TMF2, DAT) /* \_SB_.PCI0.SBRG.TPM_.DAT_ */
Store (OFST, INQ) /* \_SB_.PCI0.SBRG.TPM_.INQ_ */
Return (DAT) /* \_SB_.PCI0.SBRG.TPM_.DAT_ */
}
Else
{
}
}
}
}
}
}
}
}
}
Break
}
}
Else
{
If (LEqual (Arg0, ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d")))
{
While (One)
{
Store (ToInteger (Arg2), _T_1) /* \_SB_.PCI0.SBRG.TPM_._DSM._T_1 */
If (LEqual (_T_1, Zero))
{
Return (Buffer (One)
{
0x03 /* . */
})
}
Else
{
If (LEqual (_T_1, One))
{
Store (0x22, TMF1) /* \TMF1 */
Store (TMF1, DAT) /* \_SB_.PCI0.SBRG.TPM_.DAT_ */
Store (OFST, INQ) /* \_SB_.PCI0.SBRG.TPM_.INQ_ */
If (LEqual (DAT, 0xFF))
{
Return (0x02)
}
ToInteger (DerefOf (Index (Arg3, Zero)), TMF1) /* \TMF1 */
Store (TMF1, DAT) /* \_SB_.PCI0.SBRG.TPM_.DAT_ */
Store (OFST, INQ) /* \_SB_.PCI0.SBRG.TPM_.INQ_ */
If (LEqual (DAT, 0xFF))
{
Return (0x02)
}
Return (Zero)
}
Else
{
}
}
Break
}
}
}
If (LEqual (Arg0, ToUUID ("cf8e16a5-c1e8-4e25-b712-4f54a96702c8")))
{
Return (CRYF (Arg1, Arg2, Arg3))
}
If (LEqual (Arg0, ToUUID ("6bbf6cab-5463-4714-b7cd-f0203c0368d4")))
{
Return (STRT (Arg1, Arg2, Arg3))
}
Return (Buffer (One)
{
0x00 /* . */
})
}
}
}
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment