Skip to content

Instantly share code, notes, and snippets.

View andre-richter's full-sized avatar
🤘
Bare-metal is my kind of metal.

Andre Richter andre-richter

🤘
Bare-metal is my kind of metal.
  • Aperture Science, Inc.
  • Munich / München
View GitHub Profile

Keybase proof

I hereby claim:

  • I am andre-richter on github.
  • I am andrerichter (https://keybase.io/andrerichter) on keybase.
  • I have a public key whose fingerprint is F760 21B6 9DC4 7B3C E407 E08D 2057 5B08 50E1 7457

To claim this, I am signing this object:

@andre-richter
andre-richter / endian_verilog.v
Created December 15, 2016 17:20
Conveniently swap endianess in Verilog (32 Bit example)
assign data_swapped = {{data[07:00]},
{data[15:08]},
{data[23:16]},
{data[31:24]}};