http://stackoverflow.com/questions/41405994/hlsl-mul-and-d3dxmatrix-order-mismatch#

diff.hlsl

CASE 1 USING:

#pragma pack_matrix(row_major)
output.position = mul(position, transformation);
  
GENERATES:
vs_5_0
      dcl_globalFlags refactoringAllowed
      dcl_constantbuffer cb0[4], immediateIndexed
      dcl_input v0.xyzw
      dcl_input v1.xyzw
      dcl_input v2.xy
      dcl_output_siv o0.xyzw, position
      dcl_output o1.xyzw
      dcl_output o2.xy
      dcl_temps 1
   0: mul r0.xyzw, v0.yyyy, transformation[1].xyzw
   1: mad r0.xyzw, v0.xxxx, transformation[0].xyzw, r0.xyzw
   2: mad r0.xyzw, v0.zzzz, transformation[2].xyzw, r0.xyzw
   3: mad o0.xyzw, v0.wwww, transformation[3].xyzw, r0.xyzw
   4: mov o1.xyzw, v1.xyzw
   5: mov o2.xy, v2.xyxx
   6: ret

==========================================================================================

CASE 2 USING:

output.position = mul(transformation, position);
  
GENERATES:
vs_5_0
      dcl_globalFlags refactoringAllowed
      dcl_constantbuffer cb0[4], immediateIndexed
      dcl_input v0.xyzw
      dcl_input v1.xyzw
      dcl_input v2.xy
      dcl_output_siv o0.xyzw, position
      dcl_output o1.xyzw
      dcl_output o2.xy
      dcl_temps 1
   0: mul r0.xyzw, v0.yyyy, transformation[1].xyzw
   1: mad r0.xyzw, transformation[0].xyzw, v0.xxxx, r0.xyzw
   2: mad r0.xyzw, transformation[2].xyzw, v0.zzzz, r0.xyzw
   3: mad o0.xyzw, transformation[3].xyzw, v0.wwww, r0.xyzw
   4: mov o1.xyzw, v1.xyzw
   5: mov o2.xy, v2.xyxx
   6: ret

==========================================================================================

CASE 3 USING:

CPU side tranpose
output.position = mul(position, transformation);
  
GENERATES:
vs_5_0
vs_5_0
      dcl_globalFlags refactoringAllowed
      dcl_constantbuffer cb0[4], immediateIndexed
      dcl_input v0.xyzw
      dcl_input v1.xyzw
      dcl_input v2.xy
      dcl_output_siv o0.xyzw, position
      dcl_output o1.xyzw
      dcl_output o2.xy
   0: dp4 o0.x, v0.xyzw, transformation[0].xyzw
   1: dp4 o0.y, v0.xyzw, transformation[1].xyzw
   2: dp4 o0.z, v0.xyzw, transformation[2].xyzw
   3: dp4 o0.w, v0.xyzw, transformation[3].xyzw
   4: mov o1.xyzw, v1.xyzw
   5: mov o2.xy, v2.xyxx
   6: ret