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// SPDX-License-Identifier: GPL-2.0-only | |
// Copyright (C) 2018-2024 Andre Przywara <osp@apritzel.eu> | |
#include <stdio.h> | |
#include <stdint.h> | |
#include <stdlib.h> | |
#include <stdbool.h> | |
#include <getopt.h> | |
#include <arpa/inet.h> // for htonl |
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commit 5e9a281c9f9b50f22fdba619ca3a0f8788224ef3 | |
Author: Andre Przywara <andre.przywara@arm.com> | |
Date: Thu Mar 28 16:18:12 2024 +0000 | |
UNTESTED! H616 high location boot support | |
Signed-off-by: Andre Przywara <andre.przywara@arm.com> | |
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c | |
index 0140b07d32a..046e9fbfc67 100644 |
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Author: Andre Przywara <andre.przywara@arm.com> | |
Date: Wed Sep 6 21:04:05 2023 +0100 | |
pwm: sun20i: Refactor channel enablement | |
When enabling or disabling a PWM channel, we also ungate and gate the | |
respective clock at the same time. | |
Factor this out into a separate function, to simplify extending the | |
driver to other SoCs, where the clock gate is located in a different |
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-plus.dts | |
index e2674af0c4661..dc25bfe09fac2 100644 | |
--- a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-plus.dts | |
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-plus.dts | |
@@ -8,6 +8,7 @@ | |
#include "sun50i-h616.dtsi" | |
#include <dt-bindings/gpio/gpio.h> | |
+#include <dt-bindings/input/linux-event-codes.h> | |
#include <dt-bindings/interrupt-controller/arm-gic.h> |
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
/* | |
* Copyright (C) 2024 Arm Ltd. | |
*/ | |
/dts-v1/; | |
#include "sun50i-h616.dtsi" | |
#include <dt-bindings/gpio/gpio.h> |
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/dts-v1/; | |
#include "sun8i-a33.dtsi" | |
#include <dt-bindings/gpio/gpio.h> | |
#include <dt-bindings/input/input.h> | |
/ { | |
model = "XIEGU Tech X6100 HF+6m Transceiver"; | |
compatible = "xiegu,x6100", "allwinner,sun8i-r16"; |
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commit 17efad455c2cb482f9f950cf6559f713379ce1f1 | |
Author: Andre Przywara <andre.przywara@arm.com> | |
Date: Thu Apr 21 01:20:49 2022 +0100 | |
naive H6 32-bit support (use lindenis_v5_defconfig) | |
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h | |
index 37df4410eaa..d821eafa85e 100644 | |
--- a/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h | |
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h |
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diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h | |
index ec0171e0e6c..430a9f0298a 100644 | |
--- a/arch/arm/include/asm/macro.h | |
+++ b/arch/arm/include/asm/macro.h | |
@@ -325,6 +325,8 @@ lr .req x30 | |
eret | |
1: | |
+ ldr \tmp, =0x00c00878 | |
+ msr sctlr_el1, \tmp |
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// SPDX-License-Identifier: (GPL-2.0+ or MIT) | |
/* | |
* Copyright (c) 2019 Arm Ltd. | |
* based on work by: | |
* Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.io> | |
*/ | |
/dts-v1/; | |
#include "sun50i-h6.dtsi" |
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diff --git a/drivers/video/sunxi/sunxi_display.c b/drivers/video/sunxi/sunxi_display.c | |
index 61498d1642f..25e5f58b467 100644 | |
--- a/drivers/video/sunxi/sunxi_display.c | |
+++ b/drivers/video/sunxi/sunxi_display.c | |
@@ -292,7 +292,11 @@ static int sunxi_hdmi_edid_get_mode(struct sunxi_display *sunxi_display, | |
for (i = 0; i < 4; i++, t++) { | |
r = video_edid_dtd_to_ctfb_res_modes(t, mode); | |
if (r == 0) | |
- break; | |
+ printf("mode %d: %dx%d@%dHz; pixel clock: %d KHz\n", |
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