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commit 39b43797f21f3ba85ce54618b4cce7dc644bfd6d
Author: Andre Przywara <andre.przywara@arm.com>
Date:   Sun Jul 20 16:49:52 2025 +0100

    HACK: sunxi: h616: tanix-tx1: use 32-bit compilation

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 0a7c029b15a..2655aa4c7d6 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig

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// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2023-2024 Arm Ltd.
 *
 * Covers the two CPU PLLs: CPU_L for the "little" cluster, covering
 * cores 0-3, CPU_B for the "big" cluster, covering cores 4-7.
 * There is also the DSU PLL.
 */

#include <linux/clk-provider.h>

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diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig
index 54314992299..114632307b8 100644
--- a/drivers/pinctrl/sunxi/Kconfig
+++ b/drivers/pinctrl/sunxi/Kconfig
@@ -149,4 +149,8 @@ config PINCTRL_SUN55I_A523_R
 	default MACH_SUN55I_A523
 	select PINCTRL_SUNXI
 
+config PINCTRL_SUN8I_B288
+	bool "Support for the Allwinner B288 PIO"

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#!/bin/sh

# ADJUST to match your setup
INITRD=/srv/tftp/busybox.initrd.gz
UBOOT_DIR=/src/u-boot.git

if [ $# -eq 0 -o "$1" = "-h" ]
then
	echo "usage: %0 <kernel.img> [<cmdline>]"
	exit 0

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commit 3a4c07b5f6db324a27b16e40d4185479752401b5
Author: Andre Przywara <andre.przywara@arm.com>
Date:   Wed Jan 8 00:36:38 2025 +0000

    add first Liontron-A133 board support

diff --git a/configs/liontron-h-a133l_defconfig b/configs/liontron-h-a133l_defconfig
new file mode 100644
index 00000000000..bb8a1cdfb57
--- /dev/null

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diff --git a/plat/allwinner/common/include/platform_def.h b/plat/allwinner/common/include/platform_def.h
index c9d075ac8..9543dbeaa 100644
--- a/plat/allwinner/common/include/platform_def.h
+++ b/plat/allwinner/common/include/platform_def.h
@@ -72,7 +72,7 @@
 #define PLATFORM_CLUSTER_COUNT		U(1)
 #define PLATFORM_CORE_COUNT		(PLATFORM_CLUSTER_COUNT * \
 					 PLATFORM_MAX_CPUS_PER_CLUSTER)
-#define PLATFORM_MAX_CPUS_PER_CLUSTER	U(4)
+#define PLATFORM_MAX_CPUS_PER_CLUSTER	U(8)

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From df83929ef745bcecf8235a38dd5f4dfd33a38b03 Mon Sep 17 00:00:00 2001
From: Andre Przywara <andre.przywara@arm.com>
Date: Tue, 5 Feb 2019 16:06:24 +0000
Subject: [PATCH] sunxi: allow 32-bit builds for 64-bit SoCs

At the moment we build the SPL and U-Boot proper for the 64-bit AArch64
instruction set. But since the cores provide an AArch32 compatibility mode
and in fact the BootROM runs in 32-bit mode, it can be useful to have at
least the SPL run in AArch32 as well. This has two advantages:
- As AArch32 features the compact Thumb2 instruction encoding, we can

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diff --git a/arch/arm/cpu/armv8/fel_utils.S b/arch/arm/cpu/armv8/fel_utils.S
index cee030e4809..42a7c93b97a 100644
--- a/arch/arm/cpu/armv8/fel_utils.S
+++ b/arch/arm/cpu/armv8/fel_utils.S
@@ -65,7 +65,7 @@ ENTRY(return_to_fel)
 
 /* AArch32 code to restore the state from fel_stash and return back to FEL. */
 back_in_32:
-	.word	0xe59f0028	// ldr	r0, [pc, #40]	; load fel_stash address
+	.word	0xe59f0038	// ldr	r0, [pc, #56]	; load fel_stash address

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diff --git a/arch/arm/cpu/armv8/fel_utils.S b/arch/arm/cpu/armv8/fel_utils.S
index cee030e4809..87d3fec3c10 100644
--- a/arch/arm/cpu/armv8/fel_utils.S
+++ b/arch/arm/cpu/armv8/fel_utils.S
@@ -65,7 +65,7 @@ ENTRY(return_to_fel)
 
 /* AArch32 code to restore the state from fel_stash and return back to FEL. */
 back_in_32:
-	.word	0xe59f0028	// ldr	r0, [pc, #40]	; load fel_stash address
+	.word	0xe59f0038	// ldr	r0, [pc, #56]	; load fel_stash address

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#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <stdbool.h>
#include <getopt.h>
#include <arpa/inet.h>		// for htonl

struct fdt_header {
	uint32_t magic;
	uint32_t totalsize;