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August 4, 2020 21:33
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; ModuleID = 'sqrt.c' | |
source_filename = "sqrt.c" | |
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" | |
target triple = "x86_64-unknown-linux-gnu" | |
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 0, void ()* @msan.module_ctor, i8* null }] | |
@__msan_track_origins = weak_odr local_unnamed_addr constant i32 2 | |
@__msan_retval_tls = external thread_local(initialexec) global [100 x i64] | |
@__msan_retval_origin_tls = external thread_local(initialexec) global i32 | |
@__msan_param_tls = external thread_local(initialexec) global [100 x i64] | |
@__msan_param_origin_tls = external thread_local(initialexec) global [200 x i32] | |
@__msan_va_arg_tls = external thread_local(initialexec) global [100 x i64] | |
@__msan_va_arg_origin_tls = external thread_local(initialexec) global [200 x i32] | |
@__msan_va_arg_overflow_size_tls = external thread_local(initialexec) global i64 | |
; Function Attrs: norecurse nounwind sanitize_memory uwtable | |
define dso_local noundef i32 @_Z4sqrti(i32 noundef %x) local_unnamed_addr #0 { | |
entry: | |
%div21 = sdiv i32 %x, 2 | |
%conv22 = sext i32 %div21 to i64 | |
%mul23 = mul nsw i64 %conv22, %conv22 | |
%conv2 = sext i32 %x to i64 | |
%sub324 = sub nsw i64 %mul23, %conv2 | |
br i1 false, label %0, label %1, !prof !2 | |
0: ; preds = %entry | |
unreachable | |
1: ; preds = %entry | |
%2 = icmp eq i64 %sub324, 0 | |
br i1 %2, label %if.then, label %if.end.preheader | |
if.end.preheader: ; preds = %1 | |
br label %if.end | |
if.then.loopexit: ; preds = %37 | |
%phi.cmp = icmp eq i32 %_msprop, 0 | |
br label %if.then | |
if.then: ; preds = %if.then.loopexit, %1 | |
%_msphi_s = phi i1 [ true, %1 ], [ %phi.cmp, %if.then.loopexit ] | |
%_msphi_o = phi i32 [ 0, %1 ], [ %17, %if.then.loopexit ] | |
%add.lcssa = phi i32 [ %div21, %1 ], [ %add, %if.then.loopexit ] | |
br i1 %_msphi_s, label %4, label %3, !prof !3 | |
3: ; preds = %if.then | |
call void @__msan_warning_with_origin_noreturn(i32 %_msphi_o) #1 | |
unreachable | |
4: ; preds = %if.then | |
ret i32 %add.lcssa | |
if.end: ; preds = %if.end.preheader, %37 | |
%_msphi_s37 = phi i64 [ %_msprop47, %37 ], [ 0, %if.end.preheader ] | |
%_msphi_o38 = phi i32 [ %17, %37 ], [ 0, %if.end.preheader ] | |
%sub331 = phi i64 [ %sub3, %37 ], [ %sub324, %if.end.preheader ] | |
%_msphi_s39 = phi i32 [ %_msprop, %37 ], [ 0, %if.end.preheader ] | |
%_msphi_o40 = phi i32 [ %17, %37 ], [ 0, %if.end.preheader ] | |
%add30 = phi i32 [ %add, %37 ], [ %div21, %if.end.preheader ] | |
%_msphi_s41 = phi i32 [ %_msprop_select45, %37 ], [ 0, %if.end.preheader ] | |
%_msphi_o42 = phi i32 [ %16, %37 ], [ 0, %if.end.preheader ] | |
%min_r.029 = phi i32 [ %min_r.1, %37 ], [ 0, %if.end.preheader ] | |
%_msphi_s43 = phi i32 [ %_msprop_select, %37 ], [ 0, %if.end.preheader ] | |
%_msphi_o44 = phi i32 [ %10, %37 ], [ 0, %if.end.preheader ] | |
%max_r.028 = phi i32 [ %max_r.1, %37 ], [ %x, %if.end.preheader ] | |
%.not = icmp eq i64 %_msphi_s37, 0 | |
%cmp4 = icmp sgt i64 %sub331, 0 | |
%5 = select i1 %cmp4, i32 %_msphi_s39, i32 %_msphi_s43 | |
%6 = xor i32 %max_r.028, %add30 | |
%7 = or i32 %_msphi_s43, %_msphi_s39 | |
%8 = or i32 %7, %6 | |
%_msprop_select = select i1 %.not, i32 %5, i32 %8 | |
%9 = select i1 %cmp4, i32 %_msphi_o40, i32 %_msphi_o44 | |
%10 = select i1 %.not, i32 %9, i32 %_msphi_o38 | |
%max_r.1 = select i1 %cmp4, i32 %add30, i32 %max_r.028 | |
%11 = select i1 %cmp4, i32 %_msphi_s41, i32 %_msphi_s39 | |
%12 = xor i32 %min_r.029, %add30 | |
%13 = or i32 %_msphi_s41, %_msphi_s39 | |
%14 = or i32 %13, %12 | |
%_msprop_select45 = select i1 %.not, i32 %11, i32 %14 | |
%15 = select i1 %cmp4, i32 %_msphi_o42, i32 %_msphi_o40 | |
%16 = select i1 %.not, i32 %15, i32 %_msphi_o38 | |
%min_r.1 = select i1 %cmp4, i32 %min_r.029, i32 %add30 | |
%_msprop = or i32 %_msprop_select, %_msprop_select45 | |
%.not60 = icmp eq i32 %_msprop_select45, 0 | |
%sub = sub nsw i32 %max_r.1, %min_r.1 | |
%div = sdiv i32 %sub, 2 | |
%17 = select i1 %.not60, i32 %10, i32 %16 | |
%add = add nsw i32 %div, %min_r.1 | |
%_msprop47 = sext i32 %_msprop to i64 | |
%conv = sext i32 %add to i64 | |
%18 = icmp ne i32 %_msprop, 0 | |
%mul = mul nsw i64 %conv, %conv | |
%sub3 = sub nsw i64 %mul, %conv2 | |
%19 = xor i64 %_msprop47, -1 | |
%20 = and i64 %sub3, %19 | |
%21 = icmp eq i64 %20, 0 | |
%_msprop_icmp49 = and i1 %18, %21 | |
%tobool.not = icmp eq i64 %sub3, 0 | |
%22 = xor i64 %sub3, %sub331 | |
%23 = or i64 %_msphi_s37, %_msprop47 | |
%24 = icmp ne i64 %23, 0 | |
%25 = xor i64 %23, -1 | |
%26 = and i64 %22, %25 | |
%27 = icmp eq i64 %26, 0 | |
%_msprop_icmp50 = and i1 %24, %27 | |
%cmp = icmp eq i64 %sub331, %sub3 | |
%28 = xor i1 %tobool.not, true | |
%29 = xor i1 %cmp, true | |
%30 = and i1 %_msprop_icmp49, %29 | |
%31 = or i1 %_msprop_icmp49, %28 | |
%32 = and i1 %31, %_msprop_icmp50 | |
%33 = or i1 %30, %32 | |
br i1 %33, label %34, label %37, !prof !2 | |
34: ; preds = %if.end | |
%35 = select i1 %18, i32 %17, i32 %_msphi_o38 | |
%36 = select i1 %_msprop_icmp50, i32 %35, i32 %17 | |
call void @__msan_warning_with_origin_noreturn(i32 %36) #1 | |
unreachable | |
37: ; preds = %if.end | |
%or.cond = or i1 %tobool.not, %cmp | |
br i1 %or.cond, label %if.then.loopexit, label %if.end, !llvm.loop !4 | |
} | |
declare void @__msan_init() local_unnamed_addr | |
define internal void @msan.module_ctor() { | |
tail call void @__msan_init() | |
ret void | |
} | |
declare i32 @__msan_chain_origin(i32) | |
declare void @__msan_set_origin(i8*, i64, i32) | |
declare i8* @__msan_memmove(i8*, i8*, i64) | |
declare i8* @__msan_memcpy(i8*, i8*, i64) | |
declare i8* @__msan_memset(i8*, i32, i64) | |
declare void @__msan_instrument_asm_store(i8*, i64) | |
declare void @__msan_warning_with_origin_noreturn(i32) | |
declare void @__msan_maybe_warning_1(i8 zeroext, i32 zeroext) | |
declare void @__msan_maybe_store_origin_1(i8 zeroext, i8*, i32 zeroext) | |
declare void @__msan_maybe_warning_2(i16 zeroext, i32 zeroext) | |
declare void @__msan_maybe_store_origin_2(i16 zeroext, i8*, i32 zeroext) | |
declare void @__msan_maybe_warning_4(i32 zeroext, i32 zeroext) | |
declare void @__msan_maybe_store_origin_4(i32 zeroext, i8*, i32 zeroext) | |
declare void @__msan_maybe_warning_8(i64 zeroext, i32 zeroext) | |
declare void @__msan_maybe_store_origin_8(i64 zeroext, i8*, i32 zeroext) | |
declare void @__msan_set_alloca_origin4(i8*, i64, i8*, i64) | |
declare void @__msan_poison_stack(i8*, i64) | |
attributes #0 = { norecurse nounwind sanitize_memory uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } | |
attributes #1 = { nomerge nounwind } | |
!llvm.module.flags = !{!0} | |
!llvm.ident = !{!1} | |
!0 = !{i32 1, !"wchar_size", i32 4} | |
!1 = !{!"clang version 12.0.0 (git@github.com:archshift/llvm-project 7dc09d2f6c94490d994be0e8cf5432290f0e2fd7)"} | |
!2 = !{!"branch_weights", i32 1, i32 1000} | |
!3 = !{!"branch_weights", i32 1000, i32 1} | |
!4 = distinct !{!4, !5} | |
!5 = !{!"llvm.loop.unroll.disable"} |
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