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@arkgil
Last active May 14, 2016 20:50
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My Makefile template
OUT_NAME =
CC = gcc
FLAGS=-Wall -Wpedantic -std=c11
SRC_DIR = src
OBJ_DIR = build
INC_DIR = headers
LIBS =
SRCS =
OBJS = $(SRCS:%.c=%.o)
all: $(OBJS)
$(CC) -o $(OUT_NAME) $(OBJS:%=$(OBJ_DIR)/%)
$(OBJS): %.o: %.c
$(CC) $(FLAGS) -c $(SRC_DIR)/$< -o $(OBJ_DIR)/$@ -I$(INC_DIR) $(LIBS)
$(SRCS):
clean:
rm -f $(OBJ_DIR)/* $(OUT_NAME)
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