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Regenerate tests after D133943
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| diff --git a/clang/test/CodeGen/2005-01-02-ConstantInits.c b/clang/test/CodeGen/2005-01-02-ConstantInits.c | |
| index 83fad569c1ec..af215b1a388a 100644 | |
| --- a/clang/test/CodeGen/2005-01-02-ConstantInits.c | |
| +++ b/clang/test/CodeGen/2005-01-02-ConstantInits.c | |
| @@ -14,7 +14,7 @@ extern int bar(); | |
| // CHECK: @foo2.X = internal global ptr getelementptr (i8, ptr @Arr, i64 196), align 8 | |
| // CHECK: @foo2.i23 = internal global i32 0, align 4 | |
| //. | |
| -// CHECK-LABEL: define {{[^@]+}}@test | |
| +// CHECK-LABEL: define dso_local i32 @test | |
| // CHECK-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @test.i23, align 4 | |
| @@ -29,7 +29,7 @@ int i = (int) &( ((struct X *)0) -> a[1]); | |
| int Arr[100]; | |
| -// CHECK-LABEL: define {{[^@]+}}@foo | |
| +// CHECK-LABEL: define dso_local i32 @foo | |
| // CHECK-SAME: (i32 noundef [[I:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -43,7 +43,7 @@ int Arr[100]; | |
| // CHECK-NEXT: ret i32 [[ADD]] | |
| // | |
| int foo(int i) { return bar(&Arr[49])+bar(&Arr[i]); } | |
| -// CHECK-LABEL: define {{[^@]+}}@foo2 | |
| +// CHECK-LABEL: define dso_local i32 @foo2 | |
| // CHECK-SAME: (i32 noundef [[I:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 | |
| diff --git a/clang/test/CodeGen/aarch64-neon-across.c b/clang/test/CodeGen/aarch64-neon-across.c | |
| index d36597559355..2b32baf81fef 100644 | |
| --- a/clang/test/CodeGen/aarch64-neon-across.c | |
| +++ b/clang/test/CodeGen/aarch64-neon-across.c | |
| @@ -6,7 +6,7 @@ | |
| #include <arm_neon.h> | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddlv_s8 | |
| +// CHECK-LABEL: define dso_local i16 @test_vaddlv_s8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v8i8(<8 x i8> [[A]]) | |
| @@ -17,7 +17,7 @@ int16_t test_vaddlv_s8(int8x8_t a) { | |
| return vaddlv_s8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddlv_s16 | |
| +// CHECK-LABEL: define dso_local i32 @test_vaddlv_s16 | |
| // CHECK-SAME: (<4 x i16> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v4i16(<4 x i16> [[A]]) | |
| @@ -27,7 +27,7 @@ int32_t test_vaddlv_s16(int16x4_t a) { | |
| return vaddlv_s16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddlv_u8 | |
| +// CHECK-LABEL: define dso_local i16 @test_vaddlv_u8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v8i8(<8 x i8> [[A]]) | |
| @@ -38,7 +38,7 @@ uint16_t test_vaddlv_u8(uint8x8_t a) { | |
| return vaddlv_u8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddlv_u16 | |
| +// CHECK-LABEL: define dso_local i32 @test_vaddlv_u16 | |
| // CHECK-SAME: (<4 x i16> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v4i16(<4 x i16> [[A]]) | |
| @@ -48,7 +48,7 @@ uint32_t test_vaddlv_u16(uint16x4_t a) { | |
| return vaddlv_u16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddlvq_s8 | |
| +// CHECK-LABEL: define dso_local i16 @test_vaddlvq_s8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v16i8(<16 x i8> [[A]]) | |
| @@ -59,7 +59,7 @@ int16_t test_vaddlvq_s8(int8x16_t a) { | |
| return vaddlvq_s8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddlvq_s16 | |
| +// CHECK-LABEL: define dso_local i32 @test_vaddlvq_s16 | |
| // CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v8i16(<8 x i16> [[A]]) | |
| @@ -69,7 +69,7 @@ int32_t test_vaddlvq_s16(int16x8_t a) { | |
| return vaddlvq_s16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddlvq_s32 | |
| +// CHECK-LABEL: define dso_local i64 @test_vaddlvq_s32 | |
| // CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = call i64 @llvm.aarch64.neon.saddlv.i64.v4i32(<4 x i32> [[A]]) | |
| @@ -79,7 +79,7 @@ int64_t test_vaddlvq_s32(int32x4_t a) { | |
| return vaddlvq_s32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddlvq_u8 | |
| +// CHECK-LABEL: define dso_local i16 @test_vaddlvq_u8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v16i8(<16 x i8> [[A]]) | |
| @@ -90,7 +90,7 @@ uint16_t test_vaddlvq_u8(uint8x16_t a) { | |
| return vaddlvq_u8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddlvq_u16 | |
| +// CHECK-LABEL: define dso_local i32 @test_vaddlvq_u16 | |
| // CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v8i16(<8 x i16> [[A]]) | |
| @@ -100,7 +100,7 @@ uint32_t test_vaddlvq_u16(uint16x8_t a) { | |
| return vaddlvq_u16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddlvq_u32 | |
| +// CHECK-LABEL: define dso_local i64 @test_vaddlvq_u32 | |
| // CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDLVQ_U32_I:%.*]] = call i64 @llvm.aarch64.neon.uaddlv.i64.v4i32(<4 x i32> [[A]]) | |
| @@ -110,7 +110,7 @@ uint64_t test_vaddlvq_u32(uint32x4_t a) { | |
| return vaddlvq_u32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxv_s8 | |
| +// CHECK-LABEL: define dso_local i8 @test_vmaxv_s8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v8i8(<8 x i8> [[A]]) | |
| @@ -121,7 +121,7 @@ int8_t test_vmaxv_s8(int8x8_t a) { | |
| return vmaxv_s8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxv_s16 | |
| +// CHECK-LABEL: define dso_local i16 @test_vmaxv_s16 | |
| // CHECK-SAME: (<4 x i16> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v4i16(<4 x i16> [[A]]) | |
| @@ -132,7 +132,7 @@ int16_t test_vmaxv_s16(int16x4_t a) { | |
| return vmaxv_s16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxv_u8 | |
| +// CHECK-LABEL: define dso_local i8 @test_vmaxv_u8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v8i8(<8 x i8> [[A]]) | |
| @@ -143,7 +143,7 @@ uint8_t test_vmaxv_u8(uint8x8_t a) { | |
| return vmaxv_u8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxv_u16 | |
| +// CHECK-LABEL: define dso_local i16 @test_vmaxv_u16 | |
| // CHECK-SAME: (<4 x i16> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v4i16(<4 x i16> [[A]]) | |
| @@ -154,7 +154,7 @@ uint16_t test_vmaxv_u16(uint16x4_t a) { | |
| return vmaxv_u16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxvq_s8 | |
| +// CHECK-LABEL: define dso_local i8 @test_vmaxvq_s8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v16i8(<16 x i8> [[A]]) | |
| @@ -165,7 +165,7 @@ int8_t test_vmaxvq_s8(int8x16_t a) { | |
| return vmaxvq_s8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxvq_s16 | |
| +// CHECK-LABEL: define dso_local i16 @test_vmaxvq_s16 | |
| // CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v8i16(<8 x i16> [[A]]) | |
| @@ -176,7 +176,7 @@ int16_t test_vmaxvq_s16(int16x8_t a) { | |
| return vmaxvq_s16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxvq_s32 | |
| +// CHECK-LABEL: define dso_local i32 @test_vmaxvq_s32 | |
| // CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMAXVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v4i32(<4 x i32> [[A]]) | |
| @@ -186,7 +186,7 @@ int32_t test_vmaxvq_s32(int32x4_t a) { | |
| return vmaxvq_s32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxvq_u8 | |
| +// CHECK-LABEL: define dso_local i8 @test_vmaxvq_u8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v16i8(<16 x i8> [[A]]) | |
| @@ -197,7 +197,7 @@ uint8_t test_vmaxvq_u8(uint8x16_t a) { | |
| return vmaxvq_u8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxvq_u16 | |
| +// CHECK-LABEL: define dso_local i16 @test_vmaxvq_u16 | |
| // CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v8i16(<8 x i16> [[A]]) | |
| @@ -208,7 +208,7 @@ uint16_t test_vmaxvq_u16(uint16x8_t a) { | |
| return vmaxvq_u16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxvq_u32 | |
| +// CHECK-LABEL: define dso_local i32 @test_vmaxvq_u32 | |
| // CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMAXVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v4i32(<4 x i32> [[A]]) | |
| @@ -218,7 +218,7 @@ uint32_t test_vmaxvq_u32(uint32x4_t a) { | |
| return vmaxvq_u32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminv_s8 | |
| +// CHECK-LABEL: define dso_local i8 @test_vminv_s8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v8i8(<8 x i8> [[A]]) | |
| @@ -229,7 +229,7 @@ int8_t test_vminv_s8(int8x8_t a) { | |
| return vminv_s8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminv_s16 | |
| +// CHECK-LABEL: define dso_local i16 @test_vminv_s16 | |
| // CHECK-SAME: (<4 x i16> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v4i16(<4 x i16> [[A]]) | |
| @@ -240,7 +240,7 @@ int16_t test_vminv_s16(int16x4_t a) { | |
| return vminv_s16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminv_u8 | |
| +// CHECK-LABEL: define dso_local i8 @test_vminv_u8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v8i8(<8 x i8> [[A]]) | |
| @@ -251,7 +251,7 @@ uint8_t test_vminv_u8(uint8x8_t a) { | |
| return vminv_u8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminv_u16 | |
| +// CHECK-LABEL: define dso_local i16 @test_vminv_u16 | |
| // CHECK-SAME: (<4 x i16> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v4i16(<4 x i16> [[A]]) | |
| @@ -262,7 +262,7 @@ uint16_t test_vminv_u16(uint16x4_t a) { | |
| return vminv_u16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminvq_s8 | |
| +// CHECK-LABEL: define dso_local i8 @test_vminvq_s8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v16i8(<16 x i8> [[A]]) | |
| @@ -273,7 +273,7 @@ int8_t test_vminvq_s8(int8x16_t a) { | |
| return vminvq_s8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminvq_s16 | |
| +// CHECK-LABEL: define dso_local i16 @test_vminvq_s16 | |
| // CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v8i16(<8 x i16> [[A]]) | |
| @@ -284,7 +284,7 @@ int16_t test_vminvq_s16(int16x8_t a) { | |
| return vminvq_s16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminvq_s32 | |
| +// CHECK-LABEL: define dso_local i32 @test_vminvq_s32 | |
| // CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMINVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v4i32(<4 x i32> [[A]]) | |
| @@ -294,7 +294,7 @@ int32_t test_vminvq_s32(int32x4_t a) { | |
| return vminvq_s32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminvq_u8 | |
| +// CHECK-LABEL: define dso_local i8 @test_vminvq_u8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v16i8(<16 x i8> [[A]]) | |
| @@ -305,7 +305,7 @@ uint8_t test_vminvq_u8(uint8x16_t a) { | |
| return vminvq_u8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminvq_u16 | |
| +// CHECK-LABEL: define dso_local i16 @test_vminvq_u16 | |
| // CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v8i16(<8 x i16> [[A]]) | |
| @@ -316,7 +316,7 @@ uint16_t test_vminvq_u16(uint16x8_t a) { | |
| return vminvq_u16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminvq_u32 | |
| +// CHECK-LABEL: define dso_local i32 @test_vminvq_u32 | |
| // CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMINVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v4i32(<4 x i32> [[A]]) | |
| @@ -326,7 +326,7 @@ uint32_t test_vminvq_u32(uint32x4_t a) { | |
| return vminvq_u32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddv_s8 | |
| +// CHECK-LABEL: define dso_local i8 @test_vaddv_s8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v8i8(<8 x i8> [[A]]) | |
| @@ -337,7 +337,7 @@ int8_t test_vaddv_s8(int8x8_t a) { | |
| return vaddv_s8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddv_s16 | |
| +// CHECK-LABEL: define dso_local i16 @test_vaddv_s16 | |
| // CHECK-SAME: (<4 x i16> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v4i16(<4 x i16> [[A]]) | |
| @@ -348,7 +348,7 @@ int16_t test_vaddv_s16(int16x4_t a) { | |
| return vaddv_s16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddv_u8 | |
| +// CHECK-LABEL: define dso_local i8 @test_vaddv_u8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v8i8(<8 x i8> [[A]]) | |
| @@ -359,7 +359,7 @@ uint8_t test_vaddv_u8(uint8x8_t a) { | |
| return vaddv_u8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddv_u16 | |
| +// CHECK-LABEL: define dso_local i16 @test_vaddv_u16 | |
| // CHECK-SAME: (<4 x i16> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v4i16(<4 x i16> [[A]]) | |
| @@ -370,7 +370,7 @@ uint16_t test_vaddv_u16(uint16x4_t a) { | |
| return vaddv_u16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddvq_s8 | |
| +// CHECK-LABEL: define dso_local i8 @test_vaddvq_s8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v16i8(<16 x i8> [[A]]) | |
| @@ -381,7 +381,7 @@ int8_t test_vaddvq_s8(int8x16_t a) { | |
| return vaddvq_s8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddvq_s16 | |
| +// CHECK-LABEL: define dso_local i16 @test_vaddvq_s16 | |
| // CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v8i16(<8 x i16> [[A]]) | |
| @@ -392,7 +392,7 @@ int16_t test_vaddvq_s16(int16x8_t a) { | |
| return vaddvq_s16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddvq_s32 | |
| +// CHECK-LABEL: define dso_local i32 @test_vaddvq_s32 | |
| // CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v4i32(<4 x i32> [[A]]) | |
| @@ -402,7 +402,7 @@ int32_t test_vaddvq_s32(int32x4_t a) { | |
| return vaddvq_s32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddvq_u8 | |
| +// CHECK-LABEL: define dso_local i8 @test_vaddvq_u8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v16i8(<16 x i8> [[A]]) | |
| @@ -413,7 +413,7 @@ uint8_t test_vaddvq_u8(uint8x16_t a) { | |
| return vaddvq_u8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddvq_u16 | |
| +// CHECK-LABEL: define dso_local i16 @test_vaddvq_u16 | |
| // CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v8i16(<8 x i16> [[A]]) | |
| @@ -424,7 +424,7 @@ uint16_t test_vaddvq_u16(uint16x8_t a) { | |
| return vaddvq_u16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddvq_u32 | |
| +// CHECK-LABEL: define dso_local i32 @test_vaddvq_u32 | |
| // CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VADDVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v4i32(<4 x i32> [[A]]) | |
| @@ -434,7 +434,7 @@ uint32_t test_vaddvq_u32(uint32x4_t a) { | |
| return vaddvq_u32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxvq_f32 | |
| +// CHECK-LABEL: define dso_local float @test_vmaxvq_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMAXVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxv.f32.v4f32(<4 x float> [[A]]) | |
| @@ -444,7 +444,7 @@ float32_t test_vmaxvq_f32(float32x4_t a) { | |
| return vmaxvq_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminvq_f32 | |
| +// CHECK-LABEL: define dso_local float @test_vminvq_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMINVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float> [[A]]) | |
| @@ -454,7 +454,7 @@ float32_t test_vminvq_f32(float32x4_t a) { | |
| return vminvq_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxnmvq_f32 | |
| +// CHECK-LABEL: define dso_local float @test_vmaxnmvq_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMAXNMVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float> [[A]]) | |
| @@ -464,7 +464,7 @@ float32_t test_vmaxnmvq_f32(float32x4_t a) { | |
| return vmaxnmvq_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminnmvq_f32 | |
| +// CHECK-LABEL: define dso_local float @test_vminnmvq_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMINNMVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fminnmv.f32.v4f32(<4 x float> [[A]]) | |
| diff --git a/clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c b/clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c | |
| index 670b65070289..bbcaa25149f2 100644 | |
| --- a/clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c | |
| +++ b/clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c | |
| @@ -6,7 +6,7 @@ | |
| #include <arm_neon.h> | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtxd_f32_f64 | |
| +// CHECK-LABEL: define dso_local float @test_vcvtxd_f32_f64 | |
| // CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTXD_F32_F64_I:%.*]] = call float @llvm.aarch64.sisd.fcvtxn(double [[A]]) | |
| @@ -16,7 +16,7 @@ float32_t test_vcvtxd_f32_f64(float64_t a) { | |
| return (float32_t)vcvtxd_f32_f64(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtas_s32_f32 | |
| +// CHECK-LABEL: define dso_local i32 @test_vcvtas_s32_f32 | |
| // CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTAS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtas.i32.f32(float [[A]]) | |
| @@ -26,7 +26,7 @@ int32_t test_vcvtas_s32_f32(float32_t a) { | |
| return (int32_t)vcvtas_s32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_test_vcvtad_s64_f64 | |
| +// CHECK-LABEL: define dso_local i64 @test_test_vcvtad_s64_f64 | |
| // CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTAD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtas.i64.f64(double [[A]]) | |
| @@ -36,7 +36,7 @@ int64_t test_test_vcvtad_s64_f64(float64_t a) { | |
| return (int64_t)vcvtad_s64_f64(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtas_u32_f32 | |
| +// CHECK-LABEL: define dso_local i32 @test_vcvtas_u32_f32 | |
| // CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTAS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtau.i32.f32(float [[A]]) | |
| @@ -46,7 +46,7 @@ uint32_t test_vcvtas_u32_f32(float32_t a) { | |
| return (uint32_t)vcvtas_u32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtad_u64_f64 | |
| +// CHECK-LABEL: define dso_local i64 @test_vcvtad_u64_f64 | |
| // CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTAD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtau.i64.f64(double [[A]]) | |
| @@ -56,7 +56,7 @@ uint64_t test_vcvtad_u64_f64(float64_t a) { | |
| return (uint64_t)vcvtad_u64_f64(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtms_s32_f32 | |
| +// CHECK-LABEL: define dso_local i32 @test_vcvtms_s32_f32 | |
| // CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTMS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtms.i32.f32(float [[A]]) | |
| @@ -66,7 +66,7 @@ int32_t test_vcvtms_s32_f32(float32_t a) { | |
| return (int32_t)vcvtms_s32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtmd_s64_f64 | |
| +// CHECK-LABEL: define dso_local i64 @test_vcvtmd_s64_f64 | |
| // CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTMD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtms.i64.f64(double [[A]]) | |
| @@ -76,7 +76,7 @@ int64_t test_vcvtmd_s64_f64(float64_t a) { | |
| return (int64_t)vcvtmd_s64_f64(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtms_u32_f32 | |
| +// CHECK-LABEL: define dso_local i32 @test_vcvtms_u32_f32 | |
| // CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTMS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float [[A]]) | |
| @@ -86,7 +86,7 @@ uint32_t test_vcvtms_u32_f32(float32_t a) { | |
| return (uint32_t)vcvtms_u32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtmd_u64_f64 | |
| +// CHECK-LABEL: define dso_local i64 @test_vcvtmd_u64_f64 | |
| // CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTMD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtmu.i64.f64(double [[A]]) | |
| @@ -96,7 +96,7 @@ uint64_t test_vcvtmd_u64_f64(float64_t a) { | |
| return (uint64_t)vcvtmd_u64_f64(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtns_s32_f32 | |
| +// CHECK-LABEL: define dso_local i32 @test_vcvtns_s32_f32 | |
| // CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTNS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtns.i32.f32(float [[A]]) | |
| @@ -106,7 +106,7 @@ int32_t test_vcvtns_s32_f32(float32_t a) { | |
| return (int32_t)vcvtns_s32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtnd_s64_f64 | |
| +// CHECK-LABEL: define dso_local i64 @test_vcvtnd_s64_f64 | |
| // CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTND_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtns.i64.f64(double [[A]]) | |
| @@ -116,7 +116,7 @@ int64_t test_vcvtnd_s64_f64(float64_t a) { | |
| return (int64_t)vcvtnd_s64_f64(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtns_u32_f32 | |
| +// CHECK-LABEL: define dso_local i32 @test_vcvtns_u32_f32 | |
| // CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTNS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtnu.i32.f32(float [[A]]) | |
| @@ -126,7 +126,7 @@ uint32_t test_vcvtns_u32_f32(float32_t a) { | |
| return (uint32_t)vcvtns_u32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtnd_u64_f64 | |
| +// CHECK-LABEL: define dso_local i64 @test_vcvtnd_u64_f64 | |
| // CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTND_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtnu.i64.f64(double [[A]]) | |
| @@ -136,7 +136,7 @@ uint64_t test_vcvtnd_u64_f64(float64_t a) { | |
| return (uint64_t)vcvtnd_u64_f64(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtps_s32_f32 | |
| +// CHECK-LABEL: define dso_local i32 @test_vcvtps_s32_f32 | |
| // CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTPS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtps.i32.f32(float [[A]]) | |
| @@ -146,7 +146,7 @@ int32_t test_vcvtps_s32_f32(float32_t a) { | |
| return (int32_t)vcvtps_s32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtpd_s64_f64 | |
| +// CHECK-LABEL: define dso_local i64 @test_vcvtpd_s64_f64 | |
| // CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTPD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtps.i64.f64(double [[A]]) | |
| @@ -156,7 +156,7 @@ int64_t test_vcvtpd_s64_f64(float64_t a) { | |
| return (int64_t)vcvtpd_s64_f64(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtps_u32_f32 | |
| +// CHECK-LABEL: define dso_local i32 @test_vcvtps_u32_f32 | |
| // CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTPS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtpu.i32.f32(float [[A]]) | |
| @@ -166,7 +166,7 @@ uint32_t test_vcvtps_u32_f32(float32_t a) { | |
| return (uint32_t)vcvtps_u32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtpd_u64_f64 | |
| +// CHECK-LABEL: define dso_local i64 @test_vcvtpd_u64_f64 | |
| // CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTPD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtpu.i64.f64(double [[A]]) | |
| @@ -176,7 +176,7 @@ uint64_t test_vcvtpd_u64_f64(float64_t a) { | |
| return (uint64_t)vcvtpd_u64_f64(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvts_s32_f32 | |
| +// CHECK-LABEL: define dso_local i32 @test_vcvts_s32_f32 | |
| // CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtzs.i32.f32(float [[A]]) | |
| @@ -186,7 +186,7 @@ int32_t test_vcvts_s32_f32(float32_t a) { | |
| return (int32_t)vcvts_s32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtd_s64_f64 | |
| +// CHECK-LABEL: define dso_local i64 @test_vcvtd_s64_f64 | |
| // CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtzs.i64.f64(double [[A]]) | |
| @@ -196,7 +196,7 @@ int64_t test_vcvtd_s64_f64(float64_t a) { | |
| return (int64_t)vcvtd_s64_f64(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvts_u32_f32 | |
| +// CHECK-LABEL: define dso_local i32 @test_vcvts_u32_f32 | |
| // CHECK-SAME: (float noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtzu.i32.f32(float [[A]]) | |
| @@ -206,7 +206,7 @@ uint32_t test_vcvts_u32_f32(float32_t a) { | |
| return (uint32_t)vcvts_u32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtd_u64_f64 | |
| +// CHECK-LABEL: define dso_local i64 @test_vcvtd_u64_f64 | |
| // CHECK-SAME: (double noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VCVTD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtzu.i64.f64(double [[A]]) | |
| diff --git a/clang/test/CodeGen/aarch64-neon-fma.c b/clang/test/CodeGen/aarch64-neon-fma.c | |
| index acc8d050d5ca..5d734f238400 100644 | |
| --- a/clang/test/CodeGen/aarch64-neon-fma.c | |
| +++ b/clang/test/CodeGen/aarch64-neon-fma.c | |
| @@ -5,7 +5,7 @@ | |
| #include <arm_neon.h> | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmla_n_f32 | |
| +// CHECK-LABEL: define dso_local <2 x float> @test_vmla_n_f32 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]], float noundef [[C:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float [[C]], i32 0 | |
| @@ -18,7 +18,7 @@ float32x2_t test_vmla_n_f32(float32x2_t a, float32x2_t b, float32_t c) { | |
| return vmla_n_f32(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmlaq_n_f32 | |
| +// CHECK-LABEL: define dso_local <4 x float> @test_vmlaq_n_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]], float noundef [[C:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float [[C]], i32 0 | |
| @@ -33,7 +33,7 @@ float32x4_t test_vmlaq_n_f32(float32x4_t a, float32x4_t b, float32_t c) { | |
| return vmlaq_n_f32(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmlsq_n_f32 | |
| +// CHECK-LABEL: define dso_local <4 x float> @test_vmlsq_n_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]], float noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float [[C]], i32 0 | |
| @@ -48,7 +48,7 @@ float32x4_t test_vmlsq_n_f32(float32x4_t a, float32x4_t b, float32_t c) { | |
| return vmlsq_n_f32(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmls_n_f32 | |
| +// CHECK-LABEL: define dso_local <2 x float> @test_vmls_n_f32 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]], float noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float [[C]], i32 0 | |
| @@ -61,7 +61,7 @@ float32x2_t test_vmls_n_f32(float32x2_t a, float32x2_t b, float32_t c) { | |
| return vmls_n_f32(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmla_lane_f32_0 | |
| +// CHECK-LABEL: define dso_local <2 x float> @test_vmla_lane_f32_0 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]], <2 x float> noundef [[V:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[V]] to <8 x i8> | |
| @@ -75,7 +75,7 @@ float32x2_t test_vmla_lane_f32_0(float32x2_t a, float32x2_t b, float32x2_t v) { | |
| return vmla_lane_f32(a, b, v, 0); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmlaq_lane_f32_0 | |
| +// CHECK-LABEL: define dso_local <4 x float> @test_vmlaq_lane_f32_0 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]], <2 x float> noundef [[V:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[V]] to <8 x i8> | |
| @@ -89,7 +89,7 @@ float32x4_t test_vmlaq_lane_f32_0(float32x4_t a, float32x4_t b, float32x2_t v) { | |
| return vmlaq_lane_f32(a, b, v, 0); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmla_laneq_f32_0 | |
| +// CHECK-LABEL: define dso_local <2 x float> @test_vmla_laneq_f32_0 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]], <4 x float> noundef [[V:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[V]] to <16 x i8> | |
| @@ -103,7 +103,7 @@ float32x2_t test_vmla_laneq_f32_0(float32x2_t a, float32x2_t b, float32x4_t v) { | |
| return vmla_laneq_f32(a, b, v, 0); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmlaq_laneq_f32_0 | |
| +// CHECK-LABEL: define dso_local <4 x float> @test_vmlaq_laneq_f32_0 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]], <4 x float> noundef [[V:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[V]] to <16 x i8> | |
| @@ -117,7 +117,7 @@ float32x4_t test_vmlaq_laneq_f32_0(float32x4_t a, float32x4_t b, float32x4_t v) | |
| return vmlaq_laneq_f32(a, b, v, 0); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmls_lane_f32_0 | |
| +// CHECK-LABEL: define dso_local <2 x float> @test_vmls_lane_f32_0 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]], <2 x float> noundef [[V:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[V]] to <8 x i8> | |
| @@ -131,7 +131,7 @@ float32x2_t test_vmls_lane_f32_0(float32x2_t a, float32x2_t b, float32x2_t v) { | |
| return vmls_lane_f32(a, b, v, 0); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmlsq_lane_f32_0 | |
| +// CHECK-LABEL: define dso_local <4 x float> @test_vmlsq_lane_f32_0 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]], <2 x float> noundef [[V:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[V]] to <8 x i8> | |
| @@ -145,7 +145,7 @@ float32x4_t test_vmlsq_lane_f32_0(float32x4_t a, float32x4_t b, float32x2_t v) { | |
| return vmlsq_lane_f32(a, b, v, 0); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmls_laneq_f32_0 | |
| +// CHECK-LABEL: define dso_local <2 x float> @test_vmls_laneq_f32_0 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]], <4 x float> noundef [[V:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[V]] to <16 x i8> | |
| @@ -159,7 +159,7 @@ float32x2_t test_vmls_laneq_f32_0(float32x2_t a, float32x2_t b, float32x4_t v) { | |
| return vmls_laneq_f32(a, b, v, 0); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmlsq_laneq_f32_0 | |
| +// CHECK-LABEL: define dso_local <4 x float> @test_vmlsq_laneq_f32_0 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]], <4 x float> noundef [[V:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[V]] to <16 x i8> | |
| @@ -173,7 +173,7 @@ float32x4_t test_vmlsq_laneq_f32_0(float32x4_t a, float32x4_t b, float32x4_t v) | |
| return vmlsq_laneq_f32(a, b, v, 0); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmla_lane_f32 | |
| +// CHECK-LABEL: define dso_local <2 x float> @test_vmla_lane_f32 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]], <2 x float> noundef [[V:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[V]] to <8 x i8> | |
| @@ -187,7 +187,7 @@ float32x2_t test_vmla_lane_f32(float32x2_t a, float32x2_t b, float32x2_t v) { | |
| return vmla_lane_f32(a, b, v, 1); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmlaq_lane_f32 | |
| +// CHECK-LABEL: define dso_local <4 x float> @test_vmlaq_lane_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]], <2 x float> noundef [[V:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[V]] to <8 x i8> | |
| @@ -201,7 +201,7 @@ float32x4_t test_vmlaq_lane_f32(float32x4_t a, float32x4_t b, float32x2_t v) { | |
| return vmlaq_lane_f32(a, b, v, 1); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmla_laneq_f32 | |
| +// CHECK-LABEL: define dso_local <2 x float> @test_vmla_laneq_f32 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]], <4 x float> noundef [[V:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[V]] to <16 x i8> | |
| @@ -215,7 +215,7 @@ float32x2_t test_vmla_laneq_f32(float32x2_t a, float32x2_t b, float32x4_t v) { | |
| return vmla_laneq_f32(a, b, v, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmlaq_laneq_f32 | |
| +// CHECK-LABEL: define dso_local <4 x float> @test_vmlaq_laneq_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]], <4 x float> noundef [[V:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[V]] to <16 x i8> | |
| @@ -229,7 +229,7 @@ float32x4_t test_vmlaq_laneq_f32(float32x4_t a, float32x4_t b, float32x4_t v) { | |
| return vmlaq_laneq_f32(a, b, v, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmls_lane_f32 | |
| +// CHECK-LABEL: define dso_local <2 x float> @test_vmls_lane_f32 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]], <2 x float> noundef [[V:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[V]] to <8 x i8> | |
| @@ -243,7 +243,7 @@ float32x2_t test_vmls_lane_f32(float32x2_t a, float32x2_t b, float32x2_t v) { | |
| return vmls_lane_f32(a, b, v, 1); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmlsq_lane_f32 | |
| +// CHECK-LABEL: define dso_local <4 x float> @test_vmlsq_lane_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]], <2 x float> noundef [[V:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[V]] to <8 x i8> | |
| @@ -256,7 +256,7 @@ float32x2_t test_vmls_lane_f32(float32x2_t a, float32x2_t b, float32x2_t v) { | |
| float32x4_t test_vmlsq_lane_f32(float32x4_t a, float32x4_t b, float32x2_t v) { | |
| return vmlsq_lane_f32(a, b, v, 1); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmls_laneq_f32 | |
| +// CHECK-LABEL: define dso_local <2 x float> @test_vmls_laneq_f32 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]], <4 x float> noundef [[V:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[V]] to <16 x i8> | |
| @@ -270,7 +270,7 @@ float32x2_t test_vmls_laneq_f32(float32x2_t a, float32x2_t b, float32x4_t v) { | |
| return vmls_laneq_f32(a, b, v, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmlsq_laneq_f32 | |
| +// CHECK-LABEL: define dso_local <4 x float> @test_vmlsq_laneq_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]], <4 x float> noundef [[V:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[V]] to <16 x i8> | |
| @@ -284,7 +284,7 @@ float32x4_t test_vmlsq_laneq_f32(float32x4_t a, float32x4_t b, float32x4_t v) { | |
| return vmlsq_laneq_f32(a, b, v, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfmaq_n_f64 | |
| +// CHECK-LABEL: define dso_local <2 x double> @test_vfmaq_n_f64 | |
| // CHECK-SAME: (<2 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]], double noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double [[C]], i32 0 | |
| @@ -299,7 +299,7 @@ float64x2_t test_vfmaq_n_f64(float64x2_t a, float64x2_t b, float64_t c) { | |
| return vfmaq_n_f64(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfmsq_n_f64 | |
| +// CHECK-LABEL: define dso_local <2 x double> @test_vfmsq_n_f64 | |
| // CHECK-SAME: (<2 x double> noundef [[A:%.*]], <2 x double> noundef [[B:%.*]], double noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[FNEG_I:%.*]] = fneg <2 x double> [[B]] | |
| diff --git a/clang/test/CodeGen/aarch64-neon-tbl.c b/clang/test/CodeGen/aarch64-neon-tbl.c | |
| index 264e7d731b4c..9a85a96d6e88 100644 | |
| --- a/clang/test/CodeGen/aarch64-neon-tbl.c | |
| +++ b/clang/test/CodeGen/aarch64-neon-tbl.c | |
| @@ -6,7 +6,7 @@ | |
| #include <arm_neon.h> | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbl1_s8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl1_s8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBL1_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> | |
| @@ -17,7 +17,7 @@ int8x8_t test_vtbl1_s8(int8x8_t a, int8x8_t b) { | |
| return vtbl1_s8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl1_s8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl1_s8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[A]], <8 x i8> [[B]]) | |
| @@ -27,7 +27,7 @@ int8x8_t test_vqtbl1_s8(int8x16_t a, uint8x8_t b) { | |
| return vqtbl1_s8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbl2_s8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl2_s8 | |
| // CHECK-SAME: ([2 x <8 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_INT8X8X2_T:%.*]], align 8 | |
| @@ -48,7 +48,7 @@ int8x8_t test_vtbl2_s8(int8x8x2_t a, int8x8_t b) { | |
| return vtbl2_s8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl2_s8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl2_s8 | |
| // CHECK-SAME: ([2 x <16 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_INT8X16X2_T:%.*]], align 16 | |
| @@ -68,7 +68,7 @@ int8x8_t test_vqtbl2_s8(int8x16x2_t a, uint8x8_t b) { | |
| return vqtbl2_s8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbl3_s8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl3_s8 | |
| // CHECK-SAME: ([3 x <8 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_INT8X8X3_T:%.*]], align 8 | |
| @@ -92,7 +92,7 @@ int8x8_t test_vtbl3_s8(int8x8x3_t a, int8x8_t b) { | |
| return vtbl3_s8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl3_s8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl3_s8 | |
| // CHECK-SAME: ([3 x <16 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_INT8X16X3_T:%.*]], align 16 | |
| @@ -114,7 +114,7 @@ int8x8_t test_vqtbl3_s8(int8x16x3_t a, uint8x8_t b) { | |
| return vqtbl3_s8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbl4_s8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl4_s8 | |
| // CHECK-SAME: ([4 x <8 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_INT8X8X4_T:%.*]], align 8 | |
| @@ -140,7 +140,7 @@ int8x8_t test_vtbl4_s8(int8x8x4_t a, int8x8_t b) { | |
| return vtbl4_s8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl4_s8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl4_s8 | |
| // CHECK-SAME: ([4 x <16 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_INT8X16X4_T:%.*]], align 16 | |
| @@ -164,7 +164,7 @@ int8x8_t test_vqtbl4_s8(int8x16x4_t a, uint8x8_t b) { | |
| return vqtbl4_s8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl1q_s8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl1q_s8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> [[A]], <16 x i8> [[B]]) | |
| @@ -174,7 +174,7 @@ int8x16_t test_vqtbl1q_s8(int8x16_t a, int8x16_t b) { | |
| return vqtbl1q_s8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl2q_s8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl2q_s8 | |
| // CHECK-SAME: ([2 x <16 x i8>] [[A_COERCE:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_INT8X16X2_T:%.*]], align 16 | |
| @@ -194,7 +194,7 @@ int8x16_t test_vqtbl2q_s8(int8x16x2_t a, int8x16_t b) { | |
| return vqtbl2q_s8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl3q_s8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl3q_s8 | |
| // CHECK-SAME: ([3 x <16 x i8>] [[A_COERCE:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_INT8X16X3_T:%.*]], align 16 | |
| @@ -216,7 +216,7 @@ int8x16_t test_vqtbl3q_s8(int8x16x3_t a, int8x16_t b) { | |
| return vqtbl3q_s8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl4q_s8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl4q_s8 | |
| // CHECK-SAME: ([4 x <16 x i8>] [[A_COERCE:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_INT8X16X4_T:%.*]], align 16 | |
| @@ -240,7 +240,7 @@ int8x16_t test_vqtbl4q_s8(int8x16x4_t a, int8x16_t b) { | |
| return vqtbl4q_s8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbx1_s8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx1_s8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBL1_I:%.*]] = shufflevector <8 x i8> [[B]], <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> | |
| @@ -257,7 +257,7 @@ int8x8_t test_vtbx1_s8(int8x8_t a, int8x8_t b, int8x8_t c) { | |
| return vtbx1_s8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbx2_s8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx2_s8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [2 x <8 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_INT8X8X2_T:%.*]], align 8 | |
| @@ -278,7 +278,7 @@ int8x8_t test_vtbx2_s8(int8x8_t a, int8x8x2_t b, int8x8_t c) { | |
| return vtbx2_s8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbx3_s8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx3_s8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [3 x <8 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_INT8X8X3_T:%.*]], align 8 | |
| @@ -308,7 +308,7 @@ int8x8_t test_vtbx3_s8(int8x8_t a, int8x8x3_t b, int8x8_t c) { | |
| return vtbx3_s8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbx4_s8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx4_s8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [4 x <8 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_INT8X8X4_T:%.*]], align 8 | |
| @@ -334,7 +334,7 @@ int8x8_t test_vtbx4_s8(int8x8_t a, int8x8x4_t b, int8x8_t c) { | |
| return vtbx4_s8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx1_s8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx1_s8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> [[A]], <16 x i8> [[B]], <8 x i8> [[C]]) | |
| @@ -344,7 +344,7 @@ int8x8_t test_vqtbx1_s8(int8x8_t a, int8x16_t b, uint8x8_t c) { | |
| return vqtbx1_s8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx2_s8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx2_s8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [2 x <16 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_INT8X16X2_T:%.*]], align 16 | |
| @@ -364,7 +364,7 @@ int8x8_t test_vqtbx2_s8(int8x8_t a, int8x16x2_t b, uint8x8_t c) { | |
| return vqtbx2_s8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx3_s8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx3_s8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [3 x <16 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_INT8X16X3_T:%.*]], align 16 | |
| @@ -386,7 +386,7 @@ int8x8_t test_vqtbx3_s8(int8x8_t a, int8x16x3_t b, uint8x8_t c) { | |
| return vqtbx3_s8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx4_s8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx4_s8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [4 x <16 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_INT8X16X4_T:%.*]], align 16 | |
| @@ -410,7 +410,7 @@ int8x8_t test_vqtbx4_s8(int8x8_t a, int8x16x4_t b, uint8x8_t c) { | |
| return vqtbx4_s8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx1q_s8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx1q_s8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> [[A]], <16 x i8> [[B]], <16 x i8> [[C]]) | |
| @@ -420,7 +420,7 @@ int8x16_t test_vqtbx1q_s8(int8x16_t a, int8x16_t b, uint8x16_t c) { | |
| return vqtbx1q_s8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx2q_s8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx2q_s8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], [2 x <16 x i8>] [[B_COERCE:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_INT8X16X2_T:%.*]], align 16 | |
| @@ -440,7 +440,7 @@ int8x16_t test_vqtbx2q_s8(int8x16_t a, int8x16x2_t b, int8x16_t c) { | |
| return vqtbx2q_s8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx3q_s8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx3q_s8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], [3 x <16 x i8>] [[B_COERCE:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_INT8X16X3_T:%.*]], align 16 | |
| @@ -462,7 +462,7 @@ int8x16_t test_vqtbx3q_s8(int8x16_t a, int8x16x3_t b, int8x16_t c) { | |
| return vqtbx3q_s8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx4q_s8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx4q_s8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], [4 x <16 x i8>] [[B_COERCE:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_INT8X16X4_T:%.*]], align 16 | |
| @@ -486,7 +486,7 @@ int8x16_t test_vqtbx4q_s8(int8x16_t a, int8x16x4_t b, int8x16_t c) { | |
| return vqtbx4q_s8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbl1_u8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl1_u8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBL1_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> | |
| @@ -497,7 +497,7 @@ uint8x8_t test_vtbl1_u8(uint8x8_t a, uint8x8_t b) { | |
| return vtbl1_u8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl1_u8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl1_u8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[A]], <8 x i8> [[B]]) | |
| @@ -507,7 +507,7 @@ uint8x8_t test_vqtbl1_u8(uint8x16_t a, uint8x8_t b) { | |
| return vqtbl1_u8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbl2_u8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl2_u8 | |
| // CHECK-SAME: ([2 x <8 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_UINT8X8X2_T:%.*]], align 8 | |
| @@ -528,7 +528,7 @@ uint8x8_t test_vtbl2_u8(uint8x8x2_t a, uint8x8_t b) { | |
| return vtbl2_u8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl2_u8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl2_u8 | |
| // CHECK-SAME: ([2 x <16 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_UINT8X16X2_T:%.*]], align 16 | |
| @@ -548,7 +548,7 @@ uint8x8_t test_vqtbl2_u8(uint8x16x2_t a, uint8x8_t b) { | |
| return vqtbl2_u8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbl3_u8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl3_u8 | |
| // CHECK-SAME: ([3 x <8 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_UINT8X8X3_T:%.*]], align 8 | |
| @@ -572,7 +572,7 @@ uint8x8_t test_vtbl3_u8(uint8x8x3_t a, uint8x8_t b) { | |
| return vtbl3_u8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl3_u8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl3_u8 | |
| // CHECK-SAME: ([3 x <16 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_UINT8X16X3_T:%.*]], align 16 | |
| @@ -594,7 +594,7 @@ uint8x8_t test_vqtbl3_u8(uint8x16x3_t a, uint8x8_t b) { | |
| return vqtbl3_u8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbl4_u8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl4_u8 | |
| // CHECK-SAME: ([4 x <8 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_UINT8X8X4_T:%.*]], align 8 | |
| @@ -620,7 +620,7 @@ uint8x8_t test_vtbl4_u8(uint8x8x4_t a, uint8x8_t b) { | |
| return vtbl4_u8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl4_u8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl4_u8 | |
| // CHECK-SAME: ([4 x <16 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_UINT8X16X4_T:%.*]], align 16 | |
| @@ -644,7 +644,7 @@ uint8x8_t test_vqtbl4_u8(uint8x16x4_t a, uint8x8_t b) { | |
| return vqtbl4_u8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl1q_u8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl1q_u8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> [[A]], <16 x i8> [[B]]) | |
| @@ -654,7 +654,7 @@ uint8x16_t test_vqtbl1q_u8(uint8x16_t a, uint8x16_t b) { | |
| return vqtbl1q_u8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl2q_u8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl2q_u8 | |
| // CHECK-SAME: ([2 x <16 x i8>] [[A_COERCE:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_UINT8X16X2_T:%.*]], align 16 | |
| @@ -674,7 +674,7 @@ uint8x16_t test_vqtbl2q_u8(uint8x16x2_t a, uint8x16_t b) { | |
| return vqtbl2q_u8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl3q_u8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl3q_u8 | |
| // CHECK-SAME: ([3 x <16 x i8>] [[A_COERCE:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_UINT8X16X3_T:%.*]], align 16 | |
| @@ -696,7 +696,7 @@ uint8x16_t test_vqtbl3q_u8(uint8x16x3_t a, uint8x16_t b) { | |
| return vqtbl3q_u8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl4q_u8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl4q_u8 | |
| // CHECK-SAME: ([4 x <16 x i8>] [[A_COERCE:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_UINT8X16X4_T:%.*]], align 16 | |
| @@ -720,7 +720,7 @@ uint8x16_t test_vqtbl4q_u8(uint8x16x4_t a, uint8x16_t b) { | |
| return vqtbl4q_u8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbx1_u8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx1_u8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBL1_I:%.*]] = shufflevector <8 x i8> [[B]], <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> | |
| @@ -737,7 +737,7 @@ uint8x8_t test_vtbx1_u8(uint8x8_t a, uint8x8_t b, uint8x8_t c) { | |
| return vtbx1_u8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbx2_u8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx2_u8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [2 x <8 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_UINT8X8X2_T:%.*]], align 8 | |
| @@ -758,7 +758,7 @@ uint8x8_t test_vtbx2_u8(uint8x8_t a, uint8x8x2_t b, uint8x8_t c) { | |
| return vtbx2_u8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbx3_u8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx3_u8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [3 x <8 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_UINT8X8X3_T:%.*]], align 8 | |
| @@ -788,7 +788,7 @@ uint8x8_t test_vtbx3_u8(uint8x8_t a, uint8x8x3_t b, uint8x8_t c) { | |
| return vtbx3_u8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbx4_u8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx4_u8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [4 x <8 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_UINT8X8X4_T:%.*]], align 8 | |
| @@ -814,7 +814,7 @@ uint8x8_t test_vtbx4_u8(uint8x8_t a, uint8x8x4_t b, uint8x8_t c) { | |
| return vtbx4_u8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx1_u8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx1_u8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> [[A]], <16 x i8> [[B]], <8 x i8> [[C]]) | |
| @@ -824,7 +824,7 @@ uint8x8_t test_vqtbx1_u8(uint8x8_t a, uint8x16_t b, uint8x8_t c) { | |
| return vqtbx1_u8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx2_u8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx2_u8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [2 x <16 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_UINT8X16X2_T:%.*]], align 16 | |
| @@ -844,7 +844,7 @@ uint8x8_t test_vqtbx2_u8(uint8x8_t a, uint8x16x2_t b, uint8x8_t c) { | |
| return vqtbx2_u8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx3_u8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx3_u8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [3 x <16 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_UINT8X16X3_T:%.*]], align 16 | |
| @@ -866,7 +866,7 @@ uint8x8_t test_vqtbx3_u8(uint8x8_t a, uint8x16x3_t b, uint8x8_t c) { | |
| return vqtbx3_u8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx4_u8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx4_u8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [4 x <16 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_UINT8X16X4_T:%.*]], align 16 | |
| @@ -890,7 +890,7 @@ uint8x8_t test_vqtbx4_u8(uint8x8_t a, uint8x16x4_t b, uint8x8_t c) { | |
| return vqtbx4_u8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx1q_u8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx1q_u8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> [[A]], <16 x i8> [[B]], <16 x i8> [[C]]) | |
| @@ -900,7 +900,7 @@ uint8x16_t test_vqtbx1q_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c) { | |
| return vqtbx1q_u8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx2q_u8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx2q_u8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], [2 x <16 x i8>] [[B_COERCE:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_UINT8X16X2_T:%.*]], align 16 | |
| @@ -920,7 +920,7 @@ uint8x16_t test_vqtbx2q_u8(uint8x16_t a, uint8x16x2_t b, uint8x16_t c) { | |
| return vqtbx2q_u8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx3q_u8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx3q_u8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], [3 x <16 x i8>] [[B_COERCE:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_UINT8X16X3_T:%.*]], align 16 | |
| @@ -942,7 +942,7 @@ uint8x16_t test_vqtbx3q_u8(uint8x16_t a, uint8x16x3_t b, uint8x16_t c) { | |
| return vqtbx3q_u8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx4q_u8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx4q_u8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], [4 x <16 x i8>] [[B_COERCE:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_UINT8X16X4_T:%.*]], align 16 | |
| @@ -966,7 +966,7 @@ uint8x16_t test_vqtbx4q_u8(uint8x16_t a, uint8x16x4_t b, uint8x16_t c) { | |
| return vqtbx4q_u8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbl1_p8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl1_p8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBL1_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> | |
| @@ -977,7 +977,7 @@ poly8x8_t test_vtbl1_p8(poly8x8_t a, uint8x8_t b) { | |
| return vtbl1_p8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl1_p8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl1_p8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[A]], <8 x i8> [[B]]) | |
| @@ -987,7 +987,7 @@ poly8x8_t test_vqtbl1_p8(poly8x16_t a, uint8x8_t b) { | |
| return vqtbl1_p8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbl2_p8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl2_p8 | |
| // CHECK-SAME: ([2 x <8 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_POLY8X8X2_T:%.*]], align 8 | |
| @@ -1008,7 +1008,7 @@ poly8x8_t test_vtbl2_p8(poly8x8x2_t a, uint8x8_t b) { | |
| return vtbl2_p8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl2_p8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl2_p8 | |
| // CHECK-SAME: ([2 x <16 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_POLY8X16X2_T:%.*]], align 16 | |
| @@ -1028,7 +1028,7 @@ poly8x8_t test_vqtbl2_p8(poly8x16x2_t a, uint8x8_t b) { | |
| return vqtbl2_p8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbl3_p8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl3_p8 | |
| // CHECK-SAME: ([3 x <8 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_POLY8X8X3_T:%.*]], align 8 | |
| @@ -1052,7 +1052,7 @@ poly8x8_t test_vtbl3_p8(poly8x8x3_t a, uint8x8_t b) { | |
| return vtbl3_p8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl3_p8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl3_p8 | |
| // CHECK-SAME: ([3 x <16 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_POLY8X16X3_T:%.*]], align 16 | |
| @@ -1074,7 +1074,7 @@ poly8x8_t test_vqtbl3_p8(poly8x16x3_t a, uint8x8_t b) { | |
| return vqtbl3_p8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbl4_p8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl4_p8 | |
| // CHECK-SAME: ([4 x <8 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_POLY8X8X4_T:%.*]], align 8 | |
| @@ -1100,7 +1100,7 @@ poly8x8_t test_vtbl4_p8(poly8x8x4_t a, uint8x8_t b) { | |
| return vtbl4_p8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl4_p8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl4_p8 | |
| // CHECK-SAME: ([4 x <16 x i8>] [[A_COERCE:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_POLY8X16X4_T:%.*]], align 16 | |
| @@ -1124,7 +1124,7 @@ poly8x8_t test_vqtbl4_p8(poly8x16x4_t a, uint8x8_t b) { | |
| return vqtbl4_p8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl1q_p8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl1q_p8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> [[A]], <16 x i8> [[B]]) | |
| @@ -1134,7 +1134,7 @@ poly8x16_t test_vqtbl1q_p8(poly8x16_t a, uint8x16_t b) { | |
| return vqtbl1q_p8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl2q_p8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl2q_p8 | |
| // CHECK-SAME: ([2 x <16 x i8>] [[A_COERCE:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_POLY8X16X2_T:%.*]], align 16 | |
| @@ -1154,7 +1154,7 @@ poly8x16_t test_vqtbl2q_p8(poly8x16x2_t a, uint8x16_t b) { | |
| return vqtbl2q_p8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl3q_p8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl3q_p8 | |
| // CHECK-SAME: ([3 x <16 x i8>] [[A_COERCE:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_POLY8X16X3_T:%.*]], align 16 | |
| @@ -1176,7 +1176,7 @@ poly8x16_t test_vqtbl3q_p8(poly8x16x3_t a, uint8x16_t b) { | |
| return vqtbl3q_p8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbl4q_p8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl4q_p8 | |
| // CHECK-SAME: ([4 x <16 x i8>] [[A_COERCE:%.*]], <16 x i8> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P0_I:%.*]] = alloca [[STRUCT_POLY8X16X4_T:%.*]], align 16 | |
| @@ -1200,7 +1200,7 @@ poly8x16_t test_vqtbl4q_p8(poly8x16x4_t a, uint8x16_t b) { | |
| return vqtbl4q_p8(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbx1_p8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx1_p8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], <8 x i8> noundef [[B:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBL1_I:%.*]] = shufflevector <8 x i8> [[B]], <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> | |
| @@ -1217,7 +1217,7 @@ poly8x8_t test_vtbx1_p8(poly8x8_t a, poly8x8_t b, uint8x8_t c) { | |
| return vtbx1_p8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbx2_p8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx2_p8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [2 x <8 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_POLY8X8X2_T:%.*]], align 8 | |
| @@ -1238,7 +1238,7 @@ poly8x8_t test_vtbx2_p8(poly8x8_t a, poly8x8x2_t b, uint8x8_t c) { | |
| return vtbx2_p8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbx3_p8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx3_p8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [3 x <8 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_POLY8X8X3_T:%.*]], align 8 | |
| @@ -1268,7 +1268,7 @@ poly8x8_t test_vtbx3_p8(poly8x8_t a, poly8x8x3_t b, uint8x8_t c) { | |
| return vtbx3_p8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtbx4_p8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx4_p8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [4 x <8 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_POLY8X8X4_T:%.*]], align 8 | |
| @@ -1294,7 +1294,7 @@ poly8x8_t test_vtbx4_p8(poly8x8_t a, poly8x8x4_t b, uint8x8_t c) { | |
| return vtbx4_p8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx1_p8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx1_p8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> [[A]], <16 x i8> [[B]], <8 x i8> [[C]]) | |
| @@ -1304,7 +1304,7 @@ poly8x8_t test_vqtbx1_p8(poly8x8_t a, uint8x16_t b, uint8x8_t c) { | |
| return vqtbx1_p8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx2_p8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx2_p8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [2 x <16 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_POLY8X16X2_T:%.*]], align 16 | |
| @@ -1324,7 +1324,7 @@ poly8x8_t test_vqtbx2_p8(poly8x8_t a, poly8x16x2_t b, uint8x8_t c) { | |
| return vqtbx2_p8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx3_p8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx3_p8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [3 x <16 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_POLY8X16X3_T:%.*]], align 16 | |
| @@ -1346,7 +1346,7 @@ poly8x8_t test_vqtbx3_p8(poly8x8_t a, poly8x16x3_t b, uint8x8_t c) { | |
| return vqtbx3_p8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx4_p8 | |
| +// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx4_p8 | |
| // CHECK-SAME: (<8 x i8> noundef [[A:%.*]], [4 x <16 x i8>] [[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_POLY8X16X4_T:%.*]], align 16 | |
| @@ -1370,7 +1370,7 @@ poly8x8_t test_vqtbx4_p8(poly8x8_t a, poly8x16x4_t b, uint8x8_t c) { | |
| return vqtbx4_p8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx1q_p8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx1q_p8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], <16 x i8> noundef [[B:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> [[A]], <16 x i8> [[B]], <16 x i8> [[C]]) | |
| @@ -1380,7 +1380,7 @@ poly8x16_t test_vqtbx1q_p8(poly8x16_t a, uint8x16_t b, uint8x16_t c) { | |
| return vqtbx1q_p8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx2q_p8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx2q_p8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], [2 x <16 x i8>] [[B_COERCE:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_POLY8X16X2_T:%.*]], align 16 | |
| @@ -1400,7 +1400,7 @@ poly8x16_t test_vqtbx2q_p8(poly8x16_t a, poly8x16x2_t b, uint8x16_t c) { | |
| return vqtbx2q_p8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx3q_p8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx3q_p8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], [3 x <16 x i8>] [[B_COERCE:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_POLY8X16X3_T:%.*]], align 16 | |
| @@ -1422,7 +1422,7 @@ poly8x16_t test_vqtbx3q_p8(poly8x16_t a, poly8x16x3_t b, uint8x16_t c) { | |
| return vqtbx3q_p8(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vqtbx4q_p8 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx4q_p8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]], [4 x <16 x i8>] [[B_COERCE:%.*]], <16 x i8> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__P1_I:%.*]] = alloca [[STRUCT_POLY8X16X4_T:%.*]], align 16 | |
| diff --git a/clang/test/CodeGen/aarch64-poly128.c b/clang/test/CodeGen/aarch64-poly128.c | |
| index 9ad5d0150126..19302fe36cc9 100644 | |
| --- a/clang/test/CodeGen/aarch64-poly128.c | |
| +++ b/clang/test/CodeGen/aarch64-poly128.c | |
| @@ -14,7 +14,7 @@ | |
| #include <arm_neon.h> | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vstrq_p128 | |
| +// CHECK-LABEL: define dso_local void @test_vstrq_p128 | |
| // CHECK-SAME: (ptr noundef [[PTR:%.*]], i128 noundef [[VAL:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: store i128 [[VAL]], ptr [[PTR]], align 16 | |
| @@ -25,7 +25,7 @@ void test_vstrq_p128(poly128_t * ptr, poly128_t val) { | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vldrq_p128 | |
| +// CHECK-LABEL: define dso_local i128 @test_vldrq_p128 | |
| // CHECK-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = load i128, ptr [[PTR]], align 16 | |
| @@ -36,7 +36,7 @@ poly128_t test_vldrq_p128(poly128_t * ptr) { | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_ld_st_p128 | |
| +// CHECK-LABEL: define dso_local void @test_ld_st_p128 | |
| // CHECK-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = load i128, ptr [[PTR]], align 16 | |
| @@ -49,7 +49,7 @@ void test_ld_st_p128(poly128_t * ptr) { | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmull_p64 | |
| +// CHECK-LABEL: define dso_local i128 @test_vmull_p64 | |
| // CHECK-SAME: (i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VMULL_P64_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.pmull64(i64 [[A]], i64 [[B]]) | |
| @@ -60,7 +60,7 @@ poly128_t test_vmull_p64(poly64_t a, poly64_t b) { | |
| return vmull_p64(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmull_high_p64 | |
| +// CHECK-LABEL: define dso_local i128 @test_vmull_high_p64 | |
| // CHECK-SAME: (<2 x i64> noundef [[A:%.*]], <2 x i64> noundef [[B:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[SHUFFLE_I5:%.*]] = shufflevector <2 x i64> [[A]], <2 x i64> [[A]], <1 x i32> <i32 1> | |
| @@ -75,7 +75,7 @@ poly128_t test_vmull_high_p64(poly64x2_t a, poly64x2_t b) { | |
| return vmull_high_p64(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_p128_s8 | |
| +// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_s8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[A]] to i128 | |
| @@ -85,7 +85,7 @@ poly128_t test_vreinterpretq_p128_s8(int8x16_t a) { | |
| return vreinterpretq_p128_s8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_p128_s16 | |
| +// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_s16 | |
| // CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to i128 | |
| @@ -95,7 +95,7 @@ poly128_t test_vreinterpretq_p128_s16(int16x8_t a) { | |
| return vreinterpretq_p128_s16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_p128_s32 | |
| +// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_s32 | |
| // CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to i128 | |
| @@ -105,7 +105,7 @@ poly128_t test_vreinterpretq_p128_s32(int32x4_t a) { | |
| return vreinterpretq_p128_s32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_p128_s64 | |
| +// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_s64 | |
| // CHECK-SAME: (<2 x i64> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to i128 | |
| @@ -115,7 +115,7 @@ poly128_t test_vreinterpretq_p128_s64(int64x2_t a) { | |
| return vreinterpretq_p128_s64(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_p128_u8 | |
| +// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_u8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[A]] to i128 | |
| @@ -125,7 +125,7 @@ poly128_t test_vreinterpretq_p128_u8(uint8x16_t a) { | |
| return vreinterpretq_p128_u8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_p128_u16 | |
| +// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_u16 | |
| // CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to i128 | |
| @@ -135,7 +135,7 @@ poly128_t test_vreinterpretq_p128_u16(uint16x8_t a) { | |
| return vreinterpretq_p128_u16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_p128_u32 | |
| +// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_u32 | |
| // CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A]] to i128 | |
| @@ -145,7 +145,7 @@ poly128_t test_vreinterpretq_p128_u32(uint32x4_t a) { | |
| return vreinterpretq_p128_u32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_p128_u64 | |
| +// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_u64 | |
| // CHECK-SAME: (<2 x i64> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to i128 | |
| @@ -155,7 +155,7 @@ poly128_t test_vreinterpretq_p128_u64(uint64x2_t a) { | |
| return vreinterpretq_p128_u64(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_p128_f32 | |
| +// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to i128 | |
| @@ -165,7 +165,7 @@ poly128_t test_vreinterpretq_p128_f32(float32x4_t a) { | |
| return vreinterpretq_p128_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_p128_f64 | |
| +// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_f64 | |
| // CHECK-SAME: (<2 x double> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x double> [[A]] to i128 | |
| @@ -175,7 +175,7 @@ poly128_t test_vreinterpretq_p128_f64(float64x2_t a) { | |
| return vreinterpretq_p128_f64(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_p128_p8 | |
| +// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_p8 | |
| // CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[A]] to i128 | |
| @@ -185,7 +185,7 @@ poly128_t test_vreinterpretq_p128_p8(poly8x16_t a) { | |
| return vreinterpretq_p128_p8(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_p128_p16 | |
| +// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_p16 | |
| // CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to i128 | |
| @@ -195,7 +195,7 @@ poly128_t test_vreinterpretq_p128_p16(poly16x8_t a) { | |
| return vreinterpretq_p128_p16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_p128_p64 | |
| +// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_p64 | |
| // CHECK-SAME: (<2 x i64> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[A]] to i128 | |
| @@ -205,7 +205,7 @@ poly128_t test_vreinterpretq_p128_p64(poly64x2_t a) { | |
| return vreinterpretq_p128_p64(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_s8_p128 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vreinterpretq_s8_p128 | |
| // CHECK-SAME: (i128 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast i128 [[A]] to <16 x i8> | |
| @@ -215,7 +215,7 @@ int8x16_t test_vreinterpretq_s8_p128(poly128_t a) { | |
| return vreinterpretq_s8_p128(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_s16_p128 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vreinterpretq_s16_p128 | |
| // CHECK-SAME: (i128 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast i128 [[A]] to <8 x i16> | |
| @@ -225,7 +225,7 @@ int16x8_t test_vreinterpretq_s16_p128(poly128_t a) { | |
| return vreinterpretq_s16_p128(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_s32_p128 | |
| +// CHECK-LABEL: define dso_local <4 x i32> @test_vreinterpretq_s32_p128 | |
| // CHECK-SAME: (i128 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast i128 [[A]] to <4 x i32> | |
| @@ -235,7 +235,7 @@ int32x4_t test_vreinterpretq_s32_p128(poly128_t a) { | |
| return vreinterpretq_s32_p128(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_s64_p128 | |
| +// CHECK-LABEL: define dso_local <2 x i64> @test_vreinterpretq_s64_p128 | |
| // CHECK-SAME: (i128 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast i128 [[A]] to <2 x i64> | |
| @@ -245,7 +245,7 @@ int64x2_t test_vreinterpretq_s64_p128(poly128_t a) { | |
| return vreinterpretq_s64_p128(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_u8_p128 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vreinterpretq_u8_p128 | |
| // CHECK-SAME: (i128 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast i128 [[A]] to <16 x i8> | |
| @@ -255,7 +255,7 @@ uint8x16_t test_vreinterpretq_u8_p128(poly128_t a) { | |
| return vreinterpretq_u8_p128(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_u16_p128 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vreinterpretq_u16_p128 | |
| // CHECK-SAME: (i128 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast i128 [[A]] to <8 x i16> | |
| @@ -265,7 +265,7 @@ uint16x8_t test_vreinterpretq_u16_p128(poly128_t a) { | |
| return vreinterpretq_u16_p128(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_u32_p128 | |
| +// CHECK-LABEL: define dso_local <4 x i32> @test_vreinterpretq_u32_p128 | |
| // CHECK-SAME: (i128 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast i128 [[A]] to <4 x i32> | |
| @@ -275,7 +275,7 @@ uint32x4_t test_vreinterpretq_u32_p128(poly128_t a) { | |
| return vreinterpretq_u32_p128(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_u64_p128 | |
| +// CHECK-LABEL: define dso_local <2 x i64> @test_vreinterpretq_u64_p128 | |
| // CHECK-SAME: (i128 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast i128 [[A]] to <2 x i64> | |
| @@ -285,7 +285,7 @@ uint64x2_t test_vreinterpretq_u64_p128(poly128_t a) { | |
| return vreinterpretq_u64_p128(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_f32_p128 | |
| +// CHECK-LABEL: define dso_local <4 x float> @test_vreinterpretq_f32_p128 | |
| // CHECK-SAME: (i128 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast i128 [[A]] to <4 x float> | |
| @@ -295,7 +295,7 @@ float32x4_t test_vreinterpretq_f32_p128(poly128_t a) { | |
| return vreinterpretq_f32_p128(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_f64_p128 | |
| +// CHECK-LABEL: define dso_local <2 x double> @test_vreinterpretq_f64_p128 | |
| // CHECK-SAME: (i128 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast i128 [[A]] to <2 x double> | |
| @@ -305,7 +305,7 @@ float64x2_t test_vreinterpretq_f64_p128(poly128_t a) { | |
| return vreinterpretq_f64_p128(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_p8_p128 | |
| +// CHECK-LABEL: define dso_local <16 x i8> @test_vreinterpretq_p8_p128 | |
| // CHECK-SAME: (i128 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast i128 [[A]] to <16 x i8> | |
| @@ -315,7 +315,7 @@ poly8x16_t test_vreinterpretq_p8_p128(poly128_t a) { | |
| return vreinterpretq_p8_p128(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_p16_p128 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vreinterpretq_p16_p128 | |
| // CHECK-SAME: (i128 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast i128 [[A]] to <8 x i16> | |
| @@ -325,7 +325,7 @@ poly16x8_t test_vreinterpretq_p16_p128(poly128_t a) { | |
| return vreinterpretq_p16_p128(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vreinterpretq_p64_p128 | |
| +// CHECK-LABEL: define dso_local <2 x i64> @test_vreinterpretq_p64_p128 | |
| // CHECK-SAME: (i128 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast i128 [[A]] to <2 x i64> | |
| diff --git a/clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c b/clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c | |
| index 2b7f7679b5f1..97d560eca2b6 100644 | |
| --- a/clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c | |
| +++ b/clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c | |
| @@ -8,7 +8,7 @@ | |
| #include <arm_neon.h> | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vabs_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vabs_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -19,7 +19,7 @@ float16x4_t test_vabs_f16(float16x4_t a) { | |
| return vabs_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vabsq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vabsq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -30,7 +30,7 @@ float16x8_t test_vabsq_f16(float16x8_t a) { | |
| return vabsq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vceqz_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vceqz_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -42,7 +42,7 @@ uint16x4_t test_vceqz_f16(float16x4_t a) { | |
| return vceqz_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vceqzq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vceqzq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -54,7 +54,7 @@ uint16x8_t test_vceqzq_f16(float16x8_t a) { | |
| return vceqzq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcgez_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcgez_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -66,7 +66,7 @@ uint16x4_t test_vcgez_f16(float16x4_t a) { | |
| return vcgez_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcgezq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcgezq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -78,7 +78,7 @@ uint16x8_t test_vcgezq_f16(float16x8_t a) { | |
| return vcgezq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcgtz_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcgtz_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -90,7 +90,7 @@ uint16x4_t test_vcgtz_f16(float16x4_t a) { | |
| return vcgtz_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcgtzq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcgtzq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -102,7 +102,7 @@ uint16x8_t test_vcgtzq_f16(float16x8_t a) { | |
| return vcgtzq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vclez_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vclez_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -114,7 +114,7 @@ uint16x4_t test_vclez_f16(float16x4_t a) { | |
| return vclez_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vclezq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vclezq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -126,7 +126,7 @@ uint16x8_t test_vclezq_f16(float16x8_t a) { | |
| return vclezq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcltz_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcltz_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -138,7 +138,7 @@ uint16x4_t test_vcltz_f16(float16x4_t a) { | |
| return vcltz_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcltzq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcltzq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -150,7 +150,7 @@ uint16x8_t test_vcltzq_f16(float16x8_t a) { | |
| return vcltzq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvt_f16_s16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vcvt_f16_s16 | |
| // CHECK-SAME: (<4 x i16> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8> | |
| @@ -161,7 +161,7 @@ float16x4_t test_vcvt_f16_s16 (int16x4_t a) { | |
| return vcvt_f16_s16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtq_f16_s16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vcvtq_f16_s16 | |
| // CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8> | |
| @@ -172,7 +172,7 @@ float16x8_t test_vcvtq_f16_s16 (int16x8_t a) { | |
| return vcvtq_f16_s16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvt_f16_u16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vcvt_f16_u16 | |
| // CHECK-SAME: (<4 x i16> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8> | |
| @@ -183,7 +183,7 @@ float16x4_t test_vcvt_f16_u16 (uint16x4_t a) { | |
| return vcvt_f16_u16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtq_f16_u16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vcvtq_f16_u16 | |
| // CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8> | |
| @@ -194,7 +194,7 @@ float16x8_t test_vcvtq_f16_u16 (uint16x8_t a) { | |
| return vcvtq_f16_u16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvt_s16_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcvt_s16_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -205,7 +205,7 @@ int16x4_t test_vcvt_s16_f16 (float16x4_t a) { | |
| return vcvt_s16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtq_s16_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcvtq_s16_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -216,7 +216,7 @@ int16x8_t test_vcvtq_s16_f16 (float16x8_t a) { | |
| return vcvtq_s16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvt_u16_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcvt_u16_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -227,7 +227,7 @@ uint16x4_t test_vcvt_u16_f16 (float16x4_t a) { | |
| return vcvt_u16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtq_u16_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcvtq_u16_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -238,7 +238,7 @@ uint16x8_t test_vcvtq_u16_f16 (float16x8_t a) { | |
| return vcvtq_u16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvta_s16_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcvta_s16_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -249,7 +249,7 @@ int16x4_t test_vcvta_s16_f16 (float16x4_t a) { | |
| return vcvta_s16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvta_u16_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcvta_u16_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -260,7 +260,7 @@ uint16x4_t test_vcvta_u16_f16 (float16x4_t a) { | |
| return vcvta_u16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtaq_s16_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcvtaq_s16_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -271,7 +271,7 @@ int16x8_t test_vcvtaq_s16_f16 (float16x8_t a) { | |
| return vcvtaq_s16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtm_s16_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcvtm_s16_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -282,7 +282,7 @@ int16x4_t test_vcvtm_s16_f16 (float16x4_t a) { | |
| return vcvtm_s16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtmq_s16_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcvtmq_s16_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -293,7 +293,7 @@ int16x8_t test_vcvtmq_s16_f16 (float16x8_t a) { | |
| return vcvtmq_s16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtm_u16_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcvtm_u16_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -304,7 +304,7 @@ uint16x4_t test_vcvtm_u16_f16 (float16x4_t a) { | |
| return vcvtm_u16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtmq_u16_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcvtmq_u16_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -315,7 +315,7 @@ uint16x8_t test_vcvtmq_u16_f16 (float16x8_t a) { | |
| return vcvtmq_u16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtn_s16_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcvtn_s16_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -326,7 +326,7 @@ int16x4_t test_vcvtn_s16_f16 (float16x4_t a) { | |
| return vcvtn_s16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtnq_s16_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcvtnq_s16_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -337,7 +337,7 @@ int16x8_t test_vcvtnq_s16_f16 (float16x8_t a) { | |
| return vcvtnq_s16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtn_u16_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcvtn_u16_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -348,7 +348,7 @@ uint16x4_t test_vcvtn_u16_f16 (float16x4_t a) { | |
| return vcvtn_u16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtnq_u16_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcvtnq_u16_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -359,7 +359,7 @@ uint16x8_t test_vcvtnq_u16_f16 (float16x8_t a) { | |
| return vcvtnq_u16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtp_s16_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcvtp_s16_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -370,7 +370,7 @@ int16x4_t test_vcvtp_s16_f16 (float16x4_t a) { | |
| return vcvtp_s16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtpq_s16_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcvtpq_s16_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -381,7 +381,7 @@ int16x8_t test_vcvtpq_s16_f16 (float16x8_t a) { | |
| return vcvtpq_s16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtp_u16_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcvtp_u16_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -392,7 +392,7 @@ uint16x4_t test_vcvtp_u16_f16 (float16x4_t a) { | |
| return vcvtp_u16_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtpq_u16_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcvtpq_u16_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -404,7 +404,7 @@ uint16x8_t test_vcvtpq_u16_f16 (float16x8_t a) { | |
| } | |
| // FIXME: Fix the zero constant when fp16 non-storage-only type becomes available. | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vneg_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vneg_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[FNEG_I:%.*]] = fneg <4 x half> [[A]] | |
| @@ -414,7 +414,7 @@ float16x4_t test_vneg_f16(float16x4_t a) { | |
| return vneg_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vnegq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vnegq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[FNEG_I:%.*]] = fneg <8 x half> [[A]] | |
| @@ -424,7 +424,7 @@ float16x8_t test_vnegq_f16(float16x8_t a) { | |
| return vnegq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrecpe_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vrecpe_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -435,7 +435,7 @@ float16x4_t test_vrecpe_f16(float16x4_t a) { | |
| return vrecpe_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrecpeq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vrecpeq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -446,7 +446,7 @@ float16x8_t test_vrecpeq_f16(float16x8_t a) { | |
| return vrecpeq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrnd_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vrnd_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -457,7 +457,7 @@ float16x4_t test_vrnd_f16(float16x4_t a) { | |
| return vrnd_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrndq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vrndq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -468,7 +468,7 @@ float16x8_t test_vrndq_f16(float16x8_t a) { | |
| return vrndq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrnda_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vrnda_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -479,7 +479,7 @@ float16x4_t test_vrnda_f16(float16x4_t a) { | |
| return vrnda_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrndaq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vrndaq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -490,7 +490,7 @@ float16x8_t test_vrndaq_f16(float16x8_t a) { | |
| return vrndaq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrndi_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vrndi_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -501,7 +501,7 @@ float16x4_t test_vrndi_f16(float16x4_t a) { | |
| return vrndi_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrndiq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vrndiq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -512,7 +512,7 @@ float16x8_t test_vrndiq_f16(float16x8_t a) { | |
| return vrndiq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrndm_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vrndm_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -523,7 +523,7 @@ float16x4_t test_vrndm_f16(float16x4_t a) { | |
| return vrndm_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrndmq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vrndmq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -534,7 +534,7 @@ float16x8_t test_vrndmq_f16(float16x8_t a) { | |
| return vrndmq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrndn_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vrndn_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -545,7 +545,7 @@ float16x4_t test_vrndn_f16(float16x4_t a) { | |
| return vrndn_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrndnq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vrndnq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -556,7 +556,7 @@ float16x8_t test_vrndnq_f16(float16x8_t a) { | |
| return vrndnq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrndp_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vrndp_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -567,7 +567,7 @@ float16x4_t test_vrndp_f16(float16x4_t a) { | |
| return vrndp_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrndpq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vrndpq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -578,7 +578,7 @@ float16x8_t test_vrndpq_f16(float16x8_t a) { | |
| return vrndpq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrndx_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vrndx_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -589,7 +589,7 @@ float16x4_t test_vrndx_f16(float16x4_t a) { | |
| return vrndx_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrndxq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vrndxq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -600,7 +600,7 @@ float16x8_t test_vrndxq_f16(float16x8_t a) { | |
| return vrndxq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrsqrte_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vrsqrte_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -611,7 +611,7 @@ float16x4_t test_vrsqrte_f16(float16x4_t a) { | |
| return vrsqrte_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrsqrteq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vrsqrteq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -622,7 +622,7 @@ float16x8_t test_vrsqrteq_f16(float16x8_t a) { | |
| return vrsqrteq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vsqrt_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vsqrt_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -633,7 +633,7 @@ float16x4_t test_vsqrt_f16(float16x4_t a) { | |
| return vsqrt_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vsqrtq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vsqrtq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -644,7 +644,7 @@ float16x8_t test_vsqrtq_f16(float16x8_t a) { | |
| return vsqrtq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vadd_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vadd_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[ADD_I:%.*]] = fadd <4 x half> [[A]], [[B]] | |
| @@ -654,7 +654,7 @@ float16x4_t test_vadd_f16(float16x4_t a, float16x4_t b) { | |
| return vadd_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vaddq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vaddq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[ADD_I:%.*]] = fadd <8 x half> [[A]], [[B]] | |
| @@ -664,7 +664,7 @@ float16x8_t test_vaddq_f16(float16x8_t a, float16x8_t b) { | |
| return vaddq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vabd_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vabd_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -676,7 +676,7 @@ float16x4_t test_vabd_f16(float16x4_t a, float16x4_t b) { | |
| return vabd_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vabdq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vabdq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -688,7 +688,7 @@ float16x8_t test_vabdq_f16(float16x8_t a, float16x8_t b) { | |
| return vabdq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcage_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcage_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -700,7 +700,7 @@ uint16x4_t test_vcage_f16(float16x4_t a, float16x4_t b) { | |
| return vcage_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcageq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcageq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -712,7 +712,7 @@ uint16x8_t test_vcageq_f16(float16x8_t a, float16x8_t b) { | |
| return vcageq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcagt_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcagt_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -724,7 +724,7 @@ uint16x4_t test_vcagt_f16(float16x4_t a, float16x4_t b) { | |
| return vcagt_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcagtq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcagtq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -736,7 +736,7 @@ uint16x8_t test_vcagtq_f16(float16x8_t a, float16x8_t b) { | |
| return vcagtq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcale_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcale_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -748,7 +748,7 @@ uint16x4_t test_vcale_f16(float16x4_t a, float16x4_t b) { | |
| return vcale_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcaleq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcaleq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -760,7 +760,7 @@ uint16x8_t test_vcaleq_f16(float16x8_t a, float16x8_t b) { | |
| return vcaleq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcalt_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcalt_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -772,7 +772,7 @@ uint16x4_t test_vcalt_f16(float16x4_t a, float16x4_t b) { | |
| return vcalt_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcaltq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcaltq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -784,7 +784,7 @@ uint16x8_t test_vcaltq_f16(float16x8_t a, float16x8_t b) { | |
| return vcaltq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vceq_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vceq_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[CMP_I:%.*]] = fcmp oeq <4 x half> [[A]], [[B]] | |
| @@ -795,7 +795,7 @@ uint16x4_t test_vceq_f16(float16x4_t a, float16x4_t b) { | |
| return vceq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vceqq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vceqq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[CMP_I:%.*]] = fcmp oeq <8 x half> [[A]], [[B]] | |
| @@ -806,7 +806,7 @@ uint16x8_t test_vceqq_f16(float16x8_t a, float16x8_t b) { | |
| return vceqq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcge_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcge_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[CMP_I:%.*]] = fcmp oge <4 x half> [[A]], [[B]] | |
| @@ -817,7 +817,7 @@ uint16x4_t test_vcge_f16(float16x4_t a, float16x4_t b) { | |
| return vcge_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcgeq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcgeq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[CMP_I:%.*]] = fcmp oge <8 x half> [[A]], [[B]] | |
| @@ -828,7 +828,7 @@ uint16x8_t test_vcgeq_f16(float16x8_t a, float16x8_t b) { | |
| return vcgeq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcgt_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcgt_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[CMP_I:%.*]] = fcmp ogt <4 x half> [[A]], [[B]] | |
| @@ -839,7 +839,7 @@ uint16x4_t test_vcgt_f16(float16x4_t a, float16x4_t b) { | |
| return vcgt_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcgtq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcgtq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[CMP_I:%.*]] = fcmp ogt <8 x half> [[A]], [[B]] | |
| @@ -850,7 +850,7 @@ uint16x8_t test_vcgtq_f16(float16x8_t a, float16x8_t b) { | |
| return vcgtq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcle_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcle_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[CMP_I:%.*]] = fcmp ole <4 x half> [[A]], [[B]] | |
| @@ -861,7 +861,7 @@ uint16x4_t test_vcle_f16(float16x4_t a, float16x4_t b) { | |
| return vcle_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcleq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcleq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[CMP_I:%.*]] = fcmp ole <8 x half> [[A]], [[B]] | |
| @@ -872,7 +872,7 @@ uint16x8_t test_vcleq_f16(float16x8_t a, float16x8_t b) { | |
| return vcleq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vclt_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vclt_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt <4 x half> [[A]], [[B]] | |
| @@ -883,7 +883,7 @@ uint16x4_t test_vclt_f16(float16x4_t a, float16x4_t b) { | |
| return vclt_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcltq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcltq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt <8 x half> [[A]], [[B]] | |
| @@ -894,7 +894,7 @@ uint16x8_t test_vcltq_f16(float16x8_t a, float16x8_t b) { | |
| return vcltq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvt_n_f16_s16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vcvt_n_f16_s16 | |
| // CHECK-SAME: (<4 x i16> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8> | |
| @@ -906,7 +906,7 @@ float16x4_t test_vcvt_n_f16_s16(int16x4_t a) { | |
| return vcvt_n_f16_s16(a, 2); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtq_n_f16_s16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vcvtq_n_f16_s16 | |
| // CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8> | |
| @@ -918,7 +918,7 @@ float16x8_t test_vcvtq_n_f16_s16(int16x8_t a) { | |
| return vcvtq_n_f16_s16(a, 2); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvt_n_f16_u16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vcvt_n_f16_u16 | |
| // CHECK-SAME: (<4 x i16> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8> | |
| @@ -930,7 +930,7 @@ float16x4_t test_vcvt_n_f16_u16(uint16x4_t a) { | |
| return vcvt_n_f16_u16(a, 2); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtq_n_f16_u16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vcvtq_n_f16_u16 | |
| // CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8> | |
| @@ -942,7 +942,7 @@ float16x8_t test_vcvtq_n_f16_u16(uint16x8_t a) { | |
| return vcvtq_n_f16_u16(a, 2); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvt_n_s16_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcvt_n_s16_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -954,7 +954,7 @@ int16x4_t test_vcvt_n_s16_f16(float16x4_t a) { | |
| return vcvt_n_s16_f16(a, 2); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtq_n_s16_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcvtq_n_s16_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -966,7 +966,7 @@ int16x8_t test_vcvtq_n_s16_f16(float16x8_t a) { | |
| return vcvtq_n_s16_f16(a, 2); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvt_n_u16_f16 | |
| +// CHECK-LABEL: define dso_local <4 x i16> @test_vcvt_n_u16_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -978,7 +978,7 @@ uint16x4_t test_vcvt_n_u16_f16(float16x4_t a) { | |
| return vcvt_n_u16_f16(a, 2); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtq_n_u16_f16 | |
| +// CHECK-LABEL: define dso_local <8 x i16> @test_vcvtq_n_u16_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -990,7 +990,7 @@ uint16x8_t test_vcvtq_n_u16_f16(float16x8_t a) { | |
| return vcvtq_n_u16_f16(a, 2); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vdiv_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vdiv_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[DIV_I:%.*]] = fdiv <4 x half> [[A]], [[B]] | |
| @@ -1000,7 +1000,7 @@ float16x4_t test_vdiv_f16(float16x4_t a, float16x4_t b) { | |
| return vdiv_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vdivq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vdivq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[DIV_I:%.*]] = fdiv <8 x half> [[A]], [[B]] | |
| @@ -1010,7 +1010,7 @@ float16x8_t test_vdivq_f16(float16x8_t a, float16x8_t b) { | |
| return vdivq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmax_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vmax_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1022,7 +1022,7 @@ float16x4_t test_vmax_f16(float16x4_t a, float16x4_t b) { | |
| return vmax_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vmaxq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1034,7 +1034,7 @@ float16x8_t test_vmaxq_f16(float16x8_t a, float16x8_t b) { | |
| return vmaxq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxnm_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vmaxnm_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1046,7 +1046,7 @@ float16x4_t test_vmaxnm_f16(float16x4_t a, float16x4_t b) { | |
| return vmaxnm_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxnmq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vmaxnmq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1058,7 +1058,7 @@ float16x8_t test_vmaxnmq_f16(float16x8_t a, float16x8_t b) { | |
| return vmaxnmq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmin_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vmin_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1070,7 +1070,7 @@ float16x4_t test_vmin_f16(float16x4_t a, float16x4_t b) { | |
| return vmin_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vminq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1082,7 +1082,7 @@ float16x8_t test_vminq_f16(float16x8_t a, float16x8_t b) { | |
| return vminq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminnm_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vminnm_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1094,7 +1094,7 @@ float16x4_t test_vminnm_f16(float16x4_t a, float16x4_t b) { | |
| return vminnm_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminnmq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vminnmq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1106,7 +1106,7 @@ float16x8_t test_vminnmq_f16(float16x8_t a, float16x8_t b) { | |
| return vminnmq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmul_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vmul_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[MUL_I:%.*]] = fmul <4 x half> [[A]], [[B]] | |
| @@ -1116,7 +1116,7 @@ float16x4_t test_vmul_f16(float16x4_t a, float16x4_t b) { | |
| return vmul_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmulq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vmulq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[MUL_I:%.*]] = fmul <8 x half> [[A]], [[B]] | |
| @@ -1126,7 +1126,7 @@ float16x8_t test_vmulq_f16(float16x8_t a, float16x8_t b) { | |
| return vmulq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmulx_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vmulx_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1138,7 +1138,7 @@ float16x4_t test_vmulx_f16(float16x4_t a, float16x4_t b) { | |
| return vmulx_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmulxq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vmulxq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1150,7 +1150,7 @@ float16x8_t test_vmulxq_f16(float16x8_t a, float16x8_t b) { | |
| return vmulxq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vpadd_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vpadd_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1163,7 +1163,7 @@ float16x4_t test_vpadd_f16(float16x4_t a, float16x4_t b) { | |
| return vpadd_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vpaddq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vpaddq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1176,7 +1176,7 @@ float16x8_t test_vpaddq_f16(float16x8_t a, float16x8_t b) { | |
| return vpaddq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vpmax_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vpmax_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1188,7 +1188,7 @@ float16x4_t test_vpmax_f16(float16x4_t a, float16x4_t b) { | |
| return vpmax_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vpmaxq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vpmaxq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1200,7 +1200,7 @@ float16x8_t test_vpmaxq_f16(float16x8_t a, float16x8_t b) { | |
| return vpmaxq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vpmaxnm_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vpmaxnm_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1212,7 +1212,7 @@ float16x4_t test_vpmaxnm_f16(float16x4_t a, float16x4_t b) { | |
| return vpmaxnm_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vpmaxnmq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vpmaxnmq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1224,7 +1224,7 @@ float16x8_t test_vpmaxnmq_f16(float16x8_t a, float16x8_t b) { | |
| return vpmaxnmq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vpmin_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vpmin_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1236,7 +1236,7 @@ float16x4_t test_vpmin_f16(float16x4_t a, float16x4_t b) { | |
| return vpmin_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vpminq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vpminq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1248,7 +1248,7 @@ float16x8_t test_vpminq_f16(float16x8_t a, float16x8_t b) { | |
| return vpminq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vpminnm_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vpminnm_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1260,7 +1260,7 @@ float16x4_t test_vpminnm_f16(float16x4_t a, float16x4_t b) { | |
| return vpminnm_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vpminnmq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vpminnmq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1272,7 +1272,7 @@ float16x8_t test_vpminnmq_f16(float16x8_t a, float16x8_t b) { | |
| return vpminnmq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrecps_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vrecps_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1285,7 +1285,7 @@ float16x4_t test_vrecps_f16(float16x4_t a, float16x4_t b) { | |
| return vrecps_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrecpsq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vrecpsq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1298,7 +1298,7 @@ float16x8_t test_vrecpsq_f16(float16x8_t a, float16x8_t b) { | |
| return vrecpsq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrsqrts_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vrsqrts_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1311,7 +1311,7 @@ float16x4_t test_vrsqrts_f16(float16x4_t a, float16x4_t b) { | |
| return vrsqrts_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrsqrtsq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vrsqrtsq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1324,7 +1324,7 @@ float16x8_t test_vrsqrtsq_f16(float16x8_t a, float16x8_t b) { | |
| return vrsqrtsq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vsub_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vsub_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[SUB_I:%.*]] = fsub <4 x half> [[A]], [[B]] | |
| @@ -1334,7 +1334,7 @@ float16x4_t test_vsub_f16(float16x4_t a, float16x4_t b) { | |
| return vsub_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vsubq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vsubq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[SUB_I:%.*]] = fsub <8 x half> [[A]], [[B]] | |
| @@ -1344,7 +1344,7 @@ float16x8_t test_vsubq_f16(float16x8_t a, float16x8_t b) { | |
| return vsubq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfma_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vfma_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]], <4 x half> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1357,7 +1357,7 @@ float16x4_t test_vfma_f16(float16x4_t a, float16x4_t b, float16x4_t c) { | |
| return vfma_f16(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfmaq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vfmaq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]], <8 x half> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1370,7 +1370,7 @@ float16x8_t test_vfmaq_f16(float16x8_t a, float16x8_t b, float16x8_t c) { | |
| return vfmaq_f16(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfms_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vfms_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]], <4 x half> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[FNEG_I:%.*]] = fneg <4 x half> [[B]] | |
| @@ -1384,7 +1384,7 @@ float16x4_t test_vfms_f16(float16x4_t a, float16x4_t b, float16x4_t c) { | |
| return vfms_f16(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfmsq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vfmsq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]], <8 x half> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[FNEG_I:%.*]] = fneg <8 x half> [[B]] | |
| @@ -1398,7 +1398,7 @@ float16x8_t test_vfmsq_f16(float16x8_t a, float16x8_t b, float16x8_t c) { | |
| return vfmsq_f16(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfma_lane_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vfma_lane_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]], <4 x half> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1415,7 +1415,7 @@ float16x4_t test_vfma_lane_f16(float16x4_t a, float16x4_t b, float16x4_t c) { | |
| return vfma_lane_f16(a, b, c, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfmaq_lane_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vfmaq_lane_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]], <4 x half> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1432,7 +1432,7 @@ float16x8_t test_vfmaq_lane_f16(float16x8_t a, float16x8_t b, float16x4_t c) { | |
| return vfmaq_lane_f16(a, b, c, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfma_laneq_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vfma_laneq_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]], <8 x half> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1449,7 +1449,7 @@ float16x4_t test_vfma_laneq_f16(float16x4_t a, float16x4_t b, float16x8_t c) { | |
| return vfma_laneq_f16(a, b, c, 7); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfmaq_laneq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vfmaq_laneq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]], <8 x half> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1466,7 +1466,7 @@ float16x8_t test_vfmaq_laneq_f16(float16x8_t a, float16x8_t b, float16x8_t c) { | |
| return vfmaq_laneq_f16(a, b, c, 7); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfma_n_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vfma_n_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]], half noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VECINIT:%.*]] = insertelement <4 x half> undef, half [[C]], i32 0 | |
| @@ -1483,7 +1483,7 @@ float16x4_t test_vfma_n_f16(float16x4_t a, float16x4_t b, float16_t c) { | |
| return vfma_n_f16(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfmaq_n_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vfmaq_n_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]], half noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VECINIT:%.*]] = insertelement <8 x half> undef, half [[C]], i32 0 | |
| @@ -1504,7 +1504,7 @@ float16x8_t test_vfmaq_n_f16(float16x8_t a, float16x8_t b, float16_t c) { | |
| return vfmaq_n_f16(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfmah_lane_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vfmah_lane_f16 | |
| // CHECK-SAME: (half noundef [[A:%.*]], half noundef [[B:%.*]], <4 x half> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x half> [[C]], i32 3 | |
| @@ -1515,7 +1515,7 @@ float16_t test_vfmah_lane_f16(float16_t a, float16_t b, float16x4_t c) { | |
| return vfmah_lane_f16(a, b, c, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfmah_laneq_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vfmah_laneq_f16 | |
| // CHECK-SAME: (half noundef [[A:%.*]], half noundef [[B:%.*]], <8 x half> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <8 x half> [[C]], i32 7 | |
| @@ -1526,7 +1526,7 @@ float16_t test_vfmah_laneq_f16(float16_t a, float16_t b, float16x8_t c) { | |
| return vfmah_laneq_f16(a, b, c, 7); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfms_lane_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vfms_lane_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]], <4 x half> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[FNEG:%.*]] = fneg <4 x half> [[B]] | |
| @@ -1544,7 +1544,7 @@ float16x4_t test_vfms_lane_f16(float16x4_t a, float16x4_t b, float16x4_t c) { | |
| return vfms_lane_f16(a, b, c, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfmsq_lane_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vfmsq_lane_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]], <4 x half> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[FNEG:%.*]] = fneg <8 x half> [[B]] | |
| @@ -1562,7 +1562,7 @@ float16x8_t test_vfmsq_lane_f16(float16x8_t a, float16x8_t b, float16x4_t c) { | |
| return vfmsq_lane_f16(a, b, c, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfms_laneq_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vfms_laneq_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]], <8 x half> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[FNEG:%.*]] = fneg <4 x half> [[B]] | |
| @@ -1580,7 +1580,7 @@ float16x4_t test_vfms_laneq_f16(float16x4_t a, float16x4_t b, float16x8_t c) { | |
| return vfms_laneq_f16(a, b, c, 7); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfmsq_laneq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vfmsq_laneq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]], <8 x half> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[FNEG:%.*]] = fneg <8 x half> [[B]] | |
| @@ -1598,7 +1598,7 @@ float16x8_t test_vfmsq_laneq_f16(float16x8_t a, float16x8_t b, float16x8_t c) { | |
| return vfmsq_laneq_f16(a, b, c, 7); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfms_n_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vfms_n_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]], half noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[FNEG:%.*]] = fneg <4 x half> [[B]] | |
| @@ -1616,7 +1616,7 @@ float16x4_t test_vfms_n_f16(float16x4_t a, float16x4_t b, float16_t c) { | |
| return vfms_n_f16(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfmsq_n_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vfmsq_n_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]], half noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[FNEG:%.*]] = fneg <8 x half> [[B]] | |
| @@ -1638,7 +1638,7 @@ float16x8_t test_vfmsq_n_f16(float16x8_t a, float16x8_t b, float16_t c) { | |
| return vfmsq_n_f16(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfmsh_lane_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vfmsh_lane_f16 | |
| // CHECK-SAME: (half noundef [[A:%.*]], half noundef [[B:%.*]], <4 x half> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[CONV:%.*]] = fpext half [[B]] to float | |
| @@ -1652,7 +1652,7 @@ float16_t test_vfmsh_lane_f16(float16_t a, float16_t b, float16x4_t c) { | |
| return vfmsh_lane_f16(a, b, c, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfmsh_laneq_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vfmsh_laneq_f16 | |
| // CHECK-SAME: (half noundef [[A:%.*]], half noundef [[B:%.*]], <8 x half> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[CONV:%.*]] = fpext half [[B]] to float | |
| @@ -1666,7 +1666,7 @@ float16_t test_vfmsh_laneq_f16(float16_t a, float16_t b, float16x8_t c) { | |
| return vfmsh_laneq_f16(a, b, c, 7); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmul_lane_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vmul_lane_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[B]] to <8 x i8> | |
| @@ -1679,7 +1679,7 @@ float16x4_t test_vmul_lane_f16(float16x4_t a, float16x4_t b) { | |
| return vmul_lane_f16(a, b, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmulq_lane_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vmulq_lane_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[B]] to <8 x i8> | |
| @@ -1692,7 +1692,7 @@ float16x8_t test_vmulq_lane_f16(float16x8_t a, float16x4_t b) { | |
| return vmulq_lane_f16(a, b, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmul_laneq_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vmul_laneq_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[B]] to <16 x i8> | |
| @@ -1705,7 +1705,7 @@ float16x4_t test_vmul_laneq_f16(float16x4_t a, float16x8_t b) { | |
| return vmul_laneq_f16(a, b, 7); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmulq_laneq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vmulq_laneq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[B]] to <16 x i8> | |
| @@ -1718,7 +1718,7 @@ float16x8_t test_vmulq_laneq_f16(float16x8_t a, float16x8_t b) { | |
| return vmulq_laneq_f16(a, b, 7); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmul_n_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vmul_n_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], half noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VECINIT:%.*]] = insertelement <4 x half> undef, half [[B]], i32 0 | |
| @@ -1732,7 +1732,7 @@ float16x4_t test_vmul_n_f16(float16x4_t a, float16_t b) { | |
| return vmul_n_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmulq_n_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vmulq_n_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], half noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VECINIT:%.*]] = insertelement <8 x half> undef, half [[B]], i32 0 | |
| @@ -1751,7 +1751,7 @@ float16x8_t test_vmulq_n_f16(float16x8_t a, float16_t b) { | |
| } | |
| // FIXME: Fix it when fp16 non-storage-only type becomes available. | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmulh_lane_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vmulh_lane_f16 | |
| // CHECK-SAME: (half noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__REINT_847:%.*]] = alloca <4 x half>, align 8 | |
| @@ -1771,7 +1771,7 @@ float16_t test_vmulh_lane_f16(float16_t a, float16x4_t b) { | |
| return vmulh_lane_f16(a, b, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmulh_laneq_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vmulh_laneq_f16 | |
| // CHECK-SAME: (half noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[__REINT_850:%.*]] = alloca <8 x half>, align 16 | |
| @@ -1791,7 +1791,7 @@ float16_t test_vmulh_laneq_f16(float16_t a, float16x8_t b) { | |
| return vmulh_laneq_f16(a, b, 7); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmulx_lane_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vmulx_lane_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[B]] to <8 x i8> | |
| @@ -1806,7 +1806,7 @@ float16x4_t test_vmulx_lane_f16(float16x4_t a, float16x4_t b) { | |
| return vmulx_lane_f16(a, b, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmulxq_lane_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vmulxq_lane_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[B]] to <8 x i8> | |
| @@ -1821,7 +1821,7 @@ float16x8_t test_vmulxq_lane_f16(float16x8_t a, float16x4_t b) { | |
| return vmulxq_lane_f16(a, b, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmulx_laneq_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vmulx_laneq_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[B]] to <16 x i8> | |
| @@ -1836,7 +1836,7 @@ float16x4_t test_vmulx_laneq_f16(float16x4_t a, float16x8_t b) { | |
| return vmulx_laneq_f16(a, b, 7); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmulxq_laneq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vmulxq_laneq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[B]] to <16 x i8> | |
| @@ -1851,7 +1851,7 @@ float16x8_t test_vmulxq_laneq_f16(float16x8_t a, float16x8_t b) { | |
| return vmulxq_laneq_f16(a, b, 7); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmulx_n_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vmulx_n_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], half noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VECINIT:%.*]] = insertelement <4 x half> undef, half [[B]], i32 0 | |
| @@ -1867,7 +1867,7 @@ float16x4_t test_vmulx_n_f16(float16x4_t a, float16_t b) { | |
| return vmulx_n_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmulxq_n_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vmulxq_n_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], half noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VECINIT:%.*]] = insertelement <8 x half> undef, half [[B]], i32 0 | |
| @@ -1887,7 +1887,7 @@ float16x8_t test_vmulxq_n_f16(float16x8_t a, float16_t b) { | |
| return vmulxq_n_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmulxh_lane_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vmulxh_lane_f16 | |
| // CHECK-SAME: (half noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x half> [[B]], i32 3 | |
| @@ -1898,7 +1898,7 @@ float16_t test_vmulxh_lane_f16(float16_t a, float16x4_t b) { | |
| return vmulxh_lane_f16(a, b, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmulxh_laneq_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vmulxh_laneq_f16 | |
| // CHECK-SAME: (half noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <8 x half> [[B]], i32 7 | |
| @@ -1909,7 +1909,7 @@ float16_t test_vmulxh_laneq_f16(float16_t a, float16x8_t b) { | |
| return vmulxh_laneq_f16(a, b, 7); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxv_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vmaxv_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1921,7 +1921,7 @@ float16_t test_vmaxv_f16(float16x4_t a) { | |
| return vmaxv_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxvq_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vmaxvq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1933,7 +1933,7 @@ float16_t test_vmaxvq_f16(float16x8_t a) { | |
| return vmaxvq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminv_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vminv_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1945,7 +1945,7 @@ float16_t test_vminv_f16(float16x4_t a) { | |
| return vminv_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminvq_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vminvq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1957,7 +1957,7 @@ float16_t test_vminvq_f16(float16x8_t a) { | |
| return vminvq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxnmv_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vmaxnmv_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1969,7 +1969,7 @@ float16_t test_vmaxnmv_f16(float16x4_t a) { | |
| return vmaxnmv_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxnmvq_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vmaxnmvq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -1981,7 +1981,7 @@ float16_t test_vmaxnmvq_f16(float16x8_t a) { | |
| return vmaxnmvq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminnmv_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vminnmv_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -1993,7 +1993,7 @@ float16_t test_vminnmv_f16(float16x4_t a) { | |
| return vminnmv_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminnmvq_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vminnmvq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -2005,7 +2005,7 @@ float16_t test_vminnmvq_f16(float16x8_t a) { | |
| return vminnmvq_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vbsl_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vbsl_f16 | |
| // CHECK-SAME: (<4 x i16> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]], <4 x half> noundef [[C:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8> | |
| @@ -2024,7 +2024,7 @@ float16x4_t test_vbsl_f16(uint16x4_t a, float16x4_t b, float16x4_t c) { | |
| return vbsl_f16(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vbslq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vbslq_f16 | |
| // CHECK-SAME: (<8 x i16> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]], <8 x half> noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8> | |
| @@ -2043,7 +2043,7 @@ float16x8_t test_vbslq_f16(uint16x8_t a, float16x8_t b, float16x8_t c) { | |
| return vbslq_f16(a, b, c); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vzip_f16 | |
| +// CHECK-LABEL: define dso_local %struct.float16x4x2_t @test_vzip_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[RETVAL_I:%.*]] = alloca [[STRUCT_FLOAT16X4X2_T:%.*]], align 8 | |
| @@ -2066,7 +2066,7 @@ float16x4x2_t test_vzip_f16(float16x4_t a, float16x4_t b) { | |
| return vzip_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vzipq_f16 | |
| +// CHECK-LABEL: define dso_local %struct.float16x8x2_t @test_vzipq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[RETVAL_I:%.*]] = alloca [[STRUCT_FLOAT16X8X2_T:%.*]], align 16 | |
| @@ -2089,7 +2089,7 @@ float16x8x2_t test_vzipq_f16(float16x8_t a, float16x8_t b) { | |
| return vzipq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vuzp_f16 | |
| +// CHECK-LABEL: define dso_local %struct.float16x4x2_t @test_vuzp_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[RETVAL_I:%.*]] = alloca [[STRUCT_FLOAT16X4X2_T:%.*]], align 8 | |
| @@ -2112,7 +2112,7 @@ float16x4x2_t test_vuzp_f16(float16x4_t a, float16x4_t b) { | |
| return vuzp_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vuzpq_f16 | |
| +// CHECK-LABEL: define dso_local %struct.float16x8x2_t @test_vuzpq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[RETVAL_I:%.*]] = alloca [[STRUCT_FLOAT16X8X2_T:%.*]], align 16 | |
| @@ -2135,7 +2135,7 @@ float16x8x2_t test_vuzpq_f16(float16x8_t a, float16x8_t b) { | |
| return vuzpq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtrn_f16 | |
| +// CHECK-LABEL: define dso_local %struct.float16x4x2_t @test_vtrn_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[RETVAL_I:%.*]] = alloca [[STRUCT_FLOAT16X4X2_T:%.*]], align 8 | |
| @@ -2158,7 +2158,7 @@ float16x4x2_t test_vtrn_f16(float16x4_t a, float16x4_t b) { | |
| return vtrn_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtrnq_f16 | |
| +// CHECK-LABEL: define dso_local %struct.float16x8x2_t @test_vtrnq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[RETVAL_I:%.*]] = alloca [[STRUCT_FLOAT16X8X2_T:%.*]], align 16 | |
| @@ -2181,7 +2181,7 @@ float16x8x2_t test_vtrnq_f16(float16x8_t a, float16x8_t b) { | |
| return vtrnq_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmov_n_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vmov_n_f16 | |
| // CHECK-SAME: (half noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VECINIT:%.*]] = insertelement <4 x half> undef, half [[A]], i32 0 | |
| @@ -2194,7 +2194,7 @@ float16x4_t test_vmov_n_f16(float16_t a) { | |
| return vmov_n_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmovq_n_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vmovq_n_f16 | |
| // CHECK-SAME: (half noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VECINIT:%.*]] = insertelement <8 x half> undef, half [[A]], i32 0 | |
| @@ -2211,7 +2211,7 @@ float16x8_t test_vmovq_n_f16(float16_t a) { | |
| return vmovq_n_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vdup_n_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vdup_n_f16 | |
| // CHECK-SAME: (half noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VECINIT:%.*]] = insertelement <4 x half> undef, half [[A]], i32 0 | |
| @@ -2224,7 +2224,7 @@ float16x4_t test_vdup_n_f16(float16_t a) { | |
| return vdup_n_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vdupq_n_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vdupq_n_f16 | |
| // CHECK-SAME: (half noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VECINIT:%.*]] = insertelement <8 x half> undef, half [[A]], i32 0 | |
| @@ -2241,7 +2241,7 @@ float16x8_t test_vdupq_n_f16(float16_t a) { | |
| return vdupq_n_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vdup_lane_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vdup_lane_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -2253,7 +2253,7 @@ float16x4_t test_vdup_lane_f16(float16x4_t a) { | |
| return vdup_lane_f16(a, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vdupq_lane_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vdupq_lane_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -2265,7 +2265,7 @@ float16x8_t test_vdupq_lane_f16(float16x4_t a) { | |
| return vdupq_lane_f16(a, 3); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vdup_laneq_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vdup_laneq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -2277,7 +2277,7 @@ float16x4_t test_vdup_laneq_f16(float16x8_t a) { | |
| return vdup_laneq_f16(a, 1); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vdupq_laneq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vdupq_laneq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -2289,7 +2289,7 @@ float16x8_t test_vdupq_laneq_f16(float16x8_t a) { | |
| return vdupq_laneq_f16(a, 7); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vext_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vext_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x half> [[A]] to <8 x i8> | |
| @@ -2303,7 +2303,7 @@ float16x4_t test_vext_f16(float16x4_t a, float16x4_t b) { | |
| return vext_f16(a, b, 2); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vextq_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vextq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x half> [[A]] to <16 x i8> | |
| @@ -2317,7 +2317,7 @@ float16x8_t test_vextq_f16(float16x8_t a, float16x8_t b) { | |
| return vextq_f16(a, b, 5); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrev64_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vrev64_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x half> [[A]], <4 x half> [[A]], <4 x i32> <i32 3, i32 2, i32 1, i32 0> | |
| @@ -2327,7 +2327,7 @@ float16x4_t test_vrev64_f16(float16x4_t a) { | |
| return vrev64_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vrev64q_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vrev64q_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> [[A]], <8 x half> [[A]], <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4> | |
| @@ -2337,7 +2337,7 @@ float16x8_t test_vrev64q_f16(float16x8_t a) { | |
| return vrev64q_f16(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vzip1_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vzip1_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x half> [[A]], <4 x half> [[B]], <4 x i32> <i32 0, i32 4, i32 1, i32 5> | |
| @@ -2347,7 +2347,7 @@ float16x4_t test_vzip1_f16(float16x4_t a, float16x4_t b) { | |
| return vzip1_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vzip1q_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vzip1q_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> [[A]], <8 x half> [[B]], <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> | |
| @@ -2357,7 +2357,7 @@ float16x8_t test_vzip1q_f16(float16x8_t a, float16x8_t b) { | |
| return vzip1q_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vzip2_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vzip2_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x half> [[A]], <4 x half> [[B]], <4 x i32> <i32 2, i32 6, i32 3, i32 7> | |
| @@ -2367,7 +2367,7 @@ float16x4_t test_vzip2_f16(float16x4_t a, float16x4_t b) { | |
| return vzip2_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vzip2q_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vzip2q_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> [[A]], <8 x half> [[B]], <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> | |
| @@ -2377,7 +2377,7 @@ float16x8_t test_vzip2q_f16(float16x8_t a, float16x8_t b) { | |
| return vzip2q_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vuzp1_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vuzp1_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x half> [[A]], <4 x half> [[B]], <4 x i32> <i32 0, i32 2, i32 4, i32 6> | |
| @@ -2387,7 +2387,7 @@ float16x4_t test_vuzp1_f16(float16x4_t a, float16x4_t b) { | |
| return vuzp1_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vuzp1q_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vuzp1q_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> [[A]], <8 x half> [[B]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> | |
| @@ -2397,7 +2397,7 @@ float16x8_t test_vuzp1q_f16(float16x8_t a, float16x8_t b) { | |
| return vuzp1q_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vuzp2_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vuzp2_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x half> [[A]], <4 x half> [[B]], <4 x i32> <i32 1, i32 3, i32 5, i32 7> | |
| @@ -2407,7 +2407,7 @@ float16x4_t test_vuzp2_f16(float16x4_t a, float16x4_t b) { | |
| return vuzp2_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vuzp2q_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vuzp2q_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> [[A]], <8 x half> [[B]], <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> | |
| @@ -2417,7 +2417,7 @@ float16x8_t test_vuzp2q_f16(float16x8_t a, float16x8_t b) { | |
| return vuzp2q_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtrn1_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vtrn1_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x half> [[A]], <4 x half> [[B]], <4 x i32> <i32 0, i32 4, i32 2, i32 6> | |
| @@ -2427,7 +2427,7 @@ float16x4_t test_vtrn1_f16(float16x4_t a, float16x4_t b) { | |
| return vtrn1_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtrn1q_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vtrn1q_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> [[A]], <8 x half> [[B]], <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> | |
| @@ -2437,7 +2437,7 @@ float16x8_t test_vtrn1q_f16(float16x8_t a, float16x8_t b) { | |
| return vtrn1q_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtrn2_f16 | |
| +// CHECK-LABEL: define dso_local <4 x half> @test_vtrn2_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[A:%.*]], <4 x half> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x half> [[A]], <4 x half> [[B]], <4 x i32> <i32 1, i32 5, i32 3, i32 7> | |
| @@ -2447,7 +2447,7 @@ float16x4_t test_vtrn2_f16(float16x4_t a, float16x4_t b) { | |
| return vtrn2_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vtrn2q_f16 | |
| +// CHECK-LABEL: define dso_local <8 x half> @test_vtrn2q_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[A:%.*]], <8 x half> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> [[A]], <8 x half> [[B]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> | |
| @@ -2457,7 +2457,7 @@ float16x8_t test_vtrn2q_f16(float16x8_t a, float16x8_t b) { | |
| return vtrn2q_f16(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vduph_laneq_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vduph_laneq_f16 | |
| // CHECK-SAME: (<8 x half> noundef [[VEC:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VGETQ_LANE:%.*]] = extractelement <8 x half> [[VEC]], i32 7 | |
| @@ -2467,7 +2467,7 @@ float16_t test_vduph_laneq_f16(float16x8_t vec) { | |
| return vduph_laneq_f16(vec, 7); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vduph_lane_f16 | |
| +// CHECK-LABEL: define dso_local half @test_vduph_lane_f16 | |
| // CHECK-SAME: (<4 x half> noundef [[VEC:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VGET_LANE:%.*]] = extractelement <4 x half> [[VEC]], i32 3 | |
| diff --git a/clang/test/CodeGen/arm-neon-fma.c b/clang/test/CodeGen/arm-neon-fma.c | |
| index 0280686a4cd1..07780f9c54b2 100644 | |
| --- a/clang/test/CodeGen/arm-neon-fma.c | |
| +++ b/clang/test/CodeGen/arm-neon-fma.c | |
| @@ -10,7 +10,7 @@ | |
| #include <arm_neon.h> | |
| -// CHECK-LABEL: define {{[^@]+}}@test_fma_order | |
| +// CHECK-LABEL: define dso_local <2 x float> @test_fma_order | |
| // CHECK-SAME: (<2 x float> noundef [[ACCUM:%.*]], <2 x float> noundef [[LHS:%.*]], <2 x float> noundef [[RHS:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[ACCUM]] to <8 x i8> | |
| @@ -23,7 +23,7 @@ float32x2_t test_fma_order(float32x2_t accum, float32x2_t lhs, float32x2_t rhs) | |
| return vfma_f32(accum, lhs, rhs); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_fmaq_order | |
| +// CHECK-LABEL: define dso_local <4 x float> @test_fmaq_order | |
| // CHECK-SAME: (<4 x float> noundef [[ACCUM:%.*]], <4 x float> noundef [[LHS:%.*]], <4 x float> noundef [[RHS:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[ACCUM]] to <16 x i8> | |
| @@ -36,7 +36,7 @@ float32x4_t test_fmaq_order(float32x4_t accum, float32x4_t lhs, float32x4_t rhs) | |
| return vfmaq_f32(accum, lhs, rhs); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfma_n_f32 | |
| +// CHECK-LABEL: define dso_local <2 x float> @test_vfma_n_f32 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]], float noundef [[N:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float [[N]], i32 0 | |
| @@ -51,7 +51,7 @@ float32x2_t test_vfma_n_f32(float32x2_t a, float32x2_t b, float32_t n) { | |
| return vfma_n_f32(a, b, n); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vfmaq_n_f32 | |
| +// CHECK-LABEL: define dso_local <4 x float> @test_vfmaq_n_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]], float noundef [[N:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float [[N]], i32 0 | |
| diff --git a/clang/test/CodeGen/arm-neon-numeric-maxmin.c b/clang/test/CodeGen/arm-neon-numeric-maxmin.c | |
| index d2d4fee10f07..eb2608721494 100644 | |
| --- a/clang/test/CodeGen/arm-neon-numeric-maxmin.c | |
| +++ b/clang/test/CodeGen/arm-neon-numeric-maxmin.c | |
| @@ -5,7 +5,7 @@ | |
| #include <arm_neon.h> | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxnm_f32 | |
| +// CHECK-LABEL: define dso_local <2 x float> @test_vmaxnm_f32 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8> | |
| @@ -18,7 +18,7 @@ float32x2_t test_vmaxnm_f32(float32x2_t a, float32x2_t b) { | |
| return vmaxnm_f32(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vmaxnmq_f32 | |
| +// CHECK-LABEL: define dso_local <4 x float> @test_vmaxnmq_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8> | |
| @@ -31,7 +31,7 @@ float32x4_t test_vmaxnmq_f32(float32x4_t a, float32x4_t b) { | |
| return vmaxnmq_f32(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminnm_f32 | |
| +// CHECK-LABEL: define dso_local <2 x float> @test_vminnm_f32 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]], <2 x float> noundef [[B:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8> | |
| @@ -44,7 +44,7 @@ float32x2_t test_vminnm_f32(float32x2_t a, float32x2_t b) { | |
| return vminnm_f32(a, b); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vminnmq_f32 | |
| +// CHECK-LABEL: define dso_local <4 x float> @test_vminnmq_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]], <4 x float> noundef [[B:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8> | |
| diff --git a/clang/test/CodeGen/arm-neon-vcvtX.c b/clang/test/CodeGen/arm-neon-vcvtX.c | |
| index c087b92102c5..12106c36896f 100644 | |
| --- a/clang/test/CodeGen/arm-neon-vcvtX.c | |
| +++ b/clang/test/CodeGen/arm-neon-vcvtX.c | |
| @@ -5,7 +5,7 @@ | |
| #include <arm_neon.h> | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvta_s32_f32 | |
| +// CHECK-LABEL: define dso_local <2 x i32> @test_vcvta_s32_f32 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8> | |
| @@ -16,7 +16,7 @@ int32x2_t test_vcvta_s32_f32(float32x2_t a) { | |
| return vcvta_s32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvta_u32_f32 | |
| +// CHECK-LABEL: define dso_local <2 x i32> @test_vcvta_u32_f32 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8> | |
| @@ -27,7 +27,7 @@ uint32x2_t test_vcvta_u32_f32(float32x2_t a) { | |
| return vcvta_u32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtaq_s32_f32 | |
| +// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtaq_s32_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8> | |
| @@ -38,7 +38,7 @@ int32x4_t test_vcvtaq_s32_f32(float32x4_t a) { | |
| return vcvtaq_s32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtaq_u32_f32 | |
| +// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtaq_u32_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8> | |
| @@ -49,7 +49,7 @@ uint32x4_t test_vcvtaq_u32_f32(float32x4_t a) { | |
| return vcvtaq_u32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtn_s32_f32 | |
| +// CHECK-LABEL: define dso_local <2 x i32> @test_vcvtn_s32_f32 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8> | |
| @@ -60,7 +60,7 @@ int32x2_t test_vcvtn_s32_f32(float32x2_t a) { | |
| return vcvtn_s32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtn_u32_f32 | |
| +// CHECK-LABEL: define dso_local <2 x i32> @test_vcvtn_u32_f32 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8> | |
| @@ -71,7 +71,7 @@ uint32x2_t test_vcvtn_u32_f32(float32x2_t a) { | |
| return vcvtn_u32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtnq_s32_f32 | |
| +// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtnq_s32_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8> | |
| @@ -82,7 +82,7 @@ int32x4_t test_vcvtnq_s32_f32(float32x4_t a) { | |
| return vcvtnq_s32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtnq_u32_f32 | |
| +// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtnq_u32_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8> | |
| @@ -93,7 +93,7 @@ uint32x4_t test_vcvtnq_u32_f32(float32x4_t a) { | |
| return vcvtnq_u32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtp_s32_f32 | |
| +// CHECK-LABEL: define dso_local <2 x i32> @test_vcvtp_s32_f32 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8> | |
| @@ -104,7 +104,7 @@ int32x2_t test_vcvtp_s32_f32(float32x2_t a) { | |
| return vcvtp_s32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtp_u32_f32 | |
| +// CHECK-LABEL: define dso_local <2 x i32> @test_vcvtp_u32_f32 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8> | |
| @@ -115,7 +115,7 @@ uint32x2_t test_vcvtp_u32_f32(float32x2_t a) { | |
| return vcvtp_u32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtpq_s32_f32 | |
| +// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtpq_s32_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8> | |
| @@ -126,7 +126,7 @@ int32x4_t test_vcvtpq_s32_f32(float32x4_t a) { | |
| return vcvtpq_s32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtpq_u32_f32 | |
| +// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtpq_u32_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8> | |
| @@ -137,7 +137,7 @@ uint32x4_t test_vcvtpq_u32_f32(float32x4_t a) { | |
| return vcvtpq_u32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtm_s32_f32 | |
| +// CHECK-LABEL: define dso_local <2 x i32> @test_vcvtm_s32_f32 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8> | |
| @@ -148,7 +148,7 @@ int32x2_t test_vcvtm_s32_f32(float32x2_t a) { | |
| return vcvtm_s32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtm_u32_f32 | |
| +// CHECK-LABEL: define dso_local <2 x i32> @test_vcvtm_u32_f32 | |
| // CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8> | |
| @@ -159,7 +159,7 @@ uint32x2_t test_vcvtm_u32_f32(float32x2_t a) { | |
| return vcvtm_u32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtmq_s32_f32 | |
| +// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtmq_s32_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8> | |
| @@ -170,7 +170,7 @@ int32x4_t test_vcvtmq_s32_f32(float32x4_t a) { | |
| return vcvtmq_s32_f32(a); | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@test_vcvtmq_u32_f32 | |
| +// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtmq_u32_f32 | |
| // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8> | |
| diff --git a/clang/test/CodeGenCXX/pr58798.cpp b/clang/test/CodeGenCXX/pr58798.cpp | |
| index d2098388b503..e464bbbc1176 100644 | |
| --- a/clang/test/CodeGenCXX/pr58798.cpp | |
| +++ b/clang/test/CodeGenCXX/pr58798.cpp | |
| @@ -17,7 +17,7 @@ | |
| // Forward declarations: | |
| // CHECK: Function Attrs: mustprogress noinline nounwind optnone willreturn memory(read) | |
| -// CHECK-LABEL: define {{[^@]+}}@_Z22callee_with_clang_attri | |
| +// CHECK-LABEL: define dso_local noundef i32 @_Z22callee_with_clang_attri | |
| // CHECK-SAME: (i32 noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -39,7 +39,7 @@ int callee_with_cxx_attr(int a) noexcept; | |
| // Calls to forward declarations: | |
| // CHECK: Function Attrs: mustprogress noinline nounwind optnone willreturn memory(read) | |
| -// CHECK-LABEL: define {{[^@]+}}@_Z54early_caller_of_callee_with_clang_attr_with_clang_attri | |
| +// CHECK-LABEL: define dso_local noundef i32 @_Z54early_caller_of_callee_with_clang_attr_with_clang_attri | |
| // CHECK-SAME: (i32 noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -53,7 +53,7 @@ __attribute__((pure)) int early_caller_of_callee_with_clang_attr_with_clang_attr | |
| } | |
| // CHECK: Function Attrs: mustprogress noinline nounwind optnone | |
| -// CHECK-LABEL: define {{[^@]+}}@_Z52early_caller_of_callee_with_clang_attr_with_cxx_attri | |
| +// CHECK-LABEL: define dso_local noundef i32 @_Z52early_caller_of_callee_with_clang_attr_with_cxx_attri | |
| // CHECK-SAME: (i32 noundef [[A:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -67,7 +67,7 @@ int early_caller_of_callee_with_clang_attr_with_cxx_attr(int a) noexcept { | |
| } | |
| // CHECK: Function Attrs: mustprogress noinline nounwind optnone willreturn memory(read) | |
| -// CHECK-LABEL: define {{[^@]+}}@_Z52early_caller_of_callee_with_cxx_attr_with_clang_attri | |
| +// CHECK-LABEL: define dso_local noundef i32 @_Z52early_caller_of_callee_with_cxx_attr_with_clang_attri | |
| // CHECK-SAME: (i32 noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -81,7 +81,7 @@ __attribute__((pure)) int early_caller_of_callee_with_cxx_attr_with_clang_attr(i | |
| } | |
| // CHECK: Function Attrs: mustprogress noinline nounwind optnone | |
| -// CHECK-LABEL: define {{[^@]+}}@_Z50early_caller_of_callee_with_cxx_attr_with_cxx_attri | |
| +// CHECK-LABEL: define dso_local noundef i32 @_Z50early_caller_of_callee_with_cxx_attr_with_cxx_attri | |
| // CHECK-SAME: (i32 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -97,7 +97,7 @@ int early_caller_of_callee_with_cxx_attr_with_cxx_attr(int a) noexcept { | |
| // Definitions: | |
| // CHECK: Function Attrs: mustprogress noinline nounwind optnone willreturn memory(read) | |
| -// CHECK-LABEL: define {{[^@]+}}@_Z22callee_with_clang_attri | |
| +// CHECK-LABEL: define dso_local noundef i32 @_Z22callee_with_clang_attri | |
| // CHECK-SAME: (i32 noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -120,7 +120,7 @@ __attribute__((pure)) int callee_with_clang_attr(int a) { | |
| } | |
| // CHECK: Function Attrs: mustprogress noinline nounwind optnone | |
| -// CHECK-LABEL: define {{[^@]+}}@_Z20callee_with_cxx_attri | |
| +// CHECK-LABEL: define dso_local noundef i32 @_Z20callee_with_cxx_attri | |
| // CHECK-SAME: (i32 noundef [[A:%.*]]) #[[ATTR1]] personality ptr @__gxx_personality_v0 { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -153,7 +153,7 @@ int callee_with_cxx_attr(int a) noexcept { | |
| // Calls to definitions: | |
| // CHECK: Function Attrs: mustprogress noinline nounwind optnone willreturn memory(read) | |
| -// CHECK-LABEL: define {{[^@]+}}@_Z53late_caller_of_callee_with_clang_attr_with_clang_attri | |
| +// CHECK-LABEL: define dso_local noundef i32 @_Z53late_caller_of_callee_with_clang_attr_with_clang_attri | |
| // CHECK-SAME: (i32 noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -167,7 +167,7 @@ __attribute__((pure)) int late_caller_of_callee_with_clang_attr_with_clang_attr( | |
| } | |
| // CHECK: Function Attrs: mustprogress noinline nounwind optnone | |
| -// CHECK-LABEL: define {{[^@]+}}@_Z51late_caller_of_callee_with_clang_attr_with_cxx_attri | |
| +// CHECK-LABEL: define dso_local noundef i32 @_Z51late_caller_of_callee_with_clang_attr_with_cxx_attri | |
| // CHECK-SAME: (i32 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -181,7 +181,7 @@ int late_caller_of_callee_with_clang_attr_with_cxx_attr(int a) noexcept { | |
| } | |
| // CHECK: Function Attrs: mustprogress noinline nounwind optnone willreturn memory(read) | |
| -// CHECK-LABEL: define {{[^@]+}}@_Z51late_caller_of_callee_with_cxx_attr_with_clang_attri | |
| +// CHECK-LABEL: define dso_local noundef i32 @_Z51late_caller_of_callee_with_cxx_attr_with_clang_attri | |
| // CHECK-SAME: (i32 noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -195,7 +195,7 @@ __attribute__((pure)) int late_caller_of_callee_with_cxx_attr_with_clang_attr(in | |
| } | |
| // CHECK: Function Attrs: mustprogress noinline nounwind optnone | |
| -// CHECK-LABEL: define {{[^@]+}}@_Z49late_caller_of_callee_with_cxx_attr_with_cxx_attri | |
| +// CHECK-LABEL: define dso_local noundef i32 @_Z49late_caller_of_callee_with_cxx_attr_with_cxx_attri | |
| // CHECK-SAME: (i32 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 | |
| diff --git a/clang/test/OpenMP/align_clause_codegen.cpp b/clang/test/OpenMP/align_clause_codegen.cpp | |
| index 49ece6e3319e..08114110e53b 100644 | |
| --- a/clang/test/OpenMP/align_clause_codegen.cpp | |
| +++ b/clang/test/OpenMP/align_clause_codegen.cpp | |
| @@ -80,7 +80,7 @@ int template_test() { | |
| return 0; | |
| } | |
| #endif | |
| -// CHECK-32-LABEL: define {{[^@]+}}@main | |
| +// CHECK-32-LABEL: define dso_local noundef i32 @main | |
| // CHECK-32-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK-32-NEXT: entry: | |
| // CHECK-32-NEXT: [[MYALLOC:%.*]] = alloca i32, align 4 | |
| @@ -135,7 +135,7 @@ int template_test() { | |
| // CHECK-32-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK-32-LABEL: define {{[^@]+}}@_Z13template_testv | |
| +// CHECK-32-LABEL: define dso_local noundef i32 @_Z13template_testv | |
| // CHECK-32-SAME: () #[[ATTR2:[0-9]+]] { | |
| // CHECK-32-NEXT: entry: | |
| // CHECK-32-NEXT: [[RESULT:%.*]] = alloca double, align 8 | |
| @@ -144,7 +144,7 @@ int template_test() { | |
| // CHECK-32-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK-32-LABEL: define {{[^@]+}}@_Z3runIdLj1000ELj16EET_v | |
| +// CHECK-32-LABEL: define linkonce_odr noundef double @_Z3runIdLj1000ELj16EET_v | |
| // CHECK-32-SAME: () #[[ATTR2]] comdat { | |
| // CHECK-32-NEXT: entry: | |
| // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) | |
| @@ -155,7 +155,7 @@ int template_test() { | |
| // CHECK-32-NEXT: ret double [[TMP1]] | |
| // | |
| // | |
| -// CHECK-LABEL: define {{[^@]+}}@main | |
| +// CHECK-LABEL: define dso_local noundef i32 @main | |
| // CHECK-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[MYALLOC:%.*]] = alloca i64, align 8 | |
| @@ -210,7 +210,7 @@ int template_test() { | |
| // CHECK-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK-LABEL: define {{[^@]+}}@_Z13template_testv | |
| +// CHECK-LABEL: define dso_local noundef i32 @_Z13template_testv | |
| // CHECK-SAME: () #[[ATTR2:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[RESULT:%.*]] = alloca double, align 8 | |
| @@ -219,7 +219,7 @@ int template_test() { | |
| // CHECK-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK-LABEL: define {{[^@]+}}@_Z3runIdLj1000ELj16EET_v | |
| +// CHECK-LABEL: define linkonce_odr noundef double @_Z3runIdLj1000ELj16EET_v | |
| // CHECK-SAME: () #[[ATTR2]] comdat { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) | |
| diff --git a/clang/test/OpenMP/amdgcn_target_global_constructor.cpp b/clang/test/OpenMP/amdgcn_target_global_constructor.cpp | |
| index 937de993b4fa..6e20f2738894 100644 | |
| --- a/clang/test/OpenMP/amdgcn_target_global_constructor.cpp | |
| +++ b/clang/test/OpenMP/amdgcn_target_global_constructor.cpp | |
| @@ -20,14 +20,14 @@ S A; | |
| #pragma omp end declare target | |
| #endif | |
| -// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_A_l19_ctor | |
| +// CHECK-LABEL: define weak_odr protected amdgpu_kernel void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_A_l19_ctor | |
| // CHECK-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: call void @_ZN1SC1Ev(ptr noundef nonnull align 4 dereferenceable(4) addrspacecast (ptr addrspace(1) @A to ptr)) #[[ATTR3:[0-9]+]] | |
| // CHECK-NEXT: ret void | |
| // | |
| // | |
| -// CHECK-LABEL: define {{[^@]+}}@_ZN1SC1Ev | |
| +// CHECK-LABEL: define linkonce_odr void @_ZN1SC1Ev | |
| // CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8, addrspace(5) | |
| @@ -38,14 +38,14 @@ S A; | |
| // CHECK-NEXT: ret void | |
| // | |
| // | |
| -// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_A_l19_dtor | |
| +// CHECK-LABEL: define weak_odr protected amdgpu_kernel void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_A_l19_dtor | |
| // CHECK-SAME: () #[[ATTR0]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: call void @_ZN1SD1Ev(ptr noundef nonnull align 4 dereferenceable(4) addrspacecast (ptr addrspace(1) @A to ptr)) #[[ATTR4:[0-9]+]] | |
| // CHECK-NEXT: ret void | |
| // | |
| // | |
| -// CHECK-LABEL: define {{[^@]+}}@_ZN1SD1Ev | |
| +// CHECK-LABEL: define linkonce_odr void @_ZN1SD1Ev | |
| // CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8, addrspace(5) | |
| @@ -56,7 +56,7 @@ S A; | |
| // CHECK-NEXT: ret void | |
| // | |
| // | |
| -// CHECK-LABEL: define {{[^@]+}}@_ZN1SC2Ev | |
| +// CHECK-LABEL: define linkonce_odr void @_ZN1SC2Ev | |
| // CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8, addrspace(5) | |
| @@ -68,7 +68,7 @@ S A; | |
| // CHECK-NEXT: ret void | |
| // | |
| // | |
| -// CHECK-LABEL: define {{[^@]+}}@_ZN1SD2Ev | |
| +// CHECK-LABEL: define linkonce_odr void @_ZN1SD2Ev | |
| // CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8, addrspace(5) | |
| diff --git a/clang/test/OpenMP/bug56913.c b/clang/test/OpenMP/bug56913.c | |
| index cc7231626878..de1b01055cd0 100644 | |
| --- a/clang/test/OpenMP/bug56913.c | |
| +++ b/clang/test/OpenMP/bug56913.c | |
| @@ -12,7 +12,7 @@ void loop(int n) { | |
| u = &j; | |
| } | |
| } | |
| -// CHECK-LABEL: define {{[^@]+}}@loop | |
| +// CHECK-LABEL: define void @loop | |
| // CHECK-SAME: (i32 noundef [[N:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: [[J:%.*]] = alloca i32, align 4 | |
| diff --git a/clang/test/OpenMP/cancel_codegen.cpp b/clang/test/OpenMP/cancel_codegen.cpp | |
| index b853417fc989..6951ede8c860 100644 | |
| --- a/clang/test/OpenMP/cancel_codegen.cpp | |
| +++ b/clang/test/OpenMP/cancel_codegen.cpp | |
| @@ -78,7 +78,7 @@ for (int i = 0; i < argc; ++i) { | |
| } | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define noundef i32 @main | |
| // CHECK1-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -299,7 +299,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK1-NEXT: ret i32 [[TMP42]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -361,7 +361,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry. | |
| +// CHECK1-LABEL: define internal noundef i32 @.omp_task_entry. | |
| // CHECK1-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 | |
| @@ -407,7 +407,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -468,7 +468,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK1-NEXT: br label [[CANCEL_CONT]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -538,7 +538,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK1-NEXT: br label [[CANCEL_CONT]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[R:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -669,7 +669,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func | |
| +// CHECK1-LABEL: define internal void @.omp.reduction.reduction_func | |
| // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 | |
| @@ -689,7 +689,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main | |
| +// CHECK3-LABEL: define noundef i32 @main | |
| // CHECK3-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[STRUCTARG:%.*]] = alloca { ptr, ptr }, align 8 | |
| @@ -939,7 +939,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK3-NEXT: ret i32 [[TMP39]] | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main..omp_par | |
| +// CHECK3-LABEL: define internal void @main..omp_par | |
| // CHECK3-SAME: (ptr noalias [[TID_ADDR:%.*]], ptr noalias [[ZERO_ADDR:%.*]], ptr [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK3-NEXT: omp.par.entry: | |
| // CHECK3-NEXT: [[GEP_ARGC_ADDR:%.*]] = getelementptr { ptr, ptr }, ptr [[TMP0]], i32 0, i32 0 | |
| @@ -1002,7 +1002,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_task_entry. | |
| +// CHECK3-LABEL: define internal noundef i32 @.omp_task_entry. | |
| // CHECK3-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 | |
| @@ -1048,7 +1048,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK3-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR5:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1111,7 +1111,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK3-NEXT: br label [[CANCEL_CONT]] | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR5]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1186,7 +1186,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK3-NEXT: br label [[CANCEL_CONT]] | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[R:%.*]]) #[[ATTR5]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1312,7 +1312,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func | |
| +// CHECK3-LABEL: define internal void @.omp.reduction.reduction_func | |
| // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 | |
| diff --git a/clang/test/OpenMP/cancellation_point_codegen.cpp b/clang/test/OpenMP/cancellation_point_codegen.cpp | |
| index 66c9b5d8e321..1c661ed969cd 100644 | |
| --- a/clang/test/OpenMP/cancellation_point_codegen.cpp | |
| +++ b/clang/test/OpenMP/cancellation_point_codegen.cpp | |
| @@ -80,7 +80,7 @@ for (int i = 0; i < argc; ++i) { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define noundef i32 @main | |
| // CHECK1-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -313,7 +313,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK1-NEXT: ret i32 [[TMP50]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -354,7 +354,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry. | |
| +// CHECK1-LABEL: define internal noundef i32 @.omp_task_entry. | |
| // CHECK1-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 | |
| @@ -407,7 +407,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry..3 | |
| +// CHECK1-LABEL: define internal noundef i32 @.omp_task_entry..3 | |
| // CHECK1-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR4]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 | |
| @@ -453,7 +453,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -520,7 +520,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK1-NEXT: br label [[CANCEL_CONT]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..5 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -596,7 +596,7 @@ for (int i = 0; i < argc; ++i) { | |
| // CHECK1-NEXT: br label [[CANCEL_CONT]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| diff --git a/clang/test/OpenMP/debug-info-complex-byval.cpp b/clang/test/OpenMP/debug-info-complex-byval.cpp | |
| index 8f23f88eed6d..cd422923187a 100644 | |
| --- a/clang/test/OpenMP/debug-info-complex-byval.cpp | |
| +++ b/clang/test/OpenMP/debug-info-complex-byval.cpp | |
| @@ -11,7 +11,7 @@ void a() { | |
| } | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z1av | |
| +// CHECK1-LABEL: define dso_local void @_Z1av | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] !dbg [[DBG6:![0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[B:%.*]] = alloca { float, float }, align 4 | |
| @@ -24,7 +24,7 @@ void a() { | |
| // CHECK1-NEXT: ret void, !dbg [[DBG15:![0-9]+]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined._debug__ | |
| +// CHECK1-LABEL: define internal void @.omp_outlined._debug__ | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], <2 x float> noundef [[B_COERCE:%.*]]) #[[ATTR2:[0-9]+]] !dbg [[DBG16:![0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[B:%.*]] = alloca { float, float }, align 4 | |
| @@ -39,7 +39,7 @@ void a() { | |
| // CHECK1-NEXT: ret void, !dbg [[DBG29:![0-9]+]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[B:%.*]]) #[[ATTR3:[0-9]+]] !dbg [[DBG30:![0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| diff --git a/clang/test/OpenMP/debug-info-openmp-array.cpp b/clang/test/OpenMP/debug-info-openmp-array.cpp | |
| index f031cb9693a2..2d8f3700a974 100644 | |
| --- a/clang/test/OpenMP/debug-info-openmp-array.cpp | |
| +++ b/clang/test/OpenMP/debug-info-openmp-array.cpp | |
| @@ -13,7 +13,7 @@ void f(int m) { | |
| } | |
| } | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z1fi | |
| +// CHECK1-LABEL: define dso_local void @_Z1fi | |
| // CHECK1-SAME: (i32 noundef [[M:%.*]]) #[[ATTR0:[0-9]+]] !dbg [[DBG6:![0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -37,7 +37,7 @@ void f(int m) { | |
| // CHECK1-NEXT: ret void, !dbg [[DBG27]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined._debug__ | |
| +// CHECK1-LABEL: define internal void @.omp_outlined._debug__ | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CEN:%.*]]) #[[ATTR3:[0-9]+]] !dbg [[DBG28:![0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -147,7 +147,7 @@ void f(int m) { | |
| // CHECK1-NEXT: ret void, !dbg [[DBG64:![0-9]+]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CEN:%.*]]) #[[ATTR3]] !dbg [[DBG65:![0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| diff --git a/clang/test/OpenMP/declare_target_codegen_globalization.cpp b/clang/test/OpenMP/declare_target_codegen_globalization.cpp | |
| index 090713386291..df184dcb24a1 100644 | |
| --- a/clang/test/OpenMP/declare_target_codegen_globalization.cpp | |
| +++ b/clang/test/OpenMP/declare_target_codegen_globalization.cpp | |
| @@ -24,7 +24,7 @@ int maini1() { | |
| // parallel region | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6maini1v_l16 | |
| +// CHECK1-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6maini1v_l16 | |
| // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -45,7 +45,7 @@ int maini1() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__ | |
| +// CHECK1-LABEL: define internal void @__omp_outlined__ | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -63,7 +63,7 @@ int maini1() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z3fooRi | |
| +// CHECK1-LABEL: define hidden noundef i32 @_Z3fooRi | |
| // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -73,7 +73,7 @@ int maini1() { | |
| // CHECK1-NEXT: ret i32 [[TMP1]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z3barv | |
| +// CHECK1-LABEL: define hidden noundef i32 @_Z3barv | |
| // CHECK1-SAME: () #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A:%.*]] = call align 8 ptr @__kmpc_alloc_shared(i64 4) | |
| diff --git a/clang/test/OpenMP/declare_variant_bind_to_decl.cpp b/clang/test/OpenMP/declare_variant_bind_to_decl.cpp | |
| index dca18abb36c8..8c0ef563e34d 100644 | |
| --- a/clang/test/OpenMP/declare_variant_bind_to_decl.cpp | |
| +++ b/clang/test/OpenMP/declare_variant_bind_to_decl.cpp | |
| @@ -20,13 +20,13 @@ int main() { | |
| } | |
| #endif | |
| -// CHECK-LABEL: define {{[^@]+}}@_Z3foov | |
| +// CHECK-LABEL: define dso_local void @_Z3foov | |
| // CHECK-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: ret void | |
| // | |
| // | |
| -// CHECK-LABEL: define {{[^@]+}}@main | |
| +// CHECK-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK-SAME: () #[[ATTR1:[0-9]+]] { | |
| // CHECK-NEXT: entry: | |
| // CHECK-NEXT: call void @"_Z74foo$ompvariant$S2$s7$Pppc64le$Pppc64$S3$s9$Pmatch_any$Pbind_to_declarationv"() | |
| diff --git a/clang/test/OpenMP/distribute_codegen.cpp b/clang/test/OpenMP/distribute_codegen.cpp | |
| index d26ed299ca38..05c538d7c391 100644 | |
| --- a/clang/test/OpenMP/distribute_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_codegen.cpp | |
| @@ -116,7 +116,7 @@ T ftemplate() { | |
| int fint(void) { return ftemplate<int>(); } | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_ | |
| +// CHECK1-LABEL: define dso_local void @_Z23without_schedule_clausePfS_S_S_ | |
| // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -190,7 +190,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56 | |
| // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -205,7 +205,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -299,7 +299,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_ | |
| +// CHECK1-LABEL: define dso_local void @_Z18static_not_chunkedPfS_S_S_ | |
| // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -373,7 +373,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68 | |
| // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -388,7 +388,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -482,7 +482,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_ | |
| +// CHECK1-LABEL: define dso_local void @_Z14static_chunkedPfS_S_S_ | |
| // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -556,7 +556,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80 | |
| // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -571,7 +571,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -682,7 +682,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z12test_precondv | |
| +// CHECK1-LABEL: define dso_local void @_Z12test_precondv | |
| // CHECK1-SAME: () #[[ATTR0]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A:%.*]] = alloca i8, align 1 | |
| @@ -747,7 +747,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92 | |
| // CHECK1-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -756,7 +756,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -849,14 +849,14 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z4fintv | |
| +// CHECK1-LABEL: define dso_local noundef signext i32 @_Z4fintv | |
| // CHECK1-SAME: () #[[ATTR0]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z9ftemplateIiET_v() | |
| // CHECK1-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v | |
| +// CHECK1-LABEL: define linkonce_odr noundef signext i32 @_Z9ftemplateIiET_v | |
| // CHECK1-SAME: () #[[ATTR0]] comdat { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[AA:%.*]] = alloca i16, align 2 | |
| @@ -906,7 +906,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108 | |
| // CHECK1-SAME: (i64 noundef [[AA:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -915,7 +915,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -997,14 +997,14 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_ | |
| +// CHECK3-LABEL: define dso_local void @_Z23without_schedule_clausePfS_S_S_ | |
| // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1078,7 +1078,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56 | |
| // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1093,7 +1093,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK3-LABEL: define internal void @.omp_outlined. | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1183,7 +1183,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_ | |
| +// CHECK3-LABEL: define dso_local void @_Z18static_not_chunkedPfS_S_S_ | |
| // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1257,7 +1257,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68 | |
| // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1272,7 +1272,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1362,7 +1362,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_ | |
| +// CHECK3-LABEL: define dso_local void @_Z14static_chunkedPfS_S_S_ | |
| // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1436,7 +1436,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80 | |
| // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1451,7 +1451,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1558,7 +1558,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_Z12test_precondv | |
| +// CHECK3-LABEL: define dso_local void @_Z12test_precondv | |
| // CHECK3-SAME: () #[[ATTR0]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[A:%.*]] = alloca i8, align 1 | |
| @@ -1623,7 +1623,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92 | |
| // CHECK3-SAME: (i32 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1632,7 +1632,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1725,14 +1725,14 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_Z4fintv | |
| +// CHECK3-LABEL: define dso_local noundef i32 @_Z4fintv | |
| // CHECK3-SAME: () #[[ATTR0]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z9ftemplateIiET_v() | |
| // CHECK3-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v | |
| +// CHECK3-LABEL: define linkonce_odr noundef i32 @_Z9ftemplateIiET_v | |
| // CHECK3-SAME: () #[[ATTR0]] comdat { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[AA:%.*]] = alloca i16, align 2 | |
| @@ -1782,7 +1782,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108 | |
| // CHECK3-SAME: (i32 noundef [[AA:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1791,7 +1791,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1873,14 +1873,14 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK3-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56 | |
| +// CHECK17-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56 | |
| // CHECK17-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1895,7 +1895,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK17-LABEL: define internal void @.omp_outlined. | |
| // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1989,7 +1989,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68 | |
| +// CHECK17-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68 | |
| // CHECK17-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2004,7 +2004,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK17-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2098,7 +2098,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80 | |
| +// CHECK17-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80 | |
| // CHECK17-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2113,7 +2113,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK17-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2224,7 +2224,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92 | |
| +// CHECK17-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92 | |
| // CHECK17-SAME: (i64 noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -2233,7 +2233,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK17-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2326,7 +2326,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108 | |
| +// CHECK17-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108 | |
| // CHECK17-SAME: (i64 noundef [[AA:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -2335,7 +2335,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK17-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2417,7 +2417,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56 | |
| +// CHECK19-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56 | |
| // CHECK19-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2432,7 +2432,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK19-LABEL: define internal void @.omp_outlined. | |
| // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2522,7 +2522,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68 | |
| +// CHECK19-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68 | |
| // CHECK19-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2537,7 +2537,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK19-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2627,7 +2627,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80 | |
| +// CHECK19-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80 | |
| // CHECK19-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2642,7 +2642,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK19-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2749,7 +2749,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92 | |
| +// CHECK19-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92 | |
| // CHECK19-SAME: (i32 noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -2758,7 +2758,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK19-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2851,7 +2851,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108 | |
| +// CHECK19-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108 | |
| // CHECK19-SAME: (i32 noundef [[AA:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -2860,7 +2860,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK19-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| diff --git a/clang/test/OpenMP/distribute_firstprivate_codegen.cpp b/clang/test/OpenMP/distribute_firstprivate_codegen.cpp | |
| index e87fb96af394..63787439ad83 100644 | |
| --- a/clang/test/OpenMP/distribute_firstprivate_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_firstprivate_codegen.cpp | |
| @@ -150,7 +150,7 @@ int main() { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -168,7 +168,7 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -186,7 +186,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -304,14 +304,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main | |
| +// CHECK3-LABEL: define dso_local noundef i32 @main | |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -329,7 +329,7 @@ int main() { | |
| // CHECK3-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -358,7 +358,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK3-LABEL: define internal void @.omp_outlined. | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -476,14 +476,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK3-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@main | |
| +// CHECK9-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -597,7 +597,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP37]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -607,7 +607,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -620,7 +620,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 | |
| // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -643,7 +643,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK9-LABEL: define internal void @.omp_outlined. | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -775,7 +775,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -785,7 +785,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK9-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -884,7 +884,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP32]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -895,7 +895,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -909,7 +909,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -918,7 +918,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -928,7 +928,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -941,7 +941,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -962,7 +962,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1088,7 +1088,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1098,7 +1098,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1109,7 +1109,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1123,7 +1123,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1132,14 +1132,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK9-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@main | |
| +// CHECK11-LABEL: define dso_local noundef i32 @main | |
| // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1253,7 +1253,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP37]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1263,7 +1263,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1276,7 +1276,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 | |
| // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1299,7 +1299,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK11-LABEL: define internal void @.omp_outlined. | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1429,7 +1429,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1439,7 +1439,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK11-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1538,7 +1538,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP32]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1549,7 +1549,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1563,7 +1563,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1572,7 +1572,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1582,7 +1582,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1595,7 +1595,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1616,7 +1616,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1740,7 +1740,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1750,7 +1750,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1761,7 +1761,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1775,7 +1775,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1784,7 +1784,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK11-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) | |
| diff --git a/clang/test/OpenMP/distribute_lastprivate_codegen.cpp b/clang/test/OpenMP/distribute_lastprivate_codegen.cpp | |
| index 49fdc9978bbf..ab594a331197 100644 | |
| --- a/clang/test/OpenMP/distribute_lastprivate_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_lastprivate_codegen.cpp | |
| @@ -140,7 +140,7 @@ int main() { | |
| // lastprivates | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -158,7 +158,7 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -176,7 +176,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -291,14 +291,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main | |
| +// CHECK3-LABEL: define dso_local noundef i32 @main | |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -316,7 +316,7 @@ int main() { | |
| // CHECK3-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -345,7 +345,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK3-LABEL: define internal void @.omp_outlined. | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -460,14 +460,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK3-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@main | |
| +// CHECK9-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -582,7 +582,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP37]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -592,7 +592,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -605,7 +605,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 | |
| // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -628,7 +628,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK9-LABEL: define internal void @.omp_outlined. | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -778,7 +778,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -788,7 +788,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK9-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -887,7 +887,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP32]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -898,7 +898,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -912,7 +912,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -921,7 +921,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -931,7 +931,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -944,7 +944,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -965,7 +965,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1109,7 +1109,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1119,7 +1119,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1130,7 +1130,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1144,7 +1144,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1153,14 +1153,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK9-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@main | |
| +// CHECK11-LABEL: define dso_local noundef i32 @main | |
| // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1275,7 +1275,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP37]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1285,7 +1285,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1298,7 +1298,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 | |
| // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1321,7 +1321,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK11-LABEL: define internal void @.omp_outlined. | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1469,7 +1469,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1479,7 +1479,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK11-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1578,7 +1578,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP32]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1589,7 +1589,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1603,7 +1603,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1612,7 +1612,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1622,7 +1622,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1635,7 +1635,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1656,7 +1656,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1798,7 +1798,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1808,7 +1808,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1819,7 +1819,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1833,7 +1833,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1842,7 +1842,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK11-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) | |
| diff --git a/clang/test/OpenMP/distribute_parallel_for_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_codegen.cpp | |
| index 095abb0d2a5f..cd35efd95dd0 100644 | |
| --- a/clang/test/OpenMP/distribute_parallel_for_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_parallel_for_codegen.cpp | |
| @@ -767,7 +767,7 @@ int main() { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -794,7 +794,7 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117 | |
| // CHECK1-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -809,7 +809,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -903,7 +903,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1033,7 +1033,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l160 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l160 | |
| // CHECK1-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1048,7 +1048,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1142,7 +1142,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1272,7 +1272,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l202 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l202 | |
| // CHECK1-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1289,7 +1289,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1411,7 +1411,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1541,7 +1541,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l235 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l235 | |
| // CHECK1-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1556,7 +1556,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1650,7 +1650,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1780,7 +1780,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l267 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l267 | |
| // CHECK1-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1797,7 +1797,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..14 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1901,7 +1901,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..15 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2053,7 +2053,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l300 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l300 | |
| // CHECK1-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -2068,7 +2068,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..18 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..18 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2162,7 +2162,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..19 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..19 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2288,7 +2288,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l329 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l329 | |
| // CHECK1-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -2305,7 +2305,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..22 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..22 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2409,7 +2409,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..23 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..23 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2538,14 +2538,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main | |
| +// CHECK3-LABEL: define dso_local noundef i32 @main | |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2572,7 +2572,7 @@ int main() { | |
| // CHECK3-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117 | |
| // CHECK3-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -2587,7 +2587,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK3-LABEL: define internal void @.omp_outlined. | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2679,7 +2679,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2804,7 +2804,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l160 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l160 | |
| // CHECK3-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -2819,7 +2819,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2911,7 +2911,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3036,7 +3036,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l202 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l202 | |
| // CHECK3-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -3053,7 +3053,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3173,7 +3173,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3298,7 +3298,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l235 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l235 | |
| // CHECK3-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -3313,7 +3313,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3405,7 +3405,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3530,7 +3530,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l267 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l267 | |
| // CHECK3-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -3547,7 +3547,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..14 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3649,7 +3649,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..15 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3794,7 +3794,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l300 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l300 | |
| // CHECK3-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -3809,7 +3809,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..18 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..18 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3901,7 +3901,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..19 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..19 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -4022,7 +4022,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l329 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l329 | |
| // CHECK3-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -4039,7 +4039,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..22 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..22 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -4141,7 +4141,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..23 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..23 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -4265,14 +4265,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK3-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@main | |
| +// CHECK9-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -4843,7 +4843,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369 | |
| // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -4858,7 +4858,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK9-LABEL: define internal void @.omp_outlined. | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4952,7 +4952,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5072,7 +5072,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408 | |
| // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -5087,7 +5087,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5181,7 +5181,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5301,7 +5301,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447 | |
| // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -5318,7 +5318,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5440,7 +5440,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5560,7 +5560,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478 | |
| // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -5575,7 +5575,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5669,7 +5669,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5789,7 +5789,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506 | |
| // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -5806,7 +5806,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..14 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..14 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5910,7 +5910,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..15 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..15 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6052,7 +6052,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536 | |
| // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -6067,7 +6067,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..18 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..18 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6161,7 +6161,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..19 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..19 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6277,7 +6277,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562 | |
| // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -6294,7 +6294,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..22 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..22 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6398,7 +6398,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..23 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..23 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6517,7 +6517,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK9-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK9-SAME: () #[[ATTR3:[0-9]+]] comdat { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[A:%.*]] = alloca ptr, align 8 | |
| @@ -7085,7 +7085,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42 | |
| // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -7100,7 +7100,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..26 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..26 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -7194,7 +7194,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..27 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..27 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -7329,7 +7329,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51 | |
| // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -7344,7 +7344,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..30 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..30 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -7438,7 +7438,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..31 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..31 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -7558,7 +7558,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59 | |
| // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -7575,7 +7575,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..34 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..34 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -7697,7 +7697,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..35 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..35 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -7817,7 +7817,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67 | |
| // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -7832,7 +7832,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..38 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..38 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -7926,7 +7926,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..39 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..39 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -8046,7 +8046,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75 | |
| // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -8063,7 +8063,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..42 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..42 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -8167,7 +8167,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..43 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..43 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -8309,7 +8309,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83 | |
| // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -8324,7 +8324,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..46 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..46 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -8418,7 +8418,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..47 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..47 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -8534,7 +8534,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91 | |
| // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -8551,7 +8551,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..50 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..50 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -8655,7 +8655,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..51 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..51 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -8774,14 +8774,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK9-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK9-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@main | |
| +// CHECK11-LABEL: define dso_local noundef i32 @main | |
| // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -9352,7 +9352,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l369 | |
| // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -9367,7 +9367,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK11-LABEL: define internal void @.omp_outlined. | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -9459,7 +9459,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -9574,7 +9574,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l408 | |
| // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -9589,7 +9589,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -9681,7 +9681,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -9796,7 +9796,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l447 | |
| // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -9813,7 +9813,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -9933,7 +9933,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -10048,7 +10048,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l478 | |
| // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -10063,7 +10063,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -10155,7 +10155,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -10270,7 +10270,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l506 | |
| // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -10287,7 +10287,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..14 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..14 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -10389,7 +10389,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..15 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..15 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -10524,7 +10524,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l536 | |
| // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -10539,7 +10539,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..18 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..18 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -10631,7 +10631,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..19 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..19 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -10742,7 +10742,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l562 | |
| // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -10759,7 +10759,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..22 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..22 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -10861,7 +10861,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..23 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..23 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -10975,7 +10975,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK11-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK11-SAME: () #[[ATTR3:[0-9]+]] comdat { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[A:%.*]] = alloca ptr, align 4 | |
| @@ -11543,7 +11543,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42 | |
| // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -11558,7 +11558,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..26 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..26 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -11650,7 +11650,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..27 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..27 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -11780,7 +11780,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l51 | |
| // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -11795,7 +11795,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..30 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..30 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -11887,7 +11887,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..31 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..31 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -12002,7 +12002,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l59 | |
| // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -12019,7 +12019,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..34 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..34 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -12139,7 +12139,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..35 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..35 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -12254,7 +12254,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l67 | |
| // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -12269,7 +12269,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..38 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..38 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -12361,7 +12361,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..39 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..39 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -12476,7 +12476,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l75 | |
| // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -12493,7 +12493,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..42 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..42 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -12595,7 +12595,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..43 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..43 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -12730,7 +12730,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83 | |
| // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -12745,7 +12745,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..46 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..46 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -12837,7 +12837,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..47 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..47 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -12948,7 +12948,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l91 | |
| // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -12965,7 +12965,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..50 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..50 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -13067,7 +13067,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..51 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..51 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -13181,7 +13181,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK11-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK11-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) | |
| diff --git a/clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp | |
| index 7055743382bf..6ab0cc84024e 100644 | |
| --- a/clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp | |
| @@ -263,7 +263,7 @@ int main() { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -281,7 +281,7 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 | |
| // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -299,7 +299,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -408,7 +408,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -504,14 +504,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main | |
| +// CHECK3-LABEL: define dso_local noundef i32 @main | |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -529,7 +529,7 @@ int main() { | |
| // CHECK3-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 | |
| // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -558,7 +558,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK3-LABEL: define internal void @.omp_outlined. | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -661,7 +661,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], i32 noundef [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -759,14 +759,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK3-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@main | |
| +// CHECK8-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -880,7 +880,7 @@ int main() { | |
| // CHECK8-NEXT: ret i32 [[TMP37]] | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -890,7 +890,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -903,7 +903,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139 | |
| +// CHECK8-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139 | |
| // CHECK8-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -926,7 +926,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK8-LABEL: define internal void @.omp_outlined. | |
| // CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1057,7 +1057,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK8-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1188,7 +1188,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1198,7 +1198,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK8-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK8-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1297,7 +1297,7 @@ int main() { | |
| // CHECK8-NEXT: ret i32 [[TMP32]] | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1308,7 +1308,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1322,7 +1322,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1331,7 +1331,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1341,7 +1341,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1354,7 +1354,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48 | |
| +// CHECK8-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48 | |
| // CHECK8-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1375,7 +1375,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK8-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1496,7 +1496,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK8-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1625,7 +1625,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1635,7 +1635,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1646,7 +1646,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1660,7 +1660,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1669,14 +1669,14 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK8-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK8-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@main | |
| +// CHECK10-LABEL: define dso_local noundef i32 @main | |
| // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1790,7 +1790,7 @@ int main() { | |
| // CHECK10-NEXT: ret i32 [[TMP37]] | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1800,7 +1800,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1813,7 +1813,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139 | |
| +// CHECK10-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139 | |
| // CHECK10-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1836,7 +1836,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK10-LABEL: define internal void @.omp_outlined. | |
| // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1965,7 +1965,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK10-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2092,7 +2092,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2102,7 +2102,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK10-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2201,7 +2201,7 @@ int main() { | |
| // CHECK10-NEXT: ret i32 [[TMP32]] | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2212,7 +2212,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2226,7 +2226,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2235,7 +2235,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2245,7 +2245,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2258,7 +2258,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48 | |
| +// CHECK10-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48 | |
| // CHECK10-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -2279,7 +2279,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK10-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2398,7 +2398,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK10-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2523,7 +2523,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2533,7 +2533,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2544,7 +2544,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2558,7 +2558,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2567,7 +2567,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK10-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) | |
| diff --git a/clang/test/OpenMP/distribute_parallel_for_if_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_if_codegen.cpp | |
| index 9c2d7981ecfd..2f7f70f8711e 100644 | |
| --- a/clang/test/OpenMP/distribute_parallel_for_if_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_parallel_for_if_codegen.cpp | |
| @@ -120,7 +120,7 @@ int main() { | |
| // call void [[T_OUTLINE_FUN_3:@.+]]( | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv | |
| +// CHECK1-LABEL: define dso_local void @_Z9gtid_testv | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -180,14 +180,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47 | |
| // CHECK1-SAME: () #[[ATTR1:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -247,7 +247,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -317,14 +317,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52 | |
| // CHECK1-SAME: () #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..2) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -389,7 +389,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -460,7 +460,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef i32 @main | |
| // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -566,14 +566,14 @@ int main() { | |
| // CHECK1-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85 | |
| // CHECK1-SAME: () #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..4) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -633,7 +633,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..5 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -704,14 +704,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 | |
| // CHECK1-SAME: () #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..6) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -776,7 +776,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -847,7 +847,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 | |
| // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -856,7 +856,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..8 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -933,7 +933,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..9 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1004,7 +1004,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ | |
| +// CHECK1-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiEiT_ | |
| // CHECK1-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1108,14 +1108,14 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63 | |
| // CHECK1-SAME: () #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..10) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1175,7 +1175,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1246,14 +1246,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69 | |
| // CHECK1-SAME: () #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..12) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..12 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..12 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1318,7 +1318,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..13 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..13 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1389,7 +1389,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75 | |
| // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1398,7 +1398,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..14 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1475,7 +1475,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..15 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1546,7 +1546,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| diff --git a/clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp | |
| index cf06b30555d6..51f5e56b84bd 100644 | |
| --- a/clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp | |
| @@ -204,7 +204,7 @@ int main() { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -222,7 +222,7 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -240,7 +240,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -340,7 +340,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -462,14 +462,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main | |
| +// CHECK3-LABEL: define dso_local noundef i32 @main | |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -487,7 +487,7 @@ int main() { | |
| // CHECK3-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -516,7 +516,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK3-LABEL: define internal void @.omp_outlined. | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -614,7 +614,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -734,14 +734,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK3-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@main | |
| +// CHECK9-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -856,7 +856,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP37]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -866,7 +866,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -879,7 +879,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123 | |
| // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -902,7 +902,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK9-LABEL: define internal void @.omp_outlined. | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1043,7 +1043,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1200,7 +1200,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1210,7 +1210,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK9-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1309,7 +1309,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP32]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1320,7 +1320,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1334,7 +1334,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1343,7 +1343,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1353,7 +1353,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1366,7 +1366,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1387,7 +1387,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1522,7 +1522,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1673,7 +1673,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1683,7 +1683,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1694,7 +1694,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1708,7 +1708,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1717,14 +1717,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK9-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@main | |
| +// CHECK11-LABEL: define dso_local noundef i32 @main | |
| // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1839,7 +1839,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP37]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1849,7 +1849,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1862,7 +1862,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123 | |
| // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1885,7 +1885,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK11-LABEL: define internal void @.omp_outlined. | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2024,7 +2024,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2177,7 +2177,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2187,7 +2187,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK11-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2286,7 +2286,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP32]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2297,7 +2297,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2311,7 +2311,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2320,7 +2320,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2330,7 +2330,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2343,7 +2343,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -2364,7 +2364,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2497,7 +2497,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2644,7 +2644,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2654,7 +2654,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2665,7 +2665,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2679,7 +2679,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2688,7 +2688,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK11-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) | |
| diff --git a/clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp | |
| index 36be58ca78a9..1031d3e28028 100644 | |
| --- a/clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp | |
| @@ -93,7 +93,7 @@ int main() { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef i32 @main | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -207,7 +207,7 @@ int main() { | |
| // CHECK1-NEXT: resume { ptr, i32 } [[LPAD_VAL10]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1El | |
| +// CHECK1-LABEL: define linkonce_odr void @_ZN1SC1El | |
| // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -220,7 +220,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_ZN1ScvcEv | |
| +// CHECK1-LABEL: define linkonce_odr noundef signext i8 @_ZN1ScvcEv | |
| // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -233,14 +233,14 @@ int main() { | |
| // CHECK1-NEXT: ret i8 [[CONV]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -301,7 +301,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -380,14 +380,14 @@ int main() { | |
| // CHECK1-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@__clang_call_terminate | |
| +// CHECK1-LABEL: define linkonce_odr hidden void @__clang_call_terminate | |
| // CHECK1-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK1-NEXT: [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR6]] | |
| // CHECK1-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] | |
| // CHECK1-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 | |
| // CHECK1-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -396,7 +396,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -462,7 +462,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -541,7 +541,7 @@ int main() { | |
| // CHECK1-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv | |
| +// CHECK1-LABEL: define linkonce_odr noundef i32 @_Z5tmainIcLi5EEiv | |
| // CHECK1-SAME: () #[[ATTR7:[0-9]+]] comdat { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -601,7 +601,7 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv | |
| +// CHECK1-LABEL: define linkonce_odr noundef i32 @_Z5tmainI1SLi1EEiv | |
| // CHECK1-SAME: () #[[ATTR7]] comdat { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -661,7 +661,7 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_ZN1SD1Ev | |
| +// CHECK1-LABEL: define linkonce_odr void @_ZN1SD1Ev | |
| // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -671,7 +671,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2El | |
| +// CHECK1-LABEL: define linkonce_odr void @_ZN1SC2El | |
| // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -685,7 +685,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_ZN1SD2Ev | |
| +// CHECK1-LABEL: define linkonce_odr void @_ZN1SD2Ev | |
| // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -694,14 +694,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 | |
| // CHECK1-SAME: () #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..4) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -762,7 +762,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..5 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -841,14 +841,14 @@ int main() { | |
| // CHECK1-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 | |
| // CHECK1-SAME: () #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..6) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -909,7 +909,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -988,14 +988,14 @@ int main() { | |
| // CHECK1-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 | |
| // CHECK1-SAME: () #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..8) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..8 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1056,7 +1056,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..9 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1135,14 +1135,14 @@ int main() { | |
| // CHECK1-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 | |
| // CHECK1-SAME: () #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..10) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1218,7 +1218,7 @@ int main() { | |
| // CHECK1-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1297,14 +1297,14 @@ int main() { | |
| // CHECK1-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR9:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@main | |
| +// CHECK5-LABEL: define dso_local noundef i32 @main | |
| // CHECK5-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1418,7 +1418,7 @@ int main() { | |
| // CHECK5-NEXT: resume { ptr, i32 } [[LPAD_VAL10]] | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_ZN1SC1El | |
| +// CHECK5-LABEL: define linkonce_odr void @_ZN1SC1El | |
| // CHECK5-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1431,7 +1431,7 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_ZN1ScvcEv | |
| +// CHECK5-LABEL: define linkonce_odr noundef signext i8 @_ZN1ScvcEv | |
| // CHECK5-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1444,14 +1444,14 @@ int main() { | |
| // CHECK5-NEXT: ret i8 [[CONV]] | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK5-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK5-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK5-LABEL: define internal void @.omp_outlined. | |
| // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1512,7 +1512,7 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1591,14 +1591,14 @@ int main() { | |
| // CHECK5-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@__clang_call_terminate | |
| +// CHECK5-LABEL: define linkonce_odr hidden void @__clang_call_terminate | |
| // CHECK5-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK5-NEXT: [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR6]] | |
| // CHECK5-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] | |
| // CHECK5-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 | |
| +// CHECK5-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 | |
| // CHECK5-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1607,7 +1607,7 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1673,7 +1673,7 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1752,7 +1752,7 @@ int main() { | |
| // CHECK5-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv | |
| +// CHECK5-LABEL: define linkonce_odr noundef i32 @_Z5tmainIcLi5EEiv | |
| // CHECK5-SAME: () #[[ATTR7:[0-9]+]] comdat { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -1812,7 +1812,7 @@ int main() { | |
| // CHECK5-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv | |
| +// CHECK5-LABEL: define linkonce_odr noundef i32 @_Z5tmainI1SLi1EEiv | |
| // CHECK5-SAME: () #[[ATTR7]] comdat { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -1872,7 +1872,7 @@ int main() { | |
| // CHECK5-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_ZN1SD1Ev | |
| +// CHECK5-LABEL: define linkonce_odr void @_ZN1SD1Ev | |
| // CHECK5-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1882,7 +1882,7 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_ZN1SC2El | |
| +// CHECK5-LABEL: define linkonce_odr void @_ZN1SC2El | |
| // CHECK5-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1896,14 +1896,14 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 | |
| +// CHECK5-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 | |
| // CHECK5-SAME: () #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..4) | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1964,7 +1964,7 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..5 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..5 | |
| // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2043,14 +2043,14 @@ int main() { | |
| // CHECK5-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 | |
| +// CHECK5-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 | |
| // CHECK5-SAME: () #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..6) | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2111,7 +2111,7 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2190,14 +2190,14 @@ int main() { | |
| // CHECK5-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 | |
| +// CHECK5-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 | |
| // CHECK5-SAME: () #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..8) | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..8 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..8 | |
| // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2258,7 +2258,7 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..9 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..9 | |
| // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2337,14 +2337,14 @@ int main() { | |
| // CHECK5-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 | |
| +// CHECK5-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 | |
| // CHECK5-SAME: () #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..10) | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2420,7 +2420,7 @@ int main() { | |
| // CHECK5-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2499,7 +2499,7 @@ int main() { | |
| // CHECK5-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_ZN1SD2Ev | |
| +// CHECK5-LABEL: define linkonce_odr void @_ZN1SD2Ev | |
| // CHECK5-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2508,14 +2508,14 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK5-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK5-SAME: () #[[ATTR9:[0-9]+]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@main | |
| +// CHECK9-LABEL: define dso_local noundef i32 @main | |
| // CHECK9-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2629,7 +2629,7 @@ int main() { | |
| // CHECK9-NEXT: resume { ptr, i32 } [[LPAD_VAL10]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SC1El | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SC1El | |
| // CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2642,7 +2642,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1ScvcEv | |
| +// CHECK9-LABEL: define linkonce_odr noundef i8 @_ZN1ScvcEv | |
| // CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2655,14 +2655,14 @@ int main() { | |
| // CHECK9-NEXT: ret i8 [[CONV]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK9-LABEL: define internal void @.omp_outlined. | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2723,7 +2723,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2802,14 +2802,14 @@ int main() { | |
| // CHECK9-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@__clang_call_terminate | |
| +// CHECK9-LABEL: define linkonce_odr hidden void @__clang_call_terminate | |
| // CHECK9-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK9-NEXT: [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR6]] | |
| // CHECK9-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] | |
| // CHECK9-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 | |
| // CHECK9-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -2818,7 +2818,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2884,7 +2884,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2963,7 +2963,7 @@ int main() { | |
| // CHECK9-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv | |
| +// CHECK9-LABEL: define linkonce_odr noundef i32 @_Z5tmainIcLi5EEiv | |
| // CHECK9-SAME: () #[[ATTR7:[0-9]+]] comdat { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -3023,7 +3023,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv | |
| +// CHECK9-LABEL: define linkonce_odr noundef i32 @_Z5tmainI1SLi1EEiv | |
| // CHECK9-SAME: () #[[ATTR7]] comdat { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -3083,7 +3083,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SD1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SD1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3093,7 +3093,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SC2El | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SC2El | |
| // CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3107,7 +3107,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SD2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SD2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3116,14 +3116,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 | |
| // CHECK9-SAME: () #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..4) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3184,7 +3184,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..5 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3263,14 +3263,14 @@ int main() { | |
| // CHECK9-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 | |
| // CHECK9-SAME: () #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..6) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3331,7 +3331,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3410,14 +3410,14 @@ int main() { | |
| // CHECK9-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 | |
| // CHECK9-SAME: () #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..8) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..8 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..8 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3478,7 +3478,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..9 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..9 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3557,14 +3557,14 @@ int main() { | |
| // CHECK9-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 | |
| // CHECK9-SAME: () #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..10) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3640,7 +3640,7 @@ int main() { | |
| // CHECK9-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3719,14 +3719,14 @@ int main() { | |
| // CHECK9-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK9-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK9-SAME: () #[[ATTR9:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@main | |
| +// CHECK13-LABEL: define dso_local noundef i32 @main | |
| // CHECK13-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -3840,7 +3840,7 @@ int main() { | |
| // CHECK13-NEXT: resume { ptr, i32 } [[LPAD_VAL10]] | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SC1El | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SC1El | |
| // CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3853,7 +3853,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1ScvcEv | |
| +// CHECK13-LABEL: define linkonce_odr noundef i8 @_ZN1ScvcEv | |
| // CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3866,14 +3866,14 @@ int main() { | |
| // CHECK13-NEXT: ret i8 [[CONV]] | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK13-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK13-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK13-LABEL: define internal void @.omp_outlined. | |
| // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3934,7 +3934,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4013,14 +4013,14 @@ int main() { | |
| // CHECK13-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@__clang_call_terminate | |
| +// CHECK13-LABEL: define linkonce_odr hidden void @__clang_call_terminate | |
| // CHECK13-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK13-NEXT: [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR6]] | |
| // CHECK13-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] | |
| // CHECK13-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 | |
| +// CHECK13-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 | |
| // CHECK13-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -4029,7 +4029,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4095,7 +4095,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4174,7 +4174,7 @@ int main() { | |
| // CHECK13-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv | |
| +// CHECK13-LABEL: define linkonce_odr noundef i32 @_Z5tmainIcLi5EEiv | |
| // CHECK13-SAME: () #[[ATTR7:[0-9]+]] comdat { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -4234,7 +4234,7 @@ int main() { | |
| // CHECK13-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv | |
| +// CHECK13-LABEL: define linkonce_odr noundef i32 @_Z5tmainI1SLi1EEiv | |
| // CHECK13-SAME: () #[[ATTR7]] comdat { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -4294,7 +4294,7 @@ int main() { | |
| // CHECK13-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SD1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SD1Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4304,7 +4304,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SC2El | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SC2El | |
| // CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4318,14 +4318,14 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 | |
| +// CHECK13-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 | |
| // CHECK13-SAME: () #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..4) | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4386,7 +4386,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..5 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..5 | |
| // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4465,14 +4465,14 @@ int main() { | |
| // CHECK13-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 | |
| +// CHECK13-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 | |
| // CHECK13-SAME: () #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..6) | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4533,7 +4533,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4612,14 +4612,14 @@ int main() { | |
| // CHECK13-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 | |
| +// CHECK13-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 | |
| // CHECK13-SAME: () #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..8) | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..8 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..8 | |
| // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4680,7 +4680,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..9 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..9 | |
| // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4759,14 +4759,14 @@ int main() { | |
| // CHECK13-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 | |
| +// CHECK13-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 | |
| // CHECK13-SAME: () #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..10) | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4842,7 +4842,7 @@ int main() { | |
| // CHECK13-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4921,7 +4921,7 @@ int main() { | |
| // CHECK13-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SD2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SD2Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4930,7 +4930,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK13-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK13-SAME: () #[[ATTR9:[0-9]+]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: call void @__tgt_register_requires(i64 1) | |
| diff --git a/clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp | |
| index bc5a84ae88dc..355fea3a7f58 100644 | |
| --- a/clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp | |
| @@ -135,7 +135,7 @@ int main() { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -148,14 +148,14 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK1-SAME: () #[[ATTR2:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 0, ptr @.omp_outlined.) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -223,7 +223,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -317,14 +317,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main | |
| +// CHECK3-LABEL: define dso_local noundef i32 @main | |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -337,14 +337,14 @@ int main() { | |
| // CHECK3-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK3-SAME: () #[[ATTR2:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 0, ptr @.omp_outlined.) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK3-LABEL: define internal void @.omp_outlined. | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -410,7 +410,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -502,14 +502,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK3-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@main | |
| +// CHECK9-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -576,7 +576,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP12]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -586,7 +586,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -599,14 +599,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 | |
| // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK9-LABEL: define internal void @.omp_outlined. | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -701,7 +701,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -816,7 +816,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -826,7 +826,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK9-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -888,7 +888,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP12]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -899,7 +899,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -913,7 +913,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -922,7 +922,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -932,7 +932,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -945,14 +945,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK9-SAME: () #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..2) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1046,7 +1046,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1160,7 +1160,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1170,7 +1170,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1181,7 +1181,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1195,7 +1195,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1204,14 +1204,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK9-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@main | |
| +// CHECK11-LABEL: define dso_local noundef i32 @main | |
| // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1278,7 +1278,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP12]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1288,7 +1288,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1301,14 +1301,14 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 | |
| // CHECK11-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK11-LABEL: define internal void @.omp_outlined. | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1401,7 +1401,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1512,7 +1512,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1522,7 +1522,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK11-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1584,7 +1584,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP12]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1595,7 +1595,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1609,7 +1609,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1618,7 +1618,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1628,7 +1628,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1641,14 +1641,14 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK11-SAME: () #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..2) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1740,7 +1740,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1850,7 +1850,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1860,7 +1860,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1871,7 +1871,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1885,7 +1885,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1894,7 +1894,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK11-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) | |
| diff --git a/clang/test/OpenMP/distribute_parallel_for_proc_bind_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_proc_bind_codegen.cpp | |
| index 5935879968be..4c3f774b1f6a 100644 | |
| --- a/clang/test/OpenMP/distribute_parallel_for_proc_bind_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_parallel_for_proc_bind_codegen.cpp | |
| @@ -53,7 +53,7 @@ int main() { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -116,14 +116,14 @@ int main() { | |
| // CHECK1-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37 | |
| // CHECK1-SAME: () #[[ATTR1:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -184,7 +184,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -254,14 +254,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41 | |
| // CHECK1-SAME: () #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..2) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -322,7 +322,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -392,7 +392,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK1-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK1-SAME: () #[[ATTR3:[0-9]+]] comdat { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -425,14 +425,14 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29 | |
| // CHECK1-SAME: () #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..4) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -493,7 +493,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..5 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -563,7 +563,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| diff --git a/clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp | |
| index ab4795b61f32..7e07737a86bb 100644 | |
| --- a/clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp | |
| @@ -36,7 +36,7 @@ int main(int argc, char **argv) { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef i32 @main | |
| // CHECK1-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -52,7 +52,7 @@ int main(int argc, char **argv) { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14 | |
| // CHECK1-SAME: (i64 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -68,7 +68,7 @@ int main(int argc, char **argv) { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -131,7 +131,7 @@ int main(int argc, char **argv) { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -412,7 +412,7 @@ int main(int argc, char **argv) { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.red_init. | |
| +// CHECK1-LABEL: define internal void @.red_init. | |
| // CHECK1-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 | |
| @@ -424,7 +424,7 @@ int main(int argc, char **argv) { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.red_comb. | |
| +// CHECK1-LABEL: define internal void @.red_comb. | |
| // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 | |
| @@ -440,7 +440,7 @@ int main(int argc, char **argv) { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.red_init..2 | |
| +// CHECK1-LABEL: define internal void @.red_init..2 | |
| // CHECK1-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 | |
| @@ -463,7 +463,7 @@ int main(int argc, char **argv) { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.red_comb..3 | |
| +// CHECK1-LABEL: define internal void @.red_comb..3 | |
| // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 | |
| @@ -495,7 +495,7 @@ int main(int argc, char **argv) { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_task_privates_map. | |
| +// CHECK1-LABEL: define internal void @.omp_task_privates_map. | |
| // CHECK1-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 | |
| @@ -509,7 +509,7 @@ int main(int argc, char **argv) { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry. | |
| +// CHECK1-LABEL: define internal noundef i32 @.omp_task_entry. | |
| // CHECK1-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 | |
| @@ -587,7 +587,7 @@ int main(int argc, char **argv) { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func | |
| +// CHECK1-LABEL: define internal void @.omp.reduction.reduction_func | |
| // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 | |
| diff --git a/clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp | |
| index cb9a0e12f9c9..697ce91929e9 100644 | |
| --- a/clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp | |
| @@ -767,7 +767,7 @@ int main() { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -794,7 +794,7 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116 | |
| // CHECK1-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -809,7 +809,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -915,7 +915,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1057,7 +1057,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159 | |
| // CHECK1-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1072,7 +1072,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1178,7 +1178,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1320,7 +1320,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l201 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l201 | |
| // CHECK1-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1337,7 +1337,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1471,7 +1471,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1613,7 +1613,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l234 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l234 | |
| // CHECK1-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1628,7 +1628,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1734,7 +1734,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1876,7 +1876,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l266 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l266 | |
| // CHECK1-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1893,7 +1893,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..14 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2009,7 +2009,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..15 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2173,7 +2173,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l299 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l299 | |
| // CHECK1-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -2188,7 +2188,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..18 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..18 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2294,7 +2294,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..19 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..19 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2432,7 +2432,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l328 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l328 | |
| // CHECK1-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -2449,7 +2449,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..22 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..22 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2565,7 +2565,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..23 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..23 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2706,14 +2706,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main | |
| +// CHECK3-LABEL: define dso_local noundef i32 @main | |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2740,7 +2740,7 @@ int main() { | |
| // CHECK3-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116 | |
| // CHECK3-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -2755,7 +2755,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK3-LABEL: define internal void @.omp_outlined. | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2859,7 +2859,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2996,7 +2996,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159 | |
| // CHECK3-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -3011,7 +3011,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3115,7 +3115,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3252,7 +3252,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l201 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l201 | |
| // CHECK3-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -3269,7 +3269,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3401,7 +3401,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3538,7 +3538,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l234 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l234 | |
| // CHECK3-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -3553,7 +3553,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3657,7 +3657,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3794,7 +3794,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l266 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l266 | |
| // CHECK3-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -3811,7 +3811,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..14 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3925,7 +3925,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..15 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -4082,7 +4082,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l299 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l299 | |
| // CHECK3-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -4097,7 +4097,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..18 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..18 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -4201,7 +4201,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..19 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..19 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -4334,7 +4334,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l328 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l328 | |
| // CHECK3-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -4351,7 +4351,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..22 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..22 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -4465,7 +4465,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..23 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..23 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -4601,14 +4601,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK3-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@main | |
| +// CHECK5-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -4635,7 +4635,7 @@ int main() { | |
| // CHECK5-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@main | |
| +// CHECK7-LABEL: define dso_local noundef i32 @main | |
| // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -4662,7 +4662,7 @@ int main() { | |
| // CHECK7-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@main | |
| +// CHECK9-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -5233,7 +5233,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368 | |
| // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -5248,7 +5248,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK9-LABEL: define internal void @.omp_outlined. | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5354,7 +5354,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5486,7 +5486,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407 | |
| // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -5501,7 +5501,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5607,7 +5607,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5739,7 +5739,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446 | |
| // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -5756,7 +5756,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5890,7 +5890,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6022,7 +6022,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477 | |
| // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -6037,7 +6037,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6143,7 +6143,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6275,7 +6275,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505 | |
| // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -6292,7 +6292,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..14 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..14 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6408,7 +6408,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..15 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..15 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6562,7 +6562,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535 | |
| // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -6577,7 +6577,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..18 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..18 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6683,7 +6683,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..19 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..19 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6811,7 +6811,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561 | |
| // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -6828,7 +6828,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..22 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..22 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6944,7 +6944,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..23 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..23 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -7075,7 +7075,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK9-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK9-SAME: () #[[ATTR3:[0-9]+]] comdat { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[A:%.*]] = alloca ptr, align 8 | |
| @@ -7643,7 +7643,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42 | |
| // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -7658,7 +7658,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..26 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..26 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -7764,7 +7764,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..27 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..27 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -7896,7 +7896,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50 | |
| // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -7911,7 +7911,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..30 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..30 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -8017,7 +8017,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..31 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..31 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -8149,7 +8149,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58 | |
| // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -8166,7 +8166,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..34 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..34 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -8300,7 +8300,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..35 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..35 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -8432,7 +8432,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66 | |
| // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -8447,7 +8447,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..38 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..38 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -8553,7 +8553,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..39 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..39 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -8685,7 +8685,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74 | |
| // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -8702,7 +8702,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..42 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..42 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -8818,7 +8818,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..43 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..43 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -8972,7 +8972,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82 | |
| // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -8987,7 +8987,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..46 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..46 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -9093,7 +9093,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..47 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..47 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -9221,7 +9221,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90 | |
| // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -9238,7 +9238,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..50 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..50 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -9354,7 +9354,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..51 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..51 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -9485,14 +9485,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK9-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK9-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@main | |
| +// CHECK11-LABEL: define dso_local noundef i32 @main | |
| // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -10063,7 +10063,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368 | |
| // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -10078,7 +10078,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK11-LABEL: define internal void @.omp_outlined. | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -10182,7 +10182,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -10309,7 +10309,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407 | |
| // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -10324,7 +10324,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -10428,7 +10428,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -10555,7 +10555,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446 | |
| // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -10572,7 +10572,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -10704,7 +10704,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -10831,7 +10831,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477 | |
| // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -10846,7 +10846,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -10950,7 +10950,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -11077,7 +11077,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505 | |
| // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -11094,7 +11094,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..14 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..14 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -11208,7 +11208,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..15 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..15 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -11355,7 +11355,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535 | |
| // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -11370,7 +11370,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..18 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..18 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -11474,7 +11474,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..19 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..19 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -11597,7 +11597,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561 | |
| // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -11614,7 +11614,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..22 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..22 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -11728,7 +11728,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..23 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..23 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -11854,7 +11854,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK11-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK11-SAME: () #[[ATTR3:[0-9]+]] comdat { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[A:%.*]] = alloca ptr, align 4 | |
| @@ -12422,7 +12422,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42 | |
| // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -12437,7 +12437,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..26 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..26 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -12541,7 +12541,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..27 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..27 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -12668,7 +12668,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50 | |
| // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -12683,7 +12683,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..30 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..30 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -12787,7 +12787,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..31 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..31 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -12914,7 +12914,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58 | |
| // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -12931,7 +12931,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..34 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..34 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -13063,7 +13063,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..35 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..35 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -13190,7 +13190,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66 | |
| // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -13205,7 +13205,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..38 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..38 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -13309,7 +13309,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..39 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..39 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -13436,7 +13436,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74 | |
| // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -13453,7 +13453,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..42 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..42 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -13567,7 +13567,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..43 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..43 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -13714,7 +13714,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82 | |
| // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -13729,7 +13729,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..46 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..46 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -13833,7 +13833,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..47 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..47 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -13956,7 +13956,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90 | |
| // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -13973,7 +13973,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..50 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..50 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -14087,7 +14087,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..51 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..51 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -14213,14 +14213,14 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK11-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK11-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@main | |
| +// CHECK13-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -14725,7 +14725,7 @@ int main() { | |
| // CHECK13-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK13-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK13-SAME: () #[[ATTR1:[0-9]+]] comdat { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[A:%.*]] = alloca ptr, align 8 | |
| @@ -15227,7 +15227,7 @@ int main() { | |
| // CHECK13-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@main | |
| +// CHECK15-LABEL: define dso_local noundef i32 @main | |
| // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -15711,7 +15711,7 @@ int main() { | |
| // CHECK15-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK15-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK15-SAME: () #[[ATTR1:[0-9]+]] comdat { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[A:%.*]] = alloca ptr, align 4 | |
| diff --git a/clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp | |
| index 92c420853267..d9037112f4ae 100644 | |
| --- a/clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp | |
| @@ -262,7 +262,7 @@ int main() { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -280,7 +280,7 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 | |
| // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -298,7 +298,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -414,7 +414,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -517,14 +517,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main | |
| +// CHECK3-LABEL: define dso_local noundef i32 @main | |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -542,7 +542,7 @@ int main() { | |
| // CHECK3-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 | |
| // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -571,7 +571,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK3-LABEL: define internal void @.omp_outlined. | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -681,7 +681,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], i32 noundef [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -786,14 +786,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK3-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@main | |
| +// CHECK5-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -811,7 +811,7 @@ int main() { | |
| // CHECK5-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK6-LABEL: define {{[^@]+}}@main | |
| +// CHECK6-LABEL: define dso_local noundef i32 @main | |
| // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK6-NEXT: entry: | |
| // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -829,7 +829,7 @@ int main() { | |
| // CHECK6-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@main | |
| +// CHECK8-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -943,7 +943,7 @@ int main() { | |
| // CHECK8-NEXT: ret i32 [[TMP37]] | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -953,7 +953,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -966,7 +966,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138 | |
| +// CHECK8-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138 | |
| // CHECK8-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -989,7 +989,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK8-LABEL: define internal void @.omp_outlined. | |
| // CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1127,7 +1127,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK8-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1265,7 +1265,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1275,7 +1275,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK8-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK8-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1374,7 +1374,7 @@ int main() { | |
| // CHECK8-NEXT: ret i32 [[TMP32]] | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1385,7 +1385,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1399,7 +1399,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1408,7 +1408,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1418,7 +1418,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1431,7 +1431,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48 | |
| +// CHECK8-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48 | |
| // CHECK8-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1452,7 +1452,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK8-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1580,7 +1580,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK8-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1716,7 +1716,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1726,7 +1726,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1737,7 +1737,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1751,7 +1751,7 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK8-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1760,14 +1760,14 @@ int main() { | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK8-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK8-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK8-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK8-NEXT: entry: | |
| // CHECK8-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK8-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@main | |
| +// CHECK10-LABEL: define dso_local noundef i32 @main | |
| // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1881,7 +1881,7 @@ int main() { | |
| // CHECK10-NEXT: ret i32 [[TMP37]] | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1891,7 +1891,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1904,7 +1904,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138 | |
| +// CHECK10-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l138 | |
| // CHECK10-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1927,7 +1927,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK10-LABEL: define internal void @.omp_outlined. | |
| // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2063,7 +2063,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK10-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2197,7 +2197,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2207,7 +2207,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK10-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2306,7 +2306,7 @@ int main() { | |
| // CHECK10-NEXT: ret i32 [[TMP32]] | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2317,7 +2317,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2331,7 +2331,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2340,7 +2340,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2350,7 +2350,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2363,7 +2363,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48 | |
| +// CHECK10-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48 | |
| // CHECK10-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -2384,7 +2384,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK10-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2510,7 +2510,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK10-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2642,7 +2642,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2652,7 +2652,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2663,7 +2663,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2677,7 +2677,7 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK10-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2686,14 +2686,14 @@ int main() { | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK10-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK10-NEXT: entry: | |
| // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK10-NEXT: ret void | |
| // | |
| // | |
| -// CHECK12-LABEL: define {{[^@]+}}@main | |
| +// CHECK12-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK12-NEXT: entry: | |
| // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2781,7 +2781,7 @@ int main() { | |
| // CHECK12-NEXT: ret i32 [[TMP14]] | |
| // | |
| // | |
| -// CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK12-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK12-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK12-NEXT: entry: | |
| // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2791,7 +2791,7 @@ int main() { | |
| // CHECK12-NEXT: ret void | |
| // | |
| // | |
| -// CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK12-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK12-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK12-NEXT: entry: | |
| // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2804,7 +2804,7 @@ int main() { | |
| // CHECK12-NEXT: ret void | |
| // | |
| // | |
| -// CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK12-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK12-SAME: () #[[ATTR3:[0-9]+]] comdat { | |
| // CHECK12-NEXT: entry: | |
| // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2887,7 +2887,7 @@ int main() { | |
| // CHECK12-NEXT: ret i32 [[TMP14]] | |
| // | |
| // | |
| -// CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK12-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK12-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK12-NEXT: entry: | |
| // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2897,7 +2897,7 @@ int main() { | |
| // CHECK12-NEXT: ret void | |
| // | |
| // | |
| -// CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK12-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK12-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK12-NEXT: entry: | |
| // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2908,7 +2908,7 @@ int main() { | |
| // CHECK12-NEXT: ret void | |
| // | |
| // | |
| -// CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK12-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK12-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK12-NEXT: entry: | |
| // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2917,7 +2917,7 @@ int main() { | |
| // CHECK12-NEXT: ret void | |
| // | |
| // | |
| -// CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK12-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK12-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK12-NEXT: entry: | |
| // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2931,7 +2931,7 @@ int main() { | |
| // CHECK12-NEXT: ret void | |
| // | |
| // | |
| -// CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK12-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK12-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK12-NEXT: entry: | |
| // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2941,7 +2941,7 @@ int main() { | |
| // CHECK12-NEXT: ret void | |
| // | |
| // | |
| -// CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK12-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK12-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK12-NEXT: entry: | |
| // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2954,7 +2954,7 @@ int main() { | |
| // CHECK12-NEXT: ret void | |
| // | |
| // | |
| -// CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK12-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK12-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK12-NEXT: entry: | |
| // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2964,7 +2964,7 @@ int main() { | |
| // CHECK12-NEXT: ret void | |
| // | |
| // | |
| -// CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK12-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK12-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK12-NEXT: entry: | |
| // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2975,7 +2975,7 @@ int main() { | |
| // CHECK12-NEXT: ret void | |
| // | |
| // | |
| -// CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK12-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK12-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK12-NEXT: entry: | |
| // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2989,7 +2989,7 @@ int main() { | |
| // CHECK12-NEXT: ret void | |
| // | |
| // | |
| -// CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK12-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK12-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK12-NEXT: entry: | |
| // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2998,7 +2998,7 @@ int main() { | |
| // CHECK12-NEXT: ret void | |
| // | |
| // | |
| -// CHECK14-LABEL: define {{[^@]+}}@main | |
| +// CHECK14-LABEL: define dso_local noundef i32 @main | |
| // CHECK14-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK14-NEXT: entry: | |
| // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -3084,7 +3084,7 @@ int main() { | |
| // CHECK14-NEXT: ret i32 [[TMP14]] | |
| // | |
| // | |
| -// CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK14-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK14-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK14-NEXT: entry: | |
| // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3094,7 +3094,7 @@ int main() { | |
| // CHECK14-NEXT: ret void | |
| // | |
| // | |
| -// CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK14-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK14-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK14-NEXT: entry: | |
| // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3107,7 +3107,7 @@ int main() { | |
| // CHECK14-NEXT: ret void | |
| // | |
| // | |
| -// CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK14-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK14-SAME: () #[[ATTR3:[0-9]+]] comdat { | |
| // CHECK14-NEXT: entry: | |
| // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -3188,7 +3188,7 @@ int main() { | |
| // CHECK14-NEXT: ret i32 [[TMP14]] | |
| // | |
| // | |
| -// CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK14-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK14-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK14-NEXT: entry: | |
| // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3198,7 +3198,7 @@ int main() { | |
| // CHECK14-NEXT: ret void | |
| // | |
| // | |
| -// CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK14-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK14-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK14-NEXT: entry: | |
| // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3209,7 +3209,7 @@ int main() { | |
| // CHECK14-NEXT: ret void | |
| // | |
| // | |
| -// CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK14-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK14-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK14-NEXT: entry: | |
| // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3218,7 +3218,7 @@ int main() { | |
| // CHECK14-NEXT: ret void | |
| // | |
| // | |
| -// CHECK14-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK14-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK14-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK14-NEXT: entry: | |
| // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3232,7 +3232,7 @@ int main() { | |
| // CHECK14-NEXT: ret void | |
| // | |
| // | |
| -// CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK14-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK14-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK14-NEXT: entry: | |
| // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3242,7 +3242,7 @@ int main() { | |
| // CHECK14-NEXT: ret void | |
| // | |
| // | |
| -// CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK14-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK14-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK14-NEXT: entry: | |
| // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3255,7 +3255,7 @@ int main() { | |
| // CHECK14-NEXT: ret void | |
| // | |
| // | |
| -// CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK14-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK14-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK14-NEXT: entry: | |
| // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3265,7 +3265,7 @@ int main() { | |
| // CHECK14-NEXT: ret void | |
| // | |
| // | |
| -// CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK14-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK14-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK14-NEXT: entry: | |
| // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3276,7 +3276,7 @@ int main() { | |
| // CHECK14-NEXT: ret void | |
| // | |
| // | |
| -// CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK14-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK14-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK14-NEXT: entry: | |
| // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3290,7 +3290,7 @@ int main() { | |
| // CHECK14-NEXT: ret void | |
| // | |
| // | |
| -// CHECK14-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK14-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK14-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK14-NEXT: entry: | |
| // CHECK14-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| diff --git a/clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp | |
| index 3d8bc48ccc66..006d5a4c33e9 100644 | |
| --- a/clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp | |
| @@ -117,7 +117,7 @@ int main() { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv | |
| +// CHECK1-LABEL: define dso_local void @_Z9gtid_testv | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -177,14 +177,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43 | |
| // CHECK1-SAME: () #[[ATTR1:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -251,7 +251,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -328,14 +328,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48 | |
| // CHECK1-SAME: () #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..2) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -407,7 +407,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -485,7 +485,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef i32 @main | |
| // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -591,14 +591,14 @@ int main() { | |
| // CHECK1-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81 | |
| // CHECK1-SAME: () #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..4) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -665,7 +665,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..5 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -743,14 +743,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90 | |
| // CHECK1-SAME: () #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..6) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -822,7 +822,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -900,7 +900,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99 | |
| // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -909,7 +909,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..8 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -993,7 +993,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..9 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1071,7 +1071,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ | |
| +// CHECK1-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiEiT_ | |
| // CHECK1-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1175,14 +1175,14 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59 | |
| // CHECK1-SAME: () #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..10) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1249,7 +1249,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1327,14 +1327,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65 | |
| // CHECK1-SAME: () #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..12) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..12 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..12 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1406,7 +1406,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..13 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..13 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1484,7 +1484,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71 | |
| // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1493,7 +1493,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..14 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1577,7 +1577,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..15 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1655,14 +1655,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_Z9gtid_testv | |
| +// CHECK3-LABEL: define dso_local void @_Z9gtid_testv | |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -1722,14 +1722,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43 | |
| // CHECK3-SAME: () #[[ATTR1:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK3-LABEL: define internal void @.omp_outlined. | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1796,7 +1796,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1873,14 +1873,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48 | |
| // CHECK3-SAME: () #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..2) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1952,7 +1952,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2030,7 +2030,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main | |
| +// CHECK3-LABEL: define dso_local noundef i32 @main | |
| // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2136,14 +2136,14 @@ int main() { | |
| // CHECK3-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81 | |
| // CHECK3-SAME: () #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..4) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2210,7 +2210,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..5 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..5 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2288,14 +2288,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90 | |
| // CHECK3-SAME: () #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..6) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2367,7 +2367,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2445,7 +2445,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99 | |
| // CHECK3-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -2454,7 +2454,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..8 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..8 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2597,7 +2597,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..9 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..9 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2724,7 +2724,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2851,7 +2851,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ | |
| +// CHECK3-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiEiT_ | |
| // CHECK3-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -2955,14 +2955,14 @@ int main() { | |
| // CHECK3-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59 | |
| // CHECK3-SAME: () #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..11) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3029,7 +3029,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..12 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..12 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3107,14 +3107,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65 | |
| // CHECK3-SAME: () #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..13) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..13 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..13 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3186,7 +3186,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..14 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3264,7 +3264,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71 | |
| // CHECK3-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -3273,7 +3273,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..15 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3357,7 +3357,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..16 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..16 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3435,14 +3435,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK3-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK3-SAME: () #[[ATTR5:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_Z9gtid_testv | |
| +// CHECK5-LABEL: define dso_local void @_Z9gtid_testv | |
| // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -3509,7 +3509,7 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@main | |
| +// CHECK5-LABEL: define dso_local noundef i32 @main | |
| // CHECK5-SAME: () #[[ATTR1:[0-9]+]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -3612,7 +3612,7 @@ int main() { | |
| // CHECK5-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ | |
| +// CHECK5-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiEiT_ | |
| // CHECK5-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -3713,7 +3713,7 @@ int main() { | |
| // CHECK5-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@_Z9gtid_testv | |
| +// CHECK7-LABEL: define dso_local void @_Z9gtid_testv | |
| // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -3780,7 +3780,7 @@ int main() { | |
| // CHECK7-NEXT: ret void | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@main | |
| +// CHECK7-LABEL: define dso_local noundef i32 @main | |
| // CHECK7-SAME: () #[[ATTR1:[0-9]+]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -3917,7 +3917,7 @@ int main() { | |
| // CHECK7-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ | |
| +// CHECK7-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiEiT_ | |
| // CHECK7-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -4018,7 +4018,7 @@ int main() { | |
| // CHECK7-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z9gtid_testv | |
| +// CHECK9-LABEL: define dso_local void @_Z9gtid_testv | |
| // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -4078,14 +4078,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43 | |
| // CHECK9-SAME: () #[[ATTR1:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK9-LABEL: define internal void @.omp_outlined. | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4152,7 +4152,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4229,14 +4229,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48 | |
| // CHECK9-SAME: () #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..2) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4308,7 +4308,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4386,7 +4386,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@main | |
| +// CHECK9-LABEL: define dso_local noundef i32 @main | |
| // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -4492,14 +4492,14 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81 | |
| // CHECK9-SAME: () #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..4) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4566,7 +4566,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..5 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4644,14 +4644,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90 | |
| // CHECK9-SAME: () #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..6) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4723,7 +4723,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4801,7 +4801,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99 | |
| // CHECK9-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -4810,7 +4810,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..8 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..8 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4894,7 +4894,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..9 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..9 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4972,7 +4972,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ | |
| +// CHECK9-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiEiT_ | |
| // CHECK9-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -5076,14 +5076,14 @@ int main() { | |
| // CHECK9-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59 | |
| // CHECK9-SAME: () #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..10) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5150,7 +5150,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5228,14 +5228,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65 | |
| // CHECK9-SAME: () #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..12) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..12 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..12 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5307,7 +5307,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..13 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5385,7 +5385,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71 | |
| // CHECK9-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -5394,7 +5394,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..14 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..14 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5478,7 +5478,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..15 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..15 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5556,14 +5556,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK9-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK9-SAME: () #[[ATTR5:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z9gtid_testv | |
| +// CHECK11-LABEL: define dso_local void @_Z9gtid_testv | |
| // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -5623,14 +5623,14 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43 | |
| // CHECK11-SAME: () #[[ATTR1:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK11-LABEL: define internal void @.omp_outlined. | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5697,7 +5697,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5774,14 +5774,14 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48 | |
| // CHECK11-SAME: () #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..2) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5853,7 +5853,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5931,7 +5931,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@main | |
| +// CHECK11-LABEL: define dso_local noundef i32 @main | |
| // CHECK11-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -6037,14 +6037,14 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81 | |
| // CHECK11-SAME: () #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..4) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6111,7 +6111,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..5 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..5 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6189,14 +6189,14 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90 | |
| // CHECK11-SAME: () #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..6) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6268,7 +6268,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6346,7 +6346,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99 | |
| // CHECK11-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -6355,7 +6355,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..8 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..8 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6498,7 +6498,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..9 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..9 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6625,7 +6625,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6752,7 +6752,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ | |
| +// CHECK11-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiEiT_ | |
| // CHECK11-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -6856,14 +6856,14 @@ int main() { | |
| // CHECK11-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59 | |
| // CHECK11-SAME: () #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..11) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6930,7 +6930,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..12 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..12 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -7008,14 +7008,14 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65 | |
| // CHECK11-SAME: () #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..13) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..13 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..13 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -7087,7 +7087,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..14 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..14 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -7165,7 +7165,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71 | |
| // CHECK11-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -7174,7 +7174,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..15 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..15 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -7258,7 +7258,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..16 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..16 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -7336,14 +7336,14 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK11-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK11-SAME: () #[[ATTR5:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_Z9gtid_testv | |
| +// CHECK13-LABEL: define dso_local void @_Z9gtid_testv | |
| // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -7410,7 +7410,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@main | |
| +// CHECK13-LABEL: define dso_local noundef i32 @main | |
| // CHECK13-SAME: () #[[ATTR1:[0-9]+]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -7513,7 +7513,7 @@ int main() { | |
| // CHECK13-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ | |
| +// CHECK13-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiEiT_ | |
| // CHECK13-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -7614,7 +7614,7 @@ int main() { | |
| // CHECK13-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_Z9gtid_testv | |
| +// CHECK15-LABEL: define dso_local void @_Z9gtid_testv | |
| // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -7681,7 +7681,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@main | |
| +// CHECK15-LABEL: define dso_local noundef i32 @main | |
| // CHECK15-SAME: () #[[ATTR1:[0-9]+]] { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -7818,7 +7818,7 @@ int main() { | |
| // CHECK15-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ | |
| +// CHECK15-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiEiT_ | |
| // CHECK15-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 | |
| diff --git a/clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp | |
| index ddfb333c6327..865767a16b90 100644 | |
| --- a/clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp | |
| @@ -207,7 +207,7 @@ int main() { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -225,7 +225,7 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -243,7 +243,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -350,7 +350,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -479,14 +479,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main | |
| +// CHECK3-LABEL: define dso_local noundef i32 @main | |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -504,7 +504,7 @@ int main() { | |
| // CHECK3-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -533,7 +533,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK3-LABEL: define internal void @.omp_outlined. | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -638,7 +638,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -765,14 +765,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK3-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@main | |
| +// CHECK5-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -790,7 +790,7 @@ int main() { | |
| // CHECK5-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@main | |
| +// CHECK7-LABEL: define dso_local noundef i32 @main | |
| // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -808,7 +808,7 @@ int main() { | |
| // CHECK7-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@main | |
| +// CHECK9-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -923,7 +923,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP37]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -933,7 +933,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -946,7 +946,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125 | |
| // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -969,7 +969,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK9-LABEL: define internal void @.omp_outlined. | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1117,7 +1117,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1281,7 +1281,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1291,7 +1291,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK9-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1390,7 +1390,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP32]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1401,7 +1401,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1415,7 +1415,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1424,7 +1424,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1434,7 +1434,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1447,7 +1447,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1468,7 +1468,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1610,7 +1610,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1768,7 +1768,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1778,7 +1778,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1789,7 +1789,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1803,7 +1803,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1812,14 +1812,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK9-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@main | |
| +// CHECK11-LABEL: define dso_local noundef i32 @main | |
| // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1934,7 +1934,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP37]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1944,7 +1944,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1957,7 +1957,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125 | |
| // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1980,7 +1980,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK11-LABEL: define internal void @.omp_outlined. | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2126,7 +2126,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2286,7 +2286,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2296,7 +2296,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK11-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2395,7 +2395,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP32]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2406,7 +2406,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2420,7 +2420,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2429,7 +2429,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2439,7 +2439,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2452,7 +2452,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -2473,7 +2473,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2613,7 +2613,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2767,7 +2767,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2777,7 +2777,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2788,7 +2788,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2802,7 +2802,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2811,14 +2811,14 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK11-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@main | |
| +// CHECK13-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2959,7 +2959,7 @@ int main() { | |
| // CHECK13-NEXT: ret i32 [[TMP20]] | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2969,7 +2969,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2982,7 +2982,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2992,7 +2992,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK13-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -3124,7 +3124,7 @@ int main() { | |
| // CHECK13-NEXT: ret i32 [[TMP19]] | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3135,7 +3135,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3144,7 +3144,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3158,7 +3158,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3168,7 +3168,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3181,7 +3181,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3191,7 +3191,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3202,7 +3202,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3216,7 +3216,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3225,7 +3225,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@main | |
| +// CHECK15-LABEL: define dso_local noundef i32 @main | |
| // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -3364,7 +3364,7 @@ int main() { | |
| // CHECK15-NEXT: ret i32 [[TMP20]] | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3374,7 +3374,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3387,7 +3387,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3397,7 +3397,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK15-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -3527,7 +3527,7 @@ int main() { | |
| // CHECK15-NEXT: ret i32 [[TMP19]] | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3538,7 +3538,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3547,7 +3547,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3561,7 +3561,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3571,7 +3571,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3584,7 +3584,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3594,7 +3594,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3605,7 +3605,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3619,7 +3619,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| diff --git a/clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp | |
| index a00ad0bf04f7..75ca969da2cc 100644 | |
| --- a/clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp | |
| @@ -93,7 +93,7 @@ int main() { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local i32 @main | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -207,7 +207,7 @@ int main() { | |
| // CHECK1-NEXT: resume { ptr, i32 } [[LPAD_VAL10]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1El | |
| +// CHECK1-LABEL: define linkonce_odr void @_ZN1SC1El | |
| // CHECK1-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -220,7 +220,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_ZN1ScvcEv | |
| +// CHECK1-LABEL: define linkonce_odr signext i8 @_ZN1ScvcEv | |
| // CHECK1-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -233,14 +233,14 @@ int main() { | |
| // CHECK1-NEXT: ret i8 [[CONV]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -308,7 +308,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -394,14 +394,14 @@ int main() { | |
| // CHECK1-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@__clang_call_terminate | |
| +// CHECK1-LABEL: define linkonce_odr hidden void @__clang_call_terminate | |
| // CHECK1-SAME: (ptr [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK1-NEXT: [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR6]] | |
| // CHECK1-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] | |
| // CHECK1-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 | |
| // CHECK1-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -410,7 +410,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -483,7 +483,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -569,7 +569,7 @@ int main() { | |
| // CHECK1-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv | |
| +// CHECK1-LABEL: define linkonce_odr i32 @_Z5tmainIcLi5EEiv | |
| // CHECK1-SAME: () #[[ATTR7:[0-9]+]] comdat { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -629,7 +629,7 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv | |
| +// CHECK1-LABEL: define linkonce_odr i32 @_Z5tmainI1SLi1EEiv | |
| // CHECK1-SAME: () #[[ATTR7]] comdat { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -689,7 +689,7 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_ZN1SD1Ev | |
| +// CHECK1-LABEL: define linkonce_odr void @_ZN1SD1Ev | |
| // CHECK1-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -699,7 +699,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2El | |
| +// CHECK1-LABEL: define linkonce_odr void @_ZN1SC2El | |
| // CHECK1-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -713,7 +713,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_ZN1SD2Ev | |
| +// CHECK1-LABEL: define linkonce_odr void @_ZN1SD2Ev | |
| // CHECK1-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -722,14 +722,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 | |
| // CHECK1-SAME: () #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..4) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -797,7 +797,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..5 | |
| // CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -883,14 +883,14 @@ int main() { | |
| // CHECK1-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 | |
| // CHECK1-SAME: () #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..6) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -958,7 +958,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1044,14 +1044,14 @@ int main() { | |
| // CHECK1-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 | |
| // CHECK1-SAME: () #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..8) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..8 | |
| // CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1119,7 +1119,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..9 | |
| // CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1205,14 +1205,14 @@ int main() { | |
| // CHECK1-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 | |
| // CHECK1-SAME: () #[[ATTR3]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..10) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1295,7 +1295,7 @@ int main() { | |
| // CHECK1-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1381,14 +1381,14 @@ int main() { | |
| // CHECK1-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR9:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main | |
| +// CHECK3-LABEL: define dso_local i32 @main | |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1505,7 +1505,7 @@ int main() { | |
| // CHECK3-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_ZN1SC1El | |
| +// CHECK3-LABEL: define linkonce_odr void @_ZN1SC1El | |
| // CHECK3-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1518,7 +1518,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_ZN1ScvcEv | |
| +// CHECK3-LABEL: define linkonce_odr signext i8 @_ZN1ScvcEv | |
| // CHECK3-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1531,14 +1531,14 @@ int main() { | |
| // CHECK3-NEXT: ret i8 [[CONV]] | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@__clang_call_terminate | |
| +// CHECK3-LABEL: define linkonce_odr hidden void @__clang_call_terminate | |
| // CHECK3-SAME: (ptr [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat { | |
| // CHECK3-NEXT: [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR7]] | |
| // CHECK3-NEXT: call void @_ZSt9terminatev() #[[ATTR8]] | |
| // CHECK3-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv | |
| +// CHECK3-LABEL: define linkonce_odr i32 @_Z5tmainIcLi5EEiv | |
| // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat personality ptr @__gxx_personality_v0 { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -1616,7 +1616,7 @@ int main() { | |
| // CHECK3-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv | |
| +// CHECK3-LABEL: define linkonce_odr i32 @_Z5tmainI1SLi1EEiv | |
| // CHECK3-SAME: () #[[ATTR5]] comdat personality ptr @__gxx_personality_v0 { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -1694,7 +1694,7 @@ int main() { | |
| // CHECK3-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_ZN1SD1Ev | |
| +// CHECK3-LABEL: define linkonce_odr void @_ZN1SD1Ev | |
| // CHECK3-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1704,7 +1704,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_ZN1SC2El | |
| +// CHECK3-LABEL: define linkonce_odr void @_ZN1SC2El | |
| // CHECK3-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1718,7 +1718,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_ZN1SD2Ev | |
| +// CHECK3-LABEL: define linkonce_odr void @_ZN1SD2Ev | |
| // CHECK3-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1727,7 +1727,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@main | |
| +// CHECK5-LABEL: define dso_local i32 @main | |
| // CHECK5-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1841,7 +1841,7 @@ int main() { | |
| // CHECK5-NEXT: resume { ptr, i32 } [[LPAD_VAL10]] | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_ZN1SC1El | |
| +// CHECK5-LABEL: define linkonce_odr void @_ZN1SC1El | |
| // CHECK5-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1854,7 +1854,7 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_ZN1ScvcEv | |
| +// CHECK5-LABEL: define linkonce_odr signext i8 @_ZN1ScvcEv | |
| // CHECK5-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1867,14 +1867,14 @@ int main() { | |
| // CHECK5-NEXT: ret i8 [[CONV]] | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK5-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK5-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK5-LABEL: define internal void @.omp_outlined. | |
| // CHECK5-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1942,7 +1942,7 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK5-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2028,14 +2028,14 @@ int main() { | |
| // CHECK5-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@__clang_call_terminate | |
| +// CHECK5-LABEL: define linkonce_odr hidden void @__clang_call_terminate | |
| // CHECK5-SAME: (ptr [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK5-NEXT: [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR6]] | |
| // CHECK5-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] | |
| // CHECK5-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 | |
| +// CHECK5-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 | |
| // CHECK5-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -2044,7 +2044,7 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK5-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2117,7 +2117,7 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK5-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2203,7 +2203,7 @@ int main() { | |
| // CHECK5-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv | |
| +// CHECK5-LABEL: define linkonce_odr i32 @_Z5tmainIcLi5EEiv | |
| // CHECK5-SAME: () #[[ATTR7:[0-9]+]] comdat { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -2263,7 +2263,7 @@ int main() { | |
| // CHECK5-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv | |
| +// CHECK5-LABEL: define linkonce_odr i32 @_Z5tmainI1SLi1EEiv | |
| // CHECK5-SAME: () #[[ATTR7]] comdat { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -2323,7 +2323,7 @@ int main() { | |
| // CHECK5-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_ZN1SD1Ev | |
| +// CHECK5-LABEL: define linkonce_odr void @_ZN1SD1Ev | |
| // CHECK5-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2333,7 +2333,7 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_ZN1SC2El | |
| +// CHECK5-LABEL: define linkonce_odr void @_ZN1SC2El | |
| // CHECK5-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2347,14 +2347,14 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 | |
| +// CHECK5-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 | |
| // CHECK5-SAME: () #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..4) | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK5-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2422,7 +2422,7 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..5 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..5 | |
| // CHECK5-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2508,14 +2508,14 @@ int main() { | |
| // CHECK5-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 | |
| +// CHECK5-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 | |
| // CHECK5-SAME: () #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..6) | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK5-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2583,7 +2583,7 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK5-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2669,14 +2669,14 @@ int main() { | |
| // CHECK5-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 | |
| +// CHECK5-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 | |
| // CHECK5-SAME: () #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..8) | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..8 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..8 | |
| // CHECK5-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2744,7 +2744,7 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..9 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..9 | |
| // CHECK5-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2830,14 +2830,14 @@ int main() { | |
| // CHECK5-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 | |
| +// CHECK5-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 | |
| // CHECK5-SAME: () #[[ATTR3]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..10) | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK5-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2920,7 +2920,7 @@ int main() { | |
| // CHECK5-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK5-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3006,7 +3006,7 @@ int main() { | |
| // CHECK5-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_ZN1SD2Ev | |
| +// CHECK5-LABEL: define linkonce_odr void @_ZN1SD2Ev | |
| // CHECK5-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3015,14 +3015,14 @@ int main() { | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK5-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK5-SAME: () #[[ATTR9:[0-9]+]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@main | |
| +// CHECK9-LABEL: define dso_local i32 @main | |
| // CHECK9-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -3136,7 +3136,7 @@ int main() { | |
| // CHECK9-NEXT: resume { ptr, i32 } [[LPAD_VAL10]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SC1El | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SC1El | |
| // CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3149,7 +3149,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1ScvcEv | |
| +// CHECK9-LABEL: define linkonce_odr i8 @_ZN1ScvcEv | |
| // CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3162,14 +3162,14 @@ int main() { | |
| // CHECK9-NEXT: ret i8 [[CONV]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK9-LABEL: define internal void @.omp_outlined. | |
| // CHECK9-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3237,7 +3237,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK9-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3323,14 +3323,14 @@ int main() { | |
| // CHECK9-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@__clang_call_terminate | |
| +// CHECK9-LABEL: define linkonce_odr hidden void @__clang_call_terminate | |
| // CHECK9-SAME: (ptr [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK9-NEXT: [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR6]] | |
| // CHECK9-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] | |
| // CHECK9-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 | |
| // CHECK9-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -3339,7 +3339,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK9-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3412,7 +3412,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK9-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3498,7 +3498,7 @@ int main() { | |
| // CHECK9-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv | |
| +// CHECK9-LABEL: define linkonce_odr i32 @_Z5tmainIcLi5EEiv | |
| // CHECK9-SAME: () #[[ATTR7:[0-9]+]] comdat { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -3558,7 +3558,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv | |
| +// CHECK9-LABEL: define linkonce_odr i32 @_Z5tmainI1SLi1EEiv | |
| // CHECK9-SAME: () #[[ATTR7]] comdat { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -3618,7 +3618,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SD1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SD1Ev | |
| // CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3628,7 +3628,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SC2El | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SC2El | |
| // CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3642,7 +3642,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SD2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SD2Ev | |
| // CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3651,14 +3651,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 | |
| // CHECK9-SAME: () #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..4) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK9-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3726,7 +3726,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..5 | |
| // CHECK9-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3812,14 +3812,14 @@ int main() { | |
| // CHECK9-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 | |
| // CHECK9-SAME: () #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..6) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK9-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3887,7 +3887,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK9-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3973,14 +3973,14 @@ int main() { | |
| // CHECK9-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 | |
| // CHECK9-SAME: () #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..8) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..8 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..8 | |
| // CHECK9-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4048,7 +4048,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..9 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..9 | |
| // CHECK9-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4134,14 +4134,14 @@ int main() { | |
| // CHECK9-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 | |
| // CHECK9-SAME: () #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..10) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK9-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4224,7 +4224,7 @@ int main() { | |
| // CHECK9-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK9-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4310,14 +4310,14 @@ int main() { | |
| // CHECK9-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK9-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK9-SAME: () #[[ATTR9:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@main | |
| +// CHECK11-LABEL: define dso_local i32 @main | |
| // CHECK11-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -4434,7 +4434,7 @@ int main() { | |
| // CHECK11-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SC1El | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SC1El | |
| // CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4447,7 +4447,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1ScvcEv | |
| +// CHECK11-LABEL: define linkonce_odr i8 @_ZN1ScvcEv | |
| // CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4460,14 +4460,14 @@ int main() { | |
| // CHECK11-NEXT: ret i8 [[CONV]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@__clang_call_terminate | |
| +// CHECK11-LABEL: define linkonce_odr hidden void @__clang_call_terminate | |
| // CHECK11-SAME: (ptr [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat { | |
| // CHECK11-NEXT: [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR7]] | |
| // CHECK11-NEXT: call void @_ZSt9terminatev() #[[ATTR8]] | |
| // CHECK11-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv | |
| +// CHECK11-LABEL: define linkonce_odr i32 @_Z5tmainIcLi5EEiv | |
| // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat personality ptr @__gxx_personality_v0 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -4545,7 +4545,7 @@ int main() { | |
| // CHECK11-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv | |
| +// CHECK11-LABEL: define linkonce_odr i32 @_Z5tmainI1SLi1EEiv | |
| // CHECK11-SAME: () #[[ATTR5]] comdat personality ptr @__gxx_personality_v0 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -4623,7 +4623,7 @@ int main() { | |
| // CHECK11-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SD1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SD1Ev | |
| // CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4633,7 +4633,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SC2El | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SC2El | |
| // CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4647,7 +4647,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SD2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SD2Ev | |
| // CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4656,7 +4656,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@main | |
| +// CHECK13-LABEL: define dso_local i32 @main | |
| // CHECK13-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -4770,7 +4770,7 @@ int main() { | |
| // CHECK13-NEXT: resume { ptr, i32 } [[LPAD_VAL10]] | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SC1El | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SC1El | |
| // CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4783,7 +4783,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1ScvcEv | |
| +// CHECK13-LABEL: define linkonce_odr i8 @_ZN1ScvcEv | |
| // CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4796,14 +4796,14 @@ int main() { | |
| // CHECK13-NEXT: ret i8 [[CONV]] | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK13-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK13-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK13-LABEL: define internal void @.omp_outlined. | |
| // CHECK13-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4871,7 +4871,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK13-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4957,14 +4957,14 @@ int main() { | |
| // CHECK13-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@__clang_call_terminate | |
| +// CHECK13-LABEL: define linkonce_odr hidden void @__clang_call_terminate | |
| // CHECK13-SAME: (ptr [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK13-NEXT: [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR6]] | |
| // CHECK13-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] | |
| // CHECK13-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 | |
| +// CHECK13-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 | |
| // CHECK13-SAME: (i64 [[A:%.*]]) #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -4973,7 +4973,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK13-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5046,7 +5046,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK13-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5132,7 +5132,7 @@ int main() { | |
| // CHECK13-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv | |
| +// CHECK13-LABEL: define linkonce_odr i32 @_Z5tmainIcLi5EEiv | |
| // CHECK13-SAME: () #[[ATTR7:[0-9]+]] comdat { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -5192,7 +5192,7 @@ int main() { | |
| // CHECK13-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv | |
| +// CHECK13-LABEL: define linkonce_odr i32 @_Z5tmainI1SLi1EEiv | |
| // CHECK13-SAME: () #[[ATTR7]] comdat { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -5252,7 +5252,7 @@ int main() { | |
| // CHECK13-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SD1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SD1Ev | |
| // CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5262,7 +5262,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SC2El | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SC2El | |
| // CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5276,14 +5276,14 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 | |
| +// CHECK13-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 | |
| // CHECK13-SAME: () #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..4) | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK13-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5351,7 +5351,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..5 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..5 | |
| // CHECK13-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5437,14 +5437,14 @@ int main() { | |
| // CHECK13-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 | |
| +// CHECK13-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 | |
| // CHECK13-SAME: () #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..6) | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..6 | |
| // CHECK13-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5512,7 +5512,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK13-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5598,14 +5598,14 @@ int main() { | |
| // CHECK13-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 | |
| +// CHECK13-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 | |
| // CHECK13-SAME: () #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..8) | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..8 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..8 | |
| // CHECK13-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5673,7 +5673,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..9 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..9 | |
| // CHECK13-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5759,14 +5759,14 @@ int main() { | |
| // CHECK13-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 | |
| +// CHECK13-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 | |
| // CHECK13-SAME: () #[[ATTR3]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..10) | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK13-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5849,7 +5849,7 @@ int main() { | |
| // CHECK13-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11 | |
| +// CHECK13-LABEL: define internal void @.omp_outlined..11 | |
| // CHECK13-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality ptr @__gxx_personality_v0 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5935,7 +5935,7 @@ int main() { | |
| // CHECK13-NEXT: unreachable | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SD2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SD2Ev | |
| // CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5944,7 +5944,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK13-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK13-SAME: () #[[ATTR9:[0-9]+]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: call void @__tgt_register_requires(i64 1) | |
| diff --git a/clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp | |
| index 5a999951823e..f6097f0e3c37 100644 | |
| --- a/clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp | |
| @@ -135,7 +135,7 @@ int main() { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -148,14 +148,14 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK1-SAME: () #[[ATTR2:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 0, ptr @.omp_outlined.) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -230,7 +230,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -331,14 +331,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main | |
| +// CHECK3-LABEL: define dso_local noundef i32 @main | |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -351,14 +351,14 @@ int main() { | |
| // CHECK3-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK3-SAME: () #[[ATTR2:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 0, ptr @.omp_outlined.) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK3-LABEL: define internal void @.omp_outlined. | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -431,7 +431,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -530,14 +530,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK3-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@main | |
| +// CHECK5-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -550,7 +550,7 @@ int main() { | |
| // CHECK5-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@main | |
| +// CHECK7-LABEL: define dso_local noundef i32 @main | |
| // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -563,7 +563,7 @@ int main() { | |
| // CHECK7-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@main | |
| +// CHECK9-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -630,7 +630,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP12]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -640,7 +640,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -653,14 +653,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 | |
| // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK9-LABEL: define internal void @.omp_outlined. | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -762,7 +762,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -884,7 +884,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -894,7 +894,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK9-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -956,7 +956,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP12]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -967,7 +967,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -981,7 +981,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -990,7 +990,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1000,7 +1000,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1013,14 +1013,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK9-SAME: () #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..2) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1121,7 +1121,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1242,7 +1242,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1252,7 +1252,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1263,7 +1263,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1277,7 +1277,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1286,14 +1286,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK9-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@main | |
| +// CHECK11-LABEL: define dso_local noundef i32 @main | |
| // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1360,7 +1360,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP12]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1370,7 +1370,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1383,14 +1383,14 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 | |
| // CHECK11-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK11-LABEL: define internal void @.omp_outlined. | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1490,7 +1490,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1608,7 +1608,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1618,7 +1618,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK11-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1680,7 +1680,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP12]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1691,7 +1691,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1705,7 +1705,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1714,7 +1714,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1724,7 +1724,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1737,14 +1737,14 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK11-SAME: () #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..2) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1843,7 +1843,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1960,7 +1960,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1970,7 +1970,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1981,7 +1981,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1995,7 +1995,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2004,14 +2004,14 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK11-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@main | |
| +// CHECK13-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2122,7 +2122,7 @@ int main() { | |
| // CHECK13-NEXT: ret i32 [[TMP11]] | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2132,7 +2132,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2145,7 +2145,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2155,7 +2155,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK13-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2260,7 +2260,7 @@ int main() { | |
| // CHECK13-NEXT: ret i32 [[TMP11]] | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2271,7 +2271,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2280,7 +2280,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2294,7 +2294,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2304,7 +2304,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2317,7 +2317,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2327,7 +2327,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2338,7 +2338,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2352,7 +2352,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2361,7 +2361,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@main | |
| +// CHECK15-LABEL: define dso_local noundef i32 @main | |
| // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2470,7 +2470,7 @@ int main() { | |
| // CHECK15-NEXT: ret i32 [[TMP11]] | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2480,7 +2480,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2493,7 +2493,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2503,7 +2503,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK15-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2606,7 +2606,7 @@ int main() { | |
| // CHECK15-NEXT: ret i32 [[TMP11]] | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2617,7 +2617,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2626,7 +2626,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2640,7 +2640,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2650,7 +2650,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2663,7 +2663,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2673,7 +2673,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2684,7 +2684,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2698,7 +2698,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| diff --git a/clang/test/OpenMP/distribute_parallel_for_simd_proc_bind_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_simd_proc_bind_codegen.cpp | |
| index 674afcc83bd9..b49936ac8690 100644 | |
| --- a/clang/test/OpenMP/distribute_parallel_for_simd_proc_bind_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_parallel_for_simd_proc_bind_codegen.cpp | |
| @@ -53,7 +53,7 @@ int main() { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -116,14 +116,14 @@ int main() { | |
| // CHECK1-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37 | |
| // CHECK1-SAME: () #[[ATTR1:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined.) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -191,7 +191,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -268,14 +268,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41 | |
| // CHECK1-SAME: () #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..2) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -343,7 +343,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -420,7 +420,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK1-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK1-SAME: () #[[ATTR3:[0-9]+]] comdat { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| @@ -453,14 +453,14 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29 | |
| // CHECK1-SAME: () #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @.omp_outlined..4) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -528,7 +528,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..5 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -605,14 +605,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main | |
| +// CHECK3-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -681,7 +681,7 @@ int main() { | |
| // CHECK3-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK3-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK3-SAME: () #[[ATTR1:[0-9]+]] comdat { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 | |
| diff --git a/clang/test/OpenMP/distribute_private_codegen.cpp b/clang/test/OpenMP/distribute_private_codegen.cpp | |
| index 115b190633cd..85503d9215e6 100644 | |
| --- a/clang/test/OpenMP/distribute_private_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_private_codegen.cpp | |
| @@ -114,7 +114,7 @@ int main() { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -127,14 +127,14 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK1-SAME: () #[[ATTR2:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 0, ptr @.omp_outlined.) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -218,14 +218,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main | |
| +// CHECK3-LABEL: define dso_local noundef i32 @main | |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -238,14 +238,14 @@ int main() { | |
| // CHECK3-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK3-SAME: () #[[ATTR2:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 0, ptr @.omp_outlined.) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK3-LABEL: define internal void @.omp_outlined. | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -329,14 +329,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK3-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@main | |
| +// CHECK9-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -431,7 +431,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP23]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -441,7 +441,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -454,14 +454,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 | |
| // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @.omp_outlined.) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK9-LABEL: define internal void @.omp_outlined. | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -566,7 +566,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -576,14 +576,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 | |
| // CHECK9-SAME: () #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @.omp_outlined..1) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -644,7 +644,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK9-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -706,7 +706,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP12]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -717,7 +717,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -731,7 +731,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -740,7 +740,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -750,7 +750,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -763,14 +763,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK9-SAME: () #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @.omp_outlined..2) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -874,7 +874,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -884,7 +884,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -895,7 +895,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -909,7 +909,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -918,14 +918,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK9-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@main | |
| +// CHECK11-LABEL: define dso_local noundef i32 @main | |
| // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1020,7 +1020,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP23]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1030,7 +1030,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1043,14 +1043,14 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 | |
| // CHECK11-SAME: () #[[ATTR3:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @.omp_outlined.) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK11-LABEL: define internal void @.omp_outlined. | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1153,7 +1153,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1163,14 +1163,14 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 | |
| // CHECK11-SAME: () #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @.omp_outlined..1) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1231,7 +1231,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK11-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1293,7 +1293,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP12]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1304,7 +1304,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1318,7 +1318,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1327,7 +1327,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1337,7 +1337,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1350,14 +1350,14 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK11-SAME: () #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @.omp_outlined..2) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1459,7 +1459,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1469,7 +1469,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1480,7 +1480,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1494,7 +1494,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1503,7 +1503,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK11-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) | |
| diff --git a/clang/test/OpenMP/distribute_simd_codegen.cpp b/clang/test/OpenMP/distribute_simd_codegen.cpp | |
| index c3f50de0fc1d..b452f08f6249 100644 | |
| --- a/clang/test/OpenMP/distribute_simd_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_simd_codegen.cpp | |
| @@ -144,7 +144,7 @@ int fint(void) { return ftemplate<int>(); } | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_ | |
| +// CHECK1-LABEL: define dso_local void @_Z23without_schedule_clausePfS_S_S_ | |
| // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -218,7 +218,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70 | |
| // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -233,7 +233,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -336,7 +336,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_ | |
| +// CHECK1-LABEL: define dso_local void @_Z18static_not_chunkedPfS_S_S_ | |
| // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -410,7 +410,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86 | |
| // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -425,7 +425,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -526,7 +526,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_ | |
| +// CHECK1-LABEL: define dso_local void @_Z14static_chunkedPfS_S_S_ | |
| // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -600,7 +600,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103 | |
| // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -615,7 +615,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -733,7 +733,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z12test_precondv | |
| +// CHECK1-LABEL: define dso_local void @_Z12test_precondv | |
| // CHECK1-SAME: () #[[ATTR0]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[A:%.*]] = alloca i8, align 1 | |
| @@ -809,7 +809,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115 | |
| // CHECK1-SAME: (i64 noundef [[I:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -820,7 +820,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[I:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -934,14 +934,14 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z4fintv | |
| +// CHECK1-LABEL: define dso_local noundef signext i32 @_Z4fintv | |
| // CHECK1-SAME: () #[[ATTR0]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z9ftemplateIiET_v() | |
| // CHECK1-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v | |
| +// CHECK1-LABEL: define linkonce_odr noundef signext i32 @_Z9ftemplateIiET_v | |
| // CHECK1-SAME: () #[[ATTR0]] comdat { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[AA:%.*]] = alloca i16, align 2 | |
| @@ -991,7 +991,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135 | |
| // CHECK1-SAME: (i64 noundef [[AA:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1000,7 +1000,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK1-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR1]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1089,14 +1089,14 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_ | |
| +// CHECK3-LABEL: define dso_local void @_Z23without_schedule_clausePfS_S_S_ | |
| // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1170,7 +1170,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70 | |
| // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1185,7 +1185,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK3-LABEL: define internal void @.omp_outlined. | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1284,7 +1284,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_ | |
| +// CHECK3-LABEL: define dso_local void @_Z18static_not_chunkedPfS_S_S_ | |
| // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1358,7 +1358,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86 | |
| // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1373,7 +1373,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1470,7 +1470,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_ | |
| +// CHECK3-LABEL: define dso_local void @_Z14static_chunkedPfS_S_S_ | |
| // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1544,7 +1544,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103 | |
| // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1559,7 +1559,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1673,7 +1673,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_Z12test_precondv | |
| +// CHECK3-LABEL: define dso_local void @_Z12test_precondv | |
| // CHECK3-SAME: () #[[ATTR0]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[A:%.*]] = alloca i8, align 1 | |
| @@ -1749,7 +1749,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115 | |
| // CHECK3-SAME: (i32 noundef [[I:%.*]], i32 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1760,7 +1760,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[I:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1874,14 +1874,14 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_Z4fintv | |
| +// CHECK3-LABEL: define dso_local noundef i32 @_Z4fintv | |
| // CHECK3-SAME: () #[[ATTR0]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z9ftemplateIiET_v() | |
| // CHECK3-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v | |
| +// CHECK3-LABEL: define linkonce_odr noundef i32 @_Z9ftemplateIiET_v | |
| // CHECK3-SAME: () #[[ATTR0]] comdat { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[AA:%.*]] = alloca i16, align 2 | |
| @@ -1931,7 +1931,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135 | |
| // CHECK3-SAME: (i32 noundef [[AA:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1940,7 +1940,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK3-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR1]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2029,14 +2029,14 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK3-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_ | |
| +// CHECK5-LABEL: define dso_local void @_Z23without_schedule_clausePfS_S_S_ | |
| // CHECK5-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2110,7 +2110,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70 | |
| +// CHECK5-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70 | |
| // CHECK5-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2125,7 +2125,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK5-LABEL: define internal void @.omp_outlined. | |
| // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2228,7 +2228,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_ | |
| +// CHECK5-LABEL: define dso_local void @_Z18static_not_chunkedPfS_S_S_ | |
| // CHECK5-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2302,7 +2302,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86 | |
| +// CHECK5-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86 | |
| // CHECK5-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2317,7 +2317,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2418,7 +2418,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_ | |
| +// CHECK5-LABEL: define dso_local void @_Z14static_chunkedPfS_S_S_ | |
| // CHECK5-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2492,7 +2492,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103 | |
| +// CHECK5-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103 | |
| // CHECK5-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2507,7 +2507,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2625,7 +2625,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_Z12test_precondv | |
| +// CHECK5-LABEL: define dso_local void @_Z12test_precondv | |
| // CHECK5-SAME: () #[[ATTR0]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[A:%.*]] = alloca i8, align 1 | |
| @@ -2701,7 +2701,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115 | |
| +// CHECK5-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115 | |
| // CHECK5-SAME: (i64 noundef [[I:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -2712,7 +2712,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[I:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2857,14 +2857,14 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_Z4fintv | |
| +// CHECK5-LABEL: define dso_local noundef signext i32 @_Z4fintv | |
| // CHECK5-SAME: () #[[ATTR0]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z9ftemplateIiET_v() | |
| // CHECK5-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v | |
| +// CHECK5-LABEL: define linkonce_odr noundef signext i32 @_Z9ftemplateIiET_v | |
| // CHECK5-SAME: () #[[ATTR0]] comdat { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[AA:%.*]] = alloca i16, align 2 | |
| @@ -2914,7 +2914,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK5-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135 | |
| +// CHECK5-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135 | |
| // CHECK5-SAME: (i64 noundef [[AA:%.*]]) #[[ATTR1]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -2923,7 +2923,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK5-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR1]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -3012,14 +3012,14 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK5-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK5-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK5-NEXT: ret void | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_ | |
| +// CHECK7-LABEL: define dso_local void @_Z23without_schedule_clausePfS_S_S_ | |
| // CHECK7-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3093,7 +3093,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK7-NEXT: ret void | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70 | |
| +// CHECK7-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70 | |
| // CHECK7-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1:[0-9]+]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3108,7 +3108,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK7-NEXT: ret void | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK7-LABEL: define internal void @.omp_outlined. | |
| // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3207,7 +3207,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK7-NEXT: ret void | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_ | |
| +// CHECK7-LABEL: define dso_local void @_Z18static_not_chunkedPfS_S_S_ | |
| // CHECK7-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3281,7 +3281,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK7-NEXT: ret void | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86 | |
| +// CHECK7-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86 | |
| // CHECK7-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3296,7 +3296,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK7-NEXT: ret void | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK7-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3393,7 +3393,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK7-NEXT: ret void | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_ | |
| +// CHECK7-LABEL: define dso_local void @_Z14static_chunkedPfS_S_S_ | |
| // CHECK7-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3467,7 +3467,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK7-NEXT: ret void | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103 | |
| +// CHECK7-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103 | |
| // CHECK7-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3482,7 +3482,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK7-NEXT: ret void | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK7-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3596,7 +3596,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK7-NEXT: ret void | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@_Z12test_precondv | |
| +// CHECK7-LABEL: define dso_local void @_Z12test_precondv | |
| // CHECK7-SAME: () #[[ATTR0]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[A:%.*]] = alloca i8, align 1 | |
| @@ -3672,7 +3672,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK7-NEXT: ret void | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115 | |
| +// CHECK7-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115 | |
| // CHECK7-SAME: (i32 noundef [[I:%.*]], i32 noundef [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -3683,7 +3683,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK7-NEXT: ret void | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..7 | |
| +// CHECK7-LABEL: define internal void @.omp_outlined..7 | |
| // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[I:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR1]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3828,14 +3828,14 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK7-NEXT: ret void | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@_Z4fintv | |
| +// CHECK7-LABEL: define dso_local noundef i32 @_Z4fintv | |
| // CHECK7-SAME: () #[[ATTR0]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_Z9ftemplateIiET_v() | |
| // CHECK7-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v | |
| +// CHECK7-LABEL: define linkonce_odr noundef i32 @_Z9ftemplateIiET_v | |
| // CHECK7-SAME: () #[[ATTR0]] comdat { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[AA:%.*]] = alloca i16, align 2 | |
| @@ -3885,7 +3885,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK7-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135 | |
| +// CHECK7-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135 | |
| // CHECK7-SAME: (i32 noundef [[AA:%.*]]) #[[ATTR1]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -3894,7 +3894,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK7-NEXT: ret void | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..10 | |
| +// CHECK7-LABEL: define internal void @.omp_outlined..10 | |
| // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR1]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -3983,14 +3983,14 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK7-NEXT: ret void | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK7-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK7-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK7-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_ | |
| +// CHECK9-LABEL: define dso_local void @_Z23without_schedule_clausePfS_S_S_ | |
| // CHECK9-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4058,7 +4058,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_ | |
| +// CHECK9-LABEL: define dso_local void @_Z18static_not_chunkedPfS_S_S_ | |
| // CHECK9-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4124,7 +4124,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_ | |
| +// CHECK9-LABEL: define dso_local void @_Z14static_chunkedPfS_S_S_ | |
| // CHECK9-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4190,7 +4190,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z12test_precondv | |
| +// CHECK9-LABEL: define dso_local void @_Z12test_precondv | |
| // CHECK9-SAME: () #[[ATTR0]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[A:%.*]] = alloca i8, align 1 | |
| @@ -4270,14 +4270,14 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z4fintv | |
| +// CHECK9-LABEL: define dso_local noundef signext i32 @_Z4fintv | |
| // CHECK9-SAME: () #[[ATTR0]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z9ftemplateIiET_v() | |
| // CHECK9-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v | |
| +// CHECK9-LABEL: define linkonce_odr noundef signext i32 @_Z9ftemplateIiET_v | |
| // CHECK9-SAME: () #[[ATTR0]] comdat { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[AA:%.*]] = alloca i16, align 2 | |
| @@ -4315,7 +4315,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK9-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_ | |
| +// CHECK11-LABEL: define dso_local void @_Z23without_schedule_clausePfS_S_S_ | |
| // CHECK11-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -4379,7 +4379,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_ | |
| +// CHECK11-LABEL: define dso_local void @_Z18static_not_chunkedPfS_S_S_ | |
| // CHECK11-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -4441,7 +4441,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_ | |
| +// CHECK11-LABEL: define dso_local void @_Z14static_chunkedPfS_S_S_ | |
| // CHECK11-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -4503,7 +4503,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z12test_precondv | |
| +// CHECK11-LABEL: define dso_local void @_Z12test_precondv | |
| // CHECK11-SAME: () #[[ATTR0]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[A:%.*]] = alloca i8, align 1 | |
| @@ -4583,14 +4583,14 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z4fintv | |
| +// CHECK11-LABEL: define dso_local noundef i32 @_Z4fintv | |
| // CHECK11-SAME: () #[[ATTR0]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z9ftemplateIiET_v() | |
| // CHECK11-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v | |
| +// CHECK11-LABEL: define linkonce_odr noundef i32 @_Z9ftemplateIiET_v | |
| // CHECK11-SAME: () #[[ATTR0]] comdat { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[AA:%.*]] = alloca i16, align 2 | |
| @@ -4628,7 +4628,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK11-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_ | |
| +// CHECK13-LABEL: define dso_local void @_Z23without_schedule_clausePfS_S_S_ | |
| // CHECK13-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4696,7 +4696,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_ | |
| +// CHECK13-LABEL: define dso_local void @_Z18static_not_chunkedPfS_S_S_ | |
| // CHECK13-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4762,7 +4762,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_ | |
| +// CHECK13-LABEL: define dso_local void @_Z14static_chunkedPfS_S_S_ | |
| // CHECK13-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -4828,7 +4828,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_Z12test_precondv | |
| +// CHECK13-LABEL: define dso_local void @_Z12test_precondv | |
| // CHECK13-SAME: () #[[ATTR0]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[A:%.*]] = alloca i8, align 1 | |
| @@ -4939,14 +4939,14 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_Z4fintv | |
| +// CHECK13-LABEL: define dso_local noundef signext i32 @_Z4fintv | |
| // CHECK13-SAME: () #[[ATTR0]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z9ftemplateIiET_v() | |
| // CHECK13-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v | |
| +// CHECK13-LABEL: define linkonce_odr noundef signext i32 @_Z9ftemplateIiET_v | |
| // CHECK13-SAME: () #[[ATTR0]] comdat { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[AA:%.*]] = alloca i16, align 2 | |
| @@ -4984,7 +4984,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK13-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_ | |
| +// CHECK15-LABEL: define dso_local void @_Z23without_schedule_clausePfS_S_S_ | |
| // CHECK15-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -5048,7 +5048,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_ | |
| +// CHECK15-LABEL: define dso_local void @_Z18static_not_chunkedPfS_S_S_ | |
| // CHECK15-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -5110,7 +5110,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_ | |
| +// CHECK15-LABEL: define dso_local void @_Z14static_chunkedPfS_S_S_ | |
| // CHECK15-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -5172,7 +5172,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_Z12test_precondv | |
| +// CHECK15-LABEL: define dso_local void @_Z12test_precondv | |
| // CHECK15-SAME: () #[[ATTR0]] { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[A:%.*]] = alloca i8, align 1 | |
| @@ -5283,14 +5283,14 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_Z4fintv | |
| +// CHECK15-LABEL: define dso_local noundef i32 @_Z4fintv | |
| // CHECK15-SAME: () #[[ATTR0]] { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z9ftemplateIiET_v() | |
| // CHECK15-NEXT: ret i32 [[CALL]] | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v | |
| +// CHECK15-LABEL: define linkonce_odr noundef i32 @_Z9ftemplateIiET_v | |
| // CHECK15-SAME: () #[[ATTR0]] comdat { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[AA:%.*]] = alloca i16, align 2 | |
| @@ -5328,7 +5328,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK15-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70 | |
| +// CHECK17-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70 | |
| // CHECK17-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5343,7 +5343,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK17-LABEL: define internal void @.omp_outlined. | |
| // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5446,7 +5446,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86 | |
| +// CHECK17-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86 | |
| // CHECK17-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5461,7 +5461,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK17-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5562,7 +5562,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103 | |
| +// CHECK17-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103 | |
| // CHECK17-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5577,7 +5577,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK17-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5695,7 +5695,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115 | |
| +// CHECK17-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115 | |
| // CHECK17-SAME: (i64 noundef [[I:%.*]], i64 noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -5706,7 +5706,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK17-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[I:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5820,7 +5820,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135 | |
| +// CHECK17-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135 | |
| // CHECK17-SAME: (i64 noundef [[AA:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -5829,7 +5829,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK17-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR0]] { | |
| // CHECK17-NEXT: entry: | |
| // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -5918,7 +5918,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK17-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70 | |
| +// CHECK19-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70 | |
| // CHECK19-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -5933,7 +5933,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK19-LABEL: define internal void @.omp_outlined. | |
| // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -6032,7 +6032,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86 | |
| +// CHECK19-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86 | |
| // CHECK19-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -6047,7 +6047,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK19-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -6144,7 +6144,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103 | |
| +// CHECK19-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103 | |
| // CHECK19-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -6159,7 +6159,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK19-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -6273,7 +6273,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115 | |
| +// CHECK19-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115 | |
| // CHECK19-SAME: (i32 noundef [[I:%.*]], i32 noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -6284,7 +6284,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK19-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[I:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -6398,7 +6398,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135 | |
| +// CHECK19-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135 | |
| // CHECK19-SAME: (i32 noundef [[AA:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -6407,7 +6407,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK19-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR0]] { | |
| // CHECK19-NEXT: entry: | |
| // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -6496,7 +6496,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK19-NEXT: ret void | |
| // | |
| // | |
| -// CHECK21-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70 | |
| +// CHECK21-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70 | |
| // CHECK21-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK21-NEXT: entry: | |
| // CHECK21-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6511,7 +6511,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK21-NEXT: ret void | |
| // | |
| // | |
| -// CHECK21-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK21-LABEL: define internal void @.omp_outlined. | |
| // CHECK21-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK21-NEXT: entry: | |
| // CHECK21-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6614,7 +6614,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK21-NEXT: ret void | |
| // | |
| // | |
| -// CHECK21-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86 | |
| +// CHECK21-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86 | |
| // CHECK21-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK21-NEXT: entry: | |
| // CHECK21-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6629,7 +6629,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK21-NEXT: ret void | |
| // | |
| // | |
| -// CHECK21-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK21-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK21-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK21-NEXT: entry: | |
| // CHECK21-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6730,7 +6730,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK21-NEXT: ret void | |
| // | |
| // | |
| -// CHECK21-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103 | |
| +// CHECK21-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103 | |
| // CHECK21-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK21-NEXT: entry: | |
| // CHECK21-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6745,7 +6745,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK21-NEXT: ret void | |
| // | |
| // | |
| -// CHECK21-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK21-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK21-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK21-NEXT: entry: | |
| // CHECK21-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -6863,7 +6863,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK21-NEXT: ret void | |
| // | |
| // | |
| -// CHECK21-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115 | |
| +// CHECK21-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115 | |
| // CHECK21-SAME: (i64 noundef [[I:%.*]], i64 noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK21-NEXT: entry: | |
| // CHECK21-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -6874,7 +6874,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK21-NEXT: ret void | |
| // | |
| // | |
| -// CHECK21-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK21-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK21-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[I:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK21-NEXT: entry: | |
| // CHECK21-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -7019,7 +7019,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK21-NEXT: ret void | |
| // | |
| // | |
| -// CHECK21-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135 | |
| +// CHECK21-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135 | |
| // CHECK21-SAME: (i64 noundef [[AA:%.*]]) #[[ATTR0]] { | |
| // CHECK21-NEXT: entry: | |
| // CHECK21-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -7028,7 +7028,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK21-NEXT: ret void | |
| // | |
| // | |
| -// CHECK21-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK21-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK21-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR0]] { | |
| // CHECK21-NEXT: entry: | |
| // CHECK21-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -7117,7 +7117,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK21-NEXT: ret void | |
| // | |
| // | |
| -// CHECK23-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70 | |
| +// CHECK23-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70 | |
| // CHECK23-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] { | |
| // CHECK23-NEXT: entry: | |
| // CHECK23-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -7132,7 +7132,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK23-NEXT: ret void | |
| // | |
| // | |
| -// CHECK23-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK23-LABEL: define internal void @.omp_outlined. | |
| // CHECK23-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK23-NEXT: entry: | |
| // CHECK23-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -7231,7 +7231,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK23-NEXT: ret void | |
| // | |
| // | |
| -// CHECK23-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86 | |
| +// CHECK23-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86 | |
| // CHECK23-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK23-NEXT: entry: | |
| // CHECK23-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -7246,7 +7246,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK23-NEXT: ret void | |
| // | |
| // | |
| -// CHECK23-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK23-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK23-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK23-NEXT: entry: | |
| // CHECK23-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -7343,7 +7343,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK23-NEXT: ret void | |
| // | |
| // | |
| -// CHECK23-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103 | |
| +// CHECK23-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103 | |
| // CHECK23-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK23-NEXT: entry: | |
| // CHECK23-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -7358,7 +7358,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK23-NEXT: ret void | |
| // | |
| // | |
| -// CHECK23-LABEL: define {{[^@]+}}@.omp_outlined..2 | |
| +// CHECK23-LABEL: define internal void @.omp_outlined..2 | |
| // CHECK23-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] { | |
| // CHECK23-NEXT: entry: | |
| // CHECK23-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -7472,7 +7472,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK23-NEXT: ret void | |
| // | |
| // | |
| -// CHECK23-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115 | |
| +// CHECK23-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115 | |
| // CHECK23-SAME: (i32 noundef [[I:%.*]], i32 noundef [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK23-NEXT: entry: | |
| // CHECK23-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -7483,7 +7483,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK23-NEXT: ret void | |
| // | |
| // | |
| -// CHECK23-LABEL: define {{[^@]+}}@.omp_outlined..3 | |
| +// CHECK23-LABEL: define internal void @.omp_outlined..3 | |
| // CHECK23-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[I:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR0]] { | |
| // CHECK23-NEXT: entry: | |
| // CHECK23-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -7628,7 +7628,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK23-NEXT: ret void | |
| // | |
| // | |
| -// CHECK23-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135 | |
| +// CHECK23-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135 | |
| // CHECK23-SAME: (i32 noundef [[AA:%.*]]) #[[ATTR0]] { | |
| // CHECK23-NEXT: entry: | |
| // CHECK23-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -7637,7 +7637,7 @@ int fint(void) { return ftemplate<int>(); } | |
| // CHECK23-NEXT: ret void | |
| // | |
| // | |
| -// CHECK23-LABEL: define {{[^@]+}}@.omp_outlined..4 | |
| +// CHECK23-LABEL: define internal void @.omp_outlined..4 | |
| // CHECK23-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR0]] { | |
| // CHECK23-NEXT: entry: | |
| // CHECK23-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| diff --git a/clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp | |
| index 49fc57151092..6aa1215f4c26 100644 | |
| --- a/clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp | |
| @@ -153,7 +153,7 @@ int main() { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -171,7 +171,7 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -189,7 +189,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -314,14 +314,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main | |
| +// CHECK3-LABEL: define dso_local noundef i32 @main | |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -339,7 +339,7 @@ int main() { | |
| // CHECK3-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -368,7 +368,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK3-LABEL: define internal void @.omp_outlined. | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -493,14 +493,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK3-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@main | |
| +// CHECK5-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -518,7 +518,7 @@ int main() { | |
| // CHECK5-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@main | |
| +// CHECK7-LABEL: define dso_local noundef i32 @main | |
| // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -536,7 +536,7 @@ int main() { | |
| // CHECK7-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@main | |
| +// CHECK9-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -650,7 +650,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP37]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -660,7 +660,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -673,7 +673,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 | |
| // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -696,7 +696,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK9-LABEL: define internal void @.omp_outlined. | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -835,7 +835,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -845,7 +845,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK9-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -944,7 +944,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP32]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -955,7 +955,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -969,7 +969,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -978,7 +978,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -988,7 +988,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1001,7 +1001,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1022,7 +1022,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1155,7 +1155,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1165,7 +1165,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1176,7 +1176,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1190,7 +1190,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1199,14 +1199,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK9-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@main | |
| +// CHECK11-LABEL: define dso_local noundef i32 @main | |
| // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1320,7 +1320,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP37]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1330,7 +1330,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1343,7 +1343,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105 | |
| // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1366,7 +1366,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK11-LABEL: define internal void @.omp_outlined. | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1503,7 +1503,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1513,7 +1513,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK11-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1612,7 +1612,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP32]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1623,7 +1623,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1637,7 +1637,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1646,7 +1646,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1656,7 +1656,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1669,7 +1669,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1690,7 +1690,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1821,7 +1821,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1831,7 +1831,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1842,7 +1842,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1856,7 +1856,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1865,14 +1865,14 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK11-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@main | |
| +// CHECK13-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1960,7 +1960,7 @@ int main() { | |
| // CHECK13-NEXT: ret i32 [[TMP14]] | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1970,7 +1970,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1983,7 +1983,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK13-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2066,7 +2066,7 @@ int main() { | |
| // CHECK13-NEXT: ret i32 [[TMP14]] | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2076,7 +2076,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2087,7 +2087,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2096,7 +2096,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2110,7 +2110,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2120,7 +2120,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2133,7 +2133,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2143,7 +2143,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2154,7 +2154,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2168,7 +2168,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2177,7 +2177,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@main | |
| +// CHECK15-LABEL: define dso_local noundef i32 @main | |
| // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2263,7 +2263,7 @@ int main() { | |
| // CHECK15-NEXT: ret i32 [[TMP14]] | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2273,7 +2273,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2286,7 +2286,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK15-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2367,7 +2367,7 @@ int main() { | |
| // CHECK15-NEXT: ret i32 [[TMP14]] | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2377,7 +2377,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2388,7 +2388,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2397,7 +2397,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2411,7 +2411,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2421,7 +2421,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2434,7 +2434,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2444,7 +2444,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2455,7 +2455,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2469,7 +2469,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| diff --git a/clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp b/clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp | |
| index e4097fd4bc26..0c11aa52bae2 100644 | |
| --- a/clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp | |
| +++ b/clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp | |
| @@ -145,7 +145,7 @@ int main() { | |
| #endif | |
| -// CHECK1-LABEL: define {{[^@]+}}@main | |
| +// CHECK1-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -163,7 +163,7 @@ int main() { | |
| // CHECK1-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK1-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -181,7 +181,7 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK1-LABEL: define internal void @.omp_outlined. | |
| // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -303,14 +303,14 @@ int main() { | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK1-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK1-NEXT: entry: | |
| // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK1-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@main | |
| +// CHECK3-LABEL: define dso_local noundef i32 @main | |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -328,7 +328,7 @@ int main() { | |
| // CHECK3-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| +// CHECK3-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 | |
| // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -357,7 +357,7 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK3-LABEL: define internal void @.omp_outlined. | |
| // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -479,14 +479,14 @@ int main() { | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK3-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { | |
| // CHECK3-NEXT: entry: | |
| // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK3-NEXT: ret void | |
| // | |
| // | |
| -// CHECK5-LABEL: define {{[^@]+}}@main | |
| +// CHECK5-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK5-NEXT: entry: | |
| // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -504,7 +504,7 @@ int main() { | |
| // CHECK5-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK7-LABEL: define {{[^@]+}}@main | |
| +// CHECK7-LABEL: define dso_local noundef i32 @main | |
| // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK7-NEXT: entry: | |
| // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -522,7 +522,7 @@ int main() { | |
| // CHECK7-NEXT: ret i32 0 | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@main | |
| +// CHECK9-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -637,7 +637,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP37]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -647,7 +647,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -660,7 +660,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 | |
| // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -683,7 +683,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK9-LABEL: define internal void @.omp_outlined. | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -840,7 +840,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -850,7 +850,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK9-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -949,7 +949,7 @@ int main() { | |
| // CHECK9-NEXT: ret i32 [[TMP32]] | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -960,7 +960,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -974,7 +974,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -983,7 +983,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -993,7 +993,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1006,7 +1006,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK9-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 | |
| @@ -1027,7 +1027,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK9-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1178,7 +1178,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1188,7 +1188,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1199,7 +1199,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1213,7 +1213,7 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK9-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -1222,14 +1222,14 @@ int main() { | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK9-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK9-NEXT: entry: | |
| // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK9-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@main | |
| +// CHECK11-LABEL: define dso_local noundef i32 @main | |
| // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1344,7 +1344,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP37]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1354,7 +1354,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1367,7 +1367,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 | |
| // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1390,7 +1390,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. | |
| +// CHECK11-LABEL: define internal void @.omp_outlined. | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1545,7 +1545,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1555,7 +1555,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK11-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -1654,7 +1654,7 @@ int main() { | |
| // CHECK11-NEXT: ret i32 [[TMP32]] | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1665,7 +1665,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1679,7 +1679,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1688,7 +1688,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1698,7 +1698,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1711,7 +1711,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| +// CHECK11-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 | |
| // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 | |
| @@ -1732,7 +1732,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 | |
| +// CHECK11-LABEL: define internal void @.omp_outlined..1 | |
| // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1881,7 +1881,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1891,7 +1891,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1902,7 +1902,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1916,7 +1916,7 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK11-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -1925,14 +1925,14 @@ int main() { | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg | |
| +// CHECK11-LABEL: define internal void @.omp_offloading.requires_reg | |
| // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { | |
| // CHECK11-NEXT: entry: | |
| // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) | |
| // CHECK11-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@main | |
| +// CHECK13-LABEL: define dso_local noundef signext i32 @main | |
| // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2073,7 +2073,7 @@ int main() { | |
| // CHECK13-NEXT: ret i32 [[TMP20]] | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2083,7 +2083,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2096,7 +2096,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2106,7 +2106,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK13-LABEL: define linkonce_odr noundef signext i32 @_Z5tmainIiET_v | |
| // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2238,7 +2238,7 @@ int main() { | |
| // CHECK13-NEXT: ret i32 [[TMP19]] | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2249,7 +2249,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfED2Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2258,7 +2258,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIfEC2Ef | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2272,7 +2272,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiEC1Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2282,7 +2282,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiEC1Ei | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2295,7 +2295,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiED1Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2305,7 +2305,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiEC2Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2316,7 +2316,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiEC2Ei | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2330,7 +2330,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev | |
| +// CHECK13-LABEL: define linkonce_odr void @_ZN1SIiED2Ev | |
| // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK13-NEXT: entry: | |
| // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 | |
| @@ -2339,7 +2339,7 @@ int main() { | |
| // CHECK13-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@main | |
| +// CHECK15-LABEL: define dso_local noundef i32 @main | |
| // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2478,7 +2478,7 @@ int main() { | |
| // CHECK15-NEXT: ret i32 [[TMP20]] | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfEC1Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2488,7 +2488,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfEC1Ef | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2501,7 +2501,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfED1Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 | |
| @@ -2511,7 +2511,7 @@ int main() { | |
| // CHECK15-NEXT: ret void | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v | |
| +// CHECK15-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiET_v | |
| // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat { | |
| // CHECK15-NEXT: entry: | |
| // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | |
| @@ -2641,7 +2641,7 @@ int main() { | |
| // CHECK15-NEXT: ret i32 [[TMP19]] | |
| // | |
| // | |
| -// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev | |
| +// CHECK15-LABEL: define linkonce_odr void @_ZN1SIfEC2Ev | |
| // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr |
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