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AREIA-1 | |
------------ | |
16 registers, 16 bits each, | |
0 = always 0 | |
15 = SP | |
Memory is treated as little-endian. | |
Opcode byte: oooooott (o - opcode, t - type of opcode) | |
l is .b or .w | |
Opcode formats: | |
OP0 00oooo00 | |
OP1.1 01oooo0l xxxxyyyy (@x, @y) | |
OP1.2 01oooo1l xxxxyyyy iiiiiiii [iiiiiiii] (@x, #i, @y is used as a destination reg when sane, like @x + #i -> @y) | |
OP2.1 11oooo00 xxxxbbbb aaaaaaaa aaaaaaaa (jmp $baaaa + @x) | |
OP2.2 11oooo01 aaaaaaaa aaaaaaaa (jmp $Saaaa) | |
OP2.3 11oooo1l aaaaaaaa [aaaaaaaa] - RELATIVE BRANCHES | |
OP3.1 10ooaa00 xxxxyyyy (ld @x, $Syyyy) | |
OP3.2. 10ooaa01 xxxxbbbb aaaaaaaa aaaaaaaa (ld @x, $baaaa) | |
OP3.3. 10ooaa10 xxxxyyyy aaaaaaaa aaaaaaaa (ld @x, $Saaaa + @y) | |
OP3.4. 10ooaa11 xxxxyyyy zzzzaaaa (ld @x, $zyyyy + @a) | |
Addressing modes: | |
0 - regular | |
1 - indirect ( [@y]) | |
2 - stack (@y + SP) | |
3 - indirect stack ([@y + SP[) | |
Opcodes: | |
OP0 nop, ret, popf, pushf, cli, sei, hlt, ss0, ss1 | |
OP1 move, cmp, add, sub, xor, or, and, asl, asr, lsr, rol, ror, rcl, rcr | |
OP2 all the jumps | |
OP3 ld.b, st.b, ld.w, st.w | |
Notes: | |
move with @0 as destination is: | |
for l=0, move.b SEGMENT, @y | |
for l=1, move.b @y, SEGMENT | |
FLAGS: | |
bit description | |
--------------------------------------- | |
0 ZERO (CMP equality) | |
1 CARRY (whether carrying a bit, for subtract follow Z80 impl.) | |
2 OVERFLOW (add/sub/cmp: if signed overflow occurs; xor/and/or: sum of all bits over GF(2) (parity)) | |
3 SIGNED (whether >= 0x8000 or >= 0x80 for b) | |
4 INTERRUPT (set to 1 to enable) | |
5-15 Reserved. |
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OP2.3 1110oooo xxxxbbbb aaaaaaaa aaaaaaaa (jmp [$baaaa + @x] - indirect)
Change this to
OP2.3 1110oooo xxxxbbbb aaaaaaaa (jmp PC + @x + (signed)$baa)