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Last active August 29, 2015 13:56
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lab6-ECEn320
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;
-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity TopLevelVGA is
port(
--mapped to component.
clk : in std_logic;
--hardware inputs
sw : in std_logic_vector(7 downto 0);
btn : in std_logic_vector(3 downto 0);
--outputs
vgaRed : out std_logic_vector(2 downto 0);
vgaGreen : out std_logic_vector(2 downto 0);
vgaBlue : out std_logic_vector(1 downto 0);
Hsync : out std_logic;
Vsync : out std_logic;
-- For 7 Seg
an : out std_logic_vector(3 downto 0);
dp : out std_logic;
seg : out std_logic_vector(6 downto 0)
);
end TopLevelVGA;
architecture Behavioral of TopLevelVGA is
--top level I/O
-- signal red_wire : std_logic_vector(2 downto 0);
-- signal green_wire : std_logic_vector(2 downto 0);
-- signal blue_wire : std_logic_vector(1 downto 0);
signal color : std_logic_vector(7 downto 0);
signal red_display : std_logic_vector(2 downto 0);
signal green_display : std_logic_vector(2 downto 0);
signal blue_display : std_logic_vector(1 downto 0);
signal horiz_color : std_logic_vector(7 downto 0); --top three bits are red, next three are green, bottom 2 are blue.
signal vert_color : std_logic_vector(7 downto 0); --top three bits are red, next three are green, bottom 2 are blue.
-- signal q_next,q_reg : unsigned(16 downto 0); -- registers for display frames / sec on 7 seg
-- signal seg_counter : std_logic_vector(16 downto 0); -- goes on 7 seg display
--vga I/O
--inputs
signal x_pixel : std_logic_vector(9 downto 0);
signal y_pixel : std_logic_vector(9 downto 0);
signal top_last_column : std_logic;
signal top_last_row : std_logic;
signal top_blank : std_logic;
signal top_rst : std_logic;
signal top_HS : std_logic;
signal top_VS : std_logic;
--const's:
constant BLACK : std_logic_vector(7 downto 0) := "00000000";
constant BLUE : std_logic_vector(7 downto 0) := "00000011";
constant GREEN : std_logic_vector(7 downto 0) := "00011100";
constant CYAN : std_logic_vector(7 downto 0) := "00011111";
constant RED : std_logic_vector(7 downto 0) := "11100000";
constant MAGENTA : std_logic_vector(7 downto 0) := "11100011";
constant YELLOW : std_logic_vector(7 downto 0) := "11111100";
constant WHITE : std_logic_vector(7 downto 0) := "11111111";
constant BALL_SPEED : unsigned(2 downto 0) := to_unsigned(1,3);
constant BALL_WIDTH : unsigned(2 downto 0) := to_unsigned(10,4);
component vga_timing
port(
clk : in std_logic;
rst : in std_logic;
HS : out std_logic;
VS : out std_logic;
pixel_x : out std_logic_vector(9 downto 0);
pixel_y : out std_logic_vector(9 downto 0);
last_column : out std_logic;
last_row : out std_logic;
blank : out std_logic
);
end component;
component seven_segment_display
port(
clk : in std_logic;
data_in : in std_logic_vector (15 downto 0);
dp_in : in std_logic_vector (3 downto 0);
blank : in std_logic_vector (3 downto 0);
seg : out std_logic_vector (6 downto 0);
dp : out std_logic;
an : out std_logic_vector (3 downto 0)
);
end component;
signal animation_reg_next, animation_reg : unsigned(19 downto 0);
signal move_en : std_logic;--pulses
signal l_rect : unsigned(9 downto 0) := to_unsigned(220,10);
signal l_rect_next : unsigned(9 downto 0) := to_unsigned(220,10);
signal r_rect : unsigned(9 downto 0) := to_unsigned(210,10);
signal r_rect_next : unsigned(9 downto 0) := to_unsigned(210,10);
signal ball_x : unsigned(9 downto 0) := to_unsigned(320,10);
signal ball_x_next : unsigned(9 downto 0) := to_unsigned(320,10);
signal ball_y : unsigned(9 downto 0) := to_unsigned(225,10);
signal ball_y_next : unsigned(9 downto 0) := to_unsigned(225,10);
signal move_left,move_left_next : std_logic := '1';
signal move_up,move_up_next : std_logic := '1';
signal toggle_x_direction : std_logic := '0';
signal seg_val, seg_val_next : std_logic_vector(15 downto 0);
begin
--left is component, right is top level.
my_vga : vga_timing port map(
clk=>clk,
rst=>top_rst,
HS=>top_HS,
VS=>top_VS,
pixel_x=>x_pixel,
pixel_y=>y_pixel,
last_column=>top_last_column,
last_row=>top_last_row,
blank=>top_blank
);
my_seg : seven_segment_display port map(
clk => clk,
data_in => seg_val,
dp_in => "0000",
blank => "0000",
seg => seg,
dp => dp,
an => an
);
process(clk,toggle_x_direction)
begin
if(clk'event and clk='1') then
animation_reg <= animation_reg_next;
l_rect <= l_rect_next;
r_rect <= r_rect_next;
ball_x <= ball_x_next;
ball_y <= ball_y_next;
move_up <= move_up_next;
move_left <= move_left_next;
seg_val <= seg_val_next;
end if;
end process;
----------------------------------------
-- next state logic
----------------------------------------
--------------------
-- Paddles
--------------------
--left paddle
l_rect_next <= l_rect + 2 when move_en = '1' and btn(3) = '1' and l_rect < (470-1-50) else
l_rect - 2 when move_en = '1' and btn(2) = '1' and l_rect > (10+1) else
l_rect;
--right paddle
r_rect_next <= r_rect + 2 when move_en = '1' and btn(1) = '1' and r_rect < (470-1-50) else
r_rect - 2 when move_en = '1' and btn(0) = '1' and r_rect > (10+1) else
r_rect;
--------------------
-- ball
--------------------
move_left_next <= '1' when ball_x = 620 else
'0' when ball_x = 10 else
move_left;
move_up_next <= '1' when ball_y = 460 else
'0' when ball_y = 10 else
move_up;
ball_x_next <= ball_x when move_en = '0' else
ball_x + BALL_SPEED when move_left='0' and move_en='1' else
ball_x - BALL_SPEED when move_left='1' and move_en='1' else
ball_x;
ball_y_next <= ball_y when move_en = '0' else
ball_y + BALL_SPEED when move_up='0' and move_en='1' else
ball_y - BALL_SPEED when move_up='1' and move_en='1' else
ball_y;
--pulses high for one clk cycle when move is enabled.
move_en <= '1' when animation_reg = X"3FFFE" else '0';
--counts up to 3FFFE, then resets to 0.
animation_reg_next <= (others=>'0') when animation_reg=X"3FFFE" else animation_reg + 1;
--------------------
-- RGB paint.
--------------------
color <= RED when unsigned(x_pixel) < 10 or
unsigned(y_pixel) < 10 or
unsigned(x_pixel) > (630-1) or
unsigned(y_pixel) > (470-1)
else
WHITE when unsigned(y_pixel)+BALL_WIDTH > ball_y and
unsigned(y_pixel)-BALL_WIDTH < ball_y and
unsigned(x_pixel)+BALL_WIDTH > ball_x and
unsigned(x_pixel)-BALL_WIDTH < ball_x
else
YELLOW when unsigned(y_pixel) > (l_rect) and --left pong paddle
unsigned(y_pixel) < (l_rect + 50) and
unsigned(x_pixel) > (20-1) and
unsigned(x_pixel) < 27
else
WHITE when unsigned(x_pixel) = 320
else
BLUE when unsigned(y_pixel) > (r_rect) and --right pong paddle
unsigned(y_pixel) < (r_rect + 50) and
unsigned(x_pixel) >(640-20-10-1) and
unsigned(x_pixel) < (640-20-10-1+7)
else
BLACK;
--------------------
-- seven seg
--------------------
seg_val_next <= std_logic_vector(unsigned(seg_val) + 1) when top_last_column='1' and top_last_row='1' and animation_reg(0)='1' else
seg_val;
--------------------
-- blank on blank.
--------------------
red_display <= color(7 downto 5) when top_blank='0' else "000";
green_display <= color(4 downto 2) when top_blank='0' else "000";
blue_display <= color(1 downto 0) when top_blank='0' else "00";
--------------------
-- OFL
--------------------
vgaRed <= red_display;
vgaGreen <= green_display;
vgaBlue <= blue_display;
Hsync <= top_HS;
Vsync <= top_VS;
end Behavioral;
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