print_i2c_it_flags.rs

fn print_i2c_it_flags(b: &stm32f0xx_hal::stm32f0::R<u32, stm32f0xx_hal::stm32f0::Reg<u32, pac::i2c1::_ISR>>) {
    rprintln!("{");
    if b.txe().is_empty() {
        rprintln!("TXE Transmit Data Register Empty");
    }
    if b.txis().is_empty() {
        rprintln!("TXIS Transmit Interrupt Status");
    }
    if b.rxne().is_not_empty() {
        rprintln!("RXNE Receive Data Register Not Empty");
    }
    if b.addr().is_match_() {
        rprintln!("ADDR Address Match");
    }
    if b.nackf().is_nack() {
        rprintln!("NACKF Not Acknowledge Flag");
    }
    if b.stopf().is_stop() {
        rprintln!("STOPF Stop Event Flag")
    }
    if b.tc().is_complete() {
        rprintln!("TC Transfer Complete");
    }
    if b.tcr().is_complete() {
        rprintln!("TCR Transfer Complete Reload")
    }
    if b.berr().is_error() {
        rprintln!("BERR Bus Error");
    }
    if b.arlo().is_lost() {
        rprintln!("ARLO Arbitration Lost");
    }
    if b.ovr().is_overrun() {
        rprintln!("OVR Overrun Error");
    }
    if b.pecerr().is_match_() {
        rprintln!("PECERR is match");
    } else {
        rprintln!("PECERR is no match");
    }
    if b.timeout().is_timeout() {
        rprintln!("TIMEOUT Timeout Flag")
    }
    if b.alert().is_alert() {
        rprintln!("ALERT SMBus Alert Flag");
    }
    if b.busy().is_busy() {
        rprintln!("BUSY Busy Flag");
    }
    if b.dir().is_read() {
        rprintln!("DIR is read");
    } else {
        rprintln!("DIR is write");
    }
    rprintln!("}");
}