gcc 4.9.1 output with -fno-omit-frame-pointer

slp_switch.s

	.align	2
	.thumb
	.thumb_func
	.type	slp_switch, %function
slp_switch:
.LFB133:
	.file 3 "platform/switch_arm32_gcc.h"
	.loc 3 57 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}	@
	.cfi_def_cfa_offset 36
	.cfi_offset 4, -36
	.cfi_offset 5, -32
	.cfi_offset 6, -28
	.cfi_offset 7, -24
	.cfi_offset 8, -20
	.cfi_offset 9, -16
	.cfi_offset 10, -12
	.cfi_offset 11, -8
	.cfi_offset 14, -4
	ldr	r3, .L132	@ tmp122,
	fstmfdd	sp!, {d8, d9, d10, d11, d12, d13, d14, d15}	@,
	.cfi_def_cfa_offset 100
	.cfi_offset 80, -100
	.cfi_offset 81, -96
	.cfi_offset 82, -92
	.cfi_offset 83, -88
	.cfi_offset 84, -84
	.cfi_offset 85, -80
	.cfi_offset 86, -76
	.cfi_offset 87, -72
	.cfi_offset 88, -68
	.cfi_offset 89, -64
	.cfi_offset 90, -60
	.cfi_offset 91, -56
	.cfi_offset 92, -52
	.cfi_offset 93, -48
	.cfi_offset 94, -44
	.cfi_offset 95, -40
	ldr	r2, .L132+4	@ tmp138,
.LPIC12:
	add	r3, pc	@ tmp122
	sub	sp, sp, #20	@,,
	.cfi_def_cfa_offset 120
	ldr	r3, [r3, r2]	@ tmp137,
	add	r7, sp, #0	@,,
	.cfi_def_cfa_register 7
	.loc 3 57 0
	str	r3, [r7, #4]	@ tmp137, %sfp
	ldr	r3, [r3]	@ __stack_chk_guard, __stack_chk_guard
	str	r3, [r7, #12]	@ __stack_chk_guard, D.15166
	.loc 3 60 0
	.loc 3 61 0
#APP
@ 61 "platform/switch_arm32_gcc.h" 1
	mov r0,r7
	str r0,[r7, #8]	@ fp
@ 0 "" 2
	.loc 3 62 0
@ 62 "platform/switch_arm32_gcc.h" 1
	mov r4,sp	@ stackref
@ 0 "" 2
.LVL100:
	.loc 3 64 0
	.thumb
	mov	r0, r4	@, stackref
	bl	slp_save_state(PLT)	@
.LVL101:
	str	r0, [r7]	@ D.15163, %sfp
	cbnz	r0, .L128	@ D.15163,
	.loc 3 64 0 is_stmt 0 discriminator 2
	ldr	r2, .L132+8	@ tmp126,
	movs	r3, #1	@ D.15163,
.LPIC13:
	add	r2, pc	@ tmp126
	ldr	r1, [r2, #4]	@ D.15164, ts_target
	ldr	r1, [r1, #8]	@ _8->stack_start, _8->stack_start
	cbz	r1, .L126	@ _8->stack_start,
	.loc 3 64 0 discriminator 4
	ldr	r2, [r2, #4]	@ D.15164, ts_target
.LVL102:
	ldr	r2, [r2, #8]	@ _10->stack_start, _10->stack_start
.LVL103:
	subs	r0, r2, r4	@ stsizediff, _10->stack_start, stackref
.LVL104:
	.loc 3 65 0 is_stmt 1 discriminator 4
#APP
@ 65 "platform/switch_arm32_gcc.h" 1
	add sp,sp,r0	@ stsizediff
add r7,r7,r0	@ stsizediff

@ 0 "" 2
	.loc 3 71 0 discriminator 4
	.thumb
	bl	slp_restore_state(PLT)	@
.LVL105:
	.loc 3 73 0 discriminator 4
#APP
@ 73 "platform/switch_arm32_gcc.h" 1
	ldr r0,[r7, #8]	@ fp
	mov r7,r0
@ 0 "" 2
	.loc 3 74 0 discriminator 4
.LVL106:
	.loc 3 75 0 discriminator 4
	.thumb
	ldr	r3, [r7]	@ D.15163, %sfp
.L126:
	.loc 3 76 0
	mov	r0, r3	@, D.15163
	ldr	r3, [r7, #4]	@ tmp137, %sfp
	ldr	r2, [r7, #12]	@ D.15166, D.15166
	ldr	r3, [r3]	@ __stack_chk_guard, __stack_chk_guard
	cmp	r2, r3	@ D.15166, __stack_chk_guard
	bne	.L131	@,
	adds	r7, r7, #20	@,,
	.cfi_remember_state
	.cfi_def_cfa_offset 100
	mov	sp, r7	@,
	.cfi_def_cfa_register 13
	@ sp needed	@
	fldmfdd	sp!, {d8-d15}	@,
	.cfi_restore 94
	.cfi_restore 95
	.cfi_restore 92
	.cfi_restore 93
	.cfi_restore 90
	.cfi_restore 91
	.cfi_restore 88
	.cfi_restore 89
	.cfi_restore 86
	.cfi_restore 87
	.cfi_restore 84
	.cfi_restore 85
	.cfi_restore 82
	.cfi_restore 83
	.cfi_restore 80
	.cfi_restore 81
	.cfi_def_cfa_offset 36
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}	@
.LVL107:
.L128:
	.cfi_restore_state
	.loc 3 64 0
	mov	r3, #-1	@ D.15163,
	b	.L126	@
.LVL108:
.L131:
	.loc 3 76 0
	bl	__stack_chk_fail(PLT)	@
.LVL109:
.L133:
	.align	2
.L132:
	.word	_GLOBAL_OFFSET_TABLE_-(.LPIC12+4)
	.word	__stack_chk_guard(GOT)
	.word	.LANCHOR0-(.LPIC13+4)
	.cfi_endproc
.LFE133:
	.size	slp_switch, .-slp_switch