ARM should be relatively straightforward:
You'll need to move the shifting into parse_gpr() and parse_vr() in dasm_arm.lua. These should use waction() to emit a (new) VREG op for dynamic registers. The VREG op needs to know the shift amounts for merging the register number. Note that FPRs require an extra bit at a different shift position.
The VREG code emitter in dasm_arm.h should merge the register numbers at runtime. Note the ordering of the actions is not arbitrary, see the enum at the start.
x64 support is not so simple:
The REX byte needs to be emitted at a very specific place before the opcode and only if one of the extra registers is actually used. I guess you'd need to add a VMARK just before a REX (or the place where a REX would be) for any instruction that uses a dynamic register. Have a look at wputop() and wputmrmsib().
The VREG code emitter should modify an existing REX following the previous VMARK or insert a REX, as needed.
and how much time it would cost approximately. Something with the accuracy from 'a day' to 'a year' would be good enough.
I guess you'd need to find your way around the DynASM code, first. After that ... maybe a day or two for each? Depends on how much you know about the details of the instruction encodings. For x64, I'd recommend to read the AMD manuals and not the Intel manuals