Pokemon Red Bootleg, flash(?) save disassembly

gistfile1.txt

WRA1:DE00 E5               push hl					  
WRA1:DE01 D5               push de
WRA1:DE02 C5               push bc
WRA1:DE03 3E 37            ld   a,$37                 
WRA1:DE05 EA 00 21         ld   [$2100],a       //Change ROM bank
WRA1:DE08 21 00 A0         ld   hl,$A000        //Source Address
WRA1:DE0B 11 00 60         ld   de,$6000        //Destination Address
WRA1:DE0E 3E 0A            ld   a,$0A
WRA1:DE10 EA 00 00         ld   [$0000],a       //Enable Read/write to RAM
WRA1:DE13 3E 01            ld   a,$01
WRA1:DE15 EA 00 60         ld   [$6000],a       //Latch RTC register? wut? Pokemon Gen 1 doesn't use RTC
WRA1:DE18 3E 03            ld   a,$00
WRA1:DE1A EA 00 40         ld   [$4000],a       //change SRAM bank
WRA1:DE1D 7E               ld   a,[hl]				  
WRA1:DE1E 47               ld   b,a             //Load byte from source address (hl) into b
WRA1:DE1F 3E 00            ld   a,$00           //Reset a to 00
WRA1:DE21 EA 00 60         ld   [$6000],a       //More RTC latching? uhhhhh......
WRA1:DE24 EA 00 00         ld   [$0000],a       //Disable read/write to RAM
WRA1:DE27 3E F0            ld   a,$F0				  
WRA1:DE29 EA 00 40         ld   [$4000],a       //F0 into Ram bank number/RTC register select? uhhhhh what?
WRA1:DE2C 00               nop  
WRA1:DE2D 3E A9            ld   a,$A9				  
WRA1:DE2F EA AA 0A         ld   [$0AAA],a       //i don't even....
WRA1:DE32 00               nop  
WRA1:DE33 3E 56            ld   a,$56
WRA1:DE35 EA 55 05         ld   [$0555],a       // what is life
WRA1:DE38 00               nop  
WRA1:DE39 3E A0            ld   a,$A0
WRA1:DE3B EA AA 0A         ld   [$0AAA],a       // who am i
WRA1:DE3E 00               nop  
WRA1:DE3F 78               ld   a,b
WRA1:DE40 12               ld   [de],a          //write content of b (so the byte from the source address) to de (which should be $6000++)..... uhhhh did we just write to rom?
WRA1:DE41 1A               ld   a,[de]          //Read back what we just wrote
WRA1:DE42 A8               xor  b					
WRA1:DE43 CA 49 DE         jp   z,$DE49
WRA1:DE46 C3 41 DE         jp   $DE41           //Only continue when b and content of de are equal (i'm guessing this is because rom/flash is super slow)
WRA1:DE49 23               inc  hl				   	  //Increment source address
WRA1:DE4A 13               inc  de					    //increment destination address
WRA1:DE4B 7C               ld   a,h					 
WRA1:DE4C FE C0            cp   a,$C0				    //Check that we're not stepping into other memory
WRA1:DE4E C2 0E DE         jp   nz,$DE0E			  //We're done when h is $C0 (so we looped from A000-BFFF)
WRA1:DE51 3E F0            ld   a,$F0				  
WRA1:DE53 EA 00 40         ld   [$4000],a			  //i don't get it, $F0 to the ram bank/rtc register again?
WRA1:DE56 C1               pop  bc
WRA1:DE57 D1               pop  de
WRA1:DE58 E1               pop  hl
WRA1:DE59 C9               ret  					  //Return from whatever hell this was made in