Exynos5422 USB 3.0 DRD Controller Register Dump

usb3_reg_dump.c

#include <stdio.h>
#include <stdint.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <sys/mman.h>

#define USB3DRD_3_0_GLOBAL_BASE	0x1200C000
#define USB3DRD_3_1_GLOBAL_BASE	0x1240C000 
#define USB3DRD_3_0_HOST_BASE	0x12000000
#define USB3DRD_3_1_HOST_BASE	0x12400000 
#define USB3DRD_PHY0_BASE	0x12100000
#define USB3DRD_PHY1_BASE	0x12500000 

#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0]))

struct usb_reg {
	char name [64];
	uint32_t offset;
};

struct usb_reg usb_global_regs[] = {
	// Global Register
	{"GSBUSCFG0", 0x0100},
	{"GSBUSCFG1", 0x0104},
	{"GTXTHRCFG", 0x0108},
	{"GRXTHRCFG", 0x010C},
	{"GCTL", 0x0110},
	{"GEVTEN", 0x0114},
	{"GSTS", 0x0118},
	{"GSNPSID", 0x0120},
	{"GGPIO", 0x0124},
	{"GUID", 0x0128},
	{"GUCTL", 0x012C},
	{"GBUSERRADDR1", 0x0130},
	{"GBUSERRADDR2", 0x0134},
	{"GPRTBIMAP1", 0x0138},
	{"GPRTBIMAP2", 0x013C},
	{"GPRTBIMAP_HS1", 0x0180},
	{"GPRTBIMAP_HS2", 0x0184},
	{"GPRTBIMAP_FS1", 0x0188},
	{"GPRTBIMAP_FS2", 0x018C},
	{"GDBGFIFOSPACE", 0x0160},
	{"GDBGLTSSM", 0x0164},
	{"GDBGLNMCC", 0x0168},
	{"GDBGBMU", 0x016C},
	{"GDBGLSPMUX", 0x0170},
	{"GDBGLSP", 0x0174},
	{"GDBGEPINFO0", 0x0178},
	{"GDBGEPINFO1", 0x017C},
	{"GUSB2PHYCFGn", 0x0200},
	{"GUSB2I2CCTLn", 0x0240},
	{"GUSB2PHYACCn", 0x0280},
	{"GUSB3PIPECTLn", 0x02C0},
	{"GTXFIFOSIZn", 0x0300},
	{"GRXFIFOSIZn", 0x0380},
	{"GEVNTADRn", 0x0400},
	{"GEVNTSIZn", 0x0408},
	{"GEVNTCOUNTn", 0x040C},
	// Device Register
	{"DCFG", 0x0700},
	{"DCTL", 0x0704},
	{"DEVTEN", 0x0708},
	{"DSTS", 0x070C},
	{"DGCMDPAR", 0x0710},
	{"DGCMD", 0x0714},
	// Device Endpoint Register
	{"DALEPENA", 0x0720},
	{"DEPCMDPAR2n", 0x0800},
	{"DEPCMDPAR1n", 0x0804},
	{"DEPCMDPAR0n", 0x0808},
	{"DEPCMDn", 0x080C},
};

struct usb_reg usb_host_regs[] = {
	// xHCI Host Register
	{"HCIVERSION", 0x0000},
	{"HCSPARAMS1", 0x0004},
	{"HCSPARAMS2", 0x0008},
	{"HCSPARAMS3", 0x000C},
	{"HCCPARAMS", 0x0010},
	{"DBOFF", 0x0014},
	{"RTSOFF", 0x0018},
};

struct usb_reg usb_phy_regs[] = {
	// PHY Control Register
	{"PHY UTMI", 0x0008},
	{"PHY PIPE", 0x000C},
	{"PHYCLKRST", 0x0010},
	{"PHYREG0", 0x0014},
	{"PHYREG1", 0x0018},
	{"PHYPARAM0", 0x001C},
	{"PHYPARAM1", 0x0020},
	{"PHYTERM", 0x0024},
	{"PHYTEST", 0x0028},
	{"LINKHCBELT", 0x0040},
	{"LINKPORT", 0x0044},
};

int main(void)
{
	int i = 0;
	int fd = 0;
	volatile uint32_t *usb_global0_reg = NULL;
	volatile uint32_t *usb_global1_reg = NULL;
	volatile uint32_t *usb_host0_reg = NULL;
	volatile uint32_t *usb_host1_reg = NULL;
	volatile uint32_t *usb_phy0_reg = NULL;
	volatile uint32_t *usb_phy1_reg = NULL;

	if ((fd = open ("/dev/mem", O_RDWR | O_SYNC | O_CLOEXEC) ) < 0) {
		fprintf(stderr, "Failed open /dev/mem file!\n");
		return -1;
	}

	usb_global0_reg = (uint32_t *)mmap(0, 0x1000, PROT_READ|PROT_WRITE, MAP_SHARED, fd, USB3DRD_3_0_GLOBAL_BASE) ;
	if ((uint32_t)usb_global0_reg == -1) {
		fprintf(stderr, "Failed mmap USB3DRD_3_0_GLOBAL_BASE!\n");
		return -1;
	}

	usb_global1_reg = (uint32_t *)mmap(0, 0x1000, PROT_READ|PROT_WRITE, MAP_SHARED, fd, USB3DRD_3_1_GLOBAL_BASE) ;
	if ((uint32_t)usb_global1_reg == -1) {
		fprintf(stderr, "Failed mmap USB3DRD_3_1_GLOBAL_BASE!\n");
		return -1;
	}

	usb_host0_reg = (uint32_t *)mmap(0, 0x1000, PROT_READ|PROT_WRITE, MAP_SHARED, fd, USB3DRD_3_0_HOST_BASE) ;
	if ((uint32_t)usb_host0_reg == -1) {
		fprintf(stderr, "Failed mmap USB3DRD_3_0_HOST_BASE!\n");
		return -1;
	}

	usb_host1_reg = (uint32_t *)mmap(0, 0x1000, PROT_READ|PROT_WRITE, MAP_SHARED, fd, USB3DRD_3_1_HOST_BASE) ;
	if ((uint32_t)usb_host1_reg == -1) {
		fprintf(stderr, "Failed mmap USB3DRD_3_1_HOST_BASE!\n");
		return -1;
	}

	usb_phy0_reg = (uint32_t *)mmap(0, 0x1000, PROT_READ|PROT_WRITE, MAP_SHARED, fd, USB3DRD_PHY0_BASE) ;
	if ((uint32_t)usb_phy0_reg == -1) {
		fprintf(stderr, "Failed mmap USB3DRD_PHY0_BASE!\n");
		return -1;
	}

	usb_phy1_reg = (uint32_t *)mmap(0, 0x1000, PROT_READ|PROT_WRITE, MAP_SHARED, fd, USB3DRD_PHY1_BASE) ;
	if ((uint32_t)usb_phy1_reg == -1) {
		fprintf(stderr, "Failed mmap USB3DRD_PHY1_BASE!\n");
		return -1;
	}

	printf("<USB3DRD 3-0 Global Registers>\n");
	for (i = 0;i < ARRAY_SIZE(usb_global_regs); ++i)
		printf("%s[0x%.8X]: 0x%.8X\n", usb_global_regs[i].name, USB3DRD_3_0_GLOBAL_BASE + usb_global_regs[i].offset,
				*((volatile uint32_t *)((char *)usb_global0_reg + usb_global_regs[i].offset)));
	
	printf("\n<USB3DRD 3-1 Global Registers>\n");
	for (i = 0;i < ARRAY_SIZE(usb_global_regs); ++i)
		printf("%s[0x%.8X]: 0x%.8X\n", usb_global_regs[i].name, USB3DRD_3_1_GLOBAL_BASE + usb_global_regs[i].offset,
				*((volatile uint32_t *)((char *)usb_global1_reg + usb_global_regs[i].offset)));

	printf("\n<USB3DRD 3-0 HOST Registers>\n");
	for (i = 0;i < ARRAY_SIZE(usb_host_regs); ++i)
		printf("%s[0x%.8X]: 0x%.8X\n", usb_host_regs[i].name, USB3DRD_3_0_HOST_BASE + usb_host_regs[i].offset,
				*((volatile uint32_t *)((char *)usb_host0_reg + usb_host_regs[i].offset)));

	printf("\n<USB3DRD 3-1 HOST Registers>\n");
	for (i = 0;i < ARRAY_SIZE(usb_host_regs); ++i)
		printf("%s[0x%.8X]: 0x%.8X\n", usb_host_regs[i].name, USB3DRD_3_1_HOST_BASE + usb_host_regs[i].offset,
				*((volatile uint32_t *)((char *)usb_host1_reg + usb_host_regs[i].offset)));

	printf("\n<USB3DRD PHY 0 Registers>\n");
	for (i = 0;i < ARRAY_SIZE(usb_phy_regs); ++i)
		printf("%s[0x%.8X]: 0x%.8X\n", usb_phy_regs[i].name, USB3DRD_PHY0_BASE + usb_phy_regs[i].offset,
				*((volatile uint32_t *)((char *)usb_phy0_reg + usb_phy_regs[i].offset)));

	printf("\n<USB3DRD PHY 1 Registers>\n");
	for (i = 0;i < ARRAY_SIZE(usb_phy_regs); ++i)
		printf("%s[0x%.8X]: 0x%.8X\n", usb_phy_regs[i].name, USB3DRD_PHY1_BASE + usb_phy_regs[i].offset,
				*((volatile uint32_t *)((char *)usb_phy1_reg + usb_phy_regs[i].offset)));
	return 0;
}