Created
May 20, 2010 03:05
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Maple overclocking hack
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// Overclocking demo, written 05/19/2010 by bnewbold for leaflabs | |
// THIS COULD BRICK YOUR BOARD! OVERCLOCKING IS A HACK NOT A FEATURE! | |
// This code is in the public domain for all intents and purposes. | |
// Intended for use with libmaple on a Maple board. Concept from Thomas | |
// Jespersen: http://elec.tkjweb.dk/blog/2010/02/stm32-overclocking/ | |
#include "wirish.h" | |
#include "usb.h" | |
#include "rcc.h" | |
void overclock(void); | |
void overclock(void) { | |
uint32 cfgr; | |
// configure and set direct HSI as system clock to modify PLL conf | |
__set_bits(RCC_CR, 0x1); // RCC_CR_HSION | |
while (!__get_bits(RCC_CR, 0x2)) { // RCC_CR_HSIRDY | |
asm volatile("nop"); | |
} | |
cfgr = __read(RCC_CFGR); | |
__write(RCC_CFGR, cfgr & ~(0x3)); | |
while (__get_bits(RCC_CFGR, 0x0000000F) != 0x00) { | |
asm volatile("nop"); | |
} | |
__clear_bits(RCC_CR, PLLON); | |
while(__get_bits(RCC_CR, PLLRDY)) { | |
asm volatile("nop"); | |
} | |
cfgr = __read(RCC_CFGR); | |
cfgr &= (~PLLMUL | PLL_INPUT_CLK_HSE); | |
// pll multiplier 9, input clock hse | |
//__write(RCC_CFGR, cfgr | PLL_MUL_9 | PLL_INPUT_CLK_HSE); | |
// pll multiplier 16, input clock hse | |
__write(RCC_CFGR, cfgr | 0x003C0000 | PLL_INPUT_CLK_HSE); | |
// enable pll | |
__set_bits(RCC_CR, PLLON); | |
while(!__get_bits(RCC_CR, PLLRDY)) { | |
asm volatile("nop"); | |
} | |
// select pll for system clock source | |
cfgr = __read(RCC_CFGR); | |
cfgr &= ~RCC_CFGR_SWS; | |
__write(RCC_CFGR, cfgr | RCC_CFGR_SWS_PLL); | |
while (__get_bits(RCC_CFGR, 0x00000008) != 0x8) { | |
asm volatile("nop"); | |
} | |
} | |
void setup() | |
{ | |
overclock(); | |
pinMode(8, OUTPUT); | |
} | |
void loop() { | |
digitalWrite(8, 1); | |
digitalWrite(8, 0); | |
digitalWrite(8, 1); | |
digitalWrite(8, 0); | |
delay(10); | |
} | |
int main(void) { | |
init(); | |
setup(); | |
while (1) { | |
loop(); | |
} | |
return 0; | |
} |
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