Skip to content

Instantly share code, notes, and snippets.

@buserror
Created Mar 1, 2017
Embed
What would you like to do?
For Sprity
static const void * jt[342] = {
[0x0000]= &&f0000,
[0x0001]= &&f0002,
[0x0002]= &&f0004,
[0x0003]= &&f0006,
[0x0004]= &&f0008,
[0x0005]= &&f000a,
[0x0006]= &&f000c,
[0x0007]= &&f000e,
[0x0008]= &&f0010,
[0x0009]= &&f0012,
[0x000a]= &&f0014,
[0x000b]= &&f0016,
[0x000c]= &&f0018,
[0x000d]= &&f001a,
[0x000e]= &&f001c,
[0x000f]= &&f001e,
[0x0010]= &&f0020,
[0x0011]= &&f0022,
[0x0012]= &&f0024,
[0x0013]= &&f0026,
[0x0014]= &&f0028,
[0x0015]= &&f002a,
[0x0016]= &&f002c,
[0x0017]= &&f002e,
[0x0018]= &&f0030,
[0x0019]= &&f0032,
[0x001a]= &&f0034,
[0x001b]= &&f0036,
[0x001c]= &&f0038,
[0x001d]= &&f003a,
[0x001e]= &&f003c,
[0x001f]= &&f003e,
[0x0020]= &&f0040,
[0x0021]= &&f0042,
[0x0022]= &&f0044,
[0x0023]= &&f0046,
[0x0024]= &&f0048,
[0x0025]= &&f004a,
[0x0026]= &&f004c,
[0x0027]= &&f004e,
[0x0028]= &&f0050,
[0x0029]= &&f0052,
[0x002a]= &&f0054,
[0x002b]= &&f0056,
[0x002c]= &&f0058,
[0x002d]= &&f005a,
[0x002e]= &&f005c,
[0x002f]= &&f005e,
[0x0030]= &&f0060,
[0x0031]= &&f0062,
[0x0032]= &&f0064,
[0x0033]= &&f0066,
[0x0034]= &&f0068,
[0x0035]= &&f006a,
[0x0036]= &&f006c,
[0x0037]= &&f006e,
[0x0038]= &&f0070,
[0x0039]= &&f0072,
[0x003a]= &&f0074,
[0x003b]= &&f0076,
[0x003c]= &&f0078,
[0x003e]= &&f007c,
[0x003f]= &&f007e,
[0x0040]= &&f0080,
[0x0042]= &&f0084,
[0x0043]= &&f0086,
[0x0044]= &&f0088,
[0x0045]= &&f008a,
[0x0046]= &&f008c,
[0x0047]= &&f008e,
[0x0048]= &&f0090,
[0x0049]= &&f0092,
[0x004a]= &&f0094,
[0x004b]= &&f0096,
[0x004c]= &&f0098,
[0x004d]= &&f009a,
[0x004e]= &&f009c,
[0x004f]= &&f009e,
[0x0050]= &&f00a0,
[0x0051]= &&f00a2,
[0x0052]= &&f00a4,
[0x0053]= &&f00a6,
[0x0054]= &&f00a8,
[0x0055]= &&f00aa,
[0x0056]= &&f00ac,
[0x0057]= &&f00ae,
[0x0058]= &&f00b0,
[0x0059]= &&f00b2,
[0x005a]= &&f00b4,
[0x005b]= &&f00b6,
[0x005c]= &&f00b8,
[0x005d]= &&f00ba,
[0x005e]= &&f00bc,
[0x005f]= &&f00be,
[0x0060]= &&f00c0,
[0x0061]= &&f00c2,
[0x0062]= &&f00c4,
[0x0063]= &&f00c6,
[0x0064]= &&f00c8,
[0x0065]= &&f00ca,
[0x0066]= &&f00cc,
[0x0067]= &&f00ce,
[0x0068]= &&f00d0,
[0x0069]= &&f00d2,
[0x006a]= &&f00d4,
[0x006b]= &&f00d6,
[0x006c]= &&f00d8,
[0x006d]= &&f00da,
[0x006e]= &&f00dc,
[0x006f]= &&f00de,
[0x0070]= &&f00e0,
[0x0071]= &&f00e2,
[0x0072]= &&f00e4,
[0x0073]= &&f00e6,
[0x0074]= &&f00e8,
[0x0075]= &&f00ea,
[0x0076]= &&f00ec,
[0x0077]= &&f00ee,
[0x0078]= &&f00f0,
[0x0079]= &&f00f2,
[0x007a]= &&f00f4,
[0x007b]= &&f00f6,
[0x007c]= &&f00f8,
[0x007d]= &&f00fa,
[0x007e]= &&f00fc,
[0x007f]= &&f00fe,
[0x0080]= &&f0100,
[0x0081]= &&f0102,
[0x0082]= &&f0104,
[0x0083]= &&f0106,
[0x0084]= &&f0108,
[0x0085]= &&f010a,
[0x0086]= &&f010c,
[0x0087]= &&f010e,
[0x0088]= &&f0110,
[0x0089]= &&f0112,
[0x008a]= &&f0114,
[0x008b]= &&f0116,
[0x008c]= &&f0118,
[0x008d]= &&f011a,
[0x008e]= &&f011c,
[0x008f]= &&f011e,
[0x0090]= &&f0120,
[0x0091]= &&f0122,
[0x0092]= &&f0124,
[0x0093]= &&f0126,
[0x0094]= &&f0128,
[0x0095]= &&f012a,
[0x0096]= &&f012c,
[0x0097]= &&f012e,
[0x0098]= &&f0130,
[0x0099]= &&f0132,
[0x009a]= &&f0134,
[0x009b]= &&f0136,
[0x009c]= &&f0138,
[0x009d]= &&f013a,
[0x009e]= &&f013c,
[0x009f]= &&f013e,
[0x00a0]= &&f0140,
[0x00a1]= &&f0142,
[0x00a2]= &&f0144,
[0x00a3]= &&f0146,
[0x00a4]= &&f0148,
[0x00a5]= &&f014a,
[0x00a6]= &&f014c,
[0x00a7]= &&f014e,
[0x00a8]= &&f0150,
[0x00a9]= &&f0152,
[0x00aa]= &&f0154,
[0x00ab]= &&f0156,
[0x00ac]= &&f0158,
[0x00ad]= &&f015a,
[0x00ae]= &&f015c,
[0x00af]= &&f015e,
[0x00b0]= &&f0160,
[0x00b1]= &&f0162,
[0x00b2]= &&f0164,
[0x00b3]= &&f0166,
[0x00b4]= &&f0168,
[0x00b5]= &&f016a,
[0x00b6]= &&f016c,
[0x00b7]= &&f016e,
[0x00b8]= &&f0170,
[0x00b9]= &&f0172,
[0x00ba]= &&f0174,
[0x00bb]= &&f0176,
[0x00bc]= &&f0178,
[0x00bd]= &&f017a,
[0x00be]= &&f017c,
[0x00bf]= &&f017e,
[0x00c0]= &&f0180,
[0x00c1]= &&f0182,
[0x00c2]= &&f0184,
[0x00c3]= &&f0186,
[0x00c4]= &&f0188,
[0x00c5]= &&f018a,
[0x00c6]= &&f018c,
[0x00c7]= &&f018e,
[0x00c8]= &&f0190,
[0x00c9]= &&f0192,
[0x00ca]= &&f0194,
[0x00cb]= &&f0196,
[0x00cc]= &&f0198,
[0x00cd]= &&f019a,
[0x00ce]= &&f019c,
[0x00cf]= &&f019e,
[0x00d0]= &&f01a0,
[0x00d1]= &&f01a2,
[0x00d2]= &&f01a4,
[0x00d3]= &&f01a6,
[0x00d4]= &&f01a8,
[0x00d5]= &&f01aa,
[0x00d6]= &&f01ac,
[0x00d7]= &&f01ae,
[0x00d8]= &&f01b0,
[0x00d9]= &&f01b2,
[0x00da]= &&f01b4,
[0x00db]= &&f01b6,
[0x00dc]= &&f01b8,
[0x00dd]= &&f01ba,
[0x00de]= &&f01bc,
[0x00df]= &&f01be,
[0x00e0]= &&f01c0,
[0x00e1]= &&f01c2,
[0x00e2]= &&f01c4,
[0x00e3]= &&f01c6,
[0x00e4]= &&f01c8,
[0x00e5]= &&f01ca,
[0x00e6]= &&f01cc,
[0x00e7]= &&f01ce,
[0x00e8]= &&f01d0,
[0x00e9]= &&f01d2,
[0x00ea]= &&f01d4,
[0x00eb]= &&f01d6,
[0x00ec]= &&f01d8,
[0x00ed]= &&f01da,
[0x00ee]= &&f01dc,
[0x00ef]= &&f01de,
[0x00f0]= &&f01e0,
[0x00f1]= &&f01e2,
[0x00f2]= &&f01e4,
[0x00f3]= &&f01e6,
[0x00f4]= &&f01e8,
[0x00f5]= &&f01ea,
[0x00f6]= &&f01ec,
[0x00f7]= &&f01ee,
[0x00f8]= &&f01f0,
[0x00f9]= &&f01f2,
[0x00fa]= &&f01f4,
[0x00fb]= &&f01f6,
[0x00fc]= &&f01f8,
[0x00fd]= &&f01fa,
[0x00fe]= &&f01fc,
[0x00ff]= &&f01fe,
[0x0100]= &&f0200,
[0x0101]= &&f0202,
[0x0102]= &&f0204,
[0x0103]= &&f0206,
[0x0104]= &&f0208,
[0x0105]= &&f020a,
[0x0106]= &&f020c,
[0x0107]= &&f020e,
[0x0108]= &&f0210,
[0x0109]= &&f0212,
[0x010a]= &&f0214,
[0x010b]= &&f0216,
[0x010c]= &&f0218,
[0x010d]= &&f021a,
[0x010e]= &&f021c,
[0x010f]= &&f021e,
[0x0110]= &&f0220,
[0x0111]= &&f0222,
[0x0112]= &&f0224,
[0x0113]= &&f0226,
[0x0114]= &&f0228,
[0x0115]= &&f022a,
[0x0116]= &&f022c,
[0x0117]= &&f022e,
[0x0118]= &&f0230,
[0x0119]= &&f0232,
[0x011a]= &&f0234,
[0x011b]= &&f0236,
[0x011c]= &&f0238,
[0x011d]= &&f023a,
[0x011e]= &&f023c,
[0x011f]= &&f023e,
[0x0120]= &&f0240,
[0x0121]= &&f0242,
[0x0122]= &&f0244,
[0x0123]= &&f0246,
[0x0124]= &&f0248,
[0x0125]= &&f024a,
[0x0126]= &&f024c,
[0x0127]= &&f024e,
[0x0128]= &&f0250,
[0x0129]= &&f0252,
[0x012a]= &&f0254,
[0x012b]= &&f0256,
[0x012c]= &&f0258,
[0x012d]= &&f025a,
[0x012e]= &&f025c,
[0x012f]= &&f025e,
[0x0130]= &&f0260,
[0x0131]= &&f0262,
[0x0132]= &&f0264,
[0x0133]= &&f0266,
[0x0134]= &&f0268,
[0x0135]= &&f026a,
[0x0136]= &&f026c,
[0x0137]= &&f026e,
[0x0138]= &&f0270,
[0x0139]= &&f0272,
[0x013a]= &&f0274,
[0x013b]= &&f0276,
[0x013c]= &&f0278,
[0x013d]= &&f027a,
[0x013e]= &&f027c,
[0x013f]= &&f027e,
[0x0140]= &&f0280,
[0x0141]= &&f0282,
[0x0142]= &&f0284,
[0x0143]= &&f0286,
[0x0144]= &&f0288,
[0x0145]= &&f028a,
[0x0146]= &&f028c,
[0x0147]= &&f028e,
[0x0148]= &&f0290,
[0x0149]= &&f0292,
[0x014a]= &&f0294,
[0x014b]= &&f0296,
[0x014c]= &&f0298,
[0x014d]= &&f029a,
[0x014e]= &&f029c,
[0x014f]= &&f029e,
[0x0150]= &&f02a0,
[0x0151]= &&f02a2,
[0x0152]= &&f02a4,
[0x0153]= &&f02a6,
[0x0154]= &&f02a8,
[0x0155]= &&f02aa,
};
TRACE_JUMP();
f0000: {
const uint16_t opcode = 0xc019;
cycle++;new_pc = 0x0000 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0002: {
const uint16_t opcode = 0xc033;
cycle++;new_pc = 0x0002 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0004: {
const uint16_t opcode = 0xc032;
cycle++;new_pc = 0x0004 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0006: {
const uint16_t opcode = 0xc031;
cycle++;new_pc = 0x0006 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0008: {
const uint16_t opcode = 0xc030;
cycle++;new_pc = 0x0008 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f000a: {
const uint16_t opcode = 0xc02f;
cycle++;new_pc = 0x000a + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f000c: {
const uint16_t opcode = 0xc02e;
cycle++;new_pc = 0x000c + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f000e: {
const uint16_t opcode = 0xc02d;
cycle++;new_pc = 0x000e + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0010: {
const uint16_t opcode = 0xc02c;
cycle++;new_pc = 0x0010 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0012: {
const uint16_t opcode = 0xc02b;
cycle++;new_pc = 0x0012 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0014: {
const uint16_t opcode = 0xc02a;
cycle++;new_pc = 0x0014 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0016: {
const uint16_t opcode = 0xc029;
cycle++;new_pc = 0x0016 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0018: {
const uint16_t opcode = 0xc028;
cycle++;new_pc = 0x0018 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f001a: {
const uint16_t opcode = 0xc027;
cycle++;new_pc = 0x001a + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f001c: {
const uint16_t opcode = 0xc026;
cycle++;new_pc = 0x001c + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f001e: {
const uint16_t opcode = 0xc025;
cycle++;new_pc = 0x001e + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0020: {
const uint16_t opcode = 0xc024;
cycle++;new_pc = 0x0020 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0022: {
const uint16_t opcode = 0xc023;
cycle++;new_pc = 0x0022 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0024: {
const uint16_t opcode = 0xc022;
cycle++;new_pc = 0x0024 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0026: {
const uint16_t opcode = 0xc021;
cycle++;new_pc = 0x0026 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0028: {
const uint16_t opcode = 0xc020;
cycle++;new_pc = 0x0028 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f002a: {
const uint16_t opcode = 0xc01f;
cycle++;new_pc = 0x002a + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f002c: {
const uint16_t opcode = 0xc01e;
cycle++;new_pc = 0x002c + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f002e: {
const uint16_t opcode = 0xc01d;
cycle++;new_pc = 0x002e + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0030: {
const uint16_t opcode = 0xc01c;
cycle++;new_pc = 0x0030 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0032: {
const uint16_t opcode = 0xc01b;
cycle++;new_pc = 0x0032 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0034: {
const uint16_t opcode = 0x2411;
cycle++;new_pc = 0x0034 + 2;
get_vd5_vr5(opcode);
uint8_t res = vd ^ vr;
if (r==d) {
} else {
}
_avr_set_r(avr, d, res);
_avr_flags_znv0s(avr, res);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0036: {
const uint16_t opcode = 0xbe1f;
cycle++;new_pc = 0x0036 + 2;
get_d5_a6(opcode);
_avr_set_ram(avr, A, avr_data[d]);
if (*is || cycle >= howLong) goto exit;
}
f0038: {
const uint16_t opcode = 0xefcf;
cycle++;new_pc = 0x0038 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f003a: {
const uint16_t opcode = 0xe0d4;
cycle++;new_pc = 0x003a + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f003c: {
const uint16_t opcode = 0xbfde;
cycle++;new_pc = 0x003c + 2;
get_d5_a6(opcode);
_avr_set_ram(avr, A, avr_data[d]);
if (*is || cycle >= howLong) goto exit;
}
f003e: {
const uint16_t opcode = 0xbfcd;
cycle++;new_pc = 0x003e + 2;
get_d5_a6(opcode);
_avr_set_ram(avr, A, avr_data[d]);
if (*is || cycle >= howLong) goto exit;
}
f0040: {
const uint16_t opcode = 0xe011;
cycle++;new_pc = 0x0040 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0042: {
const uint16_t opcode = 0xe0a0;
cycle++;new_pc = 0x0042 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0044: {
const uint16_t opcode = 0xe0b1;
cycle++;new_pc = 0x0044 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0046: {
const uint16_t opcode = 0xeaec;
cycle++;new_pc = 0x0046 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0048: {
const uint16_t opcode = 0xe0f2;
cycle++;new_pc = 0x0048 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f004a: {
const uint16_t opcode = 0xc002;
cycle++;new_pc = 0x004a + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f004c: {
const uint16_t opcode = 0x9005;
cycle++;new_pc = 0x004c + 2;
get_d5(opcode);
uint16_t z = avr_data[R_ZL] | (avr_data[R_ZH] << 8);
int op = opcode & 1;
_avr_set_r(avr, d, avr_flash[z]);
if (op)
_avr_set_r16le_hl(avr, R_ZL, z + 1);
cycle += 2; // 3 cycles
if (*is || cycle >= howLong) goto exit;
}
f004e: {
const uint16_t opcode = 0x920d;
cycle++;new_pc = 0x004e + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f0050: {
const uint16_t opcode = 0x32a4;
cycle++;new_pc = 0x0050 + 2;
get_vh4_k8(opcode);
uint8_t res = vh - k;
_avr_flags_sub_zns(avr, res, vh, k);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0052: {
const uint16_t opcode = 0x07b1;
cycle++;new_pc = 0x0052 + 2;
get_vd5_vr5(opcode);
uint8_t res = vd - vr - SREG_BIT(S_C);
_avr_flags_sub_Rzns(avr, res, vd, vr);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0054: {
const uint16_t opcode = 0xf7d9;
cycle++;new_pc = 0x0054 + 2;
int16_t o = ((int16_t)(opcode << 6)) >> 9; // offset
uint8_t s = opcode & 7;
int set = (opcode & 0x0400) == 0; // this bit means BRXC otherwise BRXS
int branch = (SREG_BIT(s) && set) || (!SREG_BIT(s) && !set);
#ifdef CONFIG_SIMAVR_TRACE
if (brxc_names[set][s]) {
} else {
}
#endif
if (branch) {
cycle++; // 2 cycles if taken, 1 otherwise
new_pc = new_pc + (o << 1);
TRACE_JUMP();
}
if (*is || cycle >= howLong) goto exit;
}
f0056: {
const uint16_t opcode = 0xe011;
cycle++;new_pc = 0x0056 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0058: {
const uint16_t opcode = 0xe2a4;
cycle++;new_pc = 0x0058 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f005a: {
const uint16_t opcode = 0xe0b1;
cycle++;new_pc = 0x005a + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f005c: {
const uint16_t opcode = 0xc001;
cycle++;new_pc = 0x005c + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f005e: {
const uint16_t opcode = 0x921d;
cycle++;new_pc = 0x005e + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f0060: {
const uint16_t opcode = 0x3ca3;
cycle++;new_pc = 0x0060 + 2;
get_vh4_k8(opcode);
uint8_t res = vh - k;
_avr_flags_sub_zns(avr, res, vh, k);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0062: {
const uint16_t opcode = 0x07b1;
cycle++;new_pc = 0x0062 + 2;
get_vd5_vr5(opcode);
uint8_t res = vd - vr - SREG_BIT(S_C);
_avr_flags_sub_Rzns(avr, res, vd, vr);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0064: {
const uint16_t opcode = 0xf7e1;
cycle++;new_pc = 0x0064 + 2;
int16_t o = ((int16_t)(opcode << 6)) >> 9; // offset
uint8_t s = opcode & 7;
int set = (opcode & 0x0400) == 0; // this bit means BRXC otherwise BRXS
int branch = (SREG_BIT(s) && set) || (!SREG_BIT(s) && !set);
#ifdef CONFIG_SIMAVR_TRACE
if (brxc_names[set][s]) {
} else {
}
#endif
if (branch) {
cycle++; // 2 cycles if taken, 1 otherwise
new_pc = new_pc + (o << 1);
TRACE_JUMP();
}
if (*is || cycle >= howLong) goto exit;
}
f0066: {
const uint16_t opcode = 0xd061;
cycle++;new_pc = 0x0066 + 2;
get_o12(opcode);
cycle += _avr_push_addr(avr, new_pc);
new_pc = (new_pc + o) % (avr_flashend + 1);
// 'rcall .1' is used as a cheap "push 16 bits of room on the stack"
if (o != 0) {
TRACE_JUMP();
STACK_FRAME_PUSH();
}
if (*is || cycle >= howLong) goto exit;
}
f0068: {
const uint16_t opcode = 0xc11f;
cycle++;new_pc = 0x0068 + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f006a: {
const uint16_t opcode = 0xcfca;
cycle++;new_pc = 0x006a + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f006c: {
const uint16_t opcode = 0x93cf;
cycle++;new_pc = 0x006c + 2;
get_vd5(opcode);
_avr_push8(avr, vd);
T(uint16_t sp = _avr_sp_get(avr);)
cycle++;
if (*is || cycle >= howLong) goto exit;
}
f006e: {
const uint16_t opcode = 0x2fc8;
cycle++;new_pc = 0x006e + 2;
get_d5_vr5(opcode);
uint8_t res = vr;
_avr_set_r(avr, d, res);
if (*is || cycle >= howLong) goto exit;
}
f0070: {
const uint16_t opcode = 0x308a;
cycle++;new_pc = 0x0070 + 2;
get_vh4_k8(opcode);
uint8_t res = vh - k;
_avr_flags_sub_zns(avr, res, vh, k);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0072: {
const uint16_t opcode = 0xf411;
cycle++;new_pc = 0x0072 + 2;
int16_t o = ((int16_t)(opcode << 6)) >> 9; // offset
uint8_t s = opcode & 7;
int set = (opcode & 0x0400) == 0; // this bit means BRXC otherwise BRXS
int branch = (SREG_BIT(s) && set) || (!SREG_BIT(s) && !set);
#ifdef CONFIG_SIMAVR_TRACE
if (brxc_names[set][s]) {
} else {
}
#endif
if (branch) {
cycle++; // 2 cycles if taken, 1 otherwise
new_pc = new_pc + (o << 1);
TRACE_JUMP();
}
if (*is || cycle >= howLong) goto exit;
}
f0074: {
const uint16_t opcode = 0xe08d;
cycle++;new_pc = 0x0074 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0076: {
const uint16_t opcode = 0xdffa;
cycle++;new_pc = 0x0076 + 2;
get_o12(opcode);
cycle += _avr_push_addr(avr, new_pc);
new_pc = (new_pc + o) % (avr_flashend + 1);
// 'rcall .1' is used as a cheap "push 16 bits of room on the stack"
if (o != 0) {
TRACE_JUMP();
STACK_FRAME_PUSH();
}
if (*is || cycle >= howLong) goto exit;
}
f0078: {
const uint16_t opcode = 0x9180;
cycle++;new_pc = 0x0078 + 2;
get_d5(opcode);
uint16_t x = _avr_flash_read16le(avr, new_pc);
new_pc += 2;
_avr_set_r(avr, d, _avr_get_ram(avr, x));
cycle++; // 2 cycles
if (*is || cycle >= howLong) goto exit;
}
f007c: {
const uint16_t opcode = 0xff85;
cycle++;new_pc = 0x007c + 2;
const int skip = 1;
get_vd5_s3_mask(opcode);
int set = (opcode & 0x0200) != 0;
int branch = ((vd & mask) && set) || (!(vd & mask) && !set);
if (branch) {
new_pc += 2 * skip; cycle += skip;
TRACE_JUMP();
}
if (*is || cycle >= howLong) goto exit;
}
f007e: {
const uint16_t opcode = 0xcffc;
cycle++;new_pc = 0x007e + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0080: {
const uint16_t opcode = 0x93c0;
cycle++;new_pc = 0x0080 + 2;
get_vd5(opcode);
uint16_t x = _avr_flash_read16le(avr, new_pc);
new_pc += 2;
cycle++;
_avr_set_ram(avr, x, vd);
if (*is || cycle >= howLong) goto exit;
}
f0084: {
const uint16_t opcode = 0xe080;
cycle++;new_pc = 0x0084 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0086: {
const uint16_t opcode = 0xe090;
cycle++;new_pc = 0x0086 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0088: {
const uint16_t opcode = 0x91cf;
cycle++;new_pc = 0x0088 + 2;
get_d5(opcode);
_avr_set_r(avr, d, _avr_pop8(avr));
T(uint16_t sp = _avr_sp_get(avr);)
cycle++;
if (*is || cycle >= howLong) goto exit;
}
f008a: {
const uint16_t opcode = 0x9508;
cycle++;new_pc = 0x008a + 2;
if (opcode == 0x9518) {
SREG_SETBIT(S_I, 1);
avr_interrupt_reti(avr);
}
new_pc = _avr_pop_addr(avr);
cycle += 1 + avr_address_size;
TRACE_JUMP();
STACK_FRAME_POP();
if (*is || cycle >= howLong) goto exit;
}
f008c: {
const uint16_t opcode = 0x93cf;
cycle++;new_pc = 0x008c + 2;
get_vd5(opcode);
_avr_push8(avr, vd);
T(uint16_t sp = _avr_sp_get(avr);)
cycle++;
if (*is || cycle >= howLong) goto exit;
}
f008e: {
const uint16_t opcode = 0x93df;
cycle++;new_pc = 0x008e + 2;
get_vd5(opcode);
_avr_push8(avr, vd);
T(uint16_t sp = _avr_sp_get(avr);)
cycle++;
if (*is || cycle >= howLong) goto exit;
}
f0090: {
const uint16_t opcode = 0xd000;
cycle++;new_pc = 0x0090 + 2;
get_o12(opcode);
cycle += _avr_push_addr(avr, new_pc);
new_pc = (new_pc + o) % (avr_flashend + 1);
// 'rcall .1' is used as a cheap "push 16 bits of room on the stack"
if (o != 0) {
TRACE_JUMP();
STACK_FRAME_PUSH();
}
if (*is || cycle >= howLong) goto exit;
}
f0092: {
const uint16_t opcode = 0xb7cd;
cycle++;new_pc = 0x0092 + 2;
get_d5_a6(opcode);
_avr_set_r(avr, d, _avr_get_ram(avr, A));
if (*is || cycle >= howLong) goto exit;
}
f0094: {
const uint16_t opcode = 0xb7de;
cycle++;new_pc = 0x0094 + 2;
get_d5_a6(opcode);
_avr_set_r(avr, d, _avr_get_ram(avr, A));
if (*is || cycle >= howLong) goto exit;
}
f0096: {
const uint16_t opcode = 0x821a;
cycle++;new_pc = 0x0096 + 2;
uint16_t v = avr_data[R_YL] | (avr_data[R_YH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f0098: {
const uint16_t opcode = 0x8219;
cycle++;new_pc = 0x0098 + 2;
uint16_t v = avr_data[R_YL] | (avr_data[R_YH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f009a: {
const uint16_t opcode = 0x8189;
cycle++;new_pc = 0x009a + 2;
uint16_t v = avr_data[R_YL] | (avr_data[R_YH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f009c: {
const uint16_t opcode = 0x819a;
cycle++;new_pc = 0x009c + 2;
uint16_t v = avr_data[R_YL] | (avr_data[R_YH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f009e: {
const uint16_t opcode = 0x9601;
cycle++;new_pc = 0x009e + 2;
get_vp2_k6(opcode);
uint16_t res = vp + k;
_avr_set_r16le_hl(avr, p, res);
SREG_SETBIT(S_V, ((~vp & res) >> 15) & 1);
SREG_SETBIT(S_I, ((~res & vp) >> 15) & 1);
_avr_flags_zns16(avr, res);
SREG();
cycle++;
if (*is || cycle >= howLong) goto exit;
}
f00a0: {
const uint16_t opcode = 0x839a;
cycle++;new_pc = 0x00a0 + 2;
uint16_t v = avr_data[R_YL] | (avr_data[R_YH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f00a2: {
const uint16_t opcode = 0x8389;
cycle++;new_pc = 0x00a2 + 2;
uint16_t v = avr_data[R_YL] | (avr_data[R_YH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f00a4: {
const uint16_t opcode = 0x3e88;
cycle++;new_pc = 0x00a4 + 2;
get_vh4_k8(opcode);
uint8_t res = vh - k;
_avr_flags_sub_zns(avr, res, vh, k);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f00a6: {
const uint16_t opcode = 0x4093;
cycle++;new_pc = 0x00a6 + 2;
get_vh4_k8(opcode);
uint8_t res = vh - k - SREG_BIT(S_C);
_avr_set_r(avr, h, res);
_avr_flags_sub_Rzns(avr, res, vh, k);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f00a8: {
const uint16_t opcode = 0xf471;
cycle++;new_pc = 0x00a8 + 2;
int16_t o = ((int16_t)(opcode << 6)) >> 9; // offset
uint8_t s = opcode & 7;
int set = (opcode & 0x0400) == 0; // this bit means BRXC otherwise BRXS
int branch = (SREG_BIT(s) && set) || (!SREG_BIT(s) && !set);
#ifdef CONFIG_SIMAVR_TRACE
if (brxc_names[set][s]) {
} else {
}
#endif
if (branch) {
cycle++; // 2 cycles if taken, 1 otherwise
new_pc = new_pc + (o << 1);
TRACE_JUMP();
}
if (*is || cycle >= howLong) goto exit;
}
f00aa: {
const uint16_t opcode = 0xe08e;
cycle++;new_pc = 0x00aa + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f00ac: {
const uint16_t opcode = 0xe091;
cycle++;new_pc = 0x00ac + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f00ae: {
const uint16_t opcode = 0xd0cf;
cycle++;new_pc = 0x00ae + 2;
get_o12(opcode);
cycle += _avr_push_addr(avr, new_pc);
new_pc = (new_pc + o) % (avr_flashend + 1);
// 'rcall .1' is used as a cheap "push 16 bits of room on the stack"
if (o != 0) {
TRACE_JUMP();
STACK_FRAME_PUSH();
}
if (*is || cycle >= howLong) goto exit;
}
f00b0: {
const uint16_t opcode = 0x9180;
cycle++;new_pc = 0x00b0 + 2;
get_d5(opcode);
uint16_t x = _avr_flash_read16le(avr, new_pc);
new_pc += 2;
_avr_set_r(avr, d, _avr_get_ram(avr, x));
cycle++; // 2 cycles
if (*is || cycle >= howLong) goto exit;
}
f00b2: {
const uint16_t opcode = 0x0124;
cycle++;new_pc = 0x00b2 + 2;
uint8_t d = ((opcode >> 4) & 0xf) << 1;
uint8_t r = ((opcode) & 0xf) << 1;
uint16_t vr = avr_data[r] | (avr_data[r + 1] << 8);
_avr_set_r16le(avr, d, vr);
if (*is || cycle >= howLong) goto exit;
}
f00b4: {
const uint16_t opcode = 0x9190;
cycle++;new_pc = 0x00b4 + 2;
get_d5(opcode);
uint16_t x = _avr_flash_read16le(avr, new_pc);
new_pc += 2;
_avr_set_r(avr, d, _avr_get_ram(avr, x));
cycle++; // 2 cycles
if (*is || cycle >= howLong) goto exit;
}
f00b6: {
const uint16_t opcode = 0x0125;
cycle++;new_pc = 0x00b6 + 2;
uint8_t d = ((opcode >> 4) & 0xf) << 1;
uint8_t r = ((opcode) & 0xf) << 1;
uint16_t vr = avr_data[r] | (avr_data[r + 1] << 8);
_avr_set_r16le(avr, d, vr);
if (*is || cycle >= howLong) goto exit;
}
f00b8: {
const uint16_t opcode = 0x9601;
cycle++;new_pc = 0x00b8 + 2;
get_vp2_k6(opcode);
uint16_t res = vp + k;
_avr_set_r16le_hl(avr, p, res);
SREG_SETBIT(S_V, ((~vp & res) >> 15) & 1);
SREG_SETBIT(S_I, ((~res & vp) >> 15) & 1);
_avr_flags_zns16(avr, res);
SREG();
cycle++;
if (*is || cycle >= howLong) goto exit;
}
f00ba: {
const uint16_t opcode = 0x9390;
cycle++;new_pc = 0x00ba + 2;
get_vd5(opcode);
uint16_t x = _avr_flash_read16le(avr, new_pc);
new_pc += 2;
cycle++;
_avr_set_ram(avr, x, vd);
if (*is || cycle >= howLong) goto exit;
}
f00bc: {
const uint16_t opcode = 0x0125;
cycle++;new_pc = 0x00bc + 2;
uint8_t d = ((opcode >> 4) & 0xf) << 1;
uint8_t r = ((opcode) & 0xf) << 1;
uint16_t vr = avr_data[r] | (avr_data[r + 1] << 8);
_avr_set_r16le(avr, d, vr);
if (*is || cycle >= howLong) goto exit;
}
f00be: {
const uint16_t opcode = 0x9380;
cycle++;new_pc = 0x00be + 2;
get_vd5(opcode);
uint16_t x = _avr_flash_read16le(avr, new_pc);
new_pc += 2;
cycle++;
_avr_set_ram(avr, x, vd);
if (*is || cycle >= howLong) goto exit;
}
f00c0: {
const uint16_t opcode = 0x0124;
cycle++;new_pc = 0x00c0 + 2;
uint8_t d = ((opcode >> 4) & 0xf) << 1;
uint8_t r = ((opcode) & 0xf) << 1;
uint16_t vr = avr_data[r] | (avr_data[r + 1] << 8);
_avr_set_r16le(avr, d, vr);
if (*is || cycle >= howLong) goto exit;
}
f00c2: {
const uint16_t opcode = 0x8219;
cycle++;new_pc = 0x00c2 + 2;
uint16_t v = avr_data[R_YL] | (avr_data[R_YH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f00c4: {
const uint16_t opcode = 0x821a;
cycle++;new_pc = 0x00c4 + 2;
uint16_t v = avr_data[R_YL] | (avr_data[R_YH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f00c6: {
const uint16_t opcode = 0xe9ec;
cycle++;new_pc = 0x00c6 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f00c8: {
const uint16_t opcode = 0xe0f1;
cycle++;new_pc = 0x00c8 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f00ca: {
const uint16_t opcode = 0x8180;
cycle++;new_pc = 0x00ca + 2;
uint16_t v = avr_data[R_ZL] | (avr_data[R_ZH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f00cc: {
const uint16_t opcode = 0x7f8e;
cycle++;new_pc = 0x00cc + 2;
get_vh4_k8(opcode);
uint8_t res = vh & k;
_avr_set_r(avr, h, res);
_avr_flags_znv0s(avr, res);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f00ce: {
const uint16_t opcode = 0x8380;
cycle++;new_pc = 0x00ce + 2;
uint16_t v = avr_data[R_ZL] | (avr_data[R_ZH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f00d0: {
const uint16_t opcode = 0xe885;
cycle++;new_pc = 0x00d0 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f00d2: {
const uint16_t opcode = 0xe091;
cycle++;new_pc = 0x00d2 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f00d4: {
const uint16_t opcode = 0xd07b;
cycle++;new_pc = 0x00d4 + 2;
get_o12(opcode);
cycle += _avr_push_addr(avr, new_pc);
new_pc = (new_pc + o) % (avr_flashend + 1);
// 'rcall .1' is used as a cheap "push 16 bits of room on the stack"
if (o != 0) {
TRACE_JUMP();
STACK_FRAME_PUSH();
}
if (*is || cycle >= howLong) goto exit;
}
f00d6: {
const uint16_t opcode = 0x2b89;
cycle++;new_pc = 0x00d6 + 2;
get_vd5_vr5(opcode);
uint8_t res = vd | vr;
_avr_set_r(avr, d, res);
_avr_flags_znv0s(avr, res);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f00d8: {
const uint16_t opcode = 0xf701;
cycle++;new_pc = 0x00d8 + 2;
int16_t o = ((int16_t)(opcode << 6)) >> 9; // offset
uint8_t s = opcode & 7;
int set = (opcode & 0x0400) == 0; // this bit means BRXC otherwise BRXS
int branch = (SREG_BIT(s) && set) || (!SREG_BIT(s) && !set);
#ifdef CONFIG_SIMAVR_TRACE
if (brxc_names[set][s]) {
} else {
}
#endif
if (branch) {
cycle++; // 2 cycles if taken, 1 otherwise
new_pc = new_pc + (o << 1);
TRACE_JUMP();
}
if (*is || cycle >= howLong) goto exit;
}
f00da: {
const uint16_t opcode = 0xe061;
cycle++;new_pc = 0x00da + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f00dc: {
const uint16_t opcode = 0xe070;
cycle++;new_pc = 0x00dc + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f00de: {
const uint16_t opcode = 0xe68e;
cycle++;new_pc = 0x00de + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f00e0: {
const uint16_t opcode = 0xe091;
cycle++;new_pc = 0x00e0 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f00e2: {
const uint16_t opcode = 0xd094;
cycle++;new_pc = 0x00e2 + 2;
get_o12(opcode);
cycle += _avr_push_addr(avr, new_pc);
new_pc = (new_pc + o) % (avr_flashend + 1);
// 'rcall .1' is used as a cheap "push 16 bits of room on the stack"
if (o != 0) {
TRACE_JUMP();
STACK_FRAME_PUSH();
}
if (*is || cycle >= howLong) goto exit;
}
f00e4: {
const uint16_t opcode = 0x93cf;
cycle++;new_pc = 0x00e4 + 2;
get_vd5(opcode);
_avr_push8(avr, vd);
T(uint16_t sp = _avr_sp_get(avr);)
cycle++;
if (*is || cycle >= howLong) goto exit;
}
f00e6: {
const uint16_t opcode = 0x93df;
cycle++;new_pc = 0x00e6 + 2;
get_vd5(opcode);
_avr_push8(avr, vd);
T(uint16_t sp = _avr_sp_get(avr);)
cycle++;
if (*is || cycle >= howLong) goto exit;
}
f00e8: {
const uint16_t opcode = 0xd000;
cycle++;new_pc = 0x00e8 + 2;
get_o12(opcode);
cycle += _avr_push_addr(avr, new_pc);
new_pc = (new_pc + o) % (avr_flashend + 1);
// 'rcall .1' is used as a cheap "push 16 bits of room on the stack"
if (o != 0) {
TRACE_JUMP();
STACK_FRAME_PUSH();
}
if (*is || cycle >= howLong) goto exit;
}
f00ea: {
const uint16_t opcode = 0xb7cd;
cycle++;new_pc = 0x00ea + 2;
get_d5_a6(opcode);
_avr_set_r(avr, d, _avr_get_ram(avr, A));
if (*is || cycle >= howLong) goto exit;
}
f00ec: {
const uint16_t opcode = 0xb7de;
cycle++;new_pc = 0x00ec + 2;
get_d5_a6(opcode);
_avr_set_r(avr, d, _avr_get_ram(avr, A));
if (*is || cycle >= howLong) goto exit;
}
f00ee: {
const uint16_t opcode = 0x821a;
cycle++;new_pc = 0x00ee + 2;
uint16_t v = avr_data[R_YL] | (avr_data[R_YH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f00f0: {
const uint16_t opcode = 0x8219;
cycle++;new_pc = 0x00f0 + 2;
uint16_t v = avr_data[R_YL] | (avr_data[R_YH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f00f2: {
const uint16_t opcode = 0x8189;
cycle++;new_pc = 0x00f2 + 2;
uint16_t v = avr_data[R_YL] | (avr_data[R_YH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f00f4: {
const uint16_t opcode = 0x819a;
cycle++;new_pc = 0x00f4 + 2;
uint16_t v = avr_data[R_YL] | (avr_data[R_YH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f00f6: {
const uint16_t opcode = 0x9601;
cycle++;new_pc = 0x00f6 + 2;
get_vp2_k6(opcode);
uint16_t res = vp + k;
_avr_set_r16le_hl(avr, p, res);
SREG_SETBIT(S_V, ((~vp & res) >> 15) & 1);
SREG_SETBIT(S_I, ((~res & vp) >> 15) & 1);
_avr_flags_zns16(avr, res);
SREG();
cycle++;
if (*is || cycle >= howLong) goto exit;
}
f00f8: {
const uint16_t opcode = 0x839a;
cycle++;new_pc = 0x00f8 + 2;
uint16_t v = avr_data[R_YL] | (avr_data[R_YH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f00fa: {
const uint16_t opcode = 0x8389;
cycle++;new_pc = 0x00fa + 2;
uint16_t v = avr_data[R_YL] | (avr_data[R_YH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f00fc: {
const uint16_t opcode = 0x3d80;
cycle++;new_pc = 0x00fc + 2;
get_vh4_k8(opcode);
uint8_t res = vh - k;
_avr_flags_sub_zns(avr, res, vh, k);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f00fe: {
const uint16_t opcode = 0x4097;
cycle++;new_pc = 0x00fe + 2;
get_vh4_k8(opcode);
uint8_t res = vh - k - SREG_BIT(S_C);
_avr_set_r(avr, h, res);
_avr_flags_sub_Rzns(avr, res, vh, k);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0100: {
const uint16_t opcode = 0xf429;
cycle++;new_pc = 0x0100 + 2;
int16_t o = ((int16_t)(opcode << 6)) >> 9; // offset
uint8_t s = opcode & 7;
int set = (opcode & 0x0400) == 0; // this bit means BRXC otherwise BRXS
int branch = (SREG_BIT(s) && set) || (!SREG_BIT(s) && !set);
#ifdef CONFIG_SIMAVR_TRACE
if (brxc_names[set][s]) {
} else {
}
#endif
if (branch) {
cycle++; // 2 cycles if taken, 1 otherwise
new_pc = new_pc + (o << 1);
TRACE_JUMP();
}
if (*is || cycle >= howLong) goto exit;
}
f0102: {
const uint16_t opcode = 0xe184;
cycle++;new_pc = 0x0102 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0104: {
const uint16_t opcode = 0xe091;
cycle++;new_pc = 0x0104 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0106: {
const uint16_t opcode = 0xd0a3;
cycle++;new_pc = 0x0106 + 2;
get_o12(opcode);
cycle += _avr_push_addr(avr, new_pc);
new_pc = (new_pc + o) % (avr_flashend + 1);
// 'rcall .1' is used as a cheap "push 16 bits of room on the stack"
if (o != 0) {
TRACE_JUMP();
STACK_FRAME_PUSH();
}
if (*is || cycle >= howLong) goto exit;
}
f0108: {
const uint16_t opcode = 0x8219;
cycle++;new_pc = 0x0108 + 2;
uint16_t v = avr_data[R_YL] | (avr_data[R_YH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f010a: {
const uint16_t opcode = 0x821a;
cycle++;new_pc = 0x010a + 2;
uint16_t v = avr_data[R_YL] | (avr_data[R_YH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f010c: {
const uint16_t opcode = 0xe3ed;
cycle++;new_pc = 0x010c + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f010e: {
const uint16_t opcode = 0xe0f1;
cycle++;new_pc = 0x010e + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0110: {
const uint16_t opcode = 0x8180;
cycle++;new_pc = 0x0110 + 2;
uint16_t v = avr_data[R_ZL] | (avr_data[R_ZH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f0112: {
const uint16_t opcode = 0x7f8e;
cycle++;new_pc = 0x0112 + 2;
get_vh4_k8(opcode);
uint8_t res = vh & k;
_avr_set_r(avr, h, res);
_avr_flags_znv0s(avr, res);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0114: {
const uint16_t opcode = 0x8380;
cycle++;new_pc = 0x0114 + 2;
uint16_t v = avr_data[R_ZL] | (avr_data[R_ZH] << 8);
get_d5_q6(opcode);
if (opcode & 0x0200) {
_avr_set_ram(avr, v+q, avr_data[d]);
} else {
_avr_set_r(avr, d, _avr_get_ram(avr, v+q));
}
cycle += 1; // 2 cycles, 3 for tinyavr
if (*is || cycle >= howLong) goto exit;
}
f0116: {
const uint16_t opcode = 0xe286;
cycle++;new_pc = 0x0116 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0118: {
const uint16_t opcode = 0xe091;
cycle++;new_pc = 0x0118 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f011a: {
const uint16_t opcode = 0xd058;
cycle++;new_pc = 0x011a + 2;
get_o12(opcode);
cycle += _avr_push_addr(avr, new_pc);
new_pc = (new_pc + o) % (avr_flashend + 1);
// 'rcall .1' is used as a cheap "push 16 bits of room on the stack"
if (o != 0) {
TRACE_JUMP();
STACK_FRAME_PUSH();
}
if (*is || cycle >= howLong) goto exit;
}
f011c: {
const uint16_t opcode = 0x2b89;
cycle++;new_pc = 0x011c + 2;
get_vd5_vr5(opcode);
uint8_t res = vd | vr;
_avr_set_r(avr, d, res);
_avr_flags_znv0s(avr, res);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f011e: {
const uint16_t opcode = 0xf749;
cycle++;new_pc = 0x011e + 2;
int16_t o = ((int16_t)(opcode << 6)) >> 9; // offset
uint8_t s = opcode & 7;
int set = (opcode & 0x0400) == 0; // this bit means BRXC otherwise BRXS
int branch = (SREG_BIT(s) && set) || (!SREG_BIT(s) && !set);
#ifdef CONFIG_SIMAVR_TRACE
if (brxc_names[set][s]) {
} else {
}
#endif
if (branch) {
cycle++; // 2 cycles if taken, 1 otherwise
new_pc = new_pc + (o << 1);
TRACE_JUMP();
}
if (*is || cycle >= howLong) goto exit;
}
f0120: {
const uint16_t opcode = 0xe061;
cycle++;new_pc = 0x0120 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0122: {
const uint16_t opcode = 0xe070;
cycle++;new_pc = 0x0122 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0124: {
const uint16_t opcode = 0xe68e;
cycle++;new_pc = 0x0124 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0126: {
const uint16_t opcode = 0xe091;
cycle++;new_pc = 0x0126 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0128: {
const uint16_t opcode = 0xd071;
cycle++;new_pc = 0x0128 + 2;
get_o12(opcode);
cycle += _avr_push_addr(avr, new_pc);
new_pc = (new_pc + o) % (avr_flashend + 1);
// 'rcall .1' is used as a cheap "push 16 bits of room on the stack"
if (o != 0) {
TRACE_JUMP();
STACK_FRAME_PUSH();
}
if (*is || cycle >= howLong) goto exit;
}
f012a: {
const uint16_t opcode = 0x93cf;
cycle++;new_pc = 0x012a + 2;
get_vd5(opcode);
_avr_push8(avr, vd);
T(uint16_t sp = _avr_sp_get(avr);)
cycle++;
if (*is || cycle >= howLong) goto exit;
}
f012c: {
const uint16_t opcode = 0x93df;
cycle++;new_pc = 0x012c + 2;
get_vd5(opcode);
_avr_push8(avr, vd);
T(uint16_t sp = _avr_sp_get(avr);)
cycle++;
if (*is || cycle >= howLong) goto exit;
}
f012e: {
const uint16_t opcode = 0xb7cd;
cycle++;new_pc = 0x012e + 2;
get_d5_a6(opcode);
_avr_set_r(avr, d, _avr_get_ram(avr, A));
if (*is || cycle >= howLong) goto exit;
}
f0130: {
const uint16_t opcode = 0xb7de;
cycle++;new_pc = 0x0130 + 2;
get_d5_a6(opcode);
_avr_set_r(avr, d, _avr_get_ram(avr, A));
if (*is || cycle >= howLong) goto exit;
}
f0132: {
const uint16_t opcode = 0xe080;
cycle++;new_pc = 0x0132 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0134: {
const uint16_t opcode = 0xe091;
cycle++;new_pc = 0x0134 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0136: {
const uint16_t opcode = 0x9390;
cycle++;new_pc = 0x0136 + 2;
get_vd5(opcode);
uint16_t x = _avr_flash_read16le(avr, new_pc);
new_pc += 2;
cycle++;
_avr_set_ram(avr, x, vd);
if (*is || cycle >= howLong) goto exit;
}
f0138: {
const uint16_t opcode = 0x01c0;
cycle++;new_pc = 0x0138 + 2;
uint8_t d = ((opcode >> 4) & 0xf) << 1;
uint8_t r = ((opcode) & 0xf) << 1;
uint16_t vr = avr_data[r] | (avr_data[r + 1] << 8);
_avr_set_r16le(avr, d, vr);
if (*is || cycle >= howLong) goto exit;
}
f013a: {
const uint16_t opcode = 0x9380;
cycle++;new_pc = 0x013a + 2;
get_vd5(opcode);
uint16_t x = _avr_flash_read16le(avr, new_pc);
new_pc += 2;
cycle++;
_avr_set_ram(avr, x, vd);
if (*is || cycle >= howLong) goto exit;
}
f013c: {
const uint16_t opcode = 0x01bf;
cycle++;new_pc = 0x013c + 2;
uint8_t d = ((opcode >> 4) & 0xf) << 1;
uint8_t r = ((opcode) & 0xf) << 1;
uint16_t vr = avr_data[r] | (avr_data[r + 1] << 8);
_avr_set_r16le(avr, d, vr);
if (*is || cycle >= howLong) goto exit;
}
f013e: {
const uint16_t opcode = 0x9478;
cycle++;new_pc = 0x013e + 2;
get_sreg_bit(opcode);
SREG_SETBIT(b, (opcode & 0x0080) == 0);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0140: {
const uint16_t opcode = 0xe18a;
cycle++;new_pc = 0x0140 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0142: {
const uint16_t opcode = 0xe091;
cycle++;new_pc = 0x0142 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0144: {
const uint16_t opcode = 0xd084;
cycle++;new_pc = 0x0144 + 2;
get_o12(opcode);
cycle += _avr_push_addr(avr, new_pc);
new_pc = (new_pc + o) % (avr_flashend + 1);
// 'rcall .1' is used as a cheap "push 16 bits of room on the stack"
if (o != 0) {
TRACE_JUMP();
STACK_FRAME_PUSH();
}
if (*is || cycle >= howLong) goto exit;
}
f0146: {
const uint16_t opcode = 0xe68e;
cycle++;new_pc = 0x0146 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0148: {
const uint16_t opcode = 0xe091;
cycle++;new_pc = 0x0148 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f014a: {
const uint16_t opcode = 0xd040;
cycle++;new_pc = 0x014a + 2;
get_o12(opcode);
cycle += _avr_push_addr(avr, new_pc);
new_pc = (new_pc + o) % (avr_flashend + 1);
// 'rcall .1' is used as a cheap "push 16 bits of room on the stack"
if (o != 0) {
TRACE_JUMP();
STACK_FRAME_PUSH();
}
if (*is || cycle >= howLong) goto exit;
}
f014c: {
const uint16_t opcode = 0x2b89;
cycle++;new_pc = 0x014c + 2;
get_vd5_vr5(opcode);
uint8_t res = vd | vr;
_avr_set_r(avr, d, res);
_avr_flags_znv0s(avr, res);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f014e: {
const uint16_t opcode = 0xf441;
cycle++;new_pc = 0x014e + 2;
int16_t o = ((int16_t)(opcode << 6)) >> 9; // offset
uint8_t s = opcode & 7;
int set = (opcode & 0x0400) == 0; // this bit means BRXC otherwise BRXS
int branch = (SREG_BIT(s) && set) || (!SREG_BIT(s) && !set);
#ifdef CONFIG_SIMAVR_TRACE
if (brxc_names[set][s]) {
} else {
}
#endif
if (branch) {
cycle++; // 2 cycles if taken, 1 otherwise
new_pc = new_pc + (o << 1);
TRACE_JUMP();
}
if (*is || cycle >= howLong) goto exit;
}
f0150: {
const uint16_t opcode = 0xebed;
cycle++;new_pc = 0x0150 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0152: {
const uint16_t opcode = 0xe0f1;
cycle++;new_pc = 0x0152 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0154: {
const uint16_t opcode = 0xb60f;
cycle++;new_pc = 0x0154 + 2;
get_d5_a6(opcode);
_avr_set_r(avr, d, _avr_get_ram(avr, A));
if (*is || cycle >= howLong) goto exit;
}
f0156: {
const uint16_t opcode = 0x94f8;
cycle++;new_pc = 0x0156 + 2;
get_sreg_bit(opcode);
SREG_SETBIT(b, (opcode & 0x0080) == 0);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0158: {
const uint16_t opcode = 0xbffe;
cycle++;new_pc = 0x0158 + 2;
get_d5_a6(opcode);
_avr_set_ram(avr, A, avr_data[d]);
if (*is || cycle >= howLong) goto exit;
}
f015a: {
const uint16_t opcode = 0xbe0f;
cycle++;new_pc = 0x015a + 2;
get_d5_a6(opcode);
_avr_set_ram(avr, A, avr_data[d]);
if (*is || cycle >= howLong) goto exit;
}
f015c: {
const uint16_t opcode = 0xbfed;
cycle++;new_pc = 0x015c + 2;
get_d5_a6(opcode);
_avr_set_ram(avr, A, avr_data[d]);
if (*is || cycle >= howLong) goto exit;
}
f015e: {
const uint16_t opcode = 0xcf96;
cycle++;new_pc = 0x015e + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0160: {
const uint16_t opcode = 0xe68e;
cycle++;new_pc = 0x0160 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0162: {
const uint16_t opcode = 0xe091;
cycle++;new_pc = 0x0162 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0164: {
const uint16_t opcode = 0xd033;
cycle++;new_pc = 0x0164 + 2;
get_o12(opcode);
cycle += _avr_push_addr(avr, new_pc);
new_pc = (new_pc + o) % (avr_flashend + 1);
// 'rcall .1' is used as a cheap "push 16 bits of room on the stack"
if (o != 0) {
TRACE_JUMP();
STACK_FRAME_PUSH();
}
if (*is || cycle >= howLong) goto exit;
}
f0166: {
const uint16_t opcode = 0x2b89;
cycle++;new_pc = 0x0166 + 2;
get_vd5_vr5(opcode);
uint8_t res = vd | vr;
_avr_set_r(avr, d, res);
_avr_flags_znv0s(avr, res);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0168: {
const uint16_t opcode = 0xf051;
cycle++;new_pc = 0x0168 + 2;
int16_t o = ((int16_t)(opcode << 6)) >> 9; // offset
uint8_t s = opcode & 7;
int set = (opcode & 0x0400) == 0; // this bit means BRXC otherwise BRXS
int branch = (SREG_BIT(s) && set) || (!SREG_BIT(s) && !set);
#ifdef CONFIG_SIMAVR_TRACE
if (brxc_names[set][s]) {
} else {
}
#endif
if (branch) {
cycle++; // 2 cycles if taken, 1 otherwise
new_pc = new_pc + (o << 1);
TRACE_JUMP();
}
if (*is || cycle >= howLong) goto exit;
}
f016a: {
const uint16_t opcode = 0xe68e;
cycle++;new_pc = 0x016a + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f016c: {
const uint16_t opcode = 0xe091;
cycle++;new_pc = 0x016c + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f016e: {
const uint16_t opcode = 0xd02e;
cycle++;new_pc = 0x016e + 2;
get_o12(opcode);
cycle += _avr_push_addr(avr, new_pc);
new_pc = (new_pc + o) % (avr_flashend + 1);
// 'rcall .1' is used as a cheap "push 16 bits of room on the stack"
if (o != 0) {
TRACE_JUMP();
STACK_FRAME_PUSH();
}
if (*is || cycle >= howLong) goto exit;
}
f0170: {
const uint16_t opcode = 0x2b89;
cycle++;new_pc = 0x0170 + 2;
get_vd5_vr5(opcode);
uint8_t res = vd | vr;
_avr_set_r(avr, d, res);
_avr_flags_znv0s(avr, res);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0172: {
const uint16_t opcode = 0xf471;
cycle++;new_pc = 0x0172 + 2;
int16_t o = ((int16_t)(opcode << 6)) >> 9; // offset
uint8_t s = opcode & 7;
int set = (opcode & 0x0400) == 0; // this bit means BRXC otherwise BRXS
int branch = (SREG_BIT(s) && set) || (!SREG_BIT(s) && !set);
#ifdef CONFIG_SIMAVR_TRACE
if (brxc_names[set][s]) {
} else {
}
#endif
if (branch) {
cycle++; // 2 cycles if taken, 1 otherwise
new_pc = new_pc + (o << 1);
TRACE_JUMP();
}
if (*is || cycle >= howLong) goto exit;
}
f0174: {
const uint16_t opcode = 0xe061;
cycle++;new_pc = 0x0174 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0176: {
const uint16_t opcode = 0xe070;
cycle++;new_pc = 0x0176 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0178: {
const uint16_t opcode = 0xe885;
cycle++;new_pc = 0x0178 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f017a: {
const uint16_t opcode = 0xe091;
cycle++;new_pc = 0x017a + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f017c: {
const uint16_t opcode = 0xc012;
cycle++;new_pc = 0x017c + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f017e: {
const uint16_t opcode = 0xe6ee;
cycle++;new_pc = 0x017e + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0180: {
const uint16_t opcode = 0xe0f1;
cycle++;new_pc = 0x0180 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0182: {
const uint16_t opcode = 0xb60f;
cycle++;new_pc = 0x0182 + 2;
get_d5_a6(opcode);
_avr_set_r(avr, d, _avr_get_ram(avr, A));
if (*is || cycle >= howLong) goto exit;
}
f0184: {
const uint16_t opcode = 0x94f8;
cycle++;new_pc = 0x0184 + 2;
get_sreg_bit(opcode);
SREG_SETBIT(b, (opcode & 0x0080) == 0);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0186: {
const uint16_t opcode = 0xbffe;
cycle++;new_pc = 0x0186 + 2;
get_d5_a6(opcode);
_avr_set_ram(avr, A, avr_data[d]);
if (*is || cycle >= howLong) goto exit;
}
f0188: {
const uint16_t opcode = 0xbe0f;
cycle++;new_pc = 0x0188 + 2;
get_d5_a6(opcode);
_avr_set_ram(avr, A, avr_data[d]);
if (*is || cycle >= howLong) goto exit;
}
f018a: {
const uint16_t opcode = 0xbfed;
cycle++;new_pc = 0x018a + 2;
get_d5_a6(opcode);
_avr_set_ram(avr, A, avr_data[d]);
if (*is || cycle >= howLong) goto exit;
}
f018c: {
const uint16_t opcode = 0xcfab;
cycle++;new_pc = 0x018c + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f018e: {
const uint16_t opcode = 0xcfed;
cycle++;new_pc = 0x018e + 2;
get_o12(opcode);
new_pc = (new_pc + o) % (avr_flashend + 1);
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f0190: {
const uint16_t opcode = 0xe68e;
cycle++;new_pc = 0x0190 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0192: {
const uint16_t opcode = 0xe091;
cycle++;new_pc = 0x0192 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f0194: {
const uint16_t opcode = 0xd01b;
cycle++;new_pc = 0x0194 + 2;
get_o12(opcode);
cycle += _avr_push_addr(avr, new_pc);
new_pc = (new_pc + o) % (avr_flashend + 1);
// 'rcall .1' is used as a cheap "push 16 bits of room on the stack"
if (o != 0) {
TRACE_JUMP();
STACK_FRAME_PUSH();
}
if (*is || cycle >= howLong) goto exit;
}
f0196: {
const uint16_t opcode = 0x2b89;
cycle++;new_pc = 0x0196 + 2;
get_vd5_vr5(opcode);
uint8_t res = vd | vr;
_avr_set_r(avr, d, res);
_avr_flags_znv0s(avr, res);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0198: {
const uint16_t opcode = 0xf429;
cycle++;new_pc = 0x0198 + 2;
int16_t o = ((int16_t)(opcode << 6)) >> 9; // offset
uint8_t s = opcode & 7;
int set = (opcode & 0x0400) == 0; // this bit means BRXC otherwise BRXS
int branch = (SREG_BIT(s) && set) || (!SREG_BIT(s) && !set);
#ifdef CONFIG_SIMAVR_TRACE
if (brxc_names[set][s]) {
} else {
}
#endif
if (branch) {
cycle++; // 2 cycles if taken, 1 otherwise
new_pc = new_pc + (o << 1);
TRACE_JUMP();
}
if (*is || cycle >= howLong) goto exit;
}
f019a: {
const uint16_t opcode = 0xe061;
cycle++;new_pc = 0x019a + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f019c: {
const uint16_t opcode = 0xe070;
cycle++;new_pc = 0x019c + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f019e: {
const uint16_t opcode = 0xe286;
cycle++;new_pc = 0x019e + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f01a0: {
const uint16_t opcode = 0xe091;
cycle++;new_pc = 0x01a0 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f01a2: {
const uint16_t opcode = 0xd034;
cycle++;new_pc = 0x01a2 + 2;
get_o12(opcode);
cycle += _avr_push_addr(avr, new_pc);
new_pc = (new_pc + o) % (avr_flashend + 1);
// 'rcall .1' is used as a cheap "push 16 bits of room on the stack"
if (o != 0) {
TRACE_JUMP();
STACK_FRAME_PUSH();
}
if (*is || cycle >= howLong) goto exit;
}
f01a4: {
const uint16_t opcode = 0x9180;
cycle++;new_pc = 0x01a4 + 2;
get_d5(opcode);
uint16_t x = _avr_flash_read16le(avr, new_pc);
new_pc += 2;
_avr_set_r(avr, d, _avr_get_ram(avr, x));
cycle++; // 2 cycles
if (*is || cycle >= howLong) goto exit;
}
f01a6: {
const uint16_t opcode = 0x0124;
cycle++;new_pc = 0x01a6 + 2;
uint8_t d = ((opcode >> 4) & 0xf) << 1;
uint8_t r = ((opcode) & 0xf) << 1;
uint16_t vr = avr_data[r] | (avr_data[r + 1] << 8);
_avr_set_r16le(avr, d, vr);
if (*is || cycle >= howLong) goto exit;
}
f01a8: {
const uint16_t opcode = 0x9190;
cycle++;new_pc = 0x01a8 + 2;
get_d5(opcode);
uint16_t x = _avr_flash_read16le(avr, new_pc);
new_pc += 2;
_avr_set_r(avr, d, _avr_get_ram(avr, x));
cycle++; // 2 cycles
if (*is || cycle >= howLong) goto exit;
}
f01aa: {
const uint16_t opcode = 0x0125;
cycle++;new_pc = 0x01aa + 2;
uint8_t d = ((opcode >> 4) & 0xf) << 1;
uint8_t r = ((opcode) & 0xf) << 1;
uint16_t vr = avr_data[r] | (avr_data[r + 1] << 8);
_avr_set_r16le(avr, d, vr);
if (*is || cycle >= howLong) goto exit;
}
f01ac: {
const uint16_t opcode = 0x3f84;
cycle++;new_pc = 0x01ac + 2;
get_vh4_k8(opcode);
uint8_t res = vh - k;
_avr_flags_sub_zns(avr, res, vh, k);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f01ae: {
const uint16_t opcode = 0x4091;
cycle++;new_pc = 0x01ae + 2;
get_vh4_k8(opcode);
uint8_t res = vh - k - SREG_BIT(S_C);
_avr_set_r(avr, h, res);
_avr_flags_sub_Rzns(avr, res, vh, k);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f01b0: {
const uint16_t opcode = 0xf2e0;
cycle++;new_pc = 0x01b0 + 2;
int16_t o = ((int16_t)(opcode << 6)) >> 9; // offset
uint8_t s = opcode & 7;
int set = (opcode & 0x0400) == 0; // this bit means BRXC otherwise BRXS
int branch = (SREG_BIT(s) && set) || (!SREG_BIT(s) && !set);
#ifdef CONFIG_SIMAVR_TRACE
if (brxc_names[set][s]) {
} else {
}
#endif
if (branch) {
cycle++; // 2 cycles if taken, 1 otherwise
new_pc = new_pc + (o << 1);
TRACE_JUMP();
}
if (*is || cycle >= howLong) goto exit;
}
f01b2: {
const uint16_t opcode = 0x94f8;
cycle++;new_pc = 0x01b2 + 2;
get_sreg_bit(opcode);
SREG_SETBIT(b, (opcode & 0x0080) == 0);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f01b4: {
const uint16_t opcode = 0xb783;
cycle++;new_pc = 0x01b4 + 2;
get_d5_a6(opcode);
_avr_set_r(avr, d, _avr_get_ram(avr, A));
if (*is || cycle >= howLong) goto exit;
}
f01b6: {
const uint16_t opcode = 0x6081;
cycle++;new_pc = 0x01b6 + 2;
get_vh4_k8(opcode);
uint8_t res = vh | k;
_avr_set_r(avr, h, res);
_avr_flags_znv0s(avr, res);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f01b8: {
const uint16_t opcode = 0xbf83;
cycle++;new_pc = 0x01b8 + 2;
get_d5_a6(opcode);
_avr_set_ram(avr, A, avr_data[d]);
if (*is || cycle >= howLong) goto exit;
}
f01ba: {
const uint16_t opcode = 0x9588;
cycle++;new_pc = 0x01ba + 2;
/* Don't sleep if there are interrupts about to be serviced.
* Without this check, it was possible to incorrectly enter a state
* in which the cpu was sleeping and interrupts were disabled. For more
* details, see the commit message. */
if (!avr_has_pending_interrupts(avr) || !SREG_BIT(S_I)) {
avr_state = cpu_Sleeping;
CORE_SLEEP();
}
if (*is || cycle >= howLong) goto exit;
}
f01bc: {
const uint16_t opcode = 0xb783;
cycle++;new_pc = 0x01bc + 2;
get_d5_a6(opcode);
_avr_set_r(avr, d, _avr_get_ram(avr, A));
if (*is || cycle >= howLong) goto exit;
}
f01be: {
const uint16_t opcode = 0x7f8e;
cycle++;new_pc = 0x01be + 2;
get_vh4_k8(opcode);
uint8_t res = vh & k;
_avr_set_r(avr, h, res);
_avr_flags_znv0s(avr, res);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f01c0: {
const uint16_t opcode = 0xbf83;
cycle++;new_pc = 0x01c0 + 2;
get_d5_a6(opcode);
_avr_set_ram(avr, A, avr_data[d]);
if (*is || cycle >= howLong) goto exit;
}
f01c2: {
const uint16_t opcode = 0xe080;
cycle++;new_pc = 0x01c2 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f01c4: {
const uint16_t opcode = 0xe090;
cycle++;new_pc = 0x01c4 + 2;
get_h4_k8(opcode);
_avr_set_r(avr, h, k);
if (*is || cycle >= howLong) goto exit;
}
f01c6: {
const uint16_t opcode = 0x91df;
cycle++;new_pc = 0x01c6 + 2;
get_d5(opcode);
_avr_set_r(avr, d, _avr_pop8(avr));
T(uint16_t sp = _avr_sp_get(avr);)
cycle++;
if (*is || cycle >= howLong) goto exit;
}
f01c8: {
const uint16_t opcode = 0x91cf;
cycle++;new_pc = 0x01c8 + 2;
get_d5(opcode);
_avr_set_r(avr, d, _avr_pop8(avr));
T(uint16_t sp = _avr_sp_get(avr);)
cycle++;
if (*is || cycle >= howLong) goto exit;
}
f01ca: {
const uint16_t opcode = 0x9508;
cycle++;new_pc = 0x01ca + 2;
if (opcode == 0x9518) {
SREG_SETBIT(S_I, 1);
avr_interrupt_reti(avr);
}
new_pc = _avr_pop_addr(avr);
cycle += 1 + avr_address_size;
TRACE_JUMP();
STACK_FRAME_POP();
if (*is || cycle >= howLong) goto exit;
}
f01cc: {
const uint16_t opcode = 0x01dc;
cycle++;new_pc = 0x01cc + 2;
uint8_t d = ((opcode >> 4) & 0xf) << 1;
uint8_t r = ((opcode) & 0xf) << 1;
uint16_t vr = avr_data[r] | (avr_data[r + 1] << 8);
_avr_set_r16le(avr, d, vr);
if (*is || cycle >= howLong) goto exit;
}
f01ce: {
const uint16_t opcode = 0x922d;
cycle++;new_pc = 0x01ce + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01d0: {
const uint16_t opcode = 0x923d;
cycle++;new_pc = 0x01d0 + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01d2: {
const uint16_t opcode = 0x924d;
cycle++;new_pc = 0x01d2 + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01d4: {
const uint16_t opcode = 0x925d;
cycle++;new_pc = 0x01d4 + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01d6: {
const uint16_t opcode = 0x926d;
cycle++;new_pc = 0x01d6 + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01d8: {
const uint16_t opcode = 0x927d;
cycle++;new_pc = 0x01d8 + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01da: {
const uint16_t opcode = 0x928d;
cycle++;new_pc = 0x01da + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01dc: {
const uint16_t opcode = 0x929d;
cycle++;new_pc = 0x01dc + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01de: {
const uint16_t opcode = 0x92ad;
cycle++;new_pc = 0x01de + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01e0: {
const uint16_t opcode = 0x92bd;
cycle++;new_pc = 0x01e0 + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01e2: {
const uint16_t opcode = 0x92cd;
cycle++;new_pc = 0x01e2 + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01e4: {
const uint16_t opcode = 0x92dd;
cycle++;new_pc = 0x01e4 + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01e6: {
const uint16_t opcode = 0x92ed;
cycle++;new_pc = 0x01e6 + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01e8: {
const uint16_t opcode = 0x92fd;
cycle++;new_pc = 0x01e8 + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01ea: {
const uint16_t opcode = 0x930d;
cycle++;new_pc = 0x01ea + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01ec: {
const uint16_t opcode = 0x931d;
cycle++;new_pc = 0x01ec + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01ee: {
const uint16_t opcode = 0x93cd;
cycle++;new_pc = 0x01ee + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01f0: {
const uint16_t opcode = 0x93dd;
cycle++;new_pc = 0x01f0 + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01f2: {
const uint16_t opcode = 0x91ff;
cycle++;new_pc = 0x01f2 + 2;
get_d5(opcode);
_avr_set_r(avr, d, _avr_pop8(avr));
T(uint16_t sp = _avr_sp_get(avr);)
cycle++;
if (*is || cycle >= howLong) goto exit;
}
f01f4: {
const uint16_t opcode = 0x91ef;
cycle++;new_pc = 0x01f4 + 2;
get_d5(opcode);
_avr_set_r(avr, d, _avr_pop8(avr));
T(uint16_t sp = _avr_sp_get(avr);)
cycle++;
if (*is || cycle >= howLong) goto exit;
}
f01f6: {
const uint16_t opcode = 0xb78d;
cycle++;new_pc = 0x01f6 + 2;
get_d5_a6(opcode);
_avr_set_r(avr, d, _avr_get_ram(avr, A));
if (*is || cycle >= howLong) goto exit;
}
f01f8: {
const uint16_t opcode = 0x938d;
cycle++;new_pc = 0x01f8 + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01fa: {
const uint16_t opcode = 0xb78e;
cycle++;new_pc = 0x01fa + 2;
get_d5_a6(opcode);
_avr_set_r(avr, d, _avr_get_ram(avr, A));
if (*is || cycle >= howLong) goto exit;
}
f01fc: {
const uint16_t opcode = 0x938d;
cycle++;new_pc = 0x01fc + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f01fe: {
const uint16_t opcode = 0xb78f;
cycle++;new_pc = 0x01fe + 2;
get_d5_a6(opcode);
_avr_set_r(avr, d, _avr_get_ram(avr, A));
if (*is || cycle >= howLong) goto exit;
}
f0200: {
const uint16_t opcode = 0x938d;
cycle++;new_pc = 0x0200 + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f0202: {
const uint16_t opcode = 0x93ed;
cycle++;new_pc = 0x0202 + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f0204: {
const uint16_t opcode = 0x93fd;
cycle++;new_pc = 0x0204 + 2;
int op = opcode & 3;
get_vd5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles, except tinyavr
if (op == 2) x--;
_avr_set_ram(avr, x, vd);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
if (*is || cycle >= howLong) goto exit;
}
f0206: {
const uint16_t opcode = 0x2788;
cycle++;new_pc = 0x0206 + 2;
get_vd5_vr5(opcode);
uint8_t res = vd ^ vr;
if (r==d) {
} else {
}
_avr_set_r(avr, d, res);
_avr_flags_znv0s(avr, res);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0208: {
const uint16_t opcode = 0x2799;
cycle++;new_pc = 0x0208 + 2;
get_vd5_vr5(opcode);
uint8_t res = vd ^ vr;
if (r==d) {
} else {
}
_avr_set_r(avr, d, res);
_avr_flags_znv0s(avr, res);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f020a: {
const uint16_t opcode = 0x9409;
cycle++;new_pc = 0x020a + 2;
const int e = 0;
const int p = 0;
uint32_t z = avr_data[R_ZL] | (avr_data[R_ZH] << 8);
if (e)
z |= avr_data[avr_eind] << 16;
if (p)
cycle += _avr_push_addr(avr, new_pc) - 1;
new_pc = z << 1;
cycle++;
TRACE_JUMP();
if (*is || cycle >= howLong) goto exit;
}
f020c: {
const uint16_t opcode = 0x01dc;
cycle++;new_pc = 0x020c + 2;
uint8_t d = ((opcode >> 4) & 0xf) << 1;
uint8_t r = ((opcode) & 0xf) << 1;
uint16_t vr = avr_data[r] | (avr_data[r + 1] << 8);
_avr_set_r16le(avr, d, vr);
if (*is || cycle >= howLong) goto exit;
}
f020e: {
const uint16_t opcode = 0x01cb;
cycle++;new_pc = 0x020e + 2;
uint8_t d = ((opcode >> 4) & 0xf) << 1;
uint8_t r = ((opcode) & 0xf) << 1;
uint16_t vr = avr_data[r] | (avr_data[r + 1] << 8);
_avr_set_r16le(avr, d, vr);
if (*is || cycle >= howLong) goto exit;
}
f0210: {
const uint16_t opcode = 0x3081;
cycle++;new_pc = 0x0210 + 2;
get_vh4_k8(opcode);
uint8_t res = vh - k;
_avr_flags_sub_zns(avr, res, vh, k);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0212: {
const uint16_t opcode = 0x0591;
cycle++;new_pc = 0x0212 + 2;
get_vd5_vr5(opcode);
uint8_t res = vd - vr - SREG_BIT(S_C);
_avr_flags_sub_Rzns(avr, res, vd, vr);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0214: {
const uint16_t opcode = 0x1d81;
cycle++;new_pc = 0x0214 + 2;
get_vd5_vr5(opcode);
uint8_t res = vd + vr + SREG_BIT(S_C);
if (r == d) {
} else {
}
_avr_set_r(avr, d, res);
_avr_flags_add_zns(avr, res, vd, vr);
SREG();
if (*is || cycle >= howLong) goto exit;
}
f0216: {
const uint16_t opcode = 0x902d;
cycle++;new_pc = 0x0216 + 2;
int op = opcode & 3;
get_d5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles (1 for tinyavr, except with inc/dec 2)
if (op == 2) x--;
uint8_t vd = _avr_get_ram(avr, x);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
_avr_set_r(avr, d, vd);
if (*is || cycle >= howLong) goto exit;
}
f0218: {
const uint16_t opcode = 0x903d;
cycle++;new_pc = 0x0218 + 2;
int op = opcode & 3;
get_d5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles (1 for tinyavr, except with inc/dec 2)
if (op == 2) x--;
uint8_t vd = _avr_get_ram(avr, x);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
_avr_set_r(avr, d, vd);
if (*is || cycle >= howLong) goto exit;
}
f021a: {
const uint16_t opcode = 0x904d;
cycle++;new_pc = 0x021a + 2;
int op = opcode & 3;
get_d5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles (1 for tinyavr, except with inc/dec 2)
if (op == 2) x--;
uint8_t vd = _avr_get_ram(avr, x);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
_avr_set_r(avr, d, vd);
if (*is || cycle >= howLong) goto exit;
}
f021c: {
const uint16_t opcode = 0x905d;
cycle++;new_pc = 0x021c + 2;
int op = opcode & 3;
get_d5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles (1 for tinyavr, except with inc/dec 2)
if (op == 2) x--;
uint8_t vd = _avr_get_ram(avr, x);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
_avr_set_r(avr, d, vd);
if (*is || cycle >= howLong) goto exit;
}
f021e: {
const uint16_t opcode = 0x906d;
cycle++;new_pc = 0x021e + 2;
int op = opcode & 3;
get_d5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles (1 for tinyavr, except with inc/dec 2)
if (op == 2) x--;
uint8_t vd = _avr_get_ram(avr, x);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
_avr_set_r(avr, d, vd);
if (*is || cycle >= howLong) goto exit;
}
f0220: {
const uint16_t opcode = 0x907d;
cycle++;new_pc = 0x0220 + 2;
int op = opcode & 3;
get_d5(opcode);
uint16_t x = (avr_data[R_XH] << 8) | avr_data[R_XL];
cycle++; // 2 cycles (1 for tinyavr, except with inc/dec 2)
if (op == 2) x--;
uint8_t vd = _avr_get_ram(avr, x);
if (op == 1) x++;
_avr_set_r16le_hl(avr, R_XL, x);
_avr_set_r(avr, d, vd);