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August 29, 2015 13:57
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stm32 168MHz delay
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/* 168MHz = each clock cycle is 6ns. Loop is always 6 clock cycles? | |
* These can get clock stretched if we have interrupts in the background. | |
*/ | |
void delay_ms(const uint16_t ms) | |
{ | |
uint32_t i = ms * 27778; | |
while (i-- > 0) { | |
asm("nop"); | |
} | |
} | |
void delay_us(const uint16_t us) | |
{ | |
uint32_t i = us * 28; | |
while (i-- > 0) { | |
asm("nop"); | |
} | |
} | |
/* every delay 100ns at stm32 168Mhz */ | |
static const uint32_t g_unNSDelayTicks[10] = {1,4,9,15,21,27,32,38,43,49}; | |
static inline void delay_100ns(uint32_t ns100_n) { | |
int r0; | |
uint32_t ns100 = g_unNSDelayTicks[ns100_n]; | |
__ASM volatile ("mov r0, ns100 \n" | |
"loop100us: subs r0, #1 \n" | |
" bhi loop100us \n"); | |
} |
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