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March 15, 2019 17:13
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PR37143.ll failing but it might not need a fail, new version uses X which is less efficient, could see why selection isn't using Z | |
FAIL: LLVM :: CodeGen/AVR/PR37143.ll (3 of 125) | |
******************** TEST 'LLVM :: CodeGen/AVR/PR37143.ll' FAILED ******************** | |
Script: | |
-- | |
: 'RUN: at line 1'; /Code/llvm-build3/bin/llc -mattr=avr6,sram < /Code/llvm/test/CodeGen/AVR/PR37143.ll -march=avr | /Code/llvm-build3/bin/FileCheck /Code/llvm/test/CodeGen/AVR/PR37143.ll | |
-- | |
Exit Code: 1 | |
Command Output (stderr): | |
-- | |
/Code/llvm/test/CodeGen/AVR/PR37143.ll:3:10: error: CHECK: expected string not found in input | |
; CHECK: ld {{r[0-9]+}}, [[PTR:[YZ]]] | |
^ | |
<stdin>:1:2: note: scanning from here | |
.text | |
^ | |
<stdin>:10:2: note: possible intended match here | |
ld r24, X+ | |
^ | |
-- | |
******************** | |
; RUN: llc -mattr=avr6,sram < %s -march=avr | FileCheck %s | |
; CHECK: ld {{r[0-9]+}}, [[PTR:[YZ]]] | |
; CHECK: ldd {{r[0-9]+}}, [[PTR]]+1 | |
; CHECK: st [[PTR]], {{r[0-9]+}} | |
; CHECK: std [[PTR]]+1, {{r[0-9]+}} | |
define void @load_store_16(i16* nocapture %ptr) local_unnamed_addr #1 { | |
entry: | |
%0 = load i16, i16* %ptr, align 2 | |
%add = add i16 %0, 5 | |
store i16 %add, i16* %ptr, align 2 | |
ret void | |
} | |
.text | |
.file "<stdin>" | |
.globl load_store_16 ; -- Begin function load_store_16 | |
.p2align 1 | |
.type load_store_16,@function | |
load_store_16: ; @load_store_16 | |
; %bb.0: ; %entry | |
movw r30, r24 | |
movw r26, r30 | |
ld r24, X+ | |
ld r25, X | |
adiw r24, 5 | |
st Z, r24 | |
std Z+1, r25 | |
ret | |
.Lfunc_end0: | |
.size load_store_16, .Lfunc_end0-load_store_16 | |
; -- End function | |
; Declaring this symbol tells the CRT that it should | |
;copy all variables from program memory to RAM on startup | |
.globl __do_copy_data | |
; Declaring this symbol tells the CRT that it should | |
;clear the zeroed data section on startup | |
.globl __do_clear_bss | |
Atomics/load16.11 failing... | |
******************** TEST 'LLVM :: CodeGen/AVR/atomics/load16.ll' FAILED ******************** | |
Script: | |
-- | |
: 'RUN: at line 1'; /Code/llvm-build3/bin/llc -mattr=avr6 < /Code/llvm/test/CodeGen/AVR/atomics/load16.ll -march=avr | /Code/llvm-build3/bin/FileCheck /Code/llvm/test/CodeGen/AVR/atomics/load16.ll | |
-- | |
Exit Code: 1 | |
Command Output (stderr): | |
-- | |
/Code/llvm/test/CodeGen/AVR/atomics/load16.ll:7:15: error: CHECK-NEXT: expected string not found in input | |
; CHECK-NEXT: ldd [[RR:r[0-9]+]], [[RD]]+1 | |
^ | |
<stdin>:11:11: note: scanning from here | |
ld r24, Z+ | |
^ | |
<stdin>:11:11: note: with variable "RD" equal to "Z" | |
ld r24, Z+ | |
^ | |
<stdin>:12:2: note: possible intended match here | |
ld r25, Z | |
^ | |
/Code/llvm/test/CodeGen/AVR/atomics/load16.ll:33:15: error: CHECK-NEXT: expected string not found in input | |
; CHECK-NEXT: ldd [[RR2:r[0-9]+]], [[RD]]+1 | |
^ | |
<stdin>:54:11: note: scanning from here | |
ld r24, Z+ | |
^ | |
<stdin>:54:11: note: with variable "RD" equal to "Z" | |
ld r24, Z+ | |
^ | |
<stdin>:55:2: note: possible intended match here | |
ld r25, Z | |
^ | |
/Code/llvm/test/CodeGen/AVR/atomics/load16.ll:48:15: error: CHECK-NEXT: expected string not found in input | |
; CHECK-NEXT: ldd [[RR2:r[0-9]+]], [[RD]]+1 | |
^ | |
<stdin>:75:11: note: scanning from here | |
ld r24, Z+ | |
^ | |
<stdin>:75:11: note: with variable "RD" equal to "Z" | |
ld r24, Z+ | |
^ | |
<stdin>:76:2: note: possible intended match here | |
ld r25, Z | |
^ | |
/Code/llvm/test/CodeGen/AVR/atomics/load16.ll:63:15: error: CHECK-NEXT: expected string not found in input | |
; CHECK-NEXT: ldd [[RR2:r[0-9]+]], [[RD]]+1 | |
^ | |
<stdin>:96:11: note: scanning from here | |
ld r24, Z+ | |
^ | |
<stdin>:96:11: note: with variable "RD" equal to "Z" | |
ld r24, Z+ | |
^ | |
<stdin>:97:2: note: possible intended match here | |
ld r25, Z | |
^ | |
/Code/llvm/test/CodeGen/AVR/atomics/load16.ll:78:15: error: CHECK-NEXT: expected string not found in input | |
; CHECK-NEXT: ldd [[RR2:r[0-9]+]], [[RD]]+1 | |
^ | |
<stdin>:117:11: note: scanning from here | |
ld r24, Z+ | |
^ | |
<stdin>:117:11: note: with variable "RD" equal to "Z" | |
ld r24, Z+ | |
^ | |
<stdin>:118:2: note: possible intended match here | |
ld r25, Z | |
^ | |
/Code/llvm/test/CodeGen/AVR/atomics/load16.ll:93:15: error: CHECK-NEXT: expected string not found in input | |
; CHECK-NEXT: ldd [[RR2:r[0-9]+]], [[RD]]+1 | |
^ | |
<stdin>:138:11: note: scanning from here | |
ld r24, Z+ | |
^ | |
<stdin>:138:11: note: with variable "RD" equal to "Z" | |
ld r24, Z+ | |
^ | |
<stdin>:139:2: note: possible intended match here | |
ld r25, Z | |
^ | |
-- | |
******************** | |
; RUN: llc -mattr=avr6 < %s -march=avr | FileCheck %s | |
; CHECK-LABEL: atomic_load16 | |
; CHECK: in r0, 63 | |
; CHECK-NEXT: cli | |
; CHECK-NEXT: ld [[RR:r[0-9]+]], [[RD:(X|Y|Z)]] | |
; CHECK-NEXT: ldd [[RR:r[0-9]+]], [[RD]]+1 | |
; CHECK-NEXT: out 63, r0 | |
define i16 @atomic_load16(i16* %foo) { | |
%val = load atomic i16, i16* %foo unordered, align 2 | |
ret i16 %val | |
} | |
; CHECK-LABEL: atomic_load_swap16 | |
; CHECK: call __sync_lock_test_and_set_2 | |
define i16 @atomic_load_swap16(i16* %foo) { | |
%val = atomicrmw xchg i16* %foo, i16 13 seq_cst | |
ret i16 %val | |
} | |
; CHECK-LABEL: atomic_load_cmp_swap16 | |
; CHECK: call __sync_val_compare_and_swap_2 | |
define i16 @atomic_load_cmp_swap16(i16* %foo) { | |
%val = cmpxchg i16* %foo, i16 5, i16 10 acq_rel monotonic | |
%value_loaded = extractvalue { i16, i1 } %val, 0 | |
ret i16 %value_loaded | |
} | |
; CHECK-LABEL: atomic_load_add16 | |
; CHECK: in r0, 63 | |
; CHECK-NEXT: cli | |
; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD:(X|Y|Z)]] | |
; CHECK-NEXT: ldd [[RR2:r[0-9]+]], [[RD]]+1 | |
; CHECK-NEXT: add [[RR1]], [[TMP:r[0-9]+]] | |
; CHECK-NEXT: adc [[RR2]], [[TMP:r[0-9]+]] | |
; CHECK-NEXT: st [[RD]], [[RR1]] | |
; CHECK-NEXT: std [[RD]]+1, [[A:r[0-9]+]] | |
; CHECK-NEXT: out 63, r0 | |
define i16 @atomic_load_add16(i16* %foo) { | |
%val = atomicrmw add i16* %foo, i16 13 seq_cst | |
ret i16 %val | |
} | |
; CHECK-LABEL: atomic_load_sub16 | |
; CHECK: in r0, 63 | |
; CHECK-NEXT: cli | |
; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD:(X|Y|Z)]] | |
; CHECK-NEXT: ldd [[RR2:r[0-9]+]], [[RD]]+1 | |
; CHECK-NEXT: sub [[RR1]], [[TMP:r[0-9]+]] | |
; CHECK-NEXT: sbc [[RR2]], [[TMP:r[0-9]+]] | |
; CHECK-NEXT: st [[RD]], [[RR1]] | |
; CHECK-NEXT: std [[RD]]+1, [[A:r[0-9]+]] | |
; CHECK-NEXT: out 63, r0 | |
define i16 @atomic_load_sub16(i16* %foo) { | |
%val = atomicrmw sub i16* %foo, i16 13 seq_cst | |
ret i16 %val | |
} | |
; CHECK-LABEL: atomic_load_and16 | |
; CHECK: in r0, 63 | |
; CHECK-NEXT: cli | |
; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD:(X|Y|Z)]] | |
; CHECK-NEXT: ldd [[RR2:r[0-9]+]], [[RD]]+1 | |
; CHECK-NEXT: and [[RR1]], [[TMP:r[0-9]+]] | |
; CHECK-NEXT: and [[RR2]], [[TMP:r[0-9]+]] | |
; CHECK-NEXT: st [[RD]], [[RR1]] | |
; CHECK-NEXT: std [[RD]]+1, [[A:r[0-9]+]] | |
; CHECK-NEXT: out 63, r0 | |
define i16 @atomic_load_and16(i16* %foo) { | |
%val = atomicrmw and i16* %foo, i16 13 seq_cst | |
ret i16 %val | |
} | |
; CHECK-LABEL: atomic_load_or16 | |
; CHECK: in r0, 63 | |
; CHECK-NEXT: cli | |
; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD:(X|Y|Z)]] | |
; CHECK-NEXT: ldd [[RR2:r[0-9]+]], [[RD]]+1 | |
; CHECK-NEXT: or [[RR1]], [[TMP:r[0-9]+]] | |
; CHECK-NEXT: or [[RR2]], [[TMP:r[0-9]+]] | |
; CHECK-NEXT: st [[RD]], [[RR1]] | |
; CHECK-NEXT: std [[RD]]+1, [[A:r[0-9]+]] | |
; CHECK-NEXT: out 63, r0 | |
define i16 @atomic_load_or16(i16* %foo) { | |
%val = atomicrmw or i16* %foo, i16 13 seq_cst | |
ret i16 %val | |
} | |
; CHECK-LABEL: atomic_load_xor16 | |
; CHECK: in r0, 63 | |
; CHECK-NEXT: cli | |
; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD:(X|Y|Z)]] | |
; CHECK-NEXT: ldd [[RR2:r[0-9]+]], [[RD]]+1 | |
; CHECK-NEXT: eor [[RR1]], [[TMP:r[0-9]+]] | |
; CHECK-NEXT: eor [[RR2]], [[TMP:r[0-9]+]] | |
; CHECK-NEXT: st [[RD]], [[RR1]] | |
; CHECK-NEXT: std [[RD]]+1, [[A:r[0-9]+]] | |
; CHECK-NEXT: out 63, r0 | |
define i16 @atomic_load_xor16(i16* %foo) { | |
%val = atomicrmw xor i16* %foo, i16 13 seq_cst | |
ret i16 %val | |
} | |
; CHECK-LABEL: atomic_load_nand16 | |
; CHECK: call __sync_fetch_and_nand_2 | |
define i16 @atomic_load_nand16(i16* %foo) { | |
%val = atomicrmw nand i16* %foo, i16 13 seq_cst | |
ret i16 %val | |
} | |
; CHECK-LABEL: atomic_load_max16 | |
; CHECK: call __sync_fetch_and_max_2 | |
define i16 @atomic_load_max16(i16* %foo) { | |
%val = atomicrmw max i16* %foo, i16 13 seq_cst | |
ret i16 %val | |
} | |
; CHECK-LABEL: atomic_load_min16 | |
; CHECK: call __sync_fetch_and_min_2 | |
define i16 @atomic_load_min16(i16* %foo) { | |
%val = atomicrmw min i16* %foo, i16 13 seq_cst | |
ret i16 %val | |
} | |
; CHECK-LABEL: atomic_load_umax16 | |
; CHECK: call __sync_fetch_and_umax_2 | |
define i16 @atomic_load_umax16(i16* %foo) { | |
%val = atomicrmw umax i16* %foo, i16 13 seq_cst | |
ret i16 %val | |
} | |
; CHECK-LABEL: atomic_load_umin16 | |
; CHECK: call __sync_fetch_and_umin_2 | |
define i16 @atomic_load_umin16(i16* %foo) { | |
%val = atomicrmw umin i16* %foo, i16 13 seq_cst | |
ret i16 %val | |
} | |
Some of the generated code is inefficient, some of it is definitely wrong... | |
UWSUK2M00972:Code cpeto$ /Code/llvm-build3/bin/llc -mattr=avr6 < /Code/llvm/test/CodeGen/AVR/atomics/load16.ll -march=avr | |
.text | |
.file "<stdin>" | |
.globl atomic_load16 ; -- Begin function atomic_load16 | |
.p2align 1 | |
.type atomic_load16,@function | |
atomic_load16: ; @atomic_load16 | |
; %bb.0: | |
movw r30, r24 | |
in r0, 63 | |
cli | |
ld r24, Z+ | |
ld r25, Z | |
out 63, r0 | |
ret | |
.Lfunc_end0: | |
.size atomic_load16, .Lfunc_end0-atomic_load16 | |
; -- End function | |
.globl atomic_load_swap16 ; -- Begin function atomic_load_swap16 | |
.p2align 1 | |
.type atomic_load_swap16,@function | |
atomic_load_swap16: ; @atomic_load_swap16 | |
; %bb.0: | |
ldi r22, 13 | |
ldi r23, 0 | |
call __sync_lock_test_and_set_2 | |
ret | |
.Lfunc_end1: | |
.size atomic_load_swap16, .Lfunc_end1-atomic_load_swap16 | |
; -- End function | |
.globl atomic_load_cmp_swap16 ; -- Begin function atomic_load_cmp_swap16 | |
.p2align 1 | |
.type atomic_load_cmp_swap16,@function | |
atomic_load_cmp_swap16: ; @atomic_load_cmp_swap16 | |
; %bb.0: | |
ldi r22, 5 | |
ldi r23, 0 | |
ldi r20, 10 | |
ldi r21, 0 | |
call __sync_val_compare_and_swap_2 | |
ret | |
.Lfunc_end2: | |
.size atomic_load_cmp_swap16, .Lfunc_end2-atomic_load_cmp_swap16 | |
; -- End function | |
.globl atomic_load_add16 ; -- Begin function atomic_load_add16 | |
.p2align 1 | |
.type atomic_load_add16,@function | |
atomic_load_add16: ; @atomic_load_add16 | |
; %bb.0: | |
movw r30, r24 | |
ldi r24, 13 | |
ldi r25, 0 | |
in r0, 63 | |
cli | |
ld r24, Z+ | |
ld r25, Z | |
add r24, r30 | |
adc r25, r31 | |
st Z, r24 | |
std Z+1, r25 | |
out 63, r0 | |
ret | |
.Lfunc_end3: | |
.size atomic_load_add16, .Lfunc_end3-atomic_load_add16 | |
; -- End function | |
.globl atomic_load_sub16 ; -- Begin function atomic_load_sub16 | |
.p2align 1 | |
.type atomic_load_sub16,@function | |
atomic_load_sub16: ; @atomic_load_sub16 | |
; %bb.0: | |
movw r30, r24 | |
ldi r24, 13 | |
ldi r25, 0 | |
in r0, 63 | |
cli | |
ld r24, Z+ | |
ld r25, Z | |
sub r24, r30 | |
sbc r25, r31 | |
st Z, r24 | |
std Z+1, r25 | |
out 63, r0 | |
ret | |
.Lfunc_end4: | |
.size atomic_load_sub16, .Lfunc_end4-atomic_load_sub16 | |
; -- End function | |
.globl atomic_load_and16 ; -- Begin function atomic_load_and16 | |
.p2align 1 | |
.type atomic_load_and16,@function | |
atomic_load_and16: ; @atomic_load_and16 | |
; %bb.0: | |
movw r30, r24 | |
ldi r24, 13 | |
ldi r25, 0 | |
in r0, 63 | |
cli | |
ld r24, Z+ | |
ld r25, Z | |
and r24, r30 | |
and r25, r31 | |
st Z, r24 | |
std Z+1, r25 | |
out 63, r0 | |
ret | |
.Lfunc_end5: | |
.size atomic_load_and16, .Lfunc_end5-atomic_load_and16 | |
; -- End function | |
.globl atomic_load_or16 ; -- Begin function atomic_load_or16 | |
.p2align 1 | |
.type atomic_load_or16,@function | |
atomic_load_or16: ; @atomic_load_or16 | |
; %bb.0: | |
movw r30, r24 | |
ldi r24, 13 | |
ldi r25, 0 | |
in r0, 63 | |
cli | |
ld r24, Z+ | |
ld r25, Z | |
or r24, r30 | |
or r25, r31 | |
st Z, r24 | |
std Z+1, r25 | |
out 63, r0 | |
ret | |
.Lfunc_end6: | |
.size atomic_load_or16, .Lfunc_end6-atomic_load_or16 | |
; -- End function | |
.globl atomic_load_xor16 ; -- Begin function atomic_load_xor16 | |
.p2align 1 | |
.type atomic_load_xor16,@function | |
atomic_load_xor16: ; @atomic_load_xor16 | |
; %bb.0: | |
movw r30, r24 | |
ldi r24, 13 | |
ldi r25, 0 | |
in r0, 63 | |
cli | |
ld r24, Z+ | |
ld r25, Z | |
eor r24, r30 | |
eor r25, r31 | |
st Z, r24 | |
std Z+1, r25 | |
out 63, r0 | |
ret | |
.Lfunc_end7: | |
.size atomic_load_xor16, .Lfunc_end7-atomic_load_xor16 | |
; -- End function | |
.globl atomic_load_nand16 ; -- Begin function atomic_load_nand16 | |
.p2align 1 | |
.type atomic_load_nand16,@function | |
atomic_load_nand16: ; @atomic_load_nand16 | |
; %bb.0: | |
ldi r22, 13 | |
ldi r23, 0 | |
call __sync_fetch_and_nand_2 | |
ret | |
.Lfunc_end8: | |
.size atomic_load_nand16, .Lfunc_end8-atomic_load_nand16 | |
; -- End function | |
.globl atomic_load_max16 ; -- Begin function atomic_load_max16 | |
.p2align 1 | |
.type atomic_load_max16,@function | |
atomic_load_max16: ; @atomic_load_max16 | |
; %bb.0: | |
ldi r22, 13 | |
ldi r23, 0 | |
call __sync_fetch_and_max_2 | |
ret | |
.Lfunc_end9: | |
.size atomic_load_max16, .Lfunc_end9-atomic_load_max16 | |
; -- End function | |
.globl atomic_load_min16 ; -- Begin function atomic_load_min16 | |
.p2align 1 | |
.type atomic_load_min16,@function | |
atomic_load_min16: ; @atomic_load_min16 | |
; %bb.0: | |
ldi r22, 13 | |
ldi r23, 0 | |
call __sync_fetch_and_min_2 | |
ret | |
.Lfunc_end10: | |
.size atomic_load_min16, .Lfunc_end10-atomic_load_min16 | |
; -- End function | |
.globl atomic_load_umax16 ; -- Begin function atomic_load_umax16 | |
.p2align 1 | |
.type atomic_load_umax16,@function | |
atomic_load_umax16: ; @atomic_load_umax16 | |
; %bb.0: | |
ldi r22, 13 | |
ldi r23, 0 | |
call __sync_fetch_and_umax_2 | |
ret | |
.Lfunc_end11: | |
.size atomic_load_umax16, .Lfunc_end11-atomic_load_umax16 | |
; -- End function | |
.globl atomic_load_umin16 ; -- Begin function atomic_load_umin16 | |
.p2align 1 | |
.type atomic_load_umin16,@function | |
atomic_load_umin16: ; @atomic_load_umin16 | |
; %bb.0: | |
ldi r22, 13 | |
ldi r23, 0 | |
call __sync_fetch_and_umin_2 | |
ret | |
.Lfunc_end12: | |
.size atomic_load_umin16, .Lfunc_end12-atomic_load_umin16 | |
; -- End function | |
; Declaring this symbol tells the CRT that it should | |
;copy all variables from program memory to RAM on startup | |
.globl __do_copy_data | |
; Declaring this symbol tells the CRT that it should | |
;clear the zeroed data section on startup | |
.globl __do_clear_bss | |
UWSUK2M00972:Code cpeto$ | |
FAIL: LLVM :: CodeGen/AVR/load.ll (58 of 125) | |
******************** TEST 'LLVM :: CodeGen/AVR/load.ll' FAILED ******************** | |
Script: | |
-- | |
: 'RUN: at line 1'; /Code/llvm-build3/bin/llc -mattr=avr6,sram < /Code/llvm/test/CodeGen/AVR/load.ll -march=avr | /Code/llvm-build3/bin/FileCheck /Code/llvm/test/CodeGen/AVR/load.ll | |
-- | |
Exit Code: 1 | |
Command Output (stderr): | |
-- | |
/Code/llvm/test/CodeGen/AVR/load.ll:13:10: error: CHECK: expected string not found in input | |
; CHECK: ldd r25, [[PTR]]+1 | |
^ | |
<stdin>:20:11: note: scanning from here | |
ld r24, X+ | |
^ | |
<stdin>:20:11: note: with variable "PTR" equal to "X" | |
ld r24, X+ | |
^ | |
<stdin>:21:2: note: possible intended match here | |
ld r25, X | |
^ | |
/Code/llvm/test/CodeGen/AVR/load.ll:52:10: error: CHECK: expected string not found in input | |
; CHECK: ldd r25, [[PTR]]+1 | |
^ | |
<stdin>:70:11: note: scanning from here | |
ld r24, X+ | |
^ | |
<stdin>:70:11: note: with variable "PTR" equal to "X" | |
ld r24, X+ | |
^ | |
<stdin>:71:2: note: possible intended match here | |
ld r25, X | |
^ | |
-- | |
******************** | |
This doesn't look like a breaking failure | |
; RUN: llc -mattr=avr6,sram < %s -march=avr | FileCheck %s | |
define i8 @load8(i8* %x) { | |
; CHECK-LABEL: load8: | |
; CHECK: ld r24, {{[XYZ]}} | |
%1 = load i8, i8* %x | |
ret i8 %1 | |
} | |
define i16 @load16(i16* %x) { | |
; CHECK-LABEL: load16: | |
; CHECK: ld r24, [[PTR:[XYZ]]] | |
; CHECK: ldd r25, [[PTR]]+1 | |
%1 = load i16, i16* %x | |
ret i16 %1 | |
} | |
define i8 @load8disp(i8* %x) { | |
; CHECK-LABEL: load8disp: | |
; CHECK: ldd r24, {{[YZ]}}+63 | |
%1 = getelementptr inbounds i8, i8* %x, i64 63 | |
%2 = load i8, i8* %1 | |
ret i8 %2 | |
} | |
define i8 @load8nodisp(i8* %x) { | |
; CHECK-LABEL: load8nodisp: | |
; CHECK: movw r26, r24 | |
; CHECK: subi r26, 192 | |
; CHECK: sbci r27, 255 | |
; CHECK: ld r24, {{[XYZ]}} | |
%1 = getelementptr inbounds i8, i8* %x, i64 64 | |
%2 = load i8, i8* %1 | |
ret i8 %2 | |
} | |
define i16 @load16disp(i16* %x) { | |
; CHECK-LABEL: load16disp: | |
; CHECK: ldd r24, [[PTR:[YZ]]]+62 | |
; CHECK: ldd r25, [[PTR]]+63 | |
%1 = getelementptr inbounds i16, i16* %x, i64 31 | |
%2 = load i16, i16* %1 | |
ret i16 %2 | |
} | |
define i16 @load16nodisp(i16* %x) { | |
; CHECK-LABEL: load16nodisp: | |
; CHECK: movw r26, r24 | |
; CHECK: subi r26, 192 | |
; CHECK: sbci r27, 255 | |
; CHECK: ld r24, [[PTR:[XYZ]]] | |
; CHECK: ldd r25, [[PTR]]+1 | |
%1 = getelementptr inbounds i16, i16* %x, i64 32 | |
%2 = load i16, i16* %1 | |
ret i16 %2 | |
} | |
define i8 @load8postinc(i8* %x, i8 %y) { | |
; CHECK-LABEL: load8postinc: | |
; CHECK: ld {{.*}}, {{[XYZ]}}+ | |
entry: | |
%tobool6 = icmp eq i8 %y, 0 | |
br i1 %tobool6, label %while.end, label %while.body | |
while.body: ; preds = %entry, %while.body | |
%r.09 = phi i8 [ %add, %while.body ], [ 0, %entry ] | |
%y.addr.08 = phi i8 [ %dec, %while.body ], [ %y, %entry ] | |
%x.addr.07 = phi i8* [ %incdec.ptr, %while.body ], [ %x, %entry ] | |
%dec = add i8 %y.addr.08, -1 | |
%incdec.ptr = getelementptr inbounds i8, i8* %x.addr.07, i16 1 | |
%0 = load i8, i8* %x.addr.07 | |
%add = add i8 %0, %r.09 | |
%tobool = icmp eq i8 %dec, 0 | |
br i1 %tobool, label %while.end, label %while.body | |
while.end: ; preds = %while.body, %entry | |
%r.0.lcssa = phi i8 [ 0, %entry ], [ %add, %while.body ] | |
ret i8 %r.0.lcssa | |
} | |
define i16 @load16postinc(i16* %x, i16 %y) { | |
; CHECK-LABEL: load16postinc: | |
; CHECK: ld {{.*}}, {{[XYZ]}}+ | |
; CHECK: ld {{.*}}, {{[XYZ]}}+ | |
entry: | |
%tobool2 = icmp eq i16 %y, 0 | |
br i1 %tobool2, label %while.end, label %while.body | |
while.body: ; preds = %entry, %while.body | |
%r.05 = phi i16 [ %add, %while.body ], [ 0, %entry ] | |
%y.addr.04 = phi i16 [ %dec, %while.body ], [ %y, %entry ] | |
%x.addr.03 = phi i16* [ %incdec.ptr, %while.body ], [ %x, %entry ] | |
%dec = add nsw i16 %y.addr.04, -1 | |
%incdec.ptr = getelementptr inbounds i16, i16* %x.addr.03, i16 1 | |
%0 = load i16, i16* %x.addr.03 | |
%add = add nsw i16 %0, %r.05 | |
%tobool = icmp eq i16 %dec, 0 | |
br i1 %tobool, label %while.end, label %while.body | |
while.end: ; preds = %while.body, %entry | |
%r.0.lcssa = phi i16 [ 0, %entry ], [ %add, %while.body ] | |
ret i16 %r.0.lcssa | |
} | |
define i8 @load8predec(i8* %x, i8 %y) { | |
; CHECK-LABEL: load8predec: | |
; CHECK: ld {{.*}}, -{{[XYZ]}} | |
entry: | |
%tobool6 = icmp eq i8 %y, 0 | |
br i1 %tobool6, label %while.end, label %while.body | |
while.body: ; preds = %entry, %while.body | |
%r.09 = phi i8 [ %add, %while.body ], [ 0, %entry ] | |
%y.addr.08 = phi i8 [ %dec, %while.body ], [ %y, %entry ] | |
%x.addr.07 = phi i8* [ %incdec.ptr, %while.body ], [ %x, %entry ] | |
%dec = add i8 %y.addr.08, -1 | |
%incdec.ptr = getelementptr inbounds i8, i8* %x.addr.07, i16 -1 | |
%0 = load i8, i8* %incdec.ptr | |
%add = add i8 %0, %r.09 | |
%tobool = icmp eq i8 %dec, 0 | |
br i1 %tobool, label %while.end, label %while.body | |
while.end: ; preds = %while.body, %entry | |
%r.0.lcssa = phi i8 [ 0, %entry ], [ %add, %while.body ] | |
ret i8 %r.0.lcssa | |
} | |
define i16 @load16predec(i16* %x, i16 %y) { | |
; CHECK-LABEL: load16predec: | |
; CHECK: ld {{.*}}, -{{[XYZ]}} | |
; CHECK: ld {{.*}}, -{{[XYZ]}} | |
entry: | |
%tobool2 = icmp eq i16 %y, 0 | |
br i1 %tobool2, label %while.end, label %while.body | |
while.body: ; preds = %entry, %while.body | |
%r.05 = phi i16 [ %add, %while.body ], [ 0, %entry ] | |
%y.addr.04 = phi i16 [ %dec, %while.body ], [ %y, %entry ] | |
%x.addr.03 = phi i16* [ %incdec.ptr, %while.body ], [ %x, %entry ] | |
%dec = add nsw i16 %y.addr.04, -1 | |
%incdec.ptr = getelementptr inbounds i16, i16* %x.addr.03, i16 -1 | |
%0 = load i16, i16* %incdec.ptr | |
%add = add nsw i16 %0, %r.05 | |
%tobool = icmp eq i16 %dec, 0 | |
br i1 %tobool, label %while.end, label %while.body | |
while.end: ; preds = %while.body, %entry | |
%r.0.lcssa = phi i16 [ 0, %entry ], [ %add, %while.body ] | |
ret i16 %r.0.lcssa | |
} | |
.text | |
.file "<stdin>" | |
.globl load8 ; -- Begin function load8 | |
.p2align 1 | |
.type load8,@function | |
load8: ; @load8 | |
; %bb.0: | |
movw r26, r24 | |
ld r24, X | |
ret | |
.Lfunc_end0: | |
.size load8, .Lfunc_end0-load8 | |
; -- End function | |
.globl load16 ; -- Begin function load16 | |
.p2align 1 | |
.type load16,@function | |
load16: ; @load16 | |
; %bb.0: | |
movw r26, r24 | |
ld r24, X+ | |
ld r25, X | |
ret | |
.Lfunc_end1: | |
.size load16, .Lfunc_end1-load16 | |
; -- End function | |
.globl load8disp ; -- Begin function load8disp | |
.p2align 1 | |
.type load8disp,@function | |
load8disp: ; @load8disp | |
; %bb.0: | |
movw r30, r24 | |
ldd r24, Z+63 | |
ret | |
.Lfunc_end2: | |
.size load8disp, .Lfunc_end2-load8disp | |
; -- End function | |
.globl load8nodisp ; -- Begin function load8nodisp | |
.p2align 1 | |
.type load8nodisp,@function | |
load8nodisp: ; @load8nodisp | |
; %bb.0: | |
movw r26, r24 | |
subi r26, 192 | |
sbci r27, 255 | |
ld r24, X | |
ret | |
.Lfunc_end3: | |
.size load8nodisp, .Lfunc_end3-load8nodisp | |
; -- End function | |
.globl load16disp ; -- Begin function load16disp | |
.p2align 1 | |
.type load16disp,@function | |
load16disp: ; @load16disp | |
; %bb.0: | |
movw r30, r24 | |
ldd r24, Z+62 | |
ldd r25, Z+63 | |
ret | |
.Lfunc_end4: | |
.size load16disp, .Lfunc_end4-load16disp | |
; -- End function | |
.globl load16nodisp ; -- Begin function load16nodisp | |
.p2align 1 | |
.type load16nodisp,@function | |
load16nodisp: ; @load16nodisp | |
; %bb.0: | |
movw r26, r24 | |
subi r26, 192 | |
sbci r27, 255 | |
ld r24, X+ | |
ld r25, X | |
ret | |
.Lfunc_end5: | |
.size load16nodisp, .Lfunc_end5-load16nodisp | |
; -- End function | |
.globl load8postinc ; -- Begin function load8postinc | |
.p2align 1 | |
.type load8postinc,@function | |
load8postinc: ; @load8postinc | |
; %bb.0: ; %entry | |
movw r26, r24 | |
ldi r24, 0 | |
cpi r22, 0 | |
breq LBB6_2 | |
LBB6_1: ; %while.body | |
; =>This Inner Loop Header: Depth=1 | |
ld r25, X+ | |
add r24, r25 | |
dec r22 | |
cpi r22, 0 | |
brne LBB6_1 | |
LBB6_2: ; %while.end | |
ret | |
.Lfunc_end6: | |
.size load8postinc, .Lfunc_end6-load8postinc | |
; -- End function | |
.globl load16postinc ; -- Begin function load16postinc | |
.p2align 1 | |
.type load16postinc,@function | |
load16postinc: ; @load16postinc | |
; %bb.0: ; %entry | |
movw r30, r22 | |
movw r26, r24 | |
ldi r18, 0 | |
ldi r19, 0 | |
cp r30, r18 | |
cpc r31, r19 | |
breq LBB7_4 | |
; %bb.1: ; %while.body.preheader | |
movw r24, r18 | |
LBB7_2: ; %while.body | |
; =>This Inner Loop Header: Depth=1 | |
ld r20, X+ | |
ld r21, X+ | |
add r24, r20 | |
adc r25, r21 | |
sbiw r30, 1 | |
cp r30, r18 | |
cpc r31, r19 | |
brne LBB7_2 | |
; %bb.3: ; %while.end | |
ret | |
LBB7_4: | |
movw r24, r18 | |
ret | |
.Lfunc_end7: | |
.size load16postinc, .Lfunc_end7-load16postinc | |
; -- End function | |
.globl load8predec ; -- Begin function load8predec | |
.p2align 1 | |
.type load8predec,@function | |
load8predec: ; @load8predec | |
; %bb.0: ; %entry | |
movw r26, r24 | |
ldi r24, 0 | |
cpi r22, 0 | |
breq LBB8_2 | |
LBB8_1: ; %while.body | |
; =>This Inner Loop Header: Depth=1 | |
ld r25, -X | |
add r24, r25 | |
dec r22 | |
cpi r22, 0 | |
brne LBB8_1 | |
LBB8_2: ; %while.end | |
ret | |
.Lfunc_end8: | |
.size load8predec, .Lfunc_end8-load8predec | |
; -- End function | |
.globl load16predec ; -- Begin function load16predec | |
.p2align 1 | |
.type load16predec,@function | |
load16predec: ; @load16predec | |
; %bb.0: ; %entry | |
movw r30, r22 | |
movw r26, r24 | |
ldi r18, 0 | |
ldi r19, 0 | |
cp r30, r18 | |
cpc r31, r19 | |
breq LBB9_4 | |
; %bb.1: ; %while.body.preheader | |
movw r24, r18 | |
LBB9_2: ; %while.body | |
; =>This Inner Loop Header: Depth=1 | |
ld r21, -X | |
ld r20, -X | |
add r24, r20 | |
adc r25, r21 | |
sbiw r30, 1 | |
cp r30, r18 | |
cpc r31, r19 | |
brne LBB9_2 | |
; %bb.3: ; %while.end | |
ret | |
LBB9_4: | |
movw r24, r18 | |
ret | |
.Lfunc_end9: | |
.size load16predec, .Lfunc_end9-load16predec | |
; -- End function | |
; Declaring this symbol tells the CRT that it should | |
;copy all variables from program memory to RAM on startup | |
.globl __do_copy_data | |
; Declaring this symbol tells the CRT that it should | |
;clear the zeroed data section on startup | |
.globl __do_clear_bss | |
Some crashes... | |
FAIL: LLVM :: CodeGen/AVR/pseudo/LDWRdPtr-same-src-dst.mir (76 of 125) | |
******************** TEST 'LLVM :: CodeGen/AVR/pseudo/LDWRdPtr-same-src-dst.mir' FAILED ******************** | |
Script: | |
-- | |
: 'RUN: at line 1'; /Code/llvm-build3/bin/llc -O0 /Code/llvm/test/CodeGen/AVR/pseudo/LDWRdPtr-same-src-dst.mir -o - | /Code/llvm-build3/bin/FileCheck /Code/llvm/test/CodeGen/AVR/pseudo/LDWRdPtr-same-src-dst.mir | |
-- | |
Exit Code: 2 | |
Command Output (stderr): | |
-- | |
# Machine code for function test_ldwrdptr: IsSSA, NoPHIs, TracksLiveness, NoVRegs | |
bb.0.entry: | |
early-clobber $r31r30 = LDWRdPtr undef $r31r30 | |
# End machine code for function test_ldwrdptr. | |
*** Bad machine code: Too few operands *** | |
- function: test_ldwrdptr | |
- basic block: %bb.0 entry (0x7fbe8802f878) | |
- instruction: early-clobber $r31r30 = LDWRdPtr undef $r31r30 | |
3 operands expected, but 2 given. | |
*** Bad machine code: Explicit definition marked as use *** | |
- function: test_ldwrdptr | |
- basic block: %bb.0 entry (0x7fbe8802f878) | |
- instruction: early-clobber $r31r30 = LDWRdPtr undef $r31r30 | |
- operand 1: undef $r31r30 | |
LLVM ERROR: Found 2 machine code errors. | |
FileCheck error: '-' is empty. | |
FileCheck command line: /Code/llvm-build3/bin/FileCheck /Code/llvm/test/CodeGen/AVR/pseudo/LDWRdPtr-same-src-dst.mir | |
-- | |
******************** | |
# RUN: llc -O0 %s -o - | FileCheck %s | |
# This test checks the expansion of the 16-bit LDWRdPtr pseudo instruction. | |
--- | | |
target triple = "avr--" | |
define void @test_ldwrdptr() { | |
entry: | |
ret void | |
} | |
... | |
--- | |
name: test_ldwrdptr | |
tracksRegLiveness: true | |
body: | | |
bb.0.entry: | |
; CHECK-LABEL: test_ldwrdptr | |
; CHECK: ld [[SCRATCH:r[0-9]+]], Z | |
; CHECK-NEXT: push [[SCRATCH]] | |
; CHECK-NEXT: ldd [[SCRATCH]], Z+1 | |
; CHECK-NEXT: mov r31, [[SCRATCH]] | |
; CHECK-NEXT: pop r30 | |
early-clobber $r31r30 = LDWRdPtr undef $r31r30 | |
... | |
FAIL: LLVM :: CodeGen/AVR/pseudo/LDWRdPtr.mir (77 of 125) | |
******************** TEST 'LLVM :: CodeGen/AVR/pseudo/LDWRdPtr.mir' FAILED ******************** | |
Script: | |
-- | |
: 'RUN: at line 1'; /Code/llvm-build3/bin/llc -O0 -run-pass=avr-expand-pseudo /Code/llvm/test/CodeGen/AVR/pseudo/LDWRdPtr.mir -o - | /Code/llvm-build3/bin/FileCheck /Code/llvm/test/CodeGen/AVR/pseudo/LDWRdPtr.mir | |
-- | |
Exit Code: 2 | |
Command Output (stderr): | |
-- | |
# Machine code for function test_ldwrdptr: IsSSA, NoPHIs, NoVRegs | |
bb.0.entry: | |
early-clobber $r1r0 = LDWRdPtr $r31r30 | |
# End machine code for function test_ldwrdptr. | |
*** Bad machine code: Too few operands *** | |
- function: test_ldwrdptr | |
- basic block: %bb.0 entry (0x7f9798801e78) | |
- instruction: early-clobber $r1r0 = LDWRdPtr $r31r30 | |
3 operands expected, but 2 given. | |
*** Bad machine code: Explicit definition marked as use *** | |
- function: test_ldwrdptr | |
- basic block: %bb.0 entry (0x7f9798801e78) | |
- instruction: early-clobber $r1r0 = LDWRdPtr $r31r30 | |
- operand 1: $r31r30 | |
LLVM ERROR: Found 2 machine code errors. | |
FileCheck error: '-' is empty. | |
FileCheck command line: /Code/llvm-build3/bin/FileCheck /Code/llvm/test/CodeGen/AVR/pseudo/LDWRdPtr.mir | |
-- | |
******************** | |
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s | |
# This test checks the expansion of the 16-bit LDWRdPtr pseudo instruction. | |
--- | | |
target triple = "avr--" | |
define void @test_ldwrdptr() { | |
entry: | |
ret void | |
} | |
... | |
--- | |
name: test_ldwrdptr | |
body: | | |
bb.0.entry: | |
; CHECK-LABEL: test_ldwrdptr | |
; CHECK: $r0, $r31r30 = LDRdPtr | |
; CHECK-NEXT: $r1 = LDDRdPtrQ $r31r30, 1 | |
$r1r0 = LDWRdPtr $r31r30 | |
... | |
This looks serious | |
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