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carlos4242/gist:bb47ee95ba4b3638a58be92316c80c88

Created January 11, 2019 12:15
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debug output issue
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gistfile1.txt
Carls-MacBook-Air:AVR carlpeto$ /Users/carlpeto/llvm/llvm2/llvm-avr/build/llvm/bin/llc < mc-block-order-regression.ll -O1 -march=avr -debug -print-after-all
Args: /Users/carlpeto/llvm/llvm2/llvm-avr/build/llvm/bin/llc -O1 -march=avr -debug -print-after-all
Features:
CPU:avr2
discovered a new reachable node %entry
discovered a new reachable node %9
discovered a new reachable node %2
discovered a new reachable node %8
.text
.file "<stdin>"
*** IR Dump After Pre-ISel Intrinsic Lowering ***; ModuleID = '<stdin>'
source_filename = "<stdin>"
target datalayout = "e-P1-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8"
target triple = "x86_64-apple-macosx10.9"
%Vs5UInt8 = type <{ i8 }>
%Vs6UInt32 = type <{ i32 }>
%Sb = type <{ i1 }>
@_Tv4main11delayFactorVs5UInt8 = hidden local_unnamed_addr global %Vs5UInt8 zeroinitializer, align 1
@_Tv4main7delayUsVs6UInt32 = hidden local_unnamed_addr global %Vs6UInt32 zeroinitializer, align 4
@_Tv4main7enabledSb = hidden local_unnamed_addr global %Sb zeroinitializer, align 1
declare void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16, i8) local_unnamed_addr addrspace(0)
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
discovered a new reachable node %entry
discovered a new reachable node %9
discovered a new reachable node %2
discovered a new reachable node %8
discovered a new reachable node %entry
discovered a new reachable node %9
discovered a new reachable node %2
discovered a new reachable node %8
*** IR Dump After Module Verifier ***
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
*** IR Dump After Canonicalize natural loops ***
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
MergeICmpsPass: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
*** IR Dump After Merge contiguous icmps into a memcmp ***
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
*** IR Dump After Expand memcmp() to load/stores ***
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
*** IR Dump After Lower Garbage Collection Instructions ***
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
*** IR Dump After Shadow Stack GC Lowering ***
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
*** IR Dump After Remove unreachable blocks from the CFG ***
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
discovered a new reachable node %entry
discovered a new reachable node %9
discovered a new reachable node %2
discovered a new reachable node %8
---- Branch Probability Info : _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_ ----
Computing probabilities for
Computing probabilities for
Computing probabilities for
Computing probabilities for entry
block-frequency: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
==================================================================
reverse-post-order-traversal
- 0: entry
- 1:
- 2:
- 3:
loop-detection
compute-mass-in-function
- node: entry
=> [ local ] weight = 715827883, succ =
=> [ local ] weight = 715827883, succ =
=> [ local ] weight = 715827883, succ =
=> mass: ffffffffffffffff
=> assign 55555555ffffffff (aaaaaaaa00000000) to
=> assign 5555555500000000 (5555555500000000) to
=> assign 5555555500000000 (0000000000000000) to
- node:
=> [ local ] weight = 2147483648, succ =
=> mass: 55555555ffffffff
=> assign 55555555ffffffff (0000000000000000) to
- node:
=> [ local ] weight = 2147483648, succ =
=> mass: 5555555500000000
=> assign 5555555500000000 (0000000000000000) to
- node:
=> mass: ffffffffffffffff
float-to-int: min = 0.3333333333, max = 1.0, factor = 24.00000001
- entry: float = 1.0, scaled = 24.00000001, int = 24
- : float = 0.3333333335, scaled = 8.000000006, int = 8
- : float = 0.3333333333, scaled = 8.0, int = 7
- : float = 1.0, scaled = 24.00000001, int = 24
block-frequency-info: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
- entry: float = 1.0, int = 24
- : float = 0.33333, int = 7
- : float = 0.33333, int = 8
- : float = 1.0, int = 24
********** Begin Constant Hoisting **********
********** Function: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
********** End Constant Hoisting **********
*** IR Dump After Constant Hoisting ***
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
*** IR Dump After Partially inline calls to library functions ***
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
*** IR Dump After Instrument function entry/exit with calls to e.g. mcount() (post inlining) ***
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
*** IR Dump After Scalarize Masked Memory Intrinsics ***
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
*** IR Dump After Expand reduction intrinsics ***
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
discovered a new reachable node %entry
discovered a new reachable node %9
discovered a new reachable node %2
discovered a new reachable node %8
---- Branch Probability Info : _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_ ----
Computing probabilities for
Computing probabilities for
Computing probabilities for
Computing probabilities for entry
block-frequency: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
==================================================================
reverse-post-order-traversal
- 0: entry
- 1:
- 2:
- 3:
loop-detection
compute-mass-in-function
- node: entry
=> [ local ] weight = 715827883, succ =
=> [ local ] weight = 715827883, succ =
=> [ local ] weight = 715827883, succ =
=> mass: ffffffffffffffff
=> assign 55555555ffffffff (aaaaaaaa00000000) to
=> assign 5555555500000000 (5555555500000000) to
=> assign 5555555500000000 (0000000000000000) to
- node:
=> [ local ] weight = 2147483648, succ =
=> mass: 55555555ffffffff
=> assign 55555555ffffffff (0000000000000000) to
- node:
=> [ local ] weight = 2147483648, succ =
=> mass: 5555555500000000
=> assign 5555555500000000 (0000000000000000) to
- node:
=> mass: ffffffffffffffff
float-to-int: min = 0.3333333333, max = 1.0, factor = 24.00000001
- entry: float = 1.0, scaled = 24.00000001, int = 24
- : float = 0.3333333335, scaled = 8.000000006, int = 8
- : float = 0.3333333333, scaled = 8.0, int = 7
- : float = 1.0, scaled = 24.00000001, int = 24
block-frequency-info: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
- entry: float = 1.0, int = 24
- : float = 0.33333, int = 7
- : float = 0.33333, int = 8
- : float = 1.0, int = 24
CGP: Found local addrmode: [GV:@_Tv4main11delayFactorVs5UInt8]
CGP: Found local addrmode: [GV:@_Tv4main7delayUsVs6UInt32]
CGP: Found local addrmode: [GV:@_Tv4main7enabledSb]
*** IR Dump After CodeGen Prepare ***
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
*** IR Dump After Rewrite Symbols ***; ModuleID = '<stdin>'
source_filename = "<stdin>"
target datalayout = "e-P1-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8"
target triple = "x86_64-apple-macosx10.9"
%Vs5UInt8 = type <{ i8 }>
%Vs6UInt32 = type <{ i32 }>
%Sb = type <{ i1 }>
@_Tv4main11delayFactorVs5UInt8 = hidden local_unnamed_addr global %Vs5UInt8 zeroinitializer, align 1
@_Tv4main7delayUsVs6UInt32 = hidden local_unnamed_addr global %Vs6UInt32 zeroinitializer, align 4
@_Tv4main7enabledSb = hidden local_unnamed_addr global %Sb zeroinitializer, align 1
declare void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16, i8) local_unnamed_addr addrspace(0)
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
*** IR Dump After Lower invoke and unwind, for unwindless code generators ***
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
*** IR Dump After Remove unreachable blocks from the CFG ***
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
[SafeStack] Function: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
[SafeStack] safestack is not requested for this function
*** IR Dump After Safe Stack instrumentation pass ***
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
discovered a new reachable node %entry
discovered a new reachable node %9
discovered a new reachable node %2
discovered a new reachable node %8
*** IR Dump After Module Verifier ***
define hidden void @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_(i8, i8) local_unnamed_addr addrspace(0) {
entry:
switch i8 %0, label %9 [
i8 6, label %2
i8 7, label %8
]
; <label>:2: ; preds = %entry
%3 = icmp ugt i8 %1, 90
%4 = icmp ult i8 %1, 5
%. = select i1 %4, i8 5, i8 %1
%5 = select i1 %3, i8 90, i8 %.
store i8 %5, i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0), align 1
%6 = zext i8 %5 to i32
%7 = mul nuw nsw i32 %6, 100
store i32 %7, i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0), align 4
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 34, i8 %5)
br label %9
; <label>:8: ; preds = %entry
%not. = icmp ne i8 %1, 0
%.2 = zext i1 %not. to i8
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0), align 1
tail call addrspace(0) void @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_(i16 35, i8 %.2)
br label %9
; <label>:9: ; preds = %8, %2, %entry
ret void
}
discovered a new reachable node %entry
discovered a new reachable node %9
discovered a new reachable node %2
discovered a new reachable node %8
---- Branch Probability Info : _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_ ----
Computing probabilities for
Computing probabilities for
Computing probabilities for
Computing probabilities for entry
=== _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
Creating new node: t2: i8,ch = CopyFromReg t0, Register:i8 %0
Creating new node: t4: i8,ch = CopyFromReg t0, Register:i8 %1
Case clusters: 6 7
Creating constant: t5: i8 = Constant<7>
Creating new node: t7: i1 = setcc t2, Constant:i8<7>, seteq:ch
Creating new node: t9: ch = brcond t0, t7, BasicBlock:ch< 0x7f8103002608>
Creating new node: t11: ch = br t9, BasicBlock:ch<entry 0x7f8103002798>
Initial selection DAG: %bb.0 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:entry'
SelectionDAG has 12 nodes:
t0: ch = EntryToken
t4: i8,ch = CopyFromReg t0, Register:i8 %1
t2: i8,ch = CopyFromReg t0, Register:i8 %0
t7: i1 = setcc t2, Constant:i8<7>, seteq:ch
t9: ch = brcond t0, t7, BasicBlock:ch< 0x7f8103002608>
t11: ch = br t9, BasicBlock:ch<entry 0x7f8103002798>
Combining: t11: ch = br t9, BasicBlock:ch<entry 0x7f8103002798>
Combining: t10: ch = BasicBlock<entry 0x7f8103002798>
Combining: t9: ch = brcond t0, t7, BasicBlock:ch< 0x7f8103002608>
Creating new node: t12: ch = br_cc t0, seteq:ch, t2, Constant:i8<7>, BasicBlock:ch< 0x7f8103002608>
... into: t12: ch = br_cc t0, seteq:ch, t2, Constant:i8<7>, BasicBlock:ch< 0x7f8103002608>
Combining: t11: ch = br t12, BasicBlock:ch<entry 0x7f8103002798>
Combining: t12: ch = br_cc t0, seteq:ch, t2, Constant:i8<7>, BasicBlock:ch< 0x7f8103002608>
Combining: t8: ch = BasicBlock< 0x7f8103002608>
Combining: t6: ch = seteq
Combining: t5: i8 = Constant<7>
Combining: t2: i8,ch = CopyFromReg t0, Register:i8 %0
Combining: t1: i8 = Register %0
Combining: t0: ch = EntryToken
Optimized lowered selection DAG: %bb.0 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:entry'
SelectionDAG has 9 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %0
t12: ch = br_cc t0, seteq:ch, t2, Constant:i8<7>, BasicBlock:ch< 0x7f8103002608>
t11: ch = br t12, BasicBlock:ch<entry 0x7f8103002798>
Legalizing node: t10: ch = BasicBlock<entry 0x7f8103002798>
Analyzing result type: ch
Legal result type
Legally typed node: t10: ch = BasicBlock<entry 0x7f8103002798>
Legalizing node: t8: ch = BasicBlock< 0x7f8103002608>
Analyzing result type: ch
Legal result type
Legally typed node: t8: ch = BasicBlock< 0x7f8103002608>
Legalizing node: t6: ch = seteq
Analyzing result type: ch
Legal result type
Legally typed node: t6: ch = seteq
Legalizing node: t5: i8 = Constant<7>
Analyzing result type: i8
Legal result type
Legally typed node: t5: i8 = Constant<7>
Legalizing node: t1: i8 = Register %0
Ignoring node results
Legally typed node: t1: i8 = Register %0
Legalizing node: t0: ch = EntryToken
Analyzing result type: ch
Legal result type
Legally typed node: t0: ch = EntryToken
Legalizing node: t2: i8,ch = CopyFromReg t0, Register:i8 %0
Analyzing result type: i8
Legal result type
Analyzing result type: ch
Legal result type
Analyzing operand: t0: ch = EntryToken
Legal operand
Legally typed node: t2: i8,ch = CopyFromReg t0, Register:i8 %0
Legalizing node: t12: ch = br_cc t0, seteq:ch, t2, Constant:i8<7>, BasicBlock:ch< 0x7f8103002608>
Analyzing result type: ch
Legal result type
Analyzing operand: t0: ch = EntryToken
Legal operand
Analyzing operand: t6: ch = seteq
Legal operand
Analyzing operand: t2: i8,ch = CopyFromReg t0, Register:i8 %0
Legal operand
Analyzing operand: t5: i8 = Constant<7>
Legal operand
Analyzing operand: t8: ch = BasicBlock< 0x7f8103002608>
Legal operand
Legally typed node: t12: ch = br_cc t0, seteq:ch, t2, Constant:i8<7>, BasicBlock:ch< 0x7f8103002608>
Legalizing node: t11: ch = br t12, BasicBlock:ch<entry 0x7f8103002798>
Analyzing result type: ch
Legal result type
Analyzing operand: t12: ch = br_cc t0, seteq:ch, t2, Constant:i8<7>, BasicBlock:ch< 0x7f8103002608>
Legal operand
Analyzing operand: t10: ch = BasicBlock<entry 0x7f8103002798>
Legal operand
Legally typed node: t11: ch = br t12, BasicBlock:ch<entry 0x7f8103002798>
Legalizing node: t65535: ch = handlenode t11
Analyzing result type: ch
Legal result type
Analyzing operand: t11: ch = br t12, BasicBlock:ch<entry 0x7f8103002798>
Legal operand
Legally typed node: t65535: ch = handlenode t11
Type-legalized selection DAG: %bb.0 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:entry'
SelectionDAG has 9 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %0
t12: ch = br_cc t0, seteq:ch, t2, Constant:i8<7>, BasicBlock:ch< 0x7f8103002608>
t11: ch = br t12, BasicBlock:ch<entry 0x7f8103002798>
Legalizing: t11: ch = br t12, BasicBlock:ch<entry 0x7f8103002798>
Legal node: nothing to do
Legalizing: t12: ch = br_cc t0, seteq:ch, t2, Constant:i8<7>, BasicBlock:ch< 0x7f8103002608>
Trying custom legalization
Creating new node: t13: glue = CMP t2, Constant:i8<7>
Creating constant: t14: i8 = Constant<0>
Creating new node: t15: ch = BRCOND t0, BasicBlock:ch< 0x7f8103002608>, Constant:i8<0>, t13
Successfully custom legalized node
... replacing: t12: ch = br_cc t0, seteq:ch, t2, Constant:i8<7>, BasicBlock:ch< 0x7f8103002608>
with: t15: ch = BRCOND t0, BasicBlock:ch< 0x7f8103002608>, Constant:i8<0>, t13
Legalizing: t2: i8,ch = CopyFromReg t0, Register:i8 %0
Legal node: nothing to do
Legalizing: t10: ch = BasicBlock<entry 0x7f8103002798>
Legal node: nothing to do
Legalizing: t8: ch = BasicBlock< 0x7f8103002608>
Legal node: nothing to do
Legalizing: t5: i8 = Constant<7>
Legal node: nothing to do
Legalizing: t1: i8 = Register %0
Legalizing: t0: ch = EntryToken
Legal node: nothing to do
Legalizing: t15: ch = BRCOND t0, BasicBlock:ch< 0x7f8103002608>, Constant:i8<0>, t13
Legal node: nothing to do
Legalizing: t14: i8 = Constant<0>
Legal node: nothing to do
Legalizing: t13: glue = CMP t2, Constant:i8<7>
Legal node: nothing to do
Legalized selection DAG: %bb.0 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:entry'
SelectionDAG has 10 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %0
t13: glue = CMP t2, Constant:i8<7>
t15: ch = BRCOND t0, BasicBlock:ch< 0x7f8103002608>, Constant:i8<0>, t13
t11: ch = br t15, BasicBlock:ch<entry 0x7f8103002798>
Legalizing: t15: ch = BRCOND t0, BasicBlock:ch< 0x7f8103002608>, Constant:i8<0>, t13
Legal node: nothing to do
Combining: t15: ch = BRCOND t0, BasicBlock:ch< 0x7f8103002608>, Constant:i8<0>, t13
Legalizing: t14: i8 = Constant<0>
Legal node: nothing to do
Combining: t14: i8 = Constant<0>
Legalizing: t13: glue = CMP t2, Constant:i8<7>
Legal node: nothing to do
Combining: t13: glue = CMP t2, Constant:i8<7>
Legalizing: t11: ch = br t15, BasicBlock:ch<entry 0x7f8103002798>
Legal node: nothing to do
Combining: t11: ch = br t15, BasicBlock:ch<entry 0x7f8103002798>
Legalizing: t2: i8,ch = CopyFromReg t0, Register:i8 %0
Legal node: nothing to do
Combining: t2: i8,ch = CopyFromReg t0, Register:i8 %0
Legalizing: t10: ch = BasicBlock<entry 0x7f8103002798>
Legal node: nothing to do
Combining: t10: ch = BasicBlock<entry 0x7f8103002798>
Legalizing: t8: ch = BasicBlock< 0x7f8103002608>
Legal node: nothing to do
Combining: t8: ch = BasicBlock< 0x7f8103002608>
Legalizing: t5: i8 = Constant<7>
Legal node: nothing to do
Combining: t5: i8 = Constant<7>
Legalizing: t1: i8 = Register %0
Combining: t1: i8 = Register %0
Legalizing: t0: ch = EntryToken
Legal node: nothing to do
Combining: t0: ch = EntryToken
Optimized legalized selection DAG: %bb.0 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:entry'
SelectionDAG has 10 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %0
t13: glue = CMP t2, Constant:i8<7>
t15: ch = BRCOND t0, BasicBlock:ch< 0x7f8103002608>, Constant:i8<0>, t13
t11: ch = br t15, BasicBlock:ch<entry 0x7f8103002798>
===== Instruction selection begins: %bb.0 'entry'
ISEL: Starting selection on root node: t11: ch = br t15, BasicBlock:ch<entry 0x7f8103002798>
ISEL: Starting pattern match
Morphed node: t11: ch = RJMPk BasicBlock:ch<entry 0x7f8103002798>, t15
ISEL: Match complete!
ISEL: Starting selection on root node: t15: ch = BRCOND t0, BasicBlock:ch< 0x7f8103002608>, Constant:i8<0>, t13
ISEL: Starting pattern match
Initial Opcode index to 1237
Morphed node: t15: ch = BREQk BasicBlock:ch< 0x7f8103002608>, t0, t13
ISEL: Match complete!
ISEL: Starting selection on root node: t13: glue = CMP t2, Constant:i8<7>
ISEL: Starting pattern match
Initial Opcode index to 1607
Creating constant: t16: i8 = TargetConstant<7>
Morphed node: t13: i8,glue = CPIRdK t2, TargetConstant:i8<7>
ISEL: Match complete!
ISEL: Starting selection on root node: t2: i8,ch = CopyFromReg t0, Register:i8 %0
ISEL: Starting selection on root node: t10: ch = BasicBlock<entry 0x7f8103002798>
ISEL: Starting selection on root node: t8: ch = BasicBlock< 0x7f8103002608>
ISEL: Starting selection on root node: t1: i8 = Register %0
ISEL: Starting selection on root node: t0: ch = EntryToken
===== Instruction selection ends:
Selected selection DAG: %bb.0 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:entry'
SelectionDAG has 9 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %0
t13: i8,glue = CPIRdK t2, TargetConstant:i8<7>
t15: ch = BREQk BasicBlock:ch< 0x7f8103002608>, t0, t13:1
t11: ch = RJMPk BasicBlock:ch<entry 0x7f8103002798>, t15
********** List Scheduling %bb.0 'entry' **********
SU(0): t11: ch = RJMPk BasicBlock:ch<entry 0x7f8103002798>, t15
# preds left : 1
# succs left : 0
# rdefs left : 0
Latency : 1
Depth : 2
Height : 0
Predecessors:
SU(1): Ord Latency=1 Barrier
SU(1): t15: ch = BREQk BasicBlock:ch< 0x7f8103002608>, t0, t13:1
t13: i8,glue = CPIRdK t2, TargetConstant:i8<7>
# preds left : 1
# succs left : 1
# rdefs left : 0
Latency : 1
Depth : 1
Height : 1
Predecessors:
SU(2): Data Latency=1
Successors:
SU(0): Ord Latency=1 Barrier
SU(2): t2: i8,ch = CopyFromReg t0, Register:i8 %0
# preds left : 0
# succs left : 1
# rdefs left : 1
Latency : 1
Depth : 0
Height : 2
Successors:
SU(1): Data Latency=1
Examining Available:
Height 0: SU(0): t11: ch = RJMPk BasicBlock:ch<entry 0x7f8103002798>, t15
*** Scheduling [0]: SU(0): t11: ch = RJMPk BasicBlock:ch<entry 0x7f8103002798>, t15
Examining Available:
Height 1: SU(1): t15: ch = BREQk BasicBlock:ch< 0x7f8103002608>, t0, t13:1
t13: i8,glue = CPIRdK t2, TargetConstant:i8<7>
*** Scheduling [1]: SU(1): t15: ch = BREQk BasicBlock:ch< 0x7f8103002608>, t0, t13:1
t13: i8,glue = CPIRdK t2, TargetConstant:i8<7>
Examining Available:
Height 2: SU(2): t2: i8,ch = CopyFromReg t0, Register:i8 %0
*** Scheduling [2]: SU(2): t2: i8,ch = CopyFromReg t0, Register:i8 %0
*** Final schedule ***
SU(2): t2: i8,ch = CopyFromReg t0, Register:i8 %0
SU(1): t15: ch = BREQk BasicBlock:ch< 0x7f8103002608>, t0, t13:1
t13: i8,glue = CPIRdK t2, TargetConstant:i8<7>
SU(0): t11: ch = RJMPk BasicBlock:ch<entry 0x7f8103002798>, t15
Total amount of phi nodes to update: 0
Creating new node: t2: i8,ch = CopyFromReg t0, Register:i8 %0
Creating constant: t3: i8 = Constant<6>
Creating new node: t5: i1 = setcc t2, Constant:i8<6>, seteq:ch
Creating constant: t6: i1 = Constant<-1>
Creating new node: t7: i1 = xor t5, Constant:i1<-1>
Creating new node: t9: ch = brcond t0, t7, BasicBlock:ch< 0x7f81030026d0>
Creating new node: t11: ch = br t9, BasicBlock:ch< 0x7f8103002540>
Initial selection DAG: %bb.4 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:entry'
SelectionDAG has 12 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %0
t5: i1 = setcc t2, Constant:i8<6>, seteq:ch
t7: i1 = xor t5, Constant:i1<-1>
t9: ch = brcond t0, t7, BasicBlock:ch< 0x7f81030026d0>
t11: ch = br t9, BasicBlock:ch< 0x7f8103002540>
Combining: t11: ch = br t9, BasicBlock:ch< 0x7f8103002540>
Combining: t10: ch = BasicBlock< 0x7f8103002540>
Combining: t9: ch = brcond t0, t7, BasicBlock:ch< 0x7f81030026d0>
Creating new node: t13: i1 = setcc t2, Constant:i8<6>, setne:ch
Creating new node: t14: ch = brcond t0, t13, BasicBlock:ch< 0x7f81030026d0>
... into: t14: ch = brcond t0, t13, BasicBlock:ch< 0x7f81030026d0>
Combining: t11: ch = br t14, BasicBlock:ch< 0x7f8103002540>
Combining: t14: ch = brcond t0, t13, BasicBlock:ch< 0x7f81030026d0>
Creating new node: t15: ch = br_cc t0, setne:ch, t2, Constant:i8<6>, BasicBlock:ch< 0x7f81030026d0>
... into: t15: ch = br_cc t0, setne:ch, t2, Constant:i8<6>, BasicBlock:ch< 0x7f81030026d0>
Combining: t12: ch = setne
Combining: t11: ch = br t15, BasicBlock:ch< 0x7f8103002540>
Combining: t15: ch = br_cc t0, setne:ch, t2, Constant:i8<6>, BasicBlock:ch< 0x7f81030026d0>
Combining: t8: ch = BasicBlock< 0x7f81030026d0>
Combining: t3: i8 = Constant<6>
Combining: t2: i8,ch = CopyFromReg t0, Register:i8 %0
Combining: t1: i8 = Register %0
Combining: t0: ch = EntryToken
Optimized lowered selection DAG: %bb.4 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:entry'
SelectionDAG has 9 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %0
t15: ch = br_cc t0, setne:ch, t2, Constant:i8<6>, BasicBlock:ch< 0x7f81030026d0>
t11: ch = br t15, BasicBlock:ch< 0x7f8103002540>
Legalizing node: t12: ch = setne
Analyzing result type: ch
Legal result type
Legally typed node: t12: ch = setne
Legalizing node: t10: ch = BasicBlock< 0x7f8103002540>
Analyzing result type: ch
Legal result type
Legally typed node: t10: ch = BasicBlock< 0x7f8103002540>
Legalizing node: t8: ch = BasicBlock< 0x7f81030026d0>
Analyzing result type: ch
Legal result type
Legally typed node: t8: ch = BasicBlock< 0x7f81030026d0>
Legalizing node: t3: i8 = Constant<6>
Analyzing result type: i8
Legal result type
Legally typed node: t3: i8 = Constant<6>
Legalizing node: t1: i8 = Register %0
Ignoring node results
Legally typed node: t1: i8 = Register %0
Legalizing node: t0: ch = EntryToken
Analyzing result type: ch
Legal result type
Legally typed node: t0: ch = EntryToken
Legalizing node: t2: i8,ch = CopyFromReg t0, Register:i8 %0
Analyzing result type: i8
Legal result type
Analyzing result type: ch
Legal result type
Analyzing operand: t0: ch = EntryToken
Legal operand
Legally typed node: t2: i8,ch = CopyFromReg t0, Register:i8 %0
Legalizing node: t15: ch = br_cc t0, setne:ch, t2, Constant:i8<6>, BasicBlock:ch< 0x7f81030026d0>
Analyzing result type: ch
Legal result type
Analyzing operand: t0: ch = EntryToken
Legal operand
Analyzing operand: t12: ch = setne
Legal operand
Analyzing operand: t2: i8,ch = CopyFromReg t0, Register:i8 %0
Legal operand
Analyzing operand: t3: i8 = Constant<6>
Legal operand
Analyzing operand: t8: ch = BasicBlock< 0x7f81030026d0>
Legal operand
Legally typed node: t15: ch = br_cc t0, setne:ch, t2, Constant:i8<6>, BasicBlock:ch< 0x7f81030026d0>
Legalizing node: t11: ch = br t15, BasicBlock:ch< 0x7f8103002540>
Analyzing result type: ch
Legal result type
Analyzing operand: t15: ch = br_cc t0, setne:ch, t2, Constant:i8<6>, BasicBlock:ch< 0x7f81030026d0>
Legal operand
Analyzing operand: t10: ch = BasicBlock< 0x7f8103002540>
Legal operand
Legally typed node: t11: ch = br t15, BasicBlock:ch< 0x7f8103002540>
Legalizing node: t65535: ch = handlenode t11
Analyzing result type: ch
Legal result type
Analyzing operand: t11: ch = br t15, BasicBlock:ch< 0x7f8103002540>
Legal operand
Legally typed node: t65535: ch = handlenode t11
Type-legalized selection DAG: %bb.4 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:entry'
SelectionDAG has 9 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %0
t15: ch = br_cc t0, setne:ch, t2, Constant:i8<6>, BasicBlock:ch< 0x7f81030026d0>
t11: ch = br t15, BasicBlock:ch< 0x7f8103002540>
Legalizing: t11: ch = br t15, BasicBlock:ch< 0x7f8103002540>
Legal node: nothing to do
Legalizing: t15: ch = br_cc t0, setne:ch, t2, Constant:i8<6>, BasicBlock:ch< 0x7f81030026d0>
Trying custom legalization
Creating new node: t16: glue = CMP t2, Constant:i8<6>
Creating constant: t17: i8 = Constant<1>
Creating new node: t18: ch = BRCOND t0, BasicBlock:ch< 0x7f81030026d0>, Constant:i8<1>, t16
Successfully custom legalized node
... replacing: t15: ch = br_cc t0, setne:ch, t2, Constant:i8<6>, BasicBlock:ch< 0x7f81030026d0>
with: t18: ch = BRCOND t0, BasicBlock:ch< 0x7f81030026d0>, Constant:i8<1>, t16
Legalizing: t2: i8,ch = CopyFromReg t0, Register:i8 %0
Legal node: nothing to do
Legalizing: t10: ch = BasicBlock< 0x7f8103002540>
Legal node: nothing to do
Legalizing: t8: ch = BasicBlock< 0x7f81030026d0>
Legal node: nothing to do
Legalizing: t3: i8 = Constant<6>
Legal node: nothing to do
Legalizing: t1: i8 = Register %0
Legalizing: t0: ch = EntryToken
Legal node: nothing to do
Legalizing: t18: ch = BRCOND t0, BasicBlock:ch< 0x7f81030026d0>, Constant:i8<1>, t16
Legal node: nothing to do
Legalizing: t17: i8 = Constant<1>
Legal node: nothing to do
Legalizing: t16: glue = CMP t2, Constant:i8<6>
Legal node: nothing to do
Legalized selection DAG: %bb.4 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:entry'
SelectionDAG has 10 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %0
t16: glue = CMP t2, Constant:i8<6>
t18: ch = BRCOND t0, BasicBlock:ch< 0x7f81030026d0>, Constant:i8<1>, t16
t11: ch = br t18, BasicBlock:ch< 0x7f8103002540>
Legalizing: t18: ch = BRCOND t0, BasicBlock:ch< 0x7f81030026d0>, Constant:i8<1>, t16
Legal node: nothing to do
Combining: t18: ch = BRCOND t0, BasicBlock:ch< 0x7f81030026d0>, Constant:i8<1>, t16
Legalizing: t17: i8 = Constant<1>
Legal node: nothing to do
Combining: t17: i8 = Constant<1>
Legalizing: t16: glue = CMP t2, Constant:i8<6>
Legal node: nothing to do
Combining: t16: glue = CMP t2, Constant:i8<6>
Legalizing: t11: ch = br t18, BasicBlock:ch< 0x7f8103002540>
Legal node: nothing to do
Combining: t11: ch = br t18, BasicBlock:ch< 0x7f8103002540>
Legalizing: t2: i8,ch = CopyFromReg t0, Register:i8 %0
Legal node: nothing to do
Combining: t2: i8,ch = CopyFromReg t0, Register:i8 %0
Legalizing: t10: ch = BasicBlock< 0x7f8103002540>
Legal node: nothing to do
Combining: t10: ch = BasicBlock< 0x7f8103002540>
Legalizing: t8: ch = BasicBlock< 0x7f81030026d0>
Legal node: nothing to do
Combining: t8: ch = BasicBlock< 0x7f81030026d0>
Legalizing: t3: i8 = Constant<6>
Legal node: nothing to do
Combining: t3: i8 = Constant<6>
Legalizing: t1: i8 = Register %0
Combining: t1: i8 = Register %0
Legalizing: t0: ch = EntryToken
Legal node: nothing to do
Combining: t0: ch = EntryToken
Optimized legalized selection DAG: %bb.4 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:entry'
SelectionDAG has 10 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %0
t16: glue = CMP t2, Constant:i8<6>
t18: ch = BRCOND t0, BasicBlock:ch< 0x7f81030026d0>, Constant:i8<1>, t16
t11: ch = br t18, BasicBlock:ch< 0x7f8103002540>
===== Instruction selection begins: %bb.4 'entry'
ISEL: Starting selection on root node: t11: ch = br t18, BasicBlock:ch< 0x7f8103002540>
ISEL: Starting pattern match
Initial Opcode index to 2206
Morphed node: t11: ch = RJMPk BasicBlock:ch< 0x7f8103002540>, t18
ISEL: Match complete!
ISEL: Starting selection on root node: t18: ch = BRCOND t0, BasicBlock:ch< 0x7f81030026d0>, Constant:i8<1>, t16
ISEL: Starting pattern match
Initial Opcode index to 1237
Skipped scope entry (due to false predicate) at index 1247, continuing at 1256
Morphed node: t18: ch = BRNEk BasicBlock:ch< 0x7f81030026d0>, t0, t16
ISEL: Match complete!
ISEL: Starting selection on root node: t16: glue = CMP t2, Constant:i8<6>
ISEL: Starting pattern match
Initial Opcode index to 1607
Creating constant: t19: i8 = TargetConstant<6>
Morphed node: t16: i8,glue = CPIRdK t2, TargetConstant:i8<6>
ISEL: Match complete!
ISEL: Starting selection on root node: t2: i8,ch = CopyFromReg t0, Register:i8 %0
ISEL: Starting selection on root node: t10: ch = BasicBlock< 0x7f8103002540>
ISEL: Starting selection on root node: t8: ch = BasicBlock< 0x7f81030026d0>
ISEL: Starting selection on root node: t1: i8 = Register %0
ISEL: Starting selection on root node: t0: ch = EntryToken
===== Instruction selection ends:
Selected selection DAG: %bb.4 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:entry'
SelectionDAG has 9 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %0
t16: i8,glue = CPIRdK t2, TargetConstant:i8<6>
t18: ch = BRNEk BasicBlock:ch< 0x7f81030026d0>, t0, t16:1
t11: ch = RJMPk BasicBlock:ch< 0x7f8103002540>, t18
********** List Scheduling %bb.4 'entry' **********
SU(0): t11: ch = RJMPk BasicBlock:ch< 0x7f8103002540>, t18
# preds left : 1
# succs left : 0
# rdefs left : 0
Latency : 1
Depth : 2
Height : 0
Predecessors:
SU(1): Ord Latency=1 Barrier
SU(1): t18: ch = BRNEk BasicBlock:ch< 0x7f81030026d0>, t0, t16:1
t16: i8,glue = CPIRdK t2, TargetConstant:i8<6>
# preds left : 1
# succs left : 1
# rdefs left : 0
Latency : 1
Depth : 1
Height : 1
Predecessors:
SU(2): Data Latency=1
Successors:
SU(0): Ord Latency=1 Barrier
SU(2): t2: i8,ch = CopyFromReg t0, Register:i8 %0
# preds left : 0
# succs left : 1
# rdefs left : 1
Latency : 1
Depth : 0
Height : 2
Successors:
SU(1): Data Latency=1
Examining Available:
Height 0: SU(0): t11: ch = RJMPk BasicBlock:ch< 0x7f8103002540>, t18
*** Scheduling [0]: SU(0): t11: ch = RJMPk BasicBlock:ch< 0x7f8103002540>, t18
Examining Available:
Height 1: SU(1): t18: ch = BRNEk BasicBlock:ch< 0x7f81030026d0>, t0, t16:1
t16: i8,glue = CPIRdK t2, TargetConstant:i8<6>
*** Scheduling [1]: SU(1): t18: ch = BRNEk BasicBlock:ch< 0x7f81030026d0>, t0, t16:1
t16: i8,glue = CPIRdK t2, TargetConstant:i8<6>
Examining Available:
Height 2: SU(2): t2: i8,ch = CopyFromReg t0, Register:i8 %0
*** Scheduling [2]: SU(2): t2: i8,ch = CopyFromReg t0, Register:i8 %0
*** Final schedule ***
SU(2): t2: i8,ch = CopyFromReg t0, Register:i8 %0
SU(1): t18: ch = BRNEk BasicBlock:ch< 0x7f81030026d0>, t0, t16:1
t16: i8,glue = CPIRdK t2, TargetConstant:i8<6>
SU(0): t11: ch = RJMPk BasicBlock:ch< 0x7f8103002540>, t18
Creating new node: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Creating constant: t3: i8 = Constant<0>
Creating new node: t5: i1 = setcc t2, Constant:i8<0>, setne:ch
Creating new node: t6: i8 = zero_extend t5
Creating constant: t8: i16 = Constant<0>
Creating new node: t9: i16 = undef
Creating new node: t10: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> t0, t5, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
Creating constant: t12: i16 = Constant<35>
Creating constant: t14: i16 = TargetConstant<0>
Creating new node: t15: ch,glue = callseq_start t10, TargetConstant:i16<0>, TargetConstant:i16<0>
Creating new node: t17: ch,glue = CopyToReg t15, Register:i16 $r25r24, Constant:i16<35>
Creating new node: t19: ch,glue = CopyToReg t17, Register:i8 $r22, t6, t17:1
Creating new node: t21: ch,glue = CALL t19, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19:1
Creating new node: t22: ch,glue = callseq_end t21, TargetConstant:i16<0>, TargetConstant:i16<0>, t21:1
Initial selection DAG: %bb.2 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 23 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %1
t5: i1 = setcc t2, Constant:i8<0>, setne:ch
t8: i16 = Constant<0>
t11: i16 = GlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
t10: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> t0, t5, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
t15: ch,glue = callseq_start t10, TargetConstant:i16<0>, TargetConstant:i16<0>
t17: ch,glue = CopyToReg t15, Register:i16 $r25r24, Constant:i16<35>
t6: i8 = zero_extend t5
t19: ch,glue = CopyToReg t17, Register:i8 $r22, t6, t17:1
t21: ch,glue = CALL t19, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19:1
t22: ch,glue = callseq_end t21, TargetConstant:i16<0>, TargetConstant:i16<0>, t21:1
Combining: t22: ch,glue = callseq_end t21, TargetConstant:i16<0>, TargetConstant:i16<0>, t21:1
Combining: t21: ch,glue = CALL t19, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19:1
Combining: t20: Untyped = RegisterMask
Combining: t19: ch,glue = CopyToReg t17, Register:i8 $r22, t6, t17:1
Combining: t18: i8 = Register $r22
Combining: t17: ch,glue = CopyToReg t15, Register:i16 $r25r24, Constant:i16<35>
Combining: t16: i16 = Register $r25r24
Combining: t15: ch,glue = callseq_start t10, TargetConstant:i16<0>, TargetConstant:i16<0>
Combining: t14: i16 = TargetConstant<0>
Combining: t13: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
Combining: t12: i16 = Constant<35>
Combining: t10: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> t0, t5, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
Combining: t9: i16 = undef
Combining: t7: i16 = GlobalAddress<%Sb* @_Tv4main7enabledSb> 0
Combining: t6: i8 = zero_extend t5
Creating constant: t23: i8 = Constant<1>
Combining: t5: i1 = setcc t2, Constant:i8<0>, setne:ch
Combining: t4: ch = setne
Combining: t3: i8 = Constant<0>
Combining: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Combining: t1: i8 = Register %1
Combining: t0: ch = EntryToken
Optimized lowered selection DAG: %bb.2 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 21 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %1
t5: i1 = setcc t2, Constant:i8<0>, setne:ch
t10: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> t0, t5, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
t15: ch,glue = callseq_start t10, TargetConstant:i16<0>, TargetConstant:i16<0>
t17: ch,glue = CopyToReg t15, Register:i16 $r25r24, Constant:i16<35>
t6: i8 = zero_extend t5
t19: ch,glue = CopyToReg t17, Register:i8 $r22, t6, t17:1
t21: ch,glue = CALL t19, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19:1
t22: ch,glue = callseq_end t21, TargetConstant:i16<0>, TargetConstant:i16<0>, t21:1
Legalizing node: t20: Untyped = RegisterMask
Analyzing result type: Untyped
Legal result type
Legally typed node: t20: Untyped = RegisterMask
Legalizing node: t18: i8 = Register $r22
Ignoring node results
Legally typed node: t18: i8 = Register $r22
Legalizing node: t16: i16 = Register $r25r24
Ignoring node results
Legally typed node: t16: i16 = Register $r25r24
Legalizing node: t14: i16 = TargetConstant<0>
Ignoring node results
Legally typed node: t14: i16 = TargetConstant<0>
Legalizing node: t13: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
Analyzing result type: i16
Legal result type
Legally typed node: t13: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
Legalizing node: t12: i16 = Constant<35>
Analyzing result type: i16
Legal result type
Legally typed node: t12: i16 = Constant<35>
Legalizing node: t9: i16 = undef
Analyzing result type: i16
Legal result type
Legally typed node: t9: i16 = undef
Legalizing node: t7: i16 = GlobalAddress<%Sb* @_Tv4main7enabledSb> 0
Analyzing result type: i16
Legal result type
Legally typed node: t7: i16 = GlobalAddress<%Sb* @_Tv4main7enabledSb> 0
Legalizing node: t4: ch = setne
Analyzing result type: ch
Legal result type
Legally typed node: t4: ch = setne
Legalizing node: t3: i8 = Constant<0>
Analyzing result type: i8
Legal result type
Legally typed node: t3: i8 = Constant<0>
Legalizing node: t1: i8 = Register %1
Ignoring node results
Legally typed node: t1: i8 = Register %1
Legalizing node: t0: ch = EntryToken
Analyzing result type: ch
Legal result type
Legally typed node: t0: ch = EntryToken
Legalizing node: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Analyzing result type: i8
Legal result type
Analyzing result type: ch
Legal result type
Analyzing operand: t0: ch = EntryToken
Legal operand
Legally typed node: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Legalizing node: t5: i1 = setcc t2, Constant:i8<0>, setne:ch
Analyzing result type: i1
Promote integer result: t5: i1 = setcc t2, Constant:i8<0>, setne:ch
Creating new node: t24: i8 = setcc t2, Constant:i8<0>, setne:ch
Legalizing node: t6: i8 = zero_extend t5
Analyzing result type: i8
Legal result type
Analyzing operand: t5: i1 = setcc t2, Constant:i8<0>, setne:ch
Promote integer operand: t6: i8 = zero_extend t5
Creating constant: t25: i8 = Constant<1>
Creating new node: t26: i8 = and t24, Constant:i8<1>
Legalizing node: t25: i8 = Constant<1>
Analyzing result type: i8
Legal result type
Legally typed node: t25: i8 = Constant<1>
Legalizing node: t10: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> t0, t5, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
Analyzing result type: ch
Legal result type
Analyzing operand: t0: ch = EntryToken
Legal operand
Analyzing operand: t5: i1 = setcc t2, Constant:i8<0>, setne:ch
Promote integer operand: t10: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> t0, t5, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
Creating new node: t27: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`), trunc to i1> t0, t24, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
Legalizing node: t24: i8 = setcc t2, Constant:i8<0>, setne:ch
Analyzing result type: i8
Legal result type
Analyzing operand: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Legal operand
Analyzing operand: t3: i8 = Constant<0>
Legal operand
Analyzing operand: t4: ch = setne
Legal operand
Legally typed node: t24: i8 = setcc t2, Constant:i8<0>, setne:ch
Legalizing node: t26: i8 = and t24, Constant:i8<1>
Analyzing result type: i8
Legal result type
Analyzing operand: t24: i8 = setcc t2, Constant:i8<0>, setne:ch
Legal operand
Analyzing operand: t25: i8 = Constant<1>
Legal operand
Legally typed node: t26: i8 = and t24, Constant:i8<1>
Legalizing node: t27: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`), trunc to i1> t0, t24, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
Analyzing result type: ch
Legal result type
Analyzing operand: t0: ch = EntryToken
Legal operand
Analyzing operand: t24: i8 = setcc t2, Constant:i8<0>, setne:ch
Legal operand
Analyzing operand: t7: i16 = GlobalAddress<%Sb* @_Tv4main7enabledSb> 0
Legal operand
Analyzing operand: t9: i16 = undef
Legal operand
Legally typed node: t27: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`), trunc to i1> t0, t24, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
Legalizing node: t15: ch,glue = callseq_start t27, TargetConstant:i16<0>, TargetConstant:i16<0>
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t27: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`), trunc to i1> t0, t24, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
Legal operand
Legally typed node: t15: ch,glue = callseq_start t27, TargetConstant:i16<0>, TargetConstant:i16<0>
Legalizing node: t17: ch,glue = CopyToReg t15, Register:i16 $r25r24, Constant:i16<35>
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t15: ch,glue = callseq_start t27, TargetConstant:i16<0>, TargetConstant:i16<0>
Legal operand
Analyzing operand: t12: i16 = Constant<35>
Legal operand
Legally typed node: t17: ch,glue = CopyToReg t15, Register:i16 $r25r24, Constant:i16<35>
Legalizing node: t19: ch,glue = CopyToReg t17, Register:i8 $r22, t26, t17:1
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t17: ch,glue = CopyToReg t15, Register:i16 $r25r24, Constant:i16<35>
Legal operand
Analyzing operand: t26: i8 = and t24, Constant:i8<1>
Legal operand
Analyzing operand: t17: ch,glue = CopyToReg t15, Register:i16 $r25r24, Constant:i16<35>
Legal operand
Legally typed node: t19: ch,glue = CopyToReg t17, Register:i8 $r22, t26, t17:1
Legalizing node: t21: ch,glue = CALL t19, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19:1
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t19: ch,glue = CopyToReg t17, Register:i8 $r22, t26, t17:1
Legal operand
Analyzing operand: t13: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
Legal operand
Analyzing operand: t20: Untyped = RegisterMask
Legal operand
Analyzing operand: t19: ch,glue = CopyToReg t17, Register:i8 $r22, t26, t17:1
Legal operand
Legally typed node: t21: ch,glue = CALL t19, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19:1
Legalizing node: t22: ch,glue = callseq_end t21, TargetConstant:i16<0>, TargetConstant:i16<0>, t21:1
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t21: ch,glue = CALL t19, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19:1
Legal operand
Analyzing operand: t21: ch,glue = CALL t19, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19:1
Legal operand
Legally typed node: t22: ch,glue = callseq_end t21, TargetConstant:i16<0>, TargetConstant:i16<0>, t21:1
Legalizing node: t65535: ch = handlenode t22
Analyzing result type: ch
Legal result type
Analyzing operand: t22: ch,glue = callseq_end t21, TargetConstant:i16<0>, TargetConstant:i16<0>, t21:1
Legal operand
Legally typed node: t65535: ch = handlenode t22
Type-legalized selection DAG: %bb.2 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 22 nodes:
t0: ch = EntryToken
t27: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`), trunc to i1> t0, t24, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
t15: ch,glue = callseq_start t27, TargetConstant:i16<0>, TargetConstant:i16<0>
t17: ch,glue = CopyToReg t15, Register:i16 $r25r24, Constant:i16<35>
t26: i8 = and t24, Constant:i8<1>
t19: ch,glue = CopyToReg t17, Register:i8 $r22, t26, t17:1
t21: ch,glue = CALL t19, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19:1
t2: i8,ch = CopyFromReg t0, Register:i8 %1
t24: i8 = setcc t2, Constant:i8<0>, setne:ch
t22: ch,glue = callseq_end t21, TargetConstant:i16<0>, TargetConstant:i16<0>, t21:1
Combining: t27: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`), trunc to i1> t0, t24, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
Combining: t26: i8 = and t24, Constant:i8<1>
Replacing.2 t26: i8 = and t24, Constant:i8<1>
With: t24: i8 = setcc t2, Constant:i8<0>, setne:ch
Combining: t27: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`), trunc to i1> t0, t24, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
Combining: t24: i8 = setcc t2, Constant:i8<0>, setne:ch
Combining: t22: ch,glue = callseq_end t21, TargetConstant:i16<0>, TargetConstant:i16<0>, t21:1
Combining: t21: ch,glue = CALL t19, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19:1
Combining: t20: Untyped = RegisterMask
Combining: t19: ch,glue = CopyToReg t17, Register:i8 $r22, t24, t17:1
Combining: t18: i8 = Register $r22
Combining: t17: ch,glue = CopyToReg t15, Register:i16 $r25r24, Constant:i16<35>
Combining: t16: i16 = Register $r25r24
Combining: t15: ch,glue = callseq_start t27, TargetConstant:i16<0>, TargetConstant:i16<0>
Combining: t14: i16 = TargetConstant<0>
Combining: t13: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
Combining: t12: i16 = Constant<35>
Combining: t9: i16 = undef
Combining: t7: i16 = GlobalAddress<%Sb* @_Tv4main7enabledSb> 0
Combining: t4: ch = setne
Combining: t3: i8 = Constant<0>
Combining: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Combining: t1: i8 = Register %1
Combining: t0: ch = EntryToken
Optimized type-legalized selection DAG: %bb.2 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 20 nodes:
t0: ch = EntryToken
t27: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`), trunc to i1> t0, t24, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
t15: ch,glue = callseq_start t27, TargetConstant:i16<0>, TargetConstant:i16<0>
t17: ch,glue = CopyToReg t15, Register:i16 $r25r24, Constant:i16<35>
t19: ch,glue = CopyToReg t17, Register:i8 $r22, t24, t17:1
t21: ch,glue = CALL t19, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19:1
t2: i8,ch = CopyFromReg t0, Register:i8 %1
t24: i8 = setcc t2, Constant:i8<0>, setne:ch
t22: ch,glue = callseq_end t21, TargetConstant:i16<0>, TargetConstant:i16<0>, t21:1
Legalizing: t22: ch,glue = callseq_end t21, TargetConstant:i16<0>, TargetConstant:i16<0>, t21:1
Legalizing: t21: ch,glue = CALL t19, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19:1
Legal node: nothing to do
Legalizing: t19: ch,glue = CopyToReg t17, Register:i8 $r22, t24, t17:1
Legal node: nothing to do
Legalizing: t17: ch,glue = CopyToReg t15, Register:i16 $r25r24, Constant:i16<35>
Legal node: nothing to do
Legalizing: t15: ch,glue = callseq_start t27, TargetConstant:i16<0>, TargetConstant:i16<0>
Legalizing: t27: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`), trunc to i1> t0, t24, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
Legalizing truncating store operations
Creating constant: t28: i8 = Constant<1>
Creating new node: t29: i8 = and t24, Constant:i8<1>
Creating new node: t30: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> t0, t29, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
... replacing: t27: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`), trunc to i1> t0, t24, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
with: t30: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> t0, t29, GlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, undef:i16
Legalizing: t24: i8 = setcc t2, Constant:i8<0>, setne:ch
Trying custom legalization
Creating new node: t31: glue = CMP t2, Constant:i8<0>
Creating new node: t32: i8,glue = SELECT_CC Constant:i8<1>, Constant:i8<0>, Constant:i8<1>, t31
Successfully custom legalized node
... replacing: t24: i8 = setcc t2, Constant:i8<0>, setne:ch
with: t32: i8,glue = SELECT_CC Constant:i8<1>, Constant:i8<0>, Constant:i8<1>, t31
Legalizing: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Legal node: nothing to do
Legalizing: t20: Untyped = RegisterMask
Legal node: nothing to do
Legalizing: t18: i8 = Register $r22
Legalizing: t16: i16 = Register $r25r24
Legalizing: t14: i16 = TargetConstant<0>
Legalizing: t13: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
Legal node: nothing to do
Legalizing: t12: i16 = Constant<35>
Legal node: nothing to do
Legalizing: t9: i16 = undef
Legal node: nothing to do
Legalizing: t7: i16 = GlobalAddress<%Sb* @_Tv4main7enabledSb> 0
Trying custom legalization
Creating new node: t34: i16 = WRAPPER TargetGlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0
Successfully custom legalized node
... replacing: t7: i16 = GlobalAddress<%Sb* @_Tv4main7enabledSb> 0
with: t34: i16 = WRAPPER TargetGlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0
Legalizing: t3: i8 = Constant<0>
Legal node: nothing to do
Legalizing: t1: i8 = Register %1
Legalizing: t0: ch = EntryToken
Legal node: nothing to do
Legalizing: t34: i16 = WRAPPER TargetGlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0
Legal node: nothing to do
Legalizing: t33: i16 = TargetGlobalAddress<%Sb* @_Tv4main7enabledSb> 0
Legal node: nothing to do
Legalizing: t32: i8,glue = SELECT_CC Constant:i8<1>, Constant:i8<0>, Constant:i8<1>, t31
Legal node: nothing to do
Legalizing: t31: glue = CMP t2, Constant:i8<0>
Legal node: nothing to do
Legalizing: t30: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> t0, t29, t34, undef:i16
Legalizing store operation
Optimizing float store operations
Legal store
Legalizing: t29: i8 = and t32, Constant:i8<1>
Legal node: nothing to do
Legalizing: t28: i8 = Constant<1>
Legal node: nothing to do
Legalized selection DAG: %bb.2 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 23 nodes:
t0: ch = EntryToken
t29: i8 = and t32, Constant:i8<1>
t34: i16 = WRAPPER TargetGlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0
t30: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> t0, t29, t34, undef:i16
t15: ch,glue = callseq_start t30, TargetConstant:i16<0>, TargetConstant:i16<0>
t17: ch,glue = CopyToReg t15, Register:i16 $r25r24, Constant:i16<35>
t19: ch,glue = CopyToReg t17, Register:i8 $r22, t32, t17:1
t21: ch,glue = CALL t19, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19:1
t2: i8,ch = CopyFromReg t0, Register:i8 %1
t31: glue = CMP t2, Constant:i8<0>
t32: i8,glue = SELECT_CC Constant:i8<1>, Constant:i8<0>, Constant:i8<1>, t31
t22: ch,glue = callseq_end t21, TargetConstant:i16<0>, TargetConstant:i16<0>, t21:1
Legalizing: t34: i16 = WRAPPER TargetGlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0
Legal node: nothing to do
Combining: t34: i16 = WRAPPER TargetGlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0
Legalizing: t33: i16 = TargetGlobalAddress<%Sb* @_Tv4main7enabledSb> 0
Legal node: nothing to do
Combining: t33: i16 = TargetGlobalAddress<%Sb* @_Tv4main7enabledSb> 0
Legalizing: t32: i8,glue = SELECT_CC Constant:i8<1>, Constant:i8<0>, Constant:i8<1>, t31
Legal node: nothing to do
Combining: t32: i8,glue = SELECT_CC Constant:i8<1>, Constant:i8<0>, Constant:i8<1>, t31
Legalizing: t31: glue = CMP t2, Constant:i8<0>
Legal node: nothing to do
Combining: t31: glue = CMP t2, Constant:i8<0>
Legalizing: t30: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> t0, t29, t34, undef:i16
Legalizing store operation
Optimizing float store operations
Legal store
Combining: t30: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> t0, t29, t34, undef:i16
Legalizing: t29: i8 = and t32, Constant:i8<1>
Legal node: nothing to do
Combining: t29: i8 = and t32, Constant:i8<1>
Legalizing: t28: i8 = Constant<1>
Legal node: nothing to do
Combining: t28: i8 = Constant<1>
Legalizing: t22: ch,glue = callseq_end t21, TargetConstant:i16<0>, TargetConstant:i16<0>, t21:1
Combining: t22: ch,glue = callseq_end t21, TargetConstant:i16<0>, TargetConstant:i16<0>, t21:1
Legalizing: t21: ch,glue = CALL t19, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19:1
Legal node: nothing to do
Combining: t21: ch,glue = CALL t19, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19:1
Legalizing: t19: ch,glue = CopyToReg t17, Register:i8 $r22, t32, t17:1
Legal node: nothing to do
Combining: t19: ch,glue = CopyToReg t17, Register:i8 $r22, t32, t17:1
Legalizing: t17: ch,glue = CopyToReg t15, Register:i16 $r25r24, Constant:i16<35>
Legal node: nothing to do
Combining: t17: ch,glue = CopyToReg t15, Register:i16 $r25r24, Constant:i16<35>
Legalizing: t15: ch,glue = callseq_start t30, TargetConstant:i16<0>, TargetConstant:i16<0>
Combining: t15: ch,glue = callseq_start t30, TargetConstant:i16<0>, TargetConstant:i16<0>
Legalizing: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Legal node: nothing to do
Combining: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Legalizing: t20: Untyped = RegisterMask
Legal node: nothing to do
Combining: t20: Untyped = RegisterMask
Legalizing: t18: i8 = Register $r22
Combining: t18: i8 = Register $r22
Legalizing: t16: i16 = Register $r25r24
Combining: t16: i16 = Register $r25r24
Legalizing: t14: i16 = TargetConstant<0>
Combining: t14: i16 = TargetConstant<0>
Legalizing: t13: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
Legal node: nothing to do
Combining: t13: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
Legalizing: t12: i16 = Constant<35>
Legal node: nothing to do
Combining: t12: i16 = Constant<35>
Legalizing: t9: i16 = undef
Legal node: nothing to do
Combining: t9: i16 = undef
Legalizing: t3: i8 = Constant<0>
Legal node: nothing to do
Combining: t3: i8 = Constant<0>
Legalizing: t1: i8 = Register %1
Combining: t1: i8 = Register %1
Legalizing: t0: ch = EntryToken
Legal node: nothing to do
Combining: t0: ch = EntryToken
Optimized legalized selection DAG: %bb.2 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 23 nodes:
t0: ch = EntryToken
t29: i8 = and t32, Constant:i8<1>
t34: i16 = WRAPPER TargetGlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0
t30: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> t0, t29, t34, undef:i16
t15: ch,glue = callseq_start t30, TargetConstant:i16<0>, TargetConstant:i16<0>
t17: ch,glue = CopyToReg t15, Register:i16 $r25r24, Constant:i16<35>
t19: ch,glue = CopyToReg t17, Register:i8 $r22, t32, t17:1
t21: ch,glue = CALL t19, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19:1
t2: i8,ch = CopyFromReg t0, Register:i8 %1
t31: glue = CMP t2, Constant:i8<0>
t32: i8,glue = SELECT_CC Constant:i8<1>, Constant:i8<0>, Constant:i8<1>, t31
t22: ch,glue = callseq_end t21, TargetConstant:i16<0>, TargetConstant:i16<0>, t21:1
===== Instruction selection begins: %bb.2 ''
ISEL: Starting selection on root node: t22: ch,glue = callseq_end t21, TargetConstant:i16<0>, TargetConstant:i16<0>, t21:1
ISEL: Starting pattern match
Initial Opcode index to 817
Morphed node: t22: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t21, t21:1
ISEL: Match complete!
ISEL: Starting selection on root node: t21: ch,glue = CALL t19, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19:1
ISEL: Starting pattern match
Initial Opcode index to 1557
OpcodeSwitch from 1561 to 1580
Morphed node: t21: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19, t19:1
ISEL: Match complete!
ISEL: Starting selection on root node: t19: ch,glue = CopyToReg t17, Register:i8 $r22, t32, t17:1
ISEL: Starting selection on root node: t17: ch,glue = CopyToReg t15, Register:i16 $r25r24, Constant:i16<35>
ISEL: Starting selection on root node: t15: ch,glue = callseq_start t30, TargetConstant:i16<0>, TargetConstant:i16<0>
ISEL: Starting pattern match
Initial Opcode index to 792
Morphed node: t15: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t30
ISEL: Match complete!
ISEL: Starting selection on root node: t30: ch = store<(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> t0, t29, t34, undef:i16
ISEL: Starting pattern match
Initial Opcode index to 76
OpcodeSwitch from 81 to 146
Match failed at index 147
Continuing at 205
Match failed at index 224
Continuing at 236
Match failed at index 237
Continuing at 250
Continuing at 251
Morphed node: t30: ch = STSKRr<Mem:(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, t29, t0
ISEL: Match complete!
ISEL: Starting selection on root node: t29: i8 = and t32, Constant:i8<1>
ISEL: Starting pattern match
Initial Opcode index to 1414
TypeSwitch[i8] from 1423 to 1426
Creating constant: t35: i8 = TargetConstant<1>
Morphed node: t29: i8,i8 = ANDIRdK t32, TargetConstant:i8<1>
ISEL: Match complete!
ISEL: Starting selection on root node: t32: i8,glue = SELECT_CC Constant:i8<1>, Constant:i8<0>, Constant:i8<1>, t31
ISEL: Starting pattern match
Initial Opcode index to 1897
TypeSwitch[i8] from 1906 to 1909
Morphed node: t32: i8 = Select8 Constant:i8<1>, Constant:i8<0>, TargetConstant:i8<1>, t31
ISEL: Match complete!
ISEL: Starting selection on root node: t31: glue = CMP t2, Constant:i8<0>
ISEL: Starting pattern match
Initial Opcode index to 1607
Creating constant: t36: i8 = TargetConstant<0>
Morphed node: t31: i8,glue = CPIRdK t2, TargetConstant:i8<0>
ISEL: Match complete!
ISEL: Starting selection on root node: t2: i8,ch = CopyFromReg t0, Register:i8 %1
ISEL: Starting selection on root node: t33: i16 = TargetGlobalAddress<%Sb* @_Tv4main7enabledSb> 0
ISEL: Starting selection on root node: t28: i8 = Constant<1>
ISEL: Starting pattern match
Initial Opcode index to 2276
TypeSwitch[i8] from 2277 to 2280
Morphed node: t28: i8 = LDIRdK TargetConstant:i8<1>
ISEL: Match complete!
ISEL: Starting selection on root node: t20: Untyped = RegisterMask
ISEL: Starting selection on root node: t18: i8 = Register $r22
ISEL: Starting selection on root node: t16: i16 = Register $r25r24
ISEL: Starting selection on root node: t14: i16 = TargetConstant<0>
ISEL: Starting selection on root node: t13: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
ISEL: Starting selection on root node: t12: i16 = Constant<35>
ISEL: Starting pattern match
Initial Opcode index to 2276
TypeSwitch[i16] from 2277 to 2291
Creating constant: t37: i16 = TargetConstant<35>
Morphed node: t12: i16 = LDIWRdK TargetConstant:i16<35>
ISEL: Match complete!
ISEL: Starting selection on root node: t3: i8 = Constant<0>
ISEL: Starting pattern match
Initial Opcode index to 2276
TypeSwitch[i8] from 2277 to 2280
Morphed node: t3: i8 = LDIRdK TargetConstant:i8<0>
ISEL: Match complete!
ISEL: Starting selection on root node: t1: i8 = Register %1
ISEL: Starting selection on root node: t0: ch = EntryToken
===== Instruction selection ends:
Selected selection DAG: %bb.2 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 24 nodes:
t0: ch = EntryToken
t28: i8 = LDIRdK TargetConstant:i8<1>
t3: i8 = LDIRdK TargetConstant:i8<0>
t2: i8,ch = CopyFromReg t0, Register:i8 %1
t31: i8,glue = CPIRdK t2, TargetConstant:i8<0>
t32: i8 = Select8 t28, t3, TargetConstant:i8<1>, t31:1
t29: i8,i8 = ANDIRdK t32, TargetConstant:i8<1>
t30: ch = STSKRr<Mem:(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, t29, t0
t15: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t30
t12: i16 = LDIWRdK TargetConstant:i16<35>
t17: ch,glue = CopyToReg t15:1, Register:i16 $r25r24, t12
t19: ch,glue = CopyToReg t17, Register:i8 $r22, t32, t17:1
t21: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19, t19:1
t22: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t21, t21:1
********** List Scheduling %bb.2 '' **********
SU(0): t22: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t21, t21:1
t17: ch,glue = CopyToReg t15:1, Register:i16 $r25r24, t12
t19: ch,glue = CopyToReg t17, Register:i8 $r22, t32, t17:1
t21: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19, t19:1
# preds left : 3
# succs left : 0
# rdefs left : 0
Latency : 1
Depth : 5
Height : 0
Predecessors:
SU(1): Data Latency=1
SU(6): Ord Latency=1 Barrier
SU(5): Data Latency=1
SU(1): t32: i8 = Select8 t28, t3, TargetConstant:i8<1>, t31:1
t31: i8,glue = CPIRdK t2, TargetConstant:i8<0>
# preds left : 3
# succs left : 2
# rdefs left : 1
Latency : 1
Depth : 1
Height : 4
Predecessors:
SU(4): Data Latency=1
SU(3): Data Latency=1
SU(2): Data Latency=1
Successors:
SU(0): Data Latency=1
SU(8): Data Latency=1
SU(2): t2: i8,ch = CopyFromReg t0, Register:i8 %1
# preds left : 0
# succs left : 1
# rdefs left : 1
Latency : 1
Depth : 0
Height : 5
Successors:
SU(1): Data Latency=1
SU(3): t3: i8 = LDIRdK TargetConstant:i8<0>
# preds left : 0
# succs left : 1
# rdefs left : 1
Latency : 1
Depth : 0
Height : 5
Successors:
SU(1): Data Latency=1
SU(4): t28: i8 = LDIRdK TargetConstant:i8<1>
# preds left : 0
# succs left : 1
# rdefs left : 1
Latency : 1
Depth : 0
Height : 5
Successors:
SU(1): Data Latency=1
SU(5): t12: i16 = LDIWRdK TargetConstant:i16<35>
# preds left : 0
# succs left : 1
# rdefs left : 1
Latency : 1
Depth : 0
Height : 1
Successors:
SU(0): Data Latency=1
SU(6): t15: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t30
# preds left : 1
# succs left : 1
# rdefs left : 0
Latency : 1
Depth : 4
Height : 1
Predecessors:
SU(7): Ord Latency=1 Barrier
Successors:
SU(0): Ord Latency=1 Barrier
SU(7): t30: ch = STSKRr<Mem:(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, t29, t0
# preds left : 1
# succs left : 1
# rdefs left : 0
Latency : 1
Depth : 3
Height : 2
Predecessors:
SU(8): Data Latency=1
Successors:
SU(6): Ord Latency=1 Barrier
SU(8): t29: i8,i8 = ANDIRdK t32, TargetConstant:i8<1>
# preds left : 1
# succs left : 1
# rdefs left : 1
Latency : 1
Depth : 2
Height : 3
Predecessors:
SU(1): Data Latency=1
Successors:
SU(7): Data Latency=1
Examining Available:
Height 0: SU(0): t22: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t21, t21:1
t17: ch,glue = CopyToReg t15:1, Register:i16 $r25r24, t12
t19: ch,glue = CopyToReg t17, Register:i8 $r22, t32, t17:1
t21: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19, t19:1
*** Scheduling [0]: SU(0): t22: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t21, t21:1
t17: ch,glue = CopyToReg t15:1, Register:i16 $r25r24, t12
t19: ch,glue = CopyToReg t17, Register:i8 $r22, t32, t17:1
t21: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19, t19:1
Examining Available:
Height 1: SU(5): t12: i16 = LDIWRdK TargetConstant:i16<35>
Height 1: SU(6): t15: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t30
*** Scheduling [1]: SU(5): t12: i16 = LDIWRdK TargetConstant:i16<35>
Examining Available:
Height 1: SU(6): t15: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t30
*** Scheduling [2]: SU(6): t15: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t30
Examining Available:
Height 3: SU(7): t30: ch = STSKRr<Mem:(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, t29, t0
*** Scheduling [3]: SU(7): t30: ch = STSKRr<Mem:(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, t29, t0
Examining Available:
Height 4: SU(8): t29: i8,i8 = ANDIRdK t32, TargetConstant:i8<1>
*** Scheduling [4]: SU(8): t29: i8,i8 = ANDIRdK t32, TargetConstant:i8<1>
Examining Available:
Height 5: SU(1): t32: i8 = Select8 t28, t3, TargetConstant:i8<1>, t31:1
t31: i8,glue = CPIRdK t2, TargetConstant:i8<0>
*** Scheduling [5]: SU(1): t32: i8 = Select8 t28, t3, TargetConstant:i8<1>, t31:1
t31: i8,glue = CPIRdK t2, TargetConstant:i8<0>
Examining Available:
Height 6: SU(4): t28: i8 = LDIRdK TargetConstant:i8<1>
Height 6: SU(3): t3: i8 = LDIRdK TargetConstant:i8<0>
Height 6: SU(2): t2: i8,ch = CopyFromReg t0, Register:i8 %1
*** Scheduling [6]: SU(4): t28: i8 = LDIRdK TargetConstant:i8<1>
Examining Available:
Height 6: SU(3): t3: i8 = LDIRdK TargetConstant:i8<0>
Height 6: SU(2): t2: i8,ch = CopyFromReg t0, Register:i8 %1
*** Scheduling [7]: SU(3): t3: i8 = LDIRdK TargetConstant:i8<0>
Examining Available:
Height 6: SU(2): t2: i8,ch = CopyFromReg t0, Register:i8 %1
*** Scheduling [8]: SU(2): t2: i8,ch = CopyFromReg t0, Register:i8 %1
*** Final schedule ***
SU(2): t2: i8,ch = CopyFromReg t0, Register:i8 %1
SU(3): t3: i8 = LDIRdK TargetConstant:i8<0>
SU(4): t28: i8 = LDIRdK TargetConstant:i8<1>
SU(1): t32: i8 = Select8 t28, t3, TargetConstant:i8<1>, t31:1
t31: i8,glue = CPIRdK t2, TargetConstant:i8<0>
SU(8): t29: i8,i8 = ANDIRdK t32, TargetConstant:i8<1>
SU(7): t30: ch = STSKRr<Mem:(store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Sb* @_Tv4main7enabledSb> 0, t29, t0
SU(6): t15: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t30
SU(5): t12: i16 = LDIWRdK TargetConstant:i16<35>
SU(0): t22: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t21, t21:1
t17: ch,glue = CopyToReg t15:1, Register:i16 $r25r24, t12
t19: ch,glue = CopyToReg t17, Register:i8 $r22, t32, t17:1
t21: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t19, t19:1
Total amount of phi nodes to update: 0
Creating new node: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Creating constant: t3: i8 = Constant<90>
Creating new node: t5: i1 = setcc t2, Constant:i8<90>, setugt:ch
Creating constant: t6: i8 = Constant<5>
Creating new node: t8: i1 = setcc t2, Constant:i8<5>, setult:ch
Creating new node: t9: i8 = select t8, Constant:i8<5>, t2
Creating new node: t10: i8 = select t5, Constant:i8<90>, t9
Creating constant: t12: i16 = Constant<0>
Creating new node: t13: i16 = undef
Creating new node: t14: ch = store<(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> t0, t10, GlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, undef:i16
Creating new node: t15: i32 = zero_extend t10
Creating constant: t16: i32 = Constant<100>
Creating new node: t17: i32 = mul nuw nsw t15, Constant:i32<100>
Creating new node: t19: ch = store<(store 4 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`)> t14, t17, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
Creating constant: t21: i16 = Constant<34>
Creating constant: t23: i16 = TargetConstant<0>
Creating new node: t24: ch,glue = callseq_start t19, TargetConstant:i16<0>, TargetConstant:i16<0>
Creating new node: t26: ch,glue = CopyToReg t24, Register:i16 $r25r24, Constant:i16<34>
Creating new node: t28: ch,glue = CopyToReg t26, Register:i8 $r22, t10, t26:1
Creating new node: t30: ch,glue = CALL t28, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28:1
Creating new node: t31: ch,glue = callseq_end t30, TargetConstant:i16<0>, TargetConstant:i16<0>, t30:1
Creating new node: t33: ch = br t31, BasicBlock:ch< 0x7f81030026d0>
Initial selection DAG: %bb.1 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 34 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %1
t5: i1 = setcc t2, Constant:i8<90>, setugt:ch
t8: i1 = setcc t2, Constant:i8<5>, setult:ch
t9: i8 = select t8, Constant:i8<5>, t2
t10: i8 = select t5, Constant:i8<90>, t9
t12: i16 = Constant<0>
t20: i16 = GlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
t14: ch = store<(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> t0, t10, GlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, undef:i16
t15: i32 = zero_extend t10
t17: i32 = mul nuw nsw t15, Constant:i32<100>
t19: ch = store<(store 4 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`)> t14, t17, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
t24: ch,glue = callseq_start t19, TargetConstant:i16<0>, TargetConstant:i16<0>
t26: ch,glue = CopyToReg t24, Register:i16 $r25r24, Constant:i16<34>
t28: ch,glue = CopyToReg t26, Register:i8 $r22, t10, t26:1
t30: ch,glue = CALL t28, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28:1
t31: ch,glue = callseq_end t30, TargetConstant:i16<0>, TargetConstant:i16<0>, t30:1
t33: ch = br t31, BasicBlock:ch< 0x7f81030026d0>
Combining: t33: ch = br t31, BasicBlock:ch< 0x7f81030026d0>
Combining: t32: ch = BasicBlock< 0x7f81030026d0>
Combining: t31: ch,glue = callseq_end t30, TargetConstant:i16<0>, TargetConstant:i16<0>, t30:1
Combining: t30: ch,glue = CALL t28, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28:1
Combining: t29: Untyped = RegisterMask
Combining: t28: ch,glue = CopyToReg t26, Register:i8 $r22, t10, t26:1
Combining: t27: i8 = Register $r22
Combining: t26: ch,glue = CopyToReg t24, Register:i16 $r25r24, Constant:i16<34>
Combining: t25: i16 = Register $r25r24
Combining: t24: ch,glue = callseq_start t19, TargetConstant:i16<0>, TargetConstant:i16<0>
Combining: t23: i16 = TargetConstant<0>
Combining: t22: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
Combining: t21: i16 = Constant<34>
Combining: t19: ch = store<(store 4 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`)> t14, t17, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
Creating new node: t34: ch = store<(store 4 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`)> t0, t17, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
Creating new node: t35: ch = TokenFactor t14, t34
Replacing.1 t19: ch = store<(store 4 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`)> t14, t17, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
With: t35: ch = TokenFactor t14, t34
and 0 other values
Combining: t35: ch = TokenFactor t14, t34
Combining: t34: ch = store<(store 4 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`)> t0, t17, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
Combining: t18: i16 = GlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
Combining: t17: i32 = mul nuw nsw t15, Constant:i32<100>
Combining: t16: i32 = Constant<100>
Combining: t15: i32 = zero_extend t10
Combining: t14: ch = store<(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> t0, t10, GlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, undef:i16
Combining: t13: i16 = undef
Combining: t11: i16 = GlobalAddress<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
Combining: t10: i8 = select t5, Constant:i8<90>, t9
Creating new node: t36: i8 = select_cc t2, Constant:i8<90>, Constant:i8<90>, t9, setugt:ch
... into: t36: i8 = select_cc t2, Constant:i8<90>, Constant:i8<90>, t9, setugt:ch
Combining: t28: ch,glue = CopyToReg t26, Register:i8 $r22, t36, t26:1
Combining: t15: i32 = zero_extend t36
Combining: t14: ch = store<(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> t0, t36, GlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, undef:i16
Combining: t36: i8 = select_cc t2, Constant:i8<90>, Constant:i8<90>, t9, setugt:ch
Combining: t9: i8 = select t8, Constant:i8<5>, t2
Creating new node: t37: i8 = select_cc t2, Constant:i8<5>, Constant:i8<5>, t2, setult:ch
... into: t37: i8 = select_cc t2, Constant:i8<5>, Constant:i8<5>, t2, setult:ch
Combining: t36: i8 = select_cc t2, Constant:i8<90>, Constant:i8<90>, t37, setugt:ch
Combining: t37: i8 = select_cc t2, Constant:i8<5>, Constant:i8<5>, t2, setult:ch
Combining: t7: ch = setult
Combining: t6: i8 = Constant<5>
Combining: t4: ch = setugt
Combining: t3: i8 = Constant<90>
Combining: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Combining: t1: i8 = Register %1
Combining: t0: ch = EntryToken
Optimized lowered selection DAG: %bb.1 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 31 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %1
t14: ch = store<(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> t0, t36, GlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, undef:i16
t15: i32 = zero_extend t36
t17: i32 = mul nuw nsw t15, Constant:i32<100>
t34: ch = store<(store 4 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`)> t0, t17, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
t35: ch = TokenFactor t14, t34
t24: ch,glue = callseq_start t35, TargetConstant:i16<0>, TargetConstant:i16<0>
t26: ch,glue = CopyToReg t24, Register:i16 $r25r24, Constant:i16<34>
t28: ch,glue = CopyToReg t26, Register:i8 $r22, t36, t26:1
t30: ch,glue = CALL t28, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28:1
t37: i8 = select_cc t2, Constant:i8<5>, Constant:i8<5>, t2, setult:ch
t36: i8 = select_cc t2, Constant:i8<90>, Constant:i8<90>, t37, setugt:ch
t31: ch,glue = callseq_end t30, TargetConstant:i16<0>, TargetConstant:i16<0>, t30:1
t33: ch = br t31, BasicBlock:ch< 0x7f81030026d0>
Legalizing node: t32: ch = BasicBlock< 0x7f81030026d0>
Analyzing result type: ch
Legal result type
Legally typed node: t32: ch = BasicBlock< 0x7f81030026d0>
Legalizing node: t29: Untyped = RegisterMask
Analyzing result type: Untyped
Legal result type
Legally typed node: t29: Untyped = RegisterMask
Legalizing node: t27: i8 = Register $r22
Ignoring node results
Legally typed node: t27: i8 = Register $r22
Legalizing node: t25: i16 = Register $r25r24
Ignoring node results
Legally typed node: t25: i16 = Register $r25r24
Legalizing node: t23: i16 = TargetConstant<0>
Ignoring node results
Legally typed node: t23: i16 = TargetConstant<0>
Legalizing node: t22: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
Analyzing result type: i16
Legal result type
Legally typed node: t22: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
Legalizing node: t21: i16 = Constant<34>
Analyzing result type: i16
Legal result type
Legally typed node: t21: i16 = Constant<34>
Legalizing node: t18: i16 = GlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
Analyzing result type: i16
Legal result type
Legally typed node: t18: i16 = GlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
Legalizing node: t16: i32 = Constant<100>
Analyzing result type: i32
Expand integer result: t16: i32 = Constant<100>
Creating constant: t38: i16 = Constant<100>
Creating constant: t39: i16 = Constant<0>
Legalizing node: t39: i16 = Constant<0>
Analyzing result type: i16
Legal result type
Legally typed node: t39: i16 = Constant<0>
Legalizing node: t38: i16 = Constant<100>
Analyzing result type: i16
Legal result type
Legally typed node: t38: i16 = Constant<100>
Legalizing node: t13: i16 = undef
Analyzing result type: i16
Legal result type
Legally typed node: t13: i16 = undef
Legalizing node: t11: i16 = GlobalAddress<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
Analyzing result type: i16
Legal result type
Legally typed node: t11: i16 = GlobalAddress<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
Legalizing node: t7: ch = setult
Analyzing result type: ch
Legal result type
Legally typed node: t7: ch = setult
Legalizing node: t6: i8 = Constant<5>
Analyzing result type: i8
Legal result type
Legally typed node: t6: i8 = Constant<5>
Legalizing node: t4: ch = setugt
Analyzing result type: ch
Legal result type
Legally typed node: t4: ch = setugt
Legalizing node: t3: i8 = Constant<90>
Analyzing result type: i8
Legal result type
Legally typed node: t3: i8 = Constant<90>
Legalizing node: t1: i8 = Register %1
Ignoring node results
Legally typed node: t1: i8 = Register %1
Legalizing node: t0: ch = EntryToken
Analyzing result type: ch
Legal result type
Legally typed node: t0: ch = EntryToken
Legalizing node: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Analyzing result type: i8
Legal result type
Analyzing result type: ch
Legal result type
Analyzing operand: t0: ch = EntryToken
Legal operand
Legally typed node: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Legalizing node: t37: i8 = select_cc t2, Constant:i8<5>, Constant:i8<5>, t2, setult:ch
Analyzing result type: i8
Legal result type
Analyzing operand: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Legal operand
Analyzing operand: t6: i8 = Constant<5>
Legal operand
Analyzing operand: t6: i8 = Constant<5>
Legal operand
Analyzing operand: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Legal operand
Analyzing operand: t7: ch = setult
Legal operand
Legally typed node: t37: i8 = select_cc t2, Constant:i8<5>, Constant:i8<5>, t2, setult:ch
Legalizing node: t36: i8 = select_cc t2, Constant:i8<90>, Constant:i8<90>, t37, setugt:ch
Analyzing result type: i8
Legal result type
Analyzing operand: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Legal operand
Analyzing operand: t3: i8 = Constant<90>
Legal operand
Analyzing operand: t3: i8 = Constant<90>
Legal operand
Analyzing operand: t37: i8 = select_cc t2, Constant:i8<5>, Constant:i8<5>, t2, setult:ch
Legal operand
Analyzing operand: t4: ch = setugt
Legal operand
Legally typed node: t36: i8 = select_cc t2, Constant:i8<90>, Constant:i8<90>, t37, setugt:ch
Legalizing node: t15: i32 = zero_extend t36
Analyzing result type: i32
Expand integer result: t15: i32 = zero_extend t36
Creating new node: t40: i16 = zero_extend t36
Legalizing node: t17: i32 = mul nuw nsw t15, Constant:i32<100>
Analyzing result type: i32
Expand integer result: t17: i32 = mul nuw nsw t15, Constant:i32<100>
Creating constant: t42: i16 = Constant<1>
Creating new node: t43: i16 = extract_element t15, Constant:i16<1>
Creating new node: t44: i16 = extract_element t15, Constant:i16<0>
Creating new node: t46: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0>
Creating new node: t48: ch,glue = CopyToReg t46, Register:i16 $r23r22, t44
Creating new node: t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, t43, t48:1
Creating new node: t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, Constant:i16<100>, t49:1
Creating new node: t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, Constant:i16<0>, t51:1
Creating new node: t54: ch,glue = CALL t53, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53:1
Creating new node: t55: ch,glue = callseq_end t54, TargetConstant:i16<0>, TargetConstant:i16<0>, t54:1
Creating new node: t56: i16,ch,glue = CopyFromReg t55, Register:i16 $r23r22, t55:1
Creating new node: t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
Creating new node: t58: i32 = build_pair t56, t57
Creating new node: t59: i16 = truncate t58
Creating constant: t60: i8 = Constant<16>
Creating new node: t61: i32 = srl t58, Constant:i8<16>
Creating new node: t62: i16 = truncate t61
Legalizing node: t34: ch = store<(store 4 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`)> t0, t17, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
Analyzing result type: ch
Legal result type
Analyzing operand: t0: ch = EntryToken
Legal operand
Analyzing operand: t17: i32 = mul nuw nsw t15, Constant:i32<100>
Expand integer operand: t34: ch = store<(store 4 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`)> t0, t17, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
Creating new node: t63: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> t0, t59, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
Creating constant: t64: i16 = Constant<2>
Creating new node: t66: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> t0, t62, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2, undef:i16
Creating new node: t67: ch = TokenFactor t63, t66
Legalizing node: t65: i16 = GlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2
Analyzing result type: i16
Legal result type
Legally typed node: t65: i16 = GlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2
Legalizing node: t60: i8 = Constant<16>
Analyzing result type: i8
Legal result type
Legally typed node: t60: i8 = Constant<16>
Legalizing node: t45: i16 = TargetExternalSymbol'__mulsi3'
Analyzing result type: i16
Legal result type
Legally typed node: t45: i16 = TargetExternalSymbol'__mulsi3'
Legalizing node: t52: i16 = Register $r21r20
Ignoring node results
Legally typed node: t52: i16 = Register $r21r20
Legalizing node: t50: i16 = Register $r19r18
Ignoring node results
Legally typed node: t50: i16 = Register $r19r18
Legalizing node: t42: i16 = Constant<1>
Analyzing result type: i16
Legal result type
Legally typed node: t42: i16 = Constant<1>
Legalizing node: t43: i16 = extract_element t15, Constant:i16<1>
Analyzing result type: i16
Legal result type
Analyzing operand: t15: i32 = zero_extend t36
Expand integer operand: t43: i16 = extract_element t15, Constant:i16<1>
Legalizing node: t44: i16 = extract_element t15, Constant:i16<0>
Analyzing result type: i16
Legal result type
Analyzing operand: t15: i32 = zero_extend t36
Expand integer operand: t44: i16 = extract_element t15, Constant:i16<0>
Legalizing node: t47: i16 = Register $r23r22
Ignoring node results
Legally typed node: t47: i16 = Register $r23r22
Legalizing node: t46: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0>
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t0: ch = EntryToken
Legal operand
Legally typed node: t46: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0>
Legalizing node: t40: i16 = zero_extend t36
Analyzing result type: i16
Legal result type
Analyzing operand: t36: i8 = select_cc t2, Constant:i8<90>, Constant:i8<90>, t37, setugt:ch
Legal operand
Legally typed node: t40: i16 = zero_extend t36
Legalizing node: t48: ch,glue = CopyToReg t46, Register:i16 $r23r22, t40
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t46: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0>
Legal operand
Analyzing operand: t40: i16 = zero_extend t36
Legal operand
Legally typed node: t48: ch,glue = CopyToReg t46, Register:i16 $r23r22, t40
Legalizing node: t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, Constant:i16<0>, t48:1
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t48: ch,glue = CopyToReg t46, Register:i16 $r23r22, t40
Legal operand
Analyzing operand: t39: i16 = Constant<0>
Legal operand
Analyzing operand: t48: ch,glue = CopyToReg t46, Register:i16 $r23r22, t40
Legal operand
Legally typed node: t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, Constant:i16<0>, t48:1
Legalizing node: t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, Constant:i16<100>, t49:1
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, Constant:i16<0>, t48:1
Legal operand
Analyzing operand: t38: i16 = Constant<100>
Legal operand
Analyzing operand: t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, Constant:i16<0>, t48:1
Legal operand
Legally typed node: t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, Constant:i16<100>, t49:1
Legalizing node: t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, Constant:i16<0>, t51:1
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, Constant:i16<100>, t49:1
Legal operand
Analyzing operand: t39: i16 = Constant<0>
Legal operand
Analyzing operand: t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, Constant:i16<100>, t49:1
Legal operand
Legally typed node: t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, Constant:i16<0>, t51:1
Legalizing node: t54: ch,glue = CALL t53, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53:1
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, Constant:i16<0>, t51:1
Legal operand
Analyzing operand: t45: i16 = TargetExternalSymbol'__mulsi3'
Legal operand
Analyzing operand: t29: Untyped = RegisterMask
Legal operand
Analyzing operand: t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, Constant:i16<0>, t51:1
Legal operand
Legally typed node: t54: ch,glue = CALL t53, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53:1
Legalizing node: t55: ch,glue = callseq_end t54, TargetConstant:i16<0>, TargetConstant:i16<0>, t54:1
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t54: ch,glue = CALL t53, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53:1
Legal operand
Analyzing operand: t54: ch,glue = CALL t53, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53:1
Legal operand
Legally typed node: t55: ch,glue = callseq_end t54, TargetConstant:i16<0>, TargetConstant:i16<0>, t54:1
Legalizing node: t56: i16,ch,glue = CopyFromReg t55, Register:i16 $r23r22, t55:1
Analyzing result type: i16
Legal result type
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t55: ch,glue = callseq_end t54, TargetConstant:i16<0>, TargetConstant:i16<0>, t54:1
Legal operand
Analyzing operand: t55: ch,glue = callseq_end t54, TargetConstant:i16<0>, TargetConstant:i16<0>, t54:1
Legal operand
Legally typed node: t56: i16,ch,glue = CopyFromReg t55, Register:i16 $r23r22, t55:1
Legalizing node: t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
Analyzing result type: i16
Legal result type
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t56: i16,ch,glue = CopyFromReg t55, Register:i16 $r23r22, t55:1
Legal operand
Analyzing operand: t56: i16,ch,glue = CopyFromReg t55, Register:i16 $r23r22, t55:1
Legal operand
Legally typed node: t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
Legalizing node: t58: i32 = build_pair t56, t57
Analyzing result type: i32
Expand integer result: t58: i32 = build_pair t56, t57
Legalizing node: t59: i16 = truncate t58
Analyzing result type: i16
Legal result type
Analyzing operand: t58: i32 = build_pair t56, t57
Expand integer operand: t59: i16 = truncate t58
Legalizing node: t63: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> t0, t56, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
Analyzing result type: ch
Legal result type
Analyzing operand: t0: ch = EntryToken
Legal operand
Analyzing operand: t56: i16,ch,glue = CopyFromReg t55, Register:i16 $r23r22, t55:1
Legal operand
Analyzing operand: t18: i16 = GlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
Legal operand
Analyzing operand: t13: i16 = undef
Legal operand
Legally typed node: t63: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> t0, t56, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
Legalizing node: t61: i32 = srl t58, Constant:i8<16>
Analyzing result type: i32
Expand integer result: t61: i32 = srl t58, Constant:i8<16>
Legalizing node: t62: i16 = truncate t61
Analyzing result type: i16
Legal result type
Analyzing operand: t61: i32 = srl t58, Constant:i8<16>
Expand integer operand: t62: i16 = truncate t61
Legalizing node: t66: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> t0, t57, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2, undef:i16
Analyzing result type: ch
Legal result type
Analyzing operand: t0: ch = EntryToken
Legal operand
Analyzing operand: t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
Legal operand
Analyzing operand: t65: i16 = GlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2
Legal operand
Analyzing operand: t13: i16 = undef
Legal operand
Legally typed node: t66: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> t0, t57, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2, undef:i16
Legalizing node: t67: ch = TokenFactor t63, t66
Analyzing result type: ch
Legal result type
Analyzing operand: t63: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> t0, t56, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
Legal operand
Analyzing operand: t66: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> t0, t57, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2, undef:i16
Legal operand
Legally typed node: t67: ch = TokenFactor t63, t66
Legalizing node: t14: ch = store<(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> t0, t36, GlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, undef:i16
Analyzing result type: ch
Legal result type
Analyzing operand: t0: ch = EntryToken
Legal operand
Analyzing operand: t36: i8 = select_cc t2, Constant:i8<90>, Constant:i8<90>, t37, setugt:ch
Legal operand
Analyzing operand: t11: i16 = GlobalAddress<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
Legal operand
Analyzing operand: t13: i16 = undef
Legal operand
Legally typed node: t14: ch = store<(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> t0, t36, GlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, undef:i16
Legalizing node: t35: ch = TokenFactor t14, t67
Analyzing result type: ch
Legal result type
Analyzing operand: t14: ch = store<(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> t0, t36, GlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, undef:i16
Legal operand
Analyzing operand: t67: ch = TokenFactor t63, t66
Legal operand
Legally typed node: t35: ch = TokenFactor t14, t67
Legalizing node: t24: ch,glue = callseq_start t35, TargetConstant:i16<0>, TargetConstant:i16<0>
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t35: ch = TokenFactor t14, t67
Legal operand
Legally typed node: t24: ch,glue = callseq_start t35, TargetConstant:i16<0>, TargetConstant:i16<0>
Legalizing node: t26: ch,glue = CopyToReg t24, Register:i16 $r25r24, Constant:i16<34>
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t24: ch,glue = callseq_start t35, TargetConstant:i16<0>, TargetConstant:i16<0>
Legal operand
Analyzing operand: t21: i16 = Constant<34>
Legal operand
Legally typed node: t26: ch,glue = CopyToReg t24, Register:i16 $r25r24, Constant:i16<34>
Legalizing node: t28: ch,glue = CopyToReg t26, Register:i8 $r22, t36, t26:1
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t26: ch,glue = CopyToReg t24, Register:i16 $r25r24, Constant:i16<34>
Legal operand
Analyzing operand: t36: i8 = select_cc t2, Constant:i8<90>, Constant:i8<90>, t37, setugt:ch
Legal operand
Analyzing operand: t26: ch,glue = CopyToReg t24, Register:i16 $r25r24, Constant:i16<34>
Legal operand
Legally typed node: t28: ch,glue = CopyToReg t26, Register:i8 $r22, t36, t26:1
Legalizing node: t30: ch,glue = CALL t28, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28:1
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t28: ch,glue = CopyToReg t26, Register:i8 $r22, t36, t26:1
Legal operand
Analyzing operand: t22: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
Legal operand
Analyzing operand: t29: Untyped = RegisterMask
Legal operand
Analyzing operand: t28: ch,glue = CopyToReg t26, Register:i8 $r22, t36, t26:1
Legal operand
Legally typed node: t30: ch,glue = CALL t28, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28:1
Legalizing node: t31: ch,glue = callseq_end t30, TargetConstant:i16<0>, TargetConstant:i16<0>, t30:1
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t30: ch,glue = CALL t28, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28:1
Legal operand
Analyzing operand: t30: ch,glue = CALL t28, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28:1
Legal operand
Legally typed node: t31: ch,glue = callseq_end t30, TargetConstant:i16<0>, TargetConstant:i16<0>, t30:1
Legalizing node: t33: ch = br t31, BasicBlock:ch< 0x7f81030026d0>
Analyzing result type: ch
Legal result type
Analyzing operand: t31: ch,glue = callseq_end t30, TargetConstant:i16<0>, TargetConstant:i16<0>, t30:1
Legal operand
Analyzing operand: t32: ch = BasicBlock< 0x7f81030026d0>
Legal operand
Legally typed node: t33: ch = br t31, BasicBlock:ch< 0x7f81030026d0>
Legalizing node: t65535: ch = handlenode t33
Analyzing result type: ch
Legal result type
Analyzing operand: t33: ch = br t31, BasicBlock:ch< 0x7f81030026d0>
Legal operand
Legally typed node: t65535: ch = handlenode t33
Type-legalized selection DAG: %bb.1 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 47 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %1
t14: ch = store<(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> t0, t36, GlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, undef:i16
t63: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> t0, t56, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
t66: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> t0, t57, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2, undef:i16
t67: ch = TokenFactor t63, t66
t35: ch = TokenFactor t14, t67
t24: ch,glue = callseq_start t35, TargetConstant:i16<0>, TargetConstant:i16<0>
t26: ch,glue = CopyToReg t24, Register:i16 $r25r24, Constant:i16<34>
t28: ch,glue = CopyToReg t26, Register:i8 $r22, t36, t26:1
t30: ch,glue = CALL t28, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28:1
t37: i8 = select_cc t2, Constant:i8<5>, Constant:i8<5>, t2, setult:ch
t36: i8 = select_cc t2, Constant:i8<90>, Constant:i8<90>, t37, setugt:ch
t46: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0>
t40: i16 = zero_extend t36
t48: ch,glue = CopyToReg t46, Register:i16 $r23r22, t40
t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, Constant:i16<0>, t48:1
t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, Constant:i16<100>, t49:1
t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, Constant:i16<0>, t51:1
t54: ch,glue = CALL t53, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53:1
t55: ch,glue = callseq_end t54, TargetConstant:i16<0>, TargetConstant:i16<0>, t54:1
t56: i16,ch,glue = CopyFromReg t55, Register:i16 $r23r22, t55:1
t31: ch,glue = callseq_end t30, TargetConstant:i16<0>, TargetConstant:i16<0>, t30:1
t33: ch = br t31, BasicBlock:ch< 0x7f81030026d0>
Combining: t67: ch = TokenFactor t63, t66
Combining: t66: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> t0, t57, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2, undef:i16
Combining: t65: i16 = GlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2
Combining: t63: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> t0, t56, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
Combining: t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
Combining: t56: i16,ch,glue = CopyFromReg t55, Register:i16 $r23r22, t55:1
Combining: t55: ch,glue = callseq_end t54, TargetConstant:i16<0>, TargetConstant:i16<0>, t54:1
Combining: t54: ch,glue = CALL t53, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53:1
Combining: t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, Constant:i16<0>, t51:1
Combining: t52: i16 = Register $r21r20
Combining: t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, Constant:i16<100>, t49:1
Combining: t50: i16 = Register $r19r18
Combining: t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, Constant:i16<0>, t48:1
Combining: t48: ch,glue = CopyToReg t46, Register:i16 $r23r22, t40
Combining: t47: i16 = Register $r23r22
Combining: t46: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0>
Combining: t45: i16 = TargetExternalSymbol'__mulsi3'
Combining: t40: i16 = zero_extend t36
Combining: t39: i16 = Constant<0>
Combining: t38: i16 = Constant<100>
Combining: t37: i8 = select_cc t2, Constant:i8<5>, Constant:i8<5>, t2, setult:ch
Combining: t36: i8 = select_cc t2, Constant:i8<90>, Constant:i8<90>, t37, setugt:ch
Combining: t35: ch = TokenFactor t14, t67
Creating new node: t68: ch = TokenFactor t14, t63, t66
... into: t68: ch = TokenFactor t14, t63, t66
Combining: t63: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> t0, t56, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
Combining: t66: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> t0, t57, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2, undef:i16
Combining: t68: ch = TokenFactor t14, t63, t66
Combining: t33: ch = br t31, BasicBlock:ch< 0x7f81030026d0>
Combining: t32: ch = BasicBlock< 0x7f81030026d0>
Combining: t31: ch,glue = callseq_end t30, TargetConstant:i16<0>, TargetConstant:i16<0>, t30:1
Combining: t30: ch,glue = CALL t28, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28:1
Combining: t29: Untyped = RegisterMask
Combining: t28: ch,glue = CopyToReg t26, Register:i8 $r22, t36, t26:1
Combining: t27: i8 = Register $r22
Combining: t26: ch,glue = CopyToReg t24, Register:i16 $r25r24, Constant:i16<34>
Combining: t25: i16 = Register $r25r24
Combining: t24: ch,glue = callseq_start t68, TargetConstant:i16<0>, TargetConstant:i16<0>
Combining: t23: i16 = TargetConstant<0>
Combining: t22: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
Combining: t21: i16 = Constant<34>
Combining: t18: i16 = GlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
Combining: t14: ch = store<(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> t0, t36, GlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, undef:i16
Combining: t13: i16 = undef
Combining: t11: i16 = GlobalAddress<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
Combining: t7: ch = setult
Combining: t6: i8 = Constant<5>
Combining: t4: ch = setugt
Combining: t3: i8 = Constant<90>
Combining: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Combining: t1: i8 = Register %1
Combining: t0: ch = EntryToken
Optimized type-legalized selection DAG: %bb.1 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 46 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %1
t14: ch = store<(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> t0, t36, GlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, undef:i16
t63: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> t0, t56, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
t66: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> t0, t57, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2, undef:i16
t68: ch = TokenFactor t14, t63, t66
t24: ch,glue = callseq_start t68, TargetConstant:i16<0>, TargetConstant:i16<0>
t26: ch,glue = CopyToReg t24, Register:i16 $r25r24, Constant:i16<34>
t28: ch,glue = CopyToReg t26, Register:i8 $r22, t36, t26:1
t30: ch,glue = CALL t28, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28:1
t37: i8 = select_cc t2, Constant:i8<5>, Constant:i8<5>, t2, setult:ch
t36: i8 = select_cc t2, Constant:i8<90>, Constant:i8<90>, t37, setugt:ch
t46: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0>
t40: i16 = zero_extend t36
t48: ch,glue = CopyToReg t46, Register:i16 $r23r22, t40
t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, Constant:i16<0>, t48:1
t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, Constant:i16<100>, t49:1
t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, Constant:i16<0>, t51:1
t54: ch,glue = CALL t53, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53:1
t55: ch,glue = callseq_end t54, TargetConstant:i16<0>, TargetConstant:i16<0>, t54:1
t56: i16,ch,glue = CopyFromReg t55, Register:i16 $r23r22, t55:1
t31: ch,glue = callseq_end t30, TargetConstant:i16<0>, TargetConstant:i16<0>, t30:1
t33: ch = br t31, BasicBlock:ch< 0x7f81030026d0>
Legalizing: t33: ch = br t31, BasicBlock:ch< 0x7f81030026d0>
Legal node: nothing to do
Legalizing: t31: ch,glue = callseq_end t30, TargetConstant:i16<0>, TargetConstant:i16<0>, t30:1
Legalizing: t30: ch,glue = CALL t28, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28:1
Legal node: nothing to do
Legalizing: t28: ch,glue = CopyToReg t26, Register:i8 $r22, t36, t26:1
Legal node: nothing to do
Legalizing: t26: ch,glue = CopyToReg t24, Register:i16 $r25r24, Constant:i16<34>
Legal node: nothing to do
Legalizing: t24: ch,glue = callseq_start t68, TargetConstant:i16<0>, TargetConstant:i16<0>
Legalizing: t68: ch = TokenFactor t14, t63, t66
Legal node: nothing to do
Legalizing: t66: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> t0, t57, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2, undef:i16
Legalizing store operation
Optimizing float store operations
Legal store
Legalizing: t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
Legal node: nothing to do
Legalizing: t63: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> t0, t56, GlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, undef:i16
Legalizing store operation
Optimizing float store operations
Legal store
Legalizing: t56: i16,ch,glue = CopyFromReg t55, Register:i16 $r23r22, t55:1
Legal node: nothing to do
Legalizing: t55: ch,glue = callseq_end t54, TargetConstant:i16<0>, TargetConstant:i16<0>, t54:1
Legalizing: t54: ch,glue = CALL t53, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53:1
Legal node: nothing to do
Legalizing: t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, Constant:i16<0>, t51:1
Legal node: nothing to do
Legalizing: t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, Constant:i16<100>, t49:1
Legal node: nothing to do
Legalizing: t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, Constant:i16<0>, t48:1
Legal node: nothing to do
Legalizing: t48: ch,glue = CopyToReg t46, Register:i16 $r23r22, t40
Legal node: nothing to do
Legalizing: t14: ch = store<(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> t0, t36, GlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, undef:i16
Legalizing store operation
Optimizing float store operations
Legal store
Legalizing: t40: i16 = zero_extend t36
Legal node: nothing to do
Legalizing: t36: i8 = select_cc t2, Constant:i8<90>, Constant:i8<90>, t37, setugt:ch
Trying custom legalization
Creating constant: t69: i8 = Constant<91>
Creating new node: t70: glue = CMP t2, Constant:i8<91>
Creating constant: t71: i8 = Constant<4>
Creating new node: t72: i8,glue = SELECT_CC Constant:i8<90>, t37, Constant:i8<4>, t70
Successfully custom legalized node
... replacing: t36: i8 = select_cc t2, Constant:i8<90>, Constant:i8<90>, t37, setugt:ch
with: t72: i8,glue = SELECT_CC Constant:i8<90>, t37, Constant:i8<4>, t70
Legalizing: t37: i8 = select_cc t2, Constant:i8<5>, Constant:i8<5>, t2, setult:ch
Trying custom legalization
Creating new node: t73: glue = CMP t2, Constant:i8<5>
Creating new node: t74: i8,glue = SELECT_CC Constant:i8<5>, t2, Constant:i8<5>, t73
Successfully custom legalized node
... replacing: t37: i8 = select_cc t2, Constant:i8<5>, Constant:i8<5>, t2, setult:ch
with: t74: i8,glue = SELECT_CC Constant:i8<5>, t2, Constant:i8<5>, t73
Legalizing: t46: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0>
Legalizing: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Legal node: nothing to do
Legalizing: t65: i16 = GlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2
Trying custom legalization
Creating new node: t76: i16 = WRAPPER TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2
Successfully custom legalized node
... replacing: t65: i16 = GlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2
with: t76: i16 = WRAPPER TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2
Legalizing: t52: i16 = Register $r21r20
Legalizing: t50: i16 = Register $r19r18
Legalizing: t47: i16 = Register $r23r22
Legalizing: t45: i16 = TargetExternalSymbol'__mulsi3'
Legal node: nothing to do
Legalizing: t39: i16 = Constant<0>
Legal node: nothing to do
Legalizing: t38: i16 = Constant<100>
Legal node: nothing to do
Legalizing: t32: ch = BasicBlock< 0x7f81030026d0>
Legal node: nothing to do
Legalizing: t29: Untyped = RegisterMask
Legal node: nothing to do
Legalizing: t27: i8 = Register $r22
Legalizing: t25: i16 = Register $r25r24
Legalizing: t23: i16 = TargetConstant<0>
Legalizing: t22: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
Legal node: nothing to do
Legalizing: t21: i16 = Constant<34>
Legal node: nothing to do
Legalizing: t18: i16 = GlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
Trying custom legalization
Creating new node: t78: i16 = WRAPPER TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
Successfully custom legalized node
... replacing: t18: i16 = GlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
with: t78: i16 = WRAPPER TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
Legalizing: t13: i16 = undef
Legal node: nothing to do
Legalizing: t11: i16 = GlobalAddress<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
Trying custom legalization
Creating new node: t80: i16 = WRAPPER TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
Successfully custom legalized node
... replacing: t11: i16 = GlobalAddress<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
with: t80: i16 = WRAPPER TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
Legalizing: t6: i8 = Constant<5>
Legal node: nothing to do
Legalizing: t3: i8 = Constant<90>
Legal node: nothing to do
Legalizing: t1: i8 = Register %1
Legalizing: t0: ch = EntryToken
Legal node: nothing to do
Legalizing: t80: i16 = WRAPPER TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
Legal node: nothing to do
Legalizing: t79: i16 = TargetGlobalAddress<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
Legal node: nothing to do
Legalizing: t78: i16 = WRAPPER TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
Legal node: nothing to do
Legalizing: t77: i16 = TargetGlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
Legal node: nothing to do
Legalizing: t76: i16 = WRAPPER TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2
Legal node: nothing to do
Legalizing: t75: i16 = TargetGlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2
Legal node: nothing to do
Legalizing: t74: i8,glue = SELECT_CC Constant:i8<5>, t2, Constant:i8<5>, t73
Legal node: nothing to do
Legalizing: t73: glue = CMP t2, Constant:i8<5>
Legal node: nothing to do
Legalizing: t72: i8,glue = SELECT_CC Constant:i8<90>, t74, Constant:i8<4>, t70
Legal node: nothing to do
Legalizing: t71: i8 = Constant<4>
Legal node: nothing to do
Legalizing: t70: glue = CMP t2, Constant:i8<91>
Legal node: nothing to do
Legalizing: t69: i8 = Constant<91>
Legal node: nothing to do
Legalized selection DAG: %bb.1 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 51 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %1
t46: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0>
t40: i16 = zero_extend t72
t48: ch,glue = CopyToReg t46, Register:i16 $r23r22, t40
t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, Constant:i16<0>, t48:1
t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, Constant:i16<100>, t49:1
t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, Constant:i16<0>, t51:1
t54: ch,glue = CALL t53, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53:1
t55: ch,glue = callseq_end t54, TargetConstant:i16<0>, TargetConstant:i16<0>, t54:1
t56: i16,ch,glue = CopyFromReg t55, Register:i16 $r23r22, t55:1
t80: i16 = WRAPPER TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
t14: ch = store<(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> t0, t72, t80, undef:i16
t78: i16 = WRAPPER TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
t63: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> t0, t56, t78, undef:i16
t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
t76: i16 = WRAPPER TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2
t66: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> t0, t57, t76, undef:i16
t68: ch = TokenFactor t14, t63, t66
t24: ch,glue = callseq_start t68, TargetConstant:i16<0>, TargetConstant:i16<0>
t26: ch,glue = CopyToReg t24, Register:i16 $r25r24, Constant:i16<34>
t28: ch,glue = CopyToReg t26, Register:i8 $r22, t72, t26:1
t30: ch,glue = CALL t28, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28:1
t73: glue = CMP t2, Constant:i8<5>
t74: i8,glue = SELECT_CC Constant:i8<5>, t2, Constant:i8<5>, t73
t70: glue = CMP t2, Constant:i8<91>
t72: i8,glue = SELECT_CC Constant:i8<90>, t74, Constant:i8<4>, t70
t31: ch,glue = callseq_end t30, TargetConstant:i16<0>, TargetConstant:i16<0>, t30:1
t33: ch = br t31, BasicBlock:ch< 0x7f81030026d0>
Legalizing: t80: i16 = WRAPPER TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
Legal node: nothing to do
Combining: t80: i16 = WRAPPER TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
Legalizing: t79: i16 = TargetGlobalAddress<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
Legal node: nothing to do
Combining: t79: i16 = TargetGlobalAddress<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
Legalizing: t78: i16 = WRAPPER TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
Legal node: nothing to do
Combining: t78: i16 = WRAPPER TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
Legalizing: t77: i16 = TargetGlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
Legal node: nothing to do
Combining: t77: i16 = TargetGlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
Legalizing: t76: i16 = WRAPPER TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2
Legal node: nothing to do
Combining: t76: i16 = WRAPPER TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2
Legalizing: t75: i16 = TargetGlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2
Legal node: nothing to do
Combining: t75: i16 = TargetGlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2
Legalizing: t74: i8,glue = SELECT_CC Constant:i8<5>, t2, Constant:i8<5>, t73
Legal node: nothing to do
Combining: t74: i8,glue = SELECT_CC Constant:i8<5>, t2, Constant:i8<5>, t73
Legalizing: t73: glue = CMP t2, Constant:i8<5>
Legal node: nothing to do
Combining: t73: glue = CMP t2, Constant:i8<5>
Legalizing: t72: i8,glue = SELECT_CC Constant:i8<90>, t74, Constant:i8<4>, t70
Legal node: nothing to do
Combining: t72: i8,glue = SELECT_CC Constant:i8<90>, t74, Constant:i8<4>, t70
Legalizing: t71: i8 = Constant<4>
Legal node: nothing to do
Combining: t71: i8 = Constant<4>
Legalizing: t70: glue = CMP t2, Constant:i8<91>
Legal node: nothing to do
Combining: t70: glue = CMP t2, Constant:i8<91>
Legalizing: t69: i8 = Constant<91>
Legal node: nothing to do
Combining: t69: i8 = Constant<91>
Legalizing: t33: ch = br t31, BasicBlock:ch< 0x7f81030026d0>
Legal node: nothing to do
Combining: t33: ch = br t31, BasicBlock:ch< 0x7f81030026d0>
Legalizing: t31: ch,glue = callseq_end t30, TargetConstant:i16<0>, TargetConstant:i16<0>, t30:1
Combining: t31: ch,glue = callseq_end t30, TargetConstant:i16<0>, TargetConstant:i16<0>, t30:1
Legalizing: t30: ch,glue = CALL t28, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28:1
Legal node: nothing to do
Combining: t30: ch,glue = CALL t28, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28:1
Legalizing: t28: ch,glue = CopyToReg t26, Register:i8 $r22, t72, t26:1
Legal node: nothing to do
Combining: t28: ch,glue = CopyToReg t26, Register:i8 $r22, t72, t26:1
Legalizing: t26: ch,glue = CopyToReg t24, Register:i16 $r25r24, Constant:i16<34>
Legal node: nothing to do
Combining: t26: ch,glue = CopyToReg t24, Register:i16 $r25r24, Constant:i16<34>
Legalizing: t24: ch,glue = callseq_start t68, TargetConstant:i16<0>, TargetConstant:i16<0>
Combining: t24: ch,glue = callseq_start t68, TargetConstant:i16<0>, TargetConstant:i16<0>
Legalizing: t68: ch = TokenFactor t14, t63, t66
Legal node: nothing to do
Combining: t68: ch = TokenFactor t14, t63, t66
Legalizing: t66: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> t0, t57, t76, undef:i16
Legalizing store operation
Optimizing float store operations
Legal store
Combining: t66: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> t0, t57, t76, undef:i16
Legalizing: t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
Legal node: nothing to do
Combining: t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
Legalizing: t63: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> t0, t56, t78, undef:i16
Legalizing store operation
Optimizing float store operations
Legal store
Combining: t63: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> t0, t56, t78, undef:i16
Legalizing: t56: i16,ch,glue = CopyFromReg t55, Register:i16 $r23r22, t55:1
Legal node: nothing to do
Combining: t56: i16,ch,glue = CopyFromReg t55, Register:i16 $r23r22, t55:1
Legalizing: t55: ch,glue = callseq_end t54, TargetConstant:i16<0>, TargetConstant:i16<0>, t54:1
Combining: t55: ch,glue = callseq_end t54, TargetConstant:i16<0>, TargetConstant:i16<0>, t54:1
Legalizing: t54: ch,glue = CALL t53, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53:1
Legal node: nothing to do
Combining: t54: ch,glue = CALL t53, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53:1
Legalizing: t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, Constant:i16<0>, t51:1
Legal node: nothing to do
Combining: t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, Constant:i16<0>, t51:1
Legalizing: t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, Constant:i16<100>, t49:1
Legal node: nothing to do
Combining: t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, Constant:i16<100>, t49:1
Legalizing: t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, Constant:i16<0>, t48:1
Legal node: nothing to do
Combining: t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, Constant:i16<0>, t48:1
Legalizing: t48: ch,glue = CopyToReg t46, Register:i16 $r23r22, t40
Legal node: nothing to do
Combining: t48: ch,glue = CopyToReg t46, Register:i16 $r23r22, t40
Legalizing: t14: ch = store<(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> t0, t72, t80, undef:i16
Legalizing store operation
Optimizing float store operations
Legal store
Combining: t14: ch = store<(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> t0, t72, t80, undef:i16
Legalizing: t40: i16 = zero_extend t72
Legal node: nothing to do
Combining: t40: i16 = zero_extend t72
Legalizing: t46: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0>
Combining: t46: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0>
Legalizing: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Legal node: nothing to do
Combining: t2: i8,ch = CopyFromReg t0, Register:i8 %1
Legalizing: t52: i16 = Register $r21r20
Combining: t52: i16 = Register $r21r20
Legalizing: t50: i16 = Register $r19r18
Combining: t50: i16 = Register $r19r18
Legalizing: t47: i16 = Register $r23r22
Combining: t47: i16 = Register $r23r22
Legalizing: t45: i16 = TargetExternalSymbol'__mulsi3'
Legal node: nothing to do
Combining: t45: i16 = TargetExternalSymbol'__mulsi3'
Legalizing: t39: i16 = Constant<0>
Legal node: nothing to do
Combining: t39: i16 = Constant<0>
Legalizing: t38: i16 = Constant<100>
Legal node: nothing to do
Combining: t38: i16 = Constant<100>
Legalizing: t32: ch = BasicBlock< 0x7f81030026d0>
Legal node: nothing to do
Combining: t32: ch = BasicBlock< 0x7f81030026d0>
Legalizing: t29: Untyped = RegisterMask
Legal node: nothing to do
Combining: t29: Untyped = RegisterMask
Legalizing: t27: i8 = Register $r22
Combining: t27: i8 = Register $r22
Legalizing: t25: i16 = Register $r25r24
Combining: t25: i16 = Register $r25r24
Legalizing: t23: i16 = TargetConstant<0>
Combining: t23: i16 = TargetConstant<0>
Legalizing: t22: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
Legal node: nothing to do
Combining: t22: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
Legalizing: t21: i16 = Constant<34>
Legal node: nothing to do
Combining: t21: i16 = Constant<34>
Legalizing: t13: i16 = undef
Legal node: nothing to do
Combining: t13: i16 = undef
Legalizing: t6: i8 = Constant<5>
Legal node: nothing to do
Combining: t6: i8 = Constant<5>
Legalizing: t3: i8 = Constant<90>
Legal node: nothing to do
Combining: t3: i8 = Constant<90>
Legalizing: t1: i8 = Register %1
Combining: t1: i8 = Register %1
Legalizing: t0: ch = EntryToken
Legal node: nothing to do
Combining: t0: ch = EntryToken
Optimized legalized selection DAG: %bb.1 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 51 nodes:
t0: ch = EntryToken
t2: i8,ch = CopyFromReg t0, Register:i8 %1
t46: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0>
t40: i16 = zero_extend t72
t48: ch,glue = CopyToReg t46, Register:i16 $r23r22, t40
t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, Constant:i16<0>, t48:1
t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, Constant:i16<100>, t49:1
t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, Constant:i16<0>, t51:1
t54: ch,glue = CALL t53, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53:1
t55: ch,glue = callseq_end t54, TargetConstant:i16<0>, TargetConstant:i16<0>, t54:1
t56: i16,ch,glue = CopyFromReg t55, Register:i16 $r23r22, t55:1
t80: i16 = WRAPPER TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
t14: ch = store<(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> t0, t72, t80, undef:i16
t78: i16 = WRAPPER TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
t63: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> t0, t56, t78, undef:i16
t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
t76: i16 = WRAPPER TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2
t66: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> t0, t57, t76, undef:i16
t68: ch = TokenFactor t14, t63, t66
t24: ch,glue = callseq_start t68, TargetConstant:i16<0>, TargetConstant:i16<0>
t26: ch,glue = CopyToReg t24, Register:i16 $r25r24, Constant:i16<34>
t28: ch,glue = CopyToReg t26, Register:i8 $r22, t72, t26:1
t30: ch,glue = CALL t28, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28:1
t73: glue = CMP t2, Constant:i8<5>
t74: i8,glue = SELECT_CC Constant:i8<5>, t2, Constant:i8<5>, t73
t70: glue = CMP t2, Constant:i8<91>
t72: i8,glue = SELECT_CC Constant:i8<90>, t74, Constant:i8<4>, t70
t31: ch,glue = callseq_end t30, TargetConstant:i16<0>, TargetConstant:i16<0>, t30:1
t33: ch = br t31, BasicBlock:ch< 0x7f81030026d0>
===== Instruction selection begins: %bb.1 ''
ISEL: Starting selection on root node: t33: ch = br t31, BasicBlock:ch< 0x7f81030026d0>
ISEL: Starting pattern match
Initial Opcode index to 2206
Morphed node: t33: ch = RJMPk BasicBlock:ch< 0x7f81030026d0>, t31
ISEL: Match complete!
ISEL: Starting selection on root node: t31: ch,glue = callseq_end t30, TargetConstant:i16<0>, TargetConstant:i16<0>, t30:1
ISEL: Starting pattern match
Initial Opcode index to 817
Morphed node: t31: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t30, t30:1
ISEL: Match complete!
ISEL: Starting selection on root node: t30: ch,glue = CALL t28, TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28:1
ISEL: Starting pattern match
Initial Opcode index to 1557
OpcodeSwitch from 1561 to 1580
Morphed node: t30: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28, t28:1
ISEL: Match complete!
ISEL: Starting selection on root node: t28: ch,glue = CopyToReg t26, Register:i8 $r22, t72, t26:1
ISEL: Starting selection on root node: t26: ch,glue = CopyToReg t24, Register:i16 $r25r24, Constant:i16<34>
ISEL: Starting selection on root node: t24: ch,glue = callseq_start t68, TargetConstant:i16<0>, TargetConstant:i16<0>
ISEL: Starting pattern match
Initial Opcode index to 792
Morphed node: t24: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t68
ISEL: Match complete!
ISEL: Starting selection on root node: t68: ch = TokenFactor t14, t63, t66
ISEL: Starting selection on root node: t66: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> t0, t57, t76, undef:i16
ISEL: Starting pattern match
Initial Opcode index to 76
Match failed at index 81
Continuing at 205
Skipped scope entry (due to false predicate) at index 211, continuing at 392
Match failed at index 407
Continuing at 419
Match failed at index 420
Continuing at 433
Continuing at 434
Morphed node: t66: ch = STSWKRr<Mem:(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2, t57, t0
ISEL: Match complete!
ISEL: Starting selection on root node: t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
ISEL: Starting selection on root node: t63: ch = store<(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> t0, t56, t78, undef:i16
ISEL: Starting pattern match
Initial Opcode index to 76
Match failed at index 81
Continuing at 205
Skipped scope entry (due to false predicate) at index 211, continuing at 392
Match failed at index 407
Continuing at 419
Match failed at index 420
Continuing at 433
Continuing at 434
Morphed node: t63: ch = STSWKRr<Mem:(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, t56, t0
ISEL: Match complete!
ISEL: Starting selection on root node: t56: i16,ch,glue = CopyFromReg t55, Register:i16 $r23r22, t55:1
ISEL: Starting selection on root node: t55: ch,glue = callseq_end t54, TargetConstant:i16<0>, TargetConstant:i16<0>, t54:1
ISEL: Starting pattern match
Initial Opcode index to 817
Morphed node: t55: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t54, t54:1
ISEL: Match complete!
ISEL: Starting selection on root node: t54: ch,glue = CALL t53, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53:1
ISEL: Starting pattern match
Initial Opcode index to 1557
OpcodeSwitch from 1561 to 1593
Morphed node: t54: ch,glue = CALLk TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53, t53:1
ISEL: Match complete!
ISEL: Starting selection on root node: t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, Constant:i16<0>, t51:1
ISEL: Starting selection on root node: t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, Constant:i16<100>, t49:1
ISEL: Starting selection on root node: t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, Constant:i16<0>, t48:1
ISEL: Starting selection on root node: t48: ch,glue = CopyToReg t46, Register:i16 $r23r22, t40
ISEL: Starting selection on root node: t40: i16 = zero_extend t72
ISEL: Starting pattern match
Initial Opcode index to 2459
Morphed node: t40: i16,i8 = ZEXT t72
ISEL: Match complete!
ISEL: Starting selection on root node: t14: ch = store<(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> t0, t72, t80, undef:i16
ISEL: Starting pattern match
Initial Opcode index to 76
Match failed at index 81
Continuing at 205
Match failed at index 224
Continuing at 236
Match failed at index 237
Continuing at 250
Continuing at 251
Morphed node: t14: ch = STSKRr<Mem:(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, t72, t0
ISEL: Match complete!
ISEL: Starting selection on root node: t72: i8,glue = SELECT_CC Constant:i8<90>, t74, Constant:i8<4>, t70
ISEL: Starting pattern match
Initial Opcode index to 1897
TypeSwitch[i8] from 1906 to 1909
Creating constant: t81: i8 = TargetConstant<4>
Morphed node: t72: i8 = Select8 Constant:i8<90>, t74, TargetConstant:i8<4>, t70
ISEL: Match complete!
ISEL: Starting selection on root node: t74: i8,glue = SELECT_CC Constant:i8<5>, t2, Constant:i8<5>, t73
ISEL: Starting pattern match
Initial Opcode index to 1897
TypeSwitch[i8] from 1906 to 1909
Creating constant: t82: i8 = TargetConstant<5>
Morphed node: t74: i8 = Select8 Constant:i8<5>, t2, TargetConstant:i8<5>, t73
ISEL: Match complete!
ISEL: Starting selection on root node: t70: glue = CMP t2, Constant:i8<91>
ISEL: Starting pattern match
Initial Opcode index to 1607
Creating constant: t83: i8 = TargetConstant<91>
Morphed node: t70: i8,glue = CPIRdK t2, TargetConstant:i8<91>
ISEL: Match complete!
ISEL: Starting selection on root node: t73: glue = CMP t2, Constant:i8<5>
ISEL: Starting pattern match
Initial Opcode index to 1607
Morphed node: t73: i8,glue = CPIRdK t2, TargetConstant:i8<5>
ISEL: Match complete!
ISEL: Starting selection on root node: t46: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0>
ISEL: Starting pattern match
Initial Opcode index to 792
Morphed node: t46: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0
ISEL: Match complete!
ISEL: Starting selection on root node: t2: i8,ch = CopyFromReg t0, Register:i8 %1
ISEL: Starting selection on root node: t79: i16 = TargetGlobalAddress<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0
ISEL: Starting selection on root node: t77: i16 = TargetGlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0
ISEL: Starting selection on root node: t75: i16 = TargetGlobalAddress<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2
ISEL: Starting selection on root node: t52: i16 = Register $r21r20
ISEL: Starting selection on root node: t50: i16 = Register $r19r18
ISEL: Starting selection on root node: t47: i16 = Register $r23r22
ISEL: Starting selection on root node: t45: i16 = TargetExternalSymbol'__mulsi3'
ISEL: Starting selection on root node: t39: i16 = Constant<0>
ISEL: Starting pattern match
Initial Opcode index to 2276
TypeSwitch[i16] from 2277 to 2291
Morphed node: t39: i16 = LDIWRdK TargetConstant:i16<0>
ISEL: Match complete!
ISEL: Starting selection on root node: t38: i16 = Constant<100>
ISEL: Starting pattern match
Initial Opcode index to 2276
TypeSwitch[i16] from 2277 to 2291
Creating constant: t84: i16 = TargetConstant<100>
Morphed node: t38: i16 = LDIWRdK TargetConstant:i16<100>
ISEL: Match complete!
ISEL: Starting selection on root node: t32: ch = BasicBlock< 0x7f81030026d0>
ISEL: Starting selection on root node: t29: Untyped = RegisterMask
ISEL: Starting selection on root node: t27: i8 = Register $r22
ISEL: Starting selection on root node: t25: i16 = Register $r25r24
ISEL: Starting selection on root node: t23: i16 = TargetConstant<0>
ISEL: Starting selection on root node: t22: i16 = TargetGlobalAddress<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0
ISEL: Starting selection on root node: t21: i16 = Constant<34>
ISEL: Starting pattern match
Initial Opcode index to 2276
TypeSwitch[i16] from 2277 to 2291
Creating constant: t85: i16 = TargetConstant<34>
Morphed node: t21: i16 = LDIWRdK TargetConstant:i16<34>
ISEL: Match complete!
ISEL: Starting selection on root node: t6: i8 = Constant<5>
ISEL: Starting pattern match
Initial Opcode index to 2276
TypeSwitch[i8] from 2277 to 2280
Morphed node: t6: i8 = LDIRdK TargetConstant:i8<5>
ISEL: Match complete!
ISEL: Starting selection on root node: t3: i8 = Constant<90>
ISEL: Starting pattern match
Initial Opcode index to 2276
TypeSwitch[i8] from 2277 to 2280
Creating constant: t86: i8 = TargetConstant<90>
Morphed node: t3: i8 = LDIRdK TargetConstant:i8<90>
ISEL: Match complete!
ISEL: Starting selection on root node: t1: i8 = Register %1
ISEL: Starting selection on root node: t0: ch = EntryToken
===== Instruction selection ends:
Selected selection DAG: %bb.1 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 51 nodes:
t0: ch = EntryToken
t39: i16 = LDIWRdK TargetConstant:i16<0>
t2: i8,ch = CopyFromReg t0, Register:i8 %1
t3: i8 = LDIRdK TargetConstant:i8<90>
t6: i8 = LDIRdK TargetConstant:i8<5>
t73: i8,glue = CPIRdK t2, TargetConstant:i8<5>
t74: i8 = Select8 t6, t2, TargetConstant:i8<5>, t73:1
t70: i8,glue = CPIRdK t2, TargetConstant:i8<91>
t72: i8 = Select8 t3, t74, TargetConstant:i8<4>, t70:1
t46: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0
t40: i16,i8 = ZEXT t72
t48: ch,glue = CopyToReg t46:1, Register:i16 $r23r22, t40
t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, t39, t48:1
t38: i16 = LDIWRdK TargetConstant:i16<100>
t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, t38, t49:1
t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, t39, t51:1
t54: ch,glue = CALLk TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53, t53:1
t55: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t54, t54:1
t56: i16,ch,glue = CopyFromReg t55:1, Register:i16 $r23r22, t55:2
t14: ch = STSKRr<Mem:(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, t72, t0
t63: ch = STSWKRr<Mem:(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, t56, t0
t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
t66: ch = STSWKRr<Mem:(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2, t57, t0
t68: ch = TokenFactor t14, t63, t66
t24: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t68
t21: i16 = LDIWRdK TargetConstant:i16<34>
t26: ch,glue = CopyToReg t24:1, Register:i16 $r25r24, t21
t28: ch,glue = CopyToReg t26, Register:i8 $r22, t72, t26:1
t30: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28, t28:1
t31: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t30, t30:1
t33: ch = RJMPk BasicBlock:ch< 0x7f81030026d0>, t31:1
********** List Scheduling %bb.1 '' **********
SU(0): t33: ch = RJMPk BasicBlock:ch< 0x7f81030026d0>, t31:1
# preds left : 1
# succs left : 0
# rdefs left : 0
Latency : 1
Depth : 8
Height : 0
Predecessors:
SU(1): Ord Latency=1 Barrier
SU(1): t31: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t30, t30:1
t26: ch,glue = CopyToReg t24:1, Register:i16 $r25r24, t21
t28: ch,glue = CopyToReg t26, Register:i8 $r22, t72, t26:1
t30: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28, t28:1
# preds left : 3
# succs left : 1
# rdefs left : 0
Latency : 1
Depth : 7
Height : 1
Predecessors:
SU(2): Data Latency=1
SU(8): Ord Latency=1 Barrier
SU(7): Data Latency=1
Successors:
SU(0): Ord Latency=1 Barrier
SU(2): t72: i8 = Select8 t3, t74, TargetConstant:i8<4>, t70:1
t70: i8,glue = CPIRdK t2, TargetConstant:i8<91>
# preds left : 3
# succs left : 3
# rdefs left : 1
Latency : 1
Depth : 2
Height : 6
Predecessors:
SU(6): Data Latency=1
SU(4): Data Latency=1
SU(3): Data Latency=1
Successors:
SU(1): Data Latency=1
SU(14): Data Latency=1
SU(17): Data Latency=1
SU(3): t2: i8,ch = CopyFromReg t0, Register:i8 %1
# preds left : 0
# succs left : 2
# rdefs left : 1
Latency : 1
Depth : 0
Height : 8
Successors:
SU(2): Data Latency=1
SU(4): Data Latency=1
SU(4): t74: i8 = Select8 t6, t2, TargetConstant:i8<5>, t73:1
t73: i8,glue = CPIRdK t2, TargetConstant:i8<5>
# preds left : 2
# succs left : 1
# rdefs left : 1
Latency : 1
Depth : 1
Height : 7
Predecessors:
SU(5): Data Latency=1
SU(3): Data Latency=1
Successors:
SU(2): Data Latency=1
SU(5): t6: i8 = LDIRdK TargetConstant:i8<5>
# preds left : 0
# succs left : 1
# rdefs left : 1
Latency : 1
Depth : 0
Height : 8
Successors:
SU(4): Data Latency=1
SU(6): t3: i8 = LDIRdK TargetConstant:i8<90>
# preds left : 0
# succs left : 1
# rdefs left : 1
Latency : 1
Depth : 0
Height : 7
Successors:
SU(2): Data Latency=1
SU(7): t21: i16 = LDIWRdK TargetConstant:i16<34>
# preds left : 0
# succs left : 1
# rdefs left : 1
Latency : 1
Depth : 0
Height : 2
Successors:
SU(1): Data Latency=1
SU(8): t24: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t68
# preds left : 1
# succs left : 1
# rdefs left : 0
Latency : 1
Depth : 6
Height : 2
Predecessors:
SU(9): Ord Latency=0 Barrier
Successors:
SU(1): Ord Latency=1 Barrier
SU(9): t68: ch = TokenFactor t14, t63, t66
# preds left : 3
# succs left : 1
# rdefs left : 0
Latency : 0
Depth : 6
Height : 2
Predecessors:
SU(17): Ord Latency=1 Barrier
SU(16): Ord Latency=1 Barrier
SU(10): Ord Latency=1 Barrier
Successors:
SU(8): Ord Latency=0 Barrier
SU(10): t66: ch = STSWKRr<Mem:(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2, t57, t0
# preds left : 1
# succs left : 1
# rdefs left : 0
Latency : 1
Depth : 5
Height : 3
Predecessors:
SU(11): Data Latency=1
Successors:
SU(9): Ord Latency=1 Barrier
SU(11): t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
t48: ch,glue = CopyToReg t46:1, Register:i16 $r23r22, t40
t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, t39, t48:1
t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, t38, t49:1
t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, t39, t51:1
t54: ch,glue = CALLk TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53, t53:1
t55: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t54, t54:1
t56: i16,ch,glue = CopyFromReg t55:1, Register:i16 $r23r22, t55:2
# preds left : 4
# succs left : 2
# rdefs left : 1
Latency : 1
Depth : 4
Height : 4
Predecessors:
SU(12): Data Latency=1
SU(13): Data Latency=1
SU(15): Ord Latency=1 Barrier
SU(14): Data Latency=1
Successors:
SU(10): Data Latency=1
SU(16): Data Latency=1
SU(12): t39: i16 = LDIWRdK TargetConstant:i16<0>
# preds left : 0
# succs left : 1
# rdefs left : 1
Latency : 1
Depth : 0
Height : 5
Successors:
SU(11): Data Latency=1
SU(13): t38: i16 = LDIWRdK TargetConstant:i16<100>
# preds left : 0
# succs left : 1
# rdefs left : 1
Latency : 1
Depth : 0
Height : 5
Successors:
SU(11): Data Latency=1
SU(14): t40: i16,i8 = ZEXT t72
# preds left : 1
# succs left : 1
# rdefs left : 1
Latency : 1
Depth : 3
Height : 5
Predecessors:
SU(2): Data Latency=1
Successors:
SU(11): Data Latency=1
SU(15): t46: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0
# preds left : 0
# succs left : 1
# rdefs left : 0
Latency : 1
Depth : 0
Height : 5
Successors:
SU(11): Ord Latency=1 Barrier
SU(16): t63: ch = STSWKRr<Mem:(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, t56, t0
# preds left : 1
# succs left : 1
# rdefs left : 0
Latency : 1
Depth : 5
Height : 3
Predecessors:
SU(11): Data Latency=1
Successors:
SU(9): Ord Latency=1 Barrier
SU(17): t14: ch = STSKRr<Mem:(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, t72, t0
# preds left : 1
# succs left : 1
# rdefs left : 0
Latency : 1
Depth : 3
Height : 3
Predecessors:
SU(2): Data Latency=1
Successors:
SU(9): Ord Latency=1 Barrier
Examining Available:
Height 0: SU(0): t33: ch = RJMPk BasicBlock:ch< 0x7f81030026d0>, t31:1
*** Scheduling [0]: SU(0): t33: ch = RJMPk BasicBlock:ch< 0x7f81030026d0>, t31:1
Examining Available:
Height 1: SU(1): t31: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t30, t30:1
t26: ch,glue = CopyToReg t24:1, Register:i16 $r25r24, t21
t28: ch,glue = CopyToReg t26, Register:i8 $r22, t72, t26:1
t30: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28, t28:1
*** Scheduling [1]: SU(1): t31: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t30, t30:1
t26: ch,glue = CopyToReg t24:1, Register:i16 $r25r24, t21
t28: ch,glue = CopyToReg t26, Register:i8 $r22, t72, t26:1
t30: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28, t28:1
Examining Available:
Height 2: SU(7): t21: i16 = LDIWRdK TargetConstant:i16<34>
Height 2: SU(8): t24: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t68
*** Scheduling [2]: SU(7): t21: i16 = LDIWRdK TargetConstant:i16<34>
Examining Available:
Height 2: SU(8): t24: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t68
*** Scheduling [3]: SU(8): t24: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t68
Examining Available:
Height 3: SU(9): t68: ch = TokenFactor t14, t63, t66
*** Scheduling [4]: SU(9): t68: ch = TokenFactor t14, t63, t66
Examining Available:
Comparing latency of SU (17) depth 3 vs SU (16) depth 5
Height 5: SU(16): t63: ch = STSWKRr<Mem:(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, t56, t0
Comparing latency of SU (17) depth 3 vs SU (10) depth 5
Height 5: SU(10): t66: ch = STSWKRr<Mem:(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2, t57, t0
Height 5: SU(17): t14: ch = STSKRr<Mem:(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, t72, t0
Comparing latency of SU (17) depth 3 vs SU (16) depth 5
*** Scheduling [5]: SU(16): t63: ch = STSWKRr<Mem:(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, t56, t0
Examining Available:
Comparing latency of SU (17) depth 3 vs SU (10) depth 5
Height 5: SU(10): t66: ch = STSWKRr<Mem:(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2, t57, t0
Height 5: SU(17): t14: ch = STSKRr<Mem:(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, t72, t0
Comparing latency of SU (17) depth 3 vs SU (10) depth 5
*** Scheduling [6]: SU(10): t66: ch = STSWKRr<Mem:(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2, t57, t0
Examining Available:
Height 7: SU(11): t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
t48: ch,glue = CopyToReg t46:1, Register:i16 $r23r22, t40
t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, t39, t48:1
t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, t38, t49:1
t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, t39, t51:1
t54: ch,glue = CALLk TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53, t53:1
t55: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t54, t54:1
t56: i16,ch,glue = CopyFromReg t55:1, Register:i16 $r23r22, t55:2
Height 5: SU(17): t14: ch = STSKRr<Mem:(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, t72, t0
*** Scheduling [7]: SU(11): t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
t48: ch,glue = CopyToReg t46:1, Register:i16 $r23r22, t40
t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, t39, t48:1
t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, t38, t49:1
t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, t39, t51:1
t54: ch,glue = CALLk TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53, t53:1
t55: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t54, t54:1
t56: i16,ch,glue = CopyFromReg t55:1, Register:i16 $r23r22, t55:2
Examining Available:
Height 8: SU(12): t39: i16 = LDIWRdK TargetConstant:i16<0>
Height 8: SU(13): t38: i16 = LDIWRdK TargetConstant:i16<100>
Height 8: SU(15): t46: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0
Height 8: SU(14): t40: i16,i8 = ZEXT t72
Height 5: SU(17): t14: ch = STSKRr<Mem:(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, t72, t0
*** Scheduling [8]: SU(12): t39: i16 = LDIWRdK TargetConstant:i16<0>
Examining Available:
Height 8: SU(13): t38: i16 = LDIWRdK TargetConstant:i16<100>
Height 8: SU(15): t46: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0
Height 8: SU(14): t40: i16,i8 = ZEXT t72
Height 5: SU(17): t14: ch = STSKRr<Mem:(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, t72, t0
*** Scheduling [9]: SU(13): t38: i16 = LDIWRdK TargetConstant:i16<100>
Examining Available:
Height 8: SU(15): t46: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0
Height 8: SU(14): t40: i16,i8 = ZEXT t72
Height 5: SU(17): t14: ch = STSKRr<Mem:(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, t72, t0
*** Scheduling [10]: SU(15): t46: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0
Examining Available:
Height 8: SU(14): t40: i16,i8 = ZEXT t72
Height 5: SU(17): t14: ch = STSKRr<Mem:(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, t72, t0
*** Scheduling [11]: SU(14): t40: i16,i8 = ZEXT t72
Examining Available:
Height 5: SU(17): t14: ch = STSKRr<Mem:(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, t72, t0
*** Scheduling [12]: SU(17): t14: ch = STSKRr<Mem:(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, t72, t0
Examining Available:
Height 13: SU(2): t72: i8 = Select8 t3, t74, TargetConstant:i8<4>, t70:1
t70: i8,glue = CPIRdK t2, TargetConstant:i8<91>
*** Scheduling [13]: SU(2): t72: i8 = Select8 t3, t74, TargetConstant:i8<4>, t70:1
t70: i8,glue = CPIRdK t2, TargetConstant:i8<91>
Examining Available:
Height 14: SU(6): t3: i8 = LDIRdK TargetConstant:i8<90>
Height 14: SU(4): t74: i8 = Select8 t6, t2, TargetConstant:i8<5>, t73:1
t73: i8,glue = CPIRdK t2, TargetConstant:i8<5>
*** Scheduling [14]: SU(6): t3: i8 = LDIRdK TargetConstant:i8<90>
Examining Available:
Height 14: SU(4): t74: i8 = Select8 t6, t2, TargetConstant:i8<5>, t73:1
t73: i8,glue = CPIRdK t2, TargetConstant:i8<5>
*** Scheduling [15]: SU(4): t74: i8 = Select8 t6, t2, TargetConstant:i8<5>, t73:1
t73: i8,glue = CPIRdK t2, TargetConstant:i8<5>
Examining Available:
Height 16: SU(5): t6: i8 = LDIRdK TargetConstant:i8<5>
Height 16: SU(3): t2: i8,ch = CopyFromReg t0, Register:i8 %1
*** Scheduling [16]: SU(5): t6: i8 = LDIRdK TargetConstant:i8<5>
Examining Available:
Height 16: SU(3): t2: i8,ch = CopyFromReg t0, Register:i8 %1
*** Scheduling [17]: SU(3): t2: i8,ch = CopyFromReg t0, Register:i8 %1
*** Final schedule ***
SU(3): t2: i8,ch = CopyFromReg t0, Register:i8 %1
SU(5): t6: i8 = LDIRdK TargetConstant:i8<5>
SU(4): t74: i8 = Select8 t6, t2, TargetConstant:i8<5>, t73:1
t73: i8,glue = CPIRdK t2, TargetConstant:i8<5>
SU(6): t3: i8 = LDIRdK TargetConstant:i8<90>
SU(2): t72: i8 = Select8 t3, t74, TargetConstant:i8<4>, t70:1
t70: i8,glue = CPIRdK t2, TargetConstant:i8<91>
SU(17): t14: ch = STSKRr<Mem:(store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)> TargetGlobalAddress:i16<%Vs5UInt8* @_Tv4main11delayFactorVs5UInt8> 0, t72, t0
SU(14): t40: i16,i8 = ZEXT t72
SU(15): t46: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0
SU(13): t38: i16 = LDIWRdK TargetConstant:i16<100>
SU(12): t39: i16 = LDIWRdK TargetConstant:i16<0>
SU(11): t57: i16,ch,glue = CopyFromReg t56:1, Register:i16 $r25r24, t56:2
t48: ch,glue = CopyToReg t46:1, Register:i16 $r23r22, t40
t49: ch,glue = CopyToReg t48, Register:i16 $r25r24, t39, t48:1
t51: ch,glue = CopyToReg t49, Register:i16 $r19r18, t38, t49:1
t53: ch,glue = CopyToReg t51, Register:i16 $r21r20, t39, t51:1
t54: ch,glue = CALLk TargetExternalSymbol:i16'__mulsi3', Register:i16 $r23r22, Register:i16 $r25r24, Register:i16 $r19r18, Register:i16 $r21r20, RegisterMask:Untyped, t53, t53:1
t55: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t54, t54:1
t56: i16,ch,glue = CopyFromReg t55:1, Register:i16 $r23r22, t55:2
SU(10): t66: ch = STSWKRr<Mem:(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)> TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> + 2, t57, t0
SU(16): t63: ch = STSWKRr<Mem:(store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)> TargetGlobalAddress:i16<%Vs6UInt32* @_Tv4main7delayUsVs6UInt32> 0, t56, t0
SU(9): t68: ch = TokenFactor t14, t63, t66
SU(8): t24: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t68
SU(7): t21: i16 = LDIWRdK TargetConstant:i16<34>
SU(1): t31: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t30, t30:1
t26: ch,glue = CopyToReg t24:1, Register:i16 $r25r24, t21
t28: ch,glue = CopyToReg t26, Register:i8 $r22, t72, t26:1
t30: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i8)* @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t28, t28:1
SU(0): t33: ch = RJMPk BasicBlock:ch< 0x7f81030026d0>, t31:1
Total amount of phi nodes to update: 0
Creating new node: t1: ch = RET_FLAG t0
Initial selection DAG: %bb.3 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 2 nodes:
t0: ch = EntryToken
t1: ch = RET_FLAG t0
Combining: t1: ch = RET_FLAG t0
Combining: t0: ch = EntryToken
Optimized lowered selection DAG: %bb.3 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 2 nodes:
t0: ch = EntryToken
t1: ch = RET_FLAG t0
Legalizing node: t0: ch = EntryToken
Analyzing result type: ch
Legal result type
Legally typed node: t0: ch = EntryToken
Legalizing node: t1: ch = RET_FLAG t0
Analyzing result type: ch
Legal result type
Analyzing operand: t0: ch = EntryToken
Legal operand
Legally typed node: t1: ch = RET_FLAG t0
Legalizing node: t65535: ch = handlenode t1
Analyzing result type: ch
Legal result type
Analyzing operand: t1: ch = RET_FLAG t0
Legal operand
Legally typed node: t65535: ch = handlenode t1
Type-legalized selection DAG: %bb.3 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 2 nodes:
t0: ch = EntryToken
t1: ch = RET_FLAG t0
Legalizing: t1: ch = RET_FLAG t0
Legal node: nothing to do
Legalizing: t0: ch = EntryToken
Legal node: nothing to do
Legalized selection DAG: %bb.3 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 2 nodes:
t0: ch = EntryToken
t1: ch = RET_FLAG t0
Legalizing: t1: ch = RET_FLAG t0
Legal node: nothing to do
Combining: t1: ch = RET_FLAG t0
Legalizing: t0: ch = EntryToken
Legal node: nothing to do
Combining: t0: ch = EntryToken
Optimized legalized selection DAG: %bb.3 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 2 nodes:
t0: ch = EntryToken
t1: ch = RET_FLAG t0
===== Instruction selection begins: %bb.3 ''
ISEL: Starting selection on root node: t1: ch = RET_FLAG t0
ISEL: Starting pattern match
Initial Opcode index to 2223
Morphed node: t1: ch = RET t0
ISEL: Match complete!
ISEL: Starting selection on root node: t0: ch = EntryToken
===== Instruction selection ends:
Selected selection DAG: %bb.3 '_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_:'
SelectionDAG has 2 nodes:
t0: ch = EntryToken
t1: ch = RET t0
********** List Scheduling %bb.3 '' **********
SU(0): t1: ch = RET t0
# preds left : 0
# succs left : 0
# rdefs left : 0
Latency : 1
Depth : 0
Height : 0
Examining Available:
Height 0: SU(0): t1: ch = RET t0
*** Scheduling [0]: SU(0): t1: ch = RET t0
*** Final schedule ***
SU(0): t1: ch = RET t0
Total amount of phi nodes to update: 0
*** MachineFunction at end of ISel ***
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.2(0x2aaaaaab), %bb.4(0x55555555); %bb.2(33.33%), %bb.4(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY $r22
%0:ld8 = COPY $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.4
bb.4.entry:
; predecessors: %bb.0
successors: %bb.1(0x40000001), %bb.3(0x3fffffff); %bb.1(50.00%), %bb.3(50.00%)
CPIRdK %0:ld8, 6, implicit-def $sreg
BRNEk %bb.3, implicit $sreg
RJMPk %bb.1
bb.1 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.3(0x80000000); %bb.3(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
%8:gpr8 = Select8 killed %7:ld8, %1:ld8, 5, implicit $sreg
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
%10:gpr8 = Select8 killed %9:ld8, killed %8:gpr8, 4, implicit $sreg
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.3
bb.2 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.3(0x80000000); %bb.3(200.00%)
%2:ld8 = LDIRdK 0
%3:ld8 = LDIRdK 1
CPIRdK %1:ld8, 0, implicit-def $sreg
%4:ld8 = Select8 killed %3:ld8, killed %2:ld8, 1, implicit $sreg
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.3 (%ir-block.9):
; predecessors: %bb.4, %bb.2, %bb.1
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After AVR DAG->DAG Instruction Selection ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.2(0x2aaaaaab), %bb.4(0x55555555); %bb.2(33.33%), %bb.4(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY $r22
%0:ld8 = COPY $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.4
bb.4.entry:
; predecessors: %bb.0
successors: %bb.1(0x40000001), %bb.3(0x3fffffff); %bb.1(50.00%), %bb.3(50.00%)
CPIRdK %0:ld8, 6, implicit-def $sreg
BRNEk %bb.3, implicit $sreg
RJMPk %bb.1
bb.1 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.3(0x80000000); %bb.3(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
%8:gpr8 = Select8 killed %7:ld8, %1:ld8, 5, implicit $sreg
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
%10:gpr8 = Select8 killed %9:ld8, killed %8:gpr8, 4, implicit $sreg
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.3
bb.2 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.3(0x80000000); %bb.3(200.00%)
%2:ld8 = LDIRdK 0
%3:ld8 = LDIRdK 1
CPIRdK %1:ld8, 0, implicit-def $sreg
%4:ld8 = Select8 killed %3:ld8, killed %2:ld8, 1, implicit $sreg
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.3 (%ir-block.9):
; predecessors: %bb.4, %bb.2, %bb.1
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Expand ISel Pseudo-instructions ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.2(0x2aaaaaab), %bb.4(0x55555555); %bb.2(33.33%), %bb.4(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY $r22
%0:ld8 = COPY $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.4
bb.4.entry:
; predecessors: %bb.0
successors: %bb.1(0x40000001), %bb.3(0x3fffffff); %bb.1(50.00%), %bb.3(50.00%)
CPIRdK %0:ld8, 6, implicit-def $sreg
BRNEk %bb.3, implicit $sreg
RJMPk %bb.1
bb.1 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x40000000), %bb.5(0x40000000); %bb.6(200.00%), %bb.5(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
BRLOk %bb.5, implicit $sreg
RJMPk %bb.6
bb.5 (%ir-block.2):
; predecessors: %bb.1, %bb.6
successors: %bb.8(0x40000000), %bb.7(0x40000000); %bb.8(200.00%), %bb.7(200.00%)
%8:gpr8 = PHI %7:ld8, %bb.1, %1:ld8, %bb.6
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
RJMPk %bb.8
bb.7 (%ir-block.2):
; predecessors: %bb.5, %bb.8
successors: %bb.3(0x80000000); %bb.3(100.00%)
%10:gpr8 = PHI %9:ld8, %bb.5, %8:gpr8, %bb.8
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.3
bb.8 (%ir-block.2):
; predecessors: %bb.5
successors: %bb.7(0x80000000); %bb.7(200.00%)
RJMPk %bb.7
bb.6 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.5(0x80000000); %bb.5(200.00%)
RJMPk %bb.5
bb.2 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.10(0x40000000), %bb.9(0x40000000); %bb.10(200.00%), %bb.9(200.00%)
%2:ld8 = LDIRdK 0
%3:ld8 = LDIRdK 1
CPIRdK %1:ld8, 0, implicit-def $sreg
BRNEk %bb.9, implicit $sreg
RJMPk %bb.10
bb.9 (%ir-block.8):
; predecessors: %bb.2, %bb.10
successors: %bb.3(0x80000000); %bb.3(100.00%)
%4:ld8 = PHI %3:ld8, %bb.2, %2:ld8, %bb.10
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.10 (%ir-block.8):
; predecessors: %bb.2
successors: %bb.9(0x80000000); %bb.9(200.00%)
RJMPk %bb.9
bb.3 (%ir-block.9):
; predecessors: %bb.4, %bb.7, %bb.9
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
*** Tail-duplicating %bb.8
*** Tail-duplicating %bb.6
*** Tail-duplicating %bb.10
# *** IR Dump After Early Tail Duplication ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.2(0x2aaaaaab), %bb.4(0x55555555); %bb.2(33.33%), %bb.4(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY $r22
%0:ld8 = COPY $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.4
bb.4.entry:
; predecessors: %bb.0
successors: %bb.1(0x40000001), %bb.3(0x3fffffff); %bb.1(50.00%), %bb.3(50.00%)
CPIRdK %0:ld8, 6, implicit-def $sreg
BRNEk %bb.3, implicit $sreg
RJMPk %bb.1
bb.1 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x40000000), %bb.5(0x40000000); %bb.6(200.00%), %bb.5(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
BRLOk %bb.5, implicit $sreg
RJMPk %bb.6
bb.5 (%ir-block.2):
; predecessors: %bb.1, %bb.6
successors: %bb.8(0x40000000), %bb.7(0x40000000); %bb.8(200.00%), %bb.7(200.00%)
%8:gpr8 = PHI %7:ld8, %bb.1, %1:ld8, %bb.6
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
RJMPk %bb.8
bb.7 (%ir-block.2):
; predecessors: %bb.5, %bb.8
successors: %bb.3(0x80000000); %bb.3(100.00%)
%10:gpr8 = PHI %9:ld8, %bb.5, %8:gpr8, %bb.8
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.3
bb.8 (%ir-block.2):
; predecessors: %bb.5
successors: %bb.7(0x80000000); %bb.7(200.00%)
RJMPk %bb.7
bb.6 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.5(0x80000000); %bb.5(200.00%)
RJMPk %bb.5
bb.2 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.10(0x40000000), %bb.9(0x40000000); %bb.10(200.00%), %bb.9(200.00%)
%2:ld8 = LDIRdK 0
%3:ld8 = LDIRdK 1
CPIRdK %1:ld8, 0, implicit-def $sreg
BRNEk %bb.9, implicit $sreg
RJMPk %bb.10
bb.9 (%ir-block.8):
; predecessors: %bb.2, %bb.10
successors: %bb.3(0x80000000); %bb.3(100.00%)
%4:ld8 = PHI %3:ld8, %bb.2, %2:ld8, %bb.10
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.10 (%ir-block.8):
; predecessors: %bb.2
successors: %bb.9(0x80000000); %bb.9(200.00%)
RJMPk %bb.9
bb.3 (%ir-block.9):
; predecessors: %bb.4, %bb.7, %bb.9
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Optimize machine instruction PHIs ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.2(0x2aaaaaab), %bb.4(0x55555555); %bb.2(33.33%), %bb.4(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY $r22
%0:ld8 = COPY $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.4
bb.4.entry:
; predecessors: %bb.0
successors: %bb.1(0x40000001), %bb.3(0x3fffffff); %bb.1(50.00%), %bb.3(50.00%)
CPIRdK %0:ld8, 6, implicit-def $sreg
BRNEk %bb.3, implicit $sreg
RJMPk %bb.1
bb.1 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x40000000), %bb.5(0x40000000); %bb.6(200.00%), %bb.5(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
BRLOk %bb.5, implicit $sreg
RJMPk %bb.6
bb.5 (%ir-block.2):
; predecessors: %bb.1, %bb.6
successors: %bb.8(0x40000000), %bb.7(0x40000000); %bb.8(200.00%), %bb.7(200.00%)
%8:gpr8 = PHI %7:ld8, %bb.1, %1:ld8, %bb.6
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
RJMPk %bb.8
bb.7 (%ir-block.2):
; predecessors: %bb.5, %bb.8
successors: %bb.3(0x80000000); %bb.3(100.00%)
%10:gpr8 = PHI %9:ld8, %bb.5, %8:gpr8, %bb.8
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.3
bb.8 (%ir-block.2):
; predecessors: %bb.5
successors: %bb.7(0x80000000); %bb.7(200.00%)
RJMPk %bb.7
bb.6 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.5(0x80000000); %bb.5(200.00%)
RJMPk %bb.5
bb.2 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.10(0x40000000), %bb.9(0x40000000); %bb.10(200.00%), %bb.9(200.00%)
%2:ld8 = LDIRdK 0
%3:ld8 = LDIRdK 1
CPIRdK %1:ld8, 0, implicit-def $sreg
BRNEk %bb.9, implicit $sreg
RJMPk %bb.10
bb.9 (%ir-block.8):
; predecessors: %bb.2, %bb.10
successors: %bb.3(0x80000000); %bb.3(100.00%)
%4:ld8 = PHI %3:ld8, %bb.2, %2:ld8, %bb.10
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.10 (%ir-block.8):
; predecessors: %bb.2
successors: %bb.9(0x80000000); %bb.9(200.00%)
RJMPk %bb.9
bb.3 (%ir-block.9):
; predecessors: %bb.4, %bb.7, %bb.9
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
0B bb.0.entry:
successors: %bb.2(0x2aaaaaab), %bb.4(0x55555555); %bb.2(33.33%), %bb.4(66.67%)
liveins: $r24, $r22
16B %1:ld8 = COPY $r22
32B %0:ld8 = COPY $r24
48B CPIRdK %0:ld8, 7, implicit-def $sreg
64B BREQk %bb.2, implicit $sreg
80B RJMPk %bb.4
96B bb.4.entry:
; predecessors: %bb.0
successors: %bb.1(0x40000001), %bb.3(0x3fffffff); %bb.1(50.00%), %bb.3(50.00%)
112B CPIRdK %0:ld8, 6, implicit-def $sreg
128B BRNEk %bb.3, implicit $sreg
144B RJMPk %bb.1
160B bb.1 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x40000000), %bb.5(0x40000000); %bb.6(200.00%), %bb.5(200.00%)
176B %7:ld8 = LDIRdK 5
192B CPIRdK %1:ld8, 5, implicit-def $sreg
208B BRLOk %bb.5, implicit $sreg
224B RJMPk %bb.6
240B bb.5 (%ir-block.2):
; predecessors: %bb.1, %bb.6
successors: %bb.8(0x40000000), %bb.7(0x40000000); %bb.8(200.00%), %bb.7(200.00%)
256B %8:gpr8 = PHI %7:ld8, %bb.1, %1:ld8, %bb.6
272B %9:ld8 = LDIRdK 90
288B CPIRdK %1:ld8, 91, implicit-def $sreg
304B BRSHk %bb.7, implicit $sreg
320B RJMPk %bb.8
336B bb.7 (%ir-block.2):
; predecessors: %bb.5, %bb.8
successors: %bb.3(0x80000000); %bb.3(100.00%)
352B %10:gpr8 = PHI %9:ld8, %bb.5, %8:gpr8, %bb.8
368B STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
384B %11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
400B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
416B %12:dldregs = LDIWRdK 100
432B %13:dldregs = LDIWRdK 0
448B $r23r22 = COPY %11:dregs
464B $r25r24 = COPY %13:dldregs
480B $r19r18 = COPY %12:dldregs
496B $r21r20 = COPY %13:dldregs
512B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
528B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
544B %14:dregs = COPY $r23r22
560B %15:dregs = COPY $r25r24
576B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
592B STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
608B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
624B %16:dldregs = LDIWRdK 34
640B $r25r24 = COPY %16:dldregs
656B $r22 = COPY %10:gpr8
672B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
688B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
704B RJMPk %bb.3
720B bb.8 (%ir-block.2):
; predecessors: %bb.5
successors: %bb.7(0x80000000); %bb.7(200.00%)
736B RJMPk %bb.7
752B bb.6 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.5(0x80000000); %bb.5(200.00%)
768B RJMPk %bb.5
784B bb.2 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.10(0x40000000), %bb.9(0x40000000); %bb.10(200.00%), %bb.9(200.00%)
800B %2:ld8 = LDIRdK 0
816B %3:ld8 = LDIRdK 1
832B CPIRdK %1:ld8, 0, implicit-def $sreg
848B BRNEk %bb.9, implicit $sreg
864B RJMPk %bb.10
880B bb.9 (%ir-block.8):
; predecessors: %bb.2, %bb.10
successors: %bb.3(0x80000000); %bb.3(100.00%)
896B %4:ld8 = PHI %3:ld8, %bb.2, %2:ld8, %bb.10
912B %5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
928B STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
944B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
960B %6:dldregs = LDIWRdK 35
976B $r25r24 = COPY %6:dldregs
992B $r22 = COPY %4:ld8
1008B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
1024B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B bb.10 (%ir-block.8):
; predecessors: %bb.2
successors: %bb.9(0x80000000); %bb.9(200.00%)
1056B RJMPk %bb.9
1072B bb.3 (%ir-block.9):
; predecessors: %bb.4, %bb.7, %bb.9
1088B RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Slot index numbering ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
0B bb.0.entry:
successors: %bb.2(0x2aaaaaab), %bb.4(0x55555555); %bb.2(33.33%), %bb.4(66.67%)
liveins: $r24, $r22
16B %1:ld8 = COPY $r22
32B %0:ld8 = COPY $r24
48B CPIRdK %0:ld8, 7, implicit-def $sreg
64B BREQk %bb.2, implicit $sreg
80B RJMPk %bb.4
96B bb.4.entry:
; predecessors: %bb.0
successors: %bb.1(0x40000001), %bb.3(0x3fffffff); %bb.1(50.00%), %bb.3(50.00%)
112B CPIRdK %0:ld8, 6, implicit-def $sreg
128B BRNEk %bb.3, implicit $sreg
144B RJMPk %bb.1
160B bb.1 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x40000000), %bb.5(0x40000000); %bb.6(200.00%), %bb.5(200.00%)
176B %7:ld8 = LDIRdK 5
192B CPIRdK %1:ld8, 5, implicit-def $sreg
208B BRLOk %bb.5, implicit $sreg
224B RJMPk %bb.6
240B bb.5 (%ir-block.2):
; predecessors: %bb.1, %bb.6
successors: %bb.8(0x40000000), %bb.7(0x40000000); %bb.8(200.00%), %bb.7(200.00%)
256B %8:gpr8 = PHI %7:ld8, %bb.1, %1:ld8, %bb.6
272B %9:ld8 = LDIRdK 90
288B CPIRdK %1:ld8, 91, implicit-def $sreg
304B BRSHk %bb.7, implicit $sreg
320B RJMPk %bb.8
336B bb.7 (%ir-block.2):
; predecessors: %bb.5, %bb.8
successors: %bb.3(0x80000000); %bb.3(100.00%)
352B %10:gpr8 = PHI %9:ld8, %bb.5, %8:gpr8, %bb.8
368B STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
384B %11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
400B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
416B %12:dldregs = LDIWRdK 100
432B %13:dldregs = LDIWRdK 0
448B $r23r22 = COPY %11:dregs
464B $r25r24 = COPY %13:dldregs
480B $r19r18 = COPY %12:dldregs
496B $r21r20 = COPY %13:dldregs
512B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
528B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
544B %14:dregs = COPY $r23r22
560B %15:dregs = COPY $r25r24
576B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
592B STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
608B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
624B %16:dldregs = LDIWRdK 34
640B $r25r24 = COPY %16:dldregs
656B $r22 = COPY %10:gpr8
672B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
688B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
704B RJMPk %bb.3
720B bb.8 (%ir-block.2):
; predecessors: %bb.5
successors: %bb.7(0x80000000); %bb.7(200.00%)
736B RJMPk %bb.7
752B bb.6 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.5(0x80000000); %bb.5(200.00%)
768B RJMPk %bb.5
784B bb.2 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.10(0x40000000), %bb.9(0x40000000); %bb.10(200.00%), %bb.9(200.00%)
800B %2:ld8 = LDIRdK 0
816B %3:ld8 = LDIRdK 1
832B CPIRdK %1:ld8, 0, implicit-def $sreg
848B BRNEk %bb.9, implicit $sreg
864B RJMPk %bb.10
880B bb.9 (%ir-block.8):
; predecessors: %bb.2, %bb.10
successors: %bb.3(0x80000000); %bb.3(100.00%)
896B %4:ld8 = PHI %3:ld8, %bb.2, %2:ld8, %bb.10
912B %5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
928B STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
944B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
960B %6:dldregs = LDIWRdK 35
976B $r25r24 = COPY %6:dldregs
992B $r22 = COPY %4:ld8
1008B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
1024B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B bb.10 (%ir-block.8):
; predecessors: %bb.2
successors: %bb.9(0x80000000); %bb.9(200.00%)
1056B RJMPk %bb.9
1072B bb.3 (%ir-block.9):
; predecessors: %bb.4, %bb.7, %bb.9
1088B RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
********** Stack Coloring **********
********** Function: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
# *** IR Dump After Merge disjoint stack slots ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.2(0x2aaaaaab), %bb.4(0x55555555); %bb.2(33.33%), %bb.4(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY $r22
%0:ld8 = COPY $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.4
bb.4.entry:
; predecessors: %bb.0
successors: %bb.1(0x40000001), %bb.3(0x3fffffff); %bb.1(50.00%), %bb.3(50.00%)
CPIRdK %0:ld8, 6, implicit-def $sreg
BRNEk %bb.3, implicit $sreg
RJMPk %bb.1
bb.1 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x40000000), %bb.5(0x40000000); %bb.6(200.00%), %bb.5(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
BRLOk %bb.5, implicit $sreg
RJMPk %bb.6
bb.5 (%ir-block.2):
; predecessors: %bb.1, %bb.6
successors: %bb.8(0x40000000), %bb.7(0x40000000); %bb.8(200.00%), %bb.7(200.00%)
%8:gpr8 = PHI %7:ld8, %bb.1, %1:ld8, %bb.6
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
RJMPk %bb.8
bb.7 (%ir-block.2):
; predecessors: %bb.5, %bb.8
successors: %bb.3(0x80000000); %bb.3(100.00%)
%10:gpr8 = PHI %9:ld8, %bb.5, %8:gpr8, %bb.8
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.3
bb.8 (%ir-block.2):
; predecessors: %bb.5
successors: %bb.7(0x80000000); %bb.7(200.00%)
RJMPk %bb.7
bb.6 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.5(0x80000000); %bb.5(200.00%)
RJMPk %bb.5
bb.2 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.10(0x40000000), %bb.9(0x40000000); %bb.10(200.00%), %bb.9(200.00%)
%2:ld8 = LDIRdK 0
%3:ld8 = LDIRdK 1
CPIRdK %1:ld8, 0, implicit-def $sreg
BRNEk %bb.9, implicit $sreg
RJMPk %bb.10
bb.9 (%ir-block.8):
; predecessors: %bb.2, %bb.10
successors: %bb.3(0x80000000); %bb.3(100.00%)
%4:ld8 = PHI %3:ld8, %bb.2, %2:ld8, %bb.10
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.10 (%ir-block.8):
; predecessors: %bb.2
successors: %bb.9(0x80000000); %bb.9(200.00%)
RJMPk %bb.9
bb.3 (%ir-block.9):
; predecessors: %bb.4, %bb.7, %bb.9
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Local Stack Slot Allocation ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.2(0x2aaaaaab), %bb.4(0x55555555); %bb.2(33.33%), %bb.4(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY $r22
%0:ld8 = COPY $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.4
bb.4.entry:
; predecessors: %bb.0
successors: %bb.1(0x40000001), %bb.3(0x3fffffff); %bb.1(50.00%), %bb.3(50.00%)
CPIRdK %0:ld8, 6, implicit-def $sreg
BRNEk %bb.3, implicit $sreg
RJMPk %bb.1
bb.1 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x40000000), %bb.5(0x40000000); %bb.6(200.00%), %bb.5(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
BRLOk %bb.5, implicit $sreg
RJMPk %bb.6
bb.5 (%ir-block.2):
; predecessors: %bb.1, %bb.6
successors: %bb.8(0x40000000), %bb.7(0x40000000); %bb.8(200.00%), %bb.7(200.00%)
%8:gpr8 = PHI %7:ld8, %bb.1, %1:ld8, %bb.6
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
RJMPk %bb.8
bb.7 (%ir-block.2):
; predecessors: %bb.5, %bb.8
successors: %bb.3(0x80000000); %bb.3(100.00%)
%10:gpr8 = PHI %9:ld8, %bb.5, %8:gpr8, %bb.8
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.3
bb.8 (%ir-block.2):
; predecessors: %bb.5
successors: %bb.7(0x80000000); %bb.7(200.00%)
RJMPk %bb.7
bb.6 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.5(0x80000000); %bb.5(200.00%)
RJMPk %bb.5
bb.2 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.10(0x40000000), %bb.9(0x40000000); %bb.10(200.00%), %bb.9(200.00%)
%2:ld8 = LDIRdK 0
%3:ld8 = LDIRdK 1
CPIRdK %1:ld8, 0, implicit-def $sreg
BRNEk %bb.9, implicit $sreg
RJMPk %bb.10
bb.9 (%ir-block.8):
; predecessors: %bb.2, %bb.10
successors: %bb.3(0x80000000); %bb.3(100.00%)
%4:ld8 = PHI %3:ld8, %bb.2, %2:ld8, %bb.10
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.10 (%ir-block.8):
; predecessors: %bb.2
successors: %bb.9(0x80000000); %bb.9(200.00%)
RJMPk %bb.9
bb.3 (%ir-block.9):
; predecessors: %bb.4, %bb.7, %bb.9
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Remove dead machine instructions ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.2(0x2aaaaaab), %bb.4(0x55555555); %bb.2(33.33%), %bb.4(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY $r22
%0:ld8 = COPY $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.4
bb.4.entry:
; predecessors: %bb.0
successors: %bb.1(0x40000001), %bb.3(0x3fffffff); %bb.1(50.00%), %bb.3(50.00%)
CPIRdK %0:ld8, 6, implicit-def $sreg
BRNEk %bb.3, implicit $sreg
RJMPk %bb.1
bb.1 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x40000000), %bb.5(0x40000000); %bb.6(200.00%), %bb.5(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
BRLOk %bb.5, implicit $sreg
RJMPk %bb.6
bb.5 (%ir-block.2):
; predecessors: %bb.1, %bb.6
successors: %bb.8(0x40000000), %bb.7(0x40000000); %bb.8(200.00%), %bb.7(200.00%)
%8:gpr8 = PHI %7:ld8, %bb.1, %1:ld8, %bb.6
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
RJMPk %bb.8
bb.7 (%ir-block.2):
; predecessors: %bb.5, %bb.8
successors: %bb.3(0x80000000); %bb.3(100.00%)
%10:gpr8 = PHI %9:ld8, %bb.5, %8:gpr8, %bb.8
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.3
bb.8 (%ir-block.2):
; predecessors: %bb.5
successors: %bb.7(0x80000000); %bb.7(200.00%)
RJMPk %bb.7
bb.6 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.5(0x80000000); %bb.5(200.00%)
RJMPk %bb.5
bb.2 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.10(0x40000000), %bb.9(0x40000000); %bb.10(200.00%), %bb.9(200.00%)
%2:ld8 = LDIRdK 0
%3:ld8 = LDIRdK 1
CPIRdK %1:ld8, 0, implicit-def $sreg
BRNEk %bb.9, implicit $sreg
RJMPk %bb.10
bb.9 (%ir-block.8):
; predecessors: %bb.2, %bb.10
successors: %bb.3(0x80000000); %bb.3(100.00%)
%4:ld8 = PHI %3:ld8, %bb.2, %2:ld8, %bb.10
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.10 (%ir-block.8):
; predecessors: %bb.2
successors: %bb.9(0x80000000); %bb.9(200.00%)
RJMPk %bb.9
bb.3 (%ir-block.9):
; predecessors: %bb.4, %bb.7, %bb.9
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
discovered a new reachable node %bb.0
discovered a new reachable node %bb.2
discovered a new reachable node %bb.10
discovered a new reachable node %bb.9
discovered a new reachable node %bb.3
discovered a new reachable node %bb.4
discovered a new reachable node %bb.1
discovered a new reachable node %bb.6
discovered a new reachable node %bb.5
discovered a new reachable node %bb.8
discovered a new reachable node %bb.7
******** Pre-regalloc Machine LICM: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_ ********
# *** IR Dump After Early Machine Loop Invariant Code Motion ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.2(0x2aaaaaab), %bb.4(0x55555555); %bb.2(33.33%), %bb.4(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY $r22
%0:ld8 = COPY $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.4
bb.4.entry:
; predecessors: %bb.0
successors: %bb.1(0x40000001), %bb.3(0x3fffffff); %bb.1(50.00%), %bb.3(50.00%)
CPIRdK %0:ld8, 6, implicit-def $sreg
BRNEk %bb.3, implicit $sreg
RJMPk %bb.1
bb.1 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x40000000), %bb.5(0x40000000); %bb.6(200.00%), %bb.5(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
BRLOk %bb.5, implicit $sreg
RJMPk %bb.6
bb.5 (%ir-block.2):
; predecessors: %bb.1, %bb.6
successors: %bb.8(0x40000000), %bb.7(0x40000000); %bb.8(200.00%), %bb.7(200.00%)
%8:gpr8 = PHI %7:ld8, %bb.1, %1:ld8, %bb.6
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
RJMPk %bb.8
bb.7 (%ir-block.2):
; predecessors: %bb.5, %bb.8
successors: %bb.3(0x80000000); %bb.3(100.00%)
%10:gpr8 = PHI %9:ld8, %bb.5, %8:gpr8, %bb.8
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.3
bb.8 (%ir-block.2):
; predecessors: %bb.5
successors: %bb.7(0x80000000); %bb.7(200.00%)
RJMPk %bb.7
bb.6 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.5(0x80000000); %bb.5(200.00%)
RJMPk %bb.5
bb.2 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.10(0x40000000), %bb.9(0x40000000); %bb.10(200.00%), %bb.9(200.00%)
%2:ld8 = LDIRdK 0
%3:ld8 = LDIRdK 1
CPIRdK %1:ld8, 0, implicit-def $sreg
BRNEk %bb.9, implicit $sreg
RJMPk %bb.10
bb.9 (%ir-block.8):
; predecessors: %bb.2, %bb.10
successors: %bb.3(0x80000000); %bb.3(100.00%)
%4:ld8 = PHI %3:ld8, %bb.2, %2:ld8, %bb.10
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.10 (%ir-block.8):
; predecessors: %bb.2
successors: %bb.9(0x80000000); %bb.9(200.00%)
RJMPk %bb.9
bb.3 (%ir-block.9):
; predecessors: %bb.4, %bb.7, %bb.9
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
Entering: entry
Entering: entry
Entering:
Entering:
Entering:
Exiting:
Entering:
Exiting:
Exiting:
Entering:
Exiting:
Exiting:
Exiting: entry
Entering:
Exiting:
Entering:
Entering:
Exiting:
Entering:
Exiting:
Exiting:
Exiting: entry
# *** IR Dump After Machine Common Subexpression Elimination ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.2(0x2aaaaaab), %bb.4(0x55555555); %bb.2(33.33%), %bb.4(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY $r22
%0:ld8 = COPY $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.4
bb.4.entry:
; predecessors: %bb.0
successors: %bb.1(0x40000001), %bb.3(0x3fffffff); %bb.1(50.00%), %bb.3(50.00%)
CPIRdK %0:ld8, 6, implicit-def $sreg
BRNEk %bb.3, implicit $sreg
RJMPk %bb.1
bb.1 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x40000000), %bb.5(0x40000000); %bb.6(200.00%), %bb.5(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
BRLOk %bb.5, implicit $sreg
RJMPk %bb.6
bb.5 (%ir-block.2):
; predecessors: %bb.1, %bb.6
successors: %bb.8(0x40000000), %bb.7(0x40000000); %bb.8(200.00%), %bb.7(200.00%)
%8:gpr8 = PHI %7:ld8, %bb.1, %1:ld8, %bb.6
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
RJMPk %bb.8
bb.7 (%ir-block.2):
; predecessors: %bb.5, %bb.8
successors: %bb.3(0x80000000); %bb.3(100.00%)
%10:gpr8 = PHI %9:ld8, %bb.5, %8:gpr8, %bb.8
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.3
bb.8 (%ir-block.2):
; predecessors: %bb.5
successors: %bb.7(0x80000000); %bb.7(200.00%)
RJMPk %bb.7
bb.6 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.5(0x80000000); %bb.5(200.00%)
RJMPk %bb.5
bb.2 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.10(0x40000000), %bb.9(0x40000000); %bb.10(200.00%), %bb.9(200.00%)
%2:ld8 = LDIRdK 0
%3:ld8 = LDIRdK 1
CPIRdK %1:ld8, 0, implicit-def $sreg
BRNEk %bb.9, implicit $sreg
RJMPk %bb.10
bb.9 (%ir-block.8):
; predecessors: %bb.2, %bb.10
successors: %bb.3(0x80000000); %bb.3(100.00%)
%4:ld8 = PHI %3:ld8, %bb.2, %2:ld8, %bb.10
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.10 (%ir-block.8):
; predecessors: %bb.2
successors: %bb.9(0x80000000); %bb.9(200.00%)
RJMPk %bb.9
bb.3 (%ir-block.9):
; predecessors: %bb.4, %bb.7, %bb.9
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
Looking for trivial roots
Found a new trivial root: %bb.3
Last visited node: %bb.4
Looking for non-trivial roots
Total: 11, Num: 12
Discovered CFG nodes:
0: nullptr
1: nullptr
2: %bb.3
3: %bb.9
4: %bb.10
5: %bb.2
6: %bb.0
7: %bb.7
8: %bb.8
9: %bb.5
10: %bb.6
11: %bb.1
12: %bb.4
Found roots: %bb.3
discovered a new reachable node nullptr
discovered a new reachable node %bb.3
discovered a new reachable node %bb.9
discovered a new reachable node %bb.10
discovered a new reachable node %bb.2
discovered a new reachable node %bb.0
discovered a new reachable node %bb.7
discovered a new reachable node %bb.8
discovered a new reachable node %bb.5
discovered a new reachable node %bb.6
discovered a new reachable node %bb.1
discovered a new reachable node %bb.4
block-frequency: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
==================================================================
reverse-post-order-traversal
- 0: BB0[entry]
- 1: BB4[entry]
- 2: BB1[]
- 3: BB6[]
- 4: BB5[]
- 5: BB8[]
- 6: BB7[]
- 7: BB2[]
- 8: BB10[]
- 9: BB9[]
- 10: BB3[]
loop-detection
compute-mass-in-function
- node: BB0[entry]
=> [ local ] weight = 715827883, succ = BB2[]
=> [ local ] weight = 1431655765, succ = BB4[entry]
=> mass: ffffffffffffffff
=> assign aaaaaaa9ffffffff (5555555600000000) to BB4[entry]
=> assign 5555555600000000 (0000000000000000) to BB2[]
- node: BB4[entry]
=> [ local ] weight = 1073741825, succ = BB1[]
=> [ local ] weight = 1073741823, succ = BB3[]
=> mass: aaaaaaa9ffffffff
=> assign 5555555655555553 (55555553aaaaaaac) to BB1[]
=> assign 55555553aaaaaaac (0000000000000000) to BB3[]
- node: BB1[]
=> [ local ] weight = 1073741824, succ = BB6[]
=> [ local ] weight = 1073741824, succ = BB5[]
=> mass: 5555555655555553
=> assign 2aaaaaab2aaaaaa9 (2aaaaaab2aaaaaaa) to BB6[]
=> assign 2aaaaaab2aaaaaaa (0000000000000000) to BB5[]
- node: BB6[]
=> [ local ] weight = 2147483648, succ = BB5[]
=> mass: 2aaaaaab2aaaaaa9
=> assign 2aaaaaab2aaaaaa9 (0000000000000000) to BB5[]
- node: BB5[]
=> [ local ] weight = 1073741824, succ = BB8[]
=> [ local ] weight = 1073741824, succ = BB7[]
=> mass: 5555555655555553
=> assign 2aaaaaab2aaaaaa9 (2aaaaaab2aaaaaaa) to BB8[]
=> assign 2aaaaaab2aaaaaaa (0000000000000000) to BB7[]
- node: BB8[]
=> [ local ] weight = 2147483648, succ = BB7[]
=> mass: 2aaaaaab2aaaaaa9
=> assign 2aaaaaab2aaaaaa9 (0000000000000000) to BB7[]
- node: BB7[]
=> [ local ] weight = 2147483648, succ = BB3[]
=> mass: 5555555655555553
=> assign 5555555655555553 (0000000000000000) to BB3[]
- node: BB2[]
=> [ local ] weight = 1073741824, succ = BB10[]
=> [ local ] weight = 1073741824, succ = BB9[]
=> mass: 5555555600000000
=> assign 2aaaaaab00000000 (2aaaaaab00000000) to BB10[]
=> assign 2aaaaaab00000000 (0000000000000000) to BB9[]
- node: BB10[]
=> [ local ] weight = 2147483648, succ = BB9[]
=> mass: 2aaaaaab00000000
=> assign 2aaaaaab00000000 (0000000000000000) to BB9[]
- node: BB9[]
=> [ local ] weight = 2147483648, succ = BB3[]
=> mass: 5555555600000000
=> assign 5555555600000000 (0000000000000000) to BB3[]
- node: BB3[]
=> mass: ffffffffffffffff
float-to-int: min = 0.1666666667, max = 1.0, factor = 47.99999998
- BB0[entry]: float = 1.0, scaled = 47.99999998, int = 47
- BB4[entry]: float = 0.6666666665, scaled = 31.99999998, int = 31
- BB1[]: float = 0.3333333336, scaled = 16.0, int = 16
- BB6[]: float = 0.1666666668, scaled = 8.000000002, int = 8
- BB5[]: float = 0.3333333336, scaled = 16.0, int = 16
- BB8[]: float = 0.1666666668, scaled = 8.000000002, int = 8
- BB7[]: float = 0.3333333336, scaled = 16.0, int = 16
- BB2[]: float = 0.3333333335, scaled = 16.0, int = 15
- BB10[]: float = 0.1666666667, scaled = 8.0, int = 8
- BB9[]: float = 0.3333333335, scaled = 16.0, int = 15
- BB3[]: float = 1.0, scaled = 47.99999998, int = 47
block-frequency-info: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
- BB0[entry]: float = 1.0, int = 47
- BB4[entry]: float = 0.66667, int = 31
- BB1[]: float = 0.33333, int = 16
- BB5[]: float = 0.33333, int = 16
- BB7[]: float = 0.33333, int = 16
- BB8[]: float = 0.16667, int = 8
- BB6[]: float = 0.16667, int = 8
- BB2[]: float = 0.33333, int = 15
- BB9[]: float = 0.33333, int = 15
- BB10[]: float = 0.16667, int = 8
- BB3[]: float = 1.0, int = 47
******** Machine Sinking ********
Sink instr %7:ld8 = LDIRdK 5
into block bb.5 (%ir-block.2):
; predecessors: %bb.1, %bb.6
successors: %bb.8(0x40000000), %bb.7(0x40000000); %bb.8(200.00%), %bb.7(200.00%)
%8:gpr8 = PHI %7:ld8, %bb.1, %1:ld8, %bb.6
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
RJMPk %bb.8
Sinking along critical edge.
*** PUNTING: Not legal or profitable to break critical edge
Sink instr %9:ld8 = LDIRdK 90
into block bb.7 (%ir-block.2):
; predecessors: %bb.5, %bb.8
successors: %bb.3(0x80000000); %bb.3(100.00%)
%10:gpr8 = PHI %9:ld8, %bb.5, %8:gpr8, %bb.8
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.3
Sinking along critical edge.
*** PUNTING: Not legal or profitable to break critical edge
Sink instr %3:ld8 = LDIRdK 1
into block bb.9 (%ir-block.8):
; predecessors: %bb.2, %bb.10
successors: %bb.3(0x80000000); %bb.3(100.00%)
%4:ld8 = PHI %3:ld8, %bb.2, %2:ld8, %bb.10
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
Sinking along critical edge.
*** PUNTING: Not legal or profitable to break critical edge
Sink instr %2:ld8 = LDIRdK 0
into block bb.10 (%ir-block.8):
; predecessors: %bb.2
successors: %bb.9(0x80000000); %bb.9(200.00%)
RJMPk %bb.9
Sink instr %7:ld8 = LDIRdK 5
into block bb.5 (%ir-block.2):
; predecessors: %bb.1, %bb.6
successors: %bb.8(0x40000000), %bb.7(0x40000000); %bb.8(200.00%), %bb.7(200.00%)
%8:gpr8 = PHI %7:ld8, %bb.1, %1:ld8, %bb.6
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
RJMPk %bb.8
Sinking along critical edge.
*** PUNTING: Not legal or profitable to break critical edge
Sink instr %9:ld8 = LDIRdK 90
into block bb.7 (%ir-block.2):
; predecessors: %bb.5, %bb.8
successors: %bb.3(0x80000000); %bb.3(100.00%)
%10:gpr8 = PHI %9:ld8, %bb.5, %8:gpr8, %bb.8
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.3
Sinking along critical edge.
*** PUNTING: Not legal or profitable to break critical edge
Sink instr %3:ld8 = LDIRdK 1
into block bb.9 (%ir-block.8):
; predecessors: %bb.2, %bb.10
successors: %bb.3(0x80000000); %bb.3(100.00%)
%4:ld8 = PHI %3:ld8, %bb.2, %2:ld8, %bb.10
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
Sinking along critical edge.
*** PUNTING: Not legal or profitable to break critical edge
# *** IR Dump After Machine code sinking ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.2(0x2aaaaaab), %bb.4(0x55555555); %bb.2(33.33%), %bb.4(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY $r22
%0:ld8 = COPY $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.4
bb.4.entry:
; predecessors: %bb.0
successors: %bb.1(0x40000001), %bb.3(0x3fffffff); %bb.1(50.00%), %bb.3(50.00%)
CPIRdK %0:ld8, 6, implicit-def $sreg
BRNEk %bb.3, implicit $sreg
RJMPk %bb.1
bb.1 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x40000000), %bb.5(0x40000000); %bb.6(200.00%), %bb.5(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
BRLOk %bb.5, implicit $sreg
RJMPk %bb.6
bb.5 (%ir-block.2):
; predecessors: %bb.1, %bb.6
successors: %bb.8(0x40000000), %bb.7(0x40000000); %bb.8(200.00%), %bb.7(200.00%)
%8:gpr8 = PHI %7:ld8, %bb.1, %1:ld8, %bb.6
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
RJMPk %bb.8
bb.7 (%ir-block.2):
; predecessors: %bb.5, %bb.8
successors: %bb.3(0x80000000); %bb.3(100.00%)
%10:gpr8 = PHI %9:ld8, %bb.5, %8:gpr8, %bb.8
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.3
bb.8 (%ir-block.2):
; predecessors: %bb.5
successors: %bb.7(0x80000000); %bb.7(200.00%)
RJMPk %bb.7
bb.6 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.5(0x80000000); %bb.5(200.00%)
RJMPk %bb.5
bb.2 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.10(0x40000000), %bb.9(0x40000000); %bb.10(200.00%), %bb.9(200.00%)
%3:ld8 = LDIRdK 1
CPIRdK %1:ld8, 0, implicit-def $sreg
BRNEk %bb.9, implicit $sreg
RJMPk %bb.10
bb.9 (%ir-block.8):
; predecessors: %bb.2, %bb.10
successors: %bb.3(0x80000000); %bb.3(100.00%)
%4:ld8 = PHI %3:ld8, %bb.2, %2:ld8, %bb.10
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.10 (%ir-block.8):
; predecessors: %bb.2
successors: %bb.9(0x80000000); %bb.9(200.00%)
%2:ld8 = LDIRdK 0
RJMPk %bb.9
bb.3 (%ir-block.9):
; predecessors: %bb.4, %bb.7, %bb.9
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
********** PEEPHOLE OPTIMIZER **********
********** Function: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
Encountered load fold barrier on STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
Encountered load fold barrier on CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
Encountered load fold barrier on STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
Encountered load fold barrier on STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
Encountered load fold barrier on CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
Encountered load fold barrier on STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
Encountered load fold barrier on CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
# *** IR Dump After Peephole Optimizations ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.2(0x2aaaaaab), %bb.4(0x55555555); %bb.2(33.33%), %bb.4(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY $r22
%0:ld8 = COPY $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.4
bb.4.entry:
; predecessors: %bb.0
successors: %bb.1(0x40000001), %bb.3(0x3fffffff); %bb.1(50.00%), %bb.3(50.00%)
CPIRdK %0:ld8, 6, implicit-def $sreg
BRNEk %bb.3, implicit $sreg
RJMPk %bb.1
bb.1 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x40000000), %bb.5(0x40000000); %bb.6(200.00%), %bb.5(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
BRLOk %bb.5, implicit $sreg
RJMPk %bb.6
bb.5 (%ir-block.2):
; predecessors: %bb.1, %bb.6
successors: %bb.8(0x40000000), %bb.7(0x40000000); %bb.8(200.00%), %bb.7(200.00%)
%8:gpr8 = PHI %7:ld8, %bb.1, %1:ld8, %bb.6
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
RJMPk %bb.8
bb.7 (%ir-block.2):
; predecessors: %bb.5, %bb.8
successors: %bb.3(0x80000000); %bb.3(100.00%)
%10:gpr8 = PHI %9:ld8, %bb.5, %8:gpr8, %bb.8
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.3
bb.8 (%ir-block.2):
; predecessors: %bb.5
successors: %bb.7(0x80000000); %bb.7(200.00%)
RJMPk %bb.7
bb.6 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.5(0x80000000); %bb.5(200.00%)
RJMPk %bb.5
bb.2 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.10(0x40000000), %bb.9(0x40000000); %bb.10(200.00%), %bb.9(200.00%)
%3:ld8 = LDIRdK 1
CPIRdK %1:ld8, 0, implicit-def $sreg
BRNEk %bb.9, implicit $sreg
RJMPk %bb.10
bb.9 (%ir-block.8):
; predecessors: %bb.2, %bb.10
successors: %bb.3(0x80000000); %bb.3(100.00%)
%4:ld8 = PHI %3:ld8, %bb.2, %2:ld8, %bb.10
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.10 (%ir-block.8):
; predecessors: %bb.2
successors: %bb.9(0x80000000); %bb.9(200.00%)
%2:ld8 = LDIRdK 0
RJMPk %bb.9
bb.3 (%ir-block.9):
; predecessors: %bb.4, %bb.7, %bb.9
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Remove dead machine instructions ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.2(0x2aaaaaab), %bb.4(0x55555555); %bb.2(33.33%), %bb.4(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY $r22
%0:ld8 = COPY $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.4
bb.4.entry:
; predecessors: %bb.0
successors: %bb.1(0x40000001), %bb.3(0x3fffffff); %bb.1(50.00%), %bb.3(50.00%)
CPIRdK %0:ld8, 6, implicit-def $sreg
BRNEk %bb.3, implicit $sreg
RJMPk %bb.1
bb.1 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x40000000), %bb.5(0x40000000); %bb.6(200.00%), %bb.5(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
BRLOk %bb.5, implicit $sreg
RJMPk %bb.6
bb.5 (%ir-block.2):
; predecessors: %bb.1, %bb.6
successors: %bb.8(0x40000000), %bb.7(0x40000000); %bb.8(200.00%), %bb.7(200.00%)
%8:gpr8 = PHI %7:ld8, %bb.1, %1:ld8, %bb.6
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
RJMPk %bb.8
bb.7 (%ir-block.2):
; predecessors: %bb.5, %bb.8
successors: %bb.3(0x80000000); %bb.3(100.00%)
%10:gpr8 = PHI %9:ld8, %bb.5, %8:gpr8, %bb.8
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.3
bb.8 (%ir-block.2):
; predecessors: %bb.5
successors: %bb.7(0x80000000); %bb.7(200.00%)
RJMPk %bb.7
bb.6 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.5(0x80000000); %bb.5(200.00%)
RJMPk %bb.5
bb.2 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.10(0x40000000), %bb.9(0x40000000); %bb.10(200.00%), %bb.9(200.00%)
%3:ld8 = LDIRdK 1
CPIRdK %1:ld8, 0, implicit-def $sreg
BRNEk %bb.9, implicit $sreg
RJMPk %bb.10
bb.9 (%ir-block.8):
; predecessors: %bb.2, %bb.10
successors: %bb.3(0x80000000); %bb.3(100.00%)
%4:ld8 = PHI %3:ld8, %bb.2, %2:ld8, %bb.10
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.10 (%ir-block.8):
; predecessors: %bb.2
successors: %bb.9(0x80000000); %bb.9(200.00%)
%2:ld8 = LDIRdK 0
RJMPk %bb.9
bb.3 (%ir-block.9):
; predecessors: %bb.4, %bb.7, %bb.9
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
Skipping Detect dead lanes pass
# *** IR Dump After Detect Dead Lanes ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.2(0x2aaaaaab), %bb.4(0x55555555); %bb.2(33.33%), %bb.4(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY $r22
%0:ld8 = COPY $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.4
bb.4.entry:
; predecessors: %bb.0
successors: %bb.1(0x40000001), %bb.3(0x3fffffff); %bb.1(50.00%), %bb.3(50.00%)
CPIRdK %0:ld8, 6, implicit-def $sreg
BRNEk %bb.3, implicit $sreg
RJMPk %bb.1
bb.1 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x40000000), %bb.5(0x40000000); %bb.6(200.00%), %bb.5(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
BRLOk %bb.5, implicit $sreg
RJMPk %bb.6
bb.5 (%ir-block.2):
; predecessors: %bb.1, %bb.6
successors: %bb.8(0x40000000), %bb.7(0x40000000); %bb.8(200.00%), %bb.7(200.00%)
%8:gpr8 = PHI %7:ld8, %bb.1, %1:ld8, %bb.6
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
RJMPk %bb.8
bb.7 (%ir-block.2):
; predecessors: %bb.5, %bb.8
successors: %bb.3(0x80000000); %bb.3(100.00%)
%10:gpr8 = PHI %9:ld8, %bb.5, %8:gpr8, %bb.8
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.3
bb.8 (%ir-block.2):
; predecessors: %bb.5
successors: %bb.7(0x80000000); %bb.7(200.00%)
RJMPk %bb.7
bb.6 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.5(0x80000000); %bb.5(200.00%)
RJMPk %bb.5
bb.2 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.10(0x40000000), %bb.9(0x40000000); %bb.10(200.00%), %bb.9(200.00%)
%3:ld8 = LDIRdK 1
CPIRdK %1:ld8, 0, implicit-def $sreg
BRNEk %bb.9, implicit $sreg
RJMPk %bb.10
bb.9 (%ir-block.8):
; predecessors: %bb.2, %bb.10
successors: %bb.3(0x80000000); %bb.3(100.00%)
%4:ld8 = PHI %3:ld8, %bb.2, %2:ld8, %bb.10
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.10 (%ir-block.8):
; predecessors: %bb.2
successors: %bb.9(0x80000000); %bb.9(200.00%)
%2:ld8 = LDIRdK 0
RJMPk %bb.9
bb.3 (%ir-block.9):
; predecessors: %bb.4, %bb.7, %bb.9
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
********** PROCESS IMPLICIT DEFS **********
********** Function: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
# *** IR Dump After Process Implicit Definitions ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.2(0x2aaaaaab), %bb.4(0x55555555); %bb.2(33.33%), %bb.4(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY $r22
%0:ld8 = COPY $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.4
bb.4.entry:
; predecessors: %bb.0
successors: %bb.1(0x40000001), %bb.3(0x3fffffff); %bb.1(50.00%), %bb.3(50.00%)
CPIRdK %0:ld8, 6, implicit-def $sreg
BRNEk %bb.3, implicit $sreg
RJMPk %bb.1
bb.1 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x40000000), %bb.5(0x40000000); %bb.6(200.00%), %bb.5(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
BRLOk %bb.5, implicit $sreg
RJMPk %bb.6
bb.5 (%ir-block.2):
; predecessors: %bb.1, %bb.6
successors: %bb.8(0x40000000), %bb.7(0x40000000); %bb.8(200.00%), %bb.7(200.00%)
%8:gpr8 = PHI %7:ld8, %bb.1, %1:ld8, %bb.6
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
RJMPk %bb.8
bb.7 (%ir-block.2):
; predecessors: %bb.5, %bb.8
successors: %bb.3(0x80000000); %bb.3(100.00%)
%10:gpr8 = PHI %9:ld8, %bb.5, %8:gpr8, %bb.8
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.3
bb.8 (%ir-block.2):
; predecessors: %bb.5
successors: %bb.7(0x80000000); %bb.7(200.00%)
RJMPk %bb.7
bb.6 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.5(0x80000000); %bb.5(200.00%)
RJMPk %bb.5
bb.2 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.10(0x40000000), %bb.9(0x40000000); %bb.10(200.00%), %bb.9(200.00%)
%3:ld8 = LDIRdK 1
CPIRdK %1:ld8, 0, implicit-def $sreg
BRNEk %bb.9, implicit $sreg
RJMPk %bb.10
bb.9 (%ir-block.8):
; predecessors: %bb.2, %bb.10
successors: %bb.3(0x80000000); %bb.3(100.00%)
%4:ld8 = PHI %3:ld8, %bb.2, %2:ld8, %bb.10
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.10 (%ir-block.8):
; predecessors: %bb.2
successors: %bb.9(0x80000000); %bb.9(200.00%)
%2:ld8 = LDIRdK 0
RJMPk %bb.9
bb.3 (%ir-block.9):
; predecessors: %bb.4, %bb.7, %bb.9
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Remove unreachable machine basic blocks ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY $r22
%0:ld8 = COPY $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.7, implicit $sreg
RJMPk %bb.1
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
CPIRdK %0:ld8, 6, implicit-def $sreg
BRNEk %bb.10, implicit $sreg
RJMPk %bb.2
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
BRLOk %bb.3, implicit $sreg
RJMPk %bb.6
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
%8:gpr8 = PHI %7:ld8, %bb.2, %1:ld8, %bb.6
%9:ld8 = LDIRdK 90
CPIRdK %1:ld8, 91, implicit-def $sreg
BRSHk %bb.4, implicit $sreg
RJMPk %bb.5
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
%10:gpr8 = PHI %9:ld8, %bb.3, %8:gpr8, %bb.5
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY %12:dldregs
$r21r20 = COPY %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY $r23r22
%15:dregs = COPY $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY %16:dldregs
$r22 = COPY %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.10
bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
RJMPk %bb.4
bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
RJMPk %bb.3
bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
%3:ld8 = LDIRdK 1
CPIRdK %1:ld8, 0, implicit-def $sreg
BRNEk %bb.8, implicit $sreg
RJMPk %bb.9
bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
%4:ld8 = PHI %3:ld8, %bb.7, %2:ld8, %bb.9
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY %6:dldregs
$r22 = COPY %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
%2:ld8 = LDIRdK 0
RJMPk %bb.8
bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Live Variable Analysis ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: IsSSA, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY killed $r22
%0:ld8 = COPY killed $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.7, implicit killed $sreg
RJMPk %bb.1
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
CPIRdK killed %0:ld8, 6, implicit-def $sreg
BRNEk %bb.10, implicit killed $sreg
RJMPk %bb.2
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
BRLOk %bb.3, implicit killed $sreg
RJMPk %bb.6
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
%8:gpr8 = PHI %7:ld8, %bb.2, %1:ld8, %bb.6
%9:ld8 = LDIRdK 90
CPIRdK killed %1:ld8, 91, implicit-def $sreg
BRSHk %bb.4, implicit killed $sreg
RJMPk %bb.5
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
%10:gpr8 = PHI %9:ld8, %bb.3, %8:gpr8, %bb.5
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY killed %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY killed %12:dldregs
$r21r20 = COPY killed %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit killed $r23r22, implicit killed $r25r24, implicit killed $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY killed $r23r22
%15:dregs = COPY killed $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, killed %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY killed %16:dldregs
$r22 = COPY killed %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit killed $r25r24, implicit killed $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.10
bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
RJMPk %bb.4
bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
RJMPk %bb.3
bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
%3:ld8 = LDIRdK 1
CPIRdK killed %1:ld8, 0, implicit-def $sreg
BRNEk %bb.8, implicit killed $sreg
RJMPk %bb.9
bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
%4:ld8 = PHI %3:ld8, %bb.7, %2:ld8, %bb.9
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY killed %6:dldregs
$r22 = COPY killed %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit killed $r25r24, implicit killed $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
%2:ld8 = LDIRdK 0
RJMPk %bb.8
bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
discovered a new reachable node %bb.0
discovered a new reachable node %bb.7
discovered a new reachable node %bb.9
discovered a new reachable node %bb.8
discovered a new reachable node %bb.10
discovered a new reachable node %bb.1
discovered a new reachable node %bb.2
discovered a new reachable node %bb.6
discovered a new reachable node %bb.3
discovered a new reachable node %bb.5
discovered a new reachable node %bb.4
# *** IR Dump After Eliminate PHI nodes for register allocation ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY killed $r22
%0:ld8 = COPY killed $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.7, implicit killed $sreg
RJMPk %bb.1
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
CPIRdK killed %0:ld8, 6, implicit-def $sreg
BRNEk %bb.10, implicit killed $sreg
RJMPk %bb.2
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
%17:gpr8 = COPY killed %7:ld8
BRLOk %bb.3, implicit killed $sreg
RJMPk %bb.6
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
%8:gpr8 = COPY killed %17:gpr8
%9:ld8 = LDIRdK 90
CPIRdK killed %1:ld8, 91, implicit-def $sreg
%18:gpr8 = COPY killed %9:ld8
BRSHk %bb.4, implicit killed $sreg
RJMPk %bb.5
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
%10:gpr8 = COPY killed %18:gpr8
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY killed %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY killed %12:dldregs
$r21r20 = COPY killed %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit killed $r23r22, implicit killed $r25r24, implicit killed $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY killed $r23r22
%15:dregs = COPY killed $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, killed %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY killed %16:dldregs
$r22 = COPY killed %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit killed $r25r24, implicit killed $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.10
bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
%18:gpr8 = COPY killed %8:gpr8
RJMPk %bb.4
bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
%17:gpr8 = COPY %1:ld8
RJMPk %bb.3
bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
%3:ld8 = LDIRdK 1
CPIRdK killed %1:ld8, 0, implicit-def $sreg
%19:ld8 = COPY killed %3:ld8
BRNEk %bb.8, implicit killed $sreg
RJMPk %bb.9
bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
%4:ld8 = COPY killed %19:ld8
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY killed %6:dldregs
$r22 = COPY killed %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit killed $r25r24, implicit killed $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
%2:ld8 = LDIRdK 0
%19:ld8 = COPY killed %2:ld8
RJMPk %bb.8
bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
********** REWRITING TWO-ADDR INSTRS **********
********** Function: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
%5:ld8 = ANDIRdK %4:ld8, 1, implicit-def dead $sreg
prepend: %5:ld8 = COPY %4:ld8
rewrite to: %5:ld8 = ANDIRdK %5:ld8, 1, implicit-def dead $sreg
# *** IR Dump After Two-Address instruction pass ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
%1:ld8 = COPY killed $r22
%0:ld8 = COPY killed $r24
CPIRdK %0:ld8, 7, implicit-def $sreg
BREQk %bb.7, implicit killed $sreg
RJMPk %bb.1
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
CPIRdK killed %0:ld8, 6, implicit-def $sreg
BRNEk %bb.10, implicit killed $sreg
RJMPk %bb.2
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
%7:ld8 = LDIRdK 5
CPIRdK %1:ld8, 5, implicit-def $sreg
%17:gpr8 = COPY killed %7:ld8
BRLOk %bb.3, implicit killed $sreg
RJMPk %bb.6
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
%8:gpr8 = COPY killed %17:gpr8
%9:ld8 = LDIRdK 90
CPIRdK killed %1:ld8, 91, implicit-def $sreg
%18:gpr8 = COPY killed %9:ld8
BRSHk %bb.4, implicit killed $sreg
RJMPk %bb.5
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
%10:gpr8 = COPY killed %18:gpr8
STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
%11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%12:dldregs = LDIWRdK 100
%13:dldregs = LDIWRdK 0
$r23r22 = COPY killed %11:dregs
$r25r24 = COPY %13:dldregs
$r19r18 = COPY killed %12:dldregs
$r21r20 = COPY killed %13:dldregs
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit killed $r23r22, implicit killed $r25r24, implicit killed $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%14:dregs = COPY killed $r23r22
%15:dregs = COPY killed $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, killed %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%16:dldregs = LDIWRdK 34
$r25r24 = COPY killed %16:dldregs
$r22 = COPY killed %10:gpr8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit killed $r25r24, implicit killed $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.10
bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
%18:gpr8 = COPY killed %8:gpr8
RJMPk %bb.4
bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
%17:gpr8 = COPY %1:ld8
RJMPk %bb.3
bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
%3:ld8 = LDIRdK 1
CPIRdK killed %1:ld8, 0, implicit-def $sreg
%19:ld8 = COPY killed %3:ld8
BRNEk %bb.8, implicit killed $sreg
RJMPk %bb.9
bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
%4:ld8 = COPY killed %19:ld8
%5:ld8 = COPY %4:ld8
%5:ld8 = ANDIRdK %5:ld8, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
%6:dldregs = LDIWRdK 35
$r25r24 = COPY killed %6:dldregs
$r22 = COPY killed %4:ld8
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit killed $r25r24, implicit killed $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
%2:ld8 = LDIRdK 0
%19:ld8 = COPY killed %2:ld8
RJMPk %bb.8
bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
0B bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
16B %1:ld8 = COPY killed $r22
32B %0:ld8 = COPY killed $r24
48B CPIRdK %0:ld8, 7, implicit-def $sreg
64B BREQk %bb.7, implicit killed $sreg
80B RJMPk %bb.1
96B bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
112B CPIRdK killed %0:ld8, 6, implicit-def $sreg
128B BRNEk %bb.10, implicit killed $sreg
144B RJMPk %bb.2
160B bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
176B %7:ld8 = LDIRdK 5
192B CPIRdK %1:ld8, 5, implicit-def $sreg
208B %17:gpr8 = COPY killed %7:ld8
224B BRLOk %bb.3, implicit killed $sreg
240B RJMPk %bb.6
256B bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
272B %8:gpr8 = COPY killed %17:gpr8
288B %9:ld8 = LDIRdK 90
304B CPIRdK killed %1:ld8, 91, implicit-def $sreg
320B %18:gpr8 = COPY killed %9:ld8
336B BRSHk %bb.4, implicit killed $sreg
352B RJMPk %bb.5
368B bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
384B %10:gpr8 = COPY killed %18:gpr8
400B STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
416B %11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
432B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
448B %12:dldregs = LDIWRdK 100
464B %13:dldregs = LDIWRdK 0
480B $r23r22 = COPY killed %11:dregs
496B $r25r24 = COPY %13:dldregs
512B $r19r18 = COPY killed %12:dldregs
528B $r21r20 = COPY killed %13:dldregs
544B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit killed $r23r22, implicit killed $r25r24, implicit killed $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
560B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
576B %14:dregs = COPY killed $r23r22
592B %15:dregs = COPY killed $r25r24
608B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
624B STSWKRr @_Tv4main7delayUsVs6UInt32, killed %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
640B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
656B %16:dldregs = LDIWRdK 34
672B $r25r24 = COPY killed %16:dldregs
688B $r22 = COPY killed %10:gpr8
704B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit killed $r25r24, implicit killed $r22, implicit-def $sp
720B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
736B RJMPk %bb.10
752B bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
768B %18:gpr8 = COPY killed %8:gpr8
784B RJMPk %bb.4
800B bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
816B %17:gpr8 = COPY %1:ld8
832B RJMPk %bb.3
848B bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
864B %3:ld8 = LDIRdK 1
880B CPIRdK killed %1:ld8, 0, implicit-def $sreg
896B %19:ld8 = COPY killed %3:ld8
912B BRNEk %bb.8, implicit killed $sreg
928B RJMPk %bb.9
944B bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
960B %4:ld8 = COPY killed %19:ld8
976B %5:ld8 = COPY %4:ld8
992B %5:ld8 = ANDIRdK %5:ld8, 1, implicit-def dead $sreg
1008B STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
1024B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B %6:dldregs = LDIWRdK 35
1056B $r25r24 = COPY killed %6:dldregs
1072B $r22 = COPY killed %4:ld8
1088B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit killed $r25r24, implicit killed $r22, implicit-def $sp
1104B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1120B bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
1136B %2:ld8 = LDIRdK 0
1152B %19:ld8 = COPY killed %2:ld8
1168B RJMPk %bb.8
1184B bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
1200B RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Slot index numbering ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
0B bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
16B %1:ld8 = COPY killed $r22
32B %0:ld8 = COPY killed $r24
48B CPIRdK %0:ld8, 7, implicit-def $sreg
64B BREQk %bb.7, implicit killed $sreg
80B RJMPk %bb.1
96B bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
112B CPIRdK killed %0:ld8, 6, implicit-def $sreg
128B BRNEk %bb.10, implicit killed $sreg
144B RJMPk %bb.2
160B bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
176B %7:ld8 = LDIRdK 5
192B CPIRdK %1:ld8, 5, implicit-def $sreg
208B %17:gpr8 = COPY killed %7:ld8
224B BRLOk %bb.3, implicit killed $sreg
240B RJMPk %bb.6
256B bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
272B %8:gpr8 = COPY killed %17:gpr8
288B %9:ld8 = LDIRdK 90
304B CPIRdK killed %1:ld8, 91, implicit-def $sreg
320B %18:gpr8 = COPY killed %9:ld8
336B BRSHk %bb.4, implicit killed $sreg
352B RJMPk %bb.5
368B bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
384B %10:gpr8 = COPY killed %18:gpr8
400B STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
416B %11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
432B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
448B %12:dldregs = LDIWRdK 100
464B %13:dldregs = LDIWRdK 0
480B $r23r22 = COPY killed %11:dregs
496B $r25r24 = COPY %13:dldregs
512B $r19r18 = COPY killed %12:dldregs
528B $r21r20 = COPY killed %13:dldregs
544B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit killed $r23r22, implicit killed $r25r24, implicit killed $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
560B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
576B %14:dregs = COPY killed $r23r22
592B %15:dregs = COPY killed $r25r24
608B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
624B STSWKRr @_Tv4main7delayUsVs6UInt32, killed %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
640B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
656B %16:dldregs = LDIWRdK 34
672B $r25r24 = COPY killed %16:dldregs
688B $r22 = COPY killed %10:gpr8
704B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit killed $r25r24, implicit killed $r22, implicit-def $sp
720B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
736B RJMPk %bb.10
752B bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
768B %18:gpr8 = COPY killed %8:gpr8
784B RJMPk %bb.4
800B bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
816B %17:gpr8 = COPY %1:ld8
832B RJMPk %bb.3
848B bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
864B %3:ld8 = LDIRdK 1
880B CPIRdK killed %1:ld8, 0, implicit-def $sreg
896B %19:ld8 = COPY killed %3:ld8
912B BRNEk %bb.8, implicit killed $sreg
928B RJMPk %bb.9
944B bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
960B %4:ld8 = COPY killed %19:ld8
976B %5:ld8 = COPY %4:ld8
992B %5:ld8 = ANDIRdK %5:ld8, 1, implicit-def dead $sreg
1008B STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
1024B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B %6:dldregs = LDIWRdK 35
1056B $r25r24 = COPY killed %6:dldregs
1072B $r22 = COPY killed %4:ld8
1088B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit killed $r25r24, implicit killed $r22, implicit-def $sp
1104B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1120B bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
1136B %2:ld8 = LDIRdK 0
1152B %19:ld8 = COPY killed %2:ld8
1168B RJMPk %bb.8
1184B bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
1200B RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
Computing live-in reg-units in ABI blocks.
0B %bb.0 R24#0 R22#0
Created 2 new intervals.
********** INTERVALS **********
R22 [0B,16r:0)[480r,544r:4)[544r,576r:3)[688r,704r:1)[1072r,1088r:2) 0@0B-phi 1@688r 2@1072r 3@544r 4@480r
R24 [0B,32r:0)[496r,544r:3)[544r,592r:2)[672r,704r:1)[1056r,1088r:4) 0@0B-phi 1@672r 2@544r 3@496r 4@1056r
%0 [32r,112r:0) 0@32r weight:0.000000e+00
%1 [16r,304r:0)[800B,880r:0) 0@16r weight:0.000000e+00
%2 [1136r,1152r:0) 0@1136r weight:0.000000e+00
%3 [864r,896r:0) 0@864r weight:0.000000e+00
%4 [960r,1072r:0) 0@960r weight:0.000000e+00
%5 [976r,992r:0)[992r,1008r:1) 0@976r 1@992r weight:0.000000e+00
%6 [1040r,1056r:0) 0@1040r weight:0.000000e+00
%7 [176r,208r:0) 0@176r weight:0.000000e+00
%8 [272r,368B:0)[752B,768r:0) 0@272r weight:0.000000e+00
%9 [288r,320r:0) 0@288r weight:0.000000e+00
%10 [384r,688r:0) 0@384r weight:0.000000e+00
%11 [416r,480r:0) 0@416r weight:0.000000e+00
%12 [448r,512r:0) 0@448r weight:0.000000e+00
%13 [464r,528r:0) 0@464r weight:0.000000e+00
%14 [576r,624r:0) 0@576r weight:0.000000e+00
%15 [592r,608r:0) 0@592r weight:0.000000e+00
%16 [656r,672r:0) 0@656r weight:0.000000e+00
%17 [208r,256B:0)[256B,272r:2)[816r,848B:1) 0@208r 1@816r 2@256B-phi weight:0.000000e+00
%18 [320r,368B:0)[368B,384r:2)[768r,800B:1) 0@320r 1@768r 2@368B-phi weight:0.000000e+00
%19 [896r,944B:0)[944B,960r:2)[1152r,1184B:1) 0@896r 1@1152r 2@944B-phi weight:0.000000e+00
RegMasks: 544r 704r 1088r
********** MACHINEINSTRS **********
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
0B bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
16B %1:ld8 = COPY $r22
32B %0:ld8 = COPY $r24
48B CPIRdK %0:ld8, 7, implicit-def $sreg
64B BREQk %bb.7, implicit killed $sreg
80B RJMPk %bb.1
96B bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
112B CPIRdK %0:ld8, 6, implicit-def $sreg
128B BRNEk %bb.10, implicit killed $sreg
144B RJMPk %bb.2
160B bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
176B %7:ld8 = LDIRdK 5
192B CPIRdK %1:ld8, 5, implicit-def $sreg
208B %17:gpr8 = COPY %7:ld8
224B BRLOk %bb.3, implicit killed $sreg
240B RJMPk %bb.6
256B bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
272B %8:gpr8 = COPY %17:gpr8
288B %9:ld8 = LDIRdK 90
304B CPIRdK %1:ld8, 91, implicit-def $sreg
320B %18:gpr8 = COPY %9:ld8
336B BRSHk %bb.4, implicit killed $sreg
352B RJMPk %bb.5
368B bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
384B %10:gpr8 = COPY %18:gpr8
400B STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
416B %11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
432B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
448B %12:dldregs = LDIWRdK 100
464B %13:dldregs = LDIWRdK 0
480B $r23r22 = COPY %11:dregs
496B $r25r24 = COPY %13:dldregs
512B $r19r18 = COPY %12:dldregs
528B $r21r20 = COPY %13:dldregs
544B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit killed $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
560B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
576B %14:dregs = COPY $r23r22
592B %15:dregs = COPY $r25r24
608B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
624B STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
640B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
656B %16:dldregs = LDIWRdK 34
672B $r25r24 = COPY %16:dldregs
688B $r22 = COPY %10:gpr8
704B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
720B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
736B RJMPk %bb.10
752B bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
768B %18:gpr8 = COPY %8:gpr8
784B RJMPk %bb.4
800B bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
816B %17:gpr8 = COPY %1:ld8
832B RJMPk %bb.3
848B bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
864B %3:ld8 = LDIRdK 1
880B CPIRdK %1:ld8, 0, implicit-def $sreg
896B %19:ld8 = COPY %3:ld8
912B BRNEk %bb.8, implicit killed $sreg
928B RJMPk %bb.9
944B bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
960B %4:ld8 = COPY %19:ld8
976B %5:ld8 = COPY %4:ld8
992B %5:ld8 = ANDIRdK %5:ld8, 1, implicit-def dead $sreg
1008B STSKRr @_Tv4main7enabledSb, %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
1024B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B %6:dldregs = LDIWRdK 35
1056B $r25r24 = COPY %6:dldregs
1072B $r22 = COPY %4:ld8
1088B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
1104B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1120B bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
1136B %2:ld8 = LDIRdK 0
1152B %19:ld8 = COPY %2:ld8
1168B RJMPk %bb.8
1184B bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
1200B RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Live Interval Analysis ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
0B bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
16B %1:ld8 = COPY $r22
32B %0:ld8 = COPY $r24
48B CPIRdK %0:ld8, 7, implicit-def $sreg
64B BREQk %bb.7, implicit killed $sreg
80B RJMPk %bb.1
96B bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
112B CPIRdK %0:ld8, 6, implicit-def $sreg
128B BRNEk %bb.10, implicit killed $sreg
144B RJMPk %bb.2
160B bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
176B %7:ld8 = LDIRdK 5
192B CPIRdK %1:ld8, 5, implicit-def $sreg
208B %17:gpr8 = COPY %7:ld8
224B BRLOk %bb.3, implicit killed $sreg
240B RJMPk %bb.6
256B bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
272B %8:gpr8 = COPY %17:gpr8
288B %9:ld8 = LDIRdK 90
304B CPIRdK %1:ld8, 91, implicit-def $sreg
320B %18:gpr8 = COPY %9:ld8
336B BRSHk %bb.4, implicit killed $sreg
352B RJMPk %bb.5
368B bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
384B %10:gpr8 = COPY %18:gpr8
400B STSKRr @_Tv4main11delayFactorVs5UInt8, %10:gpr8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
416B %11:dregs = ZEXT %10:gpr8, implicit-def dead $sreg
432B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
448B %12:dldregs = LDIWRdK 100
464B %13:dldregs = LDIWRdK 0
480B $r23r22 = COPY %11:dregs
496B $r25r24 = COPY %13:dldregs
512B $r19r18 = COPY %12:dldregs
528B $r21r20 = COPY %13:dldregs
544B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit killed $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
560B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
576B %14:dregs = COPY $r23r22
592B %15:dregs = COPY $r25r24
608B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
624B STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
640B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
656B %16:dldregs = LDIWRdK 34
672B $r25r24 = COPY %16:dldregs
688B $r22 = COPY %10:gpr8
704B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
720B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
736B RJMPk %bb.10
752B bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
768B %18:gpr8 = COPY %8:gpr8
784B RJMPk %bb.4
800B bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
816B %17:gpr8 = COPY %1:ld8
832B RJMPk %bb.3
848B bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
864B %3:ld8 = LDIRdK 1
880B CPIRdK %1:ld8, 0, implicit-def $sreg
896B %19:ld8 = COPY %3:ld8
912B BRNEk %bb.8, implicit killed $sreg
928B RJMPk %bb.9
944B bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
960B %4:ld8 = COPY %19:ld8
976B %5:ld8 = COPY %4:ld8
992B %5:ld8 = ANDIRdK %5:ld8, 1, implicit-def dead $sreg
1008B STSKRr @_Tv4main7enabledSb, %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
1024B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B %6:dldregs = LDIWRdK 35
1056B $r25r24 = COPY %6:dldregs
1072B $r22 = COPY %4:ld8
1088B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
1104B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1120B bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
1136B %2:ld8 = LDIRdK 0
1152B %19:ld8 = COPY %2:ld8
1168B RJMPk %bb.8
1184B bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
1200B RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
********** SIMPLE REGISTER COALESCING **********
********** Function: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
********** JOINING INTERVALS ***********
:
272B %8:gpr8 = COPY %17:gpr8
Considering merging to GPR8 with %8 in %17
RHS = %8 [272r,368B:0)[752B,768r:0) 0@272r weight:0.000000e+00
LHS = %17 [208r,256B:0)[256B,272r:2)[816r,848B:1) 0@208r 1@816r 2@256B-phi weight:0.000000e+00
merge %8:0@272r into %17:2@256B --> @256B
erased: 272r %8:gpr8 = COPY %17:gpr8
AllocationOrder(GPR8) = [ $r24 $r25 $r18 $r19 $r20 $r21 $r22 $r23 $r30 $r31 $r26 $r27 $r17 $r16 $r15 $r14 $r13 $r12 $r11 $r10 $r9 $r8 $r7 $r6 $r5 $r4 $r3 $r2 ]
updated: 768B %18:gpr8 = COPY %17:gpr8
Success: %8 -> %17
Result = %17 [208r,256B:0)[256B,368B:2)[752B,768r:2)[816r,848B:1) 0@208r 1@816r 2@256B-phi weight:0.000000e+00
320B %18:gpr8 = COPY %9:ld8
Considering merging to LD8 with %9 in %18
RHS = %9 [288r,320r:0) 0@288r weight:0.000000e+00
LHS = %18 [320r,368B:0)[368B,384r:2)[768r,800B:1) 0@320r 1@768r 2@368B-phi weight:0.000000e+00
merge %18:0@320r into %9:0@288r --> @288r
erased: 320r %18:gpr8 = COPY %9:ld8
AllocationOrder(LD8) = [ $r24 $r25 $r18 $r19 $r20 $r21 $r22 $r23 $r30 $r31 $r26 $r27 $r17 $r16 ] (sub-class)
updated: 288B %18:ld8 = LDIRdK 90
Success: %9 -> %18
Result = %18 [288r,368B:0)[368B,384r:2)[768r,800B:1) 0@288r 1@768r 2@368B-phi weight:0.000000e+00
entry:
:
208B %17:gpr8 = COPY %7:ld8
Considering merging to LD8 with %7 in %17
RHS = %7 [176r,208r:0) 0@176r weight:0.000000e+00
LHS = %17 [208r,256B:0)[256B,368B:2)[752B,768r:2)[816r,848B:1) 0@208r 1@816r 2@256B-phi weight:0.000000e+00
merge %17:0@208r into %7:0@176r --> @176r
erased: 208r %17:gpr8 = COPY %7:ld8
updated: 176B %17:ld8 = LDIRdK 5
Success: %7 -> %17
Result = %17 [176r,256B:0)[256B,368B:2)[752B,768r:2)[816r,848B:1) 0@176r 1@816r 2@256B-phi weight:0.000000e+00
:
384B %10:gpr8 = COPY %18:ld8
Considering merging to LD8 with %10 in %18
RHS = %10 [384r,688r:0) 0@384r weight:0.000000e+00
LHS = %18 [288r,368B:0)[368B,384r:2)[768r,800B:1) 0@288r 1@768r 2@368B-phi weight:0.000000e+00
merge %10:0@384r into %18:2@368B --> @368B
erased: 384r %10:gpr8 = COPY %18:ld8
updated: 400B STSKRr @_Tv4main11delayFactorVs5UInt8, %18:ld8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
updated: 416B %11:dregs = ZEXT %18:ld8, implicit-def dead $sreg
updated: 688B $r22 = COPY %18:ld8
Success: %10 -> %18
Result = %18 [288r,368B:0)[368B,688r:2)[768r,800B:1) 0@288r 1@768r 2@368B-phi weight:0.000000e+00
480B $r23r22 = COPY %11:dregs
Considering merging %11 with $r23r22
Can only merge into reserved registers.
496B $r25r24 = COPY %13:dldregs
Considering merging %13 with $r25r24
Can only merge into reserved registers.
512B $r19r18 = COPY %12:dldregs
Considering merging %12 with $r19r18
Can only merge into reserved registers.
528B $r21r20 = COPY %13:dldregs
Considering merging %13 with $r21r20
Can only merge into reserved registers.
576B %14:dregs = COPY $r23r22
Considering merging %14 with $r23r22
Can only merge into reserved registers.
592B %15:dregs = COPY $r25r24
Considering merging %15 with $r25r24
Can only merge into reserved registers.
672B $r25r24 = COPY %16:dldregs
Considering merging %16 with $r25r24
Can only merge into reserved registers.
688B $r22 = COPY %18:ld8
Considering merging %18 with $r22
Can only merge into reserved registers.
:
896B %19:ld8 = COPY %3:ld8
Considering merging to LD8 with %3 in %19
RHS = %3 [864r,896r:0) 0@864r weight:0.000000e+00
LHS = %19 [896r,944B:0)[944B,960r:2)[1152r,1184B:1) 0@896r 1@1152r 2@944B-phi weight:0.000000e+00
merge %19:0@896r into %3:0@864r --> @864r
erased: 896r %19:ld8 = COPY %3:ld8
updated: 864B %19:ld8 = LDIRdK 1
Success: %3 -> %19
Result = %19 [864r,944B:0)[944B,960r:2)[1152r,1184B:1) 0@864r 1@1152r 2@944B-phi weight:0.000000e+00
:
960B %4:ld8 = COPY %19:ld8
Considering merging to LD8 with %4 in %19
RHS = %4 [960r,1072r:0) 0@960r weight:0.000000e+00
LHS = %19 [864r,944B:0)[944B,960r:2)[1152r,1184B:1) 0@864r 1@1152r 2@944B-phi weight:0.000000e+00
merge %4:0@960r into %19:2@944B --> @944B
erased: 960r %4:ld8 = COPY %19:ld8
updated: 1072B $r22 = COPY %19:ld8
updated: 976B %5:ld8 = COPY %19:ld8
Success: %4 -> %19
Result = %19 [864r,944B:0)[944B,1072r:2)[1152r,1184B:1) 0@864r 1@1152r 2@944B-phi weight:0.000000e+00
976B %5:ld8 = COPY %19:ld8
Considering merging to LD8 with %5 in %19
RHS = %5 [976r,992r:0)[992r,1008r:1) 0@976r 1@992r weight:0.000000e+00
LHS = %19 [864r,944B:0)[944B,1072r:2)[1152r,1184B:1) 0@864r 1@1152r 2@944B-phi weight:0.000000e+00
merge %5:0@976r into %19:2@944B --> @944B
interference at %5:1@992r
Interference!
1056B $r25r24 = COPY %6:dldregs
Considering merging %6 with $r25r24
Can only merge into reserved registers.
1072B $r22 = COPY %19:ld8
Considering merging %19 with $r22
Can only merge into reserved registers.
:
entry:
16B %1:ld8 = COPY $r22
Considering merging %1 with $r22
Can only merge into reserved registers.
32B %0:ld8 = COPY $r24
Considering merging %0 with $r24
Can only merge into reserved registers.
:
768B %18:ld8 = COPY %17:ld8
Considering merging to LD8 with %18 in %17
RHS = %18 [288r,368B:0)[368B,688r:2)[768r,800B:1) 0@288r 1@768r 2@368B-phi weight:0.000000e+00
LHS = %17 [176r,256B:0)[256B,368B:2)[752B,768r:2)[816r,848B:1) 0@176r 1@816r 2@256B-phi weight:0.000000e+00
interference at %18:0@288r
Interference!
:
816B %17:ld8 = COPY %1:ld8
Considering merging to LD8 with %1 in %17
RHS = %1 [16r,304r:0)[800B,880r:0) 0@16r weight:0.000000e+00
LHS = %17 [176r,256B:0)[256B,368B:2)[752B,768r:2)[816r,848B:1) 0@176r 1@816r 2@256B-phi weight:0.000000e+00
interference at %17:0@176r
Interference!
:
1152B %19:ld8 = COPY %2:ld8
Considering merging to LD8 with %2 in %19
RHS = %2 [1136r,1152r:0) 0@1136r weight:0.000000e+00
LHS = %19 [864r,944B:0)[944B,1072r:2)[1152r,1184B:1) 0@864r 1@1152r 2@944B-phi weight:0.000000e+00
merge %19:1@1152r into %2:0@1136r --> @1136r
erased: 1152r %19:ld8 = COPY %2:ld8
updated: 1136B %19:ld8 = LDIRdK 0
Success: %2 -> %19
Result = %19 [864r,944B:0)[944B,1072r:2)[1136r,1184B:1) 0@864r 1@1136r 2@944B-phi weight:0.000000e+00
976B %5:ld8 = COPY %19:ld8
Considering merging to LD8 with %5 in %19
RHS = %5 [976r,992r:0)[992r,1008r:1) 0@976r 1@992r weight:0.000000e+00
LHS = %19 [864r,944B:0)[944B,1072r:2)[1136r,1184B:1) 0@864r 1@1136r 2@944B-phi weight:0.000000e+00
merge %5:0@976r into %19:2@944B --> @944B
interference at %5:1@992r
Interference!
768B %18:ld8 = COPY %17:ld8
Considering merging to LD8 with %18 in %17
RHS = %18 [288r,368B:0)[368B,688r:2)[768r,800B:1) 0@288r 1@768r 2@368B-phi weight:0.000000e+00
LHS = %17 [176r,256B:0)[256B,368B:2)[752B,768r:2)[816r,848B:1) 0@176r 1@816r 2@256B-phi weight:0.000000e+00
interference at %18:0@288r
Interference!
816B %17:ld8 = COPY %1:ld8
Considering merging to LD8 with %1 in %17
RHS = %1 [16r,304r:0)[800B,880r:0) 0@16r weight:0.000000e+00
LHS = %17 [176r,256B:0)[256B,368B:2)[752B,768r:2)[816r,848B:1) 0@176r 1@816r 2@256B-phi weight:0.000000e+00
interference at %17:0@176r
Interference!
Trying to inflate 3 regs.
********** INTERVALS **********
R22 [0B,16r:0)[480r,544r:4)[544r,576r:3)[688r,704r:1)[1072r,1088r:2) 0@0B-phi 1@688r 2@1072r 3@544r 4@480r
R24 [0B,32r:0)[496r,544r:3)[544r,592r:2)[672r,704r:1)[1056r,1088r:4) 0@0B-phi 1@672r 2@544r 3@496r 4@1056r
%0 [32r,112r:0) 0@32r weight:0.000000e+00
%1 [16r,304r:0)[800B,880r:0) 0@16r weight:0.000000e+00
%5 [976r,992r:0)[992r,1008r:1) 0@976r 1@992r weight:0.000000e+00
%6 [1040r,1056r:0) 0@1040r weight:0.000000e+00
%11 [416r,480r:0) 0@416r weight:0.000000e+00
%12 [448r,512r:0) 0@448r weight:0.000000e+00
%13 [464r,528r:0) 0@464r weight:0.000000e+00
%14 [576r,624r:0) 0@576r weight:0.000000e+00
%15 [592r,608r:0) 0@592r weight:0.000000e+00
%16 [656r,672r:0) 0@656r weight:0.000000e+00
%17 [176r,256B:0)[256B,368B:2)[752B,768r:2)[816r,848B:1) 0@176r 1@816r 2@256B-phi weight:0.000000e+00
%18 [288r,368B:0)[368B,688r:2)[768r,800B:1) 0@288r 1@768r 2@368B-phi weight:0.000000e+00
%19 [864r,944B:0)[944B,1072r:2)[1136r,1184B:1) 0@864r 1@1136r 2@944B-phi weight:0.000000e+00
RegMasks: 544r 704r 1088r
********** MACHINEINSTRS **********
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
0B bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
16B %1:ld8 = COPY $r22
32B %0:ld8 = COPY $r24
48B CPIRdK %0:ld8, 7, implicit-def $sreg
64B BREQk %bb.7, implicit killed $sreg
80B RJMPk %bb.1
96B bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
112B CPIRdK %0:ld8, 6, implicit-def $sreg
128B BRNEk %bb.10, implicit killed $sreg
144B RJMPk %bb.2
160B bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
176B %17:ld8 = LDIRdK 5
192B CPIRdK %1:ld8, 5, implicit-def $sreg
224B BRLOk %bb.3, implicit killed $sreg
240B RJMPk %bb.6
256B bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
288B %18:ld8 = LDIRdK 90
304B CPIRdK %1:ld8, 91, implicit-def $sreg
336B BRSHk %bb.4, implicit killed $sreg
352B RJMPk %bb.5
368B bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
400B STSKRr @_Tv4main11delayFactorVs5UInt8, %18:ld8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
416B %11:dregs = ZEXT %18:ld8, implicit-def dead $sreg
432B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
448B %12:dldregs = LDIWRdK 100
464B %13:dldregs = LDIWRdK 0
480B $r23r22 = COPY %11:dregs
496B $r25r24 = COPY %13:dldregs
512B $r19r18 = COPY %12:dldregs
528B $r21r20 = COPY %13:dldregs
544B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit killed $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
560B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
576B %14:dregs = COPY $r23r22
592B %15:dregs = COPY $r25r24
608B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
624B STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
640B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
656B %16:dldregs = LDIWRdK 34
672B $r25r24 = COPY %16:dldregs
688B $r22 = COPY %18:ld8
704B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
720B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
736B RJMPk %bb.10
752B bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
768B %18:ld8 = COPY %17:ld8
784B RJMPk %bb.4
800B bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
816B %17:ld8 = COPY %1:ld8
832B RJMPk %bb.3
848B bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
864B %19:ld8 = LDIRdK 1
880B CPIRdK %1:ld8, 0, implicit-def $sreg
912B BRNEk %bb.8, implicit killed $sreg
928B RJMPk %bb.9
944B bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
976B %5:ld8 = COPY %19:ld8
992B %5:ld8 = ANDIRdK %5:ld8, 1, implicit-def dead $sreg
1008B STSKRr @_Tv4main7enabledSb, %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
1024B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B %6:dldregs = LDIWRdK 35
1056B $r25r24 = COPY %6:dldregs
1072B $r22 = COPY %19:ld8
1088B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
1104B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1120B bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
1136B %19:ld8 = LDIRdK 0
1168B RJMPk %bb.8
1184B bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
1200B RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Simple Register Coalescing ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
0B bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
16B %1:ld8 = COPY $r22
32B %0:ld8 = COPY $r24
48B CPIRdK %0:ld8, 7, implicit-def $sreg
64B BREQk %bb.7, implicit killed $sreg
80B RJMPk %bb.1
96B bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
112B CPIRdK %0:ld8, 6, implicit-def $sreg
128B BRNEk %bb.10, implicit killed $sreg
144B RJMPk %bb.2
160B bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
176B %17:ld8 = LDIRdK 5
192B CPIRdK %1:ld8, 5, implicit-def $sreg
224B BRLOk %bb.3, implicit killed $sreg
240B RJMPk %bb.6
256B bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
288B %18:ld8 = LDIRdK 90
304B CPIRdK %1:ld8, 91, implicit-def $sreg
336B BRSHk %bb.4, implicit killed $sreg
352B RJMPk %bb.5
368B bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
400B STSKRr @_Tv4main11delayFactorVs5UInt8, %18:ld8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
416B %11:dregs = ZEXT %18:ld8, implicit-def dead $sreg
432B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
448B %12:dldregs = LDIWRdK 100
464B %13:dldregs = LDIWRdK 0
480B $r23r22 = COPY %11:dregs
496B $r25r24 = COPY %13:dldregs
512B $r19r18 = COPY %12:dldregs
528B $r21r20 = COPY %13:dldregs
544B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit killed $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
560B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
576B %14:dregs = COPY $r23r22
592B %15:dregs = COPY $r25r24
608B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
624B STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
640B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
656B %16:dldregs = LDIWRdK 34
672B $r25r24 = COPY %16:dldregs
688B $r22 = COPY %18:ld8
704B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
720B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
736B RJMPk %bb.10
752B bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
768B %18:ld8 = COPY %17:ld8
784B RJMPk %bb.4
800B bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
816B %17:ld8 = COPY %1:ld8
832B RJMPk %bb.3
848B bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
864B %19:ld8 = LDIRdK 1
880B CPIRdK %1:ld8, 0, implicit-def $sreg
912B BRNEk %bb.8, implicit killed $sreg
928B RJMPk %bb.9
944B bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
976B %5:ld8 = COPY %19:ld8
992B %5:ld8 = ANDIRdK %5:ld8, 1, implicit-def dead $sreg
1008B STSKRr @_Tv4main7enabledSb, %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
1024B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B %6:dldregs = LDIWRdK 35
1056B $r25r24 = COPY %6:dldregs
1072B $r22 = COPY %19:ld8
1088B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
1104B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1120B bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
1136B %19:ld8 = LDIRdK 0
1168B RJMPk %bb.8
1184B bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
1200B RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Rename Disconnected Subregister Components ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
0B bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
16B %1:ld8 = COPY $r22
32B %0:ld8 = COPY $r24
48B CPIRdK %0:ld8, 7, implicit-def $sreg
64B BREQk %bb.7, implicit killed $sreg
80B RJMPk %bb.1
96B bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
112B CPIRdK %0:ld8, 6, implicit-def $sreg
128B BRNEk %bb.10, implicit killed $sreg
144B RJMPk %bb.2
160B bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
176B %17:ld8 = LDIRdK 5
192B CPIRdK %1:ld8, 5, implicit-def $sreg
224B BRLOk %bb.3, implicit killed $sreg
240B RJMPk %bb.6
256B bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
288B %18:ld8 = LDIRdK 90
304B CPIRdK %1:ld8, 91, implicit-def $sreg
336B BRSHk %bb.4, implicit killed $sreg
352B RJMPk %bb.5
368B bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
400B STSKRr @_Tv4main11delayFactorVs5UInt8, %18:ld8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
416B %11:dregs = ZEXT %18:ld8, implicit-def dead $sreg
432B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
448B %12:dldregs = LDIWRdK 100
464B %13:dldregs = LDIWRdK 0
480B $r23r22 = COPY %11:dregs
496B $r25r24 = COPY %13:dldregs
512B $r19r18 = COPY %12:dldregs
528B $r21r20 = COPY %13:dldregs
544B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit killed $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
560B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
576B %14:dregs = COPY $r23r22
592B %15:dregs = COPY $r25r24
608B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
624B STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
640B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
656B %16:dldregs = LDIWRdK 34
672B $r25r24 = COPY %16:dldregs
688B $r22 = COPY %18:ld8
704B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
720B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
736B RJMPk %bb.10
752B bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
768B %18:ld8 = COPY %17:ld8
784B RJMPk %bb.4
800B bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
816B %17:ld8 = COPY %1:ld8
832B RJMPk %bb.3
848B bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
864B %19:ld8 = LDIRdK 1
880B CPIRdK %1:ld8, 0, implicit-def $sreg
912B BRNEk %bb.8, implicit killed $sreg
928B RJMPk %bb.9
944B bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
976B %5:ld8 = COPY %19:ld8
992B %5:ld8 = ANDIRdK %5:ld8, 1, implicit-def dead $sreg
1008B STSKRr @_Tv4main7enabledSb, %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
1024B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B %6:dldregs = LDIWRdK 35
1056B $r25r24 = COPY %6:dldregs
1072B $r22 = COPY %19:ld8
1088B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
1104B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1120B bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
1136B %19:ld8 = LDIRdK 0
1168B RJMPk %bb.8
1184B bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
1200B RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Machine Instruction Scheduler ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
0B bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
16B %1:ld8 = COPY $r22
32B %0:ld8 = COPY $r24
48B CPIRdK %0:ld8, 7, implicit-def $sreg
64B BREQk %bb.7, implicit killed $sreg
80B RJMPk %bb.1
96B bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
112B CPIRdK %0:ld8, 6, implicit-def $sreg
128B BRNEk %bb.10, implicit killed $sreg
144B RJMPk %bb.2
160B bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
176B %17:ld8 = LDIRdK 5
192B CPIRdK %1:ld8, 5, implicit-def $sreg
224B BRLOk %bb.3, implicit killed $sreg
240B RJMPk %bb.6
256B bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
288B %18:ld8 = LDIRdK 90
304B CPIRdK %1:ld8, 91, implicit-def $sreg
336B BRSHk %bb.4, implicit killed $sreg
352B RJMPk %bb.5
368B bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
400B STSKRr @_Tv4main11delayFactorVs5UInt8, %18:ld8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
416B %11:dregs = ZEXT %18:ld8, implicit-def dead $sreg
432B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
448B %12:dldregs = LDIWRdK 100
464B %13:dldregs = LDIWRdK 0
480B $r23r22 = COPY %11:dregs
496B $r25r24 = COPY %13:dldregs
512B $r19r18 = COPY %12:dldregs
528B $r21r20 = COPY %13:dldregs
544B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit killed $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
560B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
576B %14:dregs = COPY $r23r22
592B %15:dregs = COPY $r25r24
608B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
624B STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
640B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
656B %16:dldregs = LDIWRdK 34
672B $r25r24 = COPY %16:dldregs
688B $r22 = COPY %18:ld8
704B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
720B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
736B RJMPk %bb.10
752B bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
768B %18:ld8 = COPY %17:ld8
784B RJMPk %bb.4
800B bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
816B %17:ld8 = COPY %1:ld8
832B RJMPk %bb.3
848B bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
864B %19:ld8 = LDIRdK 1
880B CPIRdK %1:ld8, 0, implicit-def $sreg
912B BRNEk %bb.8, implicit killed $sreg
928B RJMPk %bb.9
944B bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
976B %5:ld8 = COPY %19:ld8
992B %5:ld8 = ANDIRdK %5:ld8, 1, implicit-def dead $sreg
1008B STSKRr @_Tv4main7enabledSb, %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
1024B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B %6:dldregs = LDIWRdK 35
1056B $r25r24 = COPY %6:dldregs
1072B $r22 = COPY %19:ld8
1088B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
1104B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1120B bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
1136B %19:ld8 = LDIRdK 0
1168B RJMPk %bb.8
1184B bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
1200B RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
block-frequency: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
==================================================================
reverse-post-order-traversal
- 0: BB0[entry]
- 1: BB1[entry]
- 2: BB2[]
- 3: BB6[]
- 4: BB3[]
- 5: BB5[]
- 6: BB4[]
- 7: BB7[]
- 8: BB9[]
- 9: BB8[]
- 10: BB10[]
loop-detection
compute-mass-in-function
- node: BB0[entry]
=> [ local ] weight = 715827883, succ = BB7[]
=> [ local ] weight = 1431655765, succ = BB1[entry]
=> mass: ffffffffffffffff
=> assign aaaaaaa9ffffffff (5555555600000000) to BB1[entry]
=> assign 5555555600000000 (0000000000000000) to BB7[]
- node: BB1[entry]
=> [ local ] weight = 1073741825, succ = BB2[]
=> [ local ] weight = 1073741823, succ = BB10[]
=> mass: aaaaaaa9ffffffff
=> assign 5555555655555553 (55555553aaaaaaac) to BB2[]
=> assign 55555553aaaaaaac (0000000000000000) to BB10[]
- node: BB2[]
=> [ local ] weight = 1073741824, succ = BB6[]
=> [ local ] weight = 1073741824, succ = BB3[]
=> mass: 5555555655555553
=> assign 2aaaaaab2aaaaaa9 (2aaaaaab2aaaaaaa) to BB6[]
=> assign 2aaaaaab2aaaaaaa (0000000000000000) to BB3[]
- node: BB6[]
=> [ local ] weight = 2147483648, succ = BB3[]
=> mass: 2aaaaaab2aaaaaa9
=> assign 2aaaaaab2aaaaaa9 (0000000000000000) to BB3[]
- node: BB3[]
=> [ local ] weight = 1073741824, succ = BB5[]
=> [ local ] weight = 1073741824, succ = BB4[]
=> mass: 5555555655555553
=> assign 2aaaaaab2aaaaaa9 (2aaaaaab2aaaaaaa) to BB5[]
=> assign 2aaaaaab2aaaaaaa (0000000000000000) to BB4[]
- node: BB5[]
=> [ local ] weight = 2147483648, succ = BB4[]
=> mass: 2aaaaaab2aaaaaa9
=> assign 2aaaaaab2aaaaaa9 (0000000000000000) to BB4[]
- node: BB4[]
=> [ local ] weight = 2147483648, succ = BB10[]
=> mass: 5555555655555553
=> assign 5555555655555553 (0000000000000000) to BB10[]
- node: BB7[]
=> [ local ] weight = 1073741824, succ = BB9[]
=> [ local ] weight = 1073741824, succ = BB8[]
=> mass: 5555555600000000
=> assign 2aaaaaab00000000 (2aaaaaab00000000) to BB9[]
=> assign 2aaaaaab00000000 (0000000000000000) to BB8[]
- node: BB9[]
=> [ local ] weight = 2147483648, succ = BB8[]
=> mass: 2aaaaaab00000000
=> assign 2aaaaaab00000000 (0000000000000000) to BB8[]
- node: BB8[]
=> [ local ] weight = 2147483648, succ = BB10[]
=> mass: 5555555600000000
=> assign 5555555600000000 (0000000000000000) to BB10[]
- node: BB10[]
=> mass: ffffffffffffffff
float-to-int: min = 0.1666666667, max = 1.0, factor = 47.99999998
- BB0[entry]: float = 1.0, scaled = 47.99999998, int = 47
- BB1[entry]: float = 0.6666666665, scaled = 31.99999998, int = 31
- BB2[]: float = 0.3333333336, scaled = 16.0, int = 16
- BB6[]: float = 0.1666666668, scaled = 8.000000002, int = 8
- BB3[]: float = 0.3333333336, scaled = 16.0, int = 16
- BB5[]: float = 0.1666666668, scaled = 8.000000002, int = 8
- BB4[]: float = 0.3333333336, scaled = 16.0, int = 16
- BB7[]: float = 0.3333333335, scaled = 16.0, int = 15
- BB9[]: float = 0.1666666667, scaled = 8.0, int = 8
- BB8[]: float = 0.3333333335, scaled = 16.0, int = 15
- BB10[]: float = 1.0, scaled = 47.99999998, int = 47
block-frequency-info: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
- BB0[entry]: float = 1.0, int = 47
- BB1[entry]: float = 0.66667, int = 31
- BB2[]: float = 0.33333, int = 16
- BB3[]: float = 0.33333, int = 16
- BB4[]: float = 0.33333, int = 16
- BB5[]: float = 0.16667, int = 8
- BB6[]: float = 0.16667, int = 8
- BB7[]: float = 0.33333, int = 15
- BB8[]: float = 0.33333, int = 15
- BB9[]: float = 0.16667, int = 8
- BB10[]: float = 1.0, int = 47
# *** IR Dump After Debug Variable Analysis ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
0B bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
16B %1:ld8 = COPY $r22
32B %0:ld8 = COPY $r24
48B CPIRdK %0:ld8, 7, implicit-def $sreg
64B BREQk %bb.7, implicit killed $sreg
80B RJMPk %bb.1
96B bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
112B CPIRdK %0:ld8, 6, implicit-def $sreg
128B BRNEk %bb.10, implicit killed $sreg
144B RJMPk %bb.2
160B bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
176B %17:ld8 = LDIRdK 5
192B CPIRdK %1:ld8, 5, implicit-def $sreg
224B BRLOk %bb.3, implicit killed $sreg
240B RJMPk %bb.6
256B bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
288B %18:ld8 = LDIRdK 90
304B CPIRdK %1:ld8, 91, implicit-def $sreg
336B BRSHk %bb.4, implicit killed $sreg
352B RJMPk %bb.5
368B bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
400B STSKRr @_Tv4main11delayFactorVs5UInt8, %18:ld8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
416B %11:dregs = ZEXT %18:ld8, implicit-def dead $sreg
432B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
448B %12:dldregs = LDIWRdK 100
464B %13:dldregs = LDIWRdK 0
480B $r23r22 = COPY %11:dregs
496B $r25r24 = COPY %13:dldregs
512B $r19r18 = COPY %12:dldregs
528B $r21r20 = COPY %13:dldregs
544B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit killed $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
560B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
576B %14:dregs = COPY $r23r22
592B %15:dregs = COPY $r25r24
608B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
624B STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
640B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
656B %16:dldregs = LDIWRdK 34
672B $r25r24 = COPY %16:dldregs
688B $r22 = COPY %18:ld8
704B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
720B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
736B RJMPk %bb.10
752B bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
768B %18:ld8 = COPY %17:ld8
784B RJMPk %bb.4
800B bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
816B %17:ld8 = COPY %1:ld8
832B RJMPk %bb.3
848B bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
864B %19:ld8 = LDIRdK 1
880B CPIRdK %1:ld8, 0, implicit-def $sreg
912B BRNEk %bb.8, implicit killed $sreg
928B RJMPk %bb.9
944B bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
976B %5:ld8 = COPY %19:ld8
992B %5:ld8 = ANDIRdK %5:ld8, 1, implicit-def dead $sreg
1008B STSKRr @_Tv4main7enabledSb, %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
1024B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B %6:dldregs = LDIWRdK 35
1056B $r25r24 = COPY %6:dldregs
1072B $r22 = COPY %19:ld8
1088B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
1104B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1120B bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
1136B %19:ld8 = LDIRdK 0
1168B RJMPk %bb.8
1184B bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
1200B RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Live Stack Slot Analysis ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
0B bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
16B %1:ld8 = COPY $r22
32B %0:ld8 = COPY $r24
48B CPIRdK %0:ld8, 7, implicit-def $sreg
64B BREQk %bb.7, implicit killed $sreg
80B RJMPk %bb.1
96B bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
112B CPIRdK %0:ld8, 6, implicit-def $sreg
128B BRNEk %bb.10, implicit killed $sreg
144B RJMPk %bb.2
160B bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
176B %17:ld8 = LDIRdK 5
192B CPIRdK %1:ld8, 5, implicit-def $sreg
224B BRLOk %bb.3, implicit killed $sreg
240B RJMPk %bb.6
256B bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
288B %18:ld8 = LDIRdK 90
304B CPIRdK %1:ld8, 91, implicit-def $sreg
336B BRSHk %bb.4, implicit killed $sreg
352B RJMPk %bb.5
368B bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
400B STSKRr @_Tv4main11delayFactorVs5UInt8, %18:ld8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
416B %11:dregs = ZEXT %18:ld8, implicit-def dead $sreg
432B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
448B %12:dldregs = LDIWRdK 100
464B %13:dldregs = LDIWRdK 0
480B $r23r22 = COPY %11:dregs
496B $r25r24 = COPY %13:dldregs
512B $r19r18 = COPY %12:dldregs
528B $r21r20 = COPY %13:dldregs
544B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit killed $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
560B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
576B %14:dregs = COPY $r23r22
592B %15:dregs = COPY $r25r24
608B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
624B STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
640B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
656B %16:dldregs = LDIWRdK 34
672B $r25r24 = COPY %16:dldregs
688B $r22 = COPY %18:ld8
704B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
720B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
736B RJMPk %bb.10
752B bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
768B %18:ld8 = COPY %17:ld8
784B RJMPk %bb.4
800B bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
816B %17:ld8 = COPY %1:ld8
832B RJMPk %bb.3
848B bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
864B %19:ld8 = LDIRdK 1
880B CPIRdK %1:ld8, 0, implicit-def $sreg
912B BRNEk %bb.8, implicit killed $sreg
928B RJMPk %bb.9
944B bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
976B %5:ld8 = COPY %19:ld8
992B %5:ld8 = ANDIRdK %5:ld8, 1, implicit-def dead $sreg
1008B STSKRr @_Tv4main7enabledSb, %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
1024B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B %6:dldregs = LDIWRdK 35
1056B $r25r24 = COPY %6:dldregs
1072B $r22 = COPY %19:ld8
1088B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
1104B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1120B bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
1136B %19:ld8 = LDIRdK 0
1168B RJMPk %bb.8
1184B bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
1200B RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
*** ALREADY BROKEN - missing a JMP
# *** IR Dump After Virtual Register Map ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
0B bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
16B %1:ld8 = COPY $r22
32B %0:ld8 = COPY $r24
48B CPIRdK %0:ld8, 7, implicit-def $sreg
64B BREQk %bb.7, implicit killed $sreg
80B RJMPk %bb.1
96B bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
112B CPIRdK %0:ld8, 6, implicit-def $sreg
128B BRNEk %bb.10, implicit killed $sreg
144B RJMPk %bb.2
160B bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
176B %17:ld8 = LDIRdK 5
192B CPIRdK %1:ld8, 5, implicit-def $sreg
224B BRLOk %bb.3, implicit killed $sreg
240B RJMPk %bb.6
256B bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
288B %18:ld8 = LDIRdK 90
304B CPIRdK %1:ld8, 91, implicit-def $sreg
336B BRSHk %bb.4, implicit killed $sreg
352B RJMPk %bb.5
368B bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
400B STSKRr @_Tv4main11delayFactorVs5UInt8, %18:ld8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
416B %11:dregs = ZEXT %18:ld8, implicit-def dead $sreg
432B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
448B %12:dldregs = LDIWRdK 100
464B %13:dldregs = LDIWRdK 0
480B $r23r22 = COPY %11:dregs
496B $r25r24 = COPY %13:dldregs
512B $r19r18 = COPY %12:dldregs
528B $r21r20 = COPY %13:dldregs
544B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit killed $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
560B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
576B %14:dregs = COPY $r23r22
592B %15:dregs = COPY $r25r24
608B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
624B STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
640B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
656B %16:dldregs = LDIWRdK 34
672B $r25r24 = COPY %16:dldregs
688B $r22 = COPY %18:ld8
704B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
720B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
736B RJMPk %bb.10
752B bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
768B %18:ld8 = COPY %17:ld8
784B RJMPk %bb.4
800B bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
816B %17:ld8 = COPY %1:ld8
832B RJMPk %bb.3
848B bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
864B %19:ld8 = LDIRdK 1
880B CPIRdK %1:ld8, 0, implicit-def $sreg
912B BRNEk %bb.8, implicit killed $sreg
928B RJMPk %bb.9
944B bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
976B %5:ld8 = COPY %19:ld8
992B %5:ld8 = ANDIRdK %5:ld8, 1, implicit-def dead $sreg
1008B STSKRr @_Tv4main7enabledSb, %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
1024B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B %6:dldregs = LDIWRdK 35
1056B $r25r24 = COPY %6:dldregs
1072B $r22 = COPY %19:ld8
1088B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
1104B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1120B bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
1136B %19:ld8 = LDIRdK 0
1168B RJMPk %bb.8
1184B bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
1200B RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Live Register Matrix ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
0B bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
16B %1:ld8 = COPY $r22
32B %0:ld8 = COPY $r24
48B CPIRdK %0:ld8, 7, implicit-def $sreg
64B BREQk %bb.7, implicit killed $sreg
80B RJMPk %bb.1
96B bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
112B CPIRdK %0:ld8, 6, implicit-def $sreg
128B BRNEk %bb.10, implicit killed $sreg
144B RJMPk %bb.2
160B bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
176B %17:ld8 = LDIRdK 5
192B CPIRdK %1:ld8, 5, implicit-def $sreg
224B BRLOk %bb.3, implicit killed $sreg
240B RJMPk %bb.6
256B bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
288B %18:ld8 = LDIRdK 90
304B CPIRdK %1:ld8, 91, implicit-def $sreg
336B BRSHk %bb.4, implicit killed $sreg
352B RJMPk %bb.5
368B bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
400B STSKRr @_Tv4main11delayFactorVs5UInt8, %18:ld8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
416B %11:dregs = ZEXT %18:ld8, implicit-def dead $sreg
432B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
448B %12:dldregs = LDIWRdK 100
464B %13:dldregs = LDIWRdK 0
480B $r23r22 = COPY %11:dregs
496B $r25r24 = COPY %13:dldregs
512B $r19r18 = COPY %12:dldregs
528B $r21r20 = COPY %13:dldregs
544B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit killed $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
560B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
576B %14:dregs = COPY $r23r22
592B %15:dregs = COPY $r25r24
608B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
624B STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
640B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
656B %16:dldregs = LDIWRdK 34
672B $r25r24 = COPY %16:dldregs
688B $r22 = COPY %18:ld8
704B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
720B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
736B RJMPk %bb.10
752B bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
768B %18:ld8 = COPY %17:ld8
784B RJMPk %bb.4
800B bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
816B %17:ld8 = COPY %1:ld8
832B RJMPk %bb.3
848B bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
864B %19:ld8 = LDIRdK 1
880B CPIRdK %1:ld8, 0, implicit-def $sreg
912B BRNEk %bb.8, implicit killed $sreg
928B RJMPk %bb.9
944B bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
976B %5:ld8 = COPY %19:ld8
992B %5:ld8 = ANDIRdK %5:ld8, 1, implicit-def dead $sreg
1008B STSKRr @_Tv4main7enabledSb, %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
1024B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B %6:dldregs = LDIWRdK 35
1056B $r25r24 = COPY %6:dldregs
1072B $r22 = COPY %19:ld8
1088B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
1104B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1120B bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
1136B %19:ld8 = LDIRdK 0
1168B RJMPk %bb.8
1184B bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
1200B RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
********** GREEDY REGISTER ALLOCATION **********
********** Function: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
********** Compute Spill Weights **********
********** Function: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
********** INTERVALS **********
R22 [0B,16r:0)[480r,544r:4)[544r,576r:3)[688r,704r:1)[1072r,1088r:2) 0@0B-phi 1@688r 2@1072r 3@544r 4@480r
R24 [0B,32r:0)[496r,544r:3)[544r,592r:2)[672r,704r:1)[1056r,1088r:4) 0@0B-phi 1@672r 2@544r 3@496r 4@1056r
%0 [32r,112r:0) 0@32r weight:5.596188e-03
%1 [16r,304r:0)[800B,880r:0) 0@16r weight:2.846643e-03
%5 [976r,992r:0)[992r,1008r:1) 0@976r 1@992r weight:INF
%6 [1040r,1056r:0) 0@1040r weight:INF
%11 [416r,480r:0) 0@416r weight:1.482025e-03
%12 [448r,512r:0) 0@448r weight:7.410125e-04
%13 [464r,528r:0) 0@464r weight:1.111519e-03
%14 [576r,624r:0) 0@576r weight:1.534954e-03
%15 [592r,608r:0) 0@592r weight:INF
%16 [656r,672r:0) 0@656r weight:INF
%17 [176r,256B:0)[256B,368B:2)[752B,768r:2)[816r,848B:1) 0@176r 1@816r 2@256B-phi weight:1.077836e-03
%18 [288r,368B:0)[368B,688r:2)[768r,800B:1) 0@288r 1@768r 2@368B-phi weight:1.864137e-03
%19 [864r,944B:0)[944B,1072r:2)[1136r,1184B:1) 0@864r 1@1136r 2@944B-phi weight:1.741493e-03
RegMasks: 544r 704r 1088r
********** MACHINEINSTRS **********
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
0B bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
16B %1:ld8 = COPY $r22
32B %0:ld8 = COPY $r24
48B CPIRdK %0:ld8, 7, implicit-def $sreg
64B BREQk %bb.7, implicit killed $sreg
80B RJMPk %bb.1
96B bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
112B CPIRdK %0:ld8, 6, implicit-def $sreg
128B BRNEk %bb.10, implicit killed $sreg
144B RJMPk %bb.2
160B bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
176B %17:ld8 = LDIRdK 5
192B CPIRdK %1:ld8, 5, implicit-def $sreg
224B BRLOk %bb.3, implicit killed $sreg
240B RJMPk %bb.6
256B bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
288B %18:ld8 = LDIRdK 90
304B CPIRdK %1:ld8, 91, implicit-def $sreg
336B BRSHk %bb.4, implicit killed $sreg
352B RJMPk %bb.5
368B bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
400B STSKRr @_Tv4main11delayFactorVs5UInt8, %18:ld8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
416B %11:dregs = ZEXT %18:ld8, implicit-def dead $sreg
432B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
448B %12:dldregs = LDIWRdK 100
464B %13:dldregs = LDIWRdK 0
480B $r23r22 = COPY %11:dregs
496B $r25r24 = COPY %13:dldregs
512B $r19r18 = COPY %12:dldregs
528B $r21r20 = COPY %13:dldregs
544B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit killed $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
560B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
576B %14:dregs = COPY $r23r22
592B %15:dregs = COPY $r25r24
608B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
624B STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
640B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
656B %16:dldregs = LDIWRdK 34
672B $r25r24 = COPY %16:dldregs
688B $r22 = COPY %18:ld8
704B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
720B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
736B RJMPk %bb.10
752B bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
768B %18:ld8 = COPY %17:ld8
784B RJMPk %bb.4
800B bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
816B %17:ld8 = COPY %1:ld8
832B RJMPk %bb.3
848B bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
864B %19:ld8 = LDIRdK 1
880B CPIRdK %1:ld8, 0, implicit-def $sreg
912B BRNEk %bb.8, implicit killed $sreg
928B RJMPk %bb.9
944B bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
976B %5:ld8 = COPY %19:ld8
992B %5:ld8 = ANDIRdK %5:ld8, 1, implicit-def dead $sreg
1008B STSKRr @_Tv4main7enabledSb, %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
1024B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B %6:dldregs = LDIWRdK 35
1056B $r25r24 = COPY %6:dldregs
1072B $r22 = COPY %19:ld8
1088B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
1104B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1120B bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
1136B %19:ld8 = LDIRdK 0
1168B RJMPk %bb.8
1184B bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
1200B RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
selectOrSplit LD8:%18 [288r,368B:0)[368B,688r:2)[768r,800B:1) 0@288r 1@768r 2@368B-phi weight:1.864137e-03 w=1.864137e-03
AllocationOrder(GPR8) = [ $r24 $r25 $r18 $r19 $r20 $r21 $r22 $r23 $r30 $r31 $r26 $r27 $r17 $r16 $r15 $r14 $r13 $r12 $r11 $r10 $r9 $r8 $r7 $r6 $r5 $r4 $r3 $r2 ]
AllocationOrder(LD8) = [ $r24 $r25 $r18 $r19 $r20 $r21 $r22 $r23 $r30 $r31 $r26 $r27 $r17 $r16 ] (sub-class)
hints: $r22
missed hint $r22
assigning %18 to $r17: R17 [288r,368B:0)[368B,688r:2)[768r,800B:1) 0@288r 1@768r 2@368B-phi
selectOrSplit LD8:%1 [16r,304r:0)[800B,880r:0) 0@16r weight:2.846643e-03 w=2.846643e-03
hints: $r22
assigning %1 to $r22: R22 [16r,304r:0)[800B,880r:0) 0@16r
selectOrSplit LD8:%19 [864r,944B:0)[944B,1072r:2)[1136r,1184B:1) 0@864r 1@1136r 2@944B-phi weight:1.741493e-03 w=1.741493e-03
hints: $r22
missed hint $r22
assigning %19 to $r18: R18 [864r,944B:0)[944B,1072r:2)[1136r,1184B:1) 0@864r 1@1136r 2@944B-phi
selectOrSplit LD8:%0 [32r,112r:0) 0@32r weight:5.596188e-03 w=5.596188e-03
hints: $r24
assigning %0 to $r24: R24 [32r,112r:0) 0@32r
selectOrSplit DREGS:%11 [416r,480r:0) 0@416r weight:1.482025e-03 w=1.482025e-03
AllocationOrder(DREGS) = [ $r25r24 $r19r18 $r21r20 $r23r22 $r31r30 $r27r26 $r17r16 $r15r14 $r13r12 $r11r10 $r9r8 $r7r6 $r5r4 $r3r2 ]
hints: $r23r22
assigning %11 to $r23r22: R22 [416r,480r:0) 0@416r R23 [416r,480r:0) 0@416r
selectOrSplit DLDREGS:%12 [448r,512r:0) 0@448r weight:7.410125e-04 w=7.410125e-04
AllocationOrder(DLDREGS) = [ $r25r24 $r19r18 $r21r20 $r23r22 $r31r30 $r27r26 $r17r16 ] (sub-class)
hints: $r19r18
assigning %12 to $r19r18: R18 [448r,512r:0) 0@448r R19 [448r,512r:0) 0@448r
selectOrSplit DLDREGS:%13 [464r,528r:0) 0@464r weight:1.111519e-03 w=1.111519e-03
hints: $r25r24
assigning %13 to $r25r24: R24 [464r,528r:0) 0@464r R25 [464r,528r:0) 0@464r
selectOrSplit DREGS:%14 [576r,624r:0) 0@576r weight:1.534954e-03 w=1.534954e-03
hints: $r23r22
assigning %14 to $r23r22: R22 [576r,624r:0) 0@576r R23 [576r,624r:0) 0@576r
selectOrSplit DREGS:%15 [592r,608r:0) 0@592r weight:INF w=INF
hints: $r25r24
assigning %15 to $r25r24: R24 [592r,608r:0) 0@592r R25 [592r,608r:0) 0@592r
selectOrSplit DLDREGS:%16 [656r,672r:0) 0@656r weight:INF w=INF
hints: $r25r24
assigning %16 to $r25r24: R24 [656r,672r:0) 0@656r R25 [656r,672r:0) 0@656r
selectOrSplit DLDREGS:%6 [1040r,1056r:0) 0@1040r weight:INF w=INF
hints: $r25r24
assigning %6 to $r25r24: R24 [1040r,1056r:0) 0@1040r R25 [1040r,1056r:0) 0@1040r
selectOrSplit LD8:%17 [176r,256B:0)[256B,368B:2)[752B,768r:2)[816r,848B:1) 0@176r 1@816r 2@256B-phi weight:1.077836e-03 w=1.077836e-03
hints: $r22
assigning %17 to $r24: R24 [176r,256B:0)[256B,368B:2)[752B,768r:2)[816r,848B:1) 0@176r 1@816r 2@256B-phi
selectOrSplit LD8:%5 [976r,992r:0)[992r,1008r:1) 0@976r 1@992r weight:INF w=INF
hints: $r18
assigning %5 to $r24: R24 [976r,992r:0)[992r,1008r:1) 0@976r 1@992r
Trying to reconcile hints for: %18($r17)
%18($r17) is recolorable.
Trying to reconcile hints for: %19($r18)
%19($r18) is recolorable.
# *** IR Dump After Greedy Register Allocator ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness
Function Live Ins: $r24 in %0, $r22 in %1
0B bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r24, $r22
16B %1:ld8 = COPY $r22
32B %0:ld8 = COPY $r24
48B CPIRdK %0:ld8, 7, implicit-def $sreg
64B BREQk %bb.7, implicit killed $sreg
80B RJMPk %bb.1
96B bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
112B CPIRdK %0:ld8, 6, implicit-def $sreg
128B BRNEk %bb.10, implicit killed $sreg
144B RJMPk %bb.2
160B bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
176B %17:ld8 = LDIRdK 5
192B CPIRdK %1:ld8, 5, implicit-def $sreg
224B BRLOk %bb.3, implicit killed $sreg
240B RJMPk %bb.6
256B bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
288B %18:ld8 = LDIRdK 90
304B CPIRdK %1:ld8, 91, implicit-def $sreg
336B BRSHk %bb.4, implicit killed $sreg
352B RJMPk %bb.5
368B bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
400B STSKRr @_Tv4main11delayFactorVs5UInt8, %18:ld8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
416B %11:dregs = ZEXT %18:ld8, implicit-def dead $sreg
432B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
448B %12:dldregs = LDIWRdK 100
464B %13:dldregs = LDIWRdK 0
480B $r23r22 = COPY %11:dregs
496B $r25r24 = COPY %13:dldregs
512B $r19r18 = COPY %12:dldregs
528B $r21r20 = COPY %13:dldregs
544B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
560B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
576B %14:dregs = COPY $r23r22
592B %15:dregs = COPY $r25r24
608B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
624B STSWKRr @_Tv4main7delayUsVs6UInt32, %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
640B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
656B %16:dldregs = LDIWRdK 34
672B $r25r24 = COPY %16:dldregs
688B $r22 = COPY %18:ld8
704B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
720B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
736B RJMPk %bb.10
752B bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
768B %18:ld8 = COPY %17:ld8
784B RJMPk %bb.4
800B bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
816B %17:ld8 = COPY %1:ld8
832B RJMPk %bb.3
848B bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
864B %19:ld8 = LDIRdK 1
880B CPIRdK %1:ld8, 0, implicit-def $sreg
912B BRNEk %bb.8, implicit killed $sreg
928B RJMPk %bb.9
944B bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
976B %5:ld8 = COPY %19:ld8
992B %5:ld8 = ANDIRdK %5:ld8, 1, implicit-def dead $sreg
1008B STSKRr @_Tv4main7enabledSb, %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
1024B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B %6:dldregs = LDIWRdK 35
1056B $r25r24 = COPY %6:dldregs
1072B $r22 = COPY %19:ld8
1088B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
1104B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1120B bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
1136B %19:ld8 = LDIRdK 0
1168B RJMPk %bb.8
1184B bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
1200B RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
********** REWRITE VIRTUAL REGISTERS **********
********** Function: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
********** REGISTER MAP **********
[%0 -> $r24] LD8
[%1 -> $r22] LD8
[%5 -> $r24] LD8
[%6 -> $r25r24] DLDREGS
[%11 -> $r23r22] DREGS
[%12 -> $r19r18] DLDREGS
[%13 -> $r25r24] DLDREGS
[%14 -> $r23r22] DREGS
[%15 -> $r25r24] DREGS
[%16 -> $r25r24] DLDREGS
[%17 -> $r24] LD8
[%18 -> $r17] LD8
[%19 -> $r18] LD8
0B bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r22, $r24
16B %1:ld8 = COPY $r22
32B %0:ld8 = COPY $r24
48B CPIRdK %0:ld8, 7, implicit-def $sreg
64B BREQk %bb.7, implicit killed $sreg
80B RJMPk %bb.1
> $r22 = COPY $r22
Identity copy: $r22 = COPY $r22
deleted.
> $r24 = COPY $r24
Identity copy: $r24 = COPY $r24
deleted.
> CPIRdK $r24, 7, implicit-def $sreg
> BREQk %bb.7, implicit killed $sreg
> RJMPk %bb.1
96B bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
liveins: $r22, $r24
112B CPIRdK killed %0:ld8, 6, implicit-def $sreg
128B BRNEk %bb.10, implicit killed $sreg
144B RJMPk %bb.2
> CPIRdK killed $r24, 6, implicit-def $sreg
> BRNEk %bb.10, implicit killed $sreg
> RJMPk %bb.2
160B bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
liveins: $r22
176B %17:ld8 = LDIRdK 5
192B CPIRdK %1:ld8, 5, implicit-def $sreg
224B BRLOk %bb.3, implicit killed $sreg
240B RJMPk %bb.6
> $r24 = LDIRdK 5
> CPIRdK $r22, 5, implicit-def $sreg
> BRLOk %bb.3, implicit killed $sreg
> RJMPk %bb.6
256B bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
liveins: $r22, $r24
288B %18:ld8 = LDIRdK 90
304B CPIRdK killed %1:ld8, 91, implicit-def $sreg
336B BRSHk %bb.4, implicit killed $sreg
352B RJMPk %bb.5
> $r17 = LDIRdK 90
> CPIRdK killed $r22, 91, implicit-def $sreg
> BRSHk %bb.4, implicit killed $sreg
> RJMPk %bb.5
368B bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
liveins: $r17
400B STSKRr @_Tv4main11delayFactorVs5UInt8, %18:ld8 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
416B %11:dregs = ZEXT %18:ld8, implicit-def dead $sreg
432B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
448B %12:dldregs = LDIWRdK 100
464B %13:dldregs = LDIWRdK 0
480B $r23r22 = COPY killed %11:dregs
496B $r25r24 = COPY %13:dldregs
512B $r19r18 = COPY killed %12:dldregs
528B $r21r20 = COPY %13:dldregs
544B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
560B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
576B %14:dregs = COPY $r23r22
592B %15:dregs = COPY $r25r24
608B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed %15:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
624B STSWKRr @_Tv4main7delayUsVs6UInt32, killed %14:dregs :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
640B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
656B %16:dldregs = LDIWRdK 34
672B $r25r24 = COPY killed %16:dldregs
688B $r22 = COPY killed %18:ld8
704B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
720B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
736B RJMPk %bb.10
> STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
> $r23r22 = ZEXT $r17, implicit-def dead $sreg
> ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
> $r19r18 = LDIWRdK 100
> $r25r24 = LDIWRdK 0
> $r23r22 = COPY killed $r23r22
Identity copy: $r23r22 = COPY killed $r23r22
deleted.
> $r25r24 = COPY $r25r24
Identity copy: $r25r24 = COPY $r25r24
deleted.
> $r19r18 = COPY killed $r19r18
Identity copy: $r19r18 = COPY killed $r19r18
deleted.
> $r21r20 = COPY $r25r24
> CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
> ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
> $r23r22 = COPY $r23r22
Identity copy: $r23r22 = COPY $r23r22
deleted.
> $r25r24 = COPY $r25r24
Identity copy: $r25r24 = COPY $r25r24
deleted.
> STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r25r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
> STSWKRr @_Tv4main7delayUsVs6UInt32, killed $r23r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
> ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
> $r25r24 = LDIWRdK 34
> $r25r24 = COPY killed $r25r24
Identity copy: $r25r24 = COPY killed $r25r24
deleted.
> $r22 = COPY killed $r17
> CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
> ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
> RJMPk %bb.10
752B bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r24
768B %18:ld8 = COPY killed %17:ld8
784B RJMPk %bb.4
> $r17 = COPY killed $r24
> RJMPk %bb.4
800B bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
liveins: $r22
816B %17:ld8 = COPY %1:ld8
832B RJMPk %bb.3
> $r24 = COPY $r22
> RJMPk %bb.3
848B bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
liveins: $r22
864B %19:ld8 = LDIRdK 1
880B CPIRdK killed %1:ld8, 0, implicit-def $sreg
912B BRNEk %bb.8, implicit killed $sreg
928B RJMPk %bb.9
> $r18 = LDIRdK 1
> CPIRdK killed $r22, 0, implicit-def $sreg
> BRNEk %bb.8, implicit killed $sreg
> RJMPk %bb.9
944B bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
liveins: $r18
976B %5:ld8 = COPY %19:ld8
992B %5:ld8 = ANDIRdK killed %5:ld8, 1, implicit-def dead $sreg
1008B STSKRr @_Tv4main7enabledSb, killed %5:ld8 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
1024B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B %6:dldregs = LDIWRdK 35
1056B $r25r24 = COPY killed %6:dldregs
1072B $r22 = COPY killed %19:ld8
1088B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
1104B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
> $r24 = COPY $r18
> $r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
> STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
> ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
> $r25r24 = LDIWRdK 35
> $r25r24 = COPY killed $r25r24
Identity copy: $r25r24 = COPY killed $r25r24
deleted.
> $r22 = COPY killed $r18
> CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
> ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1120B bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
1136B %19:ld8 = LDIRdK 0
1168B RJMPk %bb.8
> $r18 = LDIRdK 0
> RJMPk %bb.8
1184B bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
1200B RET
> RET
# *** IR Dump After Virtual Register Rewriter ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Function Live Ins: $r24, $r22
0B bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r22, $r24
48B CPIRdK $r24, 7, implicit-def $sreg
64B BREQk %bb.7, implicit killed $sreg
80B RJMPk %bb.1
96B bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
liveins: $r22, $r24
112B CPIRdK killed $r24, 6, implicit-def $sreg
128B BRNEk %bb.10, implicit killed $sreg
144B RJMPk %bb.2
160B bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
liveins: $r22
176B $r24 = LDIRdK 5
192B CPIRdK $r22, 5, implicit-def $sreg
224B BRLOk %bb.3, implicit killed $sreg
240B RJMPk %bb.6
256B bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
liveins: $r22, $r24
288B $r17 = LDIRdK 90
304B CPIRdK killed $r22, 91, implicit-def $sreg
336B BRSHk %bb.4, implicit killed $sreg
352B RJMPk %bb.5
368B bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
liveins: $r17
400B STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
416B $r23r22 = ZEXT $r17, implicit-def dead $sreg
432B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
448B $r19r18 = LDIWRdK 100
464B $r25r24 = LDIWRdK 0
528B $r21r20 = COPY $r25r24
544B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
560B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
608B STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r25r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
624B STSWKRr @_Tv4main7delayUsVs6UInt32, killed $r23r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
640B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
656B $r25r24 = LDIWRdK 34
688B $r22 = COPY killed $r17
704B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
720B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
736B RJMPk %bb.10
752B bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r24
768B $r17 = COPY killed $r24
784B RJMPk %bb.4
800B bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
liveins: $r22
816B $r24 = COPY $r22
832B RJMPk %bb.3
848B bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
liveins: $r22
864B $r18 = LDIRdK 1
880B CPIRdK killed $r22, 0, implicit-def $sreg
912B BRNEk %bb.8, implicit killed $sreg
928B RJMPk %bb.9
944B bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
liveins: $r18
976B $r24 = COPY $r18
992B $r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
1008B STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
1024B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1040B $r25r24 = LDIWRdK 35
1072B $r22 = COPY killed $r18
1088B CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
1104B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
1120B bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
1136B $r18 = LDIRdK 0
1168B RJMPk %bb.8
1184B bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
1200B RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
********** Stack Slot Coloring **********
********** Function: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
# *** IR Dump After Stack Slot Coloring ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r22, $r24
CPIRdK $r24, 7, implicit-def $sreg
BREQk %bb.7, implicit killed $sreg
RJMPk %bb.1
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BRNEk %bb.10, implicit killed $sreg
RJMPk %bb.2
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRLOk %bb.3, implicit killed $sreg
RJMPk %bb.6
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRSHk %bb.4, implicit killed $sreg
RJMPk %bb.5
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r23r22 = ZEXT $r17, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
$r19r18 = LDIWRdK 100
$r25r24 = LDIWRdK 0
$r21r20 = COPY $r25r24
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r25r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, killed $r23r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
$r25r24 = LDIWRdK 34
$r22 = COPY killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.10
bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r24
$r17 = COPY killed $r24
RJMPk %bb.4
bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
liveins: $r22
$r24 = COPY $r22
RJMPk %bb.3
bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.8, implicit killed $sreg
RJMPk %bb.9
bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
liveins: $r18
$r24 = COPY $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
$r25r24 = LDIWRdK 35
$r22 = COPY killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
$r18 = LDIRdK 0
RJMPk %bb.8
bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
MCP: CopyPropagateBlock entry
MCP: CopyPropagateBlock entry
MCP: CopyPropagateBlock
MCP: CopyPropagateBlock
MCP: CopyPropagateBlock
MCP: Copy is a deletion candidate: $r21r20 = COPY $r25r24
MCP: Copy is used - not dead: $r21r20 = COPY $r25r24
MCP: Copy is used - not dead: $r21r20 = COPY $r25r24
MCP: Copy is used - not dead: $r21r20 = COPY $r25r24
MCP: Copy is used - not dead: $r21r20 = COPY $r25r24
MCP: Copy is a deletion candidate: $r22 = COPY killed $r17
MCP: Copy is used - not dead: $r22 = COPY killed $r17
MCP: CopyPropagateBlock
MCP: Copy is a deletion candidate: $r17 = COPY killed $r24
MCP: CopyPropagateBlock
MCP: Copy is a deletion candidate: $r24 = COPY $r22
MCP: CopyPropagateBlock
MCP: CopyPropagateBlock
MCP: Copy is a deletion candidate: $r24 = COPY $r18
MCP: Copy is used - not dead: $r24 = COPY $r18
MCP: Copy is a deletion candidate: $r22 = COPY killed $r18
MCP: Copy is used - not dead: $r22 = COPY killed $r18
MCP: CopyPropagateBlock
MCP: CopyPropagateBlock
# *** IR Dump After Machine Copy Propagation Pass ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r22, $r24
CPIRdK $r24, 7, implicit-def $sreg
BREQk %bb.7, implicit killed $sreg
RJMPk %bb.1
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BRNEk %bb.10, implicit killed $sreg
RJMPk %bb.2
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRLOk %bb.3, implicit killed $sreg
RJMPk %bb.6
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRSHk %bb.4, implicit killed $sreg
RJMPk %bb.5
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r23r22 = ZEXT $r17, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
$r19r18 = LDIWRdK 100
$r25r24 = LDIWRdK 0
$r21r20 = COPY $r25r24
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r25r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, killed $r23r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
$r25r24 = LDIWRdK 34
$r22 = COPY killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.10
bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r24
$r17 = COPY killed $r24
RJMPk %bb.4
bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
liveins: $r22
$r24 = COPY $r22
RJMPk %bb.3
bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.8, implicit killed $sreg
RJMPk %bb.9
bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
liveins: $r18
$r24 = COPY $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
$r25r24 = LDIWRdK 35
$r22 = COPY killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
$r18 = LDIRdK 0
RJMPk %bb.8
bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
******** Post-regalloc Machine LICM: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_ ********
# *** IR Dump After Machine Loop Invariant Code Motion ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r22, $r24
CPIRdK $r24, 7, implicit-def $sreg
BREQk %bb.7, implicit killed $sreg
RJMPk %bb.1
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BRNEk %bb.10, implicit killed $sreg
RJMPk %bb.2
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRLOk %bb.3, implicit killed $sreg
RJMPk %bb.6
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRSHk %bb.4, implicit killed $sreg
RJMPk %bb.5
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r23r22 = ZEXT $r17, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
$r19r18 = LDIWRdK 100
$r25r24 = LDIWRdK 0
$r21r20 = COPY $r25r24
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r25r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, killed $r23r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
$r25r24 = LDIWRdK 34
$r22 = COPY killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.10
bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r24
$r17 = COPY killed $r24
RJMPk %bb.4
bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
liveins: $r22
$r24 = COPY $r22
RJMPk %bb.3
bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.8, implicit killed $sreg
RJMPk %bb.9
bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
liveins: $r18
$r24 = COPY $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
$r25r24 = LDIWRdK 35
$r22 = COPY killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
$r18 = LDIRdK 0
RJMPk %bb.8
bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After PostRA Machine Sink ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r22, $r24
CPIRdK $r24, 7, implicit-def $sreg
BREQk %bb.7, implicit killed $sreg
RJMPk %bb.1
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BRNEk %bb.10, implicit killed $sreg
RJMPk %bb.2
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRLOk %bb.3, implicit killed $sreg
RJMPk %bb.6
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRSHk %bb.4, implicit killed $sreg
RJMPk %bb.5
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r23r22 = ZEXT $r17, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
$r19r18 = LDIWRdK 100
$r25r24 = LDIWRdK 0
$r21r20 = COPY $r25r24
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r25r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, killed $r23r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
$r25r24 = LDIWRdK 34
$r22 = COPY killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.10
bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r24
$r17 = COPY killed $r24
RJMPk %bb.4
bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
liveins: $r22
$r24 = COPY $r22
RJMPk %bb.3
bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.8, implicit killed $sreg
RJMPk %bb.9
bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
liveins: $r18
$r24 = COPY $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
$r25r24 = LDIWRdK 35
$r22 = COPY killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
$r18 = LDIRdK 0
RJMPk %bb.8
bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
block-frequency: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
==================================================================
reverse-post-order-traversal
- 0: BB0[entry]
- 1: BB1[entry]
- 2: BB2[]
- 3: BB6[]
- 4: BB3[]
- 5: BB5[]
- 6: BB4[]
- 7: BB7[]
- 8: BB9[]
- 9: BB8[]
- 10: BB10[]
loop-detection
compute-mass-in-function
- node: BB0[entry]
=> [ local ] weight = 715827883, succ = BB7[]
=> [ local ] weight = 1431655765, succ = BB1[entry]
=> mass: ffffffffffffffff
=> assign aaaaaaa9ffffffff (5555555600000000) to BB1[entry]
=> assign 5555555600000000 (0000000000000000) to BB7[]
- node: BB1[entry]
=> [ local ] weight = 1073741825, succ = BB2[]
=> [ local ] weight = 1073741823, succ = BB10[]
=> mass: aaaaaaa9ffffffff
=> assign 5555555655555553 (55555553aaaaaaac) to BB2[]
=> assign 55555553aaaaaaac (0000000000000000) to BB10[]
- node: BB2[]
=> [ local ] weight = 1073741824, succ = BB6[]
=> [ local ] weight = 1073741824, succ = BB3[]
=> mass: 5555555655555553
=> assign 2aaaaaab2aaaaaa9 (2aaaaaab2aaaaaaa) to BB6[]
=> assign 2aaaaaab2aaaaaaa (0000000000000000) to BB3[]
- node: BB6[]
=> [ local ] weight = 2147483648, succ = BB3[]
=> mass: 2aaaaaab2aaaaaa9
=> assign 2aaaaaab2aaaaaa9 (0000000000000000) to BB3[]
- node: BB3[]
=> [ local ] weight = 1073741824, succ = BB5[]
=> [ local ] weight = 1073741824, succ = BB4[]
=> mass: 5555555655555553
=> assign 2aaaaaab2aaaaaa9 (2aaaaaab2aaaaaaa) to BB5[]
=> assign 2aaaaaab2aaaaaaa (0000000000000000) to BB4[]
- node: BB5[]
=> [ local ] weight = 2147483648, succ = BB4[]
=> mass: 2aaaaaab2aaaaaa9
=> assign 2aaaaaab2aaaaaa9 (0000000000000000) to BB4[]
- node: BB4[]
=> [ local ] weight = 2147483648, succ = BB10[]
=> mass: 5555555655555553
=> assign 5555555655555553 (0000000000000000) to BB10[]
- node: BB7[]
=> [ local ] weight = 1073741824, succ = BB9[]
=> [ local ] weight = 1073741824, succ = BB8[]
=> mass: 5555555600000000
=> assign 2aaaaaab00000000 (2aaaaaab00000000) to BB9[]
=> assign 2aaaaaab00000000 (0000000000000000) to BB8[]
- node: BB9[]
=> [ local ] weight = 2147483648, succ = BB8[]
=> mass: 2aaaaaab00000000
=> assign 2aaaaaab00000000 (0000000000000000) to BB8[]
- node: BB8[]
=> [ local ] weight = 2147483648, succ = BB10[]
=> mass: 5555555600000000
=> assign 5555555600000000 (0000000000000000) to BB10[]
- node: BB10[]
=> mass: ffffffffffffffff
float-to-int: min = 0.1666666667, max = 1.0, factor = 47.99999998
- BB0[entry]: float = 1.0, scaled = 47.99999998, int = 47
- BB1[entry]: float = 0.6666666665, scaled = 31.99999998, int = 31
- BB2[]: float = 0.3333333336, scaled = 16.0, int = 16
- BB6[]: float = 0.1666666668, scaled = 8.000000002, int = 8
- BB3[]: float = 0.3333333336, scaled = 16.0, int = 16
- BB5[]: float = 0.1666666668, scaled = 8.000000002, int = 8
- BB4[]: float = 0.3333333336, scaled = 16.0, int = 16
- BB7[]: float = 0.3333333335, scaled = 16.0, int = 15
- BB9[]: float = 0.1666666667, scaled = 8.0, int = 8
- BB8[]: float = 0.3333333335, scaled = 16.0, int = 15
- BB10[]: float = 1.0, scaled = 47.99999998, int = 47
block-frequency-info: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
- BB0[entry]: float = 1.0, int = 47
- BB1[entry]: float = 0.66667, int = 31
- BB2[]: float = 0.33333, int = 16
- BB3[]: float = 0.33333, int = 16
- BB4[]: float = 0.33333, int = 16
- BB5[]: float = 0.16667, int = 8
- BB6[]: float = 0.16667, int = 8
- BB7[]: float = 0.33333, int = 15
- BB8[]: float = 0.33333, int = 15
- BB9[]: float = 0.16667, int = 8
- BB10[]: float = 1.0, int = 47
Looking for trivial roots
Found a new trivial root: %bb.10
Last visited node: %bb.1
Looking for non-trivial roots
Total: 11, Num: 12
Discovered CFG nodes:
0: nullptr
1: nullptr
2: %bb.10
3: %bb.8
4: %bb.9
5: %bb.7
6: %bb.0
7: %bb.4
8: %bb.5
9: %bb.3
10: %bb.6
11: %bb.2
12: %bb.1
Found roots: %bb.10
discovered a new reachable node nullptr
discovered a new reachable node %bb.10
discovered a new reachable node %bb.8
discovered a new reachable node %bb.9
discovered a new reachable node %bb.7
discovered a new reachable node %bb.0
discovered a new reachable node %bb.4
discovered a new reachable node %bb.5
discovered a new reachable node %bb.3
discovered a new reachable node %bb.6
discovered a new reachable node %bb.2
discovered a new reachable node %bb.1
# *** IR Dump After Shrink Wrapping analysis ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r22, $r24
CPIRdK $r24, 7, implicit-def $sreg
BREQk %bb.7, implicit killed $sreg
RJMPk %bb.1
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BRNEk %bb.10, implicit killed $sreg
RJMPk %bb.2
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRLOk %bb.3, implicit killed $sreg
RJMPk %bb.6
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRSHk %bb.4, implicit killed $sreg
RJMPk %bb.5
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r23r22 = ZEXT $r17, implicit-def dead $sreg
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
$r19r18 = LDIWRdK 100
$r25r24 = LDIWRdK 0
$r21r20 = COPY $r25r24
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r25r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, killed $r23r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
$r25r24 = LDIWRdK 34
$r22 = COPY killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
RJMPk %bb.10
bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r24
$r17 = COPY killed $r24
RJMPk %bb.4
bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
liveins: $r22
$r24 = COPY $r22
RJMPk %bb.3
bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.8, implicit killed $sreg
RJMPk %bb.9
bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
liveins: $r18
$r24 = COPY $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
$r25r24 = LDIWRdK 35
$r22 = COPY killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp
bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
$r18 = LDIRdK 0
RJMPk %bb.8
bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
alloc FI(0) at SP[-3]
# *** IR Dump After Prologue/Epilogue Insertion & Frame Finalization ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Frame Objects:
fi#0: size=1, align=1, at location [SP-1]
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.7(0x2aaaaaab), %bb.1(0x55555555); %bb.7(33.33%), %bb.1(66.67%)
liveins: $r22, $r24, $r17
frame-setup PUSHRr killed $r17, implicit-def $sp, implicit $sp
CPIRdK $r24, 7, implicit-def $sreg
BREQk %bb.7, implicit killed $sreg
RJMPk %bb.1
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.10(0x3fffffff); %bb.2(50.00%), %bb.10(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BRNEk %bb.10, implicit killed $sreg
RJMPk %bb.2
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.6(0x40000000), %bb.3(0x40000000); %bb.6(200.00%), %bb.3(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRLOk %bb.3, implicit killed $sreg
RJMPk %bb.6
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.6
successors: %bb.5(0x40000000), %bb.4(0x40000000); %bb.5(200.00%), %bb.4(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRSHk %bb.4, implicit killed $sreg
RJMPk %bb.5
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.5
successors: %bb.10(0x80000000); %bb.10(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r23r22 = ZEXT $r17, implicit-def dead $sreg
$r19r18 = LDIWRdK 100
$r25r24 = LDIWRdK 0
$r21r20 = COPY $r25r24
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r25r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, killed $r23r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
$r25r24 = LDIWRdK 34
$r22 = COPY killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
RJMPk %bb.10
bb.5 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r24
$r17 = COPY killed $r24
RJMPk %bb.4
bb.6 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
liveins: $r22
$r24 = COPY $r22
RJMPk %bb.3
bb.7 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.8(0x40000000); %bb.9(200.00%), %bb.8(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.8, implicit killed $sreg
RJMPk %bb.9
bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
successors: %bb.10(0x80000000); %bb.10(100.00%)
liveins: $r18
$r24 = COPY $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r25r24 = LDIWRdK 35
$r22 = COPY killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
$r18 = LDIRdK 0
RJMPk %bb.8
bb.10 (%ir-block.9):
; predecessors: %bb.1, %bb.4, %bb.8
$r17 = POPRd implicit-def $sp, implicit $sp
RET
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
*** LOOKS GOOD TO HERE ***
*** PROBLEMS START HERE? ***
vvv
TryTailMergeBlocks: %bb.8, %bb.10
Looking for common tails of at least 3 instructions
TryTailMergeBlocks: %bb.2, %bb.6
with successor %bb.3
which has fall-through from %bb.2
Looking for common tails of at least 3 instructions
TryTailMergeBlocks: %bb.3, %bb.5
with successor %bb.4
which has fall-through from %bb.3
Looking for common tails of at least 3 instructions
TryTailMergeBlocks: %bb.7, %bb.9
with successor %bb.8
which has fall-through from %bb.7
Looking for common tails of at least 3 instructions
TryTailMergeBlocks: %bb.1, %bb.4
with successor %bb.10
which has fall-through from %bb.9
Looking for common tails of at least 3 instructions
Moving MBB: bb.8 (%ir-block.8):
; predecessors: %bb.7, %bb.9
liveins: $r18
$r24 = COPY $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r25r24 = LDIWRdK 35
$r22 = COPY killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
To make fallthrough to: bb.9 (%ir-block.8):
; predecessors: %bb.7
successors: %bb.8(0x80000000); %bb.8(200.00%)
$r18 = LDIRdK 0
RJMPk %bb.8
TryTailMergeBlocks: %bb.10, %bb.8
Looking for common tails of at least 3 instructions
TryTailMergeBlocks: %bb.2, %bb.6
with successor %bb.3
which has fall-through from %bb.2
Looking for common tails of at least 3 instructions
TryTailMergeBlocks: %bb.3, %bb.5
with successor %bb.4
which has fall-through from %bb.3
Looking for common tails of at least 3 instructions
TryTailMergeBlocks: %bb.1, %bb.4
with successor %bb.10
which has fall-through from %bb.4
Looking for common tails of at least 3 instructions
TryTailMergeBlocks: %bb.7, %bb.9
with successor %bb.8
which has fall-through from %bb.9
Looking for common tails of at least 3 instructions
# *** IR Dump After Control Flow Optimizer ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Frame Objects:
fi#0: size=1, align=1, at location [SP-1]
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.8(0x2aaaaaab), %bb.1(0x55555555); %bb.8(33.33%), %bb.1(66.67%)
liveins: $r22, $r24, $r17
frame-setup PUSHRr killed $r17, implicit-def $sp, implicit $sp
CPIRdK $r24, 7, implicit-def $sreg
BREQk %bb.8, implicit killed $sreg
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.5(0x3fffffff); %bb.2(50.00%), %bb.5(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BRNEk %bb.5, implicit $sreg
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.7(0x40000000), %bb.3(0x40000000); %bb.7(200.00%), %bb.3(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.7
successors: %bb.6(0x40000000), %bb.4(0x40000000); %bb.6(200.00%), %bb.4(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRLOk %bb.6, implicit $sreg
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.6
successors: %bb.5(0x80000000); %bb.5(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r23r22 = ZEXT $r17, implicit-def dead $sreg
$r19r18 = LDIWRdK 100
$r25r24 = LDIWRdK 0
$r21r20 = COPY $r25r24
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r25r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, killed $r23r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
$r25r24 = LDIWRdK 34
$r22 = COPY killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
bb.5 (%ir-block.9):
; predecessors: %bb.1, %bb.4
$r17 = POPRd implicit-def $sp, implicit $sp
RET
bb.6 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r24
$r17 = COPY killed $r24
RJMPk %bb.4
bb.7 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
liveins: $r22
$r24 = COPY $r22
RJMPk %bb.3
bb.8 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.10(0x40000000); %bb.9(200.00%), %bb.10(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.10, implicit $sreg
bb.9 (%ir-block.8):
; predecessors: %bb.8
successors: %bb.10(0x80000000); %bb.10(200.00%)
$r18 = LDIRdK 0
bb.10 (%ir-block.8):
; predecessors: %bb.8, %bb.9
liveins: $r18
$r24 = COPY $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r25r24 = LDIWRdK 35
$r22 = COPY killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
*** MACHINE CODE IS BROKEN NOW !!! ****
*** Tail-duplicating %bb.5
*** Tail-duplicating %bb.6
*** Tail-duplicating %bb.7
# *** IR Dump After Tail Duplication ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Frame Objects:
fi#0: size=1, align=1, at location [SP-1]
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.8(0x2aaaaaab), %bb.1(0x55555555); %bb.8(33.33%), %bb.1(66.67%)
liveins: $r22, $r24, $r17
frame-setup PUSHRr killed $r17, implicit-def $sp, implicit $sp
CPIRdK $r24, 7, implicit-def $sreg
BREQk %bb.8, implicit killed $sreg
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.5(0x3fffffff); %bb.2(50.00%), %bb.5(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BRNEk %bb.5, implicit $sreg
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.7(0x40000000), %bb.3(0x40000000); %bb.7(200.00%), %bb.3(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.7
successors: %bb.6(0x40000000), %bb.4(0x40000000); %bb.6(200.00%), %bb.4(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRLOk %bb.6, implicit $sreg
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.6
successors: %bb.5(0x80000000); %bb.5(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r23r22 = ZEXT $r17, implicit-def dead $sreg
$r19r18 = LDIWRdK 100
$r25r24 = LDIWRdK 0
$r21r20 = COPY $r25r24
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r25r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, killed $r23r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
$r25r24 = LDIWRdK 34
$r22 = COPY killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
bb.5 (%ir-block.9):
; predecessors: %bb.1, %bb.4
$r17 = POPRd implicit-def $sp, implicit $sp
RET
bb.6 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r24
$r17 = COPY killed $r24
RJMPk %bb.4
bb.7 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
liveins: $r22
$r24 = COPY $r22
RJMPk %bb.3
bb.8 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.10(0x40000000); %bb.9(200.00%), %bb.10(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.10, implicit $sreg
bb.9 (%ir-block.8):
; predecessors: %bb.8
successors: %bb.10(0x80000000); %bb.10(200.00%)
$r18 = LDIRdK 0
bb.10 (%ir-block.8):
; predecessors: %bb.8, %bb.9
liveins: $r18
$r24 = COPY $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r25r24 = LDIWRdK 35
$r22 = COPY killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
MCP: CopyPropagateBlock entry
MCP: CopyPropagateBlock entry
MCP: CopyPropagateBlock
MCP: CopyPropagateBlock
MCP: CopyPropagateBlock
MCP: Copy is a deletion candidate: $r21r20 = COPY $r25r24
MCP: Copy is used - not dead: $r21r20 = COPY $r25r24
MCP: Copy is used - not dead: $r21r20 = COPY $r25r24
MCP: Copy is used - not dead: $r21r20 = COPY $r25r24
MCP: Copy is used - not dead: $r21r20 = COPY $r25r24
MCP: Copy is a deletion candidate: $r22 = COPY killed $r17
MCP: Copy is used - not dead: $r22 = COPY killed $r17
MCP: CopyPropagateBlock
MCP: CopyPropagateBlock
MCP: Copy is a deletion candidate: $r17 = COPY killed $r24
MCP: CopyPropagateBlock
MCP: Copy is a deletion candidate: $r24 = COPY $r22
MCP: CopyPropagateBlock
MCP: CopyPropagateBlock
MCP: CopyPropagateBlock
MCP: Copy is a deletion candidate: $r24 = COPY $r18
MCP: Copy is used - not dead: $r24 = COPY $r18
MCP: Copy is a deletion candidate: $r22 = COPY killed $r18
MCP: Copy is used - not dead: $r22 = COPY killed $r18
# *** IR Dump After Machine Copy Propagation Pass ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Frame Objects:
fi#0: size=1, align=1, at location [SP-1]
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.8(0x2aaaaaab), %bb.1(0x55555555); %bb.8(33.33%), %bb.1(66.67%)
liveins: $r22, $r24, $r17
frame-setup PUSHRr killed $r17, implicit-def $sp, implicit $sp
CPIRdK $r24, 7, implicit-def $sreg
BREQk %bb.8, implicit killed $sreg
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.5(0x3fffffff); %bb.2(50.00%), %bb.5(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BRNEk %bb.5, implicit $sreg
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.7(0x40000000), %bb.3(0x40000000); %bb.7(200.00%), %bb.3(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.7
successors: %bb.6(0x40000000), %bb.4(0x40000000); %bb.6(200.00%), %bb.4(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRLOk %bb.6, implicit $sreg
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.6
successors: %bb.5(0x80000000); %bb.5(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r23r22 = ZEXT $r17, implicit-def dead $sreg
$r19r18 = LDIWRdK 100
$r25r24 = LDIWRdK 0
$r21r20 = COPY $r25r24
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r25r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, killed $r23r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
$r25r24 = LDIWRdK 34
$r22 = COPY killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
bb.5 (%ir-block.9):
; predecessors: %bb.1, %bb.4
$r17 = POPRd implicit-def $sp, implicit $sp
RET
bb.6 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r24
$r17 = COPY killed $r24
RJMPk %bb.4
bb.7 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
liveins: $r22
$r24 = COPY $r22
RJMPk %bb.3
bb.8 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.10(0x40000000); %bb.9(200.00%), %bb.10(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.10, implicit $sreg
bb.9 (%ir-block.8):
; predecessors: %bb.8
successors: %bb.10(0x80000000); %bb.10(200.00%)
$r18 = LDIRdK 0
bb.10 (%ir-block.8):
; predecessors: %bb.8, %bb.9
liveins: $r18
$r24 = COPY $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r25r24 = LDIWRdK 35
$r22 = COPY killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
Machine Function
********** EXPANDING POST-RA PSEUDO INSTRS **********
********** Function: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
real copy: $r21r20 = COPY $r25r24
replaced by: $r21 = MOVRdRr $r25
real copy: $r22 = COPY killed $r17
replaced by: $r22 = MOVRdRr killed $r17
real copy: $r17 = COPY killed $r24
replaced by: $r17 = MOVRdRr killed $r24
real copy: $r24 = COPY $r22
replaced by: $r24 = MOVRdRr $r22
real copy: $r24 = COPY $r18
replaced by: $r24 = MOVRdRr $r18
real copy: $r22 = COPY killed $r18
replaced by: $r22 = MOVRdRr killed $r18
# *** IR Dump After Post-RA pseudo instruction expansion pass ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Frame Objects:
fi#0: size=1, align=1, at location [SP-1]
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.8(0x2aaaaaab), %bb.1(0x55555555); %bb.8(33.33%), %bb.1(66.67%)
liveins: $r22, $r24, $r17
frame-setup PUSHRr killed $r17, implicit-def $sp, implicit $sp
CPIRdK $r24, 7, implicit-def $sreg
BREQk %bb.8, implicit killed $sreg
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.5(0x3fffffff); %bb.2(50.00%), %bb.5(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BRNEk %bb.5, implicit $sreg
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.7(0x40000000), %bb.3(0x40000000); %bb.7(200.00%), %bb.3(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.7
successors: %bb.6(0x40000000), %bb.4(0x40000000); %bb.6(200.00%), %bb.4(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRLOk %bb.6, implicit $sreg
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.6
successors: %bb.5(0x80000000); %bb.5(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r23r22 = ZEXT $r17, implicit-def dead $sreg
$r19r18 = LDIWRdK 100
$r25r24 = LDIWRdK 0
$r20 = MOVRdRr $r24
$r21 = MOVRdRr $r25
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r25r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, killed $r23r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
$r25r24 = LDIWRdK 34
$r22 = MOVRdRr killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
bb.5 (%ir-block.9):
; predecessors: %bb.1, %bb.4
$r17 = POPRd implicit-def $sp, implicit $sp
RET
bb.6 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r24
$r17 = MOVRdRr killed $r24
RJMPk %bb.4
bb.7 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
liveins: $r22
$r24 = MOVRdRr $r22
RJMPk %bb.3
bb.8 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.10(0x40000000); %bb.9(200.00%), %bb.10(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.10, implicit $sreg
bb.9 (%ir-block.8):
; predecessors: %bb.8
successors: %bb.10(0x80000000); %bb.10(200.00%)
$r18 = LDIRdK 0
bb.10 (%ir-block.8):
; predecessors: %bb.8, %bb.9
liveins: $r18
$r24 = MOVRdRr $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r25r24 = LDIWRdK 35
$r22 = MOVRdRr killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After AVR memory operation relaxation pass ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Frame Objects:
fi#0: size=1, align=1, at location [SP-1]
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.8(0x2aaaaaab), %bb.1(0x55555555); %bb.8(33.33%), %bb.1(66.67%)
liveins: $r22, $r24, $r17
frame-setup PUSHRr killed $r17, implicit-def $sp, implicit $sp
CPIRdK $r24, 7, implicit-def $sreg
BREQk %bb.8, implicit killed $sreg
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.5(0x3fffffff); %bb.2(50.00%), %bb.5(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BRNEk %bb.5, implicit $sreg
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.7(0x40000000), %bb.3(0x40000000); %bb.7(200.00%), %bb.3(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.7
successors: %bb.6(0x40000000), %bb.4(0x40000000); %bb.6(200.00%), %bb.4(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRLOk %bb.6, implicit $sreg
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.6
successors: %bb.5(0x80000000); %bb.5(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r23r22 = ZEXT $r17, implicit-def dead $sreg
$r19r18 = LDIWRdK 100
$r25r24 = LDIWRdK 0
$r20 = MOVRdRr $r24
$r21 = MOVRdRr $r25
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
STSWKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r25r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSWKRr @_Tv4main7delayUsVs6UInt32, killed $r23r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
$r25r24 = LDIWRdK 34
$r22 = MOVRdRr killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
bb.5 (%ir-block.9):
; predecessors: %bb.1, %bb.4
$r17 = POPRd implicit-def $sp, implicit $sp
RET
bb.6 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r24
$r17 = MOVRdRr killed $r24
RJMPk %bb.4
bb.7 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
liveins: $r22
$r24 = MOVRdRr $r22
RJMPk %bb.3
bb.8 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.10(0x40000000); %bb.9(200.00%), %bb.10(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.10, implicit $sreg
bb.9 (%ir-block.8):
; predecessors: %bb.8
successors: %bb.10(0x80000000); %bb.10(200.00%)
$r18 = LDIRdK 0
bb.10 (%ir-block.8):
; predecessors: %bb.8, %bb.9
liveins: $r18
$r24 = MOVRdRr $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r25r24 = LDIWRdK 35
$r22 = MOVRdRr killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After AVR pseudo instruction expansion pass ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Frame Objects:
fi#0: size=1, align=1, at location [SP-1]
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.8(0x2aaaaaab), %bb.1(0x55555555); %bb.8(33.33%), %bb.1(66.67%)
liveins: $r22, $r24, $r17
frame-setup PUSHRr killed $r17, implicit-def $sp, implicit $sp
CPIRdK $r24, 7, implicit-def $sreg
BREQk %bb.8, implicit killed $sreg
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.5(0x3fffffff); %bb.2(50.00%), %bb.5(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BRNEk %bb.5, implicit $sreg
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.7(0x40000000), %bb.3(0x40000000); %bb.7(200.00%), %bb.3(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.7
successors: %bb.6(0x40000000), %bb.4(0x40000000); %bb.6(200.00%), %bb.4(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRLOk %bb.6, implicit $sreg
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.6
successors: %bb.5(0x80000000); %bb.5(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r22 = MOVRdRr $r17
$r23 = EORRdRr killed $r23, killed $r23, implicit-def dead $sreg
$r18 = LDIRdK 100
$r19 = LDIRdK 0
$r24 = LDIRdK 0
$r25 = LDIRdK 0
$r20 = MOVRdRr $r24
$r21 = MOVRdRr $r25
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
STSKRr @_Tv4main7delayUsVs6UInt32 + 3, killed $r25 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 1, killed $r23 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
STSKRr @_Tv4main7delayUsVs6UInt32, killed $r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
$r24 = LDIRdK 34
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
bb.5 (%ir-block.9):
; predecessors: %bb.1, %bb.4
$r17 = POPRd implicit-def $sp, implicit $sp
RET
bb.6 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r24
$r17 = MOVRdRr killed $r24
RJMPk %bb.4
bb.7 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
liveins: $r22
$r24 = MOVRdRr $r22
RJMPk %bb.3
bb.8 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.10(0x40000000); %bb.9(200.00%), %bb.10(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.10, implicit $sreg
bb.9 (%ir-block.8):
; predecessors: %bb.8
successors: %bb.10(0x80000000); %bb.10(200.00%)
$r18 = LDIRdK 0
bb.10 (%ir-block.8):
; predecessors: %bb.8, %bb.9
liveins: $r18
$r24 = MOVRdRr $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r24 = LDIRdK 35
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
discovered a new reachable node %bb.0
discovered a new reachable node %bb.8
discovered a new reachable node %bb.9
discovered a new reachable node %bb.10
discovered a new reachable node %bb.1
discovered a new reachable node %bb.2
discovered a new reachable node %bb.7
discovered a new reachable node %bb.3
discovered a new reachable node %bb.6
discovered a new reachable node %bb.4
discovered a new reachable node %bb.5
# *** IR Dump After Post RA top-down list latency scheduler ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Frame Objects:
fi#0: size=1, align=1, at location [SP-1]
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.8(0x2aaaaaab), %bb.1(0x55555555); %bb.8(33.33%), %bb.1(66.67%)
liveins: $r22, $r24, $r17
frame-setup PUSHRr killed $r17, implicit-def $sp, implicit $sp
CPIRdK $r24, 7, implicit-def $sreg
BREQk %bb.8, implicit killed $sreg
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.5(0x3fffffff); %bb.2(50.00%), %bb.5(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BRNEk %bb.5, implicit $sreg
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.7(0x40000000), %bb.3(0x40000000); %bb.7(200.00%), %bb.3(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.7
successors: %bb.6(0x40000000), %bb.4(0x40000000); %bb.6(200.00%), %bb.4(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRLOk %bb.6, implicit $sreg
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.6
successors: %bb.5(0x80000000); %bb.5(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r22 = MOVRdRr $r17
$r23 = EORRdRr killed $r23, killed $r23, implicit-def dead $sreg
$r18 = LDIRdK 100
$r19 = LDIRdK 0
$r24 = LDIRdK 0
$r25 = LDIRdK 0
$r20 = MOVRdRr $r24
$r21 = MOVRdRr $r25
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
STSKRr @_Tv4main7delayUsVs6UInt32 + 3, killed $r25 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 1, killed $r23 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
STSKRr @_Tv4main7delayUsVs6UInt32, killed $r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
$r24 = LDIRdK 34
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
bb.5 (%ir-block.9):
; predecessors: %bb.1, %bb.4
$r17 = POPRd implicit-def $sp, implicit $sp
RET
bb.6 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r24
$r17 = MOVRdRr killed $r24
RJMPk %bb.4
bb.7 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
liveins: $r22
$r24 = MOVRdRr $r22
RJMPk %bb.3
bb.8 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.10(0x40000000); %bb.9(200.00%), %bb.10(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.10, implicit $sreg
bb.9 (%ir-block.8):
; predecessors: %bb.8
successors: %bb.10(0x80000000); %bb.10(200.00%)
$r18 = LDIRdK 0
bb.10 (%ir-block.8):
; predecessors: %bb.8, %bb.9
liveins: $r18
$r24 = MOVRdRr $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r24 = LDIRdK 35
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Analyze Machine Code For Garbage Collection ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Frame Objects:
fi#0: size=1, align=1, at location [SP-1]
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.8(0x2aaaaaab), %bb.1(0x55555555); %bb.8(33.33%), %bb.1(66.67%)
liveins: $r22, $r24, $r17
frame-setup PUSHRr killed $r17, implicit-def $sp, implicit $sp
CPIRdK $r24, 7, implicit-def $sreg
BREQk %bb.8, implicit killed $sreg
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.5(0x3fffffff); %bb.2(50.00%), %bb.5(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BRNEk %bb.5, implicit $sreg
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.7(0x40000000), %bb.3(0x40000000); %bb.7(200.00%), %bb.3(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRSHk %bb.7, implicit $sreg
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.7
successors: %bb.6(0x40000000), %bb.4(0x40000000); %bb.6(200.00%), %bb.4(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRLOk %bb.6, implicit $sreg
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.6
successors: %bb.5(0x80000000); %bb.5(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r22 = MOVRdRr $r17
$r23 = EORRdRr killed $r23, killed $r23, implicit-def dead $sreg
$r18 = LDIRdK 100
$r19 = LDIRdK 0
$r24 = LDIRdK 0
$r25 = LDIRdK 0
$r20 = MOVRdRr $r24
$r21 = MOVRdRr $r25
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
STSKRr @_Tv4main7delayUsVs6UInt32 + 3, killed $r25 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 1, killed $r23 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
STSKRr @_Tv4main7delayUsVs6UInt32, killed $r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
$r24 = LDIRdK 34
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
bb.5 (%ir-block.9):
; predecessors: %bb.1, %bb.4
$r17 = POPRd implicit-def $sp, implicit $sp
RET
bb.6 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r24
$r17 = MOVRdRr killed $r24
RJMPk %bb.4
bb.7 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
liveins: $r22
$r24 = MOVRdRr $r22
RJMPk %bb.3
bb.8 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.10(0x40000000); %bb.9(200.00%), %bb.10(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.10, implicit $sreg
bb.9 (%ir-block.8):
; predecessors: %bb.8
successors: %bb.10(0x80000000); %bb.10(200.00%)
$r18 = LDIRdK 0
bb.10 (%ir-block.8):
; predecessors: %bb.8, %bb.9
liveins: $r18
$r24 = MOVRdRr $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r24 = LDIRdK 35
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
block-frequency: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
==================================================================
reverse-post-order-traversal
- 0: BB0[entry]
- 1: BB1[entry]
- 2: BB2[]
- 3: BB7[]
- 4: BB3[]
- 5: BB6[]
- 6: BB4[]
- 7: BB5[]
- 8: BB8[]
- 9: BB9[]
- 10: BB10[]
loop-detection
compute-mass-in-function
- node: BB0[entry]
=> [ local ] weight = 715827883, succ = BB8[]
=> [ local ] weight = 1431655765, succ = BB1[entry]
=> mass: ffffffffffffffff
=> assign aaaaaaa9ffffffff (5555555600000000) to BB1[entry]
=> assign 5555555600000000 (0000000000000000) to BB8[]
- node: BB1[entry]
=> [ local ] weight = 1073741825, succ = BB2[]
=> [ local ] weight = 1073741823, succ = BB5[]
=> mass: aaaaaaa9ffffffff
=> assign 5555555655555553 (55555553aaaaaaac) to BB2[]
=> assign 55555553aaaaaaac (0000000000000000) to BB5[]
- node: BB2[]
=> [ local ] weight = 1073741824, succ = BB7[]
=> [ local ] weight = 1073741824, succ = BB3[]
=> mass: 5555555655555553
=> assign 2aaaaaab2aaaaaa9 (2aaaaaab2aaaaaaa) to BB7[]
=> assign 2aaaaaab2aaaaaaa (0000000000000000) to BB3[]
- node: BB7[]
=> [ local ] weight = 2147483648, succ = BB3[]
=> mass: 2aaaaaab2aaaaaa9
=> assign 2aaaaaab2aaaaaa9 (0000000000000000) to BB3[]
- node: BB3[]
=> [ local ] weight = 1073741824, succ = BB6[]
=> [ local ] weight = 1073741824, succ = BB4[]
=> mass: 5555555655555553
=> assign 2aaaaaab2aaaaaa9 (2aaaaaab2aaaaaaa) to BB6[]
=> assign 2aaaaaab2aaaaaaa (0000000000000000) to BB4[]
- node: BB6[]
=> [ local ] weight = 2147483648, succ = BB4[]
=> mass: 2aaaaaab2aaaaaa9
=> assign 2aaaaaab2aaaaaa9 (0000000000000000) to BB4[]
- node: BB4[]
=> [ local ] weight = 2147483648, succ = BB5[]
=> mass: 5555555655555553
=> assign 5555555655555553 (0000000000000000) to BB5[]
- node: BB5[]
=> mass: aaaaaaa9ffffffff
- node: BB8[]
=> [ local ] weight = 1073741824, succ = BB9[]
=> [ local ] weight = 1073741824, succ = BB10[]
=> mass: 5555555600000000
=> assign 2aaaaaab00000000 (2aaaaaab00000000) to BB9[]
=> assign 2aaaaaab00000000 (0000000000000000) to BB10[]
- node: BB9[]
=> [ local ] weight = 2147483648, succ = BB10[]
=> mass: 2aaaaaab00000000
=> assign 2aaaaaab00000000 (0000000000000000) to BB10[]
- node: BB10[]
=> mass: 5555555600000000
float-to-int: min = 0.1666666667, max = 1.0, factor = 47.99999998
- BB0[entry]: float = 1.0, scaled = 47.99999998, int = 47
- BB1[entry]: float = 0.6666666665, scaled = 31.99999998, int = 31
- BB2[]: float = 0.3333333336, scaled = 16.0, int = 16
- BB7[]: float = 0.1666666668, scaled = 8.000000002, int = 8
- BB3[]: float = 0.3333333336, scaled = 16.0, int = 16
- BB6[]: float = 0.1666666668, scaled = 8.000000002, int = 8
- BB4[]: float = 0.3333333336, scaled = 16.0, int = 16
- BB5[]: float = 0.6666666665, scaled = 31.99999998, int = 31
- BB8[]: float = 0.3333333335, scaled = 16.0, int = 15
- BB9[]: float = 0.1666666667, scaled = 8.0, int = 8
- BB10[]: float = 0.3333333335, scaled = 16.0, int = 15
block-frequency-info: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
- BB0[entry]: float = 1.0, int = 47
- BB1[entry]: float = 0.66667, int = 31
- BB2[]: float = 0.33333, int = 16
- BB3[]: float = 0.33333, int = 16
- BB4[]: float = 0.33333, int = 16
- BB5[]: float = 0.66667, int = 31
- BB6[]: float = 0.16667, int = 8
- BB7[]: float = 0.16667, int = 8
- BB8[]: float = 0.33333, int = 15
- BB9[]: float = 0.16667, int = 8
- BB10[]: float = 0.33333, int = 15
Looking for trivial roots
Found a new trivial root: %bb.5
Last visited node: %bb.0
Found a new trivial root: %bb.10
Last visited node: %bb.8
Looking for non-trivial roots
Total: 11, Num: 12
Discovered CFG nodes:
0: nullptr
1: nullptr
2: %bb.5
3: %bb.4
4: %bb.6
5: %bb.3
6: %bb.7
7: %bb.2
8: %bb.1
9: %bb.0
10: %bb.10
11: %bb.9
12: %bb.8
Found roots: %bb.5 %bb.10
discovered a new reachable node nullptr
discovered a new reachable node %bb.5
discovered a new reachable node %bb.4
discovered a new reachable node %bb.6
discovered a new reachable node %bb.3
discovered a new reachable node %bb.7
discovered a new reachable node %bb.2
discovered a new reachable node %bb.1
discovered a new reachable node %bb.0
discovered a new reachable node %bb.10
discovered a new reachable node %bb.9
discovered a new reachable node %bb.8
Pre-computing triangle chains.
Selecting best successor for: %bb.0 ('entry')
Candidate: %bb.8 (''), probability: 0x2aaaaaab / 0x80000000 = 33.33%
Setting it as best candidate
Candidate: %bb.1 ('entry'), probability: 0x55555555 / 0x80000000 = 66.67%
Setting it as best candidate
Selected: %bb.1 ('entry')
Redoing tail duplication for Succ#1
*** Tail-duplicating %bb.1
Merging from %bb.0 ('entry') to %bb.1 ('entry')
Selecting best successor for: %bb.1 ('entry')
Candidate: %bb.2 (''), probability: 0x40000001 / 0x80000000 = 50.00%
Setting it as best candidate
Not a candidate: %bb.5 ('') -> 0x3fffffff / 0x80000000 = 50.00% (prob) (non-cold CFG conflict)
Selected: %bb.2 ('')
Merging from %bb.1 ('entry') to %bb.2 ('')
Selecting best successor for: %bb.2 ('')
Candidate: %bb.7 (''), probability: 0x40000000 / 0x80000000 = 50.00%
Setting it as best candidate
Not a candidate: %bb.3 ('') -> 0x40000000 / 0x80000000 = 50.00% (prob) (non-cold CFG conflict)
Selected: %bb.7 ('')
Merging from %bb.2 ('') to %bb.7 ('')
Selecting best successor for: %bb.7 ('')
Candidate: %bb.3 (''), probability: 0x80000000 / 0x80000000 = 100.00%
Setting it as best candidate
Selected: %bb.3 ('')
Merging from %bb.7 ('') to %bb.3 ('')
Selecting best successor for: %bb.3 ('')
Candidate: %bb.6 (''), probability: 0x40000000 / 0x80000000 = 50.00%
Setting it as best candidate
Not a candidate: %bb.4 ('') -> 0x40000000 / 0x80000000 = 50.00% (prob) (non-cold CFG conflict)
Selected: %bb.6 ('')
Merging from %bb.3 ('') to %bb.6 ('')
Selecting best successor for: %bb.6 ('')
Candidate: %bb.4 (''), probability: 0x80000000 / 0x80000000 = 100.00%
Setting it as best candidate
Selected: %bb.4 ('')
Merging from %bb.6 ('') to %bb.4 ('')
Selecting best successor for: %bb.4 ('')
Candidate: %bb.5 (''), probability: 0x80000000 / 0x80000000 = 100.00%
Setting it as best candidate
Selected: %bb.5 ('')
Redoing tail duplication for Succ#5
*** Tail-duplicating %bb.5
Merging from %bb.4 ('') to %bb.5 ('')
Selecting best successor for: %bb.5 ('')
%bb.8 ('') -> 0.3191489362 (freq)
Merging from %bb.5 ('') to %bb.8 ('')
Selecting best successor for: %bb.8 ('')
Candidate: %bb.9 (''), probability: 0x40000000 / 0x80000000 = 50.00%
Setting it as best candidate
Not a candidate: %bb.10 ('') -> 0x40000000 / 0x80000000 = 50.00% (prob) (non-cold CFG conflict)
Selected: %bb.9 ('')
Merging from %bb.8 ('') to %bb.9 ('')
Selecting best successor for: %bb.9 ('')
Candidate: %bb.10 (''), probability: 0x80000000 / 0x80000000 = 100.00%
Setting it as best candidate
Selected: %bb.10 ('')
Merging from %bb.9 ('') to %bb.10 ('')
Selecting best successor for: %bb.10 ('')
Finished forming chain for header block %bb.0 ('entry')
[MBP] Function: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
Placing chain %bb.0 ('entry')
... %bb.1 ('entry')
... %bb.2 ('')
... %bb.7 ('')
... %bb.3 ('')
... %bb.6 ('')
... %bb.4 ('')
... %bb.5 ('')
... %bb.8 ('')
... %bb.9 ('')
... %bb.10 ('')
TryTailMergeBlocks: %bb.2, %bb.7
with successor %bb.3
which has fall-through from %bb.7
Looking for common tails of at least 3 instructions
TryTailMergeBlocks: %bb.3, %bb.6
with successor %bb.4
which has fall-through from %bb.6
Looking for common tails of at least 3 instructions
TryTailMergeBlocks: %bb.1, %bb.4
with successor %bb.5
which has fall-through from %bb.4
Looking for common tails of at least 3 instructions
TryTailMergeBlocks: %bb.8, %bb.9
with successor %bb.10
which has fall-through from %bb.9
Looking for common tails of at least 3 instructions
# *** IR Dump After Branch Probability Basic Block Placement ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Frame Objects:
fi#0: size=1, align=1, at location [SP-1]
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.8(0x2aaaaaab), %bb.1(0x55555555); %bb.8(33.33%), %bb.1(66.67%)
liveins: $r22, $r24, $r17
frame-setup PUSHRr killed $r17, implicit-def $sp, implicit $sp
CPIRdK $r24, 7, implicit-def $sreg
BREQk %bb.8, implicit killed $sreg
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.5(0x3fffffff); %bb.2(50.00%), %bb.5(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BRNEk %bb.5, implicit $sreg
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.7(0x40000000), %bb.3(0x40000000); %bb.7(200.00%), %bb.3(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRLOk %bb.3, implicit $sreg
bb.7 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.3(0x80000000); %bb.3(200.00%)
liveins: $r22
$r24 = MOVRdRr $r22
bb.3 (%ir-block.2):
; predecessors: %bb.2, %bb.7
successors: %bb.6(0x40000000), %bb.4(0x40000000); %bb.6(200.00%), %bb.4(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRSHk %bb.4, implicit $sreg
bb.6 (%ir-block.2):
; predecessors: %bb.3
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r24
$r17 = MOVRdRr killed $r24
bb.4 (%ir-block.2):
; predecessors: %bb.3, %bb.6
successors: %bb.5(0x80000000); %bb.5(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r22 = MOVRdRr $r17
$r23 = EORRdRr killed $r23, killed $r23, implicit-def dead $sreg
$r18 = LDIRdK 100
$r19 = LDIRdK 0
$r24 = LDIRdK 0
$r25 = LDIRdK 0
$r20 = MOVRdRr $r24
$r21 = MOVRdRr $r25
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
STSKRr @_Tv4main7delayUsVs6UInt32 + 3, killed $r25 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 1, killed $r23 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
STSKRr @_Tv4main7delayUsVs6UInt32, killed $r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
$r24 = LDIRdK 34
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
bb.5 (%ir-block.9):
; predecessors: %bb.1, %bb.4
$r17 = POPRd implicit-def $sp, implicit $sp
RET
bb.8 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.10(0x40000000); %bb.9(200.00%), %bb.10(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.10, implicit $sreg
bb.9 (%ir-block.8):
; predecessors: %bb.8
successors: %bb.10(0x80000000); %bb.10(200.00%)
$r18 = LDIRdK 0
bb.10 (%ir-block.8):
; predecessors: %bb.8, %bb.9
liveins: $r18
$r24 = MOVRdRr $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r24 = LDIRdK 35
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
***** BranchRelaxation *****
Basic blocks before relaxation
bb.0 offset=00000000 size=0x6
bb.1 offset=00000006 size=0x4
bb.2 offset=0000000a size=0x6
bb.3 offset=00000010 size=0x2
bb.4 offset=00000012 size=0x6
bb.5 offset=00000018 size=0x2
bb.6 offset=0000001a size=0x32
bb.7 offset=0000004c size=0x4
bb.8 offset=00000050 size=0x6
bb.9 offset=00000056 size=0x2
bb.10 offset=00000058 size=0x12
Out of range branch to destination %bb.8 from %bb.0 to 80 offset 76 BREQk %bb.8, implicit killed $sreg
Insert B to %bb.8, invert condition and change dest. to %bb.1
Out of range branch to destination %bb.7 from %bb.1 to 78 offset 68 BRNEk %bb.7, implicit $sreg
Insert B to %bb.7, invert condition and change dest. to %bb.2
Basic blocks after relaxation
bb.0 offset=00000000 size=0x8
bb.1 offset=0000000e size=0x6
bb.2 offset=00000014 size=0x6
bb.3 offset=0000001a size=0x2
bb.4 offset=0000001c size=0x6
bb.5 offset=00000022 size=0x2
bb.6 offset=00000024 size=0x32
bb.7 offset=00000056 size=0x4
bb.8 offset=0000005a size=0x6
bb.9 offset=00000060 size=0x2
bb.10 offset=00000062 size=0x12
# *** IR Dump After Branch relaxation pass ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Frame Objects:
fi#0: size=1, align=1, at location [SP-1]
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.8(0x2aaaaaab), %bb.1(0x55555555); %bb.8(33.33%), %bb.1(66.67%)
liveins: $r22, $r24, $r17
frame-setup PUSHRr killed $r17, implicit-def $sp, implicit $sp
CPIRdK $r24, 7, implicit-def $sreg
BRNEk %bb.1, implicit $sreg
RJMPk %bb.8
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.7(0x3fffffff); %bb.2(50.00%), %bb.7(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.7
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.3(0x40000000), %bb.4(0x40000000); %bb.3(200.00%), %bb.4(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRLOk %bb.4, implicit $sreg
bb.3 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r22
$r24 = MOVRdRr $r22
bb.4 (%ir-block.2):
; predecessors: %bb.2, %bb.3
successors: %bb.5(0x40000000), %bb.6(0x40000000); %bb.5(200.00%), %bb.6(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRSHk %bb.6, implicit $sreg
bb.5 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x80000000); %bb.6(200.00%)
liveins: $r24
$r17 = MOVRdRr killed $r24
bb.6 (%ir-block.2):
; predecessors: %bb.4, %bb.5
successors: %bb.7(0x80000000); %bb.7(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r22 = MOVRdRr $r17
$r23 = EORRdRr killed $r23, killed $r23, implicit-def dead $sreg
$r18 = LDIRdK 100
$r19 = LDIRdK 0
$r24 = LDIRdK 0
$r25 = LDIRdK 0
$r20 = MOVRdRr $r24
$r21 = MOVRdRr $r25
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
STSKRr @_Tv4main7delayUsVs6UInt32 + 3, killed $r25 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 1, killed $r23 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
STSKRr @_Tv4main7delayUsVs6UInt32, killed $r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
$r24 = LDIRdK 34
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
bb.7 (%ir-block.9):
; predecessors: %bb.1, %bb.6
$r17 = POPRd implicit-def $sp, implicit $sp
RET
bb.8 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.10(0x40000000); %bb.9(200.00%), %bb.10(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.10, implicit $sreg
bb.9 (%ir-block.8):
; predecessors: %bb.8
successors: %bb.10(0x80000000); %bb.10(200.00%)
$r18 = LDIRdK 0
bb.10 (%ir-block.8):
; predecessors: %bb.8, %bb.9
liveins: $r18
$r24 = MOVRdRr $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r24 = LDIRdK 35
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Contiguously Lay Out Funclets ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Frame Objects:
fi#0: size=1, align=1, at location [SP-1]
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.8(0x2aaaaaab), %bb.1(0x55555555); %bb.8(33.33%), %bb.1(66.67%)
liveins: $r22, $r24, $r17
frame-setup PUSHRr killed $r17, implicit-def $sp, implicit $sp
CPIRdK $r24, 7, implicit-def $sreg
BRNEk %bb.1, implicit $sreg
RJMPk %bb.8
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.7(0x3fffffff); %bb.2(50.00%), %bb.7(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.7
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.3(0x40000000), %bb.4(0x40000000); %bb.3(200.00%), %bb.4(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRLOk %bb.4, implicit $sreg
bb.3 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r22
$r24 = MOVRdRr $r22
bb.4 (%ir-block.2):
; predecessors: %bb.2, %bb.3
successors: %bb.5(0x40000000), %bb.6(0x40000000); %bb.5(200.00%), %bb.6(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRSHk %bb.6, implicit $sreg
bb.5 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x80000000); %bb.6(200.00%)
liveins: $r24
$r17 = MOVRdRr killed $r24
bb.6 (%ir-block.2):
; predecessors: %bb.4, %bb.5
successors: %bb.7(0x80000000); %bb.7(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r22 = MOVRdRr $r17
$r23 = EORRdRr killed $r23, killed $r23, implicit-def dead $sreg
$r18 = LDIRdK 100
$r19 = LDIRdK 0
$r24 = LDIRdK 0
$r25 = LDIRdK 0
$r20 = MOVRdRr $r24
$r21 = MOVRdRr $r25
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
STSKRr @_Tv4main7delayUsVs6UInt32 + 3, killed $r25 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 1, killed $r23 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
STSKRr @_Tv4main7delayUsVs6UInt32, killed $r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
$r24 = LDIRdK 34
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
bb.7 (%ir-block.9):
; predecessors: %bb.1, %bb.6
$r17 = POPRd implicit-def $sp, implicit $sp
RET
bb.8 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.10(0x40000000); %bb.9(200.00%), %bb.10(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.10, implicit $sreg
bb.9 (%ir-block.8):
; predecessors: %bb.8
successors: %bb.10(0x80000000); %bb.10(200.00%)
$r18 = LDIRdK 0
bb.10 (%ir-block.8):
; predecessors: %bb.8, %bb.9
liveins: $r18
$r24 = MOVRdRr $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r24 = LDIRdK 35
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
********** COMPUTING STACKMAP LIVENESS: _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_ **********
# *** IR Dump After StackMap Liveness Analysis ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Frame Objects:
fi#0: size=1, align=1, at location [SP-1]
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.8(0x2aaaaaab), %bb.1(0x55555555); %bb.8(33.33%), %bb.1(66.67%)
liveins: $r22, $r24, $r17
frame-setup PUSHRr killed $r17, implicit-def $sp, implicit $sp
CPIRdK $r24, 7, implicit-def $sreg
BRNEk %bb.1, implicit $sreg
RJMPk %bb.8
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.7(0x3fffffff); %bb.2(50.00%), %bb.7(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.7
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.3(0x40000000), %bb.4(0x40000000); %bb.3(200.00%), %bb.4(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRLOk %bb.4, implicit $sreg
bb.3 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r22
$r24 = MOVRdRr $r22
bb.4 (%ir-block.2):
; predecessors: %bb.2, %bb.3
successors: %bb.5(0x40000000), %bb.6(0x40000000); %bb.5(200.00%), %bb.6(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRSHk %bb.6, implicit $sreg
bb.5 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x80000000); %bb.6(200.00%)
liveins: $r24
$r17 = MOVRdRr killed $r24
bb.6 (%ir-block.2):
; predecessors: %bb.4, %bb.5
successors: %bb.7(0x80000000); %bb.7(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r22 = MOVRdRr $r17
$r23 = EORRdRr killed $r23, killed $r23, implicit-def dead $sreg
$r18 = LDIRdK 100
$r19 = LDIRdK 0
$r24 = LDIRdK 0
$r25 = LDIRdK 0
$r20 = MOVRdRr $r24
$r21 = MOVRdRr $r25
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
STSKRr @_Tv4main7delayUsVs6UInt32 + 3, killed $r25 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 1, killed $r23 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
STSKRr @_Tv4main7delayUsVs6UInt32, killed $r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
$r24 = LDIRdK 34
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
bb.7 (%ir-block.9):
; predecessors: %bb.1, %bb.6
$r17 = POPRd implicit-def $sp, implicit $sp
RET
bb.8 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.10(0x40000000); %bb.9(200.00%), %bb.10(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.10, implicit $sreg
bb.9 (%ir-block.8):
; predecessors: %bb.8
successors: %bb.10(0x80000000); %bb.10(200.00%)
$r18 = LDIRdK 0
bb.10 (%ir-block.8):
; predecessors: %bb.8, %bb.9
liveins: $r18
$r24 = MOVRdRr $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r24 = LDIRdK 35
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Live DEBUG_VALUE analysis ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Frame Objects:
fi#0: size=1, align=1, at location [SP-1]
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.8(0x2aaaaaab), %bb.1(0x55555555); %bb.8(33.33%), %bb.1(66.67%)
liveins: $r22, $r24, $r17
frame-setup PUSHRr killed $r17, implicit-def $sp, implicit $sp
CPIRdK $r24, 7, implicit-def $sreg
BRNEk %bb.1, implicit $sreg
RJMPk %bb.8
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.7(0x3fffffff); %bb.2(50.00%), %bb.7(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.7
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.3(0x40000000), %bb.4(0x40000000); %bb.3(200.00%), %bb.4(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRLOk %bb.4, implicit $sreg
bb.3 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r22
$r24 = MOVRdRr $r22
bb.4 (%ir-block.2):
; predecessors: %bb.2, %bb.3
successors: %bb.5(0x40000000), %bb.6(0x40000000); %bb.5(200.00%), %bb.6(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRSHk %bb.6, implicit $sreg
bb.5 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x80000000); %bb.6(200.00%)
liveins: $r24
$r17 = MOVRdRr killed $r24
bb.6 (%ir-block.2):
; predecessors: %bb.4, %bb.5
successors: %bb.7(0x80000000); %bb.7(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r22 = MOVRdRr $r17
$r23 = EORRdRr killed $r23, killed $r23, implicit-def dead $sreg
$r18 = LDIRdK 100
$r19 = LDIRdK 0
$r24 = LDIRdK 0
$r25 = LDIRdK 0
$r20 = MOVRdRr $r24
$r21 = MOVRdRr $r25
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
STSKRr @_Tv4main7delayUsVs6UInt32 + 3, killed $r25 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 1, killed $r23 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
STSKRr @_Tv4main7delayUsVs6UInt32, killed $r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
$r24 = LDIRdK 34
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
bb.7 (%ir-block.9):
; predecessors: %bb.1, %bb.6
$r17 = POPRd implicit-def $sp, implicit $sp
RET
bb.8 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.10(0x40000000); %bb.9(200.00%), %bb.10(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.10, implicit $sreg
bb.9 (%ir-block.8):
; predecessors: %bb.8
successors: %bb.10(0x80000000); %bb.10(200.00%)
$r18 = LDIRdK 0
bb.10 (%ir-block.8):
; predecessors: %bb.8, %bb.9
liveins: $r18
$r24 = MOVRdRr $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r24 = LDIRdK 35
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Insert fentry calls ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Frame Objects:
fi#0: size=1, align=1, at location [SP-1]
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.8(0x2aaaaaab), %bb.1(0x55555555); %bb.8(33.33%), %bb.1(66.67%)
liveins: $r22, $r24, $r17
frame-setup PUSHRr killed $r17, implicit-def $sp, implicit $sp
CPIRdK $r24, 7, implicit-def $sreg
BRNEk %bb.1, implicit $sreg
RJMPk %bb.8
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.7(0x3fffffff); %bb.2(50.00%), %bb.7(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.7
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.3(0x40000000), %bb.4(0x40000000); %bb.3(200.00%), %bb.4(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRLOk %bb.4, implicit $sreg
bb.3 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r22
$r24 = MOVRdRr $r22
bb.4 (%ir-block.2):
; predecessors: %bb.2, %bb.3
successors: %bb.5(0x40000000), %bb.6(0x40000000); %bb.5(200.00%), %bb.6(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRSHk %bb.6, implicit $sreg
bb.5 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x80000000); %bb.6(200.00%)
liveins: $r24
$r17 = MOVRdRr killed $r24
bb.6 (%ir-block.2):
; predecessors: %bb.4, %bb.5
successors: %bb.7(0x80000000); %bb.7(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r22 = MOVRdRr $r17
$r23 = EORRdRr killed $r23, killed $r23, implicit-def dead $sreg
$r18 = LDIRdK 100
$r19 = LDIRdK 0
$r24 = LDIRdK 0
$r25 = LDIRdK 0
$r20 = MOVRdRr $r24
$r21 = MOVRdRr $r25
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
STSKRr @_Tv4main7delayUsVs6UInt32 + 3, killed $r25 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 1, killed $r23 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
STSKRr @_Tv4main7delayUsVs6UInt32, killed $r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
$r24 = LDIRdK 34
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
bb.7 (%ir-block.9):
; predecessors: %bb.1, %bb.6
$r17 = POPRd implicit-def $sp, implicit $sp
RET
bb.8 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.10(0x40000000); %bb.9(200.00%), %bb.10(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.10, implicit $sreg
bb.9 (%ir-block.8):
; predecessors: %bb.8
successors: %bb.10(0x80000000); %bb.10(200.00%)
$r18 = LDIRdK 0
bb.10 (%ir-block.8):
; predecessors: %bb.8, %bb.9
liveins: $r18
$r24 = MOVRdRr $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r24 = LDIRdK 35
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Insert XRay ops ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Frame Objects:
fi#0: size=1, align=1, at location [SP-1]
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.8(0x2aaaaaab), %bb.1(0x55555555); %bb.8(33.33%), %bb.1(66.67%)
liveins: $r22, $r24, $r17
frame-setup PUSHRr killed $r17, implicit-def $sp, implicit $sp
CPIRdK $r24, 7, implicit-def $sreg
BRNEk %bb.1, implicit $sreg
RJMPk %bb.8
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.7(0x3fffffff); %bb.2(50.00%), %bb.7(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.7
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.3(0x40000000), %bb.4(0x40000000); %bb.3(200.00%), %bb.4(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRLOk %bb.4, implicit $sreg
bb.3 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r22
$r24 = MOVRdRr $r22
bb.4 (%ir-block.2):
; predecessors: %bb.2, %bb.3
successors: %bb.5(0x40000000), %bb.6(0x40000000); %bb.5(200.00%), %bb.6(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRSHk %bb.6, implicit $sreg
bb.5 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x80000000); %bb.6(200.00%)
liveins: $r24
$r17 = MOVRdRr killed $r24
bb.6 (%ir-block.2):
; predecessors: %bb.4, %bb.5
successors: %bb.7(0x80000000); %bb.7(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r22 = MOVRdRr $r17
$r23 = EORRdRr killed $r23, killed $r23, implicit-def dead $sreg
$r18 = LDIRdK 100
$r19 = LDIRdK 0
$r24 = LDIRdK 0
$r25 = LDIRdK 0
$r20 = MOVRdRr $r24
$r21 = MOVRdRr $r25
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
STSKRr @_Tv4main7delayUsVs6UInt32 + 3, killed $r25 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 1, killed $r23 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
STSKRr @_Tv4main7delayUsVs6UInt32, killed $r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
$r24 = LDIRdK 34
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
bb.7 (%ir-block.9):
; predecessors: %bb.1, %bb.6
$r17 = POPRd implicit-def $sp, implicit $sp
RET
bb.8 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.10(0x40000000); %bb.9(200.00%), %bb.10(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.10, implicit $sreg
bb.9 (%ir-block.8):
; predecessors: %bb.8
successors: %bb.10(0x80000000); %bb.10(200.00%)
$r18 = LDIRdK 0
bb.10 (%ir-block.8):
; predecessors: %bb.8, %bb.9
liveins: $r18
$r24 = MOVRdRr $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r24 = LDIRdK 35
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
# *** IR Dump After Implement the 'patchable-function' attribute ***:
# Machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: NoPHIs, TracksLiveness, NoVRegs
Frame Objects:
fi#0: size=1, align=1, at location [SP-1]
Function Live Ins: $r24, $r22
bb.0.entry:
successors: %bb.8(0x2aaaaaab), %bb.1(0x55555555); %bb.8(33.33%), %bb.1(66.67%)
liveins: $r22, $r24, $r17
frame-setup PUSHRr killed $r17, implicit-def $sp, implicit $sp
CPIRdK $r24, 7, implicit-def $sreg
BRNEk %bb.1, implicit $sreg
RJMPk %bb.8
bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x40000001), %bb.7(0x3fffffff); %bb.2(50.00%), %bb.7(50.00%)
liveins: $r22, $r24
CPIRdK killed $r24, 6, implicit-def $sreg
BREQk %bb.2, implicit $sreg
RJMPk %bb.7
bb.2 (%ir-block.2):
; predecessors: %bb.1
successors: %bb.3(0x40000000), %bb.4(0x40000000); %bb.3(200.00%), %bb.4(200.00%)
liveins: $r22
$r24 = LDIRdK 5
CPIRdK $r22, 5, implicit-def $sreg
BRLOk %bb.4, implicit $sreg
bb.3 (%ir-block.2):
; predecessors: %bb.2
successors: %bb.4(0x80000000); %bb.4(200.00%)
liveins: $r22
$r24 = MOVRdRr $r22
bb.4 (%ir-block.2):
; predecessors: %bb.2, %bb.3
successors: %bb.5(0x40000000), %bb.6(0x40000000); %bb.5(200.00%), %bb.6(200.00%)
liveins: $r22, $r24
$r17 = LDIRdK 90
CPIRdK killed $r22, 91, implicit-def $sreg
BRSHk %bb.6, implicit $sreg
bb.5 (%ir-block.2):
; predecessors: %bb.4
successors: %bb.6(0x80000000); %bb.6(200.00%)
liveins: $r24
$r17 = MOVRdRr killed $r24
bb.6 (%ir-block.2):
; predecessors: %bb.4, %bb.5
successors: %bb.7(0x80000000); %bb.7(100.00%)
liveins: $r17
STSKRr @_Tv4main11delayFactorVs5UInt8, $r17 :: (store 1 into `i8* getelementptr inbounds (%Vs5UInt8, %Vs5UInt8* @_Tv4main11delayFactorVs5UInt8, i64 0, i32 0)`)
$r22 = MOVRdRr $r17
$r23 = EORRdRr killed $r23, killed $r23, implicit-def dead $sreg
$r18 = LDIRdK 100
$r19 = LDIRdK 0
$r24 = LDIRdK 0
$r25 = LDIRdK 0
$r20 = MOVRdRr $r24
$r21 = MOVRdRr $r25
CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r23r22, implicit $r25r24, implicit $r19r18, implicit killed $r21r20, implicit-def $sp, implicit-def $r23r22, implicit-def $r25r24
STSKRr @_Tv4main7delayUsVs6UInt32 + 3, killed $r25 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 2, killed $r24 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)` + 2)
STSKRr @_Tv4main7delayUsVs6UInt32 + 1, killed $r23 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
STSKRr @_Tv4main7delayUsVs6UInt32, killed $r22 :: (store 2 into `i32* getelementptr inbounds (%Vs6UInt32, %Vs6UInt32* @_Tv4main7delayUsVs6UInt32, i64 0, i32 0)`, align 4)
$r24 = LDIRdK 34
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r17
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
bb.7 (%ir-block.9):
; predecessors: %bb.1, %bb.6
$r17 = POPRd implicit-def $sp, implicit $sp
RET
bb.8 (%ir-block.8):
; predecessors: %bb.0
successors: %bb.9(0x40000000), %bb.10(0x40000000); %bb.9(200.00%), %bb.10(200.00%)
liveins: $r22
$r18 = LDIRdK 1
CPIRdK killed $r22, 0, implicit-def $sreg
BRNEk %bb.10, implicit $sreg
bb.9 (%ir-block.8):
; predecessors: %bb.8
successors: %bb.10(0x80000000); %bb.10(200.00%)
$r18 = LDIRdK 0
bb.10 (%ir-block.8):
; predecessors: %bb.8, %bb.9
liveins: $r18
$r24 = MOVRdRr $r18
$r24 = ANDIRdK killed $r24, 1, implicit-def dead $sreg
STSKRr @_Tv4main7enabledSb, killed $r24 :: (store 1 into `i1* getelementptr inbounds (%Sb, %Sb* @_Tv4main7enabledSb, i64 0, i32 0)`)
$r24 = LDIRdK 35
$r25 = LDIRdK 0
$r22 = MOVRdRr killed $r18
CALLk @_TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp
# End machine code for function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_.
.hidden _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_ ; -- Begin function _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
.globl _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
.p2align 1
.type _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_,@function
_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_: ; @_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
discovered a new reachable node %bb.0
discovered a new reachable node %bb.8
discovered a new reachable node %bb.9
discovered a new reachable node %bb.10
discovered a new reachable node %bb.1
discovered a new reachable node %bb.2
discovered a new reachable node %bb.3
discovered a new reachable node %bb.4
discovered a new reachable node %bb.5
discovered a new reachable node %bb.6
discovered a new reachable node %bb.7
; %bb.0: ; %entry
push r17
cpi r24, 7
brne LBB0_1
rjmp LBB0_8
LBB0_1: ; %entry
cpi r24, 6
breq LBB0_2
rjmp LBB0_7
LBB0_2:
ldi r24, 5
cpi r22, 5
brlo LBB0_4
; %bb.3:
mov r24, r22
LBB0_4:
ldi r17, 90
cpi r22, 91
brsh LBB0_6
; %bb.5:
mov r17, r24
LBB0_6:
sts _Tv4main11delayFactorVs5UInt8, r17
mov r22, r17
clr r23
ldi r18, 100
ldi r19, 0
ldi r24, 0
ldi r25, 0
mov r20, r24
mov r21, r25
call __mulsi3
sts _Tv4main7delayUsVs6UInt32+3, r25
sts _Tv4main7delayUsVs6UInt32+2, r24
sts _Tv4main7delayUsVs6UInt32+1, r23
sts _Tv4main7delayUsVs6UInt32, r22
ldi r24, 34
ldi r25, 0
mov r22, r17
call _TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_
LBB0_7:
pop r17
ret
LBB0_8:
ldi r18, 1
cpi r22, 0
brne LBB0_10
; %bb.9:
ldi r18, 0
LBB0_10:
mov r24, r18
andi r24, 1
sts _Tv4main7enabledSb, r24
ldi r24, 35
ldi r25, 0
mov r22, r18
call _TF3AVR11writeEEPROMFT7addressVs6UInt165valueVs5UInt8_T_
.Lfunc_end0:
.size _TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_, .Lfunc_end0-_TF4main9i2cUpdateFT8registerVs5UInt85valueS0__T_
; -- End function
.hidden _Tv4main11delayFactorVs5UInt8 ; @_Tv4main11delayFactorVs5UInt8
.type _Tv4main11delayFactorVs5UInt8,@object
.section .bss,"aw",@nobits
.globl _Tv4main11delayFactorVs5UInt8
_Tv4main11delayFactorVs5UInt8:
.zero 1
.size _Tv4main11delayFactorVs5UInt8, 1
.hidden _Tv4main7delayUsVs6UInt32 ; @_Tv4main7delayUsVs6UInt32
.type _Tv4main7delayUsVs6UInt32,@object
.globl _Tv4main7delayUsVs6UInt32
.p2align 2
_Tv4main7delayUsVs6UInt32:
.zero 4
.size _Tv4main7delayUsVs6UInt32, 4
.hidden _Tv4main7enabledSb ; @_Tv4main7enabledSb
.type _Tv4main7enabledSb,@object
.globl _Tv4main7enabledSb
_Tv4main7enabledSb:
.zero 1
.size _Tv4main7enabledSb, 1
; Declaring this symbol tells the CRT that it should
;copy all variables from program memory to RAM on startup
.globl __do_copy_data
; Declaring this symbol tells the CRT that it should
;clear the zeroed data section on startup
.globl __do_clear_bss
Carls-MacBook-Air:AVR carlpeto$
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