Created
January 30, 2019 11:23
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Debug output from llvm AVR backend umul.with.overflow.i16 bug
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| Carls-MacBook-Air:AVR carlpeto$ ../../../build/llvm-patched/bin/llc -O3 -march=avr -debug < umul.with.overflow.i16-bug.ll | |
| Args: ../../../build/llvm-patched/bin/llc -O3 -march=avr -debug | |
| Features: | |
| CPU:avr2 | |
| discovered a new reachable node %entry | |
| .text | |
| .file "<stdin>" | |
| discovered a new reachable node %entry | |
| discovered a new reachable node %entry | |
| MergeICmpsPass: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| discovered a new reachable node %entry | |
| ---- Branch Probability Info : _TF4main13setServoAngleFT5angleVs6UInt16_T_ ---- | |
| Computing probabilities for entry | |
| block-frequency: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| ============================================================ | |
| reverse-post-order-traversal | |
| - 0: entry | |
| loop-detection | |
| compute-mass-in-function | |
| - node: entry | |
| => mass: ffffffffffffffff | |
| float-to-int: min = 1.0, max = 1.0, factor = 8.0 | |
| - entry: float = 1.0, scaled = 8.0, int = 8 | |
| block-frequency-info: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| - entry: float = 1.0, int = 8 | |
| ********** Begin Constant Hoisting ********** | |
| ********** Function: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| ********** End Constant Hoisting ********** | |
| discovered a new reachable node %entry | |
| ---- Branch Probability Info : _TF4main13setServoAngleFT5angleVs6UInt16_T_ ---- | |
| Computing probabilities for entry | |
| block-frequency: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| ============================================================ | |
| reverse-post-order-traversal | |
| - 0: entry | |
| loop-detection | |
| compute-mass-in-function | |
| - node: entry | |
| => mass: ffffffffffffffff | |
| float-to-int: min = 1.0, max = 1.0, factor = 8.0 | |
| - entry: float = 1.0, scaled = 8.0, int = 8 | |
| block-frequency-info: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| - entry: float = 1.0, int = 8 | |
| CGP: Found local addrmode: [Base:%adjustedAngle] | |
| CGP: Found local addrmode: [Base:%adjustedAngle] | |
| CGP: Found local addrmode: [Base:%adjustedAngle] | |
| CGP: Found local addrmode: [Base:%adjustedAngle] | |
| [SafeStack] Function: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| [SafeStack] safestack is not requested for this function | |
| discovered a new reachable node %entry | |
| discovered a new reachable node %entry | |
| ---- Branch Probability Info : _TF4main13setServoAngleFT5angleVs6UInt16_T_ ---- | |
| Computing probabilities for entry | |
| === _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| Found argument copy elision candidate: %adjustedAngle = alloca %Vs6UInt16, align 2 | |
| Creating new node: t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| Creating constant: t4: i16 = Constant<0> | |
| Creating new node: t5: i16 = undef | |
| Creating new node: t6: ch = store<(store 2 into %ir.adjustedAngle._value1)> t0, t2, FrameIndex:i16<0>, undef:i16 | |
| Creating new node: t7: i16,ch = load<(dereferenceable load 2 from %ir.adjustedAngle._value22)> t6, FrameIndex:i16<0>, undef:i16 | |
| Creating constant: t8: i16 = Constant<11> | |
| Creating new node: t9: i16,i1 = umulo t7, Constant:i16<11> | |
| Creating constant: t12: i16 = TargetConstant<0> | |
| Creating new node: t13: ch,glue = callseq_start t7:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Creating new node: t15: ch,glue = CALL t13, TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped | |
| Creating new node: t16: ch,glue = callseq_end t15, TargetConstant:i16<0>, TargetConstant:i16<0>, t15:1 | |
| Creating new node: t18: i8,ch,glue = CopyFromReg t16, Register:i8 $r24, t16:1 | |
| Creating new node: t19: i1 = truncate t18 | |
| Creating new node: t22: ch,glue = callseq_start t18:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Creating new node: t24: ch,glue = CopyToReg t22, Register:i16 $r25r24, t9 | |
| Creating new node: t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| Creating new node: t27: ch,glue = CALL t26, TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26:1 | |
| Creating new node: t28: ch,glue = callseq_end t27, TargetConstant:i16<0>, TargetConstant:i16<0>, t27:1 | |
| Creating new node: t29: ch = RET_FLAG t28 | |
| Initial selection DAG: %bb.0 '_TF4main13setServoAngleFT5angleVs6UInt16_T_:entry' | |
| SelectionDAG has 30 nodes: | |
| t0: ch = EntryToken | |
| t4: i16 = Constant<0> | |
| t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| t6: ch = store<(store 2 into %ir.adjustedAngle._value1)> t0, t2, FrameIndex:i16<0>, undef:i16 | |
| t7: i16,ch = load<(dereferenceable load 2 from %ir.adjustedAngle._value22)> t6, FrameIndex:i16<0>, undef:i16 | |
| t10: i16 = GlobalAddress<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0 | |
| t13: ch,glue = callseq_start t7:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| t15: ch,glue = CALL t13, TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped | |
| t16: ch,glue = callseq_end t15, TargetConstant:i16<0>, TargetConstant:i16<0>, t15:1 | |
| t18: i8,ch,glue = CopyFromReg t16, Register:i8 $r24, t16:1 | |
| t19: i1 = truncate t18 | |
| t20: i16 = GlobalAddress<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0 | |
| t22: ch,glue = callseq_start t18:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| t9: i16,i1 = umulo t7, Constant:i16<11> | |
| t24: ch,glue = CopyToReg t22, Register:i16 $r25r24, t9 | |
| t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| t27: ch,glue = CALL t26, TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26:1 | |
| t28: ch,glue = callseq_end t27, TargetConstant:i16<0>, TargetConstant:i16<0>, t27:1 | |
| t29: ch = RET_FLAG t28 | |
| Combining: t29: ch = RET_FLAG t28 | |
| Combining: t28: ch,glue = callseq_end t27, TargetConstant:i16<0>, TargetConstant:i16<0>, t27:1 | |
| Combining: t27: ch,glue = CALL t26, TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26:1 | |
| Combining: t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| Combining: t25: i8 = Register $r22 | |
| Combining: t24: ch,glue = CopyToReg t22, Register:i16 $r25r24, t9 | |
| Combining: t23: i16 = Register $r25r24 | |
| Combining: t22: ch,glue = callseq_start t18:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Combining: t21: i16 = TargetGlobalAddress<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0 | |
| Combining: t18: i8,ch,glue = CopyFromReg t16, Register:i8 $r24, t16:1 | |
| Combining: t17: i8 = Register $r24 | |
| Combining: t16: ch,glue = callseq_end t15, TargetConstant:i16<0>, TargetConstant:i16<0>, t15:1 | |
| Combining: t15: ch,glue = CALL t13, TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped | |
| Combining: t14: Untyped = RegisterMask | |
| Combining: t13: ch,glue = callseq_start t7:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Combining: t12: i16 = TargetConstant<0> | |
| Combining: t11: i16 = TargetGlobalAddress<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0 | |
| Combining: t9: i16,i1 = umulo t7, Constant:i16<11> | |
| Combining: t8: i16 = Constant<11> | |
| Combining: t7: i16,ch = load<(dereferenceable load 2 from %ir.adjustedAngle._value22)> t6, FrameIndex:i16<0>, undef:i16 | |
| Replacing.1 t7: i16,ch = load<(dereferenceable load 2 from %ir.adjustedAngle._value22)> t6, FrameIndex:i16<0>, undef:i16 | |
| With: t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| and 1 other values | |
| Combining: t13: ch,glue = callseq_start t6, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Combining: t9: i16,i1 = umulo t2, Constant:i16<11> | |
| Combining: t6: ch = store<(store 2 into %ir.adjustedAngle._value1)> t0, t2, FrameIndex:i16<0>, undef:i16 | |
| Combining: t5: i16 = undef | |
| Combining: t3: i16 = FrameIndex<0> | |
| Combining: t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| Combining: t1: i16 = Register %0 | |
| Combining: t0: ch = EntryToken | |
| Optimized lowered selection DAG: %bb.0 '_TF4main13setServoAngleFT5angleVs6UInt16_T_:entry' | |
| SelectionDAG has 25 nodes: | |
| t0: ch = EntryToken | |
| t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| t6: ch = store<(store 2 into %ir.adjustedAngle._value1)> t0, t2, FrameIndex:i16<0>, undef:i16 | |
| t13: ch,glue = callseq_start t6, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| t15: ch,glue = CALL t13, TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped | |
| t16: ch,glue = callseq_end t15, TargetConstant:i16<0>, TargetConstant:i16<0>, t15:1 | |
| t18: i8,ch,glue = CopyFromReg t16, Register:i8 $r24, t16:1 | |
| t22: ch,glue = callseq_start t18:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| t9: i16,i1 = umulo t2, Constant:i16<11> | |
| t24: ch,glue = CopyToReg t22, Register:i16 $r25r24, t9 | |
| t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| t27: ch,glue = CALL t26, TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26:1 | |
| t28: ch,glue = callseq_end t27, TargetConstant:i16<0>, TargetConstant:i16<0>, t27:1 | |
| t29: ch = RET_FLAG t28 | |
| Legalizing node: t25: i8 = Register $r22 | |
| Ignoring node results | |
| Legally typed node: t25: i8 = Register $r22 | |
| Legalizing node: t23: i16 = Register $r25r24 | |
| Ignoring node results | |
| Legally typed node: t23: i16 = Register $r25r24 | |
| Legalizing node: t21: i16 = TargetGlobalAddress<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0 | |
| Analyzing result type: i16 | |
| Legal result type | |
| Legally typed node: t21: i16 = TargetGlobalAddress<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0 | |
| Legalizing node: t17: i8 = Register $r24 | |
| Ignoring node results | |
| Legally typed node: t17: i8 = Register $r24 | |
| Legalizing node: t14: Untyped = RegisterMask | |
| Analyzing result type: Untyped | |
| Legal result type | |
| Legally typed node: t14: Untyped = RegisterMask | |
| Legalizing node: t12: i16 = TargetConstant<0> | |
| Ignoring node results | |
| Legally typed node: t12: i16 = TargetConstant<0> | |
| Legalizing node: t11: i16 = TargetGlobalAddress<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0 | |
| Analyzing result type: i16 | |
| Legal result type | |
| Legally typed node: t11: i16 = TargetGlobalAddress<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0 | |
| Legalizing node: t8: i16 = Constant<11> | |
| Analyzing result type: i16 | |
| Legal result type | |
| Legally typed node: t8: i16 = Constant<11> | |
| Legalizing node: t5: i16 = undef | |
| Analyzing result type: i16 | |
| Legal result type | |
| Legally typed node: t5: i16 = undef | |
| Legalizing node: t3: i16 = FrameIndex<0> | |
| Analyzing result type: i16 | |
| Legal result type | |
| Legally typed node: t3: i16 = FrameIndex<0> | |
| Legalizing node: t1: i16 = Register %0 | |
| Ignoring node results | |
| Legally typed node: t1: i16 = Register %0 | |
| Legalizing node: t0: ch = EntryToken | |
| Analyzing result type: ch | |
| Legal result type | |
| Legally typed node: t0: ch = EntryToken | |
| Legalizing node: t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| Analyzing result type: i16 | |
| Legal result type | |
| Analyzing result type: ch | |
| Legal result type | |
| Analyzing operand: t0: ch = EntryToken | |
| Legal operand | |
| Legally typed node: t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| Legalizing node: t6: ch = store<(store 2 into %ir.adjustedAngle._value1)> t0, t2, FrameIndex:i16<0>, undef:i16 | |
| Analyzing result type: ch | |
| Legal result type | |
| Analyzing operand: t0: ch = EntryToken | |
| Legal operand | |
| Analyzing operand: t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| Legal operand | |
| Analyzing operand: t3: i16 = FrameIndex<0> | |
| Legal operand | |
| Analyzing operand: t5: i16 = undef | |
| Legal operand | |
| Legally typed node: t6: ch = store<(store 2 into %ir.adjustedAngle._value1)> t0, t2, FrameIndex:i16<0>, undef:i16 | |
| Legalizing node: t13: ch,glue = callseq_start t6, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Analyzing result type: ch | |
| Legal result type | |
| Analyzing result type: glue | |
| Legal result type | |
| Analyzing operand: t6: ch = store<(store 2 into %ir.adjustedAngle._value1)> t0, t2, FrameIndex:i16<0>, undef:i16 | |
| Legal operand | |
| Legally typed node: t13: ch,glue = callseq_start t6, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Legalizing node: t15: ch,glue = CALL t13, TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped | |
| Analyzing result type: ch | |
| Legal result type | |
| Analyzing result type: glue | |
| Legal result type | |
| Analyzing operand: t13: ch,glue = callseq_start t6, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Legal operand | |
| Analyzing operand: t11: i16 = TargetGlobalAddress<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0 | |
| Legal operand | |
| Analyzing operand: t14: Untyped = RegisterMask | |
| Legal operand | |
| Legally typed node: t15: ch,glue = CALL t13, TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped | |
| Legalizing node: t16: ch,glue = callseq_end t15, TargetConstant:i16<0>, TargetConstant:i16<0>, t15:1 | |
| Analyzing result type: ch | |
| Legal result type | |
| Analyzing result type: glue | |
| Legal result type | |
| Analyzing operand: t15: ch,glue = CALL t13, TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped | |
| Legal operand | |
| Analyzing operand: t15: ch,glue = CALL t13, TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped | |
| Legal operand | |
| Legally typed node: t16: ch,glue = callseq_end t15, TargetConstant:i16<0>, TargetConstant:i16<0>, t15:1 | |
| Legalizing node: t18: i8,ch,glue = CopyFromReg t16, Register:i8 $r24, t16:1 | |
| Analyzing result type: i8 | |
| Legal result type | |
| Analyzing result type: ch | |
| Legal result type | |
| Analyzing result type: glue | |
| Legal result type | |
| Analyzing operand: t16: ch,glue = callseq_end t15, TargetConstant:i16<0>, TargetConstant:i16<0>, t15:1 | |
| Legal operand | |
| Analyzing operand: t16: ch,glue = callseq_end t15, TargetConstant:i16<0>, TargetConstant:i16<0>, t15:1 | |
| Legal operand | |
| Legally typed node: t18: i8,ch,glue = CopyFromReg t16, Register:i8 $r24, t16:1 | |
| Legalizing node: t22: ch,glue = callseq_start t18:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Analyzing result type: ch | |
| Legal result type | |
| Analyzing result type: glue | |
| Legal result type | |
| Analyzing operand: t18: i8,ch,glue = CopyFromReg t16, Register:i8 $r24, t16:1 | |
| Legal operand | |
| Legally typed node: t22: ch,glue = callseq_start t18:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Legalizing node: t9: i16,i1 = umulo t2, Constant:i16<11> | |
| Analyzing result type: i16 | |
| Legal result type | |
| Analyzing result type: i1 | |
| Promote integer result: t9: i16,i1 = umulo t2, Constant:i16<11> | |
| Creating new node: t30: i16,i8 = umulo t2, Constant:i16<11> | |
| Legalizing node: t30: i16,i8 = umulo t2, Constant:i16<11> | |
| Analyzing result type: i16 | |
| Legal result type | |
| Analyzing result type: i8 | |
| Legal result type | |
| Analyzing operand: t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| Legal operand | |
| Analyzing operand: t8: i16 = Constant<11> | |
| Legal operand | |
| Legally typed node: t30: i16,i8 = umulo t2, Constant:i16<11> | |
| Legalizing node: t24: ch,glue = CopyToReg t22, Register:i16 $r25r24, t30 | |
| Analyzing result type: ch | |
| Legal result type | |
| Analyzing result type: glue | |
| Legal result type | |
| Analyzing operand: t22: ch,glue = callseq_start t18:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Legal operand | |
| Analyzing operand: t30: i16,i8 = umulo t2, Constant:i16<11> | |
| Legal operand | |
| Legally typed node: t24: ch,glue = CopyToReg t22, Register:i16 $r25r24, t30 | |
| Legalizing node: t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| Analyzing result type: ch | |
| Legal result type | |
| Analyzing result type: glue | |
| Legal result type | |
| Analyzing operand: t24: ch,glue = CopyToReg t22, Register:i16 $r25r24, t30 | |
| Legal operand | |
| Analyzing operand: t18: i8,ch,glue = CopyFromReg t16, Register:i8 $r24, t16:1 | |
| Legal operand | |
| Analyzing operand: t24: ch,glue = CopyToReg t22, Register:i16 $r25r24, t30 | |
| Legal operand | |
| Legally typed node: t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| Legalizing node: t27: ch,glue = CALL t26, TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26:1 | |
| Analyzing result type: ch | |
| Legal result type | |
| Analyzing result type: glue | |
| Legal result type | |
| Analyzing operand: t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| Legal operand | |
| Analyzing operand: t21: i16 = TargetGlobalAddress<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0 | |
| Legal operand | |
| Analyzing operand: t14: Untyped = RegisterMask | |
| Legal operand | |
| Analyzing operand: t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| Legal operand | |
| Legally typed node: t27: ch,glue = CALL t26, TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26:1 | |
| Legalizing node: t28: ch,glue = callseq_end t27, TargetConstant:i16<0>, TargetConstant:i16<0>, t27:1 | |
| Analyzing result type: ch | |
| Legal result type | |
| Analyzing result type: glue | |
| Legal result type | |
| Analyzing operand: t27: ch,glue = CALL t26, TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26:1 | |
| Legal operand | |
| Analyzing operand: t27: ch,glue = CALL t26, TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26:1 | |
| Legal operand | |
| Legally typed node: t28: ch,glue = callseq_end t27, TargetConstant:i16<0>, TargetConstant:i16<0>, t27:1 | |
| Legalizing node: t29: ch = RET_FLAG t28 | |
| Analyzing result type: ch | |
| Legal result type | |
| Analyzing operand: t28: ch,glue = callseq_end t27, TargetConstant:i16<0>, TargetConstant:i16<0>, t27:1 | |
| Legal operand | |
| Legally typed node: t29: ch = RET_FLAG t28 | |
| Legalizing node: t65535: ch = handlenode t29 | |
| Analyzing result type: ch | |
| Legal result type | |
| Analyzing operand: t29: ch = RET_FLAG t28 | |
| Legal operand | |
| Legally typed node: t65535: ch = handlenode t29 | |
| Type-legalized selection DAG: %bb.0 '_TF4main13setServoAngleFT5angleVs6UInt16_T_:entry' | |
| SelectionDAG has 25 nodes: | |
| t0: ch = EntryToken | |
| t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| t6: ch = store<(store 2 into %ir.adjustedAngle._value1)> t0, t2, FrameIndex:i16<0>, undef:i16 | |
| t13: ch,glue = callseq_start t6, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| t15: ch,glue = CALL t13, TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped | |
| t16: ch,glue = callseq_end t15, TargetConstant:i16<0>, TargetConstant:i16<0>, t15:1 | |
| t18: i8,ch,glue = CopyFromReg t16, Register:i8 $r24, t16:1 | |
| t22: ch,glue = callseq_start t18:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| t30: i16,i8 = umulo t2, Constant:i16<11> | |
| t24: ch,glue = CopyToReg t22, Register:i16 $r25r24, t30 | |
| t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| t27: ch,glue = CALL t26, TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26:1 | |
| t28: ch,glue = callseq_end t27, TargetConstant:i16<0>, TargetConstant:i16<0>, t27:1 | |
| t29: ch = RET_FLAG t28 | |
| Combining: t30: i16,i8 = umulo t2, Constant:i16<11> | |
| Combining: t29: ch = RET_FLAG t28 | |
| Combining: t28: ch,glue = callseq_end t27, TargetConstant:i16<0>, TargetConstant:i16<0>, t27:1 | |
| Combining: t27: ch,glue = CALL t26, TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26:1 | |
| Combining: t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| Combining: t25: i8 = Register $r22 | |
| Combining: t24: ch,glue = CopyToReg t22, Register:i16 $r25r24, t30 | |
| Combining: t23: i16 = Register $r25r24 | |
| Combining: t22: ch,glue = callseq_start t18:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Combining: t21: i16 = TargetGlobalAddress<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0 | |
| Combining: t18: i8,ch,glue = CopyFromReg t16, Register:i8 $r24, t16:1 | |
| Combining: t17: i8 = Register $r24 | |
| Combining: t16: ch,glue = callseq_end t15, TargetConstant:i16<0>, TargetConstant:i16<0>, t15:1 | |
| Combining: t15: ch,glue = CALL t13, TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped | |
| Combining: t14: Untyped = RegisterMask | |
| Combining: t13: ch,glue = callseq_start t6, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Combining: t12: i16 = TargetConstant<0> | |
| Combining: t11: i16 = TargetGlobalAddress<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0 | |
| Combining: t8: i16 = Constant<11> | |
| Combining: t6: ch = store<(store 2 into %ir.adjustedAngle._value1)> t0, t2, FrameIndex:i16<0>, undef:i16 | |
| Combining: t5: i16 = undef | |
| Combining: t3: i16 = FrameIndex<0> | |
| Combining: t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| Combining: t1: i16 = Register %0 | |
| Combining: t0: ch = EntryToken | |
| Optimized type-legalized selection DAG: %bb.0 '_TF4main13setServoAngleFT5angleVs6UInt16_T_:entry' | |
| SelectionDAG has 25 nodes: | |
| t0: ch = EntryToken | |
| t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| t6: ch = store<(store 2 into %ir.adjustedAngle._value1)> t0, t2, FrameIndex:i16<0>, undef:i16 | |
| t13: ch,glue = callseq_start t6, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| t15: ch,glue = CALL t13, TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped | |
| t16: ch,glue = callseq_end t15, TargetConstant:i16<0>, TargetConstant:i16<0>, t15:1 | |
| t18: i8,ch,glue = CopyFromReg t16, Register:i8 $r24, t16:1 | |
| t22: ch,glue = callseq_start t18:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| t30: i16,i8 = umulo t2, Constant:i16<11> | |
| t24: ch,glue = CopyToReg t22, Register:i16 $r25r24, t30 | |
| t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| t27: ch,glue = CALL t26, TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26:1 | |
| t28: ch,glue = callseq_end t27, TargetConstant:i16<0>, TargetConstant:i16<0>, t27:1 | |
| t29: ch = RET_FLAG t28 | |
| Legalizing: t29: ch = RET_FLAG t28 | |
| Legal node: nothing to do | |
| Legalizing: t28: ch,glue = callseq_end t27, TargetConstant:i16<0>, TargetConstant:i16<0>, t27:1 | |
| Legalizing: t27: ch,glue = CALL t26, TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26:1 | |
| Legal node: nothing to do | |
| Legalizing: t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| Legal node: nothing to do | |
| Legalizing: t24: ch,glue = CopyToReg t22, Register:i16 $r25r24, t30 | |
| Legal node: nothing to do | |
| Legalizing: t22: ch,glue = callseq_start t18:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Legalizing: t18: i8,ch,glue = CopyFromReg t16, Register:i8 $r24, t16:1 | |
| Legal node: nothing to do | |
| Legalizing: t16: ch,glue = callseq_end t15, TargetConstant:i16<0>, TargetConstant:i16<0>, t15:1 | |
| Legalizing: t15: ch,glue = CALL t13, TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped | |
| Legal node: nothing to do | |
| Legalizing: t13: ch,glue = callseq_start t6, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Legalizing: t6: ch = store<(store 2 into %ir.adjustedAngle._value1)> t0, t2, FrameIndex:i16<0>, undef:i16 | |
| Legalizing store operation | |
| Optimizing float store operations | |
| Legal store | |
| Legalizing: t30: i16,i8 = umulo t2, Constant:i16<11> | |
| Trying to expand node | |
| Creating constant: t31: i16 = Constant<0> | |
| Creating new node: t34: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Creating new node: t35: ch,glue = CopyToReg t34, Register:i16 $r25r24, t2 | |
| Creating new node: t37: ch,glue = CopyToReg t35, Register:i16 $r23r22, Constant:i16<0>, t35:1 | |
| Creating new node: t39: ch,glue = CopyToReg t37, Register:i16 $r21r20, Constant:i16<11>, t37:1 | |
| Creating new node: t41: ch,glue = CopyToReg t39, Register:i16 $r19r18, Constant:i16<0>, t39:1 | |
| Creating new node: t42: ch,glue = CALL t41, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r25r24, Register:i16 $r23r22, Register:i16 $r21r20, Register:i16 $r19r18, RegisterMask:Untyped, t41:1 | |
| Creating new node: t43: ch,glue = callseq_end t42, TargetConstant:i16<0>, TargetConstant:i16<0>, t42:1 | |
| Creating new node: t44: i16,ch,glue = CopyFromReg t43, Register:i16 $r25r24, t43:1 | |
| Creating new node: t45: i16,ch,glue = CopyFromReg t44:1, Register:i16 $r23r22, t44:2 | |
| Creating new node: t46: i16,i16 = merge_values t44, t45 | |
| Creating new node: t48: i8 = setcc t45, Constant:i16<0>, setne:ch | |
| Successfully expanded node | |
| ... replacing: t30: i16,i8 = umulo t2, Constant:i16<11> | |
| with: t44: i16,ch,glue = CopyFromReg t43, Register:i16 $r25r24, t43:1 | |
| and: t48: i8 = setcc t45, Constant:i16<0>, setne:ch | |
| Legalizing: t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| Legal node: nothing to do | |
| Legalizing: t25: i8 = Register $r22 | |
| Legalizing: t23: i16 = Register $r25r24 | |
| Legalizing: t21: i16 = TargetGlobalAddress<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0 | |
| Legal node: nothing to do | |
| Legalizing: t17: i8 = Register $r24 | |
| Legalizing: t14: Untyped = RegisterMask | |
| Legal node: nothing to do | |
| Legalizing: t12: i16 = TargetConstant<0> | |
| Legalizing: t11: i16 = TargetGlobalAddress<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0 | |
| Legal node: nothing to do | |
| Legalizing: t8: i16 = Constant<11> | |
| Legal node: nothing to do | |
| Legalizing: t5: i16 = undef | |
| Legal node: nothing to do | |
| Legalizing: t3: i16 = FrameIndex<0> | |
| Legal node: nothing to do | |
| Legalizing: t1: i16 = Register %0 | |
| Legalizing: t0: ch = EntryToken | |
| Legal node: nothing to do | |
| Legalizing: t44: i16,ch,glue = CopyFromReg t43, Register:i16 $r25r24, t43:1 | |
| Legal node: nothing to do | |
| Legalizing: t43: ch,glue = callseq_end t42, TargetConstant:i16<0>, TargetConstant:i16<0>, t42:1 | |
| Legalizing: t42: ch,glue = CALL t41, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r25r24, Register:i16 $r23r22, Register:i16 $r21r20, Register:i16 $r19r18, RegisterMask:Untyped, t41:1 | |
| Legal node: nothing to do | |
| Legalizing: t41: ch,glue = CopyToReg t39, Register:i16 $r19r18, Constant:i16<0>, t39:1 | |
| Legal node: nothing to do | |
| Legalizing: t40: i16 = Register $r19r18 | |
| Legalizing: t39: ch,glue = CopyToReg t37, Register:i16 $r21r20, Constant:i16<11>, t37:1 | |
| Legal node: nothing to do | |
| Legalizing: t38: i16 = Register $r21r20 | |
| Legalizing: t37: ch,glue = CopyToReg t35, Register:i16 $r23r22, Constant:i16<0>, t35:1 | |
| Legal node: nothing to do | |
| Legalizing: t36: i16 = Register $r23r22 | |
| Legalizing: t35: ch,glue = CopyToReg t34, Register:i16 $r25r24, t2 | |
| Legal node: nothing to do | |
| Legalizing: t34: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Legalizing: t33: i16 = TargetExternalSymbol'__mulsi3' | |
| Legal node: nothing to do | |
| Legalizing: t31: i16 = Constant<0> | |
| Legal node: nothing to do | |
| Legalized selection DAG: %bb.0 '_TF4main13setServoAngleFT5angleVs6UInt16_T_:entry' | |
| SelectionDAG has 37 nodes: | |
| t0: ch = EntryToken | |
| t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| t6: ch = store<(store 2 into %ir.adjustedAngle._value1)> t0, t2, FrameIndex:i16<0>, undef:i16 | |
| t13: ch,glue = callseq_start t6, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| t15: ch,glue = CALL t13, TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped | |
| t16: ch,glue = callseq_end t15, TargetConstant:i16<0>, TargetConstant:i16<0>, t15:1 | |
| t18: i8,ch,glue = CopyFromReg t16, Register:i8 $r24, t16:1 | |
| t22: ch,glue = callseq_start t18:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| t44: i16,ch,glue = CopyFromReg t43, Register:i16 $r25r24, t43:1 | |
| t24: ch,glue = CopyToReg t22, Register:i16 $r25r24, t44 | |
| t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| t27: ch,glue = CALL t26, TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26:1 | |
| t34: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| t35: ch,glue = CopyToReg t34, Register:i16 $r25r24, t2 | |
| t37: ch,glue = CopyToReg t35, Register:i16 $r23r22, Constant:i16<0>, t35:1 | |
| t39: ch,glue = CopyToReg t37, Register:i16 $r21r20, Constant:i16<11>, t37:1 | |
| t41: ch,glue = CopyToReg t39, Register:i16 $r19r18, Constant:i16<0>, t39:1 | |
| t42: ch,glue = CALL t41, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r25r24, Register:i16 $r23r22, Register:i16 $r21r20, Register:i16 $r19r18, RegisterMask:Untyped, t41:1 | |
| t43: ch,glue = callseq_end t42, TargetConstant:i16<0>, TargetConstant:i16<0>, t42:1 | |
| t28: ch,glue = callseq_end t27, TargetConstant:i16<0>, TargetConstant:i16<0>, t27:1 | |
| t29: ch = RET_FLAG t28 | |
| Legalizing: t44: i16,ch,glue = CopyFromReg t43, Register:i16 $r25r24, t43:1 | |
| Legal node: nothing to do | |
| Combining: t44: i16,ch,glue = CopyFromReg t43, Register:i16 $r25r24, t43:1 | |
| Legalizing: t43: ch,glue = callseq_end t42, TargetConstant:i16<0>, TargetConstant:i16<0>, t42:1 | |
| Combining: t43: ch,glue = callseq_end t42, TargetConstant:i16<0>, TargetConstant:i16<0>, t42:1 | |
| Legalizing: t42: ch,glue = CALL t41, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r25r24, Register:i16 $r23r22, Register:i16 $r21r20, Register:i16 $r19r18, RegisterMask:Untyped, t41:1 | |
| Legal node: nothing to do | |
| Combining: t42: ch,glue = CALL t41, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r25r24, Register:i16 $r23r22, Register:i16 $r21r20, Register:i16 $r19r18, RegisterMask:Untyped, t41:1 | |
| Legalizing: t41: ch,glue = CopyToReg t39, Register:i16 $r19r18, Constant:i16<0>, t39:1 | |
| Legal node: nothing to do | |
| Combining: t41: ch,glue = CopyToReg t39, Register:i16 $r19r18, Constant:i16<0>, t39:1 | |
| Legalizing: t40: i16 = Register $r19r18 | |
| Combining: t40: i16 = Register $r19r18 | |
| Legalizing: t39: ch,glue = CopyToReg t37, Register:i16 $r21r20, Constant:i16<11>, t37:1 | |
| Legal node: nothing to do | |
| Combining: t39: ch,glue = CopyToReg t37, Register:i16 $r21r20, Constant:i16<11>, t37:1 | |
| Legalizing: t38: i16 = Register $r21r20 | |
| Combining: t38: i16 = Register $r21r20 | |
| Legalizing: t37: ch,glue = CopyToReg t35, Register:i16 $r23r22, Constant:i16<0>, t35:1 | |
| Legal node: nothing to do | |
| Combining: t37: ch,glue = CopyToReg t35, Register:i16 $r23r22, Constant:i16<0>, t35:1 | |
| Legalizing: t36: i16 = Register $r23r22 | |
| Combining: t36: i16 = Register $r23r22 | |
| Legalizing: t35: ch,glue = CopyToReg t34, Register:i16 $r25r24, t2 | |
| Legal node: nothing to do | |
| Combining: t35: ch,glue = CopyToReg t34, Register:i16 $r25r24, t2 | |
| Legalizing: t34: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Combining: t34: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Legalizing: t33: i16 = TargetExternalSymbol'__mulsi3' | |
| Legal node: nothing to do | |
| Combining: t33: i16 = TargetExternalSymbol'__mulsi3' | |
| Legalizing: t31: i16 = Constant<0> | |
| Legal node: nothing to do | |
| Combining: t31: i16 = Constant<0> | |
| Legalizing: t29: ch = RET_FLAG t28 | |
| Legal node: nothing to do | |
| Combining: t29: ch = RET_FLAG t28 | |
| Legalizing: t28: ch,glue = callseq_end t27, TargetConstant:i16<0>, TargetConstant:i16<0>, t27:1 | |
| Combining: t28: ch,glue = callseq_end t27, TargetConstant:i16<0>, TargetConstant:i16<0>, t27:1 | |
| Legalizing: t27: ch,glue = CALL t26, TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26:1 | |
| Legal node: nothing to do | |
| Combining: t27: ch,glue = CALL t26, TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26:1 | |
| Legalizing: t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| Legal node: nothing to do | |
| Combining: t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| Legalizing: t24: ch,glue = CopyToReg t22, Register:i16 $r25r24, t44 | |
| Legal node: nothing to do | |
| Combining: t24: ch,glue = CopyToReg t22, Register:i16 $r25r24, t44 | |
| Legalizing: t22: ch,glue = callseq_start t18:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Combining: t22: ch,glue = callseq_start t18:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Legalizing: t18: i8,ch,glue = CopyFromReg t16, Register:i8 $r24, t16:1 | |
| Legal node: nothing to do | |
| Combining: t18: i8,ch,glue = CopyFromReg t16, Register:i8 $r24, t16:1 | |
| Legalizing: t16: ch,glue = callseq_end t15, TargetConstant:i16<0>, TargetConstant:i16<0>, t15:1 | |
| Combining: t16: ch,glue = callseq_end t15, TargetConstant:i16<0>, TargetConstant:i16<0>, t15:1 | |
| Legalizing: t15: ch,glue = CALL t13, TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped | |
| Legal node: nothing to do | |
| Combining: t15: ch,glue = CALL t13, TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped | |
| Legalizing: t13: ch,glue = callseq_start t6, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Combining: t13: ch,glue = callseq_start t6, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| Legalizing: t6: ch = store<(store 2 into %ir.adjustedAngle._value1)> t0, t2, FrameIndex:i16<0>, undef:i16 | |
| Legalizing store operation | |
| Optimizing float store operations | |
| Legal store | |
| Combining: t6: ch = store<(store 2 into %ir.adjustedAngle._value1)> t0, t2, FrameIndex:i16<0>, undef:i16 | |
| Legalizing: t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| Legal node: nothing to do | |
| Combining: t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| Legalizing: t25: i8 = Register $r22 | |
| Combining: t25: i8 = Register $r22 | |
| Legalizing: t23: i16 = Register $r25r24 | |
| Combining: t23: i16 = Register $r25r24 | |
| Legalizing: t21: i16 = TargetGlobalAddress<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0 | |
| Legal node: nothing to do | |
| Combining: t21: i16 = TargetGlobalAddress<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0 | |
| Legalizing: t17: i8 = Register $r24 | |
| Combining: t17: i8 = Register $r24 | |
| Legalizing: t14: Untyped = RegisterMask | |
| Legal node: nothing to do | |
| Combining: t14: Untyped = RegisterMask | |
| Legalizing: t12: i16 = TargetConstant<0> | |
| Combining: t12: i16 = TargetConstant<0> | |
| Legalizing: t11: i16 = TargetGlobalAddress<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0 | |
| Legal node: nothing to do | |
| Combining: t11: i16 = TargetGlobalAddress<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0 | |
| Legalizing: t8: i16 = Constant<11> | |
| Legal node: nothing to do | |
| Combining: t8: i16 = Constant<11> | |
| Legalizing: t5: i16 = undef | |
| Legal node: nothing to do | |
| Combining: t5: i16 = undef | |
| Legalizing: t3: i16 = FrameIndex<0> | |
| Legal node: nothing to do | |
| Combining: t3: i16 = FrameIndex<0> | |
| Legalizing: t1: i16 = Register %0 | |
| Combining: t1: i16 = Register %0 | |
| Legalizing: t0: ch = EntryToken | |
| Legal node: nothing to do | |
| Combining: t0: ch = EntryToken | |
| Optimized legalized selection DAG: %bb.0 '_TF4main13setServoAngleFT5angleVs6UInt16_T_:entry' | |
| SelectionDAG has 37 nodes: | |
| t0: ch = EntryToken | |
| t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| t6: ch = store<(store 2 into %ir.adjustedAngle._value1)> t0, t2, FrameIndex:i16<0>, undef:i16 | |
| t13: ch,glue = callseq_start t6, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| t15: ch,glue = CALL t13, TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped | |
| t16: ch,glue = callseq_end t15, TargetConstant:i16<0>, TargetConstant:i16<0>, t15:1 | |
| t18: i8,ch,glue = CopyFromReg t16, Register:i8 $r24, t16:1 | |
| t22: ch,glue = callseq_start t18:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| t44: i16,ch,glue = CopyFromReg t43, Register:i16 $r25r24, t43:1 | |
| t24: ch,glue = CopyToReg t22, Register:i16 $r25r24, t44 | |
| t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| t27: ch,glue = CALL t26, TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26:1 | |
| t34: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| t35: ch,glue = CopyToReg t34, Register:i16 $r25r24, t2 | |
| t37: ch,glue = CopyToReg t35, Register:i16 $r23r22, Constant:i16<0>, t35:1 | |
| t39: ch,glue = CopyToReg t37, Register:i16 $r21r20, Constant:i16<11>, t37:1 | |
| t41: ch,glue = CopyToReg t39, Register:i16 $r19r18, Constant:i16<0>, t39:1 | |
| t42: ch,glue = CALL t41, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r25r24, Register:i16 $r23r22, Register:i16 $r21r20, Register:i16 $r19r18, RegisterMask:Untyped, t41:1 | |
| t43: ch,glue = callseq_end t42, TargetConstant:i16<0>, TargetConstant:i16<0>, t42:1 | |
| t28: ch,glue = callseq_end t27, TargetConstant:i16<0>, TargetConstant:i16<0>, t27:1 | |
| t29: ch = RET_FLAG t28 | |
| ===== Instruction selection begins: %bb.0 'entry' | |
| ISEL: Starting selection on root node: t29: ch = RET_FLAG t28 | |
| ISEL: Starting pattern match | |
| Morphed node: t29: ch = RET t28 | |
| ISEL: Match complete! | |
| ISEL: Starting selection on root node: t28: ch,glue = callseq_end t27, TargetConstant:i16<0>, TargetConstant:i16<0>, t27:1 | |
| ISEL: Starting pattern match | |
| Initial Opcode index to 817 | |
| Morphed node: t28: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t27, t27:1 | |
| ISEL: Match complete! | |
| ISEL: Starting selection on root node: t27: ch,glue = CALL t26, TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26:1 | |
| ISEL: Starting pattern match | |
| Initial Opcode index to 1544 | |
| OpcodeSwitch from 1548 to 1567 | |
| Morphed node: t27: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26, t26:1 | |
| ISEL: Match complete! | |
| ISEL: Starting selection on root node: t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| ISEL: Starting selection on root node: t24: ch,glue = CopyToReg t22, Register:i16 $r25r24, t44 | |
| ISEL: Starting selection on root node: t44: i16,ch,glue = CopyFromReg t43, Register:i16 $r25r24, t43:1 | |
| ISEL: Starting selection on root node: t43: ch,glue = callseq_end t42, TargetConstant:i16<0>, TargetConstant:i16<0>, t42:1 | |
| ISEL: Starting pattern match | |
| Initial Opcode index to 817 | |
| Morphed node: t43: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t42, t42:1 | |
| ISEL: Match complete! | |
| ISEL: Starting selection on root node: t22: ch,glue = callseq_start t18:1, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| ISEL: Starting pattern match | |
| Initial Opcode index to 792 | |
| Morphed node: t22: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t18:1 | |
| ISEL: Match complete! | |
| ISEL: Starting selection on root node: t42: ch,glue = CALL t41, TargetExternalSymbol:i16'__mulsi3', Register:i16 $r25r24, Register:i16 $r23r22, Register:i16 $r21r20, Register:i16 $r19r18, RegisterMask:Untyped, t41:1 | |
| ISEL: Starting pattern match | |
| Initial Opcode index to 1544 | |
| OpcodeSwitch from 1548 to 1580 | |
| Morphed node: t42: ch,glue = CALLk TargetExternalSymbol:i16'__mulsi3', Register:i16 $r25r24, Register:i16 $r23r22, Register:i16 $r21r20, Register:i16 $r19r18, RegisterMask:Untyped, t41, t41:1 | |
| ISEL: Match complete! | |
| ISEL: Starting selection on root node: t18: i8,ch,glue = CopyFromReg t16, Register:i8 $r24, t16:1 | |
| ISEL: Starting selection on root node: t41: ch,glue = CopyToReg t39, Register:i16 $r19r18, Constant:i16<0>, t39:1 | |
| ISEL: Starting selection on root node: t16: ch,glue = callseq_end t15, TargetConstant:i16<0>, TargetConstant:i16<0>, t15:1 | |
| ISEL: Starting pattern match | |
| Initial Opcode index to 817 | |
| Morphed node: t16: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t15, t15:1 | |
| ISEL: Match complete! | |
| ISEL: Starting selection on root node: t39: ch,glue = CopyToReg t37, Register:i16 $r21r20, Constant:i16<11>, t37:1 | |
| ISEL: Starting selection on root node: t15: ch,glue = CALL t13, TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped | |
| ISEL: Starting pattern match | |
| Initial Opcode index to 1544 | |
| OpcodeSwitch from 1548 to 1567 | |
| Morphed node: t15: ch,glue = CALLk TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped, t13 | |
| ISEL: Match complete! | |
| ISEL: Starting selection on root node: t37: ch,glue = CopyToReg t35, Register:i16 $r23r22, Constant:i16<0>, t35:1 | |
| ISEL: Starting selection on root node: t13: ch,glue = callseq_start t6, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| ISEL: Starting pattern match | |
| Initial Opcode index to 792 | |
| Morphed node: t13: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t6 | |
| ISEL: Match complete! | |
| ISEL: Starting selection on root node: t35: ch,glue = CopyToReg t34, Register:i16 $r25r24, t2 | |
| ISEL: Starting selection on root node: t6: ch = store<(store 2 into %ir.adjustedAngle._value1)> t0, t2, FrameIndex:i16<0>, undef:i16 | |
| ISEL: Starting pattern match | |
| Initial Opcode index to 76 | |
| Match failed at index 81 | |
| Continuing at 205 | |
| Skipped scope entry (due to false predicate) at index 211, continuing at 392 | |
| Creating constant: t50: i8 = TargetConstant<0> | |
| Morphed node: t6: ch = STDWPtrQRr<Mem:(store 2 into %ir.adjustedAngle._value1)> TargetFrameIndex:i16<0>, TargetConstant:i8<0>, t2, t0 | |
| ISEL: Match complete! | |
| ISEL: Starting selection on root node: t34: ch,glue = callseq_start t0, TargetConstant:i16<0>, TargetConstant:i16<0> | |
| ISEL: Starting pattern match | |
| Initial Opcode index to 792 | |
| Morphed node: t34: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0 | |
| ISEL: Match complete! | |
| ISEL: Starting selection on root node: t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| ISEL: Starting selection on root node: t40: i16 = Register $r19r18 | |
| ISEL: Starting selection on root node: t38: i16 = Register $r21r20 | |
| ISEL: Starting selection on root node: t36: i16 = Register $r23r22 | |
| ISEL: Starting selection on root node: t33: i16 = TargetExternalSymbol'__mulsi3' | |
| ISEL: Starting selection on root node: t31: i16 = Constant<0> | |
| ISEL: Starting pattern match | |
| Initial Opcode index to 2250 | |
| TypeSwitch[i16] from 2251 to 2265 | |
| Morphed node: t31: i16 = LDIWRdK TargetConstant:i16<0> | |
| ISEL: Match complete! | |
| ISEL: Starting selection on root node: t25: i8 = Register $r22 | |
| ISEL: Starting selection on root node: t23: i16 = Register $r25r24 | |
| ISEL: Starting selection on root node: t21: i16 = TargetGlobalAddress<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0 | |
| ISEL: Starting selection on root node: t17: i8 = Register $r24 | |
| ISEL: Starting selection on root node: t14: Untyped = RegisterMask | |
| ISEL: Starting selection on root node: t12: i16 = TargetConstant<0> | |
| ISEL: Starting selection on root node: t11: i16 = TargetGlobalAddress<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0 | |
| ISEL: Starting selection on root node: t8: i16 = Constant<11> | |
| ISEL: Starting pattern match | |
| Initial Opcode index to 2250 | |
| TypeSwitch[i16] from 2251 to 2265 | |
| Creating constant: t51: i16 = TargetConstant<11> | |
| Morphed node: t8: i16 = LDIWRdK TargetConstant:i16<11> | |
| ISEL: Match complete! | |
| ISEL: Starting selection on root node: t1: i16 = Register %0 | |
| ISEL: Starting selection on root node: t0: ch = EntryToken | |
| ===== Instruction selection ends: | |
| Selected selection DAG: %bb.0 '_TF4main13setServoAngleFT5angleVs6UInt16_T_:entry' | |
| SelectionDAG has 38 nodes: | |
| t0: ch = EntryToken | |
| t31: i16 = LDIWRdK TargetConstant:i16<0> | |
| t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| t34: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0 | |
| t35: ch,glue = CopyToReg t34:1, Register:i16 $r25r24, t2 | |
| t37: ch,glue = CopyToReg t35, Register:i16 $r23r22, t31, t35:1 | |
| t6: ch = STDWPtrQRr<Mem:(store 2 into %ir.adjustedAngle._value1)> TargetFrameIndex:i16<0>, TargetConstant:i8<0>, t2, t0 | |
| t13: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t6 | |
| t15: ch,glue = CALLk TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped, t13:1 | |
| t8: i16 = LDIWRdK TargetConstant:i16<11> | |
| t39: ch,glue = CopyToReg t37, Register:i16 $r21r20, t8, t37:1 | |
| t16: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t15, t15:1 | |
| t41: ch,glue = CopyToReg t39, Register:i16 $r19r18, t31, t39:1 | |
| t18: i8,ch,glue = CopyFromReg t16:1, Register:i8 $r24, t16:2 | |
| t42: ch,glue = CALLk TargetExternalSymbol:i16'__mulsi3', Register:i16 $r25r24, Register:i16 $r23r22, Register:i16 $r21r20, Register:i16 $r19r18, RegisterMask:Untyped, t41, t41:1 | |
| t43: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t42, t42:1 | |
| t22: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t18:1 | |
| t44: i16,ch,glue = CopyFromReg t43:1, Register:i16 $r25r24, t43:2 | |
| t24: ch,glue = CopyToReg t22:1, Register:i16 $r25r24, t44 | |
| t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| t27: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26, t26:1 | |
| t28: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t27, t27:1 | |
| t29: ch = RET t28:1 | |
| ********** List Scheduling %bb.0 'entry' ********** | |
| SU(0): t29: ch = RET t28:1 | |
| # preds left : 1 | |
| # succs left : 0 | |
| # rdefs left : 0 | |
| Latency : 1 | |
| Depth : 6 | |
| Height : 0 | |
| Predecessors: | |
| SU(1): Ord Latency=1 Barrier | |
| SU(1): t28: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t27, t27:1 | |
| t24: ch,glue = CopyToReg t22:1, Register:i16 $r25r24, t44 | |
| t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| t27: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26, t26:1 | |
| # preds left : 3 | |
| # succs left : 1 | |
| # rdefs left : 0 | |
| Latency : 1 | |
| Depth : 5 | |
| Height : 1 | |
| Predecessors: | |
| SU(2): Data Latency=1 | |
| SU(10): Ord Latency=1 Barrier | |
| SU(6): Data Latency=1 | |
| Successors: | |
| SU(0): Ord Latency=1 Barrier | |
| SU(2): t18: i8,ch,glue = CopyFromReg t16:1, Register:i8 $r24, t16:2 | |
| t15: ch,glue = CALLk TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped, t13:1 | |
| t16: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t15, t15:1 | |
| # preds left : 1 | |
| # succs left : 2 | |
| # rdefs left : 1 | |
| Latency : 1 | |
| Depth : 3 | |
| Height : 3 | |
| Predecessors: | |
| SU(3): Ord Latency=1 Barrier | |
| Successors: | |
| SU(1): Data Latency=1 | |
| SU(10): Ord Latency=1 Barrier | |
| SU(3): t13: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t6 | |
| # preds left : 1 | |
| # succs left : 1 | |
| # rdefs left : 0 | |
| Latency : 1 | |
| Depth : 2 | |
| Height : 4 | |
| Predecessors: | |
| SU(4): Ord Latency=1 Barrier | |
| Successors: | |
| SU(2): Ord Latency=1 Barrier | |
| SU(4): t6: ch = STDWPtrQRr<Mem:(store 2 into %ir.adjustedAngle._value1)> TargetFrameIndex:i16<0>, TargetConstant:i8<0>, t2, t0 | |
| # preds left : 1 | |
| # succs left : 1 | |
| # rdefs left : 0 | |
| Latency : 1 | |
| Depth : 1 | |
| Height : 5 | |
| Predecessors: | |
| SU(5): Data Latency=1 | |
| Successors: | |
| SU(3): Ord Latency=1 Barrier | |
| SU(5): t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| # preds left : 0 | |
| # succs left : 2 | |
| # rdefs left : 1 | |
| Latency : 1 | |
| Depth : 0 | |
| Height : 6 | |
| Successors: | |
| SU(4): Data Latency=1 | |
| SU(6): Data Latency=1 | |
| SU(6): t44: i16,ch,glue = CopyFromReg t43:1, Register:i16 $r25r24, t43:2 | |
| t35: ch,glue = CopyToReg t34:1, Register:i16 $r25r24, t2 | |
| t37: ch,glue = CopyToReg t35, Register:i16 $r23r22, t31, t35:1 | |
| t39: ch,glue = CopyToReg t37, Register:i16 $r21r20, t8, t37:1 | |
| t41: ch,glue = CopyToReg t39, Register:i16 $r19r18, t31, t39:1 | |
| t42: ch,glue = CALLk TargetExternalSymbol:i16'__mulsi3', Register:i16 $r25r24, Register:i16 $r23r22, Register:i16 $r21r20, Register:i16 $r19r18, RegisterMask:Untyped, t41, t41:1 | |
| t43: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t42, t42:1 | |
| # preds left : 4 | |
| # succs left : 1 | |
| # rdefs left : 1 | |
| Latency : 1 | |
| Depth : 1 | |
| Height : 2 | |
| Predecessors: | |
| SU(7): Data Latency=1 | |
| SU(8): Data Latency=1 | |
| SU(9): Ord Latency=1 Barrier | |
| SU(5): Data Latency=1 | |
| Successors: | |
| SU(1): Data Latency=1 | |
| SU(7): t31: i16 = LDIWRdK TargetConstant:i16<0> | |
| # preds left : 0 | |
| # succs left : 1 | |
| # rdefs left : 1 | |
| Latency : 1 | |
| Depth : 0 | |
| Height : 3 | |
| Successors: | |
| SU(6): Data Latency=1 | |
| SU(8): t8: i16 = LDIWRdK TargetConstant:i16<11> | |
| # preds left : 0 | |
| # succs left : 1 | |
| # rdefs left : 1 | |
| Latency : 1 | |
| Depth : 0 | |
| Height : 3 | |
| Successors: | |
| SU(6): Data Latency=1 | |
| SU(9): t34: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0 | |
| # preds left : 0 | |
| # succs left : 1 | |
| # rdefs left : 0 | |
| Latency : 1 | |
| Depth : 0 | |
| Height : 3 | |
| Successors: | |
| SU(6): Ord Latency=1 Barrier | |
| SU(10): t22: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t18:1 | |
| # preds left : 1 | |
| # succs left : 1 | |
| # rdefs left : 0 | |
| Latency : 1 | |
| Depth : 4 | |
| Height : 2 | |
| Predecessors: | |
| SU(2): Ord Latency=1 Barrier | |
| Successors: | |
| SU(1): Ord Latency=1 Barrier | |
| Prescheduling SU #4 next to PredSU #5 to guide scheduling in the presence of multiple uses | |
| Examining Available: | |
| Height 0: SU(0): t29: ch = RET t28:1 | |
| *** Scheduling [0]: SU(0): t29: ch = RET t28:1 | |
| Examining Available: | |
| Height 1: SU(1): t28: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t27, t27:1 | |
| t24: ch,glue = CopyToReg t22:1, Register:i16 $r25r24, t44 | |
| t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| t27: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26, t26:1 | |
| *** Scheduling [1]: SU(1): t28: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t27, t27:1 | |
| t24: ch,glue = CopyToReg t22:1, Register:i16 $r25r24, t44 | |
| t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| t27: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26, t26:1 | |
| Examining Available: | |
| Height 2: SU(10): t22: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t18:1 | |
| Height 2: SU(6): t44: i16,ch,glue = CopyFromReg t43:1, Register:i16 $r25r24, t43:2 | |
| t35: ch,glue = CopyToReg t34:1, Register:i16 $r25r24, t2 | |
| t37: ch,glue = CopyToReg t35, Register:i16 $r23r22, t31, t35:1 | |
| t39: ch,glue = CopyToReg t37, Register:i16 $r21r20, t8, t37:1 | |
| t41: ch,glue = CopyToReg t39, Register:i16 $r19r18, t31, t39:1 | |
| t42: ch,glue = CALLk TargetExternalSymbol:i16'__mulsi3', Register:i16 $r25r24, Register:i16 $r23r22, Register:i16 $r21r20, Register:i16 $r19r18, RegisterMask:Untyped, t41, t41:1 | |
| t43: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t42, t42:1 | |
| *** Scheduling [2]: SU(10): t22: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t18:1 | |
| Examining Available: | |
| Height 3: SU(2): t18: i8,ch,glue = CopyFromReg t16:1, Register:i8 $r24, t16:2 | |
| t15: ch,glue = CALLk TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped, t13:1 | |
| t16: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t15, t15:1 | |
| Height 2: SU(6): t44: i16,ch,glue = CopyFromReg t43:1, Register:i16 $r25r24, t43:2 | |
| t35: ch,glue = CopyToReg t34:1, Register:i16 $r25r24, t2 | |
| t37: ch,glue = CopyToReg t35, Register:i16 $r23r22, t31, t35:1 | |
| t39: ch,glue = CopyToReg t37, Register:i16 $r21r20, t8, t37:1 | |
| t41: ch,glue = CopyToReg t39, Register:i16 $r19r18, t31, t39:1 | |
| t42: ch,glue = CALLk TargetExternalSymbol:i16'__mulsi3', Register:i16 $r25r24, Register:i16 $r23r22, Register:i16 $r21r20, Register:i16 $r19r18, RegisterMask:Untyped, t41, t41:1 | |
| t43: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t42, t42:1 | |
| *** Scheduling [3]: SU(2): t18: i8,ch,glue = CopyFromReg t16:1, Register:i8 $r24, t16:2 | |
| t15: ch,glue = CALLk TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped, t13:1 | |
| t16: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t15, t15:1 | |
| Examining Available: | |
| Height 4: SU(3): t13: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t6 | |
| Height 2: SU(6): t44: i16,ch,glue = CopyFromReg t43:1, Register:i16 $r25r24, t43:2 | |
| t35: ch,glue = CopyToReg t34:1, Register:i16 $r25r24, t2 | |
| t37: ch,glue = CopyToReg t35, Register:i16 $r23r22, t31, t35:1 | |
| t39: ch,glue = CopyToReg t37, Register:i16 $r21r20, t8, t37:1 | |
| t41: ch,glue = CopyToReg t39, Register:i16 $r19r18, t31, t39:1 | |
| t42: ch,glue = CALLk TargetExternalSymbol:i16'__mulsi3', Register:i16 $r25r24, Register:i16 $r23r22, Register:i16 $r21r20, Register:i16 $r19r18, RegisterMask:Untyped, t41, t41:1 | |
| t43: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t42, t42:1 | |
| *** Scheduling [4]: SU(3): t13: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t6 | |
| Examining Available: | |
| Height 2: SU(6): t44: i16,ch,glue = CopyFromReg t43:1, Register:i16 $r25r24, t43:2 | |
| t35: ch,glue = CopyToReg t34:1, Register:i16 $r25r24, t2 | |
| t37: ch,glue = CopyToReg t35, Register:i16 $r23r22, t31, t35:1 | |
| t39: ch,glue = CopyToReg t37, Register:i16 $r21r20, t8, t37:1 | |
| t41: ch,glue = CopyToReg t39, Register:i16 $r19r18, t31, t39:1 | |
| t42: ch,glue = CALLk TargetExternalSymbol:i16'__mulsi3', Register:i16 $r25r24, Register:i16 $r23r22, Register:i16 $r21r20, Register:i16 $r19r18, RegisterMask:Untyped, t41, t41:1 | |
| t43: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t42, t42:1 | |
| *** Scheduling [5]: SU(6): t44: i16,ch,glue = CopyFromReg t43:1, Register:i16 $r25r24, t43:2 | |
| t35: ch,glue = CopyToReg t34:1, Register:i16 $r25r24, t2 | |
| t37: ch,glue = CopyToReg t35, Register:i16 $r23r22, t31, t35:1 | |
| t39: ch,glue = CopyToReg t37, Register:i16 $r21r20, t8, t37:1 | |
| t41: ch,glue = CopyToReg t39, Register:i16 $r19r18, t31, t39:1 | |
| t42: ch,glue = CALLk TargetExternalSymbol:i16'__mulsi3', Register:i16 $r25r24, Register:i16 $r23r22, Register:i16 $r21r20, Register:i16 $r19r18, RegisterMask:Untyped, t41, t41:1 | |
| t43: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t42, t42:1 | |
| Examining Available: | |
| Height 6: SU(7): t31: i16 = LDIWRdK TargetConstant:i16<0> | |
| Height 6: SU(8): t8: i16 = LDIWRdK TargetConstant:i16<11> | |
| Height 6: SU(4): t6: ch = STDWPtrQRr<Mem:(store 2 into %ir.adjustedAngle._value1)> TargetFrameIndex:i16<0>, TargetConstant:i8<0>, t2, t0 | |
| Height 6: SU(9): t34: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0 | |
| *** Scheduling [6]: SU(7): t31: i16 = LDIWRdK TargetConstant:i16<0> | |
| Examining Available: | |
| Height 6: SU(8): t8: i16 = LDIWRdK TargetConstant:i16<11> | |
| Height 6: SU(4): t6: ch = STDWPtrQRr<Mem:(store 2 into %ir.adjustedAngle._value1)> TargetFrameIndex:i16<0>, TargetConstant:i8<0>, t2, t0 | |
| Height 6: SU(9): t34: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0 | |
| *** Scheduling [7]: SU(8): t8: i16 = LDIWRdK TargetConstant:i16<11> | |
| Examining Available: | |
| Height 6: SU(4): t6: ch = STDWPtrQRr<Mem:(store 2 into %ir.adjustedAngle._value1)> TargetFrameIndex:i16<0>, TargetConstant:i8<0>, t2, t0 | |
| Height 6: SU(9): t34: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0 | |
| *** Scheduling [8]: SU(4): t6: ch = STDWPtrQRr<Mem:(store 2 into %ir.adjustedAngle._value1)> TargetFrameIndex:i16<0>, TargetConstant:i8<0>, t2, t0 | |
| Examining Available: | |
| Height 9: SU(5): t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| Height 6: SU(9): t34: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0 | |
| *** Scheduling [9]: SU(5): t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| Examining Available: | |
| Height 6: SU(9): t34: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0 | |
| *** Scheduling [10]: SU(9): t34: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0 | |
| *** Final schedule *** | |
| SU(9): t34: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t0 | |
| SU(5): t2: i16,ch = CopyFromReg t0, Register:i16 %0 | |
| SU(4): t6: ch = STDWPtrQRr<Mem:(store 2 into %ir.adjustedAngle._value1)> TargetFrameIndex:i16<0>, TargetConstant:i8<0>, t2, t0 | |
| SU(8): t8: i16 = LDIWRdK TargetConstant:i16<11> | |
| SU(7): t31: i16 = LDIWRdK TargetConstant:i16<0> | |
| SU(6): t44: i16,ch,glue = CopyFromReg t43:1, Register:i16 $r25r24, t43:2 | |
| t35: ch,glue = CopyToReg t34:1, Register:i16 $r25r24, t2 | |
| t37: ch,glue = CopyToReg t35, Register:i16 $r23r22, t31, t35:1 | |
| t39: ch,glue = CopyToReg t37, Register:i16 $r21r20, t8, t37:1 | |
| t41: ch,glue = CopyToReg t39, Register:i16 $r19r18, t31, t39:1 | |
| t42: ch,glue = CALLk TargetExternalSymbol:i16'__mulsi3', Register:i16 $r25r24, Register:i16 $r23r22, Register:i16 $r21r20, Register:i16 $r19r18, RegisterMask:Untyped, t41, t41:1 | |
| t43: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t42, t42:1 | |
| SU(3): t13: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t6 | |
| SU(2): t18: i8,ch,glue = CopyFromReg t16:1, Register:i8 $r24, t16:2 | |
| t15: ch,glue = CALLk TargetGlobalAddress:i16<i1 ()* @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_> 0, RegisterMask:Untyped, t13:1 | |
| t16: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t15, t15:1 | |
| SU(10): t22: i16,ch,glue = ADJCALLSTACKDOWN TargetConstant:i16<0>, TargetConstant:i16<0>, t18:1 | |
| SU(1): t28: i16,ch,glue = ADJCALLSTACKUP TargetConstant:i16<0>, TargetConstant:i16<0>, t27, t27:1 | |
| t24: ch,glue = CopyToReg t22:1, Register:i16 $r25r24, t44 | |
| t26: ch,glue = CopyToReg t24, Register:i8 $r22, t18, t24:1 | |
| t27: ch,glue = CALLk TargetGlobalAddress:i16<void (i16, i1)* @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_> 0, Register:i16 $r25r24, Register:i8 $r22, RegisterMask:Untyped, t26, t26:1 | |
| SU(0): t29: ch = RET t28:1 | |
| Total amount of phi nodes to update: 0 | |
| *** MachineFunction at end of ISel *** | |
| # Machine code for function _TF4main13setServoAngleFT5angleVs6UInt16_T_: IsSSA, TracksLiveness | |
| Frame Objects: | |
| fi#0: size=2, align=2, at location [SP+2] | |
| Function Live Ins: $r25r24 in %0 | |
| bb.0.entry: | |
| liveins: $r25r24 | |
| %0:dregs = COPY $r25r24 | |
| ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| STDWPtrQRr %stack.0.adjustedAngle, 0, %0:dregs :: (store 2 into %ir.adjustedAngle._value1) | |
| %1:dldregs = LDIWRdK 11 | |
| %2:dldregs = LDIWRdK 0 | |
| $r25r24 = COPY %0:dregs | |
| $r23r22 = COPY %2:dldregs | |
| $r21r20 = COPY %1:dldregs | |
| $r19r18 = COPY %2:dldregs | |
| CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r23r22, implicit $r21r20, implicit $r19r18, implicit-def $sp, implicit-def $r25r24 | |
| ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| %3:dregs = COPY $r25r24 | |
| ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| CALLk @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit-def $sp, implicit-def $r24 | |
| ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| %4:gpr8 = COPY $r24 | |
| ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| $r25r24 = COPY %3:dregs | |
| $r22 = COPY %4:gpr8 | |
| CALLk @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp | |
| ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| RET | |
| # End machine code for function _TF4main13setServoAngleFT5angleVs6UInt16_T_. | |
| # Machine code for function _TF4main13setServoAngleFT5angleVs6UInt16_T_: IsSSA, TracksLiveness | |
| Frame Objects: | |
| fi#0: size=2, align=2, at location [SP+2] | |
| Function Live Ins: $r25r24 in %0 | |
| 0B bb.0.entry: | |
| liveins: $r25r24 | |
| 16B %0:dregs = COPY $r25r24 | |
| 32B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 48B STDWPtrQRr %stack.0.adjustedAngle, 0, %0:dregs :: (store 2 into %ir.adjustedAngle._value1) | |
| 64B %1:dldregs = LDIWRdK 11 | |
| 80B %2:dldregs = LDIWRdK 0 | |
| 96B $r25r24 = COPY %0:dregs | |
| 112B $r23r22 = COPY %2:dldregs | |
| 128B $r21r20 = COPY %1:dldregs | |
| 144B $r19r18 = COPY %2:dldregs | |
| 160B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r23r22, implicit $r21r20, implicit $r19r18, implicit-def $sp, implicit-def $r25r24 | |
| 176B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 192B %3:dregs = COPY $r25r24 | |
| 208B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 224B CALLk @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit-def $sp, implicit-def $r24 | |
| 240B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 256B %4:gpr8 = COPY $r24 | |
| 272B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 288B $r25r24 = COPY %3:dregs | |
| 304B $r22 = COPY %4:gpr8 | |
| 320B CALLk @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp | |
| 336B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 352B RET | |
| # End machine code for function _TF4main13setServoAngleFT5angleVs6UInt16_T_. | |
| ********** Stack Coloring ********** | |
| ********** Function: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| Found 0 markers and 1 slots | |
| Slot structure: | |
| Slot #0 - 2 bytes. | |
| Total Stack size: 2 bytes | |
| Will not try to merge slots. | |
| Removed 0 markers. | |
| discovered a new reachable node %bb.0 | |
| ******** Pre-regalloc Machine LICM: _TF4main13setServoAngleFT5angleVs6UInt16_T_ ******** | |
| Entering: entry | |
| Exiting: entry | |
| Looking for trivial roots | |
| Found a new trivial root: %bb.0 | |
| Last visited node: %bb.0 | |
| Looking for non-trivial roots | |
| Total: 1, Num: 2 | |
| Discovered CFG nodes: | |
| 0: nullptr | |
| 1: nullptr | |
| 2: %bb.0 | |
| Found roots: %bb.0 | |
| discovered a new reachable node nullptr | |
| discovered a new reachable node %bb.0 | |
| block-frequency: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| ============================================================ | |
| reverse-post-order-traversal | |
| - 0: BB0[entry] | |
| loop-detection | |
| compute-mass-in-function | |
| - node: BB0[entry] | |
| => mass: ffffffffffffffff | |
| float-to-int: min = 1.0, max = 1.0, factor = 8.0 | |
| - BB0[entry]: float = 1.0, scaled = 8.0, int = 8 | |
| block-frequency-info: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| - BB0[entry]: float = 1.0, int = 8 | |
| ******** Machine Sinking ******** | |
| ********** PEEPHOLE OPTIMIZER ********** | |
| ********** Function: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| Encountered load fold barrier on STDWPtrQRr %stack.0.adjustedAngle, 0, %0:dregs :: (store 2 into %ir.adjustedAngle._value1) | |
| Encountered load fold barrier on CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r23r22, implicit $r21r20, implicit $r19r18, implicit-def $sp, implicit-def $r25r24 | |
| Encountered load fold barrier on CALLk @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit-def $sp, implicit-def $r24 | |
| Encountered load fold barrier on CALLk @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp | |
| Skipping Detect dead lanes pass | |
| ********** PROCESS IMPLICIT DEFS ********** | |
| ********** Function: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| discovered a new reachable node %bb.0 | |
| ********** REWRITING TWO-ADDR INSTRS ********** | |
| ********** Function: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| # Machine code for function _TF4main13setServoAngleFT5angleVs6UInt16_T_: NoPHIs, TracksLiveness | |
| Frame Objects: | |
| fi#0: size=2, align=2, at location [SP+2] | |
| Function Live Ins: $r25r24 in %0 | |
| 0B bb.0.entry: | |
| liveins: $r25r24 | |
| 16B %0:dregs = COPY killed $r25r24 | |
| 32B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 48B STDWPtrQRr %stack.0.adjustedAngle, 0, %0:dregs :: (store 2 into %ir.adjustedAngle._value1) | |
| 64B %1:dldregs = LDIWRdK 11 | |
| 80B %2:dldregs = LDIWRdK 0 | |
| 96B $r25r24 = COPY killed %0:dregs | |
| 112B $r23r22 = COPY %2:dldregs | |
| 128B $r21r20 = COPY killed %1:dldregs | |
| 144B $r19r18 = COPY killed %2:dldregs | |
| 160B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit killed $r25r24, implicit killed $r23r22, implicit killed $r21r20, implicit killed $r19r18, implicit-def $sp, implicit-def $r25r24 | |
| 176B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 192B %3:dregs = COPY killed $r25r24 | |
| 208B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 224B CALLk @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit-def $sp, implicit-def $r24 | |
| 240B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 256B %4:gpr8 = COPY killed $r24 | |
| 272B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 288B $r25r24 = COPY killed %3:dregs | |
| 304B $r22 = COPY killed %4:gpr8 | |
| 320B CALLk @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit killed $r25r24, implicit killed $r22, implicit-def $sp | |
| 336B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 352B RET | |
| # End machine code for function _TF4main13setServoAngleFT5angleVs6UInt16_T_. | |
| Computing live-in reg-units in ABI blocks. | |
| 0B %bb.0 R24#0 R25#0 | |
| Created 2 new intervals. | |
| ********** INTERVALS ********** | |
| R24 [0B,16r:0)[96r,160r:4)[160r,192r:3)[224r,256r:1)[288r,320r:2) 0@0B-phi 1@224r 2@288r 3@160r 4@96r | |
| R25 [0B,16r:0)[96r,160r:3)[160r,192r:2)[288r,320r:1) 0@0B-phi 1@288r 2@160r 3@96r | |
| %0 [16r,96r:0) 0@16r weight:0.000000e+00 | |
| %1 [64r,128r:0) 0@64r weight:0.000000e+00 | |
| %2 [80r,144r:0) 0@80r weight:0.000000e+00 | |
| %3 [192r,288r:0) 0@192r weight:0.000000e+00 | |
| %4 [256r,304r:0) 0@256r weight:0.000000e+00 | |
| RegMasks: 160r 224r 320r | |
| ********** MACHINEINSTRS ********** | |
| # Machine code for function _TF4main13setServoAngleFT5angleVs6UInt16_T_: NoPHIs, TracksLiveness | |
| Frame Objects: | |
| fi#0: size=2, align=2, at location [SP+2] | |
| Function Live Ins: $r25r24 in %0 | |
| 0B bb.0.entry: | |
| liveins: $r25r24 | |
| 16B %0:dregs = COPY $r25r24 | |
| 32B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 48B STDWPtrQRr %stack.0.adjustedAngle, 0, %0:dregs :: (store 2 into %ir.adjustedAngle._value1) | |
| 64B %1:dldregs = LDIWRdK 11 | |
| 80B %2:dldregs = LDIWRdK 0 | |
| 96B $r25r24 = COPY %0:dregs | |
| 112B $r23r22 = COPY %2:dldregs | |
| 128B $r21r20 = COPY %1:dldregs | |
| 144B $r19r18 = COPY %2:dldregs | |
| 160B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit killed $r23r22, implicit killed $r21r20, implicit killed $r19r18, implicit-def $sp, implicit-def $r25r24 | |
| 176B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 192B %3:dregs = COPY $r25r24 | |
| 208B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 224B CALLk @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit-def $sp, implicit-def $r24 | |
| 240B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 256B %4:gpr8 = COPY $r24 | |
| 272B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 288B $r25r24 = COPY %3:dregs | |
| 304B $r22 = COPY %4:gpr8 | |
| 320B CALLk @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit killed $r22, implicit-def $sp | |
| 336B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 352B RET | |
| # End machine code for function _TF4main13setServoAngleFT5angleVs6UInt16_T_. | |
| ********** SIMPLE REGISTER COALESCING ********** | |
| ********** Function: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| ********** JOINING INTERVALS *********** | |
| entry: | |
| 16B %0:dregs = COPY $r25r24 | |
| Considering merging %0 with $r25r24 | |
| Can only merge into reserved registers. | |
| 96B $r25r24 = COPY %0:dregs | |
| Considering merging %0 with $r25r24 | |
| Can only merge into reserved registers. | |
| 112B $r23r22 = COPY %2:dldregs | |
| Considering merging %2 with $r23r22 | |
| Can only merge into reserved registers. | |
| 128B $r21r20 = COPY %1:dldregs | |
| Considering merging %1 with $r21r20 | |
| Can only merge into reserved registers. | |
| 144B $r19r18 = COPY %2:dldregs | |
| Considering merging %2 with $r19r18 | |
| Can only merge into reserved registers. | |
| 192B %3:dregs = COPY $r25r24 | |
| Considering merging %3 with $r25r24 | |
| Can only merge into reserved registers. | |
| 256B %4:gpr8 = COPY $r24 | |
| Considering merging %4 with $r24 | |
| Can only merge into reserved registers. | |
| 288B $r25r24 = COPY %3:dregs | |
| Considering merging %3 with $r25r24 | |
| Can only merge into reserved registers. | |
| 304B $r22 = COPY %4:gpr8 | |
| Considering merging %4 with $r22 | |
| Can only merge into reserved registers. | |
| 96B $r25r24 = COPY %0:dregs | |
| Considering merging %0 with $r25r24 | |
| Can only merge into reserved registers. | |
| 288B $r25r24 = COPY %3:dregs | |
| Considering merging %3 with $r25r24 | |
| Can only merge into reserved registers. | |
| 304B $r22 = COPY %4:gpr8 | |
| Considering merging %4 with $r22 | |
| Can only merge into reserved registers. | |
| Trying to inflate 0 regs. | |
| ********** INTERVALS ********** | |
| R24 [0B,16r:0)[96r,160r:4)[160r,192r:3)[224r,256r:1)[288r,320r:2) 0@0B-phi 1@224r 2@288r 3@160r 4@96r | |
| R25 [0B,16r:0)[96r,160r:3)[160r,192r:2)[288r,320r:1) 0@0B-phi 1@288r 2@160r 3@96r | |
| %0 [16r,96r:0) 0@16r weight:0.000000e+00 | |
| %1 [64r,128r:0) 0@64r weight:0.000000e+00 | |
| %2 [80r,144r:0) 0@80r weight:0.000000e+00 | |
| %3 [192r,288r:0) 0@192r weight:0.000000e+00 | |
| %4 [256r,304r:0) 0@256r weight:0.000000e+00 | |
| RegMasks: 160r 224r 320r | |
| ********** MACHINEINSTRS ********** | |
| # Machine code for function _TF4main13setServoAngleFT5angleVs6UInt16_T_: NoPHIs, TracksLiveness | |
| Frame Objects: | |
| fi#0: size=2, align=2, at location [SP+2] | |
| Function Live Ins: $r25r24 in %0 | |
| 0B bb.0.entry: | |
| liveins: $r25r24 | |
| 16B %0:dregs = COPY $r25r24 | |
| 32B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 48B STDWPtrQRr %stack.0.adjustedAngle, 0, %0:dregs :: (store 2 into %ir.adjustedAngle._value1) | |
| 64B %1:dldregs = LDIWRdK 11 | |
| 80B %2:dldregs = LDIWRdK 0 | |
| 96B $r25r24 = COPY %0:dregs | |
| 112B $r23r22 = COPY %2:dldregs | |
| 128B $r21r20 = COPY %1:dldregs | |
| 144B $r19r18 = COPY %2:dldregs | |
| 160B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit killed $r23r22, implicit killed $r21r20, implicit killed $r19r18, implicit-def $sp, implicit-def $r25r24 | |
| 176B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 192B %3:dregs = COPY $r25r24 | |
| 208B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 224B CALLk @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit-def $sp, implicit-def $r24 | |
| 240B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 256B %4:gpr8 = COPY $r24 | |
| 272B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 288B $r25r24 = COPY %3:dregs | |
| 304B $r22 = COPY %4:gpr8 | |
| 320B CALLk @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit killed $r22, implicit-def $sp | |
| 336B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 352B RET | |
| # End machine code for function _TF4main13setServoAngleFT5angleVs6UInt16_T_. | |
| block-frequency: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| ============================================================ | |
| reverse-post-order-traversal | |
| - 0: BB0[entry] | |
| loop-detection | |
| compute-mass-in-function | |
| - node: BB0[entry] | |
| => mass: ffffffffffffffff | |
| float-to-int: min = 1.0, max = 1.0, factor = 8.0 | |
| - BB0[entry]: float = 1.0, scaled = 8.0, int = 8 | |
| block-frequency-info: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| - BB0[entry]: float = 1.0, int = 8 | |
| ********** GREEDY REGISTER ALLOCATION ********** | |
| ********** Function: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| ********** Compute Spill Weights ********** | |
| ********** Function: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| ********** INTERVALS ********** | |
| R24 [0B,16r:0)[96r,160r:4)[160r,192r:3)[224r,256r:1)[288r,320r:2) 0@0B-phi 1@224r 2@288r 3@160r 4@96r | |
| R25 [0B,16r:0)[96r,160r:3)[160r,192r:2)[288r,320r:1) 0@0B-phi 1@288r 2@160r 3@96r | |
| %0 [16r,96r:0) 0@16r weight:6.312500e-03 | |
| %1 [64r,128r:0) 0@64r weight:2.176724e-03 | |
| %2 [80r,144r:0) 0@80r weight:3.265086e-03 | |
| %3 [192r,288r:0) 0@192r weight:4.072580e-03 | |
| %4 [256r,304r:0) 0@256r weight:4.508928e-03 | |
| RegMasks: 160r 224r 320r | |
| ********** MACHINEINSTRS ********** | |
| # Machine code for function _TF4main13setServoAngleFT5angleVs6UInt16_T_: NoPHIs, TracksLiveness | |
| Frame Objects: | |
| fi#0: size=2, align=2, at location [SP+2] | |
| Function Live Ins: $r25r24 in %0 | |
| 0B bb.0.entry: | |
| liveins: $r25r24 | |
| 16B %0:dregs = COPY $r25r24 | |
| 32B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 48B STDWPtrQRr %stack.0.adjustedAngle, 0, %0:dregs :: (store 2 into %ir.adjustedAngle._value1) | |
| 64B %1:dldregs = LDIWRdK 11 | |
| 80B %2:dldregs = LDIWRdK 0 | |
| 96B $r25r24 = COPY %0:dregs | |
| 112B $r23r22 = COPY %2:dldregs | |
| 128B $r21r20 = COPY %1:dldregs | |
| 144B $r19r18 = COPY %2:dldregs | |
| 160B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit killed $r23r22, implicit killed $r21r20, implicit killed $r19r18, implicit-def $sp, implicit-def $r25r24 | |
| 176B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 192B %3:dregs = COPY $r25r24 | |
| 208B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 224B CALLk @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit-def $sp, implicit-def $r24 | |
| 240B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 256B %4:gpr8 = COPY $r24 | |
| 272B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 288B $r25r24 = COPY %3:dregs | |
| 304B $r22 = COPY %4:gpr8 | |
| 320B CALLk @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit killed $r22, implicit-def $sp | |
| 336B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 352B RET | |
| # End machine code for function _TF4main13setServoAngleFT5angleVs6UInt16_T_. | |
| selectOrSplit DREGS:%0 [16r,96r:0) 0@16r weight:6.312500e-03 w=6.312500e-03 | |
| AllocationOrder(DREGS) = [ $r25r24 $r19r18 $r21r20 $r23r22 $r31r30 $r27r26 $r17r16 $r15r14 $r13r12 $r11r10 $r9r8 $r7r6 $r5r4 $r3r2 ] | |
| hints: $r25r24 | |
| assigning %0 to $r25r24: R24 [16r,96r:0) 0@16r R25 [16r,96r:0) 0@16r | |
| selectOrSplit DLDREGS:%1 [64r,128r:0) 0@64r weight:2.176724e-03 w=2.176724e-03 | |
| AllocationOrder(DLDREGS) = [ $r25r24 $r19r18 $r21r20 $r23r22 $r31r30 $r27r26 $r17r16 ] (sub-class) | |
| hints: $r21r20 | |
| assigning %1 to $r21r20: R20 [64r,128r:0) 0@64r R21 [64r,128r:0) 0@64r | |
| selectOrSplit DLDREGS:%2 [80r,144r:0) 0@80r weight:3.265086e-03 w=3.265086e-03 | |
| hints: $r19r18 $r23r22 | |
| assigning %2 to $r19r18: R18 [80r,144r:0) 0@80r R19 [80r,144r:0) 0@80r | |
| selectOrSplit DREGS:%3 [192r,288r:0) 0@192r weight:4.072580e-03 w=4.072580e-03 | |
| hints: $r25r24 | |
| missed hint $r25r24 | |
| assigning %3 to $r17r16: R16 [192r,288r:0) 0@192r R17 [192r,288r:0) 0@192r | |
| selectOrSplit GPR8:%4 [256r,304r:0) 0@256r weight:4.508928e-03 w=4.508928e-03 | |
| AllocationOrder(GPR8) = [ $r24 $r25 $r18 $r19 $r20 $r21 $r22 $r23 $r30 $r31 $r26 $r27 $r17 $r16 $r15 $r14 $r13 $r12 $r11 $r10 $r9 $r8 $r7 $r6 $r5 $r4 $r3 $r2 ] | |
| hints: $r22 $r24 | |
| assigning %4 to $r22: R22 [256r,304r:0) 0@256r | |
| Trying to reconcile hints for: %3($r17r16) | |
| %3($r17r16) is recolorable. | |
| ********** REWRITE VIRTUAL REGISTERS ********** | |
| ********** Function: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| ********** REGISTER MAP ********** | |
| [%0 -> $r25r24] DREGS | |
| [%1 -> $r21r20] DLDREGS | |
| [%2 -> $r19r18] DLDREGS | |
| [%3 -> $r17r16] DREGS | |
| [%4 -> $r22] GPR8 | |
| 0B bb.0.entry: | |
| liveins: $r25r24 | |
| 16B %0:dregs = COPY $r25r24 | |
| 32B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 48B STDWPtrQRr %stack.0.adjustedAngle, 0, %0:dregs :: (store 2 into %ir.adjustedAngle._value1) | |
| 64B %1:dldregs = LDIWRdK 11 | |
| 80B %2:dldregs = LDIWRdK 0 | |
| 96B $r25r24 = COPY killed %0:dregs | |
| 112B $r23r22 = COPY %2:dldregs | |
| 128B $r21r20 = COPY killed %1:dldregs | |
| 144B $r19r18 = COPY killed %2:dldregs | |
| 160B CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r23r22, implicit $r21r20, implicit $r19r18, implicit-def $sp, implicit-def $r25r24 | |
| 176B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 192B %3:dregs = COPY $r25r24 | |
| 208B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 224B CALLk @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit-def $sp, implicit-def $r24 | |
| 240B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 256B %4:gpr8 = COPY $r24 | |
| 272B ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 288B $r25r24 = COPY killed %3:dregs | |
| 304B $r22 = COPY killed %4:gpr8 | |
| 320B CALLk @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp | |
| 336B ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| 352B RET | |
| > $r25r24 = COPY $r25r24 | |
| Identity copy: $r25r24 = COPY $r25r24 | |
| deleted. | |
| > ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| > STDWPtrQRr %stack.0.adjustedAngle, 0, $r25r24 :: (store 2 into %ir.adjustedAngle._value1) | |
| > $r21r20 = LDIWRdK 11 | |
| > $r19r18 = LDIWRdK 0 | |
| > $r25r24 = COPY killed $r25r24 | |
| Identity copy: $r25r24 = COPY killed $r25r24 | |
| deleted. | |
| > $r23r22 = COPY $r19r18 | |
| > $r21r20 = COPY killed $r21r20 | |
| Identity copy: $r21r20 = COPY killed $r21r20 | |
| deleted. | |
| > $r19r18 = COPY killed $r19r18 | |
| Identity copy: $r19r18 = COPY killed $r19r18 | |
| deleted. | |
| > CALLk &__mulsi3, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r23r22, implicit $r21r20, implicit $r19r18, implicit-def $sp, implicit-def $r25r24 | |
| > ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| > $r17r16 = COPY $r25r24 | |
| > ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| > CALLk @_TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit-def $sp, implicit-def $r24 | |
| > ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| > $r22 = COPY $r24 | |
| > ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| > $r25r24 = COPY killed $r17r16 | |
| > $r22 = COPY killed $r22 | |
| Identity copy: $r22 = COPY killed $r22 | |
| deleted. | |
| > CALLk @_TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_, <regmask $r2 $r3 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $r12 $r13 $r14 $r15 $r16 $r17 $r28 $r29 $r3r2 $r5r4 $r7r6 $r9r8 $r11r10 $r13r12 $r15r14 $r17r16 $r29r28>, implicit $sp, implicit $r25r24, implicit $r22, implicit-def $sp | |
| > ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit-def dead $sreg, implicit $sp | |
| > RET | |
| ********** Stack Slot Coloring ********** | |
| ********** Function: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| MCP: CopyPropagateBlock entry | |
| MCP: Copy is a deletion candidate: $r23r22 = COPY $r19r18 | |
| MCP: Copy is used - not dead: $r23r22 = COPY $r19r18 | |
| MCP: Copy is used - not dead: $r23r22 = COPY $r19r18 | |
| MCP: Copy is a deletion candidate: $r17r16 = COPY $r25r24 | |
| MCP: Copy is a deletion candidate: $r22 = COPY $r24 | |
| MCP: Copy is used - not dead: $r17r16 = COPY $r25r24 | |
| MCP: Copy is used - not dead: $r17r16 = COPY $r25r24 | |
| MCP: Copy is a deletion candidate: $r25r24 = COPY killed $r17r16 | |
| MCP: Copy is used - not dead: $r25r24 = COPY killed $r17r16 | |
| MCP: Copy is used - not dead: $r25r24 = COPY killed $r17r16 | |
| MCP: Copy is used - not dead: $r22 = COPY $r24 | |
| ******** Post-regalloc Machine LICM: _TF4main13setServoAngleFT5angleVs6UInt16_T_ ******** | |
| block-frequency: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| ============================================================ | |
| reverse-post-order-traversal | |
| - 0: BB0[entry] | |
| loop-detection | |
| compute-mass-in-function | |
| - node: BB0[entry] | |
| => mass: ffffffffffffffff | |
| float-to-int: min = 1.0, max = 1.0, factor = 8.0 | |
| - BB0[entry]: float = 1.0, scaled = 8.0, int = 8 | |
| block-frequency-info: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| - BB0[entry]: float = 1.0, int = 8 | |
| Looking for trivial roots | |
| Found a new trivial root: %bb.0 | |
| Last visited node: %bb.0 | |
| Looking for non-trivial roots | |
| Total: 1, Num: 2 | |
| Discovered CFG nodes: | |
| 0: nullptr | |
| 1: nullptr | |
| 2: %bb.0 | |
| Found roots: %bb.0 | |
| discovered a new reachable node nullptr | |
| discovered a new reachable node %bb.0 | |
| alloc FI(1) at SP[-3] | |
| alloc FI(2) at SP[-4] | |
| alloc FI(0) at SP[-6] | |
| MCP: CopyPropagateBlock entry | |
| MCP: Copy is a deletion candidate: $r23r22 = COPY $r19r18 | |
| MCP: Copy is used - not dead: $r23r22 = COPY $r19r18 | |
| MCP: Copy is used - not dead: $r23r22 = COPY $r19r18 | |
| MCP: Copy is a deletion candidate: $r17r16 = COPY $r25r24 | |
| MCP: Copy is a deletion candidate: $r22 = COPY $r24 | |
| MCP: Copy is used - not dead: $r17r16 = COPY $r25r24 | |
| MCP: Copy is used - not dead: $r17r16 = COPY $r25r24 | |
| MCP: Copy is a deletion candidate: $r25r24 = COPY killed $r17r16 | |
| MCP: Copy is used - not dead: $r25r24 = COPY killed $r17r16 | |
| MCP: Copy is used - not dead: $r25r24 = COPY killed $r17r16 | |
| MCP: Copy is used - not dead: $r22 = COPY $r24 | |
| Machine Function | |
| ********** EXPANDING POST-RA PSEUDO INSTRS ********** | |
| ********** Function: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| real copy: $r23r22 = COPY $r19r18 | |
| replaced by: $r23 = MOVRdRr $r19 | |
| real copy: $r17r16 = COPY $r25r24 | |
| replaced by: $r17 = MOVRdRr $r25 | |
| real copy: $r22 = COPY $r24 | |
| replaced by: $r22 = MOVRdRr $r24 | |
| real copy: $r25r24 = COPY killed $r17r16 | |
| replaced by: $r25 = MOVRdRr killed $r17 | |
| discovered a new reachable node %bb.0 | |
| block-frequency: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| ============================================================ | |
| reverse-post-order-traversal | |
| - 0: BB0[entry] | |
| loop-detection | |
| compute-mass-in-function | |
| - node: BB0[entry] | |
| => mass: ffffffffffffffff | |
| float-to-int: min = 1.0, max = 1.0, factor = 8.0 | |
| - BB0[entry]: float = 1.0, scaled = 8.0, int = 8 | |
| block-frequency-info: _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| - BB0[entry]: float = 1.0, int = 8 | |
| Looking for trivial roots | |
| Found a new trivial root: %bb.0 | |
| Last visited node: %bb.0 | |
| Looking for non-trivial roots | |
| Total: 1, Num: 2 | |
| Discovered CFG nodes: | |
| 0: nullptr | |
| 1: nullptr | |
| 2: %bb.0 | |
| Found roots: %bb.0 | |
| discovered a new reachable node nullptr | |
| discovered a new reachable node %bb.0 | |
| ***** BranchRelaxation ***** | |
| Basic blocks before relaxation | |
| bb.0 offset=00000000 size=0x54 | |
| Basic blocks after relaxation | |
| bb.0 offset=00000000 size=0x54 | |
| ********** COMPUTING STACKMAP LIVENESS: _TF4main13setServoAngleFT5angleVs6UInt16_T_ ********** | |
| .hidden _TF4main13setServoAngleFT5angleVs6UInt16_T_ ; -- Begin function _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| .globl _TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| .p2align 1 | |
| .type _TF4main13setServoAngleFT5angleVs6UInt16_T_,@function | |
| _TF4main13setServoAngleFT5angleVs6UInt16_T_: ; @_TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| discovered a new reachable node %bb.0 | |
| ; %bb.0: ; %entry | |
| push r28 | |
| push r29 | |
| push r16 | |
| push r17 | |
| in r28, 61 | |
| in r29, 62 | |
| sbiw r28, 2 | |
| in r0, 63 | |
| cli | |
| out 62, r29 | |
| out 63, r0 | |
| out 61, r28 | |
| std Y+1, r24 | |
| std Y+2, r25 | |
| ldi r20, 11 | |
| ldi r21, 0 | |
| ldi r18, 0 | |
| ldi r19, 0 | |
| mov r22, r18 | |
| mov r23, r19 | |
| call __mulsi3 | |
| mov r16, r24 | |
| mov r17, r25 | |
| call _TIF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_A0_ | |
| mov r22, r24 | |
| mov r24, r16 | |
| mov r25, r17 | |
| call _TF3AVR5printFT11unsignedIntVs6UInt1610addNewlineSb_T_ | |
| adiw r28, 2 | |
| in r0, 63 | |
| cli | |
| out 62, r29 | |
| out 63, r0 | |
| out 61, r28 | |
| pop r17 | |
| pop r16 | |
| pop r29 | |
| pop r28 | |
| ret | |
| .Lfunc_end0: | |
| .size _TF4main13setServoAngleFT5angleVs6UInt16_T_, .Lfunc_end0-_TF4main13setServoAngleFT5angleVs6UInt16_T_ | |
| ; -- End function | |
| ; Declaring this symbol tells the CRT that it should | |
| ;copy all variables from program memory to RAM on startup | |
| .globl __do_copy_data | |
| ; Declaring this symbol tells the CRT that it should | |
| ;clear the zeroed data section on startup | |
| .globl __do_clear_bss | |
| Carls-MacBook-Air:AVR carlpeto$ |
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