Created
September 24, 2012 06:22
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diff -crB 2/1 1/1 | |
*** 2/1 2012-09-24 11:43:09.543613280 +0530 | |
--- 1/1 2012-09-24 11:43:32.919242952 +0530 | |
*************** | |
*** 1,2 **** | |
! linux-stable | |
! v2.6.35.7 | |
--- 1 ---- | |
! stock-samsung | |
Only in 2/arch/alpha/kernel: .gitignore | |
Only in 2/arch/arm/boot/compressed: .gitignore | |
diff -crB 2/arch/arm/boot/compressed/head.S 1/arch/arm/boot/compressed/head.S | |
*** 2/arch/arm/boot/compressed/head.S 2012-09-24 11:44:00.410844677 +0530 | |
--- 1/arch/arm/boot/compressed/head.S 2011-05-18 12:34:10.000000000 +0530 | |
*************** | |
*** 21,27 **** | |
#if defined(CONFIG_DEBUG_ICEDCC) | |
! #ifdef CONFIG_CPU_V6 | |
.macro loadsp, rb, tmp | |
.endm | |
.macro writeb, ch, rb | |
--- 21,27 ---- | |
#if defined(CONFIG_DEBUG_ICEDCC) | |
! #ifdef defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V7) | |
.macro loadsp, rb, tmp | |
.endm | |
.macro writeb, ch, rb | |
*************** | |
*** 627,632 **** | |
--- 627,634 ---- | |
@ b __arm6_mmu_cache_off | |
@ b __armv3_mmu_cache_flush | |
+ #if !defined(CONFIG_CPU_V7) | |
+ /* This collides with some V7 IDs, preventing correct detection */ | |
.word 0x00000000 @ old ARM ID | |
.word 0x0000f000 | |
mov pc, lr | |
*************** | |
*** 635,640 **** | |
--- 637,643 ---- | |
THUMB( nop ) | |
mov pc, lr | |
THUMB( nop ) | |
+ #endif | |
.word 0x41007000 @ ARM7/710 | |
.word 0xfff8fe00 | |
diff -crB 2/arch/arm/boot/compressed/misc.c 1/arch/arm/boot/compressed/misc.c | |
*** 2/arch/arm/boot/compressed/misc.c 2012-09-24 11:44:00.410844677 +0530 | |
--- 1/arch/arm/boot/compressed/misc.c 2011-05-18 12:34:10.000000000 +0530 | |
*************** | |
*** 39,45 **** | |
#ifdef CONFIG_DEBUG_ICEDCC | |
! #ifdef CONFIG_CPU_V6 | |
static void icedcc_putc(int ch) | |
{ | |
--- 39,45 ---- | |
#ifdef CONFIG_DEBUG_ICEDCC | |
! #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V7) | |
static void icedcc_putc(int ch) | |
{ | |
Only in 2/arch/arm/boot: .gitignore | |
Only in 1/arch/arm/common: fiq_debugger.c | |
Only in 1/arch/arm/common: fiq_debugger_ringbuf.h | |
Only in 1/arch/arm/common: fiq_glue.S | |
Only in 1/arch/arm/common: fiq_glue_setup.c | |
diff -crB 2/arch/arm/common/Kconfig 1/arch/arm/common/Kconfig | |
*** 2/arch/arm/common/Kconfig 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/common/Kconfig 2011-05-18 12:34:10.000000000 +0530 | |
*************** | |
*** 6,11 **** | |
--- 6,12 ---- | |
config ARM_VIC_NR | |
int | |
+ default 4 if ARCH_S5PV210 | |
default 2 | |
depends on ARM_VIC | |
help | |
*************** | |
*** 41,43 **** | |
--- 42,87 ---- | |
config COMMON_CLKDEV | |
bool | |
select HAVE_CLK | |
+ | |
+ config FIQ_GLUE | |
+ bool | |
+ select FIQ | |
+ | |
+ config FIQ_DEBUGGER | |
+ bool "FIQ Mode Serial Debugger" | |
+ select FIQ | |
+ select FIQ_GLUE | |
+ select KERNEL_DEBUGGER_CORE | |
+ default n | |
+ help | |
+ The FIQ serial debugger can accept commands even when the | |
+ kernel is unresponsive due to being stuck with interrupts | |
+ disabled. Depends on the kernel debugger core in drivers/misc. | |
+ | |
+ | |
+ config FIQ_DEBUGGER_NO_SLEEP | |
+ bool "Keep serial debugger active" | |
+ depends on FIQ_DEBUGGER | |
+ default n | |
+ help | |
+ Enables the serial debugger at boot. Passing | |
+ fiq_debugger.no_sleep on the kernel commandline will | |
+ override this config option. | |
+ | |
+ config FIQ_DEBUGGER_WAKEUP_IRQ_ALWAYS_ON | |
+ bool "Don't disable wakeup IRQ when debugger is active" | |
+ depends on FIQ_DEBUGGER | |
+ default n | |
+ help | |
+ Don't disable the wakeup irq when enabling the uart clock. This will | |
+ cause extra interrupts, but it makes the serial debugger usable with | |
+ on some MSM radio builds that ignore the uart clock request in power | |
+ collapse. | |
+ | |
+ config FIQ_DEBUGGER_CONSOLE | |
+ bool "Console on FIQ Serial Debugger port" | |
+ depends on FIQ_DEBUGGER | |
+ default n | |
+ help | |
+ Enables a console so that printk messages are displayed on | |
+ the debugger serial port as the occur. | |
diff -crB 2/arch/arm/common/Makefile 1/arch/arm/common/Makefile | |
*** 2/arch/arm/common/Makefile 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/common/Makefile 2011-05-18 12:34:10.000000000 +0530 | |
*************** | |
*** 17,19 **** | |
--- 17,21 ---- | |
obj-$(CONFIG_ARCH_IXP23XX) += uengine.o | |
obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o | |
obj-$(CONFIG_COMMON_CLKDEV) += clkdev.o | |
+ obj-$(CONFIG_FIQ_GLUE) += fiq_glue.o fiq_glue_setup.o | |
+ obj-$(CONFIG_FIQ_DEBUGGER) += fiq_debugger.o | |
diff -crB 2/arch/arm/common/pl330.c 1/arch/arm/common/pl330.c | |
*** 2/arch/arm/common/pl330.c 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/common/pl330.c 2011-05-18 12:34:10.000000000 +0530 | |
*************** | |
*** 1,4 **** | |
! /* linux/arch/arm/common/pl330.c | |
* | |
* Copyright (C) 2010 Samsung Electronics Co Ltd. | |
* Jaswinder Singh <jassi.brar@samsung.com> | |
--- 1,4 ---- | |
! /* linux/arch/arm/common/pl330.c | |
* | |
* Copyright (C) 2010 Samsung Electronics Co Ltd. | |
* Jaswinder Singh <jassi.brar@samsung.com> | |
*************** | |
*** 1117,1122 **** | |
--- 1117,1173 ---- | |
return off; | |
} | |
+ /* Returns bytes consumed and updates bursts */ | |
+ static inline int _loop_ring(unsigned dry_run, u8 buf[], | |
+ unsigned long *bursts, const struct _xfer_spec *pxs, int ev) | |
+ { | |
+ int cyc, off; | |
+ unsigned lcnt0, lcnt1, ljmp0, ljmp1, ljmpfe; | |
+ struct _arg_LPEND lpend; | |
+ | |
+ off = 0; | |
+ ljmpfe = off; | |
+ int i, j; | |
+ lcnt1 = 256; | |
+ cyc = 1; | |
+ | |
+ /* DMAMOV SAR, x->src_addr */ | |
+ off += _emit_MOV(dry_run, &buf[off], SAR, pxs->x->src_addr); | |
+ /* DMAMOV DAR, x->dst_addr */ | |
+ off += _emit_MOV(dry_run, &buf[off], DAR, pxs->x->dst_addr); | |
+ | |
+ off += _emit_LP(dry_run, &buf[off], 0, pxs->r->autoload); | |
+ ljmp0 = off; | |
+ | |
+ for (i = 0; i < *bursts/256; i++) { | |
+ off += _emit_LP(dry_run, &buf[off], 1, lcnt1); | |
+ ljmp1 = off; | |
+ | |
+ off += _bursts(dry_run, &buf[off], pxs, cyc); | |
+ | |
+ lpend.cond = ALWAYS; | |
+ lpend.forever = false; | |
+ lpend.loop = 1; | |
+ lpend.bjump = off - ljmp1; | |
+ off += _emit_LPEND(dry_run, &buf[off], &lpend); | |
+ } | |
+ off +=_emit_SEV(dry_run, &buf[off], ev); | |
+ | |
+ lpend.cond = ALWAYS; | |
+ lpend.forever = false; | |
+ lpend.loop = 0; | |
+ lpend.bjump = off - ljmp0; | |
+ off += _emit_LPEND(dry_run, &buf[off], &lpend); | |
+ | |
+ lpend.cond = ALWAYS; | |
+ lpend.forever = true; | |
+ lpend.loop = 1; | |
+ lpend.bjump = off - ljmpfe; | |
+ off += _emit_LPEND(dry_run, &buf[off], &lpend); | |
+ | |
+ return off; | |
+ } | |
+ | |
static inline int _setup_loops(unsigned dry_run, u8 buf[], | |
const struct _xfer_spec *pxs) | |
{ | |
*************** | |
*** 1151,1156 **** | |
--- 1202,1223 ---- | |
return off; | |
} | |
+ static inline int _setup_xfer_ring(unsigned dry_run, u8 buf[], | |
+ const struct _xfer_spec *pxs, int ev) | |
+ { | |
+ struct pl330_xfer *x = pxs->x; | |
+ u32 ccr = pxs->ccr; | |
+ unsigned long c, bursts = BYTE_TO_BURST(x->bytes, ccr); | |
+ int off = 0; | |
+ | |
+ /* Setup Loop(s) */ | |
+ c = bursts; | |
+ | |
+ off += _loop_ring(dry_run, &buf[off], &c, pxs, ev); | |
+ | |
+ return off; | |
+ } | |
+ | |
/* | |
* A req is a sequence of one or more xfer units. | |
* Returns the number of bytes taken to setup the MC for the req. | |
*************** | |
*** 1169,1174 **** | |
--- 1236,1243 ---- | |
off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr); | |
x = pxs->r->x; | |
+ | |
+ if(!pxs->r->autoload) { | |
do { | |
/* Error if xfer length is not aligned at burst size */ | |
if (x->bytes % (BRST_SIZE(pxs->ccr) * BRST_LEN(pxs->ccr))) | |
*************** | |
*** 1184,1190 **** | |
--- 1253,1267 ---- | |
off += _emit_SEV(dry_run, &buf[off], thrd->ev); | |
/* DMAEND */ | |
off += _emit_END(dry_run, &buf[off]); | |
+ } else { | |
+ | |
+ /* Error if xfer length is not aligned at burst size */ | |
+ if (x->bytes % (BRST_SIZE(pxs->ccr) * BRST_LEN(pxs->ccr))) | |
+ return -EINVAL; | |
+ pxs->x = x; | |
+ off += _setup_xfer_ring(dry_run, &buf[off], pxs, thrd->ev); | |
+ } | |
return off; | |
} | |
*************** | |
*** 1282,1298 **** | |
goto xfer_exit; | |
} | |
- /* Prefer Secure Channel */ | |
- if (!_manager_ns(thrd)) | |
- r->cfg->nonsecure = 0; | |
- else | |
- r->cfg->nonsecure = 1; | |
- | |
/* Use last settings, if not provided */ | |
! if (r->cfg) | |
ccr = _prepare_ccr(r->cfg); | |
! else | |
ccr = readl(regs + CC(thrd->id)); | |
/* If this req doesn't have valid xfer settings */ | |
if (!_is_valid(ccr)) { | |
--- 1359,1375 ---- | |
goto xfer_exit; | |
} | |
/* Use last settings, if not provided */ | |
! if (r->cfg) { | |
! /* Prefer Secure Channel */ | |
! if (!_manager_ns(thrd)) | |
! r->cfg->nonsecure = 0; | |
! else | |
! r->cfg->nonsecure = 1; | |
ccr = _prepare_ccr(r->cfg); | |
! } else { | |
ccr = readl(regs + CC(thrd->id)); | |
+ } | |
/* If this req doesn't have valid xfer settings */ | |
if (!_is_valid(ccr)) { | |
*************** | |
*** 1469,1478 **** | |
active -= 1; | |
rqdone = &thrd->req[active]; | |
- MARK_FREE(rqdone); | |
! /* Get going again ASAP */ | |
! _start(thrd); | |
/* For now, just make a list of callbacks to be done */ | |
list_add_tail(&rqdone->rqd, &pl330->req_done); | |
--- 1546,1558 ---- | |
active -= 1; | |
rqdone = &thrd->req[active]; | |
! if(!rqdone->r->autoload) { | |
! MARK_FREE(rqdone); | |
! | |
! /* Get going again ASAP */ | |
! _start(thrd); | |
! } | |
/* For now, just make a list of callbacks to be done */ | |
list_add_tail(&rqdone->rqd, &pl330->req_done); | |
diff -crB 2/arch/arm/common/vic.c 1/arch/arm/common/vic.c | |
*** 2/arch/arm/common/vic.c 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/common/vic.c 2011-05-18 12:34:10.000000000 +0530 | |
*************** | |
*** 91,98 **** | |
struct vic_device *vic = to_vic(dev); | |
void __iomem *base = vic->base; | |
- printk(KERN_DEBUG "%s: resuming vic at %p\n", __func__, base); | |
- | |
/* re-initialise static settings */ | |
vic_init2(base); | |
--- 91,96 ---- | |
*************** | |
*** 116,123 **** | |
struct vic_device *vic = to_vic(dev); | |
void __iomem *base = vic->base; | |
- printk(KERN_DEBUG "%s: suspending vic at %p\n", __func__, base); | |
- | |
vic->int_select = readl(base + VIC_INT_SELECT); | |
vic->int_enable = readl(base + VIC_INT_ENABLE); | |
vic->soft_int = readl(base + VIC_INT_SOFT); | |
--- 114,119 ---- | |
*************** | |
*** 227,232 **** | |
--- 223,259 ---- | |
writel(1 << irq, base + VIC_INT_ENABLE); | |
} | |
+ static int vic_retrigger_irq(unsigned int irq) | |
+ { | |
+ void __iomem *base = get_irq_chip_data(irq); | |
+ irq &= 31; | |
+ writel(1 << irq, base + VIC_INT_SOFT); | |
+ return 1; | |
+ } | |
+ | |
+ static DEFINE_SPINLOCK(vic_intselect_lock); | |
+ int vic_set_fiq(unsigned int irq, bool enable) | |
+ { | |
+ u32 int_select; | |
+ u32 mask; | |
+ unsigned long irq_flags; | |
+ void __iomem *base = get_irq_chip_data(irq); | |
+ irq &= 31; | |
+ mask = 1 << irq; | |
+ | |
+ spin_lock_irqsave(&vic_intselect_lock, irq_flags); | |
+ int_select = readl(base + VIC_INT_SELECT); | |
+ if (enable) | |
+ int_select |= mask; | |
+ else | |
+ int_select &= ~mask; | |
+ writel(int_select, base + VIC_INT_SELECT); | |
+ spin_unlock_irqrestore(&vic_intselect_lock, irq_flags); | |
+ | |
+ return 0; | |
+ } | |
+ EXPORT_SYMBOL(vic_set_fiq); | |
+ | |
#if defined(CONFIG_PM) | |
static struct vic_device *vic_from_irq(unsigned int irq) | |
{ | |
*************** | |
*** 270,275 **** | |
--- 297,303 ---- | |
.ack = vic_ack_irq, | |
.mask = vic_mask_irq, | |
.unmask = vic_unmask_irq, | |
+ .retrigger = vic_retrigger_irq, | |
.set_wake = vic_set_wake, | |
}; | |
Only in 1/arch/arm/configs: herring_defconfig | |
Only in 1/arch/arm/configs: p1_defconfig | |
diff -crB 2/arch/arm/include/asm/cacheflush.h 1/arch/arm/include/asm/cacheflush.h | |
*** 2/arch/arm/include/asm/cacheflush.h 2012-09-24 11:44:00.462843703 +0530 | |
--- 1/arch/arm/include/asm/cacheflush.h 2011-05-18 12:34:11.000000000 +0530 | |
*************** | |
*** 336,342 **** | |
* Harvard caches are synchronised for the user space address range. | |
* This is used for the ARM private sys_cacheflush system call. | |
*/ | |
! #define flush_cache_user_range(vma,start,end) \ | |
__cpuc_coherent_user_range((start) & PAGE_MASK, PAGE_ALIGN(end)) | |
/* | |
--- 336,342 ---- | |
* Harvard caches are synchronised for the user space address range. | |
* This is used for the ARM private sys_cacheflush system call. | |
*/ | |
! #define flush_cache_user_range(start,end) \ | |
__cpuc_coherent_user_range((start) & PAGE_MASK, PAGE_ALIGN(end)) | |
/* | |
Only in 1/arch/arm/include/asm: fiq_debugger.h | |
Only in 1/arch/arm/include/asm: fiq_glue.h | |
diff -crB 2/arch/arm/include/asm/hardware/pl330.h 1/arch/arm/include/asm/hardware/pl330.h | |
*** 2/arch/arm/include/asm/hardware/pl330.h 2012-09-24 11:44:00.462843703 +0530 | |
--- 1/arch/arm/include/asm/hardware/pl330.h 2011-05-18 12:34:11.000000000 +0530 | |
*************** | |
*** 1,4 **** | |
! /* linux/include/asm/hardware/pl330.h | |
* | |
* Copyright (C) 2010 Samsung Electronics Co. Ltd. | |
* Jaswinder Singh <jassi.brar@samsung.com> | |
--- 1,4 ---- | |
! /* linux/include/asm/hardware/pl330.h | |
* | |
* Copyright (C) 2010 Samsung Electronics Co. Ltd. | |
* Jaswinder Singh <jassi.brar@samsung.com> | |
*************** | |
*** 165,170 **** | |
--- 165,171 ---- | |
struct pl330_reqcfg *cfg; | |
/* Pointer to first xfer in the request. */ | |
struct pl330_xfer *x; | |
+ u32 autoload; | |
}; | |
/* | |
diff -crB 2/arch/arm/include/asm/hardware/vic.h 1/arch/arm/include/asm/hardware/vic.h | |
*** 2/arch/arm/include/asm/hardware/vic.h 2012-09-24 11:44:00.462843703 +0530 | |
--- 1/arch/arm/include/asm/hardware/vic.h 2011-05-18 12:34:11.000000000 +0530 | |
*************** | |
*** 42,47 **** | |
--- 42,48 ---- | |
#ifndef __ASSEMBLY__ | |
void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); | |
+ int vic_set_fiq(unsigned int irq, bool enable); | |
#endif | |
#endif | |
diff -crB 2/arch/arm/Kconfig 1/arch/arm/Kconfig | |
*** 2/arch/arm/Kconfig 2012-09-24 11:44:00.426844376 +0530 | |
--- 1/arch/arm/Kconfig 2011-05-18 12:34:10.000000000 +0530 | |
*************** | |
*** 1104,1109 **** | |
--- 1104,1122 ---- | |
endmenu | |
+ menu "Samsung Kernel Debug Features" | |
+ | |
+ choice | |
+ prompt "Enable Samsung Kernel Debug Features" | |
+ default KERNEL_DEBUG_SEC | |
+ | |
+ config KERNEL_DEBUG_SEC | |
+ bool "KERNEL_DEBUG_SEC" | |
+ | |
+ endchoice | |
+ | |
+ endmenu | |
+ | |
menu "Kernel Features" | |
source "kernel/time/Kconfig" | |
*************** | |
*** 1198,1203 **** | |
--- 1211,1217 ---- | |
config HZ | |
int | |
default 128 if ARCH_L7200 | |
+ default 256 if S5P_HIGH_RES_TIMERS | |
default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210 | |
default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER | |
default AT91_TIMER_HZ if ARCH_AT91 | |
diff -crB 2/arch/arm/kernel/debug.S 1/arch/arm/kernel/debug.S | |
*** 2/arch/arm/kernel/debug.S 2012-09-24 11:44:00.414844602 +0530 | |
--- 1/arch/arm/kernel/debug.S 2011-05-18 12:34:11.000000000 +0530 | |
*************** | |
*** 22,28 **** | |
#if defined(CONFIG_DEBUG_ICEDCC) | |
@@ debug using ARM EmbeddedICE DCC channel | |
! #if defined(CONFIG_CPU_V6) | |
.macro addruart, rx, tmp | |
.endm | |
--- 22,28 ---- | |
#if defined(CONFIG_DEBUG_ICEDCC) | |
@@ debug using ARM EmbeddedICE DCC channel | |
! #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V7) | |
.macro addruart, rx, tmp | |
.endm | |
diff -crB 2/arch/arm/kernel/entry-armv.S 1/arch/arm/kernel/entry-armv.S | |
*** 2/arch/arm/kernel/entry-armv.S 2012-09-24 11:44:00.414844602 +0530 | |
--- 1/arch/arm/kernel/entry-armv.S 2011-05-18 12:34:11.000000000 +0530 | |
*************** | |
*** 737,746 **** | |
#endif | |
#if defined(CONFIG_HAS_TLS_REG) | |
mcr p15, 0, r3, c13, c0, 3 @ set TLS register | |
! #elif !defined(CONFIG_TLS_REG_EMUL) | |
mov r4, #0xffff0fff | |
str r3, [r4, #-15] @ TLS val at 0xffff0ff0 | |
! #endif | |
#ifdef CONFIG_MMU | |
mcr p15, 0, r6, c3, c0, 0 @ Set domain register | |
#endif | |
--- 737,747 ---- | |
#endif | |
#if defined(CONFIG_HAS_TLS_REG) | |
mcr p15, 0, r3, c13, c0, 3 @ set TLS register | |
! //#elif !defined(CONFIG_TLS_REG_EMUL) | |
! #endif | |
mov r4, #0xffff0fff | |
str r3, [r4, #-15] @ TLS val at 0xffff0ff0 | |
! //#endif | |
#ifdef CONFIG_MMU | |
mcr p15, 0, r6, c3, c0, 0 @ Set domain register | |
#endif | |
Only in 2/arch/arm/kernel: .gitignore | |
diff -crB 2/arch/arm/kernel/process.c 1/arch/arm/kernel/process.c | |
*** 2/arch/arm/kernel/process.c 2012-09-24 11:44:00.414844602 +0530 | |
--- 1/arch/arm/kernel/process.c 2011-05-18 12:34:11.000000000 +0530 | |
*************** | |
*** 35,40 **** | |
--- 35,45 ---- | |
#include <asm/thread_notify.h> | |
#include <asm/stacktrace.h> | |
#include <asm/mach/time.h> | |
+ #include <mach/regs-clock.h> | |
+ | |
+ #ifdef CONFIG_KERNEL_DEBUG_SEC | |
+ #include <linux/kernel_sec_common.h> | |
+ #endif | |
static const char *processor_modes[] = { | |
"USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" , "UK4_26" , "UK5_26" , "UK6_26" , "UK7_26" , | |
*************** | |
*** 96,101 **** | |
--- 101,112 ---- | |
*/ | |
setup_mm_for_reboot(mode); | |
+ #ifdef CONFIG_KERNEL_DEBUG_SEC | |
+ kernel_sec_clear_upload_magic_number(); // Clear the magic number because it's normal reboot. | |
+ #endif | |
+ writel(0x12345678, S5P_INFORM5); //Reset | |
+ | |
+ | |
/* | |
* Now call the architecture specific reboot code. | |
*/ | |
*************** | |
*** 205,210 **** | |
--- 216,292 ---- | |
arm_pm_restart(reboot_mode, cmd); | |
} | |
+ /* | |
+ * dump a block of kernel memory from around the given address | |
+ */ | |
+ static void show_data(unsigned long addr, int nbytes, const char *name) | |
+ { | |
+ int i, j; | |
+ int nlines; | |
+ u32 *p; | |
+ | |
+ /* | |
+ * don't attempt to dump non-kernel addresses or | |
+ * values that are probably just small negative numbers | |
+ */ | |
+ if (addr < PAGE_OFFSET || addr > -256UL) | |
+ return; | |
+ | |
+ printk("\n%s: %#lx:\n", name, addr); | |
+ | |
+ /* | |
+ * round address down to a 32 bit boundary | |
+ * and always dump a multiple of 32 bytes | |
+ */ | |
+ p = (u32 *)(addr & ~(sizeof(u32) - 1)); | |
+ nbytes += (addr & (sizeof(u32) - 1)); | |
+ nlines = (nbytes + 31) / 32; | |
+ | |
+ | |
+ for (i = 0; i < nlines; i++) { | |
+ /* | |
+ * just display low 16 bits of address to keep | |
+ * each line of the dump < 80 characters | |
+ */ | |
+ printk("%04lx ", (unsigned long)p & 0xffff); | |
+ for (j = 0; j < 8; j++) { | |
+ u32 data; | |
+ if (probe_kernel_address(p, data)) { | |
+ printk(" ********"); | |
+ } else { | |
+ printk(" %08x", data); | |
+ } | |
+ ++p; | |
+ } | |
+ printk("\n"); | |
+ } | |
+ } | |
+ | |
+ static void show_extra_register_data(struct pt_regs *regs, int nbytes) | |
+ { | |
+ mm_segment_t fs; | |
+ | |
+ fs = get_fs(); | |
+ set_fs(KERNEL_DS); | |
+ show_data(regs->ARM_pc - nbytes, nbytes * 2, "PC"); | |
+ show_data(regs->ARM_lr - nbytes, nbytes * 2, "LR"); | |
+ show_data(regs->ARM_sp - nbytes, nbytes * 2, "SP"); | |
+ show_data(regs->ARM_ip - nbytes, nbytes * 2, "IP"); | |
+ show_data(regs->ARM_fp - nbytes, nbytes * 2, "FP"); | |
+ show_data(regs->ARM_r0 - nbytes, nbytes * 2, "R0"); | |
+ show_data(regs->ARM_r1 - nbytes, nbytes * 2, "R1"); | |
+ show_data(regs->ARM_r2 - nbytes, nbytes * 2, "R2"); | |
+ show_data(regs->ARM_r3 - nbytes, nbytes * 2, "R3"); | |
+ show_data(regs->ARM_r4 - nbytes, nbytes * 2, "R4"); | |
+ show_data(regs->ARM_r5 - nbytes, nbytes * 2, "R5"); | |
+ show_data(regs->ARM_r6 - nbytes, nbytes * 2, "R6"); | |
+ show_data(regs->ARM_r7 - nbytes, nbytes * 2, "R7"); | |
+ show_data(regs->ARM_r8 - nbytes, nbytes * 2, "R8"); | |
+ show_data(regs->ARM_r9 - nbytes, nbytes * 2, "R9"); | |
+ show_data(regs->ARM_r10 - nbytes, nbytes * 2, "R10"); | |
+ set_fs(fs); | |
+ } | |
+ | |
void __show_regs(struct pt_regs *regs) | |
{ | |
unsigned long flags; | |
*************** | |
*** 264,269 **** | |
--- 346,353 ---- | |
printk("Control: %08x%s\n", ctrl, buf); | |
} | |
#endif | |
+ | |
+ show_extra_register_data(regs, 128); | |
} | |
void show_regs(struct pt_regs * regs) | |
diff -crB 2/arch/arm/kernel/signal.c 1/arch/arm/kernel/signal.c | |
*** 2/arch/arm/kernel/signal.c 2012-09-24 11:44:00.414844602 +0530 | |
--- 1/arch/arm/kernel/signal.c 2011-05-18 12:34:11.000000000 +0530 | |
*************** | |
*** 602,607 **** | |
--- 602,615 ---- | |
static inline void setup_syscall_restart(struct pt_regs *regs) | |
{ | |
+ if (regs->ARM_ORIG_r0 == -ERESTARTNOHAND || | |
+ regs->ARM_ORIG_r0 == -ERESTARTSYS || | |
+ regs->ARM_ORIG_r0 == -ERESTARTNOINTR || | |
+ regs->ARM_ORIG_r0 == -ERESTART_RESTARTBLOCK) { | |
+ /* the syscall cannot be safely restarted, return -EINTR instead */ | |
+ regs->ARM_r0 = -EINTR; | |
+ return; | |
+ } | |
regs->ARM_r0 = regs->ARM_ORIG_r0; | |
regs->ARM_pc -= thumb_mode(regs) ? 2 : 4; | |
} | |
*************** | |
*** 734,739 **** | |
--- 742,748 ---- | |
*/ | |
if (syscall) { | |
if (regs->ARM_r0 == -ERESTART_RESTARTBLOCK) { | |
+ regs->ARM_r0 = -EAGAIN; /* prevent multiple restarts */ | |
if (thumb_mode(regs)) { | |
regs->ARM_r7 = __NR_restart_syscall - __NR_SYSCALL_BASE; | |
regs->ARM_pc -= 2; | |
diff -crB 2/arch/arm/kernel/traps.c 1/arch/arm/kernel/traps.c | |
*** 2/arch/arm/kernel/traps.c 2012-09-24 11:44:00.414844602 +0530 | |
--- 1/arch/arm/kernel/traps.c 2011-05-18 12:34:11.000000000 +0530 | |
*************** | |
*** 453,459 **** | |
if (end > vma->vm_end) | |
end = vma->vm_end; | |
! flush_cache_user_range(vma, start, end); | |
} | |
up_read(&mm->mmap_sem); | |
} | |
--- 453,461 ---- | |
if (end > vma->vm_end) | |
end = vma->vm_end; | |
! up_read(&mm->mmap_sem); | |
! flush_cache_user_range(start, end); | |
! return; | |
} | |
up_read(&mm->mmap_sem); | |
} | |
*************** | |
*** 520,526 **** | |
thread->tp_value = regs->ARM_r0; | |
#if defined(CONFIG_HAS_TLS_REG) | |
asm ("mcr p15, 0, %0, c13, c0, 3" : : "r" (regs->ARM_r0) ); | |
! #elif !defined(CONFIG_TLS_REG_EMUL) | |
/* | |
* User space must never try to access this directly. | |
* Expect your app to break eventually if you do so. | |
--- 522,529 ---- | |
thread->tp_value = regs->ARM_r0; | |
#if defined(CONFIG_HAS_TLS_REG) | |
asm ("mcr p15, 0, %0, c13, c0, 3" : : "r" (regs->ARM_r0) ); | |
! //#elif !defined(CONFIG_TLS_REG_EMUL) | |
! #endif | |
/* | |
* User space must never try to access this directly. | |
* Expect your app to break eventually if you do so. | |
*************** | |
*** 528,534 **** | |
* (see entry-armv.S for details) | |
*/ | |
*((unsigned int *)0xffff0ff0) = regs->ARM_r0; | |
! #endif | |
return 0; | |
#ifdef CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG | |
--- 531,537 ---- | |
* (see entry-armv.S for details) | |
*/ | |
*((unsigned int *)0xffff0ff0) = regs->ARM_r0; | |
! //#endif | |
return 0; | |
#ifdef CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG | |
Only in 1/arch/arm/mach-s5pv210: adc.c | |
diff -crB 2/arch/arm/mach-s5pv210/clock.c 1/arch/arm/mach-s5pv210/clock.c | |
*** 2/arch/arm/mach-s5pv210/clock.c 2012-09-24 11:44:00.374845348 +0530 | |
--- 1/arch/arm/mach-s5pv210/clock.c 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 19,24 **** | |
--- 19,26 ---- | |
#include <linux/clk.h> | |
#include <linux/sysdev.h> | |
#include <linux/io.h> | |
+ #include <linux/device.h> | |
+ #include <linux/platform_device.h> | |
#include <mach/map.h> | |
*************** | |
*** 30,35 **** | |
--- 32,41 ---- | |
#include <plat/s5p-clock.h> | |
#include <plat/clock-clksrc.h> | |
#include <plat/s5pv210.h> | |
+ #include <plat/devs.h> | |
+ #include <mach/regs-audss.h> | |
+ | |
+ static int s5pv210_usbosc_enable(struct clk *clk, int enable); | |
static struct clksrc_clk clk_mout_apll = { | |
.clk = { | |
*************** | |
*** 178,183 **** | |
--- 184,194 ---- | |
return s5p_gatectrl(S5P_CLKGATE_IP4, clk, enable); | |
} | |
+ static int s5pv210_clk_ip5_ctrl(struct clk *clk, int enable) | |
+ { | |
+ return s5p_gatectrl(S5P_CLKGATE_IP5, clk, enable); | |
+ } | |
+ | |
static int s5pv210_clk_mask0_ctrl(struct clk *clk, int enable) | |
{ | |
return s5p_gatectrl(S5P_CLK_SRC_MASK0, clk, enable); | |
*************** | |
*** 188,193 **** | |
--- 199,209 ---- | |
return s5p_gatectrl(S5P_CLK_SRC_MASK1, clk, enable); | |
} | |
+ static int s5pv210_clk_audss_ctrl(struct clk *clk, int enable) | |
+ { | |
+ return s5p_gatectrl(S5P_CLKGATE_AUDSS, clk, enable); | |
+ } | |
+ | |
static struct clk clk_sclk_hdmi27m = { | |
.name = "sclk_hdmi27m", | |
.id = -1, | |
*************** | |
*** 209,214 **** | |
--- 225,245 ---- | |
.id = -1, | |
}; | |
+ static struct clk clk_i2scdclk0 = { | |
+ .name = "i2scdclk", | |
+ .id = 0, | |
+ }; | |
+ | |
+ static struct clk clk_i2scdclk1 = { | |
+ .name = "i2scdclk", | |
+ .id = 1, | |
+ }; | |
+ | |
+ static struct clk clk_i2scdclk2 = { | |
+ .name = "i2scdclk", | |
+ .id = 2, | |
+ }; | |
+ | |
static struct clk clk_pcmcdclk0 = { | |
.name = "pcmcdclk", | |
.id = -1, | |
*************** | |
*** 293,304 **** | |
.enable = s5pv210_clk_ip1_ctrl, | |
.ctrlbit = (1<<17), | |
}, { | |
! .name = "lcd", | |
.id = -1, | |
.parent = &clk_hclk_dsys.clk, | |
.enable = s5pv210_clk_ip1_ctrl, | |
! .ctrlbit = (1<<0), | |
}, { | |
.name = "cfcon", | |
.id = 0, | |
.parent = &clk_hclk_psys.clk, | |
--- 324,384 ---- | |
.enable = s5pv210_clk_ip1_ctrl, | |
.ctrlbit = (1<<17), | |
}, { | |
! .name = "jpeg", | |
! .id = -1, | |
! .parent = &clk_hclk_dsys.clk, | |
! .enable = s5pv210_clk_ip5_ctrl, | |
! .ctrlbit = S5P_CLKGATE_IP5_JPEG, | |
! }, { | |
! .name = "mfc", | |
.id = -1, | |
+ .parent = &clk_hclk_msys.clk, | |
+ .enable = s5pv210_clk_ip0_ctrl, | |
+ .ctrlbit = (1<<16), | |
+ }, { | |
+ .name = "sclk_fimc_lclk", | |
+ .id = 0, | |
.parent = &clk_hclk_dsys.clk, | |
+ .enable = s5pv210_clk_ip0_ctrl, | |
+ .ctrlbit = (1<<24), | |
+ }, { | |
+ .name = "sclk_fimc_lclk", | |
+ .id = 1, | |
+ .parent = &clk_hclk_dsys.clk, | |
+ .enable = s5pv210_clk_ip0_ctrl, | |
+ .ctrlbit = (1<<25), | |
+ }, { | |
+ .name = "sclk_fimc_lclk", | |
+ .id = 2, | |
+ .parent = &clk_hclk_dsys.clk, | |
+ .enable = s5pv210_clk_ip0_ctrl, | |
+ .ctrlbit = (1<<26), | |
+ }, { | |
+ .name = "otg", | |
+ .id = -1, | |
+ .parent = &clk_hclk_psys.clk, | |
.enable = s5pv210_clk_ip1_ctrl, | |
! .ctrlbit = (1<<16), | |
! }, { | |
! .name = "usb-host", | |
! .id = -1, | |
! .parent = &clk_hclk_psys.clk, | |
! .enable = s5pv210_clk_ip1_ctrl, | |
! .ctrlbit = (1<<17), | |
}, { | |
+ .name = "dsim", | |
+ .id = -1, | |
+ .parent = &clk_hclk_dsys.clk, | |
+ .enable = s5pv210_clk_ip1_ctrl, | |
+ .ctrlbit = (1<<2), | |
+ },/* { | |
+ .name = "onenand", | |
+ .id = -1, | |
+ .parent = &clk_hclk_psys.clk, | |
+ .enable = s5pv210_clk_ip1_ctrl, | |
+ .ctrlbit = (1 << 24), | |
+ .dev = &s5pc110_device_onenand, | |
+ }, */{ | |
.name = "cfcon", | |
.id = 0, | |
.parent = &clk_hclk_psys.clk, | |
*************** | |
*** 335,346 **** | |
.enable = s5pv210_clk_ip3_ctrl, | |
.ctrlbit = (1<<16), | |
}, { | |
- .name = "watchdog", | |
- .id = -1, | |
- .parent = &clk_pclk_psys.clk, | |
- .enable = s5pv210_clk_ip3_ctrl, | |
- .ctrlbit = (1<<22), | |
- }, { | |
.name = "rtc", | |
.id = -1, | |
.parent = &clk_pclk_psys.clk, | |
--- 415,420 ---- | |
*************** | |
*** 355,363 **** | |
}, { | |
.name = "i2c", | |
.id = 1, | |
! .parent = &clk_pclk_psys.clk, | |
.enable = s5pv210_clk_ip3_ctrl, | |
! .ctrlbit = (1<<8), | |
}, { | |
.name = "i2c", | |
.id = 2, | |
--- 429,437 ---- | |
}, { | |
.name = "i2c", | |
.id = 1, | |
! .parent = &clk_pclk_dsys.clk, | |
.enable = s5pv210_clk_ip3_ctrl, | |
! .ctrlbit = (1<<10), | |
}, { | |
.name = "i2c", | |
.id = 2, | |
*************** | |
*** 418,428 **** | |
--- 492,618 ---- | |
.parent = &clk_p, | |
.enable = s5pv210_clk_ip3_ctrl, | |
.ctrlbit = (1 << 6), | |
+ }, { | |
+ .name = "pcm", | |
+ .id = 2, | |
+ .parent = &clk_pclk_psys.clk, | |
+ .enable = s5pv210_clk_ip3_ctrl, | |
+ .ctrlbit = S5P_CLKGATE_IP3_PCM2, | |
+ }, { | |
+ .name = "pcm", | |
+ .id = 1, | |
+ .parent = &clk_pclk_psys.clk, | |
+ .enable = s5pv210_clk_ip3_ctrl, | |
+ .ctrlbit = S5P_CLKGATE_IP3_PCM1 | S5P_CLKGATE_IP3_I2S1 , | |
+ }, { | |
+ .name = "pcm", | |
+ .id = 0, | |
+ .parent = &clk_pclk_psys.clk, | |
+ .enable = s5pv210_clk_ip3_ctrl, | |
+ .ctrlbit = S5P_CLKGATE_IP3_PCM0, | |
+ }, { | |
+ .name = "i2c-hdmiphy", | |
+ .id = -1, | |
+ .parent = &clk_pclk_dsys.clk, | |
+ .enable = s5pv210_clk_ip3_ctrl, | |
+ .ctrlbit = (1 << 11), | |
+ }, { | |
+ .name = "hdmi", | |
+ .id = -1, | |
+ .parent = &clk_hclk_dsys.clk, | |
+ .enable = s5pv210_clk_ip1_ctrl, | |
+ .ctrlbit = (1 << 11), | |
+ }, { | |
+ .name = "tvenc", | |
+ .id = -1, | |
+ .parent = &clk_hclk_dsys.clk, | |
+ .enable = s5pv210_clk_ip1_ctrl, | |
+ .ctrlbit = (1 << 10), | |
+ }, { | |
+ .name = "mixer", | |
+ .id = -1, | |
+ .parent = &clk_hclk_dsys.clk, | |
+ .enable = s5pv210_clk_ip1_ctrl, | |
+ .ctrlbit = (1 << 9), | |
+ }, { | |
+ .name = "vp", | |
+ .id = -1, | |
+ .parent = &clk_hclk_dsys.clk, | |
+ .enable = s5pv210_clk_ip1_ctrl, | |
+ .ctrlbit = (1 << 8), | |
+ }, { | |
+ .name = "rotator", | |
+ .id = -1, | |
+ .parent = &clk_hclk_dsys.clk, | |
+ .enable = s5pv210_clk_ip0_ctrl, | |
+ .ctrlbit = (1 << 29), | |
+ }, { | |
+ .name = "fimg2d", | |
+ .id = -1, | |
+ .parent = &clk_hclk_dsys.clk, | |
+ .enable = s5pv210_clk_ip0_ctrl, | |
+ .ctrlbit = (1 << 12), | |
+ }, { | |
+ .name = "usb_osc", | |
+ .id = -1, | |
+ .enable = s5pv210_usbosc_enable, | |
+ .ctrlbit = (1 << 1), | |
+ }, { | |
+ .name = "secss", | |
+ .id = -1, | |
+ .parent = &clk_hclk_psys.clk, | |
+ .enable = s5pv210_clk_ip2_ctrl, | |
+ .ctrlbit = (1 << 0), | |
+ }, { | |
+ .name = "seckey", | |
+ .id = -1, | |
+ .parent = &clk_pclk_psys.clk, | |
+ .enable = s5pv210_clk_ip4_ctrl, | |
+ .ctrlbit = (1 << 3), | |
+ }, | |
+ }; | |
+ | |
+ static struct clk init_dmaclocks[] = { | |
+ { | |
+ .name = "dma", | |
+ .id = 0, | |
+ .parent = &clk_hclk_dsys.clk, | |
+ .enable = s5pv210_clk_ip0_ctrl, | |
+ .ctrlbit = (1<<2), | |
+ .dev = &s5pv210_device_mdma.dev, | |
+ }, { | |
+ .name = "dma", | |
+ .id = 1, | |
+ .parent = &clk_hclk_psys.clk, | |
+ .enable = s5pv210_clk_ip0_ctrl, | |
+ .ctrlbit = (1<<3), | |
+ .dev = &s5pv210_device_pdma0.dev, | |
+ }, { | |
+ .name = "dma", | |
+ .id = 2, | |
+ .parent = &init_dmaclocks[1], | |
+ .enable = s5pv210_clk_ip0_ctrl, | |
+ .ctrlbit = (1<<4), | |
+ .dev = &s5pv210_device_pdma1.dev, | |
}, | |
}; | |
+ static int s5pc11x_clk_out_set_rate(struct clk *clk, unsigned long rate); | |
+ static int s5pc11x_clk_out_set_parent(struct clk *clk, struct clk *parent); | |
+ | |
+ static struct clk_ops s5pc11x_clkout_ops = { | |
+ .set_parent = s5pc11x_clk_out_set_parent, | |
+ .set_rate = s5pc11x_clk_out_set_rate, | |
+ }; | |
+ | |
static struct clk init_clocks[] = { | |
{ | |
+ .name = "watchdog", | |
+ .id = -1, | |
+ .parent = &clk_pclk_psys.clk, | |
+ .enable = s5pv210_clk_ip3_ctrl, | |
+ .ctrlbit = (1<<22), | |
+ }, { | |
.name = "hclk_imem", | |
.id = -1, | |
.parent = &clk_hclk_msys.clk, | |
*************** | |
*** 430,435 **** | |
--- 620,631 ---- | |
.enable = s5pv210_clk_ip0_ctrl, | |
.ops = &clk_hclk_imem_ops, | |
}, { | |
+ .name = "lcd", | |
+ .id = -1, | |
+ .parent = &clk_hclk_dsys.clk, | |
+ .enable = s5pv210_clk_ip1_ctrl, | |
+ .ctrlbit = (1<<0), | |
+ }, { | |
.name = "uart", | |
.id = 0, | |
.parent = &clk_pclk_psys.clk, | |
*************** | |
*** 453,458 **** | |
--- 649,664 ---- | |
.parent = &clk_pclk_psys.clk, | |
.enable = s5pv210_clk_ip3_ctrl, | |
.ctrlbit = (1 << 20), | |
+ }, { | |
+ .name = "i2s_v50", | |
+ .id = 0, | |
+ .parent = &clk_p, | |
+ .enable = s5pv210_clk_ip3_ctrl, | |
+ .ctrlbit = S5P_CLKGATE_IP3_I2S0 | S5P_CLKGATE_IP3_PCM0, | |
+ }, { | |
+ .name = "clk_out", | |
+ .id = -1, | |
+ .ops = &s5pc11x_clkout_ops, | |
}, | |
}; | |
*************** | |
*** 549,554 **** | |
--- 755,808 ---- | |
.nr_sources = ARRAY_SIZE(clkset_sclk_mixer_list), | |
}; | |
+ static int s5pc11x_clk_out_set_rate(struct clk *clk, unsigned long rate) | |
+ { | |
+ u32 val = 0, div = 0, rate_div = 1; | |
+ int err = -EINVAL; | |
+ | |
+ if (rate && clk->parent) { | |
+ if (clk->parent == &clk_fout_apll) | |
+ rate_div = 4; | |
+ if (clk->parent == &clk_fout_mpll) | |
+ rate_div = 2; | |
+ | |
+ div = clk_get_rate(clk->parent) / rate / rate_div; | |
+ val = __raw_readl(S5P_CLK_OUT); | |
+ val &= (~(0xF << 20)); | |
+ val |= (div - 1) << 20; | |
+ __raw_writel(val, S5P_CLK_OUT); | |
+ err = 0; | |
+ } | |
+ return err; | |
+ } | |
+ | |
+ static int s5pc11x_clk_out_set_parent(struct clk *clk, struct clk *parent) | |
+ { | |
+ u32 val = 0; | |
+ int err = 0; | |
+ clk->parent = parent; | |
+ val = __raw_readl(S5P_CLK_OUT); | |
+ | |
+ if (parent == &clk_fout_apll) { | |
+ val = val & (~(0x1F << 12)); | |
+ val |= (0x0 << 12); | |
+ } else if (parent == &clk_fout_mpll) { | |
+ val = val & (~(0x1F << 12)); | |
+ val |= (0x1 << 12); | |
+ } else if (parent == &clk_fout_epll) { | |
+ val = val & (~(0x1F << 12)); | |
+ val |= (0x2 << 12); | |
+ } else if (parent == &clk_sclk_vpll.clk) { | |
+ val = val & (~(0x1F << 12)); | |
+ val |= (0x3 << 12); | |
+ } else { | |
+ err = -EINVAL; | |
+ } | |
+ | |
+ __raw_writel(val, S5P_CLK_OUT); | |
+ return err; | |
+ } | |
+ | |
static struct clk *clkset_sclk_audio0_list[] = { | |
[0] = &clk_ext_xtal_mux, | |
[1] = &clk_pcmcdclk0, | |
*************** | |
*** 578,583 **** | |
--- 832,890 ---- | |
.reg_div = { .reg = S5P_CLK_DIV6, .shift = 0, .size = 4 }, | |
}; | |
+ static struct clk *clkset_mout_audss_list[] = { | |
+ &clk_ext_xtal_mux, | |
+ &clk_fout_epll, | |
+ }; | |
+ | |
+ static struct clksrc_sources clkset_mout_audss = { | |
+ .sources = clkset_mout_audss_list, | |
+ .nr_sources = ARRAY_SIZE(clkset_mout_audss_list), | |
+ }; | |
+ | |
+ static struct clksrc_clk clk_mout_audss = { | |
+ .clk = { | |
+ .name = "mout_audss", | |
+ .id = -1, | |
+ }, | |
+ .sources = &clkset_mout_audss, | |
+ .reg_src = { .reg = S5P_CLKSRC_AUDSS, .shift = 0, .size = 1 }, | |
+ }; | |
+ | |
+ static struct clk *clkset_mout_i2s_a_list[] = { | |
+ &clk_mout_audss.clk, | |
+ &clk_pcmcdclk0, | |
+ &clk_sclk_audio0.clk, | |
+ }; | |
+ | |
+ static struct clksrc_sources clkset_mout_i2s_a = { | |
+ .sources = clkset_mout_i2s_a_list, | |
+ .nr_sources = ARRAY_SIZE(clkset_mout_i2s_a_list), | |
+ }; | |
+ | |
+ static struct clksrc_clk clk_mout_i2s_a = { | |
+ .clk = { | |
+ .name = "audio-bus", | |
+ .id = 0, | |
+ .enable = s5pv210_clk_audss_ctrl, | |
+ .ctrlbit = (1 << 6), | |
+ }, | |
+ .sources = &clkset_mout_i2s_a, | |
+ .reg_src = { .reg = S5P_CLKSRC_AUDSS, .shift = 2, .size = 2 }, | |
+ .reg_div = { .reg = S5P_CLKDIV_AUDSS, .shift = 4, .size = 4 }, | |
+ }; | |
+ | |
+ static struct clksrc_clk clk_dout_audio_bus_clk_i2s = { | |
+ .clk = { | |
+ .name = "dout_audio_bus_clk_i2s", | |
+ .id = -1, | |
+ .parent = &clk_mout_audss.clk, | |
+ .enable = s5pv210_clk_audss_ctrl, | |
+ .ctrlbit = (1 << 5), | |
+ }, | |
+ .reg_div = { .reg = S5P_CLKDIV_AUDSS, .shift = 0, .size = 4 }, | |
+ }; | |
+ | |
static struct clk *clkset_sclk_audio1_list[] = { | |
[0] = &clk_ext_xtal_mux, | |
[1] = &clk_pcmcdclk1, | |
*************** | |
*** 683,722 **** | |
.reg_div = { .reg = S5P_CLK_DIV6, .shift = 12, .size = 3 }, | |
}, { | |
.clk = { | |
! .name = "uclk1", | |
.id = 0, | |
.enable = s5pv210_clk_mask0_ctrl, | |
.ctrlbit = (1 << 12), | |
}, | |
.sources = &clkset_uart, | |
.reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 }, | |
.reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 }, | |
}, { | |
.clk = { | |
! .name = "uclk1", | |
.id = 1, | |
.enable = s5pv210_clk_mask0_ctrl, | |
.ctrlbit = (1 << 13), | |
}, | |
.sources = &clkset_uart, | |
.reg_src = { .reg = S5P_CLK_SRC4, .shift = 20, .size = 4 }, | |
.reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 }, | |
}, { | |
.clk = { | |
! .name = "uclk1", | |
.id = 2, | |
.enable = s5pv210_clk_mask0_ctrl, | |
.ctrlbit = (1 << 14), | |
}, | |
.sources = &clkset_uart, | |
.reg_src = { .reg = S5P_CLK_SRC4, .shift = 24, .size = 4 }, | |
.reg_div = { .reg = S5P_CLK_DIV4, .shift = 24, .size = 4 }, | |
}, { | |
.clk = { | |
! .name = "uclk1", | |
.id = 3, | |
.enable = s5pv210_clk_mask0_ctrl, | |
.ctrlbit = (1 << 15), | |
}, | |
.sources = &clkset_uart, | |
.reg_src = { .reg = S5P_CLK_SRC4, .shift = 28, .size = 4 }, | |
--- 990,1033 ---- | |
.reg_div = { .reg = S5P_CLK_DIV6, .shift = 12, .size = 3 }, | |
}, { | |
.clk = { | |
! .name = "sclk", | |
.id = 0, | |
.enable = s5pv210_clk_mask0_ctrl, | |
.ctrlbit = (1 << 12), | |
+ .dev = &s3c24xx_uart_device0.dev, | |
}, | |
.sources = &clkset_uart, | |
.reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 }, | |
.reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 }, | |
}, { | |
.clk = { | |
! .name = "sclk", | |
.id = 1, | |
.enable = s5pv210_clk_mask0_ctrl, | |
.ctrlbit = (1 << 13), | |
+ .dev = &s3c24xx_uart_device1.dev, | |
}, | |
.sources = &clkset_uart, | |
.reg_src = { .reg = S5P_CLK_SRC4, .shift = 20, .size = 4 }, | |
.reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 }, | |
}, { | |
.clk = { | |
! .name = "sclk", | |
.id = 2, | |
.enable = s5pv210_clk_mask0_ctrl, | |
.ctrlbit = (1 << 14), | |
+ .dev = &s3c24xx_uart_device2.dev, | |
}, | |
.sources = &clkset_uart, | |
.reg_src = { .reg = S5P_CLK_SRC4, .shift = 24, .size = 4 }, | |
.reg_div = { .reg = S5P_CLK_DIV4, .shift = 24, .size = 4 }, | |
}, { | |
.clk = { | |
! .name = "sclk", | |
.id = 3, | |
.enable = s5pv210_clk_mask0_ctrl, | |
.ctrlbit = (1 << 15), | |
+ .dev = &s3c24xx_uart_device3.dev, | |
}, | |
.sources = &clkset_uart, | |
.reg_src = { .reg = S5P_CLK_SRC4, .shift = 28, .size = 4 }, | |
*************** | |
*** 793,800 **** | |
.clk = { | |
.name = "sclk_fimd", | |
.id = -1, | |
! .enable = s5pv210_clk_mask0_ctrl, | |
! .ctrlbit = (1 << 5), | |
}, | |
.sources = &clkset_group2, | |
.reg_src = { .reg = S5P_CLK_SRC1, .shift = 20, .size = 4 }, | |
--- 1104,1111 ---- | |
.clk = { | |
.name = "sclk_fimd", | |
.id = -1, | |
! .enable = s5pv210_clk_ip1_ctrl, | |
! .ctrlbit = (1 << 0), | |
}, | |
.sources = &clkset_group2, | |
.reg_src = { .reg = S5P_CLK_SRC1, .shift = 20, .size = 4 }, | |
*************** | |
*** 851,857 **** | |
.reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 }, | |
}, { | |
.clk = { | |
! .name = "sclk_g2d", | |
.id = -1, | |
.enable = s5pv210_clk_ip0_ctrl, | |
.ctrlbit = (1 << 12), | |
--- 1162,1168 ---- | |
.reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 }, | |
}, { | |
.clk = { | |
! .name = "sclk_fimg2d", | |
.id = -1, | |
.enable = s5pv210_clk_ip0_ctrl, | |
.ctrlbit = (1 << 12), | |
*************** | |
*** 861,870 **** | |
.reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 }, | |
}, { | |
.clk = { | |
! .name = "sclk_g3d", | |
.id = -1, | |
.enable = s5pv210_clk_ip0_ctrl, | |
.ctrlbit = (1 << 8), | |
}, | |
.sources = &clkset_group1, | |
.reg_src = { .reg = S5P_CLK_SRC2, .shift = 0, .size = 2 }, | |
--- 1172,1182 ---- | |
.reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 }, | |
}, { | |
.clk = { | |
! .name = "sclk", | |
.id = -1, | |
.enable = s5pv210_clk_ip0_ctrl, | |
.ctrlbit = (1 << 8), | |
+ .dev = &s3c_device_g3d.dev, | |
}, | |
.sources = &clkset_group1, | |
.reg_src = { .reg = S5P_CLK_SRC2, .shift = 0, .size = 2 }, | |
*************** | |
*** 919,927 **** | |
--- 1231,1273 ---- | |
.sources = &clkset_group2, | |
.reg_src = { .reg = S5P_CLK_SRC5, .shift = 12, .size = 4 }, | |
.reg_div = { .reg = S5P_CLK_DIV5, .shift = 12, .size = 4 }, | |
+ }, { | |
+ .clk = { | |
+ .name = "sclk_mdnie", | |
+ .id = -1, | |
+ .enable = s5pv210_clk_mask1_ctrl, | |
+ .ctrlbit = (1 << 0), | |
+ }, | |
+ .sources = &clkset_group2, | |
+ .reg_src = { .reg = S5P_CLK_SRC3, .shift = 0, | |
+ .size = 4 }, | |
+ .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 }, | |
+ }, { | |
+ .clk = { | |
+ .name = "sclk_mdnie_pwm", | |
+ .id = -1, | |
+ .enable = s5pv210_clk_mask1_ctrl, | |
+ .ctrlbit = (1 << 1), | |
+ }, | |
+ .sources = &clkset_group2, | |
+ .reg_src = { .reg = S5P_CLK_SRC3, .shift = 4, | |
+ .size = 4 }, | |
+ .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 }, | |
}, | |
}; | |
+ /* MOUT CSIS */ | |
+ static struct clksrc_clk clk_mout_csis = { | |
+ .clk = { | |
+ .name = "mout_csis", | |
+ .id = -1, | |
+ .enable = s5pv210_clk_mask0_ctrl, | |
+ .ctrlbit = (1 << 6), | |
+ }, | |
+ .sources = &clkset_group1, | |
+ .reg_src = { .reg = S5P_CLK_SRC1, .shift = 24, .size = 4 }, | |
+ }; | |
+ | |
/* Clock initialisation code */ | |
static struct clksrc_clk *sysclks[] = { | |
&clk_mout_apll, | |
*************** | |
*** 940,945 **** | |
--- 1286,1424 ---- | |
&clk_sclk_dac, | |
&clk_sclk_pixel, | |
&clk_sclk_hdmi, | |
+ &clk_mout_csis, | |
+ &clk_sclk_audio0, | |
+ &clk_sclk_audio1, | |
+ &clk_sclk_audio2, | |
+ &clk_mout_audss, | |
+ &clk_mout_i2s_a, | |
+ &clk_dout_audio_bus_clk_i2s, | |
+ }; | |
+ | |
+ static int s5pv210_usbosc_enable(struct clk *clk, int enable) | |
+ { | |
+ unsigned int ctrlbit = clk->ctrlbit; | |
+ unsigned int usbosc_con = __raw_readl(S5P_SLEEP_CFG) & ~ctrlbit; | |
+ | |
+ if (enable) | |
+ usbosc_con |= ctrlbit; | |
+ | |
+ writel(usbosc_con, S5P_SLEEP_CFG); | |
+ | |
+ return 0; | |
+ } | |
+ | |
+ static int s5pv210_epll_enable(struct clk *clk, int enable) | |
+ { | |
+ unsigned int ctrlbit = clk->ctrlbit; | |
+ unsigned int epll_con = __raw_readl(S5P_EPLL_CON) & ~ctrlbit; | |
+ | |
+ if (enable) | |
+ __raw_writel(epll_con | ctrlbit, S5P_EPLL_CON); | |
+ else | |
+ __raw_writel(epll_con, S5P_EPLL_CON); | |
+ | |
+ return 0; | |
+ } | |
+ | |
+ static unsigned long s5pv210_epll_get_rate(struct clk *clk) | |
+ { | |
+ return clk->rate; | |
+ } | |
+ | |
+ static u32 epll_div[][6] = { | |
+ { 48000000, 0, 48, 3, 3, 0 }, | |
+ { 96000000, 0, 48, 3, 2, 0 }, | |
+ { 144000000, 1, 72, 3, 2, 0 }, | |
+ { 192000000, 0, 48, 3, 1, 0 }, | |
+ { 288000000, 1, 72, 3, 1, 0 }, | |
+ { 32750000, 1, 65, 3, 4, 35127 }, | |
+ { 32768000, 1, 65, 3, 4, 35127 }, | |
+ { 45158400, 0, 45, 3, 3, 10355 }, | |
+ { 45000000, 0, 45, 3, 3, 10355 }, | |
+ { 45158000, 0, 45, 3, 3, 10355 }, | |
+ { 49125000, 0, 49, 3, 3, 9961 }, | |
+ { 49152000, 0, 49, 3, 3, 9961 }, | |
+ { 67737600, 1, 67, 3, 3, 48366 }, | |
+ { 67738000, 1, 67, 3, 3, 48366 }, | |
+ { 73800000, 1, 73, 3, 3, 47710 }, | |
+ { 73728000, 1, 73, 3, 3, 47710 }, | |
+ { 36000000, 1, 32, 3, 4, 0 }, | |
+ { 60000000, 1, 60, 3, 3, 0 }, | |
+ { 72000000, 1, 72, 3, 3, 0 }, | |
+ { 80000000, 1, 80, 3, 3, 0 }, | |
+ { 84000000, 0, 42, 3, 2, 0 }, | |
+ { 50000000, 0, 50, 3, 3, 0 }, | |
+ }; | |
+ | |
+ static int s5pv210_epll_set_rate(struct clk *clk, unsigned long rate) | |
+ { | |
+ unsigned int epll_con, epll_con_k; | |
+ unsigned int i; | |
+ #if 0 //epll clock getting changed durning suspend-resume without this function | |
+ /* Return if nothing changed */ | |
+ if (clk->rate == rate) | |
+ return 0; | |
+ #endif | |
+ epll_con = __raw_readl(S5P_EPLL_CON); | |
+ epll_con_k = __raw_readl(S5P_EPLL_CON_K); | |
+ | |
+ epll_con_k &= ~(PLL90XX_KDIV_MASK); | |
+ epll_con &= ~(PLL90XX_MDIV_MASK << PLL90XX_MDIV_SHIFT | \ | |
+ PLL90XX_PDIV_MASK << PLL90XX_PDIV_SHIFT | \ | |
+ PLL90XX_VDIV_MASK << PLL90XX_VDIV_SHIFT | \ | |
+ PLL90XX_SDIV_MASK << PLL90XX_SDIV_SHIFT); | |
+ | |
+ for (i = 0; i < ARRAY_SIZE(epll_div); i++) { | |
+ if (epll_div[i][0] == rate) { | |
+ epll_con_k |= epll_div[i][5] << 0; | |
+ epll_con |= epll_div[i][1] << 27; | |
+ epll_con |= epll_div[i][2] << 16; | |
+ epll_con |= epll_div[i][3] << 8; | |
+ epll_con |= epll_div[i][4] << 0; | |
+ break; | |
+ } | |
+ } | |
+ | |
+ if (i == ARRAY_SIZE(epll_div)) { | |
+ printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", | |
+ __func__); | |
+ return -EINVAL; | |
+ } | |
+ | |
+ __raw_writel(epll_con, S5P_EPLL_CON); | |
+ __raw_writel(epll_con_k, S5P_EPLL_CON_K); | |
+ | |
+ clk->rate = rate; | |
+ | |
+ return 0; | |
+ } | |
+ | |
+ static struct clk_ops s5pv210_epll_ops = { | |
+ .get_rate = s5pv210_epll_get_rate, | |
+ .set_rate = s5pv210_epll_set_rate, | |
+ }; | |
+ | |
+ static unsigned long s5pv210_apll_get_rate(struct clk *clk) | |
+ { | |
+ struct clk *xtal_clk; | |
+ unsigned long xtal; | |
+ | |
+ xtal_clk = clk_get(NULL, "xtal"); | |
+ BUG_ON(IS_ERR(xtal_clk)); | |
+ | |
+ xtal = clk_get_rate(xtal_clk); | |
+ clk_put(xtal_clk); | |
+ | |
+ if (clk->parent == &clk_fin_apll) | |
+ return xtal; | |
+ else | |
+ return s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), | |
+ pll_4508); | |
+ } | |
+ | |
+ static struct clk_ops s5pv210_apll_ops = { | |
+ .get_rate = s5pv210_apll_get_rate, | |
}; | |
void __init_or_cpufreq s5pv210_setup_clocks(void) | |
*************** | |
*** 960,965 **** | |
--- 1439,1448 ---- | |
unsigned long vpll; | |
unsigned int ptr; | |
u32 clkdiv0, clkdiv1; | |
+ struct clksrc_clk *pclkSrc; | |
+ | |
+ clk_fout_epll.enable = s5pv210_epll_enable; | |
+ clk_fout_epll.ops = &s5pv210_epll_ops; | |
printk(KERN_DEBUG "%s: registering clocks\n", __func__); | |
*************** | |
*** 983,989 **** | |
vpllsrc = clk_get_rate(&clk_vpllsrc.clk); | |
vpll = s5p_get_pll45xx(vpllsrc, __raw_readl(S5P_VPLL_CON), pll_4502); | |
! clk_fout_apll.rate = apll; | |
clk_fout_mpll.rate = mpll; | |
clk_fout_epll.rate = epll; | |
clk_fout_vpll.rate = vpll; | |
--- 1466,1472 ---- | |
vpllsrc = clk_get_rate(&clk_vpllsrc.clk); | |
vpll = s5p_get_pll45xx(vpllsrc, __raw_readl(S5P_VPLL_CON), pll_4502); | |
! clk_fout_apll.ops = &s5pv210_apll_ops; | |
clk_fout_mpll.rate = mpll; | |
clk_fout_epll.rate = epll; | |
clk_fout_vpll.rate = vpll; | |
*************** | |
*** 1008,1015 **** | |
clk_h.rate = hclk_psys; | |
clk_p.rate = pclk_psys; | |
! for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) | |
! s3c_set_clksrc(&clksrcs[ptr], true); | |
} | |
static struct clk *clks[] __initdata = { | |
--- 1491,1530 ---- | |
clk_h.rate = hclk_psys; | |
clk_p.rate = pclk_psys; | |
! /*Assign clock source and rates for IP's*/ | |
! for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) { | |
! pclkSrc = &clksrcs[ptr]; | |
! if (!strcmp(pclkSrc->clk.name, "sclk_mdnie")) { | |
! #if !defined(CONFIG_FB_S3C_LVDS) | |
! clk_set_parent(&pclkSrc->clk, &clk_mout_mpll.clk); | |
! clk_set_rate(&pclkSrc->clk, 167*MHZ); | |
! #endif | |
! } else if (!strcmp(pclkSrc->clk.name, "sclk_mmc")) { | |
! clk_set_parent(&pclkSrc->clk, &clk_mout_mpll.clk); | |
! | |
! if (pclkSrc->clk.id == 0) | |
! clk_set_rate(&pclkSrc->clk, 52*MHZ); | |
! else | |
! clk_set_rate(&pclkSrc->clk, 50*MHZ); | |
! } else if (!strcmp(pclkSrc->clk.name, "sclk_spi")) { | |
! clk_set_parent(&pclkSrc->clk, &clk_mout_epll.clk); | |
! } else if (!strcmp(pclkSrc->clk.name, "sclk_cam") && | |
! (pclkSrc->clk.id == 0)) { | |
! clk_set_parent(&pclkSrc->clk, &clk_xusbxti); | |
! } else if (!strcmp(pclkSrc->clk.name, "sclk_g2d")) { | |
! clk_set_parent(&pclkSrc->clk, &clk_mout_mpll.clk); | |
! clk_set_rate(&pclkSrc->clk, 250*MHZ); | |
! } else if (!strcmp(pclkSrc->clk.name, "sclk")) { | |
! clk_set_parent(&pclkSrc->clk, &clk_mout_mpll.clk); | |
! | |
! if (pclkSrc->clk.id == 0) | |
! clk_set_rate(&pclkSrc->clk, 133400000); | |
! else | |
! clk_set_rate(&pclkSrc->clk, 66700000); | |
! } | |
! /* Display the clock source */ | |
! s3c_set_clksrc(pclkSrc, true); | |
! } | |
} | |
static struct clk *clks[] __initdata = { | |
*************** | |
*** 1017,1022 **** | |
--- 1532,1540 ---- | |
&clk_sclk_hdmiphy, | |
&clk_sclk_usbphy0, | |
&clk_sclk_usbphy1, | |
+ &clk_i2scdclk0, | |
+ &clk_i2scdclk1, | |
+ &clk_i2scdclk2, | |
&clk_pcmcdclk0, | |
&clk_pcmcdclk1, | |
&clk_pcmcdclk2, | |
*************** | |
*** 1048,1052 **** | |
--- 1566,1573 ---- | |
(clkp->enable)(clkp, 0); | |
} | |
+ /* Register DMA Clock */ | |
+ s3c_register_clocks(init_dmaclocks, ARRAY_SIZE(init_dmaclocks)); | |
+ | |
s3c_pwmclk_init(); | |
} | |
diff -crB 2/arch/arm/mach-s5pv210/cpu.c 1/arch/arm/mach-s5pv210/cpu.c | |
*** 2/arch/arm/mach-s5pv210/cpu.c 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/mach-s5pv210/cpu.c 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 58,64 **** | |
.pfn = __phys_to_pfn(S5PV210_PA_SROMC), | |
.length = SZ_4K, | |
.type = MT_DEVICE, | |
! } | |
}; | |
static void s5pv210_idle(void) | |
--- 58,104 ---- | |
.pfn = __phys_to_pfn(S5PV210_PA_SROMC), | |
.length = SZ_4K, | |
.type = MT_DEVICE, | |
! }, { | |
! .virtual = (unsigned long)S3C_VA_WATCHDOG, | |
! .pfn = __phys_to_pfn(S5P_PA_WDT), | |
! .length = SZ_4K, | |
! .type = MT_DEVICE, | |
! }, { | |
! .virtual = (unsigned long)S3C_VA_OTG, | |
! .pfn = __phys_to_pfn(S5PV210_PA_OTG), | |
! .length = SZ_1M, | |
! .type = MT_DEVICE, | |
! }, { | |
! .virtual = (unsigned long)S3C_VA_OTGSFR, | |
! .pfn = __phys_to_pfn(S5PV210_PA_OTGSFR), | |
! .length = SZ_1M, | |
! .type = MT_DEVICE, | |
! }, | |
! #if defined(CONFIG_HRT_RTC) | |
! { | |
! .virtual = (unsigned long)S5P_VA_RTC, | |
! .pfn = __phys_to_pfn(S5PV210_PA_RTC), | |
! .length = SZ_4K, | |
! .type = MT_DEVICE, | |
! }, | |
! #endif | |
! { | |
! .virtual = (unsigned long)S5P_VA_DMC0, | |
! .pfn = __phys_to_pfn(S5P_PA_DMC0), | |
! .length = SZ_4K, | |
! .type = MT_DEVICE, | |
! }, { | |
! .virtual = (unsigned long)S5P_VA_DMC1, | |
! .pfn = __phys_to_pfn(S5P_PA_DMC1), | |
! .length = SZ_4K, | |
! .type = MT_DEVICE, | |
! }, { | |
! .virtual = (unsigned long)S5P_VA_AUDSS, | |
! .pfn = __phys_to_pfn(S5PV210_PA_AUDSS), | |
! .length = SZ_1M, | |
! .type = MT_DEVICE, | |
! }, | |
! | |
}; | |
static void s5pv210_idle(void) | |
Only in 1/arch/arm/mach-s5pv210: cpu-freq.c | |
Only in 1/arch/arm/mach-s5pv210: cpuidle.c | |
diff -crB 2/arch/arm/mach-s5pv210/dev-audio.c 1/arch/arm/mach-s5pv210/dev-audio.c | |
*** 2/arch/arm/mach-s5pv210/dev-audio.c 2012-09-24 11:44:00.374845348 +0530 | |
--- 1/arch/arm/mach-s5pv210/dev-audio.c 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 39,45 **** | |
s3c_gpio_cfgpin(S5PV210_GPC1(4), S3C_GPIO_SFN(4)); | |
break; | |
! case -1: | |
s3c_gpio_cfgpin(S5PV210_GPI(0), S3C_GPIO_SFN(2)); | |
s3c_gpio_cfgpin(S5PV210_GPI(1), S3C_GPIO_SFN(2)); | |
s3c_gpio_cfgpin(S5PV210_GPI(2), S3C_GPIO_SFN(2)); | |
--- 39,45 ---- | |
s3c_gpio_cfgpin(S5PV210_GPC1(4), S3C_GPIO_SFN(4)); | |
break; | |
! case 0: | |
s3c_gpio_cfgpin(S5PV210_GPI(0), S3C_GPIO_SFN(2)); | |
s3c_gpio_cfgpin(S5PV210_GPI(1), S3C_GPIO_SFN(2)); | |
s3c_gpio_cfgpin(S5PV210_GPI(2), S3C_GPIO_SFN(2)); | |
*************** | |
*** 80,87 **** | |
}; | |
struct platform_device s5pv210_device_iis0 = { | |
! .name = "s3c64xx-iis-v4", | |
! .id = -1, | |
.num_resources = ARRAY_SIZE(s5pv210_iis0_resource), | |
.resource = s5pv210_iis0_resource, | |
.dev = { | |
--- 80,87 ---- | |
}; | |
struct platform_device s5pv210_device_iis0 = { | |
! .name = "s5pc1xx-iis", | |
! .id = 0, | |
.num_resources = ARRAY_SIZE(s5pv210_iis0_resource), | |
.resource = s5pv210_iis0_resource, | |
.dev = { | |
*************** | |
*** 325,327 **** | |
--- 325,340 ---- | |
.coherent_dma_mask = DMA_BIT_MASK(32), | |
}, | |
}; | |
+ | |
+ #ifdef CONFIG_SND_S5P_RP | |
+ static struct resource s5p_rp_resource[] = { | |
+ }; | |
+ | |
+ struct platform_device s5p_device_rp = { | |
+ .name = "s5p-rp", | |
+ .id = -1, | |
+ .num_resources = ARRAY_SIZE(s5p_rp_resource), | |
+ .resource = s5p_rp_resource, | |
+ }; | |
+ EXPORT_SYMBOL(s5p_device_rp); | |
+ #endif | |
Only in 1/arch/arm/mach-s5pv210: dev-crespo-phone.c | |
Only in 1/arch/arm/mach-s5pv210: dev-fiqdbg.c | |
Only in 1/arch/arm/mach-s5pv210: dev-p1-phone.c | |
Only in 1/arch/arm/mach-s5pv210: didle.S | |
diff -crB 2/arch/arm/mach-s5pv210/dma.c 1/arch/arm/mach-s5pv210/dma.c | |
*** 2/arch/arm/mach-s5pv210/dma.c 2012-09-24 11:44:00.374845348 +0530 | |
--- 1/arch/arm/mach-s5pv210/dma.c 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 30,35 **** | |
--- 30,100 ---- | |
static u64 dma_dmamask = DMA_BIT_MASK(32); | |
+ static struct resource s5pv210_mdma_resource[] = { | |
+ [0] = { | |
+ .start = S5PV210_PA_MDMA, | |
+ .end = S5PV210_PA_MDMA + SZ_4K, | |
+ .flags = IORESOURCE_MEM, | |
+ }, | |
+ [1] = { | |
+ .start = IRQ_MDMA, | |
+ .end = IRQ_MDMA, | |
+ .flags = IORESOURCE_IRQ, | |
+ }, | |
+ }; | |
+ | |
+ static struct s3c_pl330_platdata s5pv210_mdma_pdata = { | |
+ .peri = { | |
+ /* The DMAC can have max 8 channel so there | |
+ * can be 8 M<->M requests served at any time. | |
+ */ | |
+ [0] = DMACH_MTOM_0, | |
+ [1] = DMACH_MTOM_1, | |
+ [2] = DMACH_MTOM_2, | |
+ [3] = DMACH_MTOM_3, | |
+ [4] = DMACH_MTOM_4, | |
+ [5] = DMACH_MTOM_5, | |
+ [6] = DMACH_MTOM_6, | |
+ [7] = DMACH_MTOM_7, | |
+ [8] = DMACH_MAX, | |
+ [9] = DMACH_MAX, | |
+ [10] = DMACH_MAX, | |
+ [11] = DMACH_MAX, | |
+ [12] = DMACH_MAX, | |
+ [13] = DMACH_MAX, | |
+ [14] = DMACH_MAX, | |
+ [15] = DMACH_MAX, | |
+ [16] = DMACH_MAX, | |
+ [17] = DMACH_MAX, | |
+ [18] = DMACH_MAX, | |
+ [19] = DMACH_MAX, | |
+ [20] = DMACH_MAX, | |
+ [21] = DMACH_MAX, | |
+ [22] = DMACH_MAX, | |
+ [23] = DMACH_MAX, | |
+ [24] = DMACH_MAX, | |
+ [25] = DMACH_MAX, | |
+ [26] = DMACH_MAX, | |
+ [27] = DMACH_MAX, | |
+ [28] = DMACH_MAX, | |
+ [29] = DMACH_MAX, | |
+ [30] = DMACH_MAX, | |
+ [31] = DMACH_MAX, | |
+ }, | |
+ }; | |
+ | |
+ struct platform_device s5pv210_device_mdma = { | |
+ .name = "s3c-pl330", | |
+ .id = 0, | |
+ .num_resources = ARRAY_SIZE(s5pv210_mdma_resource), | |
+ .resource = s5pv210_mdma_resource, | |
+ .dev = { | |
+ .dma_mask = &dma_dmamask, | |
+ .coherent_dma_mask = DMA_BIT_MASK(32), | |
+ .platform_data = &s5pv210_mdma_pdata, | |
+ }, | |
+ }; | |
+ | |
static struct resource s5pv210_pdma0_resource[] = { | |
[0] = { | |
.start = S5PV210_PA_PDMA0, | |
*************** | |
*** 80,86 **** | |
}, | |
}; | |
! static struct platform_device s5pv210_device_pdma0 = { | |
.name = "s3c-pl330", | |
.id = 1, | |
.num_resources = ARRAY_SIZE(s5pv210_pdma0_resource), | |
--- 145,151 ---- | |
}, | |
}; | |
! struct platform_device s5pv210_device_pdma0 = { | |
.name = "s3c-pl330", | |
.id = 1, | |
.num_resources = ARRAY_SIZE(s5pv210_pdma0_resource), | |
*************** | |
*** 142,148 **** | |
}, | |
}; | |
! static struct platform_device s5pv210_device_pdma1 = { | |
.name = "s3c-pl330", | |
.id = 2, | |
.num_resources = ARRAY_SIZE(s5pv210_pdma1_resource), | |
--- 207,213 ---- | |
}, | |
}; | |
! struct platform_device s5pv210_device_pdma1 = { | |
.name = "s3c-pl330", | |
.id = 2, | |
.num_resources = ARRAY_SIZE(s5pv210_pdma1_resource), | |
*************** | |
*** 155,160 **** | |
--- 220,226 ---- | |
}; | |
static struct platform_device *s5pv210_dmacs[] __initdata = { | |
+ &s5pv210_device_mdma, | |
&s5pv210_device_pdma0, | |
&s5pv210_device_pdma1, | |
}; | |
diff -crB 2/arch/arm/mach-s5pv210/gpiolib.c 1/arch/arm/mach-s5pv210/gpiolib.c | |
*** 2/arch/arm/mach-s5pv210/gpiolib.c 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/mach-s5pv210/gpiolib.c 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 14,23 **** | |
--- 14,25 ---- | |
#include <linux/irq.h> | |
#include <linux/io.h> | |
#include <linux/gpio.h> | |
+ #include <linux/module.h> | |
#include <plat/gpio-core.h> | |
#include <plat/gpio-cfg.h> | |
#include <plat/gpio-cfg-helpers.h> | |
#include <mach/map.h> | |
+ #include <mach/regs-gpio.h> | |
static struct s3c_gpio_cfg gpio_cfg = { | |
.set_config = s3c_gpio_setcfg_s3c64xx_4bit, | |
*************** | |
*** 31,36 **** | |
--- 33,51 ---- | |
.get_pull = s3c_gpio_getpull_updown, | |
}; | |
+ static int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset) | |
+ { | |
+ struct s3c_gpio_chip *s3c_chip = to_s3c_gpio(chip); | |
+ | |
+ return s3c_chip->eint_offset + offset; | |
+ } | |
+ | |
+ /* be called from gpio_to_irq() for gpio interrupts */ | |
+ static int s5p_gpiolib_gpioint_to_irq(struct gpio_chip *chip, unsigned int offset) | |
+ { | |
+ return S5P_IRQ_GPIOINT(chip->base + offset); | |
+ } | |
+ | |
/* GPIO bank's base address given the index of the bank in the | |
* list of all gpio banks. | |
*/ | |
*************** | |
*** 52,155 **** | |
--- 67,188 ---- | |
.base = S5PV210_GPA0(0), | |
.ngpio = S5PV210_GPIO_A0_NR, | |
.label = "GPA0", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPA1(0), | |
.ngpio = S5PV210_GPIO_A1_NR, | |
.label = "GPA1", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPB(0), | |
.ngpio = S5PV210_GPIO_B_NR, | |
.label = "GPB", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPC0(0), | |
.ngpio = S5PV210_GPIO_C0_NR, | |
.label = "GPC0", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPC1(0), | |
.ngpio = S5PV210_GPIO_C1_NR, | |
.label = "GPC1", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPD0(0), | |
.ngpio = S5PV210_GPIO_D0_NR, | |
.label = "GPD0", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPD1(0), | |
.ngpio = S5PV210_GPIO_D1_NR, | |
.label = "GPD1", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPE0(0), | |
.ngpio = S5PV210_GPIO_E0_NR, | |
.label = "GPE0", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPE1(0), | |
.ngpio = S5PV210_GPIO_E1_NR, | |
.label = "GPE1", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPF0(0), | |
.ngpio = S5PV210_GPIO_F0_NR, | |
.label = "GPF0", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPF1(0), | |
.ngpio = S5PV210_GPIO_F1_NR, | |
.label = "GPF1", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPF2(0), | |
.ngpio = S5PV210_GPIO_F2_NR, | |
.label = "GPF2", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPF3(0), | |
.ngpio = S5PV210_GPIO_F3_NR, | |
.label = "GPF3", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPG0(0), | |
.ngpio = S5PV210_GPIO_G0_NR, | |
.label = "GPG0", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPG1(0), | |
.ngpio = S5PV210_GPIO_G1_NR, | |
.label = "GPG1", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPG2(0), | |
.ngpio = S5PV210_GPIO_G2_NR, | |
.label = "GPG2", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPG3(0), | |
.ngpio = S5PV210_GPIO_G3_NR, | |
.label = "GPG3", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
+ .config = &gpio_cfg_noint, | |
.chip = { | |
.base = S5PV210_GPI(0), | |
.ngpio = S5PV210_GPIO_I_NR, | |
*************** | |
*** 160,189 **** | |
--- 193,227 ---- | |
.base = S5PV210_GPJ0(0), | |
.ngpio = S5PV210_GPIO_J0_NR, | |
.label = "GPJ0", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPJ1(0), | |
.ngpio = S5PV210_GPIO_J1_NR, | |
.label = "GPJ1", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPJ2(0), | |
.ngpio = S5PV210_GPIO_J2_NR, | |
.label = "GPJ2", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPJ3(0), | |
.ngpio = S5PV210_GPIO_J3_NR, | |
.label = "GPJ3", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.chip = { | |
.base = S5PV210_GPJ4(0), | |
.ngpio = S5PV210_GPIO_J4_NR, | |
.label = "GPJ4", | |
+ .to_irq = s5p_gpiolib_gpioint_to_irq, | |
}, | |
}, { | |
.config = &gpio_cfg_noint, | |
*************** | |
*** 207,247 **** | |
.label = "MP03", | |
}, | |
}, { | |
.base = (S5P_VA_GPIO + 0xC00), | |
.config = &gpio_cfg_noint, | |
.chip = { | |
.base = S5PV210_GPH0(0), | |
.ngpio = S5PV210_GPIO_H0_NR, | |
.label = "GPH0", | |
}, | |
}, { | |
.base = (S5P_VA_GPIO + 0xC20), | |
.config = &gpio_cfg_noint, | |
.chip = { | |
.base = S5PV210_GPH1(0), | |
.ngpio = S5PV210_GPIO_H1_NR, | |
.label = "GPH1", | |
}, | |
}, { | |
.base = (S5P_VA_GPIO + 0xC40), | |
.config = &gpio_cfg_noint, | |
.chip = { | |
.base = S5PV210_GPH2(0), | |
.ngpio = S5PV210_GPIO_H2_NR, | |
.label = "GPH2", | |
}, | |
}, { | |
.base = (S5P_VA_GPIO + 0xC60), | |
.config = &gpio_cfg_noint, | |
.chip = { | |
.base = S5PV210_GPH3(0), | |
.ngpio = S5PV210_GPIO_H3_NR, | |
.label = "GPH3", | |
}, | |
}, | |
}; | |
! static __init int s5pv210_gpiolib_init(void) | |
{ | |
struct s3c_gpio_chip *chip = s5pv210_gpio_4bit; | |
int nr_chips = ARRAY_SIZE(s5pv210_gpio_4bit); | |
--- 245,648 ---- | |
.label = "MP03", | |
}, | |
}, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP04(0), | |
+ .ngpio = S5PV210_GPIO_MP04_NR, | |
+ .label = "MP04", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP05(0), | |
+ .ngpio = S5PV210_GPIO_MP05_NR, | |
+ .label = "MP05", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP06(0), | |
+ .ngpio = S5PV210_GPIO_MP06_NR, | |
+ .label = "MP06", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP07(0), | |
+ .ngpio = S5PV210_GPIO_MP07_NR, | |
+ .label = "MP07", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP10(0), | |
+ .ngpio = S5PV210_GPIO_MP10_NR, | |
+ .label = "MP10", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP11(0), | |
+ .ngpio = S5PV210_GPIO_MP11_NR, | |
+ .label = "MP11", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP12(0), | |
+ .ngpio = S5PV210_GPIO_MP12_NR, | |
+ .label = "MP12", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP13(0), | |
+ .ngpio = S5PV210_GPIO_MP13_NR, | |
+ .label = "MP13", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP14(0), | |
+ .ngpio = S5PV210_GPIO_MP14_NR, | |
+ .label = "MP14", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP15(0), | |
+ .ngpio = S5PV210_GPIO_MP15_NR, | |
+ .label = "MP15", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP16(0), | |
+ .ngpio = S5PV210_GPIO_MP16_NR, | |
+ .label = "MP16", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP17(0), | |
+ .ngpio = S5PV210_GPIO_MP17_NR, | |
+ .label = "MP17", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP18(0), | |
+ .ngpio = S5PV210_GPIO_MP18_NR, | |
+ .label = "MP18", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP20(0), | |
+ .ngpio = S5PV210_GPIO_MP20_NR, | |
+ .label = "MP20", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP21(0), | |
+ .ngpio = S5PV210_GPIO_MP21_NR, | |
+ .label = "MP21", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP22(0), | |
+ .ngpio = S5PV210_GPIO_MP22_NR, | |
+ .label = "MP22", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP23(0), | |
+ .ngpio = S5PV210_GPIO_MP23_NR, | |
+ .label = "MP23", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP24(0), | |
+ .ngpio = S5PV210_GPIO_MP24_NR, | |
+ .label = "MP24", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP25(0), | |
+ .ngpio = S5PV210_GPIO_MP25_NR, | |
+ .label = "MP25", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP26(0), | |
+ .ngpio = S5PV210_GPIO_MP26_NR, | |
+ .label = "MP26", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP27(0), | |
+ .ngpio = S5PV210_GPIO_MP27_NR, | |
+ .label = "MP27", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_MP28(0), | |
+ .ngpio = S5PV210_GPIO_MP28_NR, | |
+ .label = "MP28", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_ETC0(0), | |
+ .ngpio = S5PV210_GPIO_ETC0_NR, | |
+ .label = "ETC0", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_ETC1(0), | |
+ .ngpio = S5PV210_GPIO_ETC1_NR, | |
+ .label = "ETC1", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_ETC2(0), | |
+ .ngpio = S5PV210_GPIO_ETC2_NR, | |
+ .label = "ETC2", | |
+ }, | |
+ }, { | |
+ .config = &gpio_cfg_noint, | |
+ .chip = { | |
+ .base = S5PV210_ETC4(0), | |
+ .ngpio = S5PV210_GPIO_ETC4_NR, | |
+ .label = "ETC4", | |
+ }, | |
+ }, { | |
.base = (S5P_VA_GPIO + 0xC00), | |
.config = &gpio_cfg_noint, | |
+ .eint_offset = IRQ_EINT(0), | |
.chip = { | |
.base = S5PV210_GPH0(0), | |
.ngpio = S5PV210_GPIO_H0_NR, | |
.label = "GPH0", | |
+ .to_irq = s5p_gpiolib_eint_to_irq, | |
}, | |
}, { | |
.base = (S5P_VA_GPIO + 0xC20), | |
.config = &gpio_cfg_noint, | |
+ .eint_offset = IRQ_EINT(8), | |
.chip = { | |
.base = S5PV210_GPH1(0), | |
.ngpio = S5PV210_GPIO_H1_NR, | |
.label = "GPH1", | |
+ .to_irq = s5p_gpiolib_eint_to_irq, | |
}, | |
}, { | |
.base = (S5P_VA_GPIO + 0xC40), | |
.config = &gpio_cfg_noint, | |
+ .eint_offset = IRQ_EINT(16), | |
.chip = { | |
.base = S5PV210_GPH2(0), | |
.ngpio = S5PV210_GPIO_H2_NR, | |
.label = "GPH2", | |
+ .to_irq = s5p_gpiolib_eint_to_irq, | |
}, | |
}, { | |
.base = (S5P_VA_GPIO + 0xC60), | |
.config = &gpio_cfg_noint, | |
+ .eint_offset = IRQ_EINT(24), | |
.chip = { | |
.base = S5PV210_GPH3(0), | |
.ngpio = S5PV210_GPIO_H3_NR, | |
.label = "GPH3", | |
+ .to_irq = s5p_gpiolib_eint_to_irq, | |
}, | |
}, | |
}; | |
! /* S5PV210 machine dependent GPIO help function */ | |
! int s3c_gpio_slp_cfgpin(unsigned int pin, unsigned int config) | |
! { | |
! struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | |
! void __iomem *reg; | |
! unsigned long flags; | |
! int offset; | |
! u32 con; | |
! int shift; | |
! | |
! if (!chip) | |
! return -EINVAL; | |
! | |
! if ((pin <= S5PV210_GPH3(7)) && (pin >= S5PV210_GPH0(0))) | |
! return -EINVAL; | |
! | |
! if (config > S3C_GPIO_SLP_PREV) | |
! return -EINVAL; | |
! | |
! reg = chip->base + 0x10; | |
! | |
! offset = pin - chip->chip.base; | |
! shift = offset * 2; | |
! | |
! local_irq_save(flags); | |
! | |
! con = __raw_readl(reg); | |
! con &= ~(3 << shift); | |
! con |= config << shift; | |
! __raw_writel(con, reg); | |
! | |
! local_irq_restore(flags); | |
! return 0; | |
! } | |
! | |
! s3c_gpio_pull_t s3c_gpio_get_slp_cfgpin(unsigned int pin) | |
! { | |
! struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | |
! void __iomem *reg; | |
! unsigned long flags; | |
! int offset; | |
! u32 con; | |
! int shift; | |
! | |
! if (!chip) | |
! return -EINVAL; | |
! | |
! if ((pin <= S5PV210_GPH3(7)) && (pin >= S5PV210_GPH0(0))) | |
! return -EINVAL; | |
! | |
! reg = chip->base + 0x10; | |
! | |
! offset = pin - chip->chip.base; | |
! shift = offset * 2; | |
! | |
! local_irq_save(flags); | |
! | |
! con = __raw_readl(reg); | |
! con >>= shift; | |
! con &= 0x3; | |
! | |
! local_irq_restore(flags); | |
! | |
! return (__force s3c_gpio_pull_t)con; | |
! } | |
! | |
! int s3c_gpio_slp_setpull_updown(unsigned int pin, unsigned int config) | |
! { | |
! struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | |
! void __iomem *reg; | |
! unsigned long flags; | |
! int offset; | |
! u32 con; | |
! int shift; | |
! | |
! if (!chip) | |
! return -EINVAL; | |
! | |
! if ((pin <= S5PV210_GPH3(7)) && (pin >= S5PV210_GPH0(0))) | |
! return -EINVAL; | |
! | |
! if (config > S3C_GPIO_PULL_UP) | |
! return -EINVAL; | |
! reg = chip->base + 0x14; | |
! | |
! offset = pin - chip->chip.base; | |
! shift = offset * 2; | |
! | |
! local_irq_save(flags); | |
! | |
! con = __raw_readl(reg); | |
! con &= ~(3 << shift); | |
! con |= config << shift; | |
! __raw_writel(con, reg); | |
! | |
! local_irq_restore(flags); | |
! | |
! return 0; | |
! } | |
! EXPORT_SYMBOL(s3c_gpio_slp_setpull_updown); | |
! | |
! int s3c_gpio_set_drvstrength(unsigned int pin, unsigned int config) | |
! { | |
! struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | |
! void __iomem *reg; | |
! unsigned long flags; | |
! int offset; | |
! u32 con; | |
! int shift; | |
! | |
! if (!chip) | |
! return -EINVAL; | |
! | |
! if (config > S3C_GPIO_DRVSTR_4X) | |
! return -EINVAL; | |
! | |
! reg = chip->base + 0x0c; | |
! | |
! offset = pin - chip->chip.base; | |
! shift = offset * 2; | |
! | |
! local_irq_save(flags); | |
! | |
! con = __raw_readl(reg); | |
! con &= ~(3 << shift); | |
! con |= config << shift; | |
! | |
! __raw_writel(con, reg); | |
! #ifdef S5PC11X_ALIVEGPIO_STORE | |
! con = __raw_readl(reg); | |
! #endif | |
! | |
! local_irq_restore(flags); | |
! | |
! return 0; | |
! } | |
! | |
! int s3c_gpio_set_slewrate(unsigned int pin, unsigned int config) | |
! { | |
! struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | |
! void __iomem *reg; | |
! unsigned long flags; | |
! int offset; | |
! u32 con; | |
! int shift; | |
! | |
! if (!chip) | |
! return -EINVAL; | |
! | |
! if (config > S3C_GPIO_SLEWRATE_SLOW) | |
! return -EINVAL; | |
! | |
! reg = chip->base + 0x0c; | |
! | |
! offset = pin - chip->chip.base; | |
! shift = offset; | |
! | |
! local_irq_save(flags); | |
! | |
! con = __raw_readl(reg); | |
! con &= ~(1 << shift); | |
! con |= config << shift; | |
! | |
! __raw_writel(con, reg); | |
! #ifdef S5PC11X_ALIVEGPIO_STORE | |
! con = __raw_readl(reg); | |
! #endif | |
! | |
! local_irq_restore(flags); | |
! | |
! return 0; | |
! } | |
! | |
! __init int s5pv210_gpiolib_init(void) | |
{ | |
struct s3c_gpio_chip *chip = s5pv210_gpio_4bit; | |
int nr_chips = ARRAY_SIZE(s5pv210_gpio_4bit); | |
*************** | |
*** 258,261 **** | |
return 0; | |
} | |
- core_initcall(s5pv210_gpiolib_init); | |
--- 659,661 ---- | |
Only in 1/arch/arm/mach-s5pv210: herring-btlpm.c | |
Only in 1/arch/arm/mach-s5pv210: herring.h | |
Only in 1/arch/arm/mach-s5pv210: herring-panel.c | |
Only in 1/arch/arm/mach-s5pv210: herring-vibrator.c | |
Only in 1/arch/arm/mach-s5pv210: herring-watchdog.c | |
Only in 1/arch/arm/mach-s5pv210/include/mach: adc.h | |
Only in 1/arch/arm/mach-s5pv210/include/mach: battery.h | |
Only in 1/arch/arm/mach-s5pv210/include/mach: cpu-freq-v210.h | |
Only in 1/arch/arm/mach-s5pv210/include/mach: cpuidle.h | |
Only in 1/arch/arm/mach-s5pv210/include/mach: gpio-crespo.h | |
diff -crB 2/arch/arm/mach-s5pv210/include/mach/gpio.h 1/arch/arm/mach-s5pv210/include/mach/gpio.h | |
*** 2/arch/arm/mach-s5pv210/include/mach/gpio.h 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/mach-s5pv210/include/mach/gpio.h 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 52,57 **** | |
--- 52,87 ---- | |
#define S5PV210_GPIO_MP01_NR (8) | |
#define S5PV210_GPIO_MP02_NR (4) | |
#define S5PV210_GPIO_MP03_NR (8) | |
+ #define S5PV210_GPIO_MP04_NR (8) | |
+ #define S5PV210_GPIO_MP05_NR (8) | |
+ #define S5PV210_GPIO_MP06_NR (8) | |
+ #define S5PV210_GPIO_MP07_NR (8) | |
+ | |
+ #define S5PV210_GPIO_MP10_NR (8) | |
+ #define S5PV210_GPIO_MP11_NR (8) | |
+ #define S5PV210_GPIO_MP12_NR (8) | |
+ #define S5PV210_GPIO_MP13_NR (8) | |
+ #define S5PV210_GPIO_MP14_NR (8) | |
+ #define S5PV210_GPIO_MP15_NR (8) | |
+ #define S5PV210_GPIO_MP16_NR (8) | |
+ #define S5PV210_GPIO_MP17_NR (8) | |
+ #define S5PV210_GPIO_MP18_NR (7) | |
+ | |
+ #define S5PV210_GPIO_MP20_NR (8) | |
+ #define S5PV210_GPIO_MP21_NR (8) | |
+ #define S5PV210_GPIO_MP22_NR (8) | |
+ #define S5PV210_GPIO_MP23_NR (8) | |
+ #define S5PV210_GPIO_MP24_NR (8) | |
+ #define S5PV210_GPIO_MP25_NR (8) | |
+ #define S5PV210_GPIO_MP26_NR (8) | |
+ #define S5PV210_GPIO_MP27_NR (8) | |
+ #define S5PV210_GPIO_MP28_NR (7) | |
+ | |
+ #define S5PV210_GPIO_ETC0_NR (6) | |
+ #define S5PV210_GPIO_ETC1_NR (8) | |
+ #define S5PV210_GPIO_ETC2_NR (8) | |
+ #define S5PV210_GPIO_ETC4_NR (6) | |
+ | |
/* GPIO bank numbers */ | |
*************** | |
*** 94,99 **** | |
--- 124,155 ---- | |
S5PV210_GPIO_MP01_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J4), | |
S5PV210_GPIO_MP02_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP01), | |
S5PV210_GPIO_MP03_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP02), | |
+ S5PV210_GPIO_MP04_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP03), | |
+ S5PV210_GPIO_MP05_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP04), | |
+ S5PV210_GPIO_MP06_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP05), | |
+ S5PV210_GPIO_MP07_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP06), | |
+ S5PV210_GPIO_MP10_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP07), | |
+ S5PV210_GPIO_MP11_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP10), | |
+ S5PV210_GPIO_MP12_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP11), | |
+ S5PV210_GPIO_MP13_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP12), | |
+ S5PV210_GPIO_MP14_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP13), | |
+ S5PV210_GPIO_MP15_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP14), | |
+ S5PV210_GPIO_MP16_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP15), | |
+ S5PV210_GPIO_MP17_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP16), | |
+ S5PV210_GPIO_MP18_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP17), | |
+ S5PV210_GPIO_MP20_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP18), | |
+ S5PV210_GPIO_MP21_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP20), | |
+ S5PV210_GPIO_MP22_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP21), | |
+ S5PV210_GPIO_MP23_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP22), | |
+ S5PV210_GPIO_MP24_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP23), | |
+ S5PV210_GPIO_MP25_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP24), | |
+ S5PV210_GPIO_MP26_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP25), | |
+ S5PV210_GPIO_MP27_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP26), | |
+ S5PV210_GPIO_MP28_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP27), | |
+ S5PV210_GPIO_ETC0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP28), | |
+ S5PV210_GPIO_ETC1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_ETC0), | |
+ S5PV210_GPIO_ETC2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_ETC1), | |
+ S5PV210_GPIO_ETC4_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_ETC2), | |
}; | |
/* S5PV210 GPIO number definitions */ | |
*************** | |
*** 127,141 **** | |
#define S5PV210_MP01(_nr) (S5PV210_GPIO_MP01_START + (_nr)) | |
#define S5PV210_MP02(_nr) (S5PV210_GPIO_MP02_START + (_nr)) | |
#define S5PV210_MP03(_nr) (S5PV210_GPIO_MP03_START + (_nr)) | |
/* the end of the S5PV210 specific gpios */ | |
! #define S5PV210_GPIO_END (S5PV210_MP03(S5PV210_GPIO_MP03_NR) + 1) | |
#define S3C_GPIO_END S5PV210_GPIO_END | |
! /* define the number of gpios we need to the one after the MP03() range */ | |
! #define ARCH_NR_GPIOS (S5PV210_MP03(S5PV210_GPIO_MP03_NR) + \ | |
CONFIG_SAMSUNG_GPIO_EXTRA + 1) | |
#include <asm-generic/gpio.h> | |
#endif /* __ASM_ARCH_GPIO_H */ | |
--- 183,253 ---- | |
#define S5PV210_MP01(_nr) (S5PV210_GPIO_MP01_START + (_nr)) | |
#define S5PV210_MP02(_nr) (S5PV210_GPIO_MP02_START + (_nr)) | |
#define S5PV210_MP03(_nr) (S5PV210_GPIO_MP03_START + (_nr)) | |
+ #define S5PV210_MP04(_nr) (S5PV210_GPIO_MP04_START + (_nr)) | |
+ #define S5PV210_MP05(_nr) (S5PV210_GPIO_MP05_START + (_nr)) | |
+ #define S5PV210_MP06(_nr) (S5PV210_GPIO_MP06_START + (_nr)) | |
+ #define S5PV210_MP07(_nr) (S5PV210_GPIO_MP07_START + (_nr)) | |
+ #define S5PV210_MP10(_nr) (S5PV210_GPIO_MP10_START + (_nr)) | |
+ #define S5PV210_MP11(_nr) (S5PV210_GPIO_MP11_START + (_nr)) | |
+ #define S5PV210_MP12(_nr) (S5PV210_GPIO_MP12_START + (_nr)) | |
+ #define S5PV210_MP13(_nr) (S5PV210_GPIO_MP13_START + (_nr)) | |
+ #define S5PV210_MP14(_nr) (S5PV210_GPIO_MP14_START + (_nr)) | |
+ #define S5PV210_MP15(_nr) (S5PV210_GPIO_MP15_START + (_nr)) | |
+ #define S5PV210_MP16(_nr) (S5PV210_GPIO_MP16_START + (_nr)) | |
+ #define S5PV210_MP17(_nr) (S5PV210_GPIO_MP17_START + (_nr)) | |
+ #define S5PV210_MP18(_nr) (S5PV210_GPIO_MP18_START + (_nr)) | |
+ #define S5PV210_MP20(_nr) (S5PV210_GPIO_MP20_START + (_nr)) | |
+ #define S5PV210_MP21(_nr) (S5PV210_GPIO_MP21_START + (_nr)) | |
+ #define S5PV210_MP22(_nr) (S5PV210_GPIO_MP22_START + (_nr)) | |
+ #define S5PV210_MP23(_nr) (S5PV210_GPIO_MP23_START + (_nr)) | |
+ #define S5PV210_MP24(_nr) (S5PV210_GPIO_MP24_START + (_nr)) | |
+ #define S5PV210_MP25(_nr) (S5PV210_GPIO_MP25_START + (_nr)) | |
+ #define S5PV210_MP26(_nr) (S5PV210_GPIO_MP26_START + (_nr)) | |
+ #define S5PV210_MP27(_nr) (S5PV210_GPIO_MP27_START + (_nr)) | |
+ #define S5PV210_MP28(_nr) (S5PV210_GPIO_MP28_START + (_nr)) | |
+ #define S5PV210_ETC0(_nr) (S5PV210_GPIO_ETC0_START + (_nr)) | |
+ #define S5PV210_ETC1(_nr) (S5PV210_GPIO_ETC1_START + (_nr)) | |
+ #define S5PV210_ETC2(_nr) (S5PV210_GPIO_ETC2_START + (_nr)) | |
+ #define S5PV210_ETC4(_nr) (S5PV210_GPIO_ETC4_START + (_nr)) | |
+ | |
+ /* Define EXT INT GPIO */ | |
+ #define S5P_EXT_INT0(x) S5PV210_GPH0(x) | |
+ #define S5P_EXT_INT1(x) S5PV210_GPH1(x) | |
+ #define S5P_EXT_INT2(x) S5PV210_GPH2(x) | |
+ #define S5P_EXT_INT3(x) S5PV210_GPH3(x) | |
/* the end of the S5PV210 specific gpios */ | |
! #define S5PV210_GPIO_END (S5PV210_ETC4(S5PV210_GPIO_ETC4_NR) + 1) | |
#define S3C_GPIO_END S5PV210_GPIO_END | |
! /* define the number of gpios we need to the one after the GPJ4() range */ | |
! #define ARCH_NR_GPIOS (S5PV210_ETC4(S5PV210_GPIO_ETC4_NR) + \ | |
CONFIG_SAMSUNG_GPIO_EXTRA + 1) | |
#include <asm-generic/gpio.h> | |
+ #include <plat/gpio-cfg.h> | |
+ | |
+ extern int s3c_gpio_slp_cfgpin(unsigned int pin, unsigned int to); | |
+ extern s3c_gpio_pull_t s3c_gpio_get_slp_cfgpin(unsigned int pin); | |
+ | |
+ #define S3C_GPIO_SLP_OUT0 ((__force s3c_gpio_pull_t)0x00) | |
+ #define S3C_GPIO_SLP_OUT1 ((__force s3c_gpio_pull_t)0x01) | |
+ #define S3C_GPIO_SLP_INPUT ((__force s3c_gpio_pull_t)0x02) | |
+ #define S3C_GPIO_SLP_PREV ((__force s3c_gpio_pull_t)0x03) | |
+ | |
+ extern int s3c_gpio_set_drvstrength(unsigned int pin, unsigned int config); | |
+ extern int s3c_gpio_set_slewrate(unsigned int pin, unsigned int config); | |
+ | |
+ #define S3C_GPIO_DRVSTR_1X (0) | |
+ #define S3C_GPIO_DRVSTR_2X (1) | |
+ #define S3C_GPIO_DRVSTR_3X (2) | |
+ #define S3C_GPIO_DRVSTR_4X (3) | |
+ | |
+ #define S3C_GPIO_SLEWRATE_FAST (0) | |
+ #define S3C_GPIO_SLEWRATE_SLOW (1) | |
+ | |
+ extern int s3c_gpio_slp_setpull_updown(unsigned int pin, s3c_gpio_pull_t pull); | |
+ extern int s5pv210_gpiolib_init(void); | |
+ | |
#endif /* __ASM_ARCH_GPIO_H */ | |
Only in 1/arch/arm/mach-s5pv210/include/mach: gpio-p1.h | |
diff -crB 2/arch/arm/mach-s5pv210/include/mach/irqs.h 1/arch/arm/mach-s5pv210/include/mach/irqs.h | |
*** 2/arch/arm/mach-s5pv210/include/mach/irqs.h 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/mach-s5pv210/include/mach/irqs.h 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 17,22 **** | |
--- 17,38 ---- | |
/* VIC0: System, DMA, Timer */ | |
+ #define IRQ_EINT0 S5P_IRQ_VIC0(0) | |
+ #define IRQ_EINT1 S5P_IRQ_VIC0(1) | |
+ #define IRQ_EINT2 S5P_IRQ_VIC0(2) | |
+ #define IRQ_EINT3 S5P_IRQ_VIC0(3) | |
+ #define IRQ_EINT4 S5P_IRQ_VIC0(4) | |
+ #define IRQ_EINT5 S5P_IRQ_VIC0(5) | |
+ #define IRQ_EINT6 S5P_IRQ_VIC0(6) | |
+ #define IRQ_EINT7 S5P_IRQ_VIC0(7) | |
+ #define IRQ_EINT8 S5P_IRQ_VIC0(8) | |
+ #define IRQ_EINT9 S5P_IRQ_VIC0(9) | |
+ #define IRQ_EINT10 S5P_IRQ_VIC0(10) | |
+ #define IRQ_EINT11 S5P_IRQ_VIC0(11) | |
+ #define IRQ_EINT12 S5P_IRQ_VIC0(12) | |
+ #define IRQ_EINT13 S5P_IRQ_VIC0(13) | |
+ #define IRQ_EINT14 S5P_IRQ_VIC0(14) | |
+ #define IRQ_EINT15 S5P_IRQ_VIC0(15) | |
#define IRQ_EINT16_31 S5P_IRQ_VIC0(16) | |
#define IRQ_BATF S5P_IRQ_VIC0(17) | |
#define IRQ_MDMA S5P_IRQ_VIC0(18) | |
*************** | |
*** 54,61 **** | |
#define IRQ_SPI0 S5P_IRQ_VIC1(15) | |
#define IRQ_SPI1 S5P_IRQ_VIC1(16) | |
#define IRQ_SPI2 S5P_IRQ_VIC1(17) | |
! #define IRQ_IRDA S5P_IRQ_VIC1(18) | |
! #define IRQ_CAN0 S5P_IRQ_VIC1(19) | |
#define IRQ_CAN1 S5P_IRQ_VIC1(20) | |
#define IRQ_HSIRX S5P_IRQ_VIC1(21) | |
#define IRQ_HSITX S5P_IRQ_VIC1(22) | |
--- 70,77 ---- | |
#define IRQ_SPI0 S5P_IRQ_VIC1(15) | |
#define IRQ_SPI1 S5P_IRQ_VIC1(16) | |
#define IRQ_SPI2 S5P_IRQ_VIC1(17) | |
! #define IRQ_ASS S5P_IRQ_VIC1(18) | |
! #define IRQ_IIC2 S5P_IRQ_VIC1(19) | |
#define IRQ_CAN1 S5P_IRQ_VIC1(20) | |
#define IRQ_HSIRX S5P_IRQ_VIC1(21) | |
#define IRQ_HSITX S5P_IRQ_VIC1(22) | |
*************** | |
*** 116,132 **** | |
#define IRQ_MDNIE1 S5P_IRQ_VIC3(6) | |
#define IRQ_MDNIE2 S5P_IRQ_VIC3(7) | |
#define IRQ_MDNIE3 S5P_IRQ_VIC3(8) | |
#define IRQ_VIC_END S5P_IRQ_VIC3(31) | |
#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) | |
#define S5P_EINT_BASE2 (IRQ_VIC_END + 1) | |
- /* Set the default NR_IRQS */ | |
- #define NR_IRQS (IRQ_EINT(31) + 1) | |
/* Compatibility */ | |
#define IRQ_LCD_FIFO IRQ_LCD0 | |
#define IRQ_LCD_VSYNC IRQ_LCD1 | |
#define IRQ_LCD_SYSTEM IRQ_LCD2 | |
#endif /* ASM_ARCH_IRQS_H */ | |
--- 132,238 ---- | |
#define IRQ_MDNIE1 S5P_IRQ_VIC3(6) | |
#define IRQ_MDNIE2 S5P_IRQ_VIC3(7) | |
#define IRQ_MDNIE3 S5P_IRQ_VIC3(8) | |
+ #define IRQ_ADC1 S5P_IRQ_VIC3(9) | |
+ #define IRQ_PENDN1 S5P_IRQ_VIC3(10) | |
#define IRQ_VIC_END S5P_IRQ_VIC3(31) | |
#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) | |
#define S5P_EINT_BASE2 (IRQ_VIC_END + 1) | |
+ #define S5P_IRQ_EINT_BASE S5P_EINT_BASE2 | |
+ | |
+ #define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE) | |
+ | |
+ /* GPIO interrupt */ | |
+ #define S5P_GPIOINT_GROUP_NR 22 | |
+ #define S5P_GPIOINT_BASE (IRQ_EINT(31) + 1) | |
+ #define S5P_IRQ_GPIOINT(x) (S5P_GPIOINT_BASE + (x)) | |
/* Compatibility */ | |
#define IRQ_LCD_FIFO IRQ_LCD0 | |
#define IRQ_LCD_VSYNC IRQ_LCD1 | |
#define IRQ_LCD_SYSTEM IRQ_LCD2 | |
+ /* Next the external interrupt groups. These are similar to the IRQ_EINT(x) | |
+ * that they are sourced from the GPIO pins but with a different scheme for | |
+ * priority and source indication. | |
+ * | |
+ * The IRQ_EINT(x) can be thought of as 'group 0' of the available GPIO | |
+ * interrupts, but for historical reasons they are kept apart from these | |
+ * next interrupts. | |
+ * | |
+ * Use IRQ_EINT_GROUP(group, offset) to get the number for use in the | |
+ * machine specific support files. | |
+ */ | |
+ | |
+ #define IRQ_EINT_GROUP1_NR (8) /* A0 */ | |
+ #define IRQ_EINT_GROUP2_NR (4) /* A1 */ | |
+ #define IRQ_EINT_GROUP3_NR (8) /* B */ | |
+ #define IRQ_EINT_GROUP4_NR (5) /* C0 */ | |
+ #define IRQ_EINT_GROUP5_NR (5) /* C1 */ | |
+ #define IRQ_EINT_GROUP6_NR (4) /* D0 */ | |
+ #define IRQ_EINT_GROUP7_NR (6) /* D1 */ | |
+ #define IRQ_EINT_GROUP8_NR (8) /* E0 */ | |
+ #define IRQ_EINT_GROUP9_NR (5) /* E1 */ | |
+ #define IRQ_EINT_GROUP10_NR (8) /* F0 */ | |
+ #define IRQ_EINT_GROUP11_NR (8) /* F1 */ | |
+ #define IRQ_EINT_GROUP12_NR (8) /* F2 */ | |
+ #define IRQ_EINT_GROUP13_NR (6) /* F3 */ | |
+ #define IRQ_EINT_GROUP14_NR (7) /* G0 */ | |
+ #define IRQ_EINT_GROUP15_NR (7) /* G1 */ | |
+ #define IRQ_EINT_GROUP16_NR (7) /* G2 */ | |
+ #define IRQ_EINT_GROUP17_NR (7) /* G3 */ | |
+ #define IRQ_EINT_GROUP18_NR (8) /* J0 */ | |
+ #define IRQ_EINT_GROUP19_NR (6) /* J1 */ | |
+ #define IRQ_EINT_GROUP20_NR (8) /* J2 */ | |
+ #define IRQ_EINT_GROUP21_NR (8) /* J3 */ | |
+ #define IRQ_EINT_GROUP22_NR (5) /* J4 */ | |
+ | |
+ #define IRQ_EINT_GROUP_BASE S5P_EINT(31 + 1) | |
+ #define IRQ_EINT_GROUP1_BASE (IRQ_EINT_GROUP_BASE + 0x00) | |
+ #define IRQ_EINT_GROUP2_BASE (IRQ_EINT_GROUP1_BASE + IRQ_EINT_GROUP1_NR) | |
+ #define IRQ_EINT_GROUP3_BASE (IRQ_EINT_GROUP2_BASE + IRQ_EINT_GROUP2_NR) | |
+ #define IRQ_EINT_GROUP4_BASE (IRQ_EINT_GROUP3_BASE + IRQ_EINT_GROUP3_NR) | |
+ #define IRQ_EINT_GROUP5_BASE (IRQ_EINT_GROUP4_BASE + IRQ_EINT_GROUP4_NR) | |
+ #define IRQ_EINT_GROUP6_BASE (IRQ_EINT_GROUP5_BASE + IRQ_EINT_GROUP5_NR) | |
+ #define IRQ_EINT_GROUP7_BASE (IRQ_EINT_GROUP6_BASE + IRQ_EINT_GROUP6_NR) | |
+ #define IRQ_EINT_GROUP8_BASE (IRQ_EINT_GROUP7_BASE + IRQ_EINT_GROUP7_NR) | |
+ #define IRQ_EINT_GROUP9_BASE (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR) | |
+ #define IRQ_EINT_GROUP10_BASE (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR) | |
+ #define IRQ_EINT_GROUP11_BASE (IRQ_EINT_GROUP10_BASE + IRQ_EINT_GROUP10_NR) | |
+ #define IRQ_EINT_GROUP12_BASE (IRQ_EINT_GROUP11_BASE + IRQ_EINT_GROUP11_NR) | |
+ #define IRQ_EINT_GROUP13_BASE (IRQ_EINT_GROUP12_BASE + IRQ_EINT_GROUP12_NR) | |
+ #define IRQ_EINT_GROUP14_BASE (IRQ_EINT_GROUP13_BASE + IRQ_EINT_GROUP13_NR) | |
+ #define IRQ_EINT_GROUP15_BASE (IRQ_EINT_GROUP14_BASE + IRQ_EINT_GROUP14_NR) | |
+ #define IRQ_EINT_GROUP16_BASE (IRQ_EINT_GROUP15_BASE + IRQ_EINT_GROUP15_NR) | |
+ #define IRQ_EINT_GROUP17_BASE (IRQ_EINT_GROUP16_BASE + IRQ_EINT_GROUP16_NR) | |
+ #define IRQ_EINT_GROUP18_BASE (IRQ_EINT_GROUP17_BASE + IRQ_EINT_GROUP17_NR) | |
+ #define IRQ_EINT_GROUP19_BASE (IRQ_EINT_GROUP18_BASE + IRQ_EINT_GROUP18_NR) | |
+ #define IRQ_EINT_GROUP20_BASE (IRQ_EINT_GROUP19_BASE + IRQ_EINT_GROUP19_NR) | |
+ #define IRQ_EINT_GROUP21_BASE (IRQ_EINT_GROUP20_BASE + IRQ_EINT_GROUP20_NR) | |
+ #define IRQ_EINT_GROUP22_BASE (IRQ_EINT_GROUP21_BASE + IRQ_EINT_GROUP21_NR) | |
+ | |
+ #define IRQ_EINT_GROUP(group, no) (IRQ_EINT_GROUP##group##_BASE + (no)) | |
+ | |
+ #define IRQ_EINT_END (IRQ_EINT_GROUP22_BASE + IRQ_EINT_GROUP22_NR) | |
+ | |
+ /* | |
+ * Set the default NR_IRQS | |
+ * GPIO groups is 27. Each GPIO group can have max 8 GPIO interrupts. | |
+ * | |
+ * We should include gpios of all gpio groups from GPIO_A0 until GPIO_J4 to | |
+ * NR_IRQS because 22 gpio groups having gpio interrupts aren't in order and | |
+ * are mixed with no interrupt gpio groups, then it can give simple irq | |
+ * computation of gpio interrupts. | |
+ */ | |
+ #define NR_IRQS (S5P_IRQ_GPIOINT(27 * 8) + 1) | |
+ | |
+ | |
+ #define HALL_SENSOR_IRQ IRQ_EINT3 | |
+ | |
+ #define FIQ_START 0 | |
+ | |
+ #define IRQ_MAX8998_BASE IRQ_EINT_END | |
+ #define IRQ_MAX8998_END IRQ_EINT_END + 17 | |
+ | |
#endif /* ASM_ARCH_IRQS_H */ | |
Only in 1/arch/arm/mach-s5pv210/include/mach: mach-p1.h | |
diff -crB 2/arch/arm/mach-s5pv210/include/mach/map.h 1/arch/arm/mach-s5pv210/include/mach/map.h | |
*** 2/arch/arm/mach-s5pv210/include/mach/map.h 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/mach-s5pv210/include/mach/map.h 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 41,46 **** | |
--- 41,55 ---- | |
#define S5PV210_PA_SYSTIMER (0xE2600000) | |
+ #define S5PV210_PA_WDT (0xE2700000) | |
+ #define S5P_PA_WDT S5PV210_PA_WDT | |
+ | |
+ #define S5PV210_PA_RTC (0xE2800000) | |
+ #define S5P_PA_RTC S5PV210_PA_RTC | |
+ | |
+ #define S5PV210_VA_RTC S3C_ADDR(0x00c00000) | |
+ #define S5P_VA_RTC S5PV210_VA_RTC | |
+ | |
#define S5PV210_PA_WATCHDOG (0xE2700000) | |
#define S5PV210_PA_UART (0xE2900000) | |
*************** | |
*** 52,59 **** | |
--- 61,87 ---- | |
#define S5P_SZ_UART SZ_256 | |
+ #define S5P_SZ_UART_FULL SZ_1K | |
+ #define S3C_VA_UARTx(uart) (S3C_VA_UART + ((uart * S5P_SZ_UART_FULL))) | |
+ | |
#define S5PV210_PA_SROMC (0xE8000000) | |
+ /* usb */ | |
+ #define S5PV210_PA_OTG (0xEC000000) | |
+ #define S5PV210_SZ_OTG SZ_1M | |
+ | |
+ #define S5PV210_PA_OTGSFR (0xEC100000) | |
+ #define S5PV210_SZ_OTGSFR SZ_1M | |
+ | |
+ #define S5PV210_PA_USB_EHCI (0xEC200000) | |
+ #define S5P_PA_USB_EHCI S5PV210_PA_USB_EHCI | |
+ #define S5P_SZ_USB_EHCI SZ_1M | |
+ | |
+ #define S5PV210_PA_USB_OHCI (0xEC300000) | |
+ #define S5P_PA_USB_OHCI S5PV210_PA_USB_OHCI | |
+ #define S5P_SZ_USB_OHCI SZ_1M | |
+ /* end usb */ | |
+ | |
#define S5PV210_PA_MDMA 0xFA200000 | |
#define S5PV210_PA_PDMA0 0xE0900000 | |
#define S5PV210_PA_PDMA1 0xE0A00000 | |
*************** | |
*** 74,82 **** | |
--- 102,167 ---- | |
#define S5PV210_PA_VIC3 (0xF2300000) | |
#define S5P_PA_VIC3 S5PV210_PA_VIC3 | |
+ #define S5P_VA_VIC0 (S3C_VA_IRQ + 0x0) | |
+ #define S5P_VA_VIC1 (S3C_VA_IRQ + 0x10000) | |
+ #define S5P_VA_VIC2 (S3C_VA_IRQ + 0x20000) | |
+ #define S5P_VA_VIC3 (S3C_VA_IRQ + 0x30000) | |
+ | |
+ #define S5PV210_PA_LCD (0xF8000000) | |
+ #define S5P_PA_LCD S5PV210_PA_LCD | |
+ #define S5PV210_SZ_LCD SZ_1M | |
+ #define S5P_SZ_LCD S5PV210_SZ_LCD | |
+ | |
+ #define S5PV210_PA_CSIS (0xFA600000) | |
+ #define S5P_PA_CSIS S5PV210_PA_CSIS | |
+ #define S5PV210_SZ_CSIS SZ_1M | |
+ #define S5P_SZ_CSIS S5PV210_SZ_CSIS | |
+ | |
+ #define S5PV210_PA_MFC (0xF1700000) | |
+ #define S5P_PA_MFC S5PV210_PA_MFC | |
+ #define S5PV210_SZ_MFC SZ_1M | |
+ #define S5P_SZ_MFC S5PV210_SZ_MFC | |
+ | |
+ #define S5PV210_PA_JPEG (0xFB600000) | |
+ #define S5PV210_SZ_JPEG SZ_1M | |
+ | |
+ #define S5PV210_PA_FIMC0 (0xFB200000) | |
+ #define S5P_PA_FIMC0 S5PV210_PA_FIMC0 | |
+ #define S5PV210_PA_FIMC1 (0xFB300000) | |
+ #define S5P_PA_FIMC1 S5PV210_PA_FIMC1 | |
+ #define S5PV210_PA_FIMC2 (0xFB400000) | |
+ #define S5P_PA_FIMC2 S5PV210_PA_FIMC2 | |
+ #define S5PV210_SZ_FIMC0 SZ_1M | |
+ #define S5P_SZ_FIMC0 S5PV210_SZ_FIMC0 | |
+ #define S5PV210_SZ_FIMC1 SZ_1M | |
+ #define S5P_SZ_FIMC1 S5PV210_SZ_FIMC1 | |
+ #define S5PV210_SZ_FIMC2 SZ_1M | |
+ #define S5P_SZ_FIMC2 S5PV210_SZ_FIMC2 | |
+ | |
+ #define S5PV210_PA_IPC (0xFB700000) | |
+ #define S5P_PA_IPC S5PV210_PA_IPC | |
+ #define S5PV210_SZ_IPC SZ_1M | |
+ #define S5P_SZ_IPC S5PV210_SZ_IPC | |
+ | |
+ #if defined(CONFIG_MACH_SMDKV210) | |
#define S5PV210_PA_SDRAM (0x20000000) | |
+ #else | |
+ #define S5PV210_PA_SDRAM (0x30000000) | |
+ #endif | |
#define S5P_PA_SDRAM S5PV210_PA_SDRAM | |
+ /* KEYPAD IF */ | |
+ #define S5PV2XX_SZ_KEYPAD SZ_4K | |
+ | |
+ #define S5PV2XX_PA_ADC (0xE1700000) | |
+ #define S3C_PA_ADC S5PV2XX_PA_ADC | |
+ | |
+ #define S5PV2XX_PA_KEYPAD (0xE1600000) | |
+ #define S3C_PA_KEYPAD S5PV2XX_PA_KEYPAD | |
+ #define S3C_SZ_KEYPAD S5PV2XX_SZ_KEYPAD | |
+ | |
+ #define S5PV210_PA_AUDSS (0xEEE10000) | |
+ | |
/* I2S */ | |
#define S5PV210_PA_IIS0 0xEEE30000 | |
#define S5PV210_PA_IIS1 0xE2100000 | |
*************** | |
*** 92,102 **** | |
--- 177,210 ---- | |
#define S5PV210_PA_ADC (0xE1700000) | |
+ /* mfc */ | |
+ #define S5PV210_PA_MFC (0xF1700000) | |
+ #define S5PV210_SZ_MFC SZ_1M | |
+ #define S5P_PA_MFC S5PV210_PA_MFC | |
+ #define S5P_SZ_MFC S5PV210_SZ_MFC | |
+ | |
+ | |
+ /* jpeg */ | |
+ #define S5PV210_PA_JPEG (0xFB600000) | |
+ #define S5P_PA_JPEG S5PV210_PA_JPEG | |
+ #define S5P_SZ_JPEG SZ_1M | |
+ | |
+ /* rotator */ | |
+ #define S5PV210_PA_ROTATOR (0xFA300000) | |
+ #define S5P_PA_ROTATOR S5PV210_PA_ROTATOR | |
+ #define S5P_SZ_ROTATOR SZ_1M | |
+ | |
+ /* fimg2d */ | |
+ #define S5PV210_PA_FIMG2D (0xFA000000) | |
+ #define S5P_PA_FIMG2D S5PV210_PA_FIMG2D | |
+ #define S5P_SZ_FIMG2D SZ_1M | |
+ | |
/* compatibiltiy defines. */ | |
#define S3C_PA_UART S5PV210_PA_UART | |
#define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) | |
#define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1) | |
#define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2) | |
+ #define S3C_PA_HSMMC3 S5PV210_PA_HSMMC(3) | |
#define S3C_PA_IIC S5PV210_PA_IIC0 | |
#define S3C_PA_IIC1 S5PV210_PA_IIC1 | |
#define S3C_PA_IIC2 S5PV210_PA_IIC2 | |
*************** | |
*** 105,108 **** | |
--- 213,256 ---- | |
#define SAMSUNG_PA_ADC S5PV210_PA_ADC | |
+ /* CEC */ | |
+ #define S5PV210_PA_CEC (0xE1B00000) | |
+ #define S5P_PA_CEC S5PV210_PA_CEC | |
+ #define S5P_SZ_CEC SZ_4K | |
+ | |
+ /* TVOUT */ | |
+ #define S5PV210_PA_TVENC (0xF9000000) | |
+ #define S5P_PA_TVENC S5PV210_PA_TVENC | |
+ #define S5P_SZ_TVENC SZ_1M | |
+ | |
+ #define S5PV210_PA_VP (0xF9100000) | |
+ #define S5P_PA_VP S5PV210_PA_VP | |
+ #define S5P_SZ_VP SZ_1M | |
+ | |
+ #define S5PV210_PA_MIXER (0xF9200000) | |
+ #define S5P_PA_MIXER S5PV210_PA_MIXER | |
+ #define S5P_SZ_MIXER SZ_1M | |
+ | |
+ #define S5PV210_PA_HDMI (0xFA100000) | |
+ #define S5P_PA_HDMI S5PV210_PA_HDMI | |
+ #define S5P_SZ_HDMI SZ_1M | |
+ | |
+ #define S5PV210_I2C_HDMI_PHY (0xFA900000) | |
+ #define S5P_I2C_HDMI_PHY S5PV210_I2C_HDMI_PHY | |
+ #define S5P_I2C_HDMI_SZ_PHY SZ_1K | |
+ | |
+ #define S5P_PA_DMC0 (0xF0000000) | |
+ #define S5P_VA_DMC0 S3C_ADDR(0x00800000) | |
+ | |
+ #define S5P_PA_DMC1 (0xF1400000) | |
+ #define S5P_VA_DMC1 S3C_ADDR(0x00900000) | |
+ | |
+ /* usb */ | |
+ #define S3C_PA_OTG S5PV210_PA_OTG | |
+ #define S3C_SZ_OTG S5PV210_SZ_OTG | |
+ | |
+ #define S3C_PA_OTGSFR S5PV210_PA_OTGSFR | |
+ #define S3C_SZ_OTGSFR S5PV210_SZ_OTGSFR | |
+ | |
+ /* end usb */ | |
#endif /* __ASM_ARCH_MAP_H */ | |
Only in 1/arch/arm/mach-s5pv210/include/mach: media.h | |
diff -crB 2/arch/arm/mach-s5pv210/include/mach/memory.h 1/arch/arm/mach-s5pv210/include/mach/memory.h | |
*** 2/arch/arm/mach-s5pv210/include/mach/memory.h 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/mach-s5pv210/include/mach/memory.h 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 13,23 **** | |
--- 13,29 ---- | |
#ifndef __ASM_ARCH_MEMORY_H | |
#define __ASM_ARCH_MEMORY_H | |
+ #if defined(CONFIG_MACH_SMDKV210) | |
#define PHYS_OFFSET UL(0x20000000) | |
+ #else | |
+ #define PHYS_OFFSET UL(0x30000000) | |
+ #endif | |
+ | |
#define CONSISTENT_DMA_SIZE (SZ_8M + SZ_4M + SZ_2M) | |
/* Maximum of 256MiB in one bank */ | |
#define MAX_PHYSMEM_BITS 32 | |
#define SECTION_SIZE_BITS 28 | |
+ #define NODE_MEM_SIZE_BITS 28 | |
#endif /* __ASM_ARCH_MEMORY_H */ | |
Only in 1/arch/arm/mach-s5pv210/include/mach: param.h | |
Only in 1/arch/arm/mach-s5pv210/include/mach: pm-core.h | |
Only in 1/arch/arm/mach-s5pv210/include/mach: power-domain.h | |
Only in 1/arch/arm/mach-s5pv210/include/mach: regs-adc.h | |
Only in 1/arch/arm/mach-s5pv210/include/mach: regs-audss.h | |
diff -crB 2/arch/arm/mach-s5pv210/include/mach/regs-clock.h 1/arch/arm/mach-s5pv210/include/mach/regs-clock.h | |
*** 2/arch/arm/mach-s5pv210/include/mach/regs-clock.h 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/mach-s5pv210/include/mach/regs-clock.h 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 17,22 **** | |
--- 17,25 ---- | |
#define S5P_CLKREG(x) (S3C_VA_SYS + (x)) | |
+ #define S5P_IECREG(x) (S5PC11X_VA_IEC + (x)) | |
+ #define S5P_APCREG(x) (S5PC11X_VA_APC + (x)) | |
+ | |
#define S5P_APLL_LOCK S5P_CLKREG(0x00) | |
#define S5P_MPLL_LOCK S5P_CLKREG(0x08) | |
#define S5P_EPLL_LOCK S5P_CLKREG(0x10) | |
*************** | |
*** 25,30 **** | |
--- 28,34 ---- | |
#define S5P_APLL_CON S5P_CLKREG(0x100) | |
#define S5P_MPLL_CON S5P_CLKREG(0x108) | |
#define S5P_EPLL_CON S5P_CLKREG(0x110) | |
+ #define S5P_EPLL_CON_K S5P_CLKREG(0x114) | |
#define S5P_VPLL_CON S5P_CLKREG(0x120) | |
#define S5P_CLK_SRC0 S5P_CLKREG(0x200) | |
*************** | |
*** 63,76 **** | |
#define S5P_CLKGATE_IP4 S5P_CLKREG(0x470) | |
#define S5P_CLKGATE_BLOCK S5P_CLKREG(0x480) | |
! #define S5P_CLKGATE_BUS0 S5P_CLKREG(0x484) | |
! #define S5P_CLKGATE_BUS1 S5P_CLKREG(0x488) | |
#define S5P_CLK_OUT S5P_CLKREG(0x500) | |
/* CLKSRC0 */ | |
#define S5P_CLKSRC0_MUX200_MASK (0x1<<16) | |
#define S5P_CLKSRC0_MUX166_MASK (0x1<<20) | |
#define S5P_CLKSRC0_MUX133_MASK (0x1<<24) | |
/* CLKDIV0 */ | |
#define S5P_CLKDIV0_APLL_SHIFT (0) | |
--- 67,228 ---- | |
#define S5P_CLKGATE_IP4 S5P_CLKREG(0x470) | |
#define S5P_CLKGATE_BLOCK S5P_CLKREG(0x480) | |
! #define S5P_CLKGATE_IP5 S5P_CLKREG(0x484) | |
#define S5P_CLK_OUT S5P_CLKREG(0x500) | |
+ #define S5P_CLK_DIV_STAT0 S5P_CLKREG(0x1000) | |
+ #define S5P_CLK_DIV_STAT1 S5P_CLKREG(0x1004) | |
+ #define S5P_CLK_MUX_STAT0 S5P_CLKREG(0x1100) | |
+ #define S5P_CLK_MUX_STAT1 S5P_CLKREG(0x1104) | |
+ | |
+ #define S5P_ARM_MCS S5P_CLKREG(0x6100) | |
+ | |
+ #define S5P_MIXER_OUT_SEL S5P_CLKREG(0x7004) | |
+ #define S5P_MDNIE_SEL S5P_CLKREG(0x7008) | |
+ | |
+ #define S5P_EPLL_EN (1<<31) | |
+ #define S5P_EPLL_MASK 0xffffffff | |
+ #define S5P_EPLLVAL(_v, _m, _p, _s) ((_v)<<27 | (_m)<<16 | ((_p)<<8) | ((_s))) | |
+ | |
+ #define S5P_EPLL_MASK_VSEL (0x1<<27) | |
+ #define S5P_EPLL_MASK_M (0x1FF<<16) | |
+ #define S5P_EPLL_MASK_P (0x3F<<8) | |
+ #define S5P_EPLL_MASK_S (0x3<<0) | |
+ #define S5P_ARM_MCS_CON S5P_CLKREG(0x6100) | |
+ | |
/* CLKSRC0 */ | |
+ #define S5P_CLKSRC0_APLL_MASK (0x1<<0) | |
+ #define S5P_CLKSRC0_APLL_SHIFT (0) | |
+ #define S5P_CLKSRC0_MPLL_MASK (0x1<<4) | |
+ #define S5P_CLKSRC0_MPLL_SHIFT (4) | |
+ #define S5P_CLKSRC0_EPLL_MASK (0x1<<8) | |
+ #define S5P_CLKSRC0_EPLL_SHIFT (8) | |
+ #define S5P_CLKSRC0_VPLL_MASK (0x1<<12) | |
+ #define S5P_CLKSRC0_VPLL_SHIFT (12) | |
#define S5P_CLKSRC0_MUX200_MASK (0x1<<16) | |
+ #define S5P_CLKSRC0_MUX200_SHIFT (16) | |
#define S5P_CLKSRC0_MUX166_MASK (0x1<<20) | |
+ #define S5P_CLKSRC0_MUX166_SHIFT (20) | |
#define S5P_CLKSRC0_MUX133_MASK (0x1<<24) | |
+ #define S5P_CLKSRC0_MUX133_SHIFT (24) | |
+ #define S5P_CLKSRC0_ONENAND_MASK (0x1<<28) | |
+ #define S5P_CLKSRC0_ONENAND_SHIFT (28) | |
+ | |
+ /* CLKSRC1 */ | |
+ #define S5P_CLKSRC1_HDMI_MASK (0x1<<0) | |
+ #define S5P_CLKSRC1_HDMI_SHIFT (0) | |
+ #define S5P_CLKSRC1_MIXER_MASK (0x1<<4) | |
+ #define S5P_CLKSRC1_MIXER_SHIFT (4) | |
+ #define S5P_CLKSRC1_DAC_MASK (0x1<<8) | |
+ #define S5P_CLKSRC1_DAC_SHIFT (8) | |
+ #define S5P_CLKSRC1_CAM0_MASK (0xF<<12) | |
+ #define S5P_CLKSRC1_CAM0_SHIFT (12) | |
+ #define S5P_CLKSRC1_CAM1_MASK (0xF<<16) | |
+ #define S5P_CLKSRC1_CAM1_SHIFT (16) | |
+ #define S5P_CLKSRC1_FIMD_MASK (0xF<<20) | |
+ #define S5P_CLKSRC1_FIMD_SHIFT (20) | |
+ #define S5P_CLKSRC1_CSIS_MASK (0xF<<24) | |
+ #define S5P_CLKSRC1_CSIS_SHIFT (24) | |
+ #define S5P_CLKSRC1_VPLLSRC_MASK (0x1<<28) | |
+ #define S5P_CLKSRC1_VPLLSRC_SHIFT (28) | |
+ | |
+ /* CLKSRC2 */ | |
+ #define S5P_CLKSRC2_G3D_MASK (0x3<<0) | |
+ #define S5P_CLKSRC2_G3D_SHIFT (0) | |
+ #define S5P_CLKSRC2_MFC_MASK (0x3<<4) | |
+ #define S5P_CLKSRC2_MFC_SHIFT (4) | |
+ #define S5P_CLKSRC2_G2D_MASK (0x3<<8) | |
+ #define S5P_CLKSRC2_G2D_SHIFT (8) | |
+ | |
+ /* CLKSRC3 */ | |
+ #define S5P_CLKSRC3_MDNIE_MASK (0xF<<0) | |
+ #define S5P_CLKSRC3_MDNIE_SHIFT (0) | |
+ #define S5P_CLKSRC3_MDINE_PWMCLK_MASK (0xF<<4) | |
+ #define S5P_CLKSRC3_MDINE_PWMCLK_SHIFT (4) | |
+ #define S5P_CLKSRC3_FIMC0_LCLK_MASK (0xF<<12) | |
+ #define S5P_CLKSRC3_FIMC0_LCLK_SHIFT (12) | |
+ #define S5P_CLKSRC3_FIMC1_LCLK_MASK (0xF<<16) | |
+ #define S5P_CLKSRC3_FIMC1_LCLK_SHIFT (16) | |
+ #define S5P_CLKSRC3_FIMC2_LCLK_MASK (0xF<<20) | |
+ #define S5P_CLKSRC3_FIMC2_LCLK_SHIFT (20) | |
+ | |
+ /* CLKSRC4 */ | |
+ #define S5P_CLKSRC4_MMC0_MASK (0xF<<0) | |
+ #define S5P_CLKSRC4_MMC0_SHIFT (0) | |
+ #define S5P_CLKSRC4_MMC1_MASK (0xF<<4) | |
+ #define S5P_CLKSRC4_MMC1_SHIFT (4) | |
+ #define S5P_CLKSRC4_MMC2_MASK (0xF<<8) | |
+ #define S5P_CLKSRC4_MMC2_SHIFT (8) | |
+ #define S5P_CLKSRC4_MMC3_MASK (0xF<<12) | |
+ #define S5P_CLKSRC4_MMC3_SHIFT (12) | |
+ #define S5P_CLKSRC4_UART0_MASK (0xF<<16) | |
+ #define S5P_CLKSRC4_UART0_SHIFT (16) | |
+ #define S5P_CLKSRC4_UART1_MASK (0xF<<20) | |
+ #define S5P_CLKSRC4_UART1_SHIFT (20) | |
+ #define S5P_CLKSRC4_UART2_MASK (0xF<<24) | |
+ #define S5P_CLKSRC4_UART2_SHIFT (24) | |
+ #define S5P_CLKSRC4_UART3_MASK (0xF<<28) | |
+ #define S5P_CLKSRC4_UART3_SHIFT (28) | |
+ | |
+ /* CLKSRC5 */ | |
+ #define S5P_CLKSRC5_SPI0_MASK (0xF<<0) | |
+ #define S5P_CLKSRC5_SPI0_SHIFT (0) | |
+ #define S5P_CLKSRC5_SPI1_MASK (0xF<<4) | |
+ #define S5P_CLKSRC5_SPI1_SHIFT (4) | |
+ #define S5P_CLKSRC5_SPI2_MASK (0xF<<8) | |
+ #define S5P_CLKSRC5_SPI2_SHIFT (8) | |
+ #define S5P_CLKSRC5_PWM_MASK (0xF<<12) | |
+ #define S5P_CLKSRC5_PWM_SHIFT (12) | |
+ | |
+ /* CLKSRC6 */ | |
+ #define S5P_CLKSRC6_AUDIO0_MASK (0xF<<0) | |
+ #define S5P_CLKSRC6_AUDIO0_SHIFT (0) | |
+ #define S5P_CLKSRC6_AUDIO1_MASK (0xF<<4) | |
+ #define S5P_CLKSRC6_AUDIO1_SHIFT (4) | |
+ #define S5P_CLKSRC6_AUDIO2_MASK (0xF<<8) | |
+ #define S5P_CLKSRC6_AUDIO2_SHIFT (8) | |
+ #define S5P_CLKSRC6_SPDIF_MASK (0x3<<12) | |
+ #define S5P_CLKSRC6_SPDIF_SHIFT (12) | |
+ #define S5P_CLKSRC6_HPM_MASK (0x1<<16) | |
+ #define S5P_CLKSRC6_HPM_SHIFT (16) | |
+ #define S5P_CLKSRC6_PWI_MASK (0xF<<20) | |
+ #define S5P_CLKSRC6_PWI_SHIFT (20) | |
+ #define S5P_CLKSRC6_ONEDRAM_MASK (0x3<<24) | |
+ #define S5P_CLKSRC6_ONEDRAM_SHIFT (24) | |
+ | |
+ /* CLKSRC_MASK0 */ | |
+ #define S5P_CLKSRC_MASK0_HDMI (1<<0) | |
+ #define S5P_CLKSRC_MASK0_MIXER (1<<1) | |
+ #define S5P_CLKSRC_MASK0_DAC (1<<2) | |
+ #define S5P_CLKSRC_MASK0_CAM0 (1<<3) | |
+ #define S5P_CLKSRC_MASK0_CAM1 (1<<4) | |
+ #define S5P_CLKSRC_MASK0_FIMD (1<<5) | |
+ #define S5P_CLKSRC_MASK0_CSIS (1<<6) | |
+ #define S5P_CLKSRC_MASK0_FINVPLL (1<<7) | |
+ #define S5P_CLKSRC_MASK0_MMC0 (1<<8) | |
+ #define S5P_CLKSRC_MASK0_MMC1 (1<<9) | |
+ #define S5P_CLKSRC_MASK0_MMC2 (1<<10) | |
+ #define S5P_CLKSRC_MASK0_MMC3 (1<<11) | |
+ #define S5P_CLKSRC_MASK0_UART0 (1<<12) | |
+ #define S5P_CLKSRC_MASK0_UART1 (1<<13) | |
+ #define S5P_CLKSRC_MASK0_UART2 (1<<14) | |
+ #define S5P_CLKSRC_MASK0_UART3 (1<<15) | |
+ #define S5P_CLKSRC_MASK0_SPI0 (1<<16) | |
+ #define S5P_CLKSRC_MASK0_SPI1 (1<<17) | |
+ #define S5P_CLKSRC_MASK0_SPI2 (1<<18) | |
+ #define S5P_CLKSRC_MASK0_PWM (1<<19) | |
+ #define S5P_CLKSRC_MASK0_AUDIO0 (1<<24) | |
+ #define S5P_CLKSRC_MASK0_AUDIO1 (1<<25) | |
+ #define S5P_CLKSRC_MASK0_AUDIO2 (1<<26) | |
+ #define S5P_CLKSRC_MASK0_SPDIF (0x1<<27) | |
+ | |
+ /* CLKSRC_MASK1 */ | |
+ #define S5P_CLKSRC_MASK1_MDNIE (1<<0) | |
+ #define S5P_CLKSRC_MASK1_MDNIE_PWM (1<<1) | |
+ #define S5P_CLKSRC_MASK1_FIMC0_LCLK (1<<2) | |
+ #define S5P_CLKSRC_MASK1_FIMC1_LCLK (1<<3) | |
+ #define S5P_CLKSRC_MASK1_FIMC2_LCLK (1<<4) | |
+ | |
/* CLKDIV0 */ | |
#define S5P_CLKDIV0_APLL_SHIFT (0) | |
*************** | |
*** 90,99 **** | |
#define S5P_CLKDIV0_PCLK66_SHIFT (28) | |
#define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT) | |
/* Registers related to power management */ | |
#define S5P_PWR_CFG S5P_CLKREG(0xC000) | |
#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004) | |
! #define S5P_WAKEUP_MASK S5P_CLKREG(0xC008) | |
#define S5P_PWR_MODE S5P_CLKREG(0xC00C) | |
#define S5P_NORMAL_CFG S5P_CLKREG(0xC010) | |
#define S5P_IDLE_CFG S5P_CLKREG(0xC020) | |
--- 242,554 ---- | |
#define S5P_CLKDIV0_PCLK66_SHIFT (28) | |
#define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT) | |
+ /* CLKDIV1 */ | |
+ #define S5P_CLKDIV1_TBLK_MASK (0xF<<0) | |
+ #define S5P_CLKDIV1_TBLK_SHIFT (0) | |
+ #define S5P_CLKDIV1_FIMC_MASK (0xF<<8) | |
+ #define S5P_CLKDIV1_FIMC_SHIFT (8) | |
+ #define S5P_CLKDIV1_CAM0_MASK (0xF<<12) | |
+ #define S5P_CLKDIV1_CAM0_SHIFT (12) | |
+ #define S5P_CLKDIV1_CAM1_MASK (0xF<<16) | |
+ #define S5P_CLKDIV1_CAM1_SHIFT (16) | |
+ #define S5P_CLKDIV1_FIMD_MASK (0xF<<20) | |
+ #define S5P_CLKDIV1_FIMD_SHIFT (20) | |
+ #define S5P_CLKDIV1_CSIS_MASK (0xF<<28) | |
+ #define S5P_CLKDIV1_CSIS_SHIFT (28) | |
+ | |
+ /* CLKDIV2 */ | |
+ #define S5P_CLKDIV2_G3D_MASK (0xF<<0) | |
+ #define S5P_CLKDIV2_G3D_SHIFT (0) | |
+ #define S5P_CLKDIV2_MFC_MASK (0xF<<4) | |
+ #define S5P_CLKDIV2_MFC_SHIFT (4) | |
+ #define S5P_CLKDIV2_G2D_MASK (0xF<<8) | |
+ #define S5P_CLKDIV2_G2D_SHIFT (8) | |
+ | |
+ /* CLKDIV3 */ | |
+ #define S5P_CLKDIV3_MDINE_MASK (0xf<<0) | |
+ #define S5P_CLKDIV3_MDINE_SHIFT (0) | |
+ #define S5P_CLKDIV3_MDINE_PWM_MASK (0x3f<<4) | |
+ #define S5P_CLKDIV3_MDINE_PWM_SHIFT (4) | |
+ #define S5P_CLKDIV3_FIMC0_LCLK_MASK (0xf<<12) | |
+ #define S5P_CLKDIV3_FIMC0_LCLK_SHIFT (12) | |
+ #define S5P_CLKDIV3_FIMC1_LCLK_MASK (0xf<<16) | |
+ #define S5P_CLKDIV3_FIMC1_LCLK_SHIFT (16) | |
+ #define S5P_CLKDIV3_FIMC2_LCLK_MASK (0xf<<20) | |
+ #define S5P_CLKDIV3_FIMC2_LCLK_SHIFT (20) | |
+ | |
+ /* CLKDIV4 */ | |
+ #define S5P_CLKDIV4_MMC0_MASK (0xF<<0) | |
+ #define S5P_CLKDIV4_MMC0_SHIFT (0) | |
+ #define S5P_CLKDIV4_MMC1_MASK (0xF<<4) | |
+ #define S5P_CLKDIV4_MMC1_SHIFT (4) | |
+ #define S5P_CLKDIV4_MMC2_MASK (0xF<<8) | |
+ #define S5P_CLKDIV4_MMC2_SHIFT (8) | |
+ #define S5P_CLKDIV4_MMC3_MASK (0xF<<12) | |
+ #define S5P_CLKDIV4_MMC3_SHIFT (12) | |
+ #define S5P_CLKDIV4_UART0_MASK (0xF<<16) | |
+ #define S5P_CLKDIV4_UART0_SHIFT (16) | |
+ #define S5P_CLKDIV4_UART1_MASK (0xf<<20) | |
+ #define S5P_CLKDIV4_UART1_SHIFT (20) | |
+ #define S5P_CLKDIV4_UART2_MASK (0xf<<24) | |
+ #define S5P_CLKDIV4_UART2_SHIFT (24) | |
+ #define S5P_CLKDIV4_UART3_MASK (0xf<<28) | |
+ #define S5P_CLKDIV4_UART3_SHIFT (28) | |
+ | |
+ /* CLKDIV5 */ | |
+ #define S5P_CLKDIV5_SPI0_MASK (0xF<<0) | |
+ #define S5P_CLKDIV5_SPI0_SHIFT (0) | |
+ #define S5P_CLKDIV5_SPI1_MASK (0xF<<4) | |
+ #define S5P_CLKDIV5_SPI1_SHIFT (4) | |
+ #define S5P_CLKDIV5_SPI2_MASK (0xF<<8) | |
+ #define S5P_CLKDIV5_SPI2_SHIFT (8) | |
+ #define S5P_CLKDIV5_PWM_MASK (0xF<<12) | |
+ #define S5P_CLKDIV5_PWM_SHIFT (12) | |
+ | |
+ /* CLKDIV6 */ | |
+ #define S5P_CLKDIV6_AUDIO0_MASK (0xF<<0) | |
+ #define S5P_CLKDIV6_AUDIO0_SHIFT (0) | |
+ #define S5P_CLKDIV6_AUDIO1_MASK (0xF<<4) | |
+ #define S5P_CLKDIV6_AUDIO1_SHIFT (4) | |
+ #define S5P_CLKDIV6_AUDIO2_MASK (0xF<<8) | |
+ #define S5P_CLKDIV6_AUDIO2_SHIFT (8) | |
+ #define S5P_CLKDIV6_ONENAND_MASK (0x7<<12) | |
+ #define S5P_CLKDIV6_ONENAND_SHIFT (12) | |
+ #define S5P_CLKDIV6_COPY_MASK (0x7<<16) | |
+ #define S5P_CLKDIV6_COPY_SHIFT (16) | |
+ #define S5P_CLKDIV6_HPM_MASK (0x7<<20) | |
+ #define S5P_CLKDIV6_HPM_SHIFT (20) | |
+ #define S5P_CLKDIV6_PWI_MASK (0xf<<24) | |
+ #define S5P_CLKDIV6_PWI_SHIFT (24) | |
+ #define S5P_CLKDIV6_ONEDRAM_MASK (0xf<<28) | |
+ #define S5P_CLKDIV6_ONEDRAM_SHIFT (28) | |
+ | |
+ /* Special Clock Gate Registers */ | |
+ #define S5P_CLKGATE_SCLK_FIMC_LCLK (1<<5) | |
+ | |
+ /* IP Clock Gate 0 Registers */ | |
+ #define S5P_CLKGATE_IP0_CSIS (1<<31) | |
+ #define S5P_CLKGATE_IP0_IPC (1<<30) | |
+ #define S5P_CLKGATE_IP0_ROTATOR (1<<29) | |
+ #define S5P_CLKGATE_IP0_JPEG (1<<28) | |
+ #define S5P_CLKGATE_IP0_FIMC2 (1<<26) | |
+ #define S5P_CLKGATE_IP0_FIMC1 (1<<25) | |
+ #define S5P_CLKGATE_IP0_FIMC0 (1<<24) | |
+ #define S5P_CLKGATE_IP0_MFC (1<<16) | |
+ #define S5P_CLKGATE_IP0_G2D (1<<12) | |
+ #define S5P_CLKGATE_IP0_G3D (1<<8) | |
+ #define S5P_CLKGATE_IP0_IMEM (1<<5) | |
+ #define S5P_CLKGATE_IP0_PDMA1 (1<<4) | |
+ #define S5P_CLKGATE_IP0_PDMA0 (1<<3) | |
+ #define S5P_CLKGATE_IP0_MDMA (1<<2) | |
+ #define S5P_CLKGATE_IP0_DMC1 (1<<1) | |
+ #define S5P_CLKGATE_IP0_DMC0 (1<<0) | |
+ | |
+ /* IP Clock Gate 1 Registers */ | |
+ #define S5P_CLKGATE_IP1_NFCON (1<<28) | |
+ #define S5P_CLKGATE_IP1_SROMC (1<<26) | |
+ #define S5P_CLKGATE_IP1_CFCON (1<<25) | |
+ #define S5P_CLKGATE_IP1_NANDXL (1<<24) | |
+ #define S5P_CLKGATE_IP1_USBHOST (1<<17) | |
+ #define S5P_CLKGATE_IP1_USBOTG (1<<16) | |
+ #define S5P_CLKGATE_IP1_HDMI (1<<11) | |
+ #define S5P_CLKGATE_IP1_TVENC (1<<10) | |
+ #define S5P_CLKGATE_IP1_MIXER (1<<9) | |
+ #define S5P_CLKGATE_IP1_VP (1<<8) | |
+ #define S5P_CLKGATE_IP1_DSIM (1<<2) | |
+ #define S5P_CLKGATE_IP1_MIE (1<<1) | |
+ #define S5P_CLKGATE_IP1_FIMD (1<<0) | |
+ | |
+ /* IP Clock Gate 2 Registers */ | |
+ #define S5P_CLKGATE_IP2_TZIC3 (1<<31) | |
+ #define S5P_CLKGATE_IP2_TZIC2 (1<<30) | |
+ #define S5P_CLKGATE_IP2_TZIC1 (1<<29) | |
+ #define S5P_CLKGATE_IP2_TZIC0 (1<<28) | |
+ #define S5P_CLKGATE_IP2_VIC3 (1<<27) | |
+ #define S5P_CLKGATE_IP2_VIC2 (1<<26) | |
+ #define S5P_CLKGATE_IP2_VIC1 (1<<25) | |
+ #define S5P_CLKGATE_IP2_VIC0 (1<<24) | |
+ #define S5P_CLKGATE_IP2_TSI (1<<20) | |
+ #define S5P_CLKGATE_IP2_HSMMC3 (1<<19) | |
+ #define S5P_CLKGATE_IP2_HSMMC2 (1<<18) | |
+ #define S5P_CLKGATE_IP2_HSMMC1 (1<<17) | |
+ #define S5P_CLKGATE_IP2_HSMMC0 (1<<16) | |
+ #define S5P_CLKGATE_IP2_SECJTAG (1<<11) | |
+ #define S5P_CLKGATE_IP2_HOSTIF (1<<10) | |
+ #define S5P_CLKGATE_IP2_MODEM (1<<9) | |
+ #define S5P_CLKGATE_IP2_CORESIGHT (1<<8) | |
+ #define S5P_CLKGATE_IP2_SDM (1<<1) | |
+ #define S5P_CLKGATE_IP2_SECSS (1<<0) | |
+ | |
+ /* IP Clock Gate 3 Registers */ | |
+ #define S5P_CLKGATE_IP3_PCM2 (1<<30) | |
+ #define S5P_CLKGATE_IP3_PCM1 (1<<29) | |
+ #define S5P_CLKGATE_IP3_PCM0 (1<<28) | |
+ #define S5P_CLKGATE_IP3_SYSCON (1<<27) | |
+ #define S5P_CLKGATE_IP3_GPIO (1<<26) | |
+ #define S5P_CLKGATE_IP3_TSADC (1<<24) | |
+ #define S5P_CLKGATE_IP3_PWM (1<<23) | |
+ #define S5P_CLKGATE_IP3_WDT (1<<22) | |
+ #define S5P_CLKGATE_IP3_KEYIF (1<<21) | |
+ #define S5P_CLKGATE_IP3_UART3 (1<<20) | |
+ #define S5P_CLKGATE_IP3_UART2 (1<<19) | |
+ #define S5P_CLKGATE_IP3_UART1 (1<<18) | |
+ #define S5P_CLKGATE_IP3_UART0 (1<<17) | |
+ #define S5P_CLKGATE_IP3_SYSTIMER (1<<16) | |
+ #define S5P_CLKGATE_IP3_RTC (1<<15) | |
+ #define S5P_CLKGATE_IP3_SPI2 (1<<14) | |
+ #define S5P_CLKGATE_IP3_SPI1 (1<<13) | |
+ #define S5P_CLKGATE_IP3_SPI0 (1<<12) | |
+ #define S5P_CLKGATE_IP3_I2C_HDMI_PHY (1<<11) | |
+ #define S5P_CLKGATE_IP3_I2C_HDMI_DDC (1<<10) | |
+ #define S5P_CLKGATE_IP3_I2C2 (1<<9) | |
+ #define S5P_CLKGATE_IP3_I2C1 (1<<8) | |
+ #define S5P_CLKGATE_IP3_I2C0 (1<<7) | |
+ #define S5P_CLKGATE_IP3_I2S2 (1<<6) | |
+ #define S5P_CLKGATE_IP3_I2S1 (1<<5) | |
+ #define S5P_CLKGATE_IP3_I2S0 (1<<4) | |
+ #define S5P_CLKGATE_IP3_AC97 (1<<1) | |
+ #define S5P_CLKGATE_IP3_SPDIF (1<<0) | |
+ | |
+ /* IP Clock Gate 4 Registers */ | |
+ #define S5P_CLKGATE_IP4_TZPC3 (1<<8) | |
+ #define S5P_CLKGATE_IP4_TZPC2 (1<<7) | |
+ #define S5P_CLKGATE_IP4_TZPC1 (1<<6) | |
+ #define S5P_CLKGATE_IP4_TZPC0 (1<<5) | |
+ #define S5P_CLKGATE_IP4_SECKEY (1<<3) | |
+ #define S5P_CLKGATE_IP4_IEM_APC (1<<2) | |
+ #define S5P_CLKGATE_IP4_IEM_IEC (1<<1) | |
+ #define S5P_CLKGATE_IP4_CHIP_ID (1<<0) | |
+ | |
+ /* Block Clock Gate Registers */ | |
+ #define S5P_CLKGATE_BLOCK_INTC (1<<10) | |
+ #define S5P_CLKGATE_BLOCK_HSMMC (1<<9) | |
+ #define S5P_CLKGATE_BLOCK_DEBUG (1<<8) | |
+ #define S5P_CLKGATE_BLOCK_SECURITY (1<<7) | |
+ #define S5P_CLKGATE_BLOCK_MEMORY (1<<6) | |
+ #define S5P_CLKGATE_BLOCK_USB (1<<5) | |
+ #define S5P_CLKGATE_BLOCK_TV (1<<4) | |
+ #define S5P_CLKGATE_BLOCK_LCD (1<<3) | |
+ #define S5P_CLKGATE_BLOCK_IMG (1<<2) | |
+ #define S5P_CLKGATE_BLOCK_MFC (1<<1) | |
+ #define S5P_CLKGATE_BLOCK_G3D (1<<0) | |
+ | |
+ /* IP Clock Gate 5 Registers */ | |
+ #define S5P_CLKGATE_IP5_JPEG (1<<29) | |
+ | |
+ | |
+ /* Bus Clock Gate Registers (hidden) */ | |
+ | |
+ /* register for EINT on PM Driver */ | |
+ #define S5P_APM_REG(x) ((x) + 0xE0200C00) | |
+ | |
+ #define S5P_APM_BASE S5P_APM_REG(0x000) | |
+ | |
+ #define S5P_APM_GPH0CON (0x000) | |
+ #define S5P_APM_GPH0DAT (0x004) | |
+ #define S5P_APM_GPH0PUD (0x008) | |
+ #define S5P_APM_GPH0DRV (0x00C) | |
+ #define S5P_APM_GPH1CON (0x020) | |
+ #define S5P_APM_GPH1DAT (0x024) | |
+ #define S5P_APM_GPH1PUD (0x028) | |
+ #define S5P_APM_GPH1DRV (0x02C) | |
+ #define S5P_APM_GPH2CON (0x040) | |
+ #define S5P_APM_GPH2DAT (0x044) | |
+ #define S5P_APM_GPH2PUD (0x048) | |
+ #define S5P_APM_GPH2DRV (0x04C) | |
+ #define S5P_APM_GPH3CON (0x060) | |
+ #define S5P_APM_GPH3DAT (0x064) | |
+ #define S5P_APM_GPH3PUD (0x068) | |
+ #define S5P_APM_GPH3DRV (0x06C) | |
+ #define S5P_APM_WEINT0_CON (0x200) | |
+ #define S5P_APM_WEINT1_CON (0x204) | |
+ #define S5P_APM_WEINT2_CON (0x208) | |
+ #define S5P_APM_WEINT3_CON (0x20C) | |
+ #define S5P_APM_WEINT0_FLTCON0 (0x280) | |
+ #define S5P_APM_WEINT0_FLTCON1 (0x284) | |
+ #define S5P_APM_WEINT1_FLTCON0 (0x288) | |
+ #define S5P_APM_WEINT1_FLTCON1 (0x28C) | |
+ #define S5P_APM_WEINT2_FLTCON0 (0x290) | |
+ #define S5P_APM_WEINT2_FLTCON1 (0x294) | |
+ #define S5P_APM_WEINT3_FLTCON0 (0x298) | |
+ #define S5P_APM_WEINT3_FLTCON1 (0x29C) | |
+ #define S5P_APM_WEINT0_MASK (0x300) | |
+ #define S5P_APM_WEINT1_MASK (0x304) | |
+ #define S5P_APM_WEINT2_MASK (0x308) | |
+ #define S5P_APM_WEINT3_MASK (0x30C) | |
+ #define S5P_APM_WEINT0_PEND (0x340) | |
+ #define S5P_APM_WEINT1_PEND (0x344) | |
+ #define S5P_APM_WEINT2_PEND (0x348) | |
+ #define S5P_APM_WEINT3_PEND (0x34C) | |
+ | |
+ /* Clk Div Stat0 Registers*/ | |
+ #define S5P_CLK_DIV_STAT0_DIV_UART3 (1<<31) | |
+ #define S5P_CLK_DIV_STAT0_DIV_UART2 (1<<30) | |
+ #define S5P_CLK_DIV_STAT0_DIV_UART1 (1<<29) | |
+ #define S5P_CLK_DIV_STAT0_DIV_UART0 (1<<28) | |
+ #define S5P_CLK_DIV_STAT0_DIV_MMC3 (1<<27) | |
+ #define S5P_CLK_DIV_STAT0_DIV_MMC2 (1<<26) | |
+ #define S5P_CLK_DIV_STAT0_DIV_MMC1 (1<<25) | |
+ #define S5P_CLK_DIV_STAT0_DIV_MMC0 (1<<24) | |
+ | |
+ #define S5P_CLK_DIV_STAT0_DIV_FIMC2_LCLK (1<<22) | |
+ #define S5P_CLK_DIV_STAT0_DIV_FIMC1_LCLK (1<<21) | |
+ #define S5P_CLK_DIV_STAT0_DIV_FIMC0_LCLK (1<<20) | |
+ #define S5P_CLK_DIV_STAT0_DIV_MDNIE_PWM (1<<19) | |
+ #define S5P_CLK_DIV_STAT0_DIV_MDNIE (1<<18) | |
+ #define S5P_CLK_DIV_STAT0_DIV_MFC (1<<17) | |
+ #define S5P_CLK_DIV_STAT0_DIV_G3D (1<<16) | |
+ #define S5P_CLK_DIV_STAT0_DIV_CSIS (1<<15) | |
+ #define S5P_CLK_DIV_STAT0_DIV_FIMD (1<<13) | |
+ #define S5P_CLK_DIV_STAT0_DIV_CAM1 (1<<12) | |
+ #define S5P_CLK_DIV_STAT0_DIV_CAM0 (1<<11) | |
+ #define S5P_CLK_DIV_STAT0_DIV_FIMC (1<<10) | |
+ #define S5P_CLK_DIV_STAT0_DIV_TBLK (1<<8) | |
+ #define S5P_CLK_DIV_STAT0_DIV_PCLK_PSYS (1<<7) | |
+ #define S5P_CLK_DIV_STAT0_DIV_HCLK_PSYS (1<<6) | |
+ #define S5P_CLK_DIV_STAT0_DIV_PCLK_DSYS (1<<5) | |
+ #define S5P_CLK_DIV_STAT0_DIV_HCLK_DSYS (1<<4) | |
+ #define S5P_CLK_DIV_STAT0_DIV_PCLK_MSYS (1<<3) | |
+ #define S5P_CLK_DIV_STAT0_DIV_HCLK_MSYS (1<<2) | |
+ #define S5P_CLK_DIV_STAT0_DIV_A2M (1<<1) | |
+ #define S5P_CLK_DIV_STAT0_DIV_APLL (1<<0) | |
+ | |
+ /* Clk Div Stat1 Registers*/ | |
+ #define S5P_CLK_DIV_STAT1_DIV_G2D (1<<20) | |
+ #define S5P_CLK_DIV_STAT1_DIV_DPM (1<<17) | |
+ #define S5P_CLK_DIV_STAT1_DIV_DVSEM (1<<16) | |
+ #define S5P_CLK_DIV_STAT1_DIV_ONEDRAM (1<<15) | |
+ #define S5P_CLK_DIV_STAT1_DIV_PWI (1<<14) | |
+ #define S5P_CLK_DIV_STAT1_DIV_HPM (1<<13) | |
+ #define S5P_CLK_DIV_STAT1_DIV_COPY (1<<12) | |
+ #define S5P_CLK_DIV_STAT1_DIV_ONENAND (1<<11) | |
+ #define S5P_CLK_DIV_STAT1_DIV_AUDIO2 (1<<10) | |
+ #define S5P_CLK_DIV_STAT1_DIV_AUDIO1 (1<<9) | |
+ #define S5P_CLK_DIV_STAT1_DIV_AUDIO0 (1<<8) | |
+ | |
+ #define S5P_CLK_DIV_STAT1_DIV_PWM (1<<3) | |
+ #define S5P_CLK_DIV_STAT1_DIV_SPI2 (1<<2) | |
+ #define S5P_CLK_DIV_STAT1_DIV_SPI1 (1<<1) | |
+ #define S5P_CLK_DIV_STAT1_DIV_SPI0 (1<<0) | |
+ | |
+ /* CLK_DIV_STAT0 */ | |
+ #define S5P_CLKDIV_STAT0_G3D (1 << 16) | |
+ #define S5P_CLKDIV_STAT0_MFC (1 << 17) | |
+ | |
+ /* CLK_DIV_STAT1 */ | |
+ #define S5P_CLKDIV_STAT1_G2D (1 << 20) | |
+ | |
+ /* CLK_MUX_STAT0 */ | |
+ #define S5P_CLKMUX_STAT0_MUX200 (1 << 18) | |
+ | |
+ /* CLK_MUX_STAT1 */ | |
+ #define S5P_CLKMUX_STAT1_G3D (1 << 3) | |
+ #define S5P_CLKMUX_STAT1_MFC (1 << 7) | |
+ #define S5P_CLKMUX_STAT1_G2D (1 << 27) | |
+ | |
/* Registers related to power management */ | |
#define S5P_PWR_CFG S5P_CLKREG(0xC000) | |
#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004) | |
! #define S5P_WAKEUP_MASK S5P_CLKREG(0xC008) | |
#define S5P_PWR_MODE S5P_CLKREG(0xC00C) | |
#define S5P_NORMAL_CFG S5P_CLKREG(0xC010) | |
#define S5P_IDLE_CFG S5P_CLKREG(0xC020) | |
*************** | |
*** 109,119 **** | |
--- 564,581 ---- | |
#define S5P_WAKEUP_STAT S5P_CLKREG(0xC200) | |
#define S5P_BLK_PWR_STAT S5P_CLKREG(0xC204) | |
+ #define S5P_ABB_VALUE S5P_CLKREG(0xC300) | |
#define S5P_OTHERS S5P_CLKREG(0xE000) | |
#define S5P_OM_STAT S5P_CLKREG(0xE100) | |
+ #define S5P_MIE_CONTROL S5P_CLKREG(0xE800) | |
+ #define S5P_HDMI_CONTROL S5P_CLKREG(0xE804) | |
#define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C) | |
+ #define S5P_HDMI_PHY_CONTROL S5P_CLKREG(0xE804) | |
#define S5P_DAC_CONTROL S5P_CLKREG(0xE810) | |
+ #define S5P_MIPI_PHY_CONTROL S5P_CLKREG(0xE814) | |
+ #define S5P_ADC_CONTROL S5P_CLKREG(0xE818) | |
+ #define S5P_PSHOLD_CONTROL S5P_CLKREG(0xE81C) | |
#define S5P_INFORM0 S5P_CLKREG(0xF000) | |
#define S5P_INFORM1 S5P_CLKREG(0xF004) | |
*************** | |
*** 131,136 **** | |
--- 593,600 ---- | |
#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) | |
#define S5P_MIPI_CONTROL S5P_CLKREG(0xE814) | |
+ #define S5P_ARM_MCS S5P_CLKREG(0x6100) | |
+ | |
#define S5P_IDLE_CFG_TL_MASK (3 << 30) | |
#define S5P_IDLE_CFG_TM_MASK (3 << 28) | |
#define S5P_IDLE_CFG_TL_ON (2 << 30) | |
*************** | |
*** 157,162 **** | |
--- 621,630 ---- | |
#define S5P_SLEEP_CFG_USBOSC_EN (1 << 1) | |
/* OTHERS Resgister */ | |
+ #define S5P_OTHERS_RET_IO (1 << 31) | |
+ #define S5P_OTHERS_RET_CF (1 << 30) | |
+ #define S5P_OTHERS_RET_MMC (1 << 29) | |
+ #define S5P_OTHERS_RET_UART (1 << 28) | |
#define S5P_OTHERS_USB_SIG_MASK (1 << 16) | |
#define S5P_OTHERS_MIPI_DPHY_EN (1 << 28) | |
diff -crB 2/arch/arm/mach-s5pv210/include/mach/regs-gpio.h 1/arch/arm/mach-s5pv210/include/mach/regs-gpio.h | |
*** 2/arch/arm/mach-s5pv210/include/mach/regs-gpio.h 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/mach-s5pv210/include/mach/regs-gpio.h 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 15,25 **** | |
#include <mach/map.h> | |
#define S5PV210_EINT30CON (S5P_VA_GPIO + 0xE00) | |
#define S5P_EINT_CON(x) (S5PV210_EINT30CON + ((x) * 0x4)) | |
#define S5PV210_EINT30FLTCON0 (S5P_VA_GPIO + 0xE80) | |
! #define S5P_EINT_FLTCON(x) (S5PV210_EINT30FLTCON0 + ((x) * 0x4)) | |
#define S5PV210_EINT30MASK (S5P_VA_GPIO + 0xF00) | |
#define S5P_EINT_MASK(x) (S5PV210_EINT30MASK + ((x) * 0x4)) | |
--- 15,245 ---- | |
#include <mach/map.h> | |
+ | |
+ /* Base addresses for each of the banks */ | |
+ | |
+ #define S5PV210_GPA0_BASE (S5P_VA_GPIO + 0x000) | |
+ #define S5PV210_GPA1_BASE (S5P_VA_GPIO + 0x020) | |
+ #define S5PV210_GPB_BASE (S5P_VA_GPIO + 0x040) | |
+ #define S5PV210_GPC0_BASE (S5P_VA_GPIO + 0x060) | |
+ #define S5PV210_GPC1_BASE (S5P_VA_GPIO + 0x080) | |
+ #define S5PV210_GPD0_BASE (S5P_VA_GPIO + 0x0A0) | |
+ #define S5PV210_GPD1_BASE (S5P_VA_GPIO + 0x0C0) | |
+ #define S5PV210_GPE0_BASE (S5P_VA_GPIO + 0x0E0) | |
+ #define S5PV210_GPE1_BASE (S5P_VA_GPIO + 0x100) | |
+ #define S5PV210_GPF0_BASE (S5P_VA_GPIO + 0x120) | |
+ #define S5PV210_GPF1_BASE (S5P_VA_GPIO + 0x140) | |
+ #define S5PV210_GPF2_BASE (S5P_VA_GPIO + 0x160) | |
+ #define S5PV210_GPF3_BASE (S5P_VA_GPIO + 0x180) | |
+ #define S5PV210_GPG0_BASE (S5P_VA_GPIO + 0x1A0) | |
+ #define S5PV210_GPG1_BASE (S5P_VA_GPIO + 0x1C0) | |
+ #define S5PV210_GPG2_BASE (S5P_VA_GPIO + 0x1E0) | |
+ #define S5PV210_GPG3_BASE (S5P_VA_GPIO + 0x200) | |
+ #define S5PV210_GPH0_BASE (S5P_VA_GPIO + 0xC00) | |
+ #define S5PV210_GPH1_BASE (S5P_VA_GPIO + 0xC20) | |
+ #define S5PV210_GPH2_BASE (S5P_VA_GPIO + 0xC40) | |
+ #define S5PV210_GPH3_BASE (S5P_VA_GPIO + 0xC60) | |
+ #define S5PV210_GPI_BASE (S5P_VA_GPIO + 0x220) | |
+ #define S5PV210_GPJ0_BASE (S5P_VA_GPIO + 0x240) | |
+ #define S5PV210_GPJ1_BASE (S5P_VA_GPIO + 0x260) | |
+ #define S5PV210_GPJ2_BASE (S5P_VA_GPIO + 0x280) | |
+ #define S5PV210_GPJ3_BASE (S5P_VA_GPIO + 0x2A0) | |
+ #define S5PV210_GPJ4_BASE (S5P_VA_GPIO + 0x2C0) | |
+ #define S5PV210_MP01_BASE (S5P_VA_GPIO + 0x2E0) | |
+ #define S5PV210_MP02_BASE (S5P_VA_GPIO + 0x300) | |
+ #define S5PV210_MP03_BASE (S5P_VA_GPIO + 0x320) | |
+ #define S5PV210_MP04_BASE (S5P_VA_GPIO + 0x340) | |
+ #define S5PV210_MP05_BASE (S5P_VA_GPIO + 0x360) | |
+ #define S5PV210_MP06_BASE (S5P_VA_GPIO + 0x380) | |
+ #define S5PV210_MP07_BASE (S5P_VA_GPIO + 0x3A0) | |
+ #define S5PV210_MP10_BASE (S5P_VA_GPIO + 0x3C0) | |
+ #define S5PV210_MP11_BASE (S5P_VA_GPIO + 0x3E0) | |
+ #define S5PV210_MP12_BASE (S5P_VA_GPIO + 0x400) | |
+ #define S5PV210_MP13_BASE (S5P_VA_GPIO + 0x420) | |
+ #define S5PV210_MP14_BASE (S5P_VA_GPIO + 0x440) | |
+ #define S5PV210_MP15_BASE (S5P_VA_GPIO + 0x460) | |
+ #define S5PV210_MP16_BASE (S5P_VA_GPIO + 0x480) | |
+ #define S5PV210_MP17_BASE (S5P_VA_GPIO + 0x4A0) | |
+ #define S5PV210_MP18_BASE (S5P_VA_GPIO + 0x4C0) | |
+ #define S5PV210_MP20_BASE (S5P_VA_GPIO + 0x4E0) | |
+ #define S5PV210_MP21_BASE (S5P_VA_GPIO + 0x500) | |
+ #define S5PV210_MP22_BASE (S5P_VA_GPIO + 0x520) | |
+ #define S5PV210_MP23_BASE (S5P_VA_GPIO + 0x540) | |
+ #define S5PV210_MP24_BASE (S5P_VA_GPIO + 0x560) | |
+ #define S5PV210_MP25_BASE (S5P_VA_GPIO + 0x580) | |
+ #define S5PV210_MP26_BASE (S5P_VA_GPIO + 0x5A0) | |
+ #define S5PV210_MP27_BASE (S5P_VA_GPIO + 0x5C0) | |
+ #define S5PV210_MP28_BASE (S5P_VA_GPIO + 0x5E0) | |
+ #define S5PV210_ETC0_BASE (S5P_VA_GPIO + 0x600) | |
+ #define S5PV210_ETC1_BASE (S5P_VA_GPIO + 0x620) | |
+ #define S5PV210_ETC2_BASE (S5P_VA_GPIO + 0x640) | |
+ #define S5PV210_ETC4_BASE (S5P_VA_GPIO + 0x660) | |
+ | |
+ #define S5PV210_GPA0_INT_CON (S5P_VA_GPIO + 0x700) | |
+ #define S5PV210_GPA0_INT_FLTCON0 (S5P_VA_GPIO + 0x800) | |
+ #define S5PV210_GPA0_INT_FLTCON1 (S5P_VA_GPIO + 0x804) | |
+ #define S5PV210_GPA0_INT_MASK (S5P_VA_GPIO + 0x900) | |
+ #define S5PV210_GPA0_INT_PEND (S5P_VA_GPIO + 0xA00) | |
+ #define S5PV210_GPA0_INT_FIXPRI (S5P_VA_GPIO + 0xB14) | |
+ | |
+ #define S5PV210_GPA1_INT_CON (S5P_VA_GPIO + 0x704) | |
+ #define S5PV210_GPA1_INT_FLTCON0 (S5P_VA_GPIO + 0x808) | |
+ #define S5PV210_GPA1_INT_FLTCON1 (S5P_VA_GPIO + 0x80C) | |
+ #define S5PV210_GPA1_INT_MASK (S5P_VA_GPIO + 0x904) | |
+ #define S5PV210_GPA1_INT_PEND (S5P_VA_GPIO + 0xA04) | |
+ #define S5PV210_GPA1_INT_FIXPRI (S5P_VA_GPIO + 0xB18) | |
+ | |
+ #define S5PV210_GPB_INT_CON (S5P_VA_GPIO + 0x708) | |
+ #define S5PV210_GPB_INT_FLTCON0 (S5P_VA_GPIO + 0x810) | |
+ #define S5PV210_GPB_INT_FLTCON1 (S5P_VA_GPIO + 0x814) | |
+ #define S5PV210_GPB_INT_MASK (S5P_VA_GPIO + 0x908) | |
+ #define S5PV210_GPB_INT_PEND (S5P_VA_GPIO + 0xA08) | |
+ #define S5PV210_GPB_INT_FIXPRI (S5P_VA_GPIO + 0xB1C) | |
+ | |
+ #define S5PV210_GPC0_INT_CON (S5P_VA_GPIO + 0x70C) | |
+ #define S5PV210_GPC0_INT_FLTCON0 (S5P_VA_GPIO + 0x818) | |
+ #define S5PV210_GPC0_INT_FLTCON1 (S5P_VA_GPIO + 0x81C) | |
+ #define S5PV210_GPC0_INT_MASK (S5P_VA_GPIO + 0x90C) | |
+ #define S5PV210_GPC0_INT_PEND (S5P_VA_GPIO + 0xA0C) | |
+ #define S5PV210_GPC0_INT_FIXPRI (S5P_VA_GPIO + 0xB20) | |
+ | |
+ #define S5PV210_GPC1_INT_CON (S5P_VA_GPIO + 0x710) | |
+ #define S5PV210_GPC1_INT_FLTCON0 (S5P_VA_GPIO + 0x820) | |
+ #define S5PV210_GPC1_INT_FLTCON1 (S5P_VA_GPIO + 0x824) | |
+ #define S5PV210_GPC1_INT_MASK (S5P_VA_GPIO + 0x910) | |
+ #define S5PV210_GPC1_INT_PEND (S5P_VA_GPIO + 0xA10) | |
+ #define S5PV210_GPC1_INT_FIXPRI (S5P_VA_GPIO + 0xB24) | |
+ | |
+ #define S5PV210_GPD0_INT_CON (S5P_VA_GPIO + 0x714) | |
+ #define S5PV210_GPD0_INT_FLTCON0 (S5P_VA_GPIO + 0x828) | |
+ #define S5PV210_GPD0_INT_FLTCON1 (S5P_VA_GPIO + 0x82C) | |
+ #define S5PV210_GPD0_INT_MASK (S5P_VA_GPIO + 0x914) | |
+ #define S5PV210_GPD0_INT_PEND (S5P_VA_GPIO + 0xA14) | |
+ #define S5PV210_GPD0_INT_FIXPRI (S5P_VA_GPIO + 0xB28) | |
+ | |
+ #define S5PV210_GPD1_INT_CON (S5P_VA_GPIO + 0x718) | |
+ #define S5PV210_GPD1_INT_FLTCON0 (S5P_VA_GPIO + 0x830) | |
+ #define S5PV210_GPD1_INT_FLTCON1 (S5P_VA_GPIO + 0x834) | |
+ #define S5PV210_GPD1_INT_MASK (S5P_VA_GPIO + 0x918) | |
+ #define S5PV210_GPD1_INT_PEND (S5P_VA_GPIO + 0xA18) | |
+ #define S5PV210_GPD1_INT_FIXPRI (S5P_VA_GPIO + 0xB2C) | |
+ | |
+ #define S5PV210_GPE0_INT_CON (S5P_VA_GPIO + 0x71C) | |
+ #define S5PV210_GPE0_INT_FLTCON0 (S5P_VA_GPIO + 0x838) | |
+ #define S5PV210_GPE0_INT_FLTCON1 (S5P_VA_GPIO + 0x83C) | |
+ #define S5PV210_GPE0_INT_MASK (S5P_VA_GPIO + 0x91C) | |
+ #define S5PV210_GPE0_INT_PEND (S5P_VA_GPIO + 0xA1C) | |
+ #define S5PV210_GPE0_INT_FIXPRI (S5P_VA_GPIO + 0xB30) | |
+ | |
+ #define S5PV210_GPE1_INT_CON (S5P_VA_GPIO + 0x720) | |
+ #define S5PV210_GPE1_INT_FLTCON0 (S5P_VA_GPIO + 0x840) | |
+ #define S5PV210_GPE1_INT_FLTCON1 (S5P_VA_GPIO + 0x844) | |
+ #define S5PV210_GPE1_INT_MASK (S5P_VA_GPIO + 0x920) | |
+ #define S5PV210_GPE1_INT_PEND (S5P_VA_GPIO + 0xA20) | |
+ #define S5PV210_GPE1_INT_FIXPRI (S5P_VA_GPIO + 0xB34) | |
+ | |
+ #define S5PV210_GPF0_INT_CON (S5P_VA_GPIO + 0x724) | |
+ #define S5PV210_GPF0_INT_FLTCON0 (S5P_VA_GPIO + 0x848) | |
+ #define S5PV210_GPF0_INT_FLTCON1 (S5P_VA_GPIO + 0x84C) | |
+ #define S5PV210_GPF0_INT_MASK (S5P_VA_GPIO + 0x924) | |
+ #define S5PV210_GPF0_INT_PEND (S5P_VA_GPIO + 0xA24) | |
+ #define S5PV210_GPF0_INT_FIXPRI (S5P_VA_GPIO + 0xB38) | |
+ | |
+ #define S5PV210_GPF1_INT_CON (S5P_VA_GPIO + 0x728) | |
+ #define S5PV210_GPF1_INT_FLTCON0 (S5P_VA_GPIO + 0x850) | |
+ #define S5PV210_GPF1_INT_FLTCON1 (S5P_VA_GPIO + 0x854) | |
+ #define S5PV210_GPF1_INT_MASK (S5P_VA_GPIO + 0x928) | |
+ #define S5PV210_GPF1_INT_PEND (S5P_VA_GPIO + 0xA28) | |
+ #define S5PV210_GPF1_INT_FIXPRI (S5P_VA_GPIO + 0xB3C) | |
+ | |
+ #define S5PV210_GPF2_INT_CON (S5P_VA_GPIO + 0x72C) | |
+ #define S5PV210_GPF2_INT_FLTCON0 (S5P_VA_GPIO + 0x858) | |
+ #define S5PV210_GPF2_INT_FLTCON1 (S5P_VA_GPIO + 0x85C) | |
+ #define S5PV210_GPF2_INT_MASK (S5P_VA_GPIO + 0x92C) | |
+ #define S5PV210_GPF2_INT_PEND (S5P_VA_GPIO + 0xA2C) | |
+ #define S5PV210_GPF2_INT_FIXPRI (S5P_VA_GPIO + 0xB40) | |
+ | |
+ #define S5PV210_GPF3_INT_CON (S5P_VA_GPIO + 0x730) | |
+ #define S5PV210_GPF3_INT_FLTCON0 (S5P_VA_GPIO + 0x860) | |
+ #define S5PV210_GPF3_INT_FLTCON1 (S5P_VA_GPIO + 0x864) | |
+ #define S5PV210_GPF3_INT_MASK (S5P_VA_GPIO + 0x930) | |
+ #define S5PV210_GPF3_INT_PEND (S5P_VA_GPIO + 0xA30) | |
+ #define S5PV210_GPF3_INT_FIXPRI (S5P_VA_GPIO + 0xB44) | |
+ | |
+ #define S5PV210_GPG0_INT_CON (S5P_VA_GPIO + 0x734) | |
+ #define S5PV210_GPG0_INT_FLTCON0 (S5P_VA_GPIO + 0x868) | |
+ #define S5PV210_GPG0_INT_FLTCON1 (S5P_VA_GPIO + 0x86C) | |
+ #define S5PV210_GPG0_INT_MASK (S5P_VA_GPIO + 0x934) | |
+ #define S5PV210_GPG0_INT_PEND (S5P_VA_GPIO + 0xA34) | |
+ #define S5PV210_GPG0_INT_FIXPRI (S5P_VA_GPIO + 0xB48) | |
+ | |
+ #define S5PV210_GPG1_INT_CON (S5P_VA_GPIO + 0x738) | |
+ #define S5PV210_GPG1_INT_FLTCON0 (S5P_VA_GPIO + 0x870) | |
+ #define S5PV210_GPG1_INT_FLTCON1 (S5P_VA_GPIO + 0x874) | |
+ #define S5PV210_GPG1_INT_MASK (S5P_VA_GPIO + 0x938) | |
+ #define S5PV210_GPG1_INT_PEND (S5P_VA_GPIO + 0xA38) | |
+ #define S5PV210_GPG1_INT_FIXPRI (S5P_VA_GPIO + 0xB4C) | |
+ | |
+ #define S5PV210_GPG2_INT_CON (S5P_VA_GPIO + 0x73C) | |
+ #define S5PV210_GPG2_INT_FLTCON0 (S5P_VA_GPIO + 0x878) | |
+ #define S5PV210_GPG2_INT_FLTCON1 (S5P_VA_GPIO + 0x87C) | |
+ #define S5PV210_GPG2_INT_MASK (S5P_VA_GPIO + 0x93C) | |
+ #define S5PV210_GPG2_INT_PEND (S5P_VA_GPIO + 0xA3C) | |
+ #define S5PV210_GPG2_INT_FIXPRI (S5P_VA_GPIO + 0xB50) | |
+ | |
+ #define S5PV210_GPG3_INT_CON (S5P_VA_GPIO + 0x740) | |
+ #define S5PV210_GPG3_INT_FLTCON0 (S5P_VA_GPIO + 0x880) | |
+ #define S5PV210_GPG3_INT_FLTCON1 (S5P_VA_GPIO + 0x884) | |
+ #define S5PV210_GPG3_INT_MASK (S5P_VA_GPIO + 0x940) | |
+ #define S5PV210_GPG3_INT_PEND (S5P_VA_GPIO + 0xA40) | |
+ #define S5PV210_GPG3_INT_FIXPRI (S5P_VA_GPIO + 0xB54) | |
+ | |
+ #define S5PV210_GPJ0_INT_CON (S5P_VA_GPIO + 0x744) | |
+ #define S5PV210_GPJ0_INT_FLTCON0 (S5P_VA_GPIO + 0x888) | |
+ #define S5PV210_GPJ0_INT_FLTCON1 (S5P_VA_GPIO + 0x88C) | |
+ #define S5PV210_GPJ0_INT_MASK (S5P_VA_GPIO + 0x944) | |
+ #define S5PV210_GPJ0_INT_PEND (S5P_VA_GPIO + 0xA44) | |
+ #define S5PV210_GPJ0_INT_FIXPRI (S5P_VA_GPIO + 0xB58) | |
+ | |
+ #define S5PV210_GPJ1_INT_CON (S5P_VA_GPIO + 0x748) | |
+ #define S5PV210_GPJ1_INT_FLTCON0 (S5P_VA_GPIO + 0x890) | |
+ #define S5PV210_GPJ1_INT_FLTCON1 (S5P_VA_GPIO + 0x894) | |
+ #define S5PV210_GPJ1_INT_MASK (S5P_VA_GPIO + 0x948) | |
+ #define S5PV210_GPJ1_INT_PEND (S5P_VA_GPIO + 0xA48) | |
+ #define S5PV210_GPJ1_INT_FIXPRI (S5P_VA_GPIO + 0xB5C) | |
+ | |
+ #define S5PV210_GPJ2_INT_CON (S5P_VA_GPIO + 0x74C) | |
+ #define S5PV210_GPJ2_INT_FLTCON0 (S5P_VA_GPIO + 0x898) | |
+ #define S5PV210_GPJ2_INT_FLTCON1 (S5P_VA_GPIO + 0x89C) | |
+ #define S5PV210_GPJ2_INT_MASK (S5P_VA_GPIO + 0x94C) | |
+ #define S5PV210_GPJ2_INT_PEND (S5P_VA_GPIO + 0xA4C) | |
+ #define S5PV210_GPJ2_INT_FIXPRI (S5P_VA_GPIO + 0xB60) | |
+ | |
+ #define S5PV210_GPJ3_INT_CON (S5P_VA_GPIO + 0x750) | |
+ #define S5PV210_GPJ3_INT_FLTCON0 (S5P_VA_GPIO + 0x8A0) | |
+ #define S5PV210_GPJ3_INT_FLTCON1 (S5P_VA_GPIO + 0x8A4) | |
+ #define S5PV210_GPJ3_INT_MASK (S5P_VA_GPIO + 0x950) | |
+ #define S5PV210_GPJ3_INT_PEND (S5P_VA_GPIO + 0xA50) | |
+ #define S5PV210_GPJ3_INT_FIXPRI (S5P_VA_GPIO + 0xB64) | |
+ | |
+ #define S5PV210_GPJ4_INT_CON (S5P_VA_GPIO + 0x754) | |
+ #define S5PV210_GPJ4_INT_FLTCON0 (S5P_VA_GPIO + 0x8A8) | |
+ #define S5PV210_GPJ4_INT_FLTCON1 (S5P_VA_GPIO + 0x8AC) | |
+ #define S5PV210_GPJ4_INT_MASK (S5P_VA_GPIO + 0x954) | |
+ #define S5PV210_GPJ4_INT_PEND (S5P_VA_GPIO + 0xA54) | |
+ #define S5PV210_GPJ4_INT_FIXPRI (S5P_VA_GPIO + 0xB68) | |
+ | |
+ #define S5PV210_EXT_INT_GRPPRI (S5P_VA_GPIO + 0xB00) | |
+ #define S5PV210_EXT_INT_PRIO (S5P_VA_GPIO + 0xB04) | |
+ #define S5PV210_EXT_INT_SVC (S5P_VA_GPIO + 0xB08) | |
+ #define S5PV210_EXT_INT_SVC_PND (S5P_VA_GPIO + 0xB0C) | |
+ #define S5PV210_EXT_INT_GRPFIXPRI (S5P_VA_GPIO + 0xB10) | |
+ | |
#define S5PV210_EINT30CON (S5P_VA_GPIO + 0xE00) | |
#define S5P_EINT_CON(x) (S5PV210_EINT30CON + ((x) * 0x4)) | |
#define S5PV210_EINT30FLTCON0 (S5P_VA_GPIO + 0xE80) | |
! #define S5P_EINT_FLTCON(x,y) (S5PV210_EINT30FLTCON0 + ((x) * 0x8) + ((y) * 0x4)) | |
#define S5PV210_EINT30MASK (S5P_VA_GPIO + 0xF00) | |
#define S5P_EINT_MASK(x) (S5PV210_EINT30MASK + ((x) * 0x4)) | |
*************** | |
*** 29,36 **** | |
--- 249,264 ---- | |
#define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3) | |
+ #define eint_offset(irq) ((irq) < IRQ_EINT16_31 ? ((irq)-IRQ_EINT0)\ | |
+ : (irq-S5P_IRQ_EINT_BASE)) | |
+ | |
#define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7)) | |
+ #define eint_conf_reg(irq) ((eint_offset(irq)) >> 3) | |
+ #define eint_filt_reg(irq) ((eint_offset(irq)) >> 2) | |
+ #define eint_mask_reg(irq) ((eint_offset(irq)) >> 3) | |
+ #define eint_pend_reg(irq) ((eint_offset(irq)) >> 3) | |
+ | |
/* values for S5P_EXTINT0 */ | |
#define S5P_EXTINT_LOWLEV (0x00) | |
#define S5P_EXTINT_HILEV (0x01) | |
diff -crB 2/arch/arm/mach-s5pv210/include/mach/regs-irq.h 1/arch/arm/mach-s5pv210/include/mach/regs-irq.h | |
*** 2/arch/arm/mach-s5pv210/include/mach/regs-irq.h 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/mach-s5pv210/include/mach/regs-irq.h 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 16,19 **** | |
--- 16,25 ---- | |
#include <asm/hardware/vic.h> | |
#include <mach/map.h> | |
+ /* interrupt controller */ | |
+ #define S5P_VIC0REG(x) ((x) + S5P_VA_VIC0) | |
+ #define S5P_VIC1REG(x) ((x) + S5P_VA_VIC1) | |
+ #define S5P_VIC2REG(x) ((x) + S5P_VA_VIC2) | |
+ #define S5P_VIC3REG(x) ((x) + S5P_VA_VIC3) | |
+ | |
#endif /* __ASM_ARCH_REGS_IRQ_H */ | |
Only in 1/arch/arm/mach-s5pv210/include/mach: regs-mem.h | |
Only in 1/arch/arm/mach-s5pv210/include/mach: sec_jack.h | |
Only in 1/arch/arm/mach-s5pv210/include/mach: sec_switch.h | |
diff -crB 2/arch/arm/mach-s5pv210/include/mach/system.h 1/arch/arm/mach-s5pv210/include/mach/system.h | |
*** 2/arch/arm/mach-s5pv210/include/mach/system.h 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/mach-s5pv210/include/mach/system.h 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 13,18 **** | |
--- 13,21 ---- | |
#ifndef __ASM_ARCH_SYSTEM_H | |
#define __ASM_ARCH_SYSTEM_H __FILE__ | |
+ #include <asm/proc-fns.h> | |
+ #include <plat/watchdog-reset.h> | |
+ | |
static void arch_idle(void) | |
{ | |
/* nothing here yet */ | |
*************** | |
*** 20,26 **** | |
static void arch_reset(char mode, const char *cmd) | |
{ | |
! /* nothing here yet */ | |
} | |
#endif /* __ASM_ARCH_SYSTEM_H */ | |
--- 23,33 ---- | |
static void arch_reset(char mode, const char *cmd) | |
{ | |
! if (mode != 's') | |
! arch_wdt_reset(); | |
! | |
! /* if all else fails, or mode was for soft, jump to 0 */ | |
! cpu_reset(0); | |
} | |
#endif /* __ASM_ARCH_SYSTEM_H */ | |
diff -crB 2/arch/arm/mach-s5pv210/include/mach/tick.h 1/arch/arm/mach-s5pv210/include/mach/tick.h | |
*** 2/arch/arm/mach-s5pv210/include/mach/tick.h 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/mach-s5pv210/include/mach/tick.h 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 21,26 **** | |
--- 21,32 ---- | |
return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0))); | |
} | |
+ static inline u32 s5p_ostimer_pending(void) | |
+ { | |
+ u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS); | |
+ return pend & (1 << (IRQ_SYSTIMER - S5P_IRQ_VIC0(0))); | |
+ } | |
+ | |
#define TICK_MAX (0xffffffff) | |
#endif /* __ASM_ARCH_TICK_H */ | |
diff -crB 2/arch/arm/mach-s5pv210/include/mach/vmalloc.h 1/arch/arm/mach-s5pv210/include/mach/vmalloc.h | |
*** 2/arch/arm/mach-s5pv210/include/mach/vmalloc.h 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/mach-s5pv210/include/mach/vmalloc.h 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 17,22 **** | |
#ifndef __ASM_ARCH_VMALLOC_H | |
#define __ASM_ARCH_VMALLOC_H __FILE__ | |
! #define VMALLOC_END (0xE0000000) | |
#endif /* __ASM_ARCH_VMALLOC_H */ | |
--- 17,22 ---- | |
#ifndef __ASM_ARCH_VMALLOC_H | |
#define __ASM_ARCH_VMALLOC_H __FILE__ | |
! #define VMALLOC_END (0xFC000000) | |
#endif /* __ASM_ARCH_VMALLOC_H */ | |
diff -crB 2/arch/arm/mach-s5pv210/init.c 1/arch/arm/mach-s5pv210/init.c | |
*** 2/arch/arm/mach-s5pv210/init.c 2012-09-24 11:44:00.374845348 +0530 | |
--- 1/arch/arm/mach-s5pv210/init.c 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 20,26 **** | |
static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = { | |
[0] = { | |
! .name = "pclk", | |
.divisor = 1, | |
.min_baud = 0, | |
.max_baud = 0, | |
--- 20,26 ---- | |
static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = { | |
[0] = { | |
! .name = "sclk", | |
.divisor = 1, | |
.min_baud = 0, | |
.max_baud = 0, | |
diff -crB 2/arch/arm/mach-s5pv210/Kconfig 1/arch/arm/mach-s5pv210/Kconfig | |
*** 2/arch/arm/mach-s5pv210/Kconfig 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/mach-s5pv210/Kconfig 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 19,29 **** | |
--- 19,33 ---- | |
config S5PV210_SETUP_I2C1 | |
bool | |
+ depends on S3C_DEV_I2C1 | |
+ default y | |
help | |
Common setup code for i2c bus 1. | |
config S5PV210_SETUP_I2C2 | |
bool | |
+ depends on S3C_DEV_I2C2 | |
+ default y | |
help | |
Common setup code for i2c bus 2. | |
*************** | |
*** 43,48 **** | |
--- 47,59 ---- | |
help | |
Common setup code for SDHCI gpio. | |
+ config S5PV210_POWER_DOMAIN | |
+ bool | |
+ depends on REGULATOR | |
+ default y | |
+ help | |
+ Enable S5PV210 power domain support. | |
+ | |
# machine support | |
config MACH_AQUILA | |
*************** | |
*** 62,70 **** | |
Machine support for Samsung GONI board | |
S5PC110(MCP) is one of package option of S5PV210 | |
config S5PC110_DEV_ONENAND | |
bool | |
! help | |
Compile in platform device definition for OneNAND1 controller | |
config MACH_SMDKV210 | |
--- 73,101 ---- | |
Machine support for Samsung GONI board | |
S5PC110(MCP) is one of package option of S5PV210 | |
+ comment "MMC/SD slot setup" | |
+ depends on PLAT_S5P | |
+ | |
+ menu "Use 8-bit bus width" | |
+ config S5PV210_SD_CH0_8BIT | |
+ bool "Channel 0" | |
+ depends on PLAT_S5P | |
+ default n | |
+ help | |
+ IF channel 0 uses 8-bit bus, channel 1 is disabled. | |
+ | |
+ config S5PV210_SD_CH2_8BIT | |
+ bool "Channel 2" | |
+ depends on PLAT_S5P | |
+ default n | |
+ help | |
+ IF channel 2 uses 8-bit bus, channel 3 is disabled. | |
+ endmenu | |
+ | |
config S5PC110_DEV_ONENAND | |
bool | |
! default y if CPU_S5PV210 | |
! help | |
Compile in platform device definition for OneNAND1 controller | |
config MACH_SMDKV210 | |
*************** | |
*** 88,91 **** | |
--- 119,247 ---- | |
Machine support for Samsung SMDKC110 | |
S5PC110(MCP) is one of package option of S5PV210 | |
+ config MACH_HERRING | |
+ bool "Herring" | |
+ select CPU_S5PV210 | |
+ select ARCH_DISCONTIGMEM_ENABLE | |
+ select S3C_DEV_WDT | |
+ select HAVE_S3C2410_WATCHDOG | |
+ select S3C_DEV_I2C1 | |
+ select S3C_DEV_I2C2 | |
+ select HAVE_PWM | |
+ select ARCH_HAS_CPUFREQ | |
+ select S3C_DEV_HSMMC | |
+ select S3C_DEV_HSMMC1 if !S5PV210_SD_CH0_8BIT | |
+ select S3C_DEV_HSMMC2 | |
+ select S3C_DEV_HSMMC3 if !S5PV210_SD_CH2_8BIT | |
+ select S5PV210_SETUP_SDHCI | |
+ select S5PV210_POWER_DOMAIN | |
+ help | |
+ Machine support for Herring | |
+ | |
+ config MACH_P1 | |
+ bool "P1" | |
+ select CPU_S5PV210 | |
+ select ARCH_DISCONTIGMEM_ENABLE | |
+ select S3C_DEV_WDT | |
+ select HAVE_S3C2410_WATCHDOG | |
+ select S3C_DEV_I2C1 | |
+ select S3C_DEV_I2C2 | |
+ select HAVE_PWM | |
+ select ARCH_HAS_CPUFREQ | |
+ select S3C_DEV_HSMMC | |
+ select S3C_DEV_HSMMC1 if !S5PV210_SD_CH0_8BIT | |
+ select S3C_DEV_HSMMC2 | |
+ select S3C_DEV_HSMMC3 if !S5PV210_SD_CH2_8BIT | |
+ select S5PV210_SETUP_SDHCI | |
+ select S5PV210_POWER_DOMAIN | |
+ help | |
+ Machine support for P1 | |
+ | |
+ config S5PV210_SETUP_FB | |
+ bool | |
+ depends on FB_S3C | |
+ default y | |
+ help | |
+ Common setup code for FIMD controller. | |
+ | |
+ config S5P_ADC | |
+ bool "S5PXXXX ADC driver" | |
+ depends on PLAT_S5P | |
+ default y | |
+ help | |
+ ADC ( A/D Conversion ) driver for Samsung S5PXXXX | |
+ | |
+ config S5PV210_SETUP_FIMC0 | |
+ bool | |
+ depends on VIDEO_FIMC | |
+ default y | |
+ help | |
+ Common setup code for FIMC controller 0. | |
+ | |
+ config S5PV210_SETUP_FIMC1 | |
+ bool | |
+ depends on VIDEO_FIMC | |
+ default y | |
+ help | |
+ Common setup code for FIMC controller 1. | |
+ | |
+ config S5PV210_SETUP_FIMC2 | |
+ bool | |
+ depends on VIDEO_FIMC | |
+ default y | |
+ help | |
+ Common setup code for FIMC controller 2. | |
+ | |
+ config S5PV210_SETUP_CSIS | |
+ bool | |
+ depends on VIDEO_FIMC | |
+ default y | |
+ help | |
+ Common setup code for MIPI-CSIS | |
+ | |
+ config S5PV210_SCLKFIMD_USE_VPLL | |
+ bool "Use VPLL for FIMD sclk source" | |
+ depends on FB_S3C | |
+ default n | |
+ help | |
+ Sclk fimd source use vpll, otherwise use mpll. | |
+ | |
+ choice | |
+ prompt "Target Pixel clock setting" | |
+ depends on FB_S3C | |
+ default TARGET_PCLK_54 | |
+ | |
+ config TARGET_PCLK_44_46 | |
+ bool "44.46Mhz" | |
+ help | |
+ Support 44.46Mhz | |
+ | |
+ config TARGET_PCLK_47_6 | |
+ bool "47.6Mhz" | |
+ help | |
+ Support 47.6Mhz | |
+ | |
+ config TARGET_PCLK_54 | |
+ bool "54Mhz" | |
+ help | |
+ Support 54Mhz | |
+ | |
+ endchoice | |
+ | |
+ config WIFI_CONTROL_FUNC | |
+ bool "Enable WiFi control function abstraction" | |
+ help | |
+ Enables Power/Reset/Carddetect function abstraction | |
+ | |
+ config DVFS_LIMIT | |
+ bool "DVFS limit" | |
+ depends on CPU_FREQ | |
+ default n | |
+ | |
endif | |
+ | |
+ config SEC_HEADSET | |
+ tristate "SEC 2 Wire detection driver" | |
+ help | |
+ Provides support for detecting SEC 2 wire devices, such as wired | |
+ headset. | |
Only in 1/arch/arm/mach-s5pv210: mach-crespo.c | |
Only in 1/arch/arm/mach-s5pv210: mach-p1.c | |
diff -crB 2/arch/arm/mach-s5pv210/mach-smdkc110.c 1/arch/arm/mach-s5pv210/mach-smdkc110.c | |
*** 2/arch/arm/mach-s5pv210/mach-smdkc110.c 2012-09-24 11:44:00.374845348 +0530 | |
--- 1/arch/arm/mach-s5pv210/mach-smdkc110.c 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 25,30 **** | |
--- 25,31 ---- | |
#include <plat/s5pv210.h> | |
#include <plat/devs.h> | |
#include <plat/cpu.h> | |
+ #include <plat/pm.h> | |
/* Following are default values for UCON, ULCON and UFCON UART registers */ | |
#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | |
*************** | |
*** 86,91 **** | |
--- 87,93 ---- | |
static void __init smdkc110_machine_init(void) | |
{ | |
+ s3c_pm_init(); | |
platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices)); | |
} | |
*************** | |
*** 97,101 **** | |
--- 99,107 ---- | |
.init_irq = s5pv210_init_irq, | |
.map_io = smdkc110_map_io, | |
.init_machine = smdkc110_machine_init, | |
+ #if defined(CONFIG_S5P_HIGH_RES_TIMERS) | |
+ .timer = &s5p_systimer, | |
+ #else | |
.timer = &s3c24xx_timer, | |
+ #endif | |
MACHINE_END | |
diff -crB 2/arch/arm/mach-s5pv210/mach-smdkv210.c 1/arch/arm/mach-s5pv210/mach-smdkv210.c | |
*** 2/arch/arm/mach-s5pv210/mach-smdkv210.c 2012-09-24 11:44:00.374845348 +0530 | |
--- 1/arch/arm/mach-s5pv210/mach-smdkv210.c 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 27,32 **** | |
--- 27,33 ---- | |
#include <plat/cpu.h> | |
#include <plat/adc.h> | |
#include <plat/ts.h> | |
+ #include <plat/pm.h> | |
/* Following are default values for UCON, ULCON and UFCON UART registers */ | |
#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | |
*************** | |
*** 96,101 **** | |
--- 97,103 ---- | |
static void __init smdkv210_machine_init(void) | |
{ | |
+ s3c_pm_init(); | |
s3c24xx_ts_set_platdata(&s3c_ts_platform); | |
platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); | |
} | |
*************** | |
*** 108,112 **** | |
--- 110,118 ---- | |
.init_irq = s5pv210_init_irq, | |
.map_io = smdkv210_map_io, | |
.init_machine = smdkv210_machine_init, | |
+ #ifdef CONFIG_S5P_HIGH_RES_TIMERS | |
+ .timer = &s5p_systimer, | |
+ #else | |
.timer = &s3c24xx_timer, | |
+ #endif | |
MACHINE_END | |
diff -crB 2/arch/arm/mach-s5pv210/Makefile 1/arch/arm/mach-s5pv210/Makefile | |
*** 2/arch/arm/mach-s5pv210/Makefile 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/mach-s5pv210/Makefile 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 1,7 **** | |
# arch/arm/mach-s5pv210/Makefile | |
# | |
# Copyright (c) 2010 Samsung Electronics Co., Ltd. | |
! # http://www.samsung.com/ | |
# | |
# Licensed under GPLv2 | |
--- 1,7 ---- | |
# arch/arm/mach-s5pv210/Makefile | |
# | |
# Copyright (c) 2010 Samsung Electronics Co., Ltd. | |
! # http://www.samsung.com/ | |
# | |
# Licensed under GPLv2 | |
*************** | |
*** 13,19 **** | |
# Core support for S5PV210 system | |
obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o dma.o gpiolib.o | |
! obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o | |
# machine support | |
--- 13,22 ---- | |
# Core support for S5PV210 system | |
obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o dma.o gpiolib.o | |
! obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o setup-i2c1.o setup-i2c2.o | |
! obj-$(CONFIG_PM) += pm.o sleep.o | |
! | |
! obj-$(CONFIG_S5PV210_POWER_DOMAIN) += power-domain.o | |
# machine support | |
*************** | |
*** 21,35 **** | |
obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o | |
obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o | |
obj-$(CONFIG_MACH_GONI) += mach-goni.o | |
# device support | |
obj-y += dev-audio.o | |
obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | |
obj-$(CONFIG_S5PC110_DEV_ONENAND) += dev-onenand.o | |
! obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o | |
! obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o | |
! obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o | |
! obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o | |
! obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | |
--- 24,63 ---- | |
obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o | |
obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o | |
obj-$(CONFIG_MACH_GONI) += mach-goni.o | |
+ obj-$(CONFIG_MACH_HERRING) += mach-crespo.o crespo-rfkill.o | |
+ obj-$(CONFIG_MACH_HERRING) += herring-vibrator.o | |
+ obj-$(CONFIG_MACH_HERRING) += herring-btlpm.o | |
+ obj-$(CONFIG_MACH_HERRING) += herring-watchdog.o | |
+ obj-$(CONFIG_MACH_HERRING) += herring-panel.o | |
+ obj-$(CONFIG_MACH_HERRING) += dev-crespo-phone.o | |
+ | |
+ # P1 | |
+ obj-$(CONFIG_MACH_P1) += mach-p1.o p1-rfkill.o sec_switch.o | |
+ #obj-$(CONFIG_MACH_P1) += herring-btlpm.o | |
+ obj-$(CONFIG_MACH_P1) += herring-watchdog.o | |
+ obj-$(CONFIG_MACH_P1) += herring-panel.o | |
+ obj-$(CONFIG_MACH_P1) += dev-p1-phone.o | |
+ | |
+ obj-$(CONFIG_CPU_FREQ) += cpu-freq.o | |
+ obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o | |
# device support | |
obj-y += dev-audio.o | |
+ obj-y += dev-fiqdbg.o | |
obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | |
obj-$(CONFIG_S5PC110_DEV_ONENAND) += dev-onenand.o | |
! | |
! obj-$(CONFIG_S5P_ADC) += adc.o | |
! | |
! obj-$(CONFIG_S5PV210_SETUP_FB) += setup-fb.o | |
! obj-$(CONFIG_S5PV210_SETUP_FIMC0) += setup-fimc0.o | |
! obj-$(CONFIG_S5PV210_SETUP_FIMC1) += setup-fimc1.o | |
! obj-$(CONFIG_S5PV210_SETUP_FIMC2) += setup-fimc2.o | |
! obj-$(CONFIG_S5PV210_SETUP_CSIS) += setup-csis.o | |
! | |
! | |
! obj-$(CONFIG_CPU_IDLE) += cpuidle.o didle.o | |
! | |
! obj-$(CONFIG_SEC_HEADSET) += sec_jack.o | |
diff -crB 2/arch/arm/mach-s5pv210/Makefile.boot 1/arch/arm/mach-s5pv210/Makefile.boot | |
*** 2/arch/arm/mach-s5pv210/Makefile.boot 2012-09-24 11:44:00.378845273 +0530 | |
--- 1/arch/arm/mach-s5pv210/Makefile.boot 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 1,2 **** | |
! zreladdr-y := 0x20008000 | |
params_phys-y := 0x20000100 | |
--- 1,7 ---- | |
! zreladdr-y := 0x20008000 | |
params_phys-y := 0x20000100 | |
+ | |
+ # override for C110 | |
+ zreladdr-$(CONFIG_ARCH_S5PV210) := 0x30008000 | |
+ params_phys-$(CONFIG_ARCH_S5PV210) := 0x30000100 | |
+ | |
Only in 1/arch/arm/mach-s5pv210: p1-rfkill.c | |
Only in 1/arch/arm/mach-s5pv210: pm.c | |
Only in 1/arch/arm/mach-s5pv210: power-domain.c | |
Only in 1/arch/arm/mach-s5pv210: sec_jack.c | |
Only in 1/arch/arm/mach-s5pv210: sec_switch.c | |
Only in 1/arch/arm/mach-s5pv210: setup-csis.c | |
Only in 1/arch/arm/mach-s5pv210: setup-fb.c | |
Only in 1/arch/arm/mach-s5pv210: setup-fimc0.c | |
Only in 1/arch/arm/mach-s5pv210: setup-fimc1.c | |
Only in 1/arch/arm/mach-s5pv210: setup-fimc2.c | |
diff -crB 2/arch/arm/mach-s5pv210/setup-i2c0.c 1/arch/arm/mach-s5pv210/setup-i2c0.c | |
*** 2/arch/arm/mach-s5pv210/setup-i2c0.c 2012-09-24 11:44:00.374845348 +0530 | |
--- 1/arch/arm/mach-s5pv210/setup-i2c0.c 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 24,30 **** | |
void s3c_i2c0_cfg_gpio(struct platform_device *dev) | |
{ | |
s3c_gpio_cfgpin(S5PV210_GPD1(0), S3C_GPIO_SFN(2)); | |
! s3c_gpio_setpull(S5PV210_GPD1(0), S3C_GPIO_PULL_UP); | |
s3c_gpio_cfgpin(S5PV210_GPD1(1), S3C_GPIO_SFN(2)); | |
! s3c_gpio_setpull(S5PV210_GPD1(1), S3C_GPIO_PULL_UP); | |
} | |
--- 24,30 ---- | |
void s3c_i2c0_cfg_gpio(struct platform_device *dev) | |
{ | |
s3c_gpio_cfgpin(S5PV210_GPD1(0), S3C_GPIO_SFN(2)); | |
! s3c_gpio_setpull(S5PV210_GPD1(0), S3C_GPIO_PULL_NONE); | |
s3c_gpio_cfgpin(S5PV210_GPD1(1), S3C_GPIO_SFN(2)); | |
! s3c_gpio_setpull(S5PV210_GPD1(1), S3C_GPIO_PULL_NONE); | |
} | |
diff -crB 2/arch/arm/mach-s5pv210/setup-i2c1.c 1/arch/arm/mach-s5pv210/setup-i2c1.c | |
*** 2/arch/arm/mach-s5pv210/setup-i2c1.c 2012-09-24 11:44:00.374845348 +0530 | |
--- 1/arch/arm/mach-s5pv210/setup-i2c1.c 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 24,30 **** | |
void s3c_i2c1_cfg_gpio(struct platform_device *dev) | |
{ | |
s3c_gpio_cfgpin(S5PV210_GPD1(2), S3C_GPIO_SFN(2)); | |
! s3c_gpio_setpull(S5PV210_GPD1(2), S3C_GPIO_PULL_UP); | |
s3c_gpio_cfgpin(S5PV210_GPD1(3), S3C_GPIO_SFN(2)); | |
! s3c_gpio_setpull(S5PV210_GPD1(3), S3C_GPIO_PULL_UP); | |
} | |
--- 24,30 ---- | |
void s3c_i2c1_cfg_gpio(struct platform_device *dev) | |
{ | |
s3c_gpio_cfgpin(S5PV210_GPD1(2), S3C_GPIO_SFN(2)); | |
! s3c_gpio_setpull(S5PV210_GPD1(2), S3C_GPIO_PULL_NONE); | |
s3c_gpio_cfgpin(S5PV210_GPD1(3), S3C_GPIO_SFN(2)); | |
! s3c_gpio_setpull(S5PV210_GPD1(3), S3C_GPIO_PULL_NONE); | |
} | |
diff -crB 2/arch/arm/mach-s5pv210/setup-i2c2.c 1/arch/arm/mach-s5pv210/setup-i2c2.c | |
*** 2/arch/arm/mach-s5pv210/setup-i2c2.c 2012-09-24 11:44:00.374845348 +0530 | |
--- 1/arch/arm/mach-s5pv210/setup-i2c2.c 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 24,30 **** | |
void s3c_i2c2_cfg_gpio(struct platform_device *dev) | |
{ | |
s3c_gpio_cfgpin(S5PV210_GPD1(4), S3C_GPIO_SFN(2)); | |
! s3c_gpio_setpull(S5PV210_GPD1(4), S3C_GPIO_PULL_UP); | |
s3c_gpio_cfgpin(S5PV210_GPD1(5), S3C_GPIO_SFN(2)); | |
! s3c_gpio_setpull(S5PV210_GPD1(5), S3C_GPIO_PULL_UP); | |
} | |
--- 24,30 ---- | |
void s3c_i2c2_cfg_gpio(struct platform_device *dev) | |
{ | |
s3c_gpio_cfgpin(S5PV210_GPD1(4), S3C_GPIO_SFN(2)); | |
! s3c_gpio_setpull(S5PV210_GPD1(4), S3C_GPIO_PULL_NONE); | |
s3c_gpio_cfgpin(S5PV210_GPD1(5), S3C_GPIO_SFN(2)); | |
! s3c_gpio_setpull(S5PV210_GPD1(5), S3C_GPIO_PULL_NONE); | |
} | |
diff -crB 2/arch/arm/mach-s5pv210/setup-sdhci.c 1/arch/arm/mach-s5pv210/setup-sdhci.c | |
*** 2/arch/arm/mach-s5pv210/setup-sdhci.c 2012-09-24 11:44:00.374845348 +0530 | |
--- 1/arch/arm/mach-s5pv210/setup-sdhci.c 2011-05-18 12:34:13.000000000 +0530 | |
*************** | |
*** 15,20 **** | |
--- 15,21 ---- | |
#include <linux/interrupt.h> | |
#include <linux/platform_device.h> | |
#include <linux/io.h> | |
+ #include <linux/irq.h> | |
#include <linux/mmc/card.h> | |
#include <linux/mmc/host.h> | |
*************** | |
*** 22,63 **** | |
#include <plat/regs-sdhci.h> | |
#include <plat/sdhci.h> | |
! /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | |
char *s5pv210_hsmmc_clksrcs[4] = { | |
[0] = "hsmmc", /* HCLK */ | |
[1] = "hsmmc", /* HCLK */ | |
[2] = "sclk_mmc", /* mmc_bus */ | |
! /*[4] = reserved */ | |
}; | |
void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, | |
void __iomem *r, | |
struct mmc_ios *ios, | |
struct mmc_card *card) | |
{ | |
! u32 ctrl2, ctrl3; | |
! | |
! /* don't need to alter anything acording to card-type */ | |
! | |
! writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); | |
ctrl2 = readl(r + S3C_SDHCI_CONTROL2); | |
ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; | |
ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | | |
S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | | |
- S3C_SDHCI_CTRL2_ENFBCLKRX | | |
S3C_SDHCI_CTRL2_DFCNT_NONE | | |
S3C_SDHCI_CTRL2_ENCLKOUTHOLD); | |
! if (ios->clock < 25 * 1000000) | |
! ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | | |
! S3C_SDHCI_CTRL3_FCSEL2 | | |
! S3C_SDHCI_CTRL3_FCSEL1 | | |
! S3C_SDHCI_CTRL3_FCSEL0); | |
! else | |
! ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); | |
writel(ctrl2, r + S3C_SDHCI_CONTROL2); | |
writel(ctrl3, r + S3C_SDHCI_CONTROL3); | |
} | |
--- 23,415 ---- | |
#include <plat/regs-sdhci.h> | |
#include <plat/sdhci.h> | |
! #include <plat/gpio-cfg.h> | |
! #include <mach/regs-gpio.h> | |
! #include <mach/gpio.h> | |
! #include <asm/mach-types.h> | |
! #include <mach/gpio-p1.h> | |
! | |
! #include <linux/regulator/consumer.h> | |
! #include <linux/err.h> | |
+ /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | |
char *s5pv210_hsmmc_clksrcs[4] = { | |
[0] = "hsmmc", /* HCLK */ | |
[1] = "hsmmc", /* HCLK */ | |
[2] = "sclk_mmc", /* mmc_bus */ | |
! [3] = NULL, /*reserved */ | |
}; | |
+ void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | |
+ { | |
+ unsigned int gpio; | |
+ | |
+ switch (width) { | |
+ /* Channel 0 supports 4 and 8-bit bus width */ | |
+ case 8: | |
+ /* Set all the necessary GPIO function and pull up/down */ | |
+ for (gpio = S5PV210_GPG1(3); gpio <= S5PV210_GPG1(6); gpio++) { | |
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); | |
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | |
+ s3c_gpio_set_drvstrength(gpio, S3C_GPIO_DRVSTR_2X); | |
+ } | |
+ | |
+ case 0: | |
+ case 1: | |
+ case 4: | |
+ /* Set all the necessary GPIO function and pull up/down */ | |
+ for (gpio = S5PV210_GPG0(0); gpio <= S5PV210_GPG0(6); gpio++) { | |
+ if (gpio != S5PV210_GPG0(2)) { | |
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | |
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | |
+ } | |
+ s3c_gpio_set_drvstrength(gpio, S3C_GPIO_DRVSTR_2X); | |
+ } | |
+ break; | |
+ default: | |
+ printk(KERN_ERR "Wrong SD/MMC bus width : %d\n", width); | |
+ } | |
+ | |
+ if (machine_is_herring()) { | |
+ s3c_gpio_cfgpin(S5PV210_GPJ2(7), S3C_GPIO_OUTPUT); | |
+ s3c_gpio_setpull(S5PV210_GPJ2(7), S3C_GPIO_PULL_NONE); | |
+ gpio_set_value(S5PV210_GPJ2(7), 1); | |
+ } | |
+ } | |
+ | |
+ void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) | |
+ { | |
+ unsigned int gpio; | |
+ | |
+ switch (width) { | |
+ /* Channel 1 supports 4-bit bus width */ | |
+ case 0: | |
+ case 1: | |
+ case 4: | |
+ /* Set all the necessary GPIO function and pull up/down */ | |
+ for (gpio = S5PV210_GPG1(0); gpio <= S5PV210_GPG1(6); gpio++) { | |
+ if (gpio != S5PV210_GPG1(2)) { | |
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | |
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | |
+ } | |
+ s3c_gpio_set_drvstrength(gpio, S3C_GPIO_DRVSTR_2X); | |
+ } | |
+ break; | |
+ default: | |
+ printk(KERN_ERR "Wrong SD/MMC bus width : %d\n", width); | |
+ } | |
+ } | |
+ | |
+ void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) | |
+ { | |
+ unsigned int gpio; | |
+ | |
+ switch (width) { | |
+ /* Channel 2 supports 4 and 8-bit bus width */ | |
+ case 8: | |
+ /* Set all the necessary GPIO function and pull up/down */ | |
+ for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) { | |
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); | |
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | |
+ s3c_gpio_set_drvstrength(gpio, S3C_GPIO_DRVSTR_2X); | |
+ } | |
+ | |
+ case 0: | |
+ case 1: | |
+ case 4: | |
+ /* Set all the necessary GPIO function and pull up/down */ | |
+ for (gpio = S5PV210_GPG2(0); gpio <= S5PV210_GPG2(6); gpio++) { | |
+ if (gpio != S5PV210_GPG2(2)) { | |
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | |
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | |
+ } | |
+ s3c_gpio_set_drvstrength(gpio, S3C_GPIO_DRVSTR_2X); | |
+ } | |
+ break; | |
+ default: | |
+ printk(KERN_ERR "Wrong SD/MMC bus width : %d\n", width); | |
+ } | |
+ } | |
+ | |
+ void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width) | |
+ { | |
+ unsigned int gpio; | |
+ | |
+ switch (width) { | |
+ /* Channel 3 supports 4-bit bus width */ | |
+ case 0: | |
+ case 1: | |
+ case 4: | |
+ /* Set all the necessary GPIO function and pull up/down */ | |
+ for (gpio = S5PV210_GPG3(0); gpio <= S5PV210_GPG3(6); gpio++) { | |
+ if (gpio != S5PV210_GPG3(2)) { | |
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | |
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); | |
+ } | |
+ s3c_gpio_set_drvstrength(gpio, S3C_GPIO_DRVSTR_3X); | |
+ } | |
+ break; | |
+ default: | |
+ printk(KERN_ERR "Wrong SD/MMC bus width : %d\n", width); | |
+ } | |
+ } | |
+ | |
+ #define S3C_SDHCI_CTRL3_FCSELTX_INVERT (0) | |
+ #define S3C_SDHCI_CTRL3_FCSELTX_BASIC \ | |
+ (S3C_SDHCI_CTRL3_FCSEL3 | S3C_SDHCI_CTRL3_FCSEL2) | |
+ #define S3C_SDHCI_CTRL3_FCSELRX_INVERT (0) | |
+ #define S3C_SDHCI_CTRL3_FCSELRX_BASIC \ | |
+ (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0) | |
+ | |
void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, | |
void __iomem *r, | |
struct mmc_ios *ios, | |
struct mmc_card *card) | |
{ | |
! u32 ctrl2; | |
! u32 ctrl3; | |
ctrl2 = readl(r + S3C_SDHCI_CONTROL2); | |
ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; | |
ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | | |
S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | | |
S3C_SDHCI_CTRL2_DFCNT_NONE | | |
S3C_SDHCI_CTRL2_ENCLKOUTHOLD); | |
! if (ios->clock <= (400 * 1000)) { | |
! ctrl2 &= ~(S3C_SDHCI_CTRL2_ENFBCLKTX | | |
! S3C_SDHCI_CTRL2_ENFBCLKRX); | |
! ctrl3 = 0; | |
! } else { | |
! u32 range_start; | |
! u32 range_end; | |
! | |
! ctrl2 |= S3C_SDHCI_CTRL2_ENFBCLKTX | | |
! S3C_SDHCI_CTRL2_ENFBCLKRX; | |
! | |
! if (card->type == MMC_TYPE_MMC) /* MMC */ | |
! range_start = 20 * 1000 * 1000; | |
! else /* SD, SDIO */ | |
! range_start = 25 * 1000 * 1000; | |
! | |
! range_end = 37 * 1000 * 1000; | |
! | |
! if ((ios->clock > range_start) && (ios->clock < range_end)) { | |
! ctrl3 = S3C_SDHCI_CTRL3_FCSELTX_BASIC | | |
! S3C_SDHCI_CTRL3_FCSELRX_BASIC; | |
! } else { | |
! #ifdef CONFIG_MACH_P1 | |
! if (card->type == MMC_TYPE_SD) | |
! ctrl3 = S3C_SDHCI_CTRL3_FCSELTX_BASIC | | |
! S3C_SDHCI_CTRL3_FCSELRX_BASIC; | |
! else | |
! #endif | |
! ctrl3 = S3C_SDHCI_CTRL3_FCSELTX_BASIC | | |
! S3C_SDHCI_CTRL3_FCSELRX_INVERT; | |
! } | |
! } | |
! | |
! writel(ctrl2, r + S3C_SDHCI_CONTROL2); | |
! writel(ctrl3, r + S3C_SDHCI_CONTROL3); | |
! } | |
! | |
! void s5pv210_adjust_sdhci_cfg_card(struct s3c_sdhci_platdata *pdata, | |
! void __iomem *r, int rw) | |
! { | |
! u32 ctrl2, ctrl3; | |
! | |
! ctrl2 = readl(r + S3C_SDHCI_CONTROL2); | |
! ctrl3 = readl(r + S3C_SDHCI_CONTROL3); | |
! | |
! if (rw == 0) { | |
! pdata->rx_cfg++; | |
! if (pdata->rx_cfg == 1) { | |
! ctrl2 |= S3C_SDHCI_CTRL2_ENFBCLKRX; | |
! ctrl3 |= S3C_SDHCI_CTRL3_FCSELRX_BASIC; | |
! } else if (pdata->rx_cfg == 2) { | |
! ctrl2 |= S3C_SDHCI_CTRL2_ENFBCLKRX; | |
! ctrl3 &= ~S3C_SDHCI_CTRL3_FCSELRX_BASIC; | |
! } else if (pdata->rx_cfg == 3) { | |
! ctrl2 &= ~(S3C_SDHCI_CTRL2_ENFBCLKTX | | |
! S3C_SDHCI_CTRL2_ENFBCLKRX); | |
! pdata->rx_cfg = 0; | |
! } | |
! } else if (rw == 1) { | |
! pdata->tx_cfg++; | |
! if (pdata->tx_cfg == 1) { | |
! if (ctrl2 & S3C_SDHCI_CTRL2_ENFBCLKRX) { | |
! ctrl2 |= S3C_SDHCI_CTRL2_ENFBCLKTX; | |
! ctrl3 |= S3C_SDHCI_CTRL3_FCSELTX_BASIC; | |
! } else { | |
! ctrl2 &= ~S3C_SDHCI_CTRL2_ENFBCLKTX; | |
! } | |
! } else if (pdata->tx_cfg == 2) { | |
! ctrl2 &= ~S3C_SDHCI_CTRL2_ENFBCLKTX; | |
! pdata->tx_cfg = 0; | |
! } | |
! } else { | |
! printk(KERN_ERR "%s, unknown value rw:%d\n", __func__, rw); | |
! return; | |
! } | |
writel(ctrl2, r + S3C_SDHCI_CONTROL2); | |
writel(ctrl3, r + S3C_SDHCI_CONTROL3); | |
} | |
+ | |
+ #if defined(CONFIG_MACH_SMDKV210) | |
+ static void setup_sdhci0_gpio_wp(void) | |
+ { | |
+ s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_INPUT); | |
+ s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_DOWN); | |
+ } | |
+ | |
+ static int sdhci0_get_ro(struct mmc_host *mmc) | |
+ { | |
+ return !!(readl(S5PV210_GPH0DAT) & 0x80); | |
+ } | |
+ #endif | |
+ | |
+ unsigned int universal_sdhci2_detect_ext_cd(void) | |
+ { | |
+ unsigned int card_status = 0; | |
+ | |
+ #ifdef CONFIG_MMC_DEBUG | |
+ printk(KERN_DEBUG "Universal :SD Detect function\n"); | |
+ printk(KERN_DEBUG "eint conf %x eint filter conf %x", | |
+ readl(S5P_EINT_CON(3)), readl(S5P_EINT_FLTCON(3, 1))); | |
+ printk(KERN_DEBUG "eint pend %x eint mask %x", | |
+ readl(S5P_EINT_PEND(3)), readl(S5P_EINT_MASK(3))); | |
+ #endif | |
+ #if 1 | |
+ card_status = gpio_get_value(GPIO_T_FLASH_DETECT) ? 0 : 1; /* active low */ | |
+ printk(KERN_DEBUG " Universal: Card status %s\n", | |
+ card_status ? "inserted" : "removed"); | |
+ return card_status; | |
+ #else | |
+ card_status = gpio_get_value(S5PV210_GPH3(4)); | |
+ printk(KERN_DEBUG "Universal : Card status %d\n", card_status ? 0 : 1); | |
+ return card_status ? 0 : 1; | |
+ #endif | |
+ } | |
+ | |
+ void universal_sdhci2_cfg_ext_cd(void) | |
+ { | |
+ printk(KERN_DEBUG "Universal :SD Detect configuration\n"); | |
+ #if 1 | |
+ s3c_gpio_cfgpin(GPIO_T_FLASH_DETECT, S3C_GPIO_SFN(GPIO_T_FLASH_DETECT_AF)); | |
+ s3c_gpio_setpull(S5PV210_GPH3(4), S3C_GPIO_PULL_NONE); | |
+ set_irq_type(IRQ_EINT(28), IRQ_TYPE_EDGE_BOTH); | |
+ #else | |
+ s3c_gpio_setpull(S5PV210_GPH3(4), S3C_GPIO_PULL_NONE); | |
+ set_irq_type(IRQ_EINT(28), IRQ_TYPE_EDGE_BOTH); | |
+ #endif | |
+ } | |
+ | |
+ #ifdef CONFIG_MACH_P1 | |
+ static unsigned int vreg_sts = 0; | |
+ void s5pv210_sdhci0_translate_vdd(struct platform_device *pdev, | |
+ unsigned int vdd) | |
+ { | |
+ unsigned int flag = 0; | |
+ | |
+ if (pdev->id != 0) /* MoviNAND */ | |
+ return; | |
+ | |
+ flag = 1 << pdev->id; | |
+ | |
+ if (vdd == 0) { | |
+ if (vreg_sts & flag) { | |
+ gpio_set_value(GPIO_MASSMEMORY_EN, GPIO_LEVEL_LOW); | |
+ printk(KERN_DEBUG "%s.%d: ldo down\n", pdev->name, pdev->id); | |
+ vreg_sts &= ~flag; | |
+ } | |
+ } | |
+ else { | |
+ if (!(vreg_sts & flag)) { | |
+ gpio_set_value(GPIO_MASSMEMORY_EN, GPIO_LEVEL_HIGH); | |
+ printk(KERN_DEBUG "%s.%d: ldo on\n", pdev->name, pdev->id); | |
+ vreg_sts |= flag; | |
+ } | |
+ } | |
+ } | |
+ | |
+ void s5pv210_sdhci2_translate_vdd(struct platform_device *pdev, unsigned int vdd) | |
+ { | |
+ unsigned int flag = 0; | |
+ struct regulator *vcc_vtf; | |
+ | |
+ if (pdev->id != 2) /* T-FLSH */ | |
+ return; | |
+ | |
+ flag = 1 << pdev->id; | |
+ | |
+ vcc_vtf = regulator_get(NULL, "vcc_vtf"); | |
+ if (IS_ERR_OR_NULL(vcc_vtf)) { | |
+ pr_err("failed to get T-Flash regulator"); | |
+ return; | |
+ } | |
+ | |
+ if (vdd == 0) { | |
+ if (vreg_sts & flag) { | |
+ printk(KERN_DEBUG "%s.%d: ldo down\n", pdev->name, pdev->id); | |
+ regulator_disable(vcc_vtf); | |
+ vreg_sts &= ~flag; | |
+ } | |
+ } | |
+ else { | |
+ if (!(vreg_sts & flag)) { | |
+ printk(KERN_DEBUG "%s.%d: ldo on\n", pdev->name, pdev->id); | |
+ regulator_enable(vcc_vtf); | |
+ vreg_sts |= flag; | |
+ } | |
+ } | |
+ | |
+ regulator_put(vcc_vtf); | |
+ } | |
+ #endif | |
+ | |
+ static struct s3c_sdhci_platdata hsmmc0_platdata = { | |
+ #if defined(CONFIG_S5PV210_SD_CH0_8BIT) | |
+ .max_width = 8, | |
+ .host_caps = MMC_CAP_8_BIT_DATA, | |
+ #endif | |
+ #if defined(CONFIG_MACH_SMDKV210) | |
+ .cfg_wp = setup_sdhci0_gpio_wp, | |
+ .get_ro = sdhci0_get_ro, | |
+ #endif | |
+ }; | |
+ | |
+ #if defined(CONFIG_S3C_DEV_HSMMC2) | |
+ static struct s3c_sdhci_platdata hsmmc2_platdata = { | |
+ #if defined(CONFIG_S5PV210_SD_CH2_8BIT) | |
+ .max_width = 8, | |
+ .host_caps = MMC_CAP_8_BIT_DATA, | |
+ #endif | |
+ #ifdef CONFIG_MACH_P1 | |
+ .translate_vdd = s5pv210_sdhci2_translate_vdd, | |
+ #endif | |
+ }; | |
+ #endif | |
+ | |
+ #if defined(CONFIG_S3C_DEV_HSMMC3) | |
+ static struct s3c_sdhci_platdata hsmmc3_platdata = { 0 }; | |
+ #endif | |
+ | |
+ void s3c_sdhci_set_platdata(void) | |
+ { | |
+ #if defined(CONFIG_S3C_DEV_HSMMC) | |
+ s3c_sdhci0_set_platdata(&hsmmc0_platdata); | |
+ #endif | |
+ #if defined(CONFIG_S3C_DEV_HSMMC2) | |
+ hsmmc2_platdata.ext_cd = IRQ_EINT(28); | |
+ hsmmc2_platdata.cfg_ext_cd = universal_sdhci2_cfg_ext_cd; | |
+ hsmmc2_platdata.detect_ext_cd = universal_sdhci2_detect_ext_cd; | |
+ | |
+ s3c_sdhci2_set_platdata(&hsmmc2_platdata); | |
+ #endif | |
+ #if defined(CONFIG_S3C_DEV_HSMMC3) | |
+ if (machine_is_herring()) | |
+ hsmmc3_platdata.built_in = 1; | |
+ s3c_sdhci3_set_platdata(&hsmmc3_platdata); | |
+ #endif | |
+ }; | |
Only in 1/arch/arm/mach-s5pv210: sleep.S | |
diff -crB 2/arch/arm/mm/cache-v6.S 1/arch/arm/mm/cache-v6.S | |
*** 2/arch/arm/mm/cache-v6.S 2012-09-24 11:44:00.418844526 +0530 | |
--- 1/arch/arm/mm/cache-v6.S 2011-05-18 12:34:14.000000000 +0530 | |
*************** | |
*** 256,261 **** | |
--- 256,266 ---- | |
* - end - virtual end address of region | |
*/ | |
ENTRY(v6_dma_flush_range) | |
+ #ifdef CONFIG_CACHE_FLUSH_RANGE_LIMIT | |
+ sub r2, r1, r0 | |
+ cmp r2, #CONFIG_CACHE_FLUSH_RANGE_LIMIT | |
+ bhi v6_dma_flush_dcache_all | |
+ #endif | |
bic r0, r0, #D_CACHE_LINE_SIZE - 1 | |
1: | |
#ifdef CONFIG_DMA_CACHE_RWFO | |
*************** | |
*** 274,279 **** | |
--- 279,296 ---- | |
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer | |
mov pc, lr | |
+ #ifdef CONFIG_CACHE_FLUSH_RANGE_LIMIT | |
+ v6_dma_flush_dcache_all: | |
+ mov r0, #0 | |
+ #ifdef HARVARD_CACHE | |
+ mcr p15, 0, r0, c7, c14, 0 @ D cache clean+invalidate | |
+ #else | |
+ mcr p15, 0, r0, c7, c15, 0 @ Cache clean+invalidate | |
+ #endif | |
+ mcr p15, 0, r0, c7, c10, 4 @ drain write buffer | |
+ mov pc, lr | |
+ #endif | |
+ | |
/* | |
* dma_map_area(start, size, dir) | |
* - start - kernel virtual start address | |
Only in 1/arch/arm/plat-s5p: bootmem.c | |
diff -crB 2/arch/arm/plat-s5p/clock.c 1/arch/arm/plat-s5p/clock.c | |
*** 2/arch/arm/plat-s5p/clock.c 2012-09-24 11:44:00.426844376 +0530 | |
--- 1/arch/arm/plat-s5p/clock.c 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 36,41 **** | |
--- 36,48 ---- | |
struct clk clk_xusbxti = { | |
.name = "xusbxti", | |
.id = -1, | |
+ .rate = 24000000, | |
+ }; | |
+ | |
+ struct clk clk_xrtcxti = { | |
+ .name = "xrtcxti", | |
+ .id = -1, | |
+ .rate = 32768, | |
}; | |
struct clk s5p_clk_27m = { | |
*************** | |
*** 140,145 **** | |
--- 147,154 ---- | |
static struct clk *s5p_clks[] __initdata = { | |
&clk_ext_xtal_mux, | |
+ &clk_xrtcxti, | |
+ &clk_xusbxti, | |
&clk_48m, | |
&s5p_clk_27m, | |
&clk_fout_apll, | |
*************** | |
*** 148,154 **** | |
&clk_fout_vpll, | |
&clk_arm, | |
&clk_vpll, | |
- &clk_xusbxti, | |
}; | |
void __init s5p_register_clocks(unsigned long xtal_freq) | |
--- 157,162 ---- | |
Only in 1/arch/arm/plat-s5p: dev-csis.c | |
Only in 1/arch/arm/plat-s5p: dev-mfc.c | |
Only in 1/arch/arm/plat-s5p: devs.c | |
Only in 1/arch/arm/plat-s5p: hr-time-rtc.c | |
Only in 1/arch/arm/plat-s5p/include/plat: csis.h | |
Only in 1/arch/arm/plat-s5p/include/plat: fb.h | |
Only in 1/arch/arm/plat-s5p/include/plat: fimc.h | |
Only in 1/arch/arm/plat-s5p/include/plat: irq-eint-group.h | |
Only in 1/arch/arm/plat-s5p/include/plat: irq-pm.h | |
diff -crB 2/arch/arm/plat-s5p/include/plat/irqs.h 1/arch/arm/plat-s5p/include/plat/irqs.h | |
*** 2/arch/arm/plat-s5p/include/plat/irqs.h 2012-09-24 11:44:00.426844376 +0530 | |
--- 1/arch/arm/plat-s5p/include/plat/irqs.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 94,97 **** | |
--- 94,99 ---- | |
((irq) - S5P_EINT_BASE1) : \ | |
((irq) + 16 - S5P_EINT_BASE2)) | |
+ #define IRQ_EINT_BIT(x) EINT_OFFSET(x) | |
+ | |
#endif /* __ASM_PLAT_S5P_IRQS_H */ | |
Only in 1/arch/arm/plat-s5p/include/plat: jpeg.h | |
diff -crB 2/arch/arm/plat-s5p/include/plat/map-s5p.h 1/arch/arm/plat-s5p/include/plat/map-s5p.h | |
*** 2/arch/arm/plat-s5p/include/plat/map-s5p.h 2012-09-24 11:44:00.426844376 +0530 | |
--- 1/arch/arm/plat-s5p/include/plat/map-s5p.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 17,22 **** | |
--- 17,23 ---- | |
#define S5P_VA_GPIO S3C_ADDR(0x00500000) | |
#define S5P_VA_SYSTIMER S3C_ADDR(0x01200000) | |
#define S5P_VA_SROMC S3C_ADDR(0x01100000) | |
+ #define S5P_VA_AUDSS S3C_ADDR(0X01600000) | |
#define S5P_VA_UART0 (S3C_VA_UART + 0x0) | |
#define S5P_VA_UART1 (S3C_VA_UART + 0x400) | |
Only in 1/arch/arm/plat-s5p/include/plat: media.h | |
Only in 1/arch/arm/plat-s5p/include/plat: mfc.h | |
diff -crB 2/arch/arm/plat-s5p/include/plat/pll.h 1/arch/arm/plat-s5p/include/plat/pll.h | |
*** 2/arch/arm/plat-s5p/include/plat/pll.h 2012-09-24 11:44:00.426844376 +0530 | |
--- 1/arch/arm/plat-s5p/include/plat/pll.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 21,26 **** | |
--- 21,29 ---- | |
#include <asm/div64.h> | |
+ #define PLL45XX_APLL_VAL_1000 ((1 << 31) | (125 << 16) | (3 << 8) | (1)) | |
+ #define PLL45XX_APLL_VAL_800 ((1 << 31) | (100 << 16) | (3 << 8) | (1)) | |
+ | |
enum pll45xx_type_t { | |
pll_4500, | |
pll_4502, | |
*************** | |
*** 46,55 **** | |
--- 49,60 ---- | |
return (unsigned long)fvco; | |
} | |
+ #define PLL90XX_VDIV_MASK (0x1) | |
#define PLL90XX_MDIV_MASK (0xFF) | |
#define PLL90XX_PDIV_MASK (0x3F) | |
#define PLL90XX_SDIV_MASK (0x7) | |
#define PLL90XX_KDIV_MASK (0xffff) | |
+ #define PLL90XX_VDIV_SHIFT (27) | |
#define PLL90XX_MDIV_SHIFT (16) | |
#define PLL90XX_PDIV_SHIFT (8) | |
#define PLL90XX_SDIV_SHIFT (0) | |
Only in 1/arch/arm/plat-s5p/include/plat: regs-csis.h | |
Only in 1/arch/arm/plat-s5p/include/plat: regs-fb.h | |
Only in 1/arch/arm/plat-s5p/include/plat: regs-fimc.h | |
Only in 1/arch/arm/plat-s5p/include/plat: regs-iis.h | |
Only in 1/arch/arm/plat-s5p/include/plat: regs-ipc.h | |
Only in 1/arch/arm/plat-s5p/include/plat: regs-keypad.h | |
Only in 1/arch/arm/plat-s5p/include/plat: regs-mfc.h | |
Only in 1/arch/arm/plat-s5p/include/plat: regs-systimer.h | |
diff -crB 2/arch/arm/plat-s5p/irq.c 1/arch/arm/plat-s5p/irq.c | |
*** 2/arch/arm/plat-s5p/irq.c 2012-09-24 11:44:00.426844376 +0530 | |
--- 1/arch/arm/plat-s5p/irq.c 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 24,29 **** | |
--- 24,46 ---- | |
#include <plat/cpu.h> | |
#include <plat/irq-vic-timer.h> | |
#include <plat/irq-uart.h> | |
+ #include <plat/irq-pm.h> | |
+ | |
+ /* Wakeup source */ | |
+ static int wakeup_source[] = { | |
+ IRQ_RTC_ALARM, | |
+ IRQ_RTC_TIC, | |
+ IRQ_ADC, | |
+ IRQ_ADC1, | |
+ IRQ_KEYPAD, | |
+ IRQ_HSMMC0, | |
+ IRQ_HSMMC1, | |
+ IRQ_HSMMC2, | |
+ IRQ_MMC3, | |
+ IRQ_I2S0, | |
+ IRQ_SYSTIMER, | |
+ IRQ_CEC | |
+ }; | |
/* | |
* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3] | |
*************** | |
*** 56,61 **** | |
--- 73,79 ---- | |
void __init s5p_init_irq(u32 *vic, u32 num_vic) | |
{ | |
+ struct irq_chip *chip; | |
int irq; | |
/* initialize the VICs */ | |
*************** | |
*** 69,72 **** | |
--- 87,96 ---- | |
s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4); | |
s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs)); | |
+ | |
+ /* Register wakeup source. */ | |
+ for (irq = 0; irq < ARRAY_SIZE(wakeup_source); irq++) { | |
+ chip = get_irq_chip(wakeup_source[irq]); | |
+ chip->set_wake = s3c_irq_wake; | |
+ } | |
} | |
diff -crB 2/arch/arm/plat-s5p/irq-eint.c 1/arch/arm/plat-s5p/irq-eint.c | |
*** 2/arch/arm/plat-s5p/irq-eint.c 2012-09-24 11:44:00.426844376 +0530 | |
--- 1/arch/arm/plat-s5p/irq-eint.c 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 37,56 **** | |
__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq))); | |
} | |
static void s5p_irq_eint_unmask(unsigned int irq) | |
{ | |
u32 mask; | |
mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq))); | |
mask &= ~(eint_irq_to_bit(irq)); | |
__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq))); | |
} | |
- static inline void s5p_irq_eint_ack(unsigned int irq) | |
- { | |
- __raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq))); | |
- } | |
- | |
static void s5p_irq_eint_maskack(unsigned int irq) | |
{ | |
/* compiler should in-line these */ | |
--- 37,66 ---- | |
__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq))); | |
} | |
+ static inline void s5p_irq_eint_ack(unsigned int irq) | |
+ { | |
+ __raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq))); | |
+ } | |
+ | |
static void s5p_irq_eint_unmask(unsigned int irq) | |
{ | |
u32 mask; | |
+ /* for level triggered interrupts, masking doesn't prevent | |
+ * the interrupt from becoming pending again. by the time | |
+ * the handler (either irq or thread) can do its thing to clear | |
+ * the interrupt, it's too late because it could be pending | |
+ * already. we have to ack it here, after the handler runs, | |
+ * or else we get a false interrupt. | |
+ */ | |
+ if (irq_to_desc(irq)->status & IRQ_LEVEL) | |
+ s5p_irq_eint_ack(irq); | |
+ | |
mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq))); | |
mask &= ~(eint_irq_to_bit(irq)); | |
__raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq))); | |
} | |
static void s5p_irq_eint_maskack(unsigned int irq) | |
{ | |
/* compiler should in-line these */ | |
*************** | |
*** 64,69 **** | |
--- 74,80 ---- | |
int shift; | |
u32 ctrl, mask; | |
u32 newvalue = 0; | |
+ struct irq_desc *desc = irq_to_desc(irq); | |
switch (type) { | |
case IRQ_TYPE_EDGE_RISING: | |
*************** | |
*** 114,119 **** | |
--- 125,135 ---- | |
else | |
printk(KERN_ERR "No such irq number %d", offs); | |
+ if (type & IRQ_TYPE_EDGE_BOTH) | |
+ desc->handle_irq = handle_edge_irq; | |
+ else | |
+ desc->handle_irq = handle_level_irq; | |
+ | |
return 0; | |
} | |
Only in 1/arch/arm/plat-s5p: irq-eint-group.c | |
Only in 1/arch/arm/plat-s5p: irq-pm.c | |
diff -crB 2/arch/arm/plat-s5p/Kconfig 1/arch/arm/plat-s5p/Kconfig | |
*** 2/arch/arm/plat-s5p/Kconfig 2012-09-24 11:44:00.426844376 +0530 | |
--- 1/arch/arm/plat-s5p/Kconfig 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 25,32 **** | |
--- 25,80 ---- | |
help | |
Base platform code for Samsung's S5P series SoC. | |
+ config SYSTIMER_S5P | |
+ bool | |
+ depends on (ARCH_S5P6442 || ARCH_S5PV210) | |
+ default y | |
+ help | |
+ Support System Timer for S5P Series | |
+ | |
+ | |
config S5P_EXT_INT | |
bool | |
help | |
Use the external interrupts (other than GPIO interrupts.) | |
Note: Do not choose this for S5P6440. | |
+ | |
+ # FB part | |
+ config S5P_DEV_FB | |
+ bool | |
+ depends on FB_S3C | |
+ default y | |
+ help | |
+ Compile in platform device definitions for FIMD controller | |
+ | |
+ config S5P_HIGH_RES_TIMERS | |
+ bool "HRtimer and Dynamic Tick support" | |
+ select GENERIC_TIME | |
+ select GENERIC_CLOCKEVENTS | |
+ select HIGH_RES_TIMERS | |
+ select HRT_RTC | |
+ select NO_HZ | |
+ default n | |
+ help | |
+ Support for HRtimer and Dynamic Tick system. | |
+ | |
+ config HRT_RTC | |
+ bool | |
+ depends on S5P_HIGH_RES_TIMERS | |
+ default y | |
+ help | |
+ RTC and System timer are used as HRT | |
+ | |
+ # MFC part | |
+ config S5P_DEV_MFC | |
+ bool | |
+ default n | |
+ help | |
+ Compile in platform device definitions for MFC | |
+ | |
+ config S5P_SETUP_MFC | |
+ bool | |
+ default n | |
+ help | |
+ Common setup code for MFC | |
+ | |
diff -crB 2/arch/arm/plat-s5p/Makefile 1/arch/arm/plat-s5p/Makefile | |
*** 2/arch/arm/plat-s5p/Makefile 2012-09-24 11:44:00.426844376 +0530 | |
--- 1/arch/arm/plat-s5p/Makefile 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 16,20 **** | |
obj-y += cpu.o | |
obj-y += clock.o | |
obj-y += irq.o | |
! obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o | |
--- 16,39 ---- | |
obj-y += cpu.o | |
obj-y += clock.o | |
obj-y += irq.o | |
! obj-y += devs.o | |
! obj-y += bootmem.o | |
! obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o irq-eint-group.o | |
+ # PM support | |
+ | |
+ # PM support | |
+ | |
+ obj-$(CONFIG_PM) += pm.o | |
+ obj-$(CONFIG_PM) += irq-pm.o | |
+ | |
+ ifndef CONFIG_S5P_HIGH_RES_TIMERS | |
+ obj-$(CONFIG_SYSTIMER_S5P) += systimer-s5p.o | |
+ else | |
+ ifdef CONFIG_HRT_RTC | |
+ obj-y += hr-time-rtc.o | |
+ endif | |
+ endif | |
+ | |
+ obj-$(CONFIG_S5P_DEV_MFC) += dev-mfc.o | |
+ obj-$(CONFIG_S5P_SETUP_MFC) += setup-mfc.o | |
Only in 1/arch/arm/plat-s5p: pm.c | |
Only in 1/arch/arm/plat-s5p: setup-mfc.c | |
Only in 1/arch/arm/plat-s5p: systimer-s5p.c | |
diff -crB 2/arch/arm/plat-samsung/clock.c 1/arch/arm/plat-samsung/clock.c | |
*** 2/arch/arm/plat-samsung/clock.c 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/clock.c 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 67,76 **** | |
/* Clock API calls */ | |
struct clk *clk_get(struct device *dev, const char *id) | |
{ | |
! struct clk *p; | |
! struct clk *clk = ERR_PTR(-ENOENT); | |
int idno; | |
if (dev == NULL || dev->bus != &platform_bus_type) | |
--- 67,85 ---- | |
/* Clock API calls */ | |
+ static int nullstrcmp(const char *a, const char *b) | |
+ { | |
+ if (!a) | |
+ return b ? -1 : 0; | |
+ if (!b) | |
+ return 1; | |
+ | |
+ return strcmp(a, b); | |
+ } | |
+ | |
struct clk *clk_get(struct device *dev, const char *id) | |
{ | |
! struct clk *clk; | |
int idno; | |
if (dev == NULL || dev->bus != &platform_bus_type) | |
*************** | |
*** 80,107 **** | |
spin_lock(&clocks_lock); | |
! list_for_each_entry(p, &clocks, list) { | |
! if (p->id == idno && | |
! strcmp(id, p->name) == 0 && | |
! try_module_get(p->owner)) { | |
! clk = p; | |
! break; | |
! } | |
! } | |
! | |
! /* check for the case where a device was supplied, but the | |
! * clock that was being searched for is not device specific */ | |
! | |
! if (IS_ERR(clk)) { | |
! list_for_each_entry(p, &clocks, list) { | |
! if (p->id == -1 && strcmp(id, p->name) == 0 && | |
! try_module_get(p->owner)) { | |
! clk = p; | |
! break; | |
! } | |
! } | |
! } | |
spin_unlock(&clocks_lock); | |
return clk; | |
} | |
--- 89,113 ---- | |
spin_lock(&clocks_lock); | |
! list_for_each_entry(clk, &clocks, list) | |
! if (!nullstrcmp(id, clk->name) && clk->dev == dev) | |
! goto found_it; | |
! | |
! list_for_each_entry(clk, &clocks, list) | |
! if (clk->id == idno && nullstrcmp(id, clk->name) == 0) | |
! goto found_it; | |
! | |
! list_for_each_entry(clk, &clocks, list) | |
! if (clk->id == -1 && !nullstrcmp(id, clk->name) && | |
! clk->dev == NULL) | |
! goto found_it; | |
+ clk = ERR_PTR(-ENOENT); | |
+ spin_unlock(&clocks_lock); | |
+ return clk; | |
+ found_it: | |
+ if (!try_module_get(clk->owner)) | |
+ clk = ERR_PTR(-ENOENT); | |
spin_unlock(&clocks_lock); | |
return clk; | |
} | |
diff -crB 2/arch/arm/plat-samsung/dev-hsmmc1.c 1/arch/arm/plat-samsung/dev-hsmmc1.c | |
*** 2/arch/arm/plat-samsung/dev-hsmmc1.c 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/dev-hsmmc1.c 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 59,68 **** | |
{ | |
struct s3c_sdhci_platdata *set = &s3c_hsmmc1_def_platdata; | |
! set->max_width = pd->max_width; | |
! | |
if (pd->cfg_gpio) | |
set->cfg_gpio = pd->cfg_gpio; | |
if (pd->cfg_card) | |
set->cfg_card = pd->cfg_card; | |
} | |
--- 59,86 ---- | |
{ | |
struct s3c_sdhci_platdata *set = &s3c_hsmmc1_def_platdata; | |
! if (pd->max_width) | |
! set->max_width = pd->max_width; | |
! if (pd->host_caps) | |
! set->host_caps |= pd->host_caps; | |
if (pd->cfg_gpio) | |
set->cfg_gpio = pd->cfg_gpio; | |
if (pd->cfg_card) | |
set->cfg_card = pd->cfg_card; | |
+ if (pd->cfg_ext_cd) | |
+ set->cfg_ext_cd = pd->cfg_ext_cd; | |
+ if (pd->ext_cd) | |
+ set->ext_cd = pd->ext_cd; | |
+ if (pd->cfg_wp) | |
+ set->cfg_wp = pd->cfg_wp; | |
+ if (pd->get_ro) | |
+ set->get_ro = pd->get_ro; | |
+ if (pd->detect_ext_cd) | |
+ set->detect_ext_cd = pd->detect_ext_cd; | |
+ if (pd->detect_ext_cd) | |
+ set->detect_ext_cd = pd->detect_ext_cd; | |
+ if (pd->built_in) | |
+ set->built_in = pd->built_in; | |
+ if (pd->translate_vdd) | |
+ set->translate_vdd = pd->translate_vdd; | |
} | |
diff -crB 2/arch/arm/plat-samsung/dev-hsmmc2.c 1/arch/arm/plat-samsung/dev-hsmmc2.c | |
*** 2/arch/arm/plat-samsung/dev-hsmmc2.c 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/dev-hsmmc2.c 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 60,69 **** | |
{ | |
struct s3c_sdhci_platdata *set = &s3c_hsmmc2_def_platdata; | |
! set->max_width = pd->max_width; | |
! | |
if (pd->cfg_gpio) | |
set->cfg_gpio = pd->cfg_gpio; | |
if (pd->cfg_card) | |
set->cfg_card = pd->cfg_card; | |
} | |
--- 60,85 ---- | |
{ | |
struct s3c_sdhci_platdata *set = &s3c_hsmmc2_def_platdata; | |
! if (pd->max_width) | |
! set->max_width = pd->max_width; | |
! if (pd->host_caps) | |
! set->host_caps |= pd->host_caps; | |
if (pd->cfg_gpio) | |
set->cfg_gpio = pd->cfg_gpio; | |
if (pd->cfg_card) | |
set->cfg_card = pd->cfg_card; | |
+ if (pd->cfg_ext_cd) | |
+ set->cfg_ext_cd = pd->cfg_ext_cd; | |
+ if (pd->ext_cd) | |
+ set->ext_cd = pd->ext_cd; | |
+ if (pd->cfg_wp) | |
+ set->cfg_wp = pd->cfg_wp; | |
+ if (pd->get_ro) | |
+ set->get_ro = pd->get_ro; | |
+ if (pd->detect_ext_cd) | |
+ set->detect_ext_cd = pd->detect_ext_cd; | |
+ if (pd->built_in) | |
+ set->built_in = pd->built_in; | |
+ if (pd->translate_vdd) | |
+ set->translate_vdd = pd->translate_vdd; | |
} | |
Only in 1/arch/arm/plat-samsung: dev-hsmmc3.c | |
diff -crB 2/arch/arm/plat-samsung/dev-hsmmc.c 1/arch/arm/plat-samsung/dev-hsmmc.c | |
*** 2/arch/arm/plat-samsung/dev-hsmmc.c 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/dev-hsmmc.c 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 59,68 **** | |
{ | |
struct s3c_sdhci_platdata *set = &s3c_hsmmc0_def_platdata; | |
! set->max_width = pd->max_width; | |
! | |
if (pd->cfg_gpio) | |
set->cfg_gpio = pd->cfg_gpio; | |
if (pd->cfg_card) | |
set->cfg_card = pd->cfg_card; | |
} | |
--- 59,84 ---- | |
{ | |
struct s3c_sdhci_platdata *set = &s3c_hsmmc0_def_platdata; | |
! if (pd->max_width) | |
! set->max_width = pd->max_width; | |
! if (pd->host_caps) | |
! set->host_caps |= pd->host_caps; | |
if (pd->cfg_gpio) | |
set->cfg_gpio = pd->cfg_gpio; | |
if (pd->cfg_card) | |
set->cfg_card = pd->cfg_card; | |
+ if (pd->cfg_ext_cd) | |
+ set->cfg_ext_cd = pd->cfg_ext_cd; | |
+ if (pd->ext_cd) | |
+ set->ext_cd = pd->ext_cd; | |
+ if (pd->cfg_wp) | |
+ set->cfg_wp = pd->cfg_wp; | |
+ if (pd->get_ro) | |
+ set->get_ro = pd->get_ro; | |
+ if (pd->detect_ext_cd) | |
+ set->detect_ext_cd = pd->detect_ext_cd; | |
+ if (pd->built_in) | |
+ set->built_in = pd->built_in; | |
+ if (pd->translate_vdd) | |
+ set->translate_vdd = pd->translate_vdd; | |
} | |
diff -crB 2/arch/arm/plat-samsung/dev-i2c0.c 1/arch/arm/plat-samsung/dev-i2c0.c | |
*** 2/arch/arm/plat-samsung/dev-i2c0.c 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/dev-i2c0.c 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 15,20 **** | |
--- 15,22 ---- | |
#include <linux/kernel.h> | |
#include <linux/string.h> | |
#include <linux/platform_device.h> | |
+ #include <linux/clk.h> | |
+ #include <linux/err.h> | |
#include <mach/irqs.h> | |
#include <mach/map.h> | |
*************** | |
*** 24,29 **** | |
--- 26,33 ---- | |
#include <plat/devs.h> | |
#include <plat/cpu.h> | |
+ #include <asm/io.h> | |
+ | |
static struct resource s3c_i2c_resource[] = { | |
[0] = { | |
.start = S3C_PA_IIC, | |
*************** | |
*** 39,49 **** | |
struct platform_device s3c_device_i2c0 = { | |
.name = "s3c2410-i2c", | |
- #ifdef CONFIG_S3C_DEV_I2C1 | |
.id = 0, | |
- #else | |
- .id = -1, | |
- #endif | |
.num_resources = ARRAY_SIZE(s3c_i2c_resource), | |
.resource = s3c_i2c_resource, | |
}; | |
--- 43,49 ---- | |
*************** | |
*** 51,58 **** | |
static struct s3c2410_platform_i2c default_i2c_data0 __initdata = { | |
.flags = 0, | |
.slave_addr = 0x10, | |
! .frequency = 100*1000, | |
! .sda_delay = 100, | |
}; | |
void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd) | |
--- 51,58 ---- | |
static struct s3c2410_platform_i2c default_i2c_data0 __initdata = { | |
.flags = 0, | |
.slave_addr = 0x10, | |
! .frequency = 400*1000, | |
! .sda_delay = S3C2410_IICLC_SDA_DELAY15 | S3C2410_IICLC_FILTER_ON, | |
}; | |
void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd) | |
*************** | |
*** 70,72 **** | |
--- 70,100 ---- | |
s3c_device_i2c0.dev.platform_data = npd; | |
} | |
+ | |
+ void s3c_i2c0_force_stop() | |
+ { | |
+ void __iomem *regs; | |
+ struct clk *clk; | |
+ unsigned long iicstat; | |
+ | |
+ regs = ioremap(S3C_PA_IIC, SZ_4K); | |
+ if(regs == NULL) { | |
+ printk(KERN_ERR "%s, cannot request IO\n", __func__); | |
+ return; | |
+ } | |
+ | |
+ clk = clk_get(&s3c_device_i2c0.dev, "i2c"); | |
+ if(clk == NULL || IS_ERR(clk)) { | |
+ printk(KERN_ERR "%s, cannot get cloock\n", __func__); | |
+ return; | |
+ } | |
+ | |
+ clk_enable(clk); | |
+ iicstat = readl(regs + S3C2410_IICSTAT); | |
+ writel(iicstat & ~S3C2410_IICSTAT_TXRXEN, regs + S3C2410_IICSTAT); | |
+ clk_disable(clk); | |
+ | |
+ iounmap(regs); | |
+ } | |
+ EXPORT_SYMBOL(s3c_i2c0_force_stop); | |
+ | |
diff -crB 2/arch/arm/plat-samsung/dev-i2c1.c 1/arch/arm/plat-samsung/dev-i2c1.c | |
*** 2/arch/arm/plat-samsung/dev-i2c1.c 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/dev-i2c1.c 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 15,20 **** | |
--- 15,22 ---- | |
#include <linux/kernel.h> | |
#include <linux/string.h> | |
#include <linux/platform_device.h> | |
+ #include <linux/clk.h> | |
+ #include <linux/err.h> | |
#include <mach/irqs.h> | |
#include <mach/map.h> | |
*************** | |
*** 24,29 **** | |
--- 26,33 ---- | |
#include <plat/devs.h> | |
#include <plat/cpu.h> | |
+ #include <asm/io.h> | |
+ | |
static struct resource s3c_i2c_resource[] = { | |
[0] = { | |
.start = S3C_PA_IIC1, | |
*************** | |
*** 48,55 **** | |
.flags = 0, | |
.bus_num = 1, | |
.slave_addr = 0x10, | |
! .frequency = 100*1000, | |
! .sda_delay = 100, | |
}; | |
void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd) | |
--- 52,59 ---- | |
.flags = 0, | |
.bus_num = 1, | |
.slave_addr = 0x10, | |
! .frequency = 400*1000, | |
! .sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON, | |
}; | |
void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd) | |
*************** | |
*** 67,69 **** | |
--- 71,102 ---- | |
s3c_device_i2c1.dev.platform_data = npd; | |
} | |
+ | |
+ void s3c_i2c1_force_stop() | |
+ { | |
+ struct resource *ioarea; | |
+ void __iomem *regs; | |
+ struct clk *clk; | |
+ unsigned long iicstat; | |
+ | |
+ regs = ioremap(S3C_PA_IIC1, SZ_4K); | |
+ if(regs == NULL) { | |
+ printk(KERN_ERR "%s, cannot request IO\n", __func__); | |
+ return; | |
+ } | |
+ | |
+ clk = clk_get(&s3c_device_i2c1.dev, "i2c"); | |
+ if(clk == NULL || IS_ERR(clk)) { | |
+ printk(KERN_ERR "%s, cannot get cloock\n", __func__); | |
+ return; | |
+ } | |
+ | |
+ clk_enable(clk); | |
+ iicstat = readl(regs + S3C2410_IICSTAT); | |
+ writel(iicstat & ~S3C2410_IICSTAT_TXRXEN, regs + S3C2410_IICSTAT); | |
+ clk_disable(clk); | |
+ | |
+ iounmap(regs); | |
+ } | |
+ EXPORT_SYMBOL(s3c_i2c1_force_stop); | |
+ | |
diff -crB 2/arch/arm/plat-samsung/dev-i2c2.c 1/arch/arm/plat-samsung/dev-i2c2.c | |
*** 2/arch/arm/plat-samsung/dev-i2c2.c 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/dev-i2c2.c 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 1,12 **** | |
/* linux/arch/arm/plat-s3c/dev-i2c2.c | |
* | |
! * Copyright (c) 2010 Samsung Electronics Co., Ltd. | |
! * http://www.samsung.com/ | |
* | |
* S3C series device definition for i2c device 2 | |
* | |
- * Based on plat-samsung/dev-i2c0.c | |
- * | |
* This program is free software; you can redistribute it and/or modify | |
* it under the terms of the GNU General Public License version 2 as | |
* published by the Free Software Foundation. | |
--- 1,11 ---- | |
/* linux/arch/arm/plat-s3c/dev-i2c2.c | |
* | |
! * Copyright 2008-2009 Simtec Electronics | |
! * Ben Dooks <ben@simtec.co.uk> | |
! * http://armlinux.simtec.co.uk/ | |
* | |
* S3C series device definition for i2c device 2 | |
* | |
* This program is free software; you can redistribute it and/or modify | |
* it under the terms of the GNU General Public License version 2 as | |
* published by the Free Software Foundation. | |
*************** | |
*** 16,21 **** | |
--- 15,22 ---- | |
#include <linux/kernel.h> | |
#include <linux/string.h> | |
#include <linux/platform_device.h> | |
+ #include <linux/clk.h> | |
+ #include <linux/err.h> | |
#include <mach/irqs.h> | |
#include <mach/map.h> | |
*************** | |
*** 25,30 **** | |
--- 26,33 ---- | |
#include <plat/devs.h> | |
#include <plat/cpu.h> | |
+ #include <asm/io.h> | |
+ | |
static struct resource s3c_i2c_resource[] = { | |
[0] = { | |
.start = S3C_PA_IIC2, | |
*************** | |
*** 32,39 **** | |
.flags = IORESOURCE_MEM, | |
}, | |
[1] = { | |
! .start = IRQ_CAN0, | |
! .end = IRQ_CAN0, | |
.flags = IORESOURCE_IRQ, | |
}, | |
}; | |
--- 35,42 ---- | |
.flags = IORESOURCE_MEM, | |
}, | |
[1] = { | |
! .start = IRQ_IIC2, | |
! .end = IRQ_IIC2, | |
.flags = IORESOURCE_IRQ, | |
}, | |
}; | |
*************** | |
*** 49,56 **** | |
.flags = 0, | |
.bus_num = 2, | |
.slave_addr = 0x10, | |
! .frequency = 100*1000, | |
! .sda_delay = 100, | |
}; | |
void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd) | |
--- 52,59 ---- | |
.flags = 0, | |
.bus_num = 2, | |
.slave_addr = 0x10, | |
! .frequency = 400*1000, | |
! .sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON, | |
}; | |
void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd) | |
*************** | |
*** 68,70 **** | |
--- 71,101 ---- | |
s3c_device_i2c2.dev.platform_data = npd; | |
} | |
+ | |
+ void s3c_i2c2_force_stop() | |
+ { | |
+ void __iomem *regs; | |
+ struct clk *clk; | |
+ unsigned long iicstat; | |
+ | |
+ regs = ioremap(S3C_PA_IIC2, SZ_4K); | |
+ if(regs == NULL) { | |
+ printk(KERN_ERR "%s, cannot request IO\n", __func__); | |
+ return; | |
+ } | |
+ | |
+ clk = clk_get(&s3c_device_i2c2.dev, "i2c"); | |
+ if(clk == NULL || IS_ERR(clk)) { | |
+ printk(KERN_ERR "%s, cannot get cloock\n", __func__); | |
+ return; | |
+ } | |
+ | |
+ clk_enable(clk); | |
+ iicstat = readl(regs + S3C2410_IICSTAT); | |
+ writel(iicstat & ~S3C2410_IICSTAT_TXRXEN, regs + S3C2410_IICSTAT); | |
+ clk_disable(clk); | |
+ | |
+ iounmap(regs); | |
+ } | |
+ EXPORT_SYMBOL(s3c_i2c2_force_stop); | |
+ | |
diff -crB 2/arch/arm/plat-samsung/dev-uart.c 1/arch/arm/plat-samsung/dev-uart.c | |
*** 2/arch/arm/plat-samsung/dev-uart.c 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/dev-uart.c 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 17,35 **** | |
/* uart devices */ | |
! static struct platform_device s3c24xx_uart_device0 = { | |
.id = 0, | |
}; | |
! static struct platform_device s3c24xx_uart_device1 = { | |
.id = 1, | |
}; | |
! static struct platform_device s3c24xx_uart_device2 = { | |
.id = 2, | |
}; | |
! static struct platform_device s3c24xx_uart_device3 = { | |
.id = 3, | |
}; | |
--- 17,35 ---- | |
/* uart devices */ | |
! struct platform_device s3c24xx_uart_device0 = { | |
.id = 0, | |
}; | |
! struct platform_device s3c24xx_uart_device1 = { | |
.id = 1, | |
}; | |
! struct platform_device s3c24xx_uart_device2 = { | |
.id = 2, | |
}; | |
! struct platform_device s3c24xx_uart_device3 = { | |
.id = 3, | |
}; | |
diff -crB 2/arch/arm/plat-samsung/gpio-config.c 1/arch/arm/plat-samsung/gpio-config.c | |
*** 2/arch/arm/plat-samsung/gpio-config.c 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/gpio-config.c 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 80,85 **** | |
--- 80,105 ---- | |
} | |
EXPORT_SYMBOL(s3c_gpio_setpull); | |
+ int s3c_gpio_setpin(unsigned int pin, s3c_gpio_pull_t level) | |
+ { | |
+ struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | |
+ unsigned long flags; | |
+ int offset, ret; | |
+ | |
+ if (!chip) | |
+ return -EINVAL; | |
+ | |
+ offset = pin - chip->chip.base; | |
+ | |
+ local_irq_save(flags); | |
+ //ret = s3c_gpio_do_setpin(chip, offset, level); | |
+ ret = (chip->config->set_pin)(chip, offset, level); | |
+ local_irq_restore(flags); | |
+ | |
+ return ret; | |
+ } | |
+ | |
+ EXPORT_SYMBOL(s3c_gpio_setpin); | |
#ifdef CONFIG_S3C_GPIO_CFG_S3C24XX | |
int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip, | |
unsigned int off, unsigned int cfg) | |
*************** | |
*** 273,284 **** | |
if (!chip) | |
return -EINVAL; | |
! off = chip->chip.base - pin; | |
shift = off * 2; | |
reg = chip->base + 0x0C; | |
drvstr = __raw_readl(reg); | |
! drvstr = 0xffff & (0x3 << shift); | |
drvstr = drvstr >> shift; | |
return (__force s5p_gpio_drvstr_t)drvstr; | |
--- 293,304 ---- | |
if (!chip) | |
return -EINVAL; | |
! off = pin - chip->chip.base; | |
shift = off * 2; | |
reg = chip->base + 0x0C; | |
drvstr = __raw_readl(reg); | |
! drvstr &= (0x3 << shift); | |
drvstr = drvstr >> shift; | |
return (__force s5p_gpio_drvstr_t)drvstr; | |
*************** | |
*** 296,306 **** | |
if (!chip) | |
return -EINVAL; | |
! off = chip->chip.base - pin; | |
shift = off * 2; | |
reg = chip->base + 0x0C; | |
tmp = __raw_readl(reg); | |
tmp |= drvstr << shift; | |
__raw_writel(tmp, reg); | |
--- 316,327 ---- | |
if (!chip) | |
return -EINVAL; | |
! off = pin - chip->chip.base; | |
shift = off * 2; | |
reg = chip->base + 0x0C; | |
tmp = __raw_readl(reg); | |
+ tmp &= ~(0x3 << shift); | |
tmp |= drvstr << shift; | |
__raw_writel(tmp, reg); | |
diff -crB 2/arch/arm/plat-samsung/include/plat/clock.h 1/arch/arm/plat-samsung/include/plat/clock.h | |
*** 2/arch/arm/plat-samsung/include/plat/clock.h 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/include/plat/clock.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 46,51 **** | |
--- 46,52 ---- | |
unsigned long ctrlbit; | |
struct clk_ops *ops; | |
+ struct device *dev; | |
int (*enable)(struct clk *, int enable); | |
}; | |
diff -crB 2/arch/arm/plat-samsung/include/plat/cpu-freq.h 1/arch/arm/plat-samsung/include/plat/cpu-freq.h | |
*** 2/arch/arm/plat-samsung/include/plat/cpu-freq.h 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/include/plat/cpu-freq.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 38,43 **** | |
--- 38,49 ---- | |
unsigned long hclk_tns; /* in 10ths of ns */ | |
unsigned long hclk; | |
unsigned long pclk; | |
+ #ifdef CONFIG_ARCH_S5PV210 | |
+ unsigned long hclk_msys; | |
+ unsigned long pclk_msys; | |
+ unsigned long hclk_dsys; | |
+ unsigned long pclk_dsys; | |
+ #endif | |
}; | |
/** | |
diff -crB 2/arch/arm/plat-samsung/include/plat/cpu.h 1/arch/arm/plat-samsung/include/plat/cpu.h | |
*** 2/arch/arm/plat-samsung/include/plat/cpu.h 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/include/plat/cpu.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 66,72 **** | |
--- 66,76 ---- | |
/* timer for 2410/2440 */ | |
struct sys_timer; | |
+ #if defined(CONFIG_S5P_HIGH_RES_TIMERS) | |
+ extern struct sys_timer s5p_systimer; | |
+ #else | |
extern struct sys_timer s3c24xx_timer; | |
+ #endif | |
/* system device classes */ | |
diff -crB 2/arch/arm/plat-samsung/include/plat/devs.h 1/arch/arm/plat-samsung/include/plat/devs.h | |
*** 2/arch/arm/plat-samsung/include/plat/devs.h 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/include/plat/devs.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 23,28 **** | |
--- 23,38 ---- | |
extern struct platform_device *s3c24xx_uart_devs[]; | |
extern struct platform_device *s3c24xx_uart_src[]; | |
+ extern struct platform_device s3c24xx_uart_device0; | |
+ extern struct platform_device s3c24xx_uart_device1; | |
+ extern struct platform_device s3c24xx_uart_device2; | |
+ extern struct platform_device s3c24xx_uart_device3; | |
+ | |
+ extern struct platform_device s5pv210_device_fiqdbg_uart0; | |
+ extern struct platform_device s5pv210_device_fiqdbg_uart1; | |
+ extern struct platform_device s5pv210_device_fiqdbg_uart2; | |
+ extern struct platform_device s5pv210_device_fiqdbg_uart3; | |
+ | |
extern struct platform_device s3c_device_timer[]; | |
extern struct platform_device s3c64xx_device_iis0; | |
*************** | |
*** 40,45 **** | |
--- 50,65 ---- | |
extern struct platform_device s3c_device_ts; | |
extern struct platform_device s3c_device_fb; | |
+ | |
+ extern struct platform_device s3c_device_fimc0; | |
+ extern struct platform_device s3c_device_fimc1; | |
+ extern struct platform_device s3c_device_fimc2; | |
+ extern struct platform_device s3c_device_csis; | |
+ extern struct platform_device s3c_device_ipc; | |
+ extern struct platform_device s3c_device_mfc; | |
+ extern struct platform_device s3c_device_jpeg; | |
+ extern struct platform_device s3c_device_g3d; | |
+ | |
extern struct platform_device s3c_device_ohci; | |
extern struct platform_device s3c_device_lcd; | |
extern struct platform_device s3c_device_wdt; | |
*************** | |
*** 54,59 **** | |
--- 74,80 ---- | |
extern struct platform_device s3c_device_hsmmc0; | |
extern struct platform_device s3c_device_hsmmc1; | |
extern struct platform_device s3c_device_hsmmc2; | |
+ extern struct platform_device s3c_device_hsmmc3; | |
extern struct platform_device s3c_device_spi0; | |
extern struct platform_device s3c_device_spi1; | |
*************** | |
*** 67,72 **** | |
--- 88,94 ---- | |
extern struct platform_device s5p6440_device_spi1; | |
extern struct platform_device s3c_device_hwmon; | |
+ extern struct platform_device s3c_device_keypad; | |
extern struct platform_device s3c_device_nand; | |
extern struct platform_device s3c_device_onenand; | |
*************** | |
*** 74,81 **** | |
--- 96,161 ---- | |
extern struct platform_device s5pc110_device_onenand; | |
extern struct platform_device s3c_device_usbgadget; | |
+ extern struct platform_device s3c_device_android_usb; | |
+ extern struct platform_device s3c_device_usb_mass_storage; | |
+ | |
+ #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
+ /* soonyong.cho : Define samsung product id and config string. | |
+ * Sources such as 'android.c' and 'devs.c' refered below define | |
+ */ | |
+ # define SAMSUNG_VENDOR_ID 0x04e8 | |
+ | |
+ # ifdef CONFIG_USB_ANDROID_SAMSUNG_ESCAPE | |
+ /* USE DEVGURU HOST DRIVER */ | |
+ /* 0x6860 : MTP(0) + MS Composite (UMS) */ | |
+ /* 0x685E : UMS(0) + MS Composite (ADB) */ | |
+ # define SAMSUNG_KIES_PRODUCT_ID 0x685d /* acm(0,1) + mtp */ | |
+ # define SAMSUNG_DEBUG_PRODUCT_ID 0x685d /* acm(0,1) + ums + adb */ | |
+ # define SAMSUNG_UMS_PRODUCT_ID 0x685B /* UMS Only */ | |
+ # define SAMSUNG_MTP_PRODUCT_ID 0x685C /* MTP Only */ | |
+ # ifdef CONFIG_USB_ANDROID_SAMSUNG_RNDIS_WITH_MS_COMPOSITE | |
+ # define SAMSUNG_RNDIS_PRODUCT_ID 0x6861 /* RNDIS(0,1) + UMS (2) + MS Composite */ | |
+ # else | |
+ # define SAMSUNG_RNDIS_PRODUCT_ID 0x6863 /* RNDIS only */ | |
+ # endif | |
+ # else /* USE MCCI HOST DRIVER */ | |
+ # define SAMSUNG_KIES_PRODUCT_ID 0x6877 /* Shrewbury ACM+MTP*/ | |
+ # define SAMSUNG_DEBUG_PRODUCT_ID 0x681C /* Shrewbury ACM+UMS+ADB*/ | |
+ # define SAMSUNG_UMS_PRODUCT_ID 0x681D | |
+ # define SAMSUNG_MTP_PRODUCT_ID 0x68A9 | |
+ # define SAMSUNG_RNDIS_PRODUCT_ID 0x6881 | |
+ # endif | |
+ # define ANDROID_DEBUG_CONFIG_STRING "ACM + UMS + ADB (Debugging mode)" | |
+ # define ANDROID_KIES_CONFIG_STRING "ACM + MTP (SAMSUNG KIES mode)" | |
+ # define ANDROID_UMS_CONFIG_STRING "UMS Only (Not debugging mode)" | |
+ # define ANDROID_MTP_CONFIG_STRING "MTP Only (Not debugging mode)" | |
+ # ifdef CONFIG_USB_ANDROID_SAMSUNG_RNDIS_WITH_MS_COMPOSITE | |
+ # define ANDROID_RNDIS_CONFIG_STRING "RNDIS + UMS (Not debugging mode)" | |
+ # else | |
+ # define ANDROID_RNDIS_CONFIG_STRING "RNDIS Only (Not debugging mode)" | |
+ # endif | |
+ /* Refered from S1, P1 */ | |
+ # define USBSTATUS_UMS 0x0 | |
+ # define USBSTATUS_SAMSUNG_KIES 0x1 | |
+ # define USBSTATUS_MTPONLY 0x2 | |
+ # define USBSTATUS_ASKON 0x4 | |
+ # define USBSTATUS_VTP 0x8 | |
+ # define USBSTATUS_ADB 0x10 | |
+ # define USBSTATUS_DM 0x20 | |
+ # define USBSTATUS_ACM 0x40 | |
+ # define USBSTATUS_SAMSUNG_KIES_REAL 0x80 | |
+ | |
+ /* soonyong.cho : This is for setting unique serial number */ | |
+ void __init s3c_usb_set_serial(void); | |
+ #endif /* CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE */ | |
+ | |
+ extern struct platform_device s3c_device_rndis; | |
extern struct platform_device s3c_device_usb_hsotg; | |
+ extern struct platform_device s5p_device_rotator; | |
+ extern struct platform_device s5p_device_tvout; | |
+ extern struct platform_device s5p_device_g3d; | |
+ | |
extern struct platform_device s5pv210_device_ac97; | |
extern struct platform_device s5pv210_device_pcm0; | |
extern struct platform_device s5pv210_device_pcm1; | |
*************** | |
*** 99,110 **** | |
--- 179,205 ---- | |
extern struct platform_device s5pc100_device_iis0; | |
extern struct platform_device s5pc100_device_iis1; | |
extern struct platform_device s5pc100_device_iis2; | |
+ extern struct platform_device s5p_device_rtc; | |
+ extern struct platform_device s3c_device_adc; | |
/* s3c2440 specific devices */ | |
+ extern struct platform_device s5pv210_device_pdma0; | |
+ extern struct platform_device s5pv210_device_pdma1; | |
+ extern struct platform_device s5pv210_device_mdma; | |
+ | |
#ifdef CONFIG_CPU_S3C2440 | |
extern struct platform_device s3c_device_camif; | |
extern struct platform_device s3c_device_ac97; | |
#endif | |
+ | |
+ #ifdef CONFIG_SND_S5P_RP | |
+ extern struct platform_device s5p_device_rp; | |
+ #endif | |
+ void __init s3c_usb_set_serial(void); | |
+ | |
+ extern struct platform_device s5p_device_tvout; | |
+ extern struct platform_device s5p_device_cec; | |
+ extern struct platform_device s5p_device_hpd; | |
diff -crB 2/arch/arm/plat-samsung/include/plat/dma.h 1/arch/arm/plat-samsung/include/plat/dma.h | |
*** 2/arch/arm/plat-samsung/include/plat/dma.h 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/include/plat/dma.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 1,4 **** | |
! /* arch/arm/plat-samsung/include/plat/dma.h | |
* | |
* Copyright (C) 2003-2006 Simtec Electronics | |
* Ben Dooks <ben@simtec.co.uk> | |
--- 1,4 ---- | |
! /* arch/arm/plat-samsung/include/plat/dma.h | |
* | |
* Copyright (C) 2003-2006 Simtec Electronics | |
* Ben Dooks <ben@simtec.co.uk> | |
*************** | |
*** 18,24 **** | |
enum s3c2410_dmasrc { | |
S3C2410_DMASRC_HW, /* source is memory */ | |
! S3C2410_DMASRC_MEM /* source is hardware */ | |
}; | |
/* enum s3c2410_chan_op | |
--- 18,26 ---- | |
enum s3c2410_dmasrc { | |
S3C2410_DMASRC_HW, /* source is memory */ | |
! S3C2410_DMASRC_MEM, /* source is hardware */ | |
! S3C_DMA_MEM2MEM, | |
! S3C_DMA_MEM2MEM_SET, | |
}; | |
/* enum s3c2410_chan_op | |
*************** | |
*** 98,103 **** | |
--- 100,107 ---- | |
extern int s3c2410_dma_enqueue(unsigned int channel, void *id, | |
dma_addr_t data, int size); | |
+ extern int s3c2410_dma_enqueue_autoload(unsigned int channel, void *id, | |
+ dma_addr_t data, int size, int num); | |
/* s3c2410_dma_config | |
* | |
* configure the dma channel | |
diff -crB 2/arch/arm/plat-samsung/include/plat/gpio-cfg.h 1/arch/arm/plat-samsung/include/plat/gpio-cfg.h | |
*** 2/arch/arm/plat-samsung/include/plat/gpio-cfg.h 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/include/plat/gpio-cfg.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 56,66 **** | |
--- 56,71 ---- | |
int (*set_pull)(struct s3c_gpio_chip *chip, unsigned offs, | |
s3c_gpio_pull_t pull); | |
+ int (*set_pin)(struct s3c_gpio_chip *chip, unsigned offs, | |
+ s3c_gpio_pull_t level); | |
+ | |
unsigned (*get_config)(struct s3c_gpio_chip *chip, unsigned offs); | |
int (*set_config)(struct s3c_gpio_chip *chip, unsigned offs, | |
unsigned config); | |
}; | |
+ extern int s3c_gpio_setpin(unsigned int pin, s3c_gpio_pull_t level); | |
+ | |
#define S3C_GPIO_SPECIAL_MARK (0xfffffff0) | |
#define S3C_GPIO_SPECIAL(x) (S3C_GPIO_SPECIAL_MARK | (x)) | |
diff -crB 2/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h 1/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h | |
*** 2/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 42,47 **** | |
--- 42,52 ---- | |
return (chip->config->set_pull)(chip, off, pull); | |
} | |
+ static inline int s3c_gpio_do_setpin(struct s3c_gpio_chip *chip, | |
+ unsigned int off, s3c_gpio_pull_t level) | |
+ { | |
+ return (chip->config->set_pin)(chip, off, level); | |
+ } | |
/** | |
* s3c_gpio_setcfg_s3c24xx - S3C24XX style GPIO configuration. | |
* @chip: The gpio chip that is being configured. | |
diff -crB 2/arch/arm/plat-samsung/include/plat/gpio-core.h 1/arch/arm/plat-samsung/include/plat/gpio-core.h | |
*** 2/arch/arm/plat-samsung/include/plat/gpio-core.h 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/include/plat/gpio-core.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 63,71 **** | |
struct s3c_gpio_cfg *config; | |
struct s3c_gpio_pm *pm; | |
void __iomem *base; | |
spinlock_t lock; | |
#ifdef CONFIG_PM | |
! u32 pm_save[4]; | |
#endif | |
}; | |
--- 63,72 ---- | |
struct s3c_gpio_cfg *config; | |
struct s3c_gpio_pm *pm; | |
void __iomem *base; | |
+ int eint_offset; | |
spinlock_t lock; | |
#ifdef CONFIG_PM | |
! u32 pm_save[7]; | |
#endif | |
}; | |
diff -crB 2/arch/arm/plat-samsung/include/plat/iic.h 1/arch/arm/plat-samsung/include/plat/iic.h | |
*** 2/arch/arm/plat-samsung/include/plat/iic.h 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/include/plat/iic.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 61,64 **** | |
--- 61,68 ---- | |
extern void s3c_i2c1_cfg_gpio(struct platform_device *dev); | |
extern void s3c_i2c2_cfg_gpio(struct platform_device *dev); | |
+ extern void s3c_i2c0_force_stop(void); | |
+ extern void s3c_i2c1_force_stop(void); | |
+ extern void s3c_i2c2_force_stop(void); | |
+ | |
#endif /* __ASM_ARCH_IIC_H */ | |
diff -crB 2/arch/arm/plat-samsung/include/plat/map-base.h 1/arch/arm/plat-samsung/include/plat/map-base.h | |
*** 2/arch/arm/plat-samsung/include/plat/map-base.h 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/include/plat/map-base.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 22,28 **** | |
* an single MOVS instruction (ie, only 8 bits of set data) | |
*/ | |
! #define S3C_ADDR_BASE (0xF4000000) | |
#ifndef __ASSEMBLY__ | |
#define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x)) | |
--- 22,28 ---- | |
* an single MOVS instruction (ie, only 8 bits of set data) | |
*/ | |
! #define S3C_ADDR_BASE (0xFD000000) | |
#ifndef __ASSEMBLY__ | |
#define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x)) | |
*************** | |
*** 35,40 **** | |
--- 35,42 ---- | |
#define S3C_VA_MEM S3C_ADDR(0x00200000) /* memory control */ | |
#define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */ | |
#define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */ | |
+ #define S3C_VA_OTG S3C_ADDR(0x00E00000) /* OTG */ | |
+ #define S3C_VA_OTGSFR S3C_ADDR(0x00F00000) /* OTG PHY */ | |
#define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */ | |
/* This is used for the CPU specific mappings that may be needed, so that | |
diff -crB 2/arch/arm/plat-samsung/include/plat/pm.h 1/arch/arm/plat-samsung/include/plat/pm.h | |
*** 2/arch/arm/plat-samsung/include/plat/pm.h 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/include/plat/pm.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 15,21 **** | |
* management | |
*/ | |
! #ifdef CONFIG_PM | |
extern __init int s3c_pm_init(void); | |
--- 15,21 ---- | |
* management | |
*/ | |
! #if defined(CONFIG_PM) | |
extern __init int s3c_pm_init(void); | |
*************** | |
*** 39,44 **** | |
--- 39,45 ---- | |
extern void (*pm_cpu_prep)(void); | |
extern void (*pm_cpu_sleep)(void); | |
+ extern void (*pm_cpu_restore)(void); | |
/* Flags for PM Control */ | |
*************** | |
*** 100,105 **** | |
--- 101,107 ---- | |
extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count); | |
#ifdef CONFIG_PM | |
+ struct sys_device; | |
extern int s3c_irqext_wake(unsigned int irqno, unsigned int state); | |
extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state); | |
extern int s3c24xx_irq_resume(struct sys_device *dev); | |
*************** | |
*** 124,130 **** | |
#define S3C_PMDBG(fmt...) s3c_pm_dbg(fmt) | |
#else | |
! #define S3C_PMDBG(fmt...) printk(KERN_DEBUG fmt) | |
#endif | |
#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK | |
--- 126,132 ---- | |
#define S3C_PMDBG(fmt...) s3c_pm_dbg(fmt) | |
#else | |
! #define S3C_PMDBG(fmt...) pr_debug(fmt) | |
#endif | |
#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK | |
Only in 1/arch/arm/plat-samsung/include/plat: regs-otg.h | |
diff -crB 2/arch/arm/plat-samsung/include/plat/regs-rtc.h 1/arch/arm/plat-samsung/include/plat/regs-rtc.h | |
*** 2/arch/arm/plat-samsung/include/plat/regs-rtc.h 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/include/plat/regs-rtc.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 25,30 **** | |
--- 25,46 ---- | |
#define S3C64XX_RTCCON_TICMSK (0xF<<7) | |
#define S3C64XX_RTCCON_TICSHT (7) | |
+ #if defined(CONFIG_CPU_S5PC100) || defined(CONFIG_CPU_S5PV210) | |
+ #define S3C_MAX_CNT 32768 | |
+ #define S3C_RTCCON_TICEN (1<<8) | |
+ #define S3C_RTC_TICNT S3C2410_RTCREG(0x40) | |
+ #else | |
+ #define S3C_INTP_ALM (1<<1) | |
+ #define S3C_MAX_CNT 128 | |
+ #define S3C_RTCCON_TICEN (1<<7) | |
+ #define S3C_RTC_TICNT S3C2410_RTCREG(0x44) | |
+ #endif | |
+ | |
+ /* Common Reg for samsung AP*/ | |
+ #define S3C_INTP S3C2410_RTCREG(0x30) | |
+ #define S3C_INTP_ALM (1<<1) | |
+ #define S3C_INTP_TIC (1<<0) | |
+ | |
#define S3C2410_TICNT S3C2410_RTCREG(0x44) | |
#define S3C2410_TICNT_ENABLE (1<<7) | |
*************** | |
*** 60,65 **** | |
#define S3C2410_RTCDAY S3C2410_RTCREG(0x80) | |
#define S3C2410_RTCMON S3C2410_RTCREG(0x84) | |
#define S3C2410_RTCYEAR S3C2410_RTCREG(0x88) | |
! | |
#endif /* __ASM_ARCH_REGS_RTC_H */ | |
--- 76,81 ---- | |
#define S3C2410_RTCDAY S3C2410_RTCREG(0x80) | |
#define S3C2410_RTCMON S3C2410_RTCREG(0x84) | |
#define S3C2410_RTCYEAR S3C2410_RTCREG(0x88) | |
! #define S3C2410_CURTICCNT S3C2410_RTCREG(0x90) | |
#endif /* __ASM_ARCH_REGS_RTC_H */ | |
diff -crB 2/arch/arm/plat-samsung/include/plat/regs-sdhci.h 1/arch/arm/plat-samsung/include/plat/regs-sdhci.h | |
*** 2/arch/arm/plat-samsung/include/plat/regs-sdhci.h 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/include/plat/regs-sdhci.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 83,87 **** | |
#define S3C64XX_SDHCI_CONTROL4_DRIVE_9mA (0x3 << 16) | |
#define S3C64XX_SDHCI_CONTROL4_BUSY (1) | |
! | |
#endif /* __PLAT_S3C_SDHCI_REGS_H */ | |
--- 83,87 ---- | |
#define S3C64XX_SDHCI_CONTROL4_DRIVE_9mA (0x3 << 16) | |
#define S3C64XX_SDHCI_CONTROL4_BUSY (1) | |
! #define SDHCI_S3C_CTRL_8BITBUS (1 << 5) | |
#endif /* __PLAT_S3C_SDHCI_REGS_H */ | |
diff -crB 2/arch/arm/plat-samsung/include/plat/regs-serial.h 1/arch/arm/plat-samsung/include/plat/regs-serial.h | |
*** 2/arch/arm/plat-samsung/include/plat/regs-serial.h 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/include/plat/regs-serial.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 53,58 **** | |
--- 53,61 ---- | |
#define S3C2410_UERSTAT (0x14) | |
#define S3C2410_UFSTAT (0x18) | |
#define S3C2410_UMSTAT (0x1C) | |
+ #define S3C2410_UBRDIV (0x28) | |
+ #define S3C2410_UDIVSLOT (0x2C) | |
+ #define S3C2410_UINTMSK (0x38) | |
#define S3C2410_LCON_CFGMASK ((0xF<<3)|(0x3)) | |
*************** | |
*** 194,199 **** | |
--- 197,207 ---- | |
#define S3C64XX_UINTSP 0x34 | |
#define S3C64XX_UINTM 0x38 | |
+ /* S5V210 interrupt registers. */ | |
+ #define S5P_UINTP 0x30 | |
+ #define S5P_UINTSP 0x34 | |
+ #define S5P_UINTM 0x38 | |
+ | |
/* Following are specific to S5PV210 and S5P6442 */ | |
#define S5PV210_UCON_CLKMASK (1<<10) | |
#define S5PV210_UCON_PCLK (0<<10) | |
*************** | |
*** 257,263 **** | |
--- 265,275 ---- | |
unsigned char hwport; /* hardware port number */ | |
unsigned char unused; | |
unsigned short flags; | |
+ #if !defined(CONFIG_CPU_S5PV210) | |
upf_t uart_flags; /* default uart flags */ | |
+ #else | |
+ unsigned long uart_flags; /* default uart flags */ | |
+ #endif | |
unsigned long ucon; /* value of ucon for port */ | |
unsigned long ulcon; /* value of ulcon for port */ | |
*************** | |
*** 265,270 **** | |
--- 277,284 ---- | |
struct s3c24xx_uart_clksrc *clocks; | |
unsigned int clocks_size; | |
+ | |
+ void (*wake_peer)(struct uart_port *); | |
}; | |
/* s3c24xx_uart_devs | |
diff -crB 2/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h 1/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h | |
*** 2/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 32,37 **** | |
--- 32,43 ---- | |
DMACH_UART2_TX, | |
DMACH_UART3_RX, | |
DMACH_UART3_TX, | |
+ DMACH_UART4_RX, | |
+ DMACH_UART4_TX, | |
+ DMACH_UART5_RX, | |
+ DMACH_UART5_TX, | |
+ DMACH_USI_RX, | |
+ DMACH_USI_TX, | |
DMACH_IRDA, | |
DMACH_I2S0_RX, | |
DMACH_I2S0_TX, | |
*************** | |
*** 64,69 **** | |
--- 70,97 ---- | |
DMACH_MSM_REQ2, | |
DMACH_MSM_REQ1, | |
DMACH_MSM_REQ0, | |
+ DMACH_SLIMBUS0_RX, | |
+ DMACH_SLIMBUS0_TX, | |
+ DMACH_SLIMBUS0AUX_RX, | |
+ DMACH_SLIMBUS0AUX_TX, | |
+ DMACH_SLIMBUS1_RX, | |
+ DMACH_SLIMBUS1_TX, | |
+ DMACH_SLIMBUS2_RX, | |
+ DMACH_SLIMBUS2_TX, | |
+ DMACH_SLIMBUS3_RX, | |
+ DMACH_SLIMBUS3_TX, | |
+ DMACH_SLIMBUS4_RX, | |
+ DMACH_SLIMBUS4_TX, | |
+ DMACH_SLIMBUS5_RX, | |
+ DMACH_SLIMBUS5_TX, | |
+ DMACH_MTOM_0, | |
+ DMACH_MTOM_1, | |
+ DMACH_MTOM_2, | |
+ DMACH_MTOM_3, | |
+ DMACH_MTOM_4, | |
+ DMACH_MTOM_5, | |
+ DMACH_MTOM_6, | |
+ DMACH_MTOM_7, | |
/* END Marker, also used to denote a reserved channel */ | |
DMACH_MAX, | |
}; | |
diff -crB 2/arch/arm/plat-samsung/include/plat/sdhci.h 1/arch/arm/plat-samsung/include/plat/sdhci.h | |
*** 2/arch/arm/plat-samsung/include/plat/sdhci.h 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/include/plat/sdhci.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 45,50 **** | |
--- 45,69 ---- | |
void __iomem *regbase, | |
struct mmc_ios *ios, | |
struct mmc_card *card); | |
+ void (*adjust_cfg_card)(struct s3c_sdhci_platdata *pdata, void __iomem *regbase, int rw); | |
+ int rx_cfg; | |
+ int tx_cfg; | |
+ | |
+ /* add to deal with EXT_IRQ as a card detect pin */ | |
+ void (*cfg_ext_cd) (void); | |
+ unsigned int (*detect_ext_cd) (void); | |
+ #ifdef CONFIG_MACH_P1 | |
+ void (*translate_vdd)(struct platform_device *pdev, unsigned int vdd); | |
+ #endif | |
+ unsigned int ext_cd; | |
+ | |
+ /* add to deal with GPIO as a card write protection pin */ | |
+ void (*cfg_wp) (void); | |
+ int (*get_ro) (struct mmc_host *mmc); | |
+ | |
+ /* add to deal with non-removable device */ | |
+ int built_in; | |
+ | |
}; | |
/** | |
*************** | |
*** 55,63 **** | |
--- 74,84 ---- | |
* The call will copy the platform data, so the board definitions can | |
* make the structure itself __initdata. | |
*/ | |
+ extern void s3c_sdhci_set_platdata(void); | |
extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd); | |
extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd); | |
extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd); | |
+ extern void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd); | |
/* Default platform data, exported so that per-cpu initialisation can | |
* set the correct one when there are more than one cpu type selected. | |
*************** | |
*** 66,71 **** | |
--- 87,93 ---- | |
extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata; | |
extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata; | |
extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata; | |
+ extern struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata; | |
/* Helper function availablity */ | |
*************** | |
*** 78,83 **** | |
--- 100,106 ---- | |
extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w); | |
extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | |
extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | |
+ extern void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *, int w); | |
/* S3C6400 SDHCI setup */ | |
*************** | |
*** 229,237 **** | |
extern char *s5pv210_hsmmc_clksrcs[4]; | |
extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, | |
! void __iomem *r, | |
! struct mmc_ios *ios, | |
! struct mmc_card *card); | |
#ifdef CONFIG_S3C_DEV_HSMMC | |
static inline void s5pv210_default_sdhci0(void) | |
--- 252,261 ---- | |
extern char *s5pv210_hsmmc_clksrcs[4]; | |
extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, | |
! void __iomem *r, | |
! struct mmc_ios *ios, | |
! struct mmc_card *card); | |
! extern void s5pv210_adjust_sdhci_cfg_card(struct s3c_sdhci_platdata *pdata, void __iomem *r, int rw); | |
#ifdef CONFIG_S3C_DEV_HSMMC | |
static inline void s5pv210_default_sdhci0(void) | |
*************** | |
*** 239,244 **** | |
--- 263,269 ---- | |
s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | |
s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; | |
s3c_hsmmc0_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | |
+ s3c_hsmmc0_def_platdata.adjust_cfg_card = s5pv210_adjust_sdhci_cfg_card; | |
} | |
#else | |
static inline void s5pv210_default_sdhci0(void) { } | |
*************** | |
*** 250,255 **** | |
--- 275,281 ---- | |
s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | |
s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; | |
s3c_hsmmc1_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | |
+ s3c_hsmmc1_def_platdata.adjust_cfg_card = s5pv210_adjust_sdhci_cfg_card; | |
} | |
#else | |
static inline void s5pv210_default_sdhci1(void) { } | |
*************** | |
*** 261,278 **** | |
s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | |
s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; | |
s3c_hsmmc2_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | |
} | |
#else | |
static inline void s5pv210_default_sdhci2(void) { } | |
#endif /* CONFIG_S3C_DEV_HSMMC2 */ | |
#else | |
static inline void s5pv210_default_sdhci0(void) { } | |
static inline void s5pv210_default_sdhci1(void) { } | |
static inline void s5pv210_default_sdhci2(void) { } | |
! #endif /* CONFIG_S5PC100_SETUP_SDHCI */ | |
! | |
! | |
#endif /* __PLAT_S3C_SDHCI_H */ | |
--- 287,317 ---- | |
s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | |
s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; | |
s3c_hsmmc2_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | |
+ s3c_hsmmc2_def_platdata.adjust_cfg_card = s5pv210_adjust_sdhci_cfg_card; | |
} | |
#else | |
static inline void s5pv210_default_sdhci2(void) { } | |
#endif /* CONFIG_S3C_DEV_HSMMC2 */ | |
+ #ifdef CONFIG_S3C_DEV_HSMMC3 | |
+ static inline void s5pv210_default_sdhci3(void) | |
+ { | |
+ s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | |
+ s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; | |
+ s3c_hsmmc3_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | |
+ s3c_hsmmc3_def_platdata.adjust_cfg_card = s5pv210_adjust_sdhci_cfg_card; | |
+ } | |
+ #else | |
+ static inline void s5pv210_default_sdhci3(void) { } | |
+ #endif /* CONFIG_S3C_DEV_HSMMC2 */ | |
+ | |
#else | |
static inline void s5pv210_default_sdhci0(void) { } | |
static inline void s5pv210_default_sdhci1(void) { } | |
static inline void s5pv210_default_sdhci2(void) { } | |
! static inline void s5pv210_default_sdhci3(void) { } | |
! #endif /* CONFIG_S5PV210_SETUP_SDHCI */ | |
+ extern void sdhci_s3c_force_presence_change(struct platform_device *pdev); | |
#endif /* __PLAT_S3C_SDHCI_H */ | |
diff -crB 2/arch/arm/plat-samsung/include/plat/watchdog-reset.h 1/arch/arm/plat-samsung/include/plat/watchdog-reset.h | |
*** 2/arch/arm/plat-samsung/include/plat/watchdog-reset.h 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/include/plat/watchdog-reset.h 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 19,36 **** | |
static inline void arch_wdt_reset(void) | |
{ | |
- struct clk *wdtclk; | |
- | |
printk("arch_reset: attempting watchdog reset\n"); | |
__raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */ | |
- wdtclk = clk_get(NULL, "watchdog"); | |
- if (!IS_ERR(wdtclk)) { | |
- clk_enable(wdtclk); | |
- } else | |
- printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__); | |
- | |
/* put initial values into count and data */ | |
__raw_writel(0x80, S3C2410_WTCNT); | |
__raw_writel(0x80, S3C2410_WTDAT); | |
--- 19,28 ---- | |
diff -crB 2/arch/arm/plat-samsung/Kconfig 1/arch/arm/plat-samsung/Kconfig | |
*** 2/arch/arm/plat-samsung/Kconfig 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/Kconfig 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 160,165 **** | |
--- 160,170 ---- | |
help | |
Compile in platform device definitions for HSMMC channel 2 | |
+ config S3C_DEV_HSMMC3 | |
+ bool | |
+ help | |
+ Compile in platform device definitions for HSMMC channel 3 | |
+ | |
config S3C_DEV_HWMON | |
bool | |
help | |
diff -crB 2/arch/arm/plat-samsung/Makefile 1/arch/arm/plat-samsung/Makefile | |
*** 2/arch/arm/plat-samsung/Makefile 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/Makefile 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 12,18 **** | |
--- 12,20 ---- | |
# Objects we always build independent of SoC choice | |
obj-y += init.o | |
+ ifndef CONFIG_S5P_HIGH_RES_TIMERS | |
obj-y += time.o | |
+ endif | |
obj-y += clock.o | |
obj-y += pwm-clock.o | |
obj-y += gpio.o | |
*************** | |
*** 33,38 **** | |
--- 35,41 ---- | |
obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o | |
obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o | |
obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o | |
+ obj-$(CONFIG_S3C_DEV_HSMMC3) += dev-hsmmc3.o | |
obj-$(CONFIG_S3C_DEV_HWMON) += dev-hwmon.o | |
obj-y += dev-i2c0.o | |
obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o | |
diff -crB 2/arch/arm/plat-samsung/pm.c 1/arch/arm/plat-samsung/pm.c | |
*** 2/arch/arm/plat-samsung/pm.c 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/pm.c 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 26,40 **** | |
--- 26,112 ---- | |
#include <plat/regs-serial.h> | |
#include <mach/regs-clock.h> | |
#include <mach/regs-irq.h> | |
+ #include <asm/fiq_glue.h> | |
#include <asm/irq.h> | |
#include <plat/pm.h> | |
+ #include <plat/irq-eint-group.h> | |
#include <mach/pm-core.h> | |
/* for external use */ | |
unsigned long s3c_pm_flags; | |
+ /* ---------------------------------------------- */ | |
+ extern unsigned int pm_debug_scratchpad; | |
+ #include <linux/slab.h> | |
+ #include <linux/debugfs.h> | |
+ #include <linux/uaccess.h> | |
+ #include <linux/module.h> | |
+ | |
+ #define PMSTATS_MAGIC "*PM*DEBUG*STATS*" | |
+ | |
+ struct pmstats { | |
+ char magic[16]; | |
+ unsigned sleep_count; | |
+ unsigned wake_count; | |
+ unsigned sleep_freq; | |
+ unsigned wake_freq; | |
+ }; | |
+ | |
+ static struct pmstats *pmstats; | |
+ static struct pmstats *pmstats_last; | |
+ | |
+ static ssize_t pmstats_read(struct file *file, char __user *buf, | |
+ size_t len, loff_t *offset) | |
+ { | |
+ if (*offset != 0) | |
+ return 0; | |
+ if (len > 4096) | |
+ len = 4096; | |
+ | |
+ if (copy_to_user(buf, file->private_data, len)) | |
+ return -EFAULT; | |
+ | |
+ *offset += len; | |
+ return len; | |
+ } | |
+ | |
+ static int pmstats_open(struct inode *inode, struct file *file) | |
+ { | |
+ file->private_data = inode->i_private; | |
+ return 0; | |
+ } | |
+ | |
+ static const struct file_operations pmstats_ops = { | |
+ .owner = THIS_MODULE, | |
+ .read = pmstats_read, | |
+ .open = pmstats_open, | |
+ }; | |
+ | |
+ void __init pmstats_init(void) | |
+ { | |
+ pr_info("pmstats at %08x\n", pm_debug_scratchpad); | |
+ if (pm_debug_scratchpad) | |
+ pmstats = ioremap(pm_debug_scratchpad, 4096); | |
+ else | |
+ pmstats = kzalloc(4096, GFP_ATOMIC); | |
+ | |
+ if (!memcmp(pmstats->magic, PMSTATS_MAGIC, 16)) { | |
+ pmstats_last = kzalloc(4096, GFP_ATOMIC); | |
+ if (pmstats_last) | |
+ memcpy(pmstats_last, pmstats, 4096); | |
+ } | |
+ | |
+ memset(pmstats, 0, 4096); | |
+ memcpy(pmstats->magic, PMSTATS_MAGIC, 16); | |
+ | |
+ debugfs_create_file("pmstats", 0444, NULL, pmstats, &pmstats_ops); | |
+ if (pmstats_last) | |
+ debugfs_create_file("pmstats_last", 0444, NULL, pmstats_last, &pmstats_ops); | |
+ } | |
+ /* ---------------------------------------------- */ | |
+ | |
/* Debug code: | |
* | |
* This code supports debug output to the low level UARTs for use on | |
*************** | |
*** 185,196 **** | |
void s3c_pm_do_restore(struct sleep_save *ptr, int count) | |
{ | |
! for (; count > 0; count--, ptr++) { | |
! printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n", | |
! ptr->reg, ptr->val, __raw_readl(ptr->reg)); | |
! | |
__raw_writel(ptr->val, ptr->reg); | |
- } | |
} | |
/** | |
--- 257,264 ---- | |
void s3c_pm_do_restore(struct sleep_save *ptr, int count) | |
{ | |
! for (; count > 0; count--, ptr++) | |
__raw_writel(ptr->val, ptr->reg); | |
} | |
/** | |
*************** | |
*** 231,236 **** | |
--- 299,305 ---- | |
void (*pm_cpu_prep)(void); | |
void (*pm_cpu_sleep)(void); | |
+ void (*pm_cpu_restore)(void); | |
#define any_allowed(mask, allow) (((mask) & (allow)) != (allow)) | |
*************** | |
*** 239,244 **** | |
--- 308,316 ---- | |
* central control for sleep/resume process | |
*/ | |
+ extern void s3c_config_sleep_gpio(void); | |
+ | |
+ | |
static int s3c_pm_enter(suspend_state_t state) | |
{ | |
static unsigned long regs_save[16]; | |
*************** | |
*** 278,283 **** | |
--- 350,358 ---- | |
s3c_pm_save_uarts(); | |
s3c_pm_save_core(); | |
+ | |
+ s3c_config_sleep_gpio(); | |
+ | |
/* set the irq configuration for wake */ | |
s3c_pm_configure_extint(); | |
*************** | |
*** 297,302 **** | |
--- 372,380 ---- | |
s3c_pm_check_store(); | |
+ /* clear wakeup_stat register for next wakeup reason */ | |
+ __raw_writel(__raw_readl(S5P_WAKEUP_STAT), S5P_WAKEUP_STAT); | |
+ | |
/* send the cpu to sleep... */ | |
s3c_pm_arch_stop_clocks(); | |
*************** | |
*** 305,324 **** | |
* we resume as it saves its own register state and restores it | |
* during the resume. */ | |
s3c_cpu_save(regs_save); | |
/* restore the cpu state using the kernel's cpu init code. */ | |
cpu_init(); | |
! /* restore the system state */ | |
s3c_pm_restore_core(); | |
s3c_pm_restore_uarts(); | |
s3c_pm_restore_gpios(); | |
s3c_pm_debug_init(); | |
/* check what irq (if any) restored the system */ | |
s3c_pm_arch_show_resume_irqs(); | |
--- 383,413 ---- | |
* we resume as it saves its own register state and restores it | |
* during the resume. */ | |
+ pmstats->sleep_count++; | |
+ pmstats->sleep_freq = __raw_readl(S5P_CLK_DIV0); | |
s3c_cpu_save(regs_save); | |
+ pmstats->wake_count++; | |
+ pmstats->wake_freq = __raw_readl(S5P_CLK_DIV0); | |
/* restore the cpu state using the kernel's cpu init code. */ | |
cpu_init(); | |
! fiq_glue_resume(); | |
! local_fiq_enable(); | |
s3c_pm_restore_core(); | |
s3c_pm_restore_uarts(); | |
s3c_pm_restore_gpios(); | |
+ s5pv210_restore_eint_group(); | |
s3c_pm_debug_init(); | |
+ /* restore the system state */ | |
+ | |
+ if (pm_cpu_restore) | |
+ pm_cpu_restore(); | |
+ | |
/* check what irq (if any) restored the system */ | |
s3c_pm_arch_show_resume_irqs(); | |
*************** | |
*** 372,377 **** | |
--- 461,467 ---- | |
int __init s3c_pm_init(void) | |
{ | |
printk("S3C Power Management, Copyright 2004 Simtec Electronics\n"); | |
+ pmstats_init(); | |
suspend_set_ops(&s3c_pm_ops); | |
return 0; | |
diff -crB 2/arch/arm/plat-samsung/pm-gpio.c 1/arch/arm/plat-samsung/pm-gpio.c | |
*** 2/arch/arm/plat-samsung/pm-gpio.c 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/pm-gpio.c 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 27,32 **** | |
--- 27,35 ---- | |
#define OFFS_CON (0x00) | |
#define OFFS_DAT (0x04) | |
#define OFFS_UP (0x08) | |
+ #define OFFS_DRV (0x0C) | |
+ #define OFFS_CONPDN (0x10) | |
+ #define OFFS_PUDPDN (0x14) | |
static void s3c_gpio_pm_1bit_save(struct s3c_gpio_chip *chip) | |
{ | |
*************** | |
*** 192,203 **** | |
.resume = s3c_gpio_pm_2bit_resume, | |
}; | |
! #ifdef CONFIG_ARCH_S3C64XX | |
static void s3c_gpio_pm_4bit_save(struct s3c_gpio_chip *chip) | |
{ | |
chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON); | |
chip->pm_save[2] = __raw_readl(chip->base + OFFS_DAT); | |
chip->pm_save[3] = __raw_readl(chip->base + OFFS_UP); | |
if (chip->chip.ngpio > 8) | |
chip->pm_save[0] = __raw_readl(chip->base - 4); | |
--- 195,209 ---- | |
.resume = s3c_gpio_pm_2bit_resume, | |
}; | |
! #if defined(CONFIG_ARCH_S3C64XX) || defined(CONFIG_PLAT_S5P) | |
static void s3c_gpio_pm_4bit_save(struct s3c_gpio_chip *chip) | |
{ | |
chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON); | |
chip->pm_save[2] = __raw_readl(chip->base + OFFS_DAT); | |
chip->pm_save[3] = __raw_readl(chip->base + OFFS_UP); | |
+ chip->pm_save[4] = __raw_readl(chip->base + OFFS_DRV); | |
+ chip->pm_save[5] = __raw_readl(chip->base + OFFS_CONPDN); | |
+ chip->pm_save[6] = __raw_readl(chip->base + OFFS_PUDPDN); | |
if (chip->chip.ngpio > 8) | |
chip->pm_save[0] = __raw_readl(chip->base - 4); | |
*************** | |
*** 284,289 **** | |
--- 290,298 ---- | |
__raw_writel(chip->pm_save[2], base + OFFS_DAT); | |
__raw_writel(chip->pm_save[3], base + OFFS_UP); | |
+ __raw_writel(chip->pm_save[4], base + OFFS_DRV); | |
+ __raw_writel(chip->pm_save[5], base + OFFS_CONPDN); | |
+ __raw_writel(chip->pm_save[6], base + OFFS_PUDPDN); | |
if (chip->chip.ngpio > 8) { | |
S3C_PMDBG("%s: CON4 %08x,%08x => %08x,%08x, DAT %08x => %08x\n", | |
*************** | |
*** 302,308 **** | |
.save = s3c_gpio_pm_4bit_save, | |
.resume = s3c_gpio_pm_4bit_resume, | |
}; | |
! #endif /* CONFIG_ARCH_S3C64XX */ | |
/** | |
* s3c_pm_save_gpio() - save gpio chip data for suspend | |
--- 311,317 ---- | |
.save = s3c_gpio_pm_4bit_save, | |
.resume = s3c_gpio_pm_4bit_resume, | |
}; | |
! #endif /* CONFIG_ARCH_S3C64XX || CONFIG_PLAT_S5P */ | |
/** | |
* s3c_pm_save_gpio() - save gpio chip data for suspend | |
diff -crB 2/arch/arm/plat-samsung/pwm.c 1/arch/arm/plat-samsung/pwm.c | |
*** 2/arch/arm/plat-samsung/pwm.c 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/pwm.c 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 46,51 **** | |
--- 46,52 ---- | |
#define pwm_dbg(_pwm, msg...) dev_dbg(&(_pwm)->pdev->dev, msg) | |
static struct clk *clk_scaler[2]; | |
+ static DEFINE_SPINLOCK(pwm_spin_lock); | |
/* Standard setup for a timer block. */ | |
*************** | |
*** 141,155 **** | |
unsigned long flags; | |
unsigned long tcon; | |
! local_irq_save(flags); | |
! tcon = __raw_readl(S3C2410_TCON); | |
! tcon |= pwm_tcon_start(pwm); | |
! __raw_writel(tcon, S3C2410_TCON); | |
! local_irq_restore(flags); | |
- pwm->running = 1; | |
return 0; | |
} | |
--- 142,162 ---- | |
unsigned long flags; | |
unsigned long tcon; | |
! spin_lock_irqsave(&pwm_spin_lock, flags); | |
! if (!pwm->running) { | |
! clk_enable(pwm->clk); | |
! clk_enable(pwm->clk_div); | |
! tcon = __raw_readl(S3C2410_TCON); | |
! tcon |= pwm_tcon_start(pwm); | |
! __raw_writel(tcon, S3C2410_TCON); | |
! | |
! pwm->running = 1; | |
! } | |
! | |
! spin_unlock_irqrestore(&pwm_spin_lock, flags); | |
return 0; | |
} | |
*************** | |
*** 160,174 **** | |
unsigned long flags; | |
unsigned long tcon; | |
! local_irq_save(flags); | |
! tcon = __raw_readl(S3C2410_TCON); | |
! tcon &= ~pwm_tcon_start(pwm); | |
! __raw_writel(tcon, S3C2410_TCON); | |
! local_irq_restore(flags); | |
! pwm->running = 0; | |
} | |
EXPORT_SYMBOL(pwm_disable); | |
--- 167,186 ---- | |
unsigned long flags; | |
unsigned long tcon; | |
! spin_lock_irqsave(&pwm_spin_lock, flags); | |
! if (pwm->running) { | |
! tcon = __raw_readl(S3C2410_TCON); | |
! tcon &= ~pwm_tcon_start(pwm); | |
! __raw_writel(tcon, S3C2410_TCON); | |
! clk_disable(pwm->clk); | |
! clk_disable(pwm->clk_div); | |
! pwm->running = 0; | |
! } | |
! | |
! spin_unlock_irqrestore(&pwm_spin_lock, flags); | |
} | |
EXPORT_SYMBOL(pwm_disable); | |
*************** | |
*** 218,223 **** | |
--- 230,238 ---- | |
/* The TCMP and TCNT can be read without a lock, they're not | |
* shared between the timers. */ | |
+ clk_enable(pwm->clk); | |
+ clk_enable(pwm->clk_div); | |
+ | |
tcmp = __raw_readl(S3C2410_TCMPB(pwm->pwm_id)); | |
tcnt = __raw_readl(S3C2410_TCNTB(pwm->pwm_id)); | |
*************** | |
*** 260,266 **** | |
/* Update the PWM register block. */ | |
! local_irq_save(flags); | |
__raw_writel(tcmp, S3C2410_TCMPB(pwm->pwm_id)); | |
__raw_writel(tcnt, S3C2410_TCNTB(pwm->pwm_id)); | |
--- 275,281 ---- | |
/* Update the PWM register block. */ | |
! spin_lock_irqsave(&pwm_spin_lock, flags); | |
__raw_writel(tcmp, S3C2410_TCMPB(pwm->pwm_id)); | |
__raw_writel(tcnt, S3C2410_TCNTB(pwm->pwm_id)); | |
*************** | |
*** 273,281 **** | |
tcon &= ~pwm_tcon_manulupdate(pwm); | |
__raw_writel(tcon, S3C2410_TCON); | |
! local_irq_restore(flags); | |
return 0; | |
} | |
EXPORT_SYMBOL(pwm_config); | |
--- 288,300 ---- | |
tcon &= ~pwm_tcon_manulupdate(pwm); | |
__raw_writel(tcon, S3C2410_TCON); | |
! spin_unlock_irqrestore(&pwm_spin_lock, flags); | |
! | |
! clk_disable(pwm->clk); | |
! clk_disable(pwm->clk_div); | |
return 0; | |
+ | |
} | |
EXPORT_SYMBOL(pwm_config); | |
*************** | |
*** 332,345 **** | |
goto err_clk_tin; | |
} | |
! local_irq_save(flags); | |
tcon = __raw_readl(S3C2410_TCON); | |
tcon |= pwm_tcon_invert(pwm); | |
__raw_writel(tcon, S3C2410_TCON); | |
! local_irq_restore(flags); | |
! | |
ret = pwm_register(pwm); | |
if (ret) { | |
--- 351,363 ---- | |
goto err_clk_tin; | |
} | |
! spin_lock_irqsave(&pwm_spin_lock, flags); | |
tcon = __raw_readl(S3C2410_TCON); | |
tcon |= pwm_tcon_invert(pwm); | |
__raw_writel(tcon, S3C2410_TCON); | |
! spin_unlock_irqrestore(&pwm_spin_lock, flags); | |
ret = pwm_register(pwm); | |
if (ret) { | |
diff -crB 2/arch/arm/plat-samsung/s3c-pl330.c 1/arch/arm/plat-samsung/s3c-pl330.c | |
*** 2/arch/arm/plat-samsung/s3c-pl330.c 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/s3c-pl330.c 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 1,4 **** | |
! /* linux/arch/arm/plat-samsung/s3c-pl330.c | |
* | |
* Copyright (C) 2010 Samsung Electronics Co. Ltd. | |
* Jaswinder Singh <jassi.brar@samsung.com> | |
--- 1,4 ---- | |
! /* linux/arch/arm/plat-samsung/s3c-pl330.c | |
* | |
* Copyright (C) 2010 Samsung Electronics Co. Ltd. | |
* Jaswinder Singh <jassi.brar@samsung.com> | |
*************** | |
*** 15,20 **** | |
--- 15,21 ---- | |
#include <linux/io.h> | |
#include <linux/slab.h> | |
#include <linux/platform_device.h> | |
+ #include <linux/clk.h> | |
#include <asm/hardware/pl330.h> | |
*************** | |
*** 34,39 **** | |
--- 35,41 ---- | |
struct list_head node; | |
struct pl330_info *pi; | |
struct kmem_cache *kmcache; | |
+ struct clk *dmaclk; | |
}; | |
/** | |
*************** | |
*** 494,502 **** | |
spin_lock_irqsave(&res_lock, flags); | |
! r->x = NULL; | |
! s3c_pl330_submit(ch, r); | |
spin_unlock_irqrestore(&res_lock, flags); | |
--- 496,506 ---- | |
spin_lock_irqsave(&res_lock, flags); | |
! if(!r->autoload) { | |
! r->x = NULL; | |
! s3c_pl330_submit(ch, r); | |
! } | |
spin_unlock_irqrestore(&res_lock, flags); | |
*************** | |
*** 509,520 **** | |
res = S3C2410_RES_ERR; | |
/* If last request had some xfer */ | |
! if (xl) { | |
! xfer = container_of(xl, struct s3c_pl330_xfer, px); | |
! _finish_off(xfer, res, 0); | |
} else { | |
! dev_info(ch->dmac->pi->dev, "%s:%d No Xfer?!\n", | |
! __func__, __LINE__); | |
} | |
} | |
--- 513,532 ---- | |
res = S3C2410_RES_ERR; | |
/* If last request had some xfer */ | |
! if(!r->autoload) { | |
! if (xl) { | |
! xfer = container_of(xl, struct s3c_pl330_xfer, px); | |
! _finish_off(xfer, res, 0); | |
! } else { | |
! dev_info(ch->dmac->pi->dev, "%s:%d No Xfer?!\n", | |
! __func__, __LINE__); | |
! } | |
} else { | |
! /* Do callback */ | |
! | |
! xfer = container_of(xl, struct s3c_pl330_xfer, px); | |
! if (ch->callback_fn) | |
! ch->callback_fn(NULL, xfer->token, xfer->px.bytes, res); | |
} | |
} | |
*************** | |
*** 656,661 **** | |
--- 668,745 ---- | |
} | |
EXPORT_SYMBOL(s3c2410_dma_ctrl); | |
+ | |
+ | |
+ int s3c2410_dma_enqueue_autoload(enum dma_ch id, void *token, | |
+ dma_addr_t addr, int size, int numofblock) | |
+ { | |
+ struct s3c_pl330_chan *ch; | |
+ struct s3c_pl330_xfer *xfer; | |
+ unsigned long flags; | |
+ int idx, ret = 0; | |
+ | |
+ spin_lock_irqsave(&res_lock, flags); | |
+ | |
+ ch = id_to_chan(id); | |
+ | |
+ /* Error if invalid or free channel */ | |
+ if (!ch || chan_free(ch)) { | |
+ ret = -EINVAL; | |
+ goto enq_exit; | |
+ } | |
+ | |
+ /* Error if size is unaligned */ | |
+ if (ch->rqcfg.brst_size && size % (1 << ch->rqcfg.brst_size)) { | |
+ ret = -EINVAL; | |
+ goto enq_exit; | |
+ } | |
+ | |
+ xfer = kmem_cache_alloc(ch->dmac->kmcache, GFP_ATOMIC); | |
+ if (!xfer) { | |
+ ret = -ENOMEM; | |
+ goto enq_exit; | |
+ } | |
+ | |
+ xfer->token = token; | |
+ xfer->chan = ch; | |
+ xfer->px.bytes = size; | |
+ xfer->px.next = NULL; /* Single request */ | |
+ | |
+ /* For S3C DMA API, direction is always fixed for all xfers */ | |
+ if (ch->req[0].rqtype == MEMTODEV) { | |
+ xfer->px.src_addr = addr; | |
+ xfer->px.dst_addr = ch->sdaddr; | |
+ } else { | |
+ xfer->px.src_addr = ch->sdaddr; | |
+ xfer->px.dst_addr = addr; | |
+ } | |
+ | |
+ add_to_queue(ch, xfer, 0); | |
+ | |
+ /* Try submitting on either request */ | |
+ idx = (ch->lrq == &ch->req[0]) ? 1 : 0; | |
+ | |
+ if (!ch->req[idx].x) { | |
+ ch->req[idx].autoload = numofblock; | |
+ s3c_pl330_submit(ch, &ch->req[idx]); | |
+ } | |
+ else { | |
+ ch->req[1 - idx].autoload = numofblock; | |
+ s3c_pl330_submit(ch, &ch->req[1 - idx]); | |
+ } | |
+ spin_unlock_irqrestore(&res_lock, flags); | |
+ | |
+ if (ch->options & S3C2410_DMAF_AUTOSTART) | |
+ s3c2410_dma_ctrl(id, S3C2410_DMAOP_START); | |
+ | |
+ return 0; | |
+ | |
+ enq_exit: | |
+ spin_unlock_irqrestore(&res_lock, flags); | |
+ | |
+ return ret; | |
+ } | |
+ | |
int s3c2410_dma_enqueue(enum dma_ch id, void *token, | |
dma_addr_t addr, int size) | |
{ | |
*************** | |
*** 705,714 **** | |
/* Try submitting on either request */ | |
idx = (ch->lrq == &ch->req[0]) ? 1 : 0; | |
! if (!ch->req[idx].x) | |
s3c_pl330_submit(ch, &ch->req[idx]); | |
! else | |
s3c_pl330_submit(ch, &ch->req[1 - idx]); | |
spin_unlock_irqrestore(&res_lock, flags); | |
--- 789,802 ---- | |
/* Try submitting on either request */ | |
idx = (ch->lrq == &ch->req[0]) ? 1 : 0; | |
! if (!ch->req[idx].x) { | |
! ch->req[idx].autoload = false; | |
s3c_pl330_submit(ch, &ch->req[idx]); | |
! } | |
! else { | |
! ch->req[1 - idx].autoload = false; | |
s3c_pl330_submit(ch, &ch->req[1 - idx]); | |
+ } | |
spin_unlock_irqrestore(&res_lock, flags); | |
*************** | |
*** 743,750 **** | |
--- 831,841 ---- | |
dmac = ch->dmac; | |
+ clk_enable(dmac->dmaclk); | |
+ | |
ch->pl330_chan_id = pl330_request_channel(dmac->pi); | |
if (!ch->pl330_chan_id) { | |
+ clk_disable(dmac->dmaclk); | |
chan_release(ch); | |
ret = -EBUSY; | |
goto req_exit; | |
*************** | |
*** 856,862 **** | |
pl330_release_channel(ch->pl330_chan_id); | |
ch->pl330_chan_id = NULL; | |
! | |
chan_release(ch); | |
free_exit: | |
--- 947,953 ---- | |
pl330_release_channel(ch->pl330_chan_id); | |
ch->pl330_chan_id = NULL; | |
! clk_disable(ch->dmac->dmaclk); | |
chan_release(ch); | |
free_exit: | |
*************** | |
*** 982,987 **** | |
--- 1073,1090 ---- | |
ch->rqcfg.src_inc = 1; | |
ch->rqcfg.dst_inc = 0; | |
break; | |
+ case S3C_DMA_MEM2MEM: | |
+ ch->req[0].rqtype = MEMTOMEM; | |
+ ch->req[1].rqtype = MEMTOMEM; | |
+ ch->rqcfg.src_inc = 1; | |
+ ch->rqcfg.dst_inc = 1; | |
+ break; | |
+ case S3C_DMA_MEM2MEM_SET: | |
+ ch->req[0].rqtype = MEMTOMEM; | |
+ ch->req[1].rqtype = MEMTOMEM; | |
+ ch->rqcfg.src_inc = 0; | |
+ ch->rqcfg.dst_inc = 1; | |
+ break; | |
default: | |
ret = -EINVAL; | |
goto devcfg_exit; | |
*************** | |
*** 1030,1035 **** | |
--- 1133,1139 ---- | |
struct s3c_pl330_platdata *pl330pd; | |
struct pl330_info *pl330_info; | |
struct resource *res; | |
+ struct clk *dmaclk; | |
int i, ret, irq; | |
pl330pd = pdev->dev.platform_data; | |
*************** | |
*** 1053,1058 **** | |
--- 1157,1171 ---- | |
goto probe_err1; | |
} | |
+ dmaclk = clk_get(&pdev->dev, "dma"); | |
+ if (dmaclk == NULL) { | |
+ dev_err(&pdev->dev, "failed to find dma clock source\n"); | |
+ ret = -ENODEV; | |
+ goto probe_err1; | |
+ } | |
+ | |
+ clk_enable(dmaclk); | |
+ | |
request_mem_region(res->start, resource_size(res), pdev->name); | |
pl330_info->base = ioremap(res->start, resource_size(res)); | |
*************** | |
*** 1083,1088 **** | |
--- 1196,1204 ---- | |
goto probe_err6; | |
} | |
+ /* Clock */ | |
+ s3c_pl330_dmac->dmaclk = dmaclk; | |
+ | |
/* Hook the info */ | |
s3c_pl330_dmac->pi = pl330_info; | |
*************** | |
*** 1118,1123 **** | |
--- 1234,1240 ---- | |
pl330_info->pcfg.data_bus_width / 8, pl330_info->pcfg.num_chan, | |
pl330_info->pcfg.num_peri, pl330_info->pcfg.num_events); | |
+ clk_disable(dmaclk); | |
return 0; | |
probe_err7: | |
*************** | |
*** 1131,1136 **** | |
--- 1248,1255 ---- | |
iounmap(pl330_info->base); | |
probe_err2: | |
release_mem_region(res->start, resource_size(res)); | |
+ clk_disable(dmaclk); | |
+ clk_put(dmaclk); | |
probe_err1: | |
kfree(pl330_info); | |
*************** | |
*** 1140,1146 **** | |
static int pl330_remove(struct platform_device *pdev) | |
{ | |
struct s3c_pl330_dmac *dmac, *d; | |
! struct s3c_pl330_chan *ch; | |
unsigned long flags; | |
int del, found; | |
--- 1259,1265 ---- | |
static int pl330_remove(struct platform_device *pdev) | |
{ | |
struct s3c_pl330_dmac *dmac, *d; | |
! struct s3c_pl330_chan *ch, *cht; | |
unsigned long flags; | |
int del, found; | |
*************** | |
*** 1164,1170 **** | |
dmac = d; | |
/* Remove all Channels that are managed only by this DMAC */ | |
! list_for_each_entry(ch, &chan_list, node) { | |
/* Only channels that are handled by this DMAC */ | |
if (iface_of_dmac(dmac, ch->id)) | |
--- 1283,1289 ---- | |
dmac = d; | |
/* Remove all Channels that are managed only by this DMAC */ | |
! list_for_each_entry_safe(ch, cht, &chan_list, node) { | |
/* Only channels that are handled by this DMAC */ | |
if (iface_of_dmac(dmac, ch->id)) | |
*************** | |
*** 1190,1195 **** | |
--- 1309,1315 ---- | |
/* Remove the DMAC */ | |
list_del(&dmac->node); | |
+ clk_put(dmac->dmaclk); | |
kfree(dmac); | |
spin_unlock_irqrestore(&res_lock, flags); | |
diff -crB 2/arch/arm/plat-samsung/time.c 1/arch/arm/plat-samsung/time.c | |
*** 2/arch/arm/plat-samsung/time.c 2012-09-24 11:44:00.354845724 +0530 | |
--- 1/arch/arm/plat-samsung/time.c 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 132,138 **** | |
--- 132,140 ---- | |
static irqreturn_t | |
s3c2410_timer_interrupt(int irq, void *dev_id) | |
{ | |
+ #ifndef CONFIG_GENERIC_CLOCKEVENTS | |
timer_tick(); | |
+ #endif | |
return IRQ_HANDLED; | |
} | |
diff -crB 2/arch/arm/tools/mach-types 1/arch/arm/tools/mach-types | |
*** 2/arch/arm/tools/mach-types 2012-09-24 11:44:00.422844451 +0530 | |
--- 1/arch/arm/tools/mach-types 2011-05-18 12:34:15.000000000 +0530 | |
*************** | |
*** 2950,2952 **** | |
--- 2950,2954 ---- | |
netviz MACH_NETVIZ NETVIZ 2964 | |
flexibity MACH_FLEXIBITY FLEXIBITY 2965 | |
wlan_computer MACH_WLAN_COMPUTER WLAN_COMPUTER 2966 | |
+ herring MACH_HERRING HERRING 3084 | |
+ p1 MACH_P1 P1 3085 | |
Only in 2/arch/avr32/boot/images: .gitignore | |
Only in 2/arch/avr32/kernel: .gitignore | |
Only in 2/arch/blackfin/boot: .gitignore | |
Only in 2/arch/blackfin/kernel: .gitignore | |
Only in 2/arch/cris/boot: .gitignore | |
Only in 2/arch: .gitignore | |
Only in 2/arch/ia64/kernel: .gitignore | |
Only in 2/arch/m68k/kernel: .gitignore | |
Only in 2/arch/mips/boot: .gitignore | |
Only in 2/arch/mips/kernel: .gitignore | |
Only in 2/arch/mn10300/boot: .gitignore | |
Only in 2/arch/parisc/kernel: .gitignore | |
Only in 2/arch/powerpc/boot: dtc-src | |
Only in 2/arch/powerpc/boot: .gitignore | |
Only in 2/arch/powerpc/kernel: .gitignore | |
Only in 2/arch/powerpc/kernel/vdso32: .gitignore | |
Only in 2/arch/powerpc/kernel/vdso64: .gitignore | |
Only in 2/arch/powerpc/platforms/cell/spufs: .gitignore | |
Only in 2/arch/sh/boot/compressed: .gitignore | |
Only in 2/arch/sh/boot: .gitignore | |
Only in 2/arch/sh/kernel: .gitignore | |
Only in 2/arch/sh/kernel/vsyscall: .gitignore | |
Only in 2/arch/sparc/boot: .gitignore | |
Only in 2/arch/sparc/kernel: .gitignore | |
Only in 2/arch/um: .gitignore | |
Only in 2/arch/x86/boot/compressed: .gitignore | |
Only in 2/arch/x86/boot: .gitignore | |
Only in 2/arch/x86/boot/tools: .gitignore | |
Only in 2/arch/x86: .gitignore | |
Only in 2/arch/x86/kernel/acpi/realmode: .gitignore | |
Only in 2/arch/x86/kernel/cpu: .gitignore | |
Only in 2/arch/x86/kernel: .gitignore | |
Only in 2/arch/x86/lib: .gitignore | |
Only in 2/arch/x86/vdso: .gitignore | |
Only in 2/arch/x86/vdso/vdso32: .gitignore | |
diff -crB 2/block/blk-core.c 1/block/blk-core.c | |
*** 2/block/blk-core.c 2012-09-24 11:44:01.050832714 +0530 | |
--- 1/block/blk-core.c 2011-05-18 12:34:31.000000000 +0530 | |
*************** | |
*** 1593,1603 **** | |
if (unlikely(block_dump)) { | |
char b[BDEVNAME_SIZE]; | |
! printk(KERN_DEBUG "%s(%d): %s block %Lu on %s\n", | |
current->comm, task_pid_nr(current), | |
(rw & WRITE) ? "WRITE" : "READ", | |
(unsigned long long)bio->bi_sector, | |
! bdevname(bio->bi_bdev, b)); | |
} | |
} | |
--- 1593,1604 ---- | |
if (unlikely(block_dump)) { | |
char b[BDEVNAME_SIZE]; | |
! printk(KERN_DEBUG "%s(%d): %s block %Lu on %s (%u sectors)\n", | |
current->comm, task_pid_nr(current), | |
(rw & WRITE) ? "WRITE" : "READ", | |
(unsigned long long)bio->bi_sector, | |
! bdevname(bio->bi_bdev, b), | |
! count); | |
} | |
} | |
diff -crB 2/block/genhd.c 1/block/genhd.c | |
*** 2/block/genhd.c 2012-09-24 11:44:01.050832714 +0530 | |
--- 1/block/genhd.c 2011-05-18 12:34:31.000000000 +0530 | |
*************** | |
*** 1006,1011 **** | |
--- 1006,1027 ---- | |
free_part_stats(&disk->part0); | |
kfree(disk); | |
} | |
+ | |
+ static int disk_uevent(struct device *dev, struct kobj_uevent_env *env) | |
+ { | |
+ struct gendisk *disk = dev_to_disk(dev); | |
+ struct disk_part_iter piter; | |
+ struct hd_struct *part; | |
+ int cnt = 0; | |
+ | |
+ disk_part_iter_init(&piter, disk, 0); | |
+ while((part = disk_part_iter_next(&piter))) | |
+ cnt++; | |
+ disk_part_iter_exit(&piter); | |
+ add_uevent_var(env, "NPARTS=%u", cnt); | |
+ return 0; | |
+ } | |
+ | |
struct class block_class = { | |
.name = "block", | |
}; | |
*************** | |
*** 1024,1029 **** | |
--- 1040,1046 ---- | |
.groups = disk_attr_groups, | |
.release = disk_release, | |
.devnode = block_devnode, | |
+ .uevent = disk_uevent, | |
}; | |
#ifdef CONFIG_PROC_FS | |
Only in 2/Documentation/accounting: .gitignore | |
Only in 1/Documentation: android.txt | |
Only in 2/Documentation/auxdisplay: .gitignore | |
diff -crB 2/Documentation/cgroups/cpuacct.txt 1/Documentation/cgroups/cpuacct.txt | |
*** 2/Documentation/cgroups/cpuacct.txt 2012-09-24 11:44:01.106831667 +0530 | |
--- 1/Documentation/cgroups/cpuacct.txt 2011-05-18 12:34:07.000000000 +0530 | |
*************** | |
*** 40,45 **** | |
--- 40,52 ---- | |
user and system are in USER_HZ unit. | |
+ cpuacct.cpufreq file gives CPU time (in nanoseconds) spent at each CPU | |
+ frequency. Platform hooks must be implemented inorder to properly track | |
+ time at each CPU frequency. | |
+ | |
+ cpuacct.power file gives CPU power consumed (in milliWatt seconds). Platform | |
+ must provide and implement power callback functions. | |
+ | |
cpuacct controller uses percpu_counter interface to collect user and | |
system times. This has two side effects: | |
Only in 2/Documentation/connector: .gitignore | |
Only in 2/Documentation/DocBook/dvb: .gitignore | |
Only in 2/Documentation/DocBook: .gitignore | |
Only in 2/Documentation/DocBook/v4l: .gitignore | |
Only in 2/Documentation: .gitignore | |
Only in 2/Documentation/ia64: .gitignore | |
Only in 2/Documentation/lguest: .gitignore | |
Only in 2/Documentation/networking: .gitignore | |
Only in 2/Documentation/networking/timestamping: .gitignore | |
Only in 2/Documentation/pcmcia: .gitignore | |
Only in 2/Documentation/spi: .gitignore | |
Only in 2/Documentation/video4linux: .gitignore | |
Only in 2/Documentation/vm: .gitignore | |
Only in 2/Documentation/watchdog/src: .gitignore | |
Only in 2/drivers/atm: .gitignore | |
diff -crB 2/drivers/base/power/main.c 1/drivers/base/power/main.c | |
*** 2/drivers/base/power/main.c 2012-09-24 11:44:01.242829123 +0530 | |
--- 1/drivers/base/power/main.c 2011-05-18 12:34:33.000000000 +0530 | |
*************** | |
*** 26,31 **** | |
--- 26,32 ---- | |
#include <linux/interrupt.h> | |
#include <linux/sched.h> | |
#include <linux/async.h> | |
+ #include <linux/timer.h> | |
#include "../base.h" | |
#include "power.h" | |
*************** | |
*** 45,50 **** | |
--- 46,54 ---- | |
static DEFINE_MUTEX(dpm_list_mtx); | |
static pm_message_t pm_transition; | |
+ static void dpm_drv_timeout(unsigned long data); | |
+ static DEFINE_TIMER(dpm_drv_wd, dpm_drv_timeout, 0, 0); | |
+ | |
/* | |
* Set once the preparation of devices for a PM transition has started, reset | |
* before starting to resume devices. Protected by dpm_list_mtx. | |
*************** | |
*** 523,529 **** | |
TRACE_DEVICE(dev); | |
TRACE_RESUME(0); | |
! dpm_wait(dev->parent, async); | |
device_lock(dev); | |
dev->power.status = DPM_RESUMING; | |
--- 527,534 ---- | |
TRACE_DEVICE(dev); | |
TRACE_RESUME(0); | |
! if (dev->parent && dev->parent->power.status >= DPM_OFF) | |
! dpm_wait(dev->parent, async); | |
device_lock(dev); | |
dev->power.status = DPM_RESUMING; | |
*************** | |
*** 584,589 **** | |
--- 589,633 ---- | |
} | |
/** | |
+ * dpm_drv_timeout - Driver suspend / resume watchdog handler | |
+ * @data: struct device which timed out | |
+ * | |
+ * Called when a driver has timed out suspending or resuming. | |
+ * There's not much we can do here to recover so | |
+ * BUG() out for a crash-dump | |
+ * | |
+ */ | |
+ static void dpm_drv_timeout(unsigned long data) | |
+ { | |
+ struct device *dev = (struct device *) data; | |
+ | |
+ printk(KERN_EMERG "**** DPM device timeout: %s (%s)\n", dev_name(dev), | |
+ (dev->driver ? dev->driver->name : "no driver")); | |
+ BUG(); | |
+ } | |
+ | |
+ /** | |
+ * dpm_drv_wdset - Sets up driver suspend/resume watchdog timer. | |
+ * @dev: struct device which we're guarding. | |
+ * | |
+ */ | |
+ static void dpm_drv_wdset(struct device *dev) | |
+ { | |
+ dpm_drv_wd.data = (unsigned long) dev; | |
+ mod_timer(&dpm_drv_wd, jiffies + (HZ * 12)); | |
+ } | |
+ | |
+ /** | |
+ * dpm_drv_wdclr - clears driver suspend/resume watchdog timer. | |
+ * @dev: struct device which we're no longer guarding. | |
+ * | |
+ */ | |
+ static void dpm_drv_wdclr(struct device *dev) | |
+ { | |
+ del_timer_sync(&dpm_drv_wd); | |
+ } | |
+ | |
+ /** | |
* dpm_resume - Execute "resume" callbacks for non-sysdev devices. | |
* @state: PM transition of the system being carried out. | |
* | |
*************** | |
*** 934,940 **** | |
--- 978,986 ---- | |
get_device(dev); | |
mutex_unlock(&dpm_list_mtx); | |
+ dpm_drv_wdset(dev); | |
error = device_suspend(dev); | |
+ dpm_drv_wdclr(dev); | |
mutex_lock(&dpm_list_mtx); | |
if (error) { | |
Only in 1/drivers/bluetooth: bthid | |
diff -crB 2/drivers/bluetooth/Kconfig 1/drivers/bluetooth/Kconfig | |
*** 2/drivers/bluetooth/Kconfig 2012-09-24 11:44:01.206829794 +0530 | |
--- 1/drivers/bluetooth/Kconfig 2011-05-18 12:34:34.000000000 +0530 | |
*************** | |
*** 207,210 **** | |
--- 207,216 ---- | |
Say Y here to compile support for "Atheros firmware download driver" | |
into the kernel or say M to compile it as module (ath3k). | |
+ config BT_HID | |
+ tristate "Bluetooth HID (Human interface device) driver" | |
+ default m | |
+ help | |
+ say M to compile it as module. | |
+ | |
endmenu | |
diff -crB 2/drivers/bluetooth/Makefile 1/drivers/bluetooth/Makefile | |
*** 2/drivers/bluetooth/Makefile 2012-09-24 11:44:01.206829794 +0530 | |
--- 1/drivers/bluetooth/Makefile 2011-05-18 12:34:34.000000000 +0530 | |
*************** | |
*** 27,29 **** | |
--- 27,31 ---- | |
hci_uart-$(CONFIG_BT_HCIUART_BCSP) += hci_bcsp.o | |
hci_uart-$(CONFIG_BT_HCIUART_LL) += hci_ll.o | |
hci_uart-objs := $(hci_uart-y) | |
+ | |
+ obj-$(CONFIG_BT_HID) += bthid/ | |
Only in 1/drivers/char: dcc_tty.c | |
Only in 2/drivers/char: .gitignore | |
diff -crB 2/drivers/char/Kconfig 1/drivers/char/Kconfig | |
*** 2/drivers/char/Kconfig 2012-09-24 11:44:01.226829420 +0530 | |
--- 1/drivers/char/Kconfig 2011-05-18 12:34:34.000000000 +0530 | |
*************** | |
*** 88,93 **** | |
--- 88,106 ---- | |
information. For framebuffer console users, please refer to | |
<file:Documentation/fb/fbcon.txt>. | |
+ config DEVMEM | |
+ bool "Memory device driver" | |
+ default y | |
+ help | |
+ The memory driver provides two character devices, mem and kmem, which | |
+ provide access to the system's memory. The mem device is a view of | |
+ physical memory, and each byte in the device corresponds to the | |
+ matching physical address. The kmem device is the same as mem, but | |
+ the addresses correspond to the kernel's virtual address space rather | |
+ than physical memory. These devices are standard parts of a Linux | |
+ system and most users should say Y here. You might say N if very | |
+ security conscience or memory is tight. | |
+ | |
config DEVKMEM | |
bool "/dev/kmem virtual device support" | |
default y | |
*************** | |
*** 1119,1124 **** | |
--- 1132,1141 ---- | |
depends on ISA || PCI | |
default y | |
+ config DCC_TTY | |
+ tristate "DCC tty driver" | |
+ depends on ARM | |
+ | |
source "drivers/s390/char/Kconfig" | |
config RAMOOPS | |
*************** | |
*** 1129,1133 **** | |
--- 1146,1155 ---- | |
This enables panic and oops messages to be logged to a circular | |
buffer in RAM where it can be read back at some later point. | |
+ config S3C_MEM | |
+ bool "Support for /dev/s3c-mem" | |
+ default y | |
+ help | |
+ you do say Y here, you can allocate physically linear memory | |
endmenu | |
diff -crB 2/drivers/char/Makefile 1/drivers/char/Makefile | |
*** 2/drivers/char/Makefile 2012-09-24 11:44:01.230829344 +0530 | |
--- 1/drivers/char/Makefile 2011-05-18 12:34:34.000000000 +0530 | |
*************** | |
*** 107,118 **** | |
--- 107,121 ---- | |
obj-$(CONFIG_HANGCHECK_TIMER) += hangcheck-timer.o | |
obj-$(CONFIG_TCG_TPM) += tpm/ | |
+ obj-$(CONFIG_DCC_TTY) += dcc_tty.o | |
obj-$(CONFIG_PS3_FLASH) += ps3flash.o | |
obj-$(CONFIG_RAMOOPS) += ramoops.o | |
obj-$(CONFIG_JS_RTC) += js-rtc.o | |
js-rtc-y = rtc.o | |
+ obj-$(CONFIG_S3C_MEM) += s3c_mem.o | |
+ | |
# Files generated that shall be removed upon make clean | |
clean-files := consolemap_deftbl.c defkeymap.c | |
diff -crB 2/drivers/char/mem.c 1/drivers/char/mem.c | |
*** 2/drivers/char/mem.c 2012-09-24 11:44:01.226829420 +0530 | |
--- 1/drivers/char/mem.c 2011-05-18 12:34:34.000000000 +0530 | |
*************** | |
*** 59,64 **** | |
--- 59,65 ---- | |
} | |
#endif | |
+ #if defined(CONFIG_DEVMEM) || defined(CONFIG_DEVKMEM) | |
#ifdef CONFIG_STRICT_DEVMEM | |
static inline int range_is_allowed(unsigned long pfn, unsigned long size) | |
{ | |
*************** | |
*** 84,90 **** | |
--- 85,93 ---- | |
return 1; | |
} | |
#endif | |
+ #endif | |
+ #ifdef CONFIG_DEVMEM | |
void __weak unxlate_dev_mem_ptr(unsigned long phys, void *addr) | |
{ | |
} | |
*************** | |
*** 211,216 **** | |
--- 214,222 ---- | |
*ppos += written; | |
return written; | |
} | |
+ #endif /* CONFIG_DEVMEM */ | |
+ | |
+ #if defined(CONFIG_DEVMEM) || defined(CONFIG_DEVKMEM) | |
int __weak phys_mem_access_prot_allowed(struct file *file, | |
unsigned long pfn, unsigned long size, pgprot_t *vma_prot) | |
*************** | |
*** 332,337 **** | |
--- 338,344 ---- | |
} | |
return 0; | |
} | |
+ #endif /* CONFIG_DEVMEM */ | |
#ifdef CONFIG_DEVKMEM | |
static int mmap_kmem(struct file *file, struct vm_area_struct *vma) | |
*************** | |
*** 696,701 **** | |
--- 703,710 ---- | |
return file->f_pos = 0; | |
} | |
+ #if defined(CONFIG_DEVMEM) || defined(CONFIG_DEVKMEM) || defined(CONFIG_DEVPORT) | |
+ | |
/* | |
* The memory devices use the full 32/64 bits of the offset, and so we cannot | |
* check against negative addresses: they are ok. The return value is weird, | |
*************** | |
*** 729,738 **** | |
--- 738,751 ---- | |
return ret; | |
} | |
+ #endif | |
+ | |
+ #if defined(CONFIG_DEVMEM) || defined(CONFIG_DEVKMEM) || defined(CONFIG_DEVPORT) | |
static int open_port(struct inode * inode, struct file * filp) | |
{ | |
return capable(CAP_SYS_RAWIO) ? 0 : -EPERM; | |
} | |
+ #endif | |
#define zero_lseek null_lseek | |
#define full_lseek null_lseek | |
*************** | |
*** 742,747 **** | |
--- 755,761 ---- | |
#define open_kmem open_mem | |
#define open_oldmem open_mem | |
+ #ifdef CONFIG_DEVMEM | |
static const struct file_operations mem_fops = { | |
.llseek = memory_lseek, | |
.read = read_mem, | |
*************** | |
*** 750,755 **** | |
--- 764,770 ---- | |
.open = open_mem, | |
.get_unmapped_area = get_unmapped_area_mem, | |
}; | |
+ #endif | |
#ifdef CONFIG_DEVKMEM | |
static const struct file_operations kmem_fops = { | |
*************** | |
*** 808,813 **** | |
--- 823,838 ---- | |
}; | |
#endif | |
+ #ifdef CONFIG_S3C_MEM | |
+ extern int s3c_mem_mmap(struct file* filp, struct vm_area_struct *vma); | |
+ extern int s3c_mem_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg); | |
+ | |
+ static const struct file_operations s3c_mem_fops = { | |
+ .ioctl = s3c_mem_ioctl, | |
+ .mmap = s3c_mem_mmap, | |
+ }; | |
+ #endif | |
+ | |
static ssize_t kmsg_write(struct file *file, const char __user *buf, | |
size_t count, loff_t *ppos) | |
{ | |
*************** | |
*** 839,845 **** | |
--- 864,872 ---- | |
const struct file_operations *fops; | |
struct backing_dev_info *dev_info; | |
} devlist[] = { | |
+ #ifdef CONFIG_DEVMEM | |
[1] = { "mem", 0, &mem_fops, &directly_mappable_cdev_bdi }, | |
+ #endif | |
#ifdef CONFIG_DEVKMEM | |
[2] = { "kmem", 0, &kmem_fops, &directly_mappable_cdev_bdi }, | |
#endif | |
*************** | |
*** 855,860 **** | |
--- 882,890 ---- | |
#ifdef CONFIG_CRASH_DUMP | |
[12] = { "oldmem", 0, &oldmem_fops, NULL }, | |
#endif | |
+ #ifdef CONFIG_S3C_MEM | |
+ [13] = {"s3c-mem", S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP | S_IROTH | S_IWOTH, &s3c_mem_fops}, | |
+ #endif | |
}; | |
static int memory_open(struct inode *inode, struct file *filp) | |
Only in 1/drivers/char: s3c_mem.c | |
Only in 1/drivers/char: s3c_mem.h | |
diff -crB 2/drivers/cpufreq/cpufreq_ondemand.c 1/drivers/cpufreq/cpufreq_ondemand.c | |
*** 2/drivers/cpufreq/cpufreq_ondemand.c 2012-09-24 11:44:01.238829197 +0530 | |
--- 1/drivers/cpufreq/cpufreq_ondemand.c 2011-05-18 12:34:35.000000000 +0530 | |
*************** | |
*** 610,616 **** | |
/* We want all CPUs to do sampling nearly on same jiffy */ | |
int delay = usecs_to_jiffies(dbs_tuners_ins.sampling_rate); | |
! delay -= jiffies % delay; | |
mutex_lock(&dbs_info->timer_mutex); | |
/* Common NORMAL_SAMPLE setup */ | |
--- 610,618 ---- | |
/* We want all CPUs to do sampling nearly on same jiffy */ | |
int delay = usecs_to_jiffies(dbs_tuners_ins.sampling_rate); | |
! if (num_online_cpus() > 1) | |
! delay -= jiffies % delay; | |
! | |
mutex_lock(&dbs_info->timer_mutex); | |
/* Common NORMAL_SAMPLE setup */ | |
Only in 2/drivers/eisa: .gitignore | |
Only in 2/drivers/gpu/drm/radeon: .gitignore | |
diff -crB 2/drivers/gpu/Makefile 1/drivers/gpu/Makefile | |
*** 2/drivers/gpu/Makefile 2012-09-24 11:44:01.206829794 +0530 | |
--- 1/drivers/gpu/Makefile 2011-05-18 12:34:36.000000000 +0530 | |
*************** | |
*** 1 **** | |
--- 1,3 ---- | |
obj-y += drm/ vga/ | |
+ | |
+ obj-$(CONFIG_PVR_SGX) += pvr/ | |
Only in 1/drivers/gpu: pvr | |
diff -crB 2/drivers/hwmon/Kconfig 1/drivers/hwmon/Kconfig | |
*** 2/drivers/hwmon/Kconfig 2012-09-24 11:44:01.618822089 +0530 | |
--- 1/drivers/hwmon/Kconfig 2011-05-18 12:34:39.000000000 +0530 | |
*************** | |
*** 1117,1123 **** | |
depends on MFD_MC13783 | |
help | |
Support for the A/D converter on MC13783 PMIC. | |
! | |
if ACPI | |
comment "ACPI drivers" | |
--- 1117,1123 ---- | |
depends on MFD_MC13783 | |
help | |
Support for the A/D converter on MC13783 PMIC. | |
! | |
if ACPI | |
comment "ACPI drivers" | |
diff -crB 2/drivers/i2c/busses/i2c-s3c2410.c 1/drivers/i2c/busses/i2c-s3c2410.c | |
*** 2/drivers/i2c/busses/i2c-s3c2410.c 2012-09-24 11:44:01.622822014 +0530 | |
--- 1/drivers/i2c/busses/i2c-s3c2410.c 2011-05-18 12:34:39.000000000 +0530 | |
*************** | |
*** 249,260 **** | |
return i2c->msg_ptr >= i2c->msg->len; | |
} | |
! /* i2s_s3c_irq_nextbyte | |
* | |
* process an interrupt and work out what to do | |
*/ | |
! static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat) | |
{ | |
unsigned long tmp; | |
unsigned char byte; | |
--- 249,260 ---- | |
return i2c->msg_ptr >= i2c->msg->len; | |
} | |
! /* i2c_s3c_irq_nextbyte | |
* | |
* process an interrupt and work out what to do | |
*/ | |
! static int i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat) | |
{ | |
unsigned long tmp; | |
unsigned char byte; | |
*************** | |
*** 445,451 **** | |
/* pretty much this leaves us with the fact that we've | |
* transmitted or received whatever byte we last sent */ | |
! i2s_s3c_irq_nextbyte(i2c, status); | |
out: | |
return IRQ_HANDLED; | |
--- 445,451 ---- | |
/* pretty much this leaves us with the fact that we've | |
* transmitted or received whatever byte we last sent */ | |
! i2c_s3c_irq_nextbyte(i2c, status); | |
out: | |
return IRQ_HANDLED; | |
*************** | |
*** 471,476 **** | |
--- 471,480 ---- | |
msleep(1); | |
} | |
+ writel(iicstat & ~S3C2410_IICSTAT_TXRXEN, i2c->regs + S3C2410_IICSTAT); | |
+ if (!(readl(i2c->regs + S3C2410_IICSTAT) & S3C2410_IICSTAT_BUSBUSY)) | |
+ return 0; | |
+ | |
return -ETIMEDOUT; | |
} | |
*************** | |
*** 482,489 **** | |
static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, | |
struct i2c_msg *msgs, int num) | |
{ | |
! unsigned long iicstat, timeout; | |
! int spins = 20; | |
int ret; | |
if (i2c->suspended) | |
--- 486,492 ---- | |
static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, | |
struct i2c_msg *msgs, int num) | |
{ | |
! unsigned long timeout; | |
int ret; | |
if (i2c->suspended) | |
*************** | |
*** 522,542 **** | |
/* ensure the stop has been through the bus */ | |
! dev_dbg(i2c->dev, "waiting for bus idle\n"); | |
! | |
! /* first, try busy waiting briefly */ | |
! do { | |
! iicstat = readl(i2c->regs + S3C2410_IICSTAT); | |
! } while ((iicstat & S3C2410_IICSTAT_START) && --spins); | |
! | |
! /* if that timed out sleep */ | |
! if (!spins) { | |
! msleep(1); | |
! iicstat = readl(i2c->regs + S3C2410_IICSTAT); | |
! } | |
! | |
! if (iicstat & S3C2410_IICSTAT_START) | |
! dev_warn(i2c->dev, "timeout waiting for bus idle\n"); | |
out: | |
return ret; | |
--- 525,531 ---- | |
/* ensure the stop has been through the bus */ | |
! udelay(10); | |
out: | |
return ret; | |
*************** | |
*** 555,573 **** | |
int retry; | |
int ret; | |
for (retry = 0; retry < adap->retries; retry++) { | |
ret = s3c24xx_i2c_doxfer(i2c, msgs, num); | |
if (ret != -EAGAIN) | |
! return ret; | |
dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry); | |
udelay(100); | |
} | |
! return -EREMOTEIO; | |
} | |
/* declare our i2c functionality */ | |
--- 544,567 ---- | |
int retry; | |
int ret; | |
+ clk_enable(i2c->clk); | |
+ | |
for (retry = 0; retry < adap->retries; retry++) { | |
ret = s3c24xx_i2c_doxfer(i2c, msgs, num); | |
if (ret != -EAGAIN) | |
! goto out; | |
dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry); | |
udelay(100); | |
} | |
+ ret = -EREMOTEIO; | |
+ out: | |
+ clk_disable(i2c->clk); | |
! return ret; | |
} | |
/* declare our i2c functionality */ | |
*************** | |
*** 658,680 **** | |
writel(iiccon, i2c->regs + S3C2410_IICCON); | |
- if (s3c24xx_i2c_is2440(i2c)) { | |
- unsigned long sda_delay; | |
- | |
- if (pdata->sda_delay) { | |
- sda_delay = (freq / 1000) * pdata->sda_delay; | |
- sda_delay /= 1000000; | |
- sda_delay = DIV_ROUND_UP(sda_delay, 5); | |
- if (sda_delay > 3) | |
- sda_delay = 3; | |
- sda_delay |= S3C2410_IICLC_FILTER_ON; | |
- } else | |
- sda_delay = 0; | |
- | |
- dev_dbg(i2c->dev, "IICLC=%08lx\n", sda_delay); | |
- writel(sda_delay, i2c->regs + S3C2440_IICLC); | |
- } | |
- | |
return 0; | |
} | |
--- 652,657 ---- | |
*************** | |
*** 691,696 **** | |
--- 668,675 ---- | |
int delta_f; | |
int ret; | |
+ clk_enable(i2c->clk); | |
+ | |
delta_f = clk_get_rate(i2c->clk) - i2c->clkrate; | |
/* if we're post-change and the input clock has slowed down | |
*************** | |
*** 710,715 **** | |
--- 689,696 ---- | |
dev_info(i2c->dev, "setting freq %d\n", got); | |
} | |
+ clk_disable(i2c->clk); | |
+ | |
return 0; | |
} | |
*************** | |
*** 762,768 **** | |
writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD); | |
! dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr); | |
writel(iicon, i2c->regs + S3C2410_IICCON); | |
--- 743,749 ---- | |
writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD); | |
! dev_dbg(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr); | |
writel(iicon, i2c->regs + S3C2410_IICCON); | |
*************** | |
*** 776,784 **** | |
/* todo - check that the i2c lines aren't being dragged anywhere */ | |
! dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq); | |
dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon); | |
return 0; | |
} | |
--- 757,768 ---- | |
/* todo - check that the i2c lines aren't being dragged anywhere */ | |
! dev_dbg(i2c->dev, "bus frequency set to %d KHz\n", freq); | |
dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon); | |
+ dev_dbg(i2c->dev, "S3C2440_IICLC=%08x\n", pdata->sda_delay); | |
+ writel(pdata->sda_delay, i2c->regs + S3C2440_IICLC); | |
+ | |
return 0; | |
} | |
*************** | |
*** 910,915 **** | |
--- 895,902 ---- | |
platform_set_drvdata(pdev, i2c); | |
+ clk_disable(i2c->clk); | |
+ | |
dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev)); | |
return 0; | |
*************** | |
*** 978,984 **** | |
--- 965,974 ---- | |
struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev); | |
i2c->suspended = 0; | |
+ | |
+ clk_enable(i2c->clk); | |
s3c24xx_i2c_init(i2c); | |
+ clk_disable(i2c->clk); | |
return 0; | |
} | |
diff -crB 2/drivers/i2c/busses/Kconfig 1/drivers/i2c/busses/Kconfig | |
*** 2/drivers/i2c/busses/Kconfig 2012-09-24 11:44:01.622822014 +0530 | |
--- 1/drivers/i2c/busses/Kconfig 2011-05-18 12:34:39.000000000 +0530 | |
*************** | |
*** 523,529 **** | |
config I2C_S3C2410 | |
tristate "S3C2410 I2C Driver" | |
! depends on ARCH_S3C2410 || ARCH_S3C64XX | |
help | |
Say Y here to include support for I2C controller in the | |
Samsung S3C2410 based System-on-Chip devices. | |
--- 523,529 ---- | |
config I2C_S3C2410 | |
tristate "S3C2410 I2C Driver" | |
! depends on ARCH_S3C2410 || ARCH_S3C64XX || ARCH_S5PV210 | |
help | |
Say Y here to include support for I2C controller in the | |
Samsung S3C2410 based System-on-Chip devices. | |
diff -crB 2/drivers/input/evdev.c 1/drivers/input/evdev.c | |
*** 2/drivers/input/evdev.c 2012-09-24 11:44:02.322808912 +0530 | |
--- 1/drivers/input/evdev.c 2011-05-18 12:34:41.000000000 +0530 | |
*************** | |
*** 10,16 **** | |
#define EVDEV_MINOR_BASE 64 | |
#define EVDEV_MINORS 32 | |
! #define EVDEV_BUFFER_SIZE 64 | |
#include <linux/poll.h> | |
#include <linux/sched.h> | |
--- 10,16 ---- | |
#define EVDEV_MINOR_BASE 64 | |
#define EVDEV_MINORS 32 | |
! #define EVDEV_BUFFER_SIZE 256 | |
#include <linux/poll.h> | |
#include <linux/sched.h> | |
*************** | |
*** 20,25 **** | |
--- 20,26 ---- | |
#include <linux/input.h> | |
#include <linux/major.h> | |
#include <linux/device.h> | |
+ #include <linux/wakelock.h> | |
#include "input-compat.h" | |
struct evdev { | |
*************** | |
*** 43,48 **** | |
--- 44,51 ---- | |
struct fasync_struct *fasync; | |
struct evdev *evdev; | |
struct list_head node; | |
+ struct wake_lock wake_lock; | |
+ char name[28]; | |
}; | |
static struct evdev *evdev_table[EVDEV_MINORS]; | |
*************** | |
*** 55,60 **** | |
--- 58,64 ---- | |
* Interrupts are disabled, just acquire the lock | |
*/ | |
spin_lock(&client->buffer_lock); | |
+ wake_lock_timeout(&client->wake_lock, 5 * HZ); | |
client->buffer[client->head++] = *event; | |
client->head &= EVDEV_BUFFER_SIZE - 1; | |
spin_unlock(&client->buffer_lock); | |
*************** | |
*** 72,79 **** | |
struct evdev *evdev = handle->private; | |
struct evdev_client *client; | |
struct input_event event; | |
! do_gettimeofday(&event.time); | |
event.type = type; | |
event.code = code; | |
event.value = value; | |
--- 76,86 ---- | |
struct evdev *evdev = handle->private; | |
struct evdev_client *client; | |
struct input_event event; | |
+ struct timespec ts; | |
! ktime_get_ts(&ts); | |
! event.time.tv_sec = ts.tv_sec; | |
! event.time.tv_usec = ts.tv_nsec / NSEC_PER_USEC; | |
event.type = type; | |
event.code = code; | |
event.value = value; | |
*************** | |
*** 234,239 **** | |
--- 241,247 ---- | |
mutex_unlock(&evdev->mutex); | |
evdev_detach_client(evdev, client); | |
+ wake_lock_destroy(&client->wake_lock); | |
kfree(client); | |
evdev_close_device(evdev); | |
*************** | |
*** 270,275 **** | |
--- 278,286 ---- | |
} | |
spin_lock_init(&client->buffer_lock); | |
+ snprintf(client->name, sizeof(client->name), "%s-%d", | |
+ dev_name(&evdev->dev), task_tgid_vnr(current)); | |
+ wake_lock_init(&client->wake_lock, WAKE_LOCK_SUSPEND, client->name); | |
client->evdev = evdev; | |
evdev_attach_client(evdev, client); | |
*************** | |
*** 335,340 **** | |
--- 346,353 ---- | |
if (have_event) { | |
*event = client->buffer[client->tail++]; | |
client->tail &= EVDEV_BUFFER_SIZE - 1; | |
+ if (client->head == client->tail) | |
+ wake_unlock(&client->wake_lock); | |
} | |
spin_unlock_irq(&client->buffer_lock); | |
diff -crB 2/drivers/input/Kconfig 1/drivers/input/Kconfig | |
*** 2/drivers/input/Kconfig 2012-09-24 11:44:02.326808839 +0530 | |
--- 1/drivers/input/Kconfig 2011-05-18 12:34:41.000000000 +0530 | |
*************** | |
*** 161,166 **** | |
--- 161,175 ---- | |
To compile this driver as a module, choose M here: the | |
module will be called apm-power. | |
+ config INPUT_KEYRESET | |
+ tristate "Reset key" | |
+ depends on INPUT | |
+ ---help--- | |
+ Say Y here if you want to reboot when some keys are pressed; | |
+ | |
+ To compile this driver as a module, choose M here: the | |
+ module will be called keyreset. | |
+ | |
config XEN_KBDDEV_FRONTEND | |
tristate "Xen virtual keyboard and mouse support" | |
depends on XEN_FBDEV_FRONTEND | |
Only in 1/drivers/input/keyboard: cypress-touchkey.c | |
diff -crB 2/drivers/input/keyboard/gpio_keys.c 1/drivers/input/keyboard/gpio_keys.c | |
*** 2/drivers/input/keyboard/gpio_keys.c 2012-09-24 11:44:02.322808912 +0530 | |
--- 1/drivers/input/keyboard/gpio_keys.c 2011-05-18 12:34:41.000000000 +0530 | |
*************** | |
*** 75,80 **** | |
--- 75,156 ---- | |
* We can disable only those keys which don't allow sharing the irq. | |
*/ | |
+ #if defined(CONFIG_MACH_P1) | |
+ #ifdef CONFIG_KERNEL_DEBUG_SEC | |
+ #include <linux/kernel_sec_common.h> | |
+ struct timer_list debug_timer; | |
+ struct gpio_keys_platform_data *g_pdata; | |
+ | |
+ void enter_upload_mode(unsigned long val) | |
+ { | |
+ bool uploadmode = true; | |
+ int i; | |
+ | |
+ // not to enter forced upload mode in boot PARAM_LOW | |
+ if( KERNEL_SEC_DEBUG_LEVEL_LOW == kernel_sec_get_debug_level() ) | |
+ return; | |
+ | |
+ for (i = 0; i < g_pdata->nbuttons; i++) | |
+ { | |
+ struct gpio_keys_button *button = &g_pdata->buttons[i]; | |
+ if(gpio_get_value(button->gpio)) | |
+ { | |
+ uploadmode = false; | |
+ break; | |
+ } | |
+ } | |
+ | |
+ if(uploadmode) | |
+ { | |
+ if (kernel_sec_viraddr_wdt_reset_reg) | |
+ { | |
+ dump_debug_info_forced_ramd_dump(); | |
+ #ifdef CONFIG_KERNEL_DEBUG_SEC | |
+ #ifdef CONFIG_TARGET_LOCALE_KOR | |
+ local_irq_disable(); | |
+ local_fiq_disable(); | |
+ #endif /* CONFIG_TARGET_LOCALE_KOR */ | |
+ #endif /* CONFIG_KERNEL_DEBUG_SEC */ | |
+ kernel_sec_set_cp_upload(); | |
+ kernel_sec_save_final_context(); // Save theh final context. | |
+ kernel_sec_set_upload_cause(UPLOAD_CAUSE_FORCED_UPLOAD); | |
+ kernel_sec_hw_reset(false); // Reboot. | |
+ } | |
+ } | |
+ } | |
+ #endif | |
+ | |
+ /* For checking H/W faulty. */ | |
+ static ssize_t keyshort_test(struct device *dev, struct device_attribute *attr, char *buf) | |
+ { | |
+ int i, ret=0; | |
+ int count; | |
+ struct gpio_keys_platform_data *pdata = dev->platform_data; | |
+ | |
+ for(i = 0; i < pdata->nbuttons; i++ ) | |
+ { | |
+ struct gpio_keys_button *button = &pdata->buttons[i]; | |
+ ret = gpio_get_value( button->gpio); | |
+ if(!ret) | |
+ break; | |
+ } | |
+ | |
+ if(!ret) | |
+ { | |
+ count = sprintf(buf,"PRESS\n"); | |
+ printk(KERN_DEBUG "[Key] keyshort_test: PRESS\n"); | |
+ } | |
+ else | |
+ { | |
+ count = sprintf(buf,"RELEASE\n"); | |
+ printk(KERN_DEBUG "[Key] keyshort_test: RELEASE\n"); | |
+ } | |
+ | |
+ return count; | |
+ } | |
+ static DEVICE_ATTR(key_pressed, 0664, keyshort_test, NULL); | |
+ #endif | |
+ | |
/** | |
* get_n_events_by_type() - returns maximum number of events per @type | |
* @type: type of button (%EV_KEY, %EV_SW) | |
*************** | |
*** 321,326 **** | |
--- 397,480 ---- | |
unsigned int type = button->type ?: EV_KEY; | |
int state = (gpio_get_value(button->gpio) ? 1 : 0) ^ button->active_low; | |
+ #if defined(CONFIG_MACH_P1) | |
+ #ifdef CONFIG_KERNEL_DEBUG_SEC | |
+ static bool first=false; | |
+ static bool second=false; | |
+ #ifdef CONFIG_TARGET_LOCALE_KOR | |
+ static bool third=false; | |
+ #endif /* CONFIG_TARGET_LOCALE_KOR */ | |
+ | |
+ if(state) | |
+ { | |
+ if(button->code == KEY_VOLUMEUP) | |
+ { | |
+ first = true; | |
+ } | |
+ | |
+ if(button->code == KEY_VOLUMEDOWN) | |
+ { | |
+ second = true; | |
+ } | |
+ | |
+ /* forced upload should be very quick and on time, omit the timer operation */ | |
+ #ifdef CONFIG_TARGET_LOCALE_KOR | |
+ if(button->code == KEY_POWER) | |
+ { | |
+ third = true; | |
+ } | |
+ | |
+ if(first&&second&&third) | |
+ enter_upload_mode(); | |
+ #endif /* CONFIG_TARGET_LOCALE_KOR */ | |
+ | |
+ /* Entering the forced upload mode should be pressed both volume keys | |
+ before pressing the power key */ | |
+ if(first&&second) | |
+ { | |
+ if(button->code == KEY_POWER) | |
+ { | |
+ mod_timer(&debug_timer, jiffies + HZ*2); | |
+ printk(KERN_WARNING "[Key] Waiting for upload mode for 2 seconds.\n"); | |
+ } | |
+ } | |
+ } | |
+ else | |
+ { | |
+ if(button->code == KEY_VOLUMEUP) | |
+ { | |
+ first = false; | |
+ } | |
+ | |
+ if(button->code == KEY_VOLUMEDOWN) | |
+ { | |
+ second = false; | |
+ } | |
+ #ifdef CONFIG_TARGET_LOCALE_KOR | |
+ if(button->code == KEY_POWER) | |
+ { | |
+ third = false; | |
+ } | |
+ #endif /* CONFIG_TARGET_LOCALE_KOR */ | |
+ } | |
+ #endif // CONFIG_KERNEL_DEBUG_SEC | |
+ | |
+ if(state) | |
+ { | |
+ button->pressed = true; | |
+ } | |
+ else | |
+ { | |
+ /*workaround irq bug in p1*/ | |
+ if(!button->pressed) | |
+ { | |
+ input_event(input, type, button->code, 1); | |
+ input_sync(input); | |
+ msleep(1); | |
+ } | |
+ button->pressed = false; | |
+ } | |
+ #endif | |
input_event(input, type, button->code, !!state); | |
input_sync(input); | |
} | |
*************** | |
*** 484,496 **** | |
--- 638,664 ---- | |
goto fail3; | |
} | |
+ #if !defined(CONFIG_MACH_P1) | |
/* get current state of buttons */ | |
for (i = 0; i < pdata->nbuttons; i++) | |
gpio_keys_report_event(&ddata->data[i]); | |
input_sync(input); | |
+ #endif | |
device_init_wakeup(&pdev->dev, wakeup); | |
+ #if defined(CONFIG_MACH_P1) | |
+ if (device_create_file(&pdev->dev, &dev_attr_key_pressed) < 0) | |
+ { | |
+ pr_err("Failed to create device file(%s)!\n", dev_attr_key_pressed.attr.name); | |
+ } | |
+ #ifdef CONFIG_KERNEL_DEBUG_SEC | |
+ g_pdata = pdata; | |
+ init_timer(&debug_timer); | |
+ debug_timer.function = enter_upload_mode; | |
+ #endif | |
+ #endif | |
+ | |
return 0; | |
fail3: | |
*************** | |
*** 560,565 **** | |
--- 728,747 ---- | |
static int gpio_keys_resume(struct device *dev) | |
{ | |
+ #if defined(CONFIG_MACH_P1) | |
+ struct platform_device *pdev = to_platform_device(dev); | |
+ struct gpio_keys_platform_data *pdata = pdev->dev.platform_data; | |
+ int i; | |
+ | |
+ for (i = 0; i < pdata->nbuttons; i++) { | |
+ | |
+ struct gpio_keys_button *button = &pdata->buttons[i]; | |
+ if (button->wakeup && device_may_wakeup(&pdev->dev)) { | |
+ int irq = gpio_to_irq(button->gpio); | |
+ disable_irq_wake(irq); | |
+ } | |
+ } | |
+ #else | |
struct platform_device *pdev = to_platform_device(dev); | |
struct gpio_keys_drvdata *ddata = platform_get_drvdata(pdev); | |
struct gpio_keys_platform_data *pdata = pdev->dev.platform_data; | |
*************** | |
*** 576,581 **** | |
--- 758,764 ---- | |
gpio_keys_report_event(&ddata->data[i]); | |
} | |
input_sync(ddata->input); | |
+ #endif | |
return 0; | |
} | |
diff -crB 2/drivers/input/keyboard/Kconfig 1/drivers/input/keyboard/Kconfig | |
*** 2/drivers/input/keyboard/Kconfig 2012-09-24 11:44:02.322808912 +0530 | |
--- 1/drivers/input/keyboard/Kconfig 2011-05-18 12:34:41.000000000 +0530 | |
*************** | |
*** 426,429 **** | |
--- 426,456 ---- | |
To compile this driver as a module, choose M here: the | |
module will be called w90p910_keypad. | |
+ config KEYPAD_CYPRESS_TOUCH | |
+ tristate "Cypress touch keypad support" | |
+ default n | |
+ help | |
+ Say Y here if you want to use the Cypress touch keypad. | |
+ | |
+ To compile this driver as a module, choose M here: the | |
+ module will be called cypress-touchkey. | |
+ | |
+ config KEYPAD_MELFAS_TOUCH | |
+ tristate "Melfas touch keypad support" | |
+ default n | |
+ help | |
+ Say Y here if you want to use the melfas touch keypad. | |
+ | |
+ To compile this driver as a module, choose M here: the | |
+ module will be called melfas-touchkey. | |
+ | |
+ config KEYBOARD_P1 | |
+ tristate "P1 dock keyboard support" | |
+ default n | |
+ help | |
+ Say Y here if you want to use the P1 dock keyboard. | |
+ | |
+ To compile this driver as a module, choose M here: the | |
+ module will be called p1_keyboard. | |
+ | |
endif | |
diff -crB 2/drivers/input/keyboard/Makefile 1/drivers/input/keyboard/Makefile | |
*** 2/drivers/input/keyboard/Makefile 2012-09-24 11:44:02.322808912 +0530 | |
--- 1/drivers/input/keyboard/Makefile 2011-05-18 12:34:41.000000000 +0530 | |
*************** | |
*** 38,40 **** | |
--- 38,43 ---- | |
obj-$(CONFIG_KEYBOARD_TWL4030) += twl4030_keypad.o | |
obj-$(CONFIG_KEYBOARD_XTKBD) += xtkbd.o | |
obj-$(CONFIG_KEYBOARD_W90P910) += w90p910_keypad.o | |
+ obj-$(CONFIG_KEYPAD_CYPRESS_TOUCH) += cypress-touchkey.o | |
+ obj-$(CONFIG_KEYPAD_MELFAS_TOUCH) += melfas-touchkey.o | |
+ obj-$(CONFIG_KEYBOARD_P1) += p1_keyboard.o | |
Only in 1/drivers/input/keyboard: melfas_download.c | |
Only in 1/drivers/input/keyboard: melfas_download.h | |
Only in 1/drivers/input/keyboard: melfas-touchkey.c | |
Only in 1/drivers/input/keyboard: MMH_SVESTA_R00_V02_bin.c | |
Only in 1/drivers/input/keyboard: p1_keyboard.c | |
Only in 1/drivers/input/keyboard: p1_keyboard.h | |
Only in 1/drivers/input: keyreset.c | |
diff -crB 2/drivers/input/Makefile 1/drivers/input/Makefile | |
*** 2/drivers/input/Makefile 2012-09-24 11:44:02.326808839 +0530 | |
--- 1/drivers/input/Makefile 2011-05-18 12:34:41.000000000 +0530 | |
*************** | |
*** 16,22 **** | |
obj-$(CONFIG_INPUT_EVDEV) += evdev.o | |
obj-$(CONFIG_INPUT_EVBUG) += evbug.o | |
- obj-$(CONFIG_INPUT_KEYBOARD) += keyboard/ | |
obj-$(CONFIG_INPUT_MOUSE) += mouse/ | |
obj-$(CONFIG_INPUT_JOYSTICK) += joystick/ | |
obj-$(CONFIG_INPUT_TABLET) += tablet/ | |
--- 16,21 ---- | |
*************** | |
*** 24,28 **** | |
--- 23,28 ---- | |
obj-$(CONFIG_INPUT_MISC) += misc/ | |
obj-$(CONFIG_INPUT_APMPOWER) += apm-power.o | |
+ obj-$(CONFIG_INPUT_KEYRESET) += keyreset.o | |
obj-$(CONFIG_XEN_KBDDEV_FRONTEND) += xen-kbdfront.o | |
Only in 1/drivers/input/misc: gp2a.c | |
Only in 1/drivers/input/misc: gpio_axis.c | |
Only in 1/drivers/input/misc: gpio_event.c | |
Only in 1/drivers/input/misc: gpio_input.c | |
Only in 1/drivers/input/misc: gpio_matrix.c | |
Only in 1/drivers/input/misc: gpio_output.c | |
Only in 1/drivers/input/misc: k3g.c | |
diff -crB 2/drivers/input/misc/Kconfig 1/drivers/input/misc/Kconfig | |
*** 2/drivers/input/misc/Kconfig 2012-09-24 11:44:02.326808839 +0530 | |
--- 1/drivers/input/misc/Kconfig 2011-05-18 12:34:41.000000000 +0530 | |
*************** | |
*** 12,17 **** | |
--- 12,23 ---- | |
if INPUT_MISC | |
+ config GYRO_K3G | |
+ tristate "K3G driver for s5pc11x" | |
+ default n | |
+ help | |
+ This option enables gyro sensors using K3G driver | |
+ | |
config INPUT_88PM860X_ONKEY | |
tristate "88PM860x ONKEY support" | |
depends on MFD_88PM860X | |
*************** | |
*** 183,188 **** | |
--- 189,205 ---- | |
To compile this driver as a module, choose M here: the module will be | |
called ati_remote2. | |
+ config INPUT_KEYCHORD | |
+ tristate "Key chord input driver support" | |
+ help | |
+ Say Y here if you want to enable the key chord driver | |
+ accessible at /dev/keychord. This driver can be used | |
+ for receiving notifications when client specified key | |
+ combinations are pressed. | |
+ | |
+ To compile this driver as a module, choose M here: the | |
+ module will be called keychord. | |
+ | |
config INPUT_KEYSPAN_REMOTE | |
tristate "Keyspan DMR USB remote control (EXPERIMENTAL)" | |
depends on EXPERIMENTAL | |
*************** | |
*** 302,307 **** | |
--- 319,329 ---- | |
To compile this driver as a module, choose M here: the module will be | |
called winbond_cir. | |
+ config INPUT_GPIO | |
+ tristate "GPIO driver support" | |
+ help | |
+ Say Y here if you want to support gpio based keys, wheels etc... | |
+ | |
config HP_SDC_RTC | |
tristate "HP SDC Real Time Clock" | |
depends on (GSC || HP300) && SERIO | |
*************** | |
*** 390,393 **** | |
--- 412,422 ---- | |
To compile this driver as a module, choose M here: the | |
module will be called pcap_keys. | |
+ config OPTICAL_GP2A | |
+ depends on I2C && GENERIC_GPIO | |
+ tristate "GP2A ambient light and proximity input device" | |
+ default n | |
+ help | |
+ This option enables proximity & light sensors using gp2a driver. | |
+ | |
endif | |
Only in 1/drivers/input/misc: keychord.c | |
diff -crB 2/drivers/input/misc/Makefile 1/drivers/input/misc/Makefile | |
*** 2/drivers/input/misc/Makefile 2012-09-24 11:44:02.326808839 +0530 | |
--- 1/drivers/input/misc/Makefile 2011-05-18 12:34:41.000000000 +0530 | |
*************** | |
*** 16,23 **** | |
--- 16,25 ---- | |
obj-$(CONFIG_INPUT_CM109) += cm109.o | |
obj-$(CONFIG_INPUT_COBALT_BTNS) += cobalt_btns.o | |
obj-$(CONFIG_INPUT_DM355EVM) += dm355evm_keys.o | |
+ obj-$(CONFIG_INPUT_GPIO) += gpio_event.o gpio_matrix.o gpio_input.o gpio_output.o gpio_axis.o | |
obj-$(CONFIG_HP_SDC_RTC) += hp_sdc_rtc.o | |
obj-$(CONFIG_INPUT_IXP4XX_BEEPER) += ixp4xx-beeper.o | |
+ obj-$(CONFIG_INPUT_KEYCHORD) += keychord.o | |
obj-$(CONFIG_INPUT_KEYSPAN_REMOTE) += keyspan_remote.o | |
obj-$(CONFIG_INPUT_M68K_BEEP) += m68kspkr.o | |
obj-$(CONFIG_INPUT_MAX8925_ONKEY) += max8925_onkey.o | |
diff -crB 2/drivers/input/touchscreen/Kconfig 1/drivers/input/touchscreen/Kconfig | |
*** 2/drivers/input/touchscreen/Kconfig 2012-09-24 11:44:02.326808839 +0530 | |
--- 1/drivers/input/touchscreen/Kconfig 2011-05-18 12:34:42.000000000 +0530 | |
*************** | |
*** 248,253 **** | |
--- 248,265 ---- | |
To compile this driver as a module, choose M here: the | |
module will be called mk712. | |
+ config TOUCHSCREEN_MXT224 | |
+ tristate "Atmel MaxTouch 224" | |
+ depends on I2C | |
+ help | |
+ Say Y here to enable support for the Atmel MaxTouch 224 touch | |
+ controller. | |
+ | |
+ If unsure, say N. | |
+ | |
+ To compile this driver as a module, choose M here: the | |
+ module will be called mxt224. | |
+ | |
config TOUCHSCREEN_HP600 | |
tristate "HP Jornada 6xx touchscreen" | |
depends on SH_HP6XX && SH_ADC | |
*************** | |
*** 303,308 **** | |
--- 315,326 ---- | |
To compile this driver as a module, choose M here: the | |
module will be called migor_ts. | |
+ config TOUCHSCREEN_SYNAPTICS_I2C_RMI | |
+ tristate "Synaptics i2c touchscreen" | |
+ depends on I2C | |
+ help | |
+ This enables support for Synaptics RMI over I2C based touchscreens. | |
+ | |
config TOUCHSCREEN_TOUCHRIGHT | |
tristate "Touchright serial touchscreen" | |
select SERIO | |
*************** | |
*** 603,606 **** | |
--- 621,635 ---- | |
To compile this driver as a module, choose M here: the | |
module will be called tps6507x_ts. | |
+ config TOUCHSCREEN_QT602240 | |
+ tristate "quantum touchscreen driver" | |
+ default N | |
+ help | |
+ Say Y here to enable the driver for the touchscreen on the | |
+ S3C spica board. | |
+ | |
+ If unsure, say N. | |
+ | |
+ To compile this driver as a module, choose M here: the | |
+ module will be called melfas_ts. | |
endif | |
diff -crB 2/drivers/input/touchscreen/Makefile 1/drivers/input/touchscreen/Makefile | |
*** 2/drivers/input/touchscreen/Makefile 2012-09-24 11:44:02.326808839 +0530 | |
--- 1/drivers/input/touchscreen/Makefile 2011-05-18 12:34:42.000000000 +0530 | |
*************** | |
*** 24,29 **** | |
--- 24,30 ---- | |
obj-$(CONFIG_TOUCHSCREEN_MIGOR) += migor_ts.o | |
obj-$(CONFIG_TOUCHSCREEN_MTOUCH) += mtouch.o | |
obj-$(CONFIG_TOUCHSCREEN_MK712) += mk712.o | |
+ obj-$(CONFIG_TOUCHSCREEN_MXT224) += mxt224.o | |
obj-$(CONFIG_TOUCHSCREEN_HP600) += hp680_ts_input.o | |
obj-$(CONFIG_TOUCHSCREEN_HP7XX) += jornada720_ts.o | |
obj-$(CONFIG_TOUCHSCREEN_HTCPEN) += htcpen.o | |
*************** | |
*** 31,36 **** | |
--- 32,38 ---- | |
obj-$(CONFIG_TOUCHSCREEN_PCAP) += pcap_ts.o | |
obj-$(CONFIG_TOUCHSCREEN_PENMOUNT) += penmount.o | |
obj-$(CONFIG_TOUCHSCREEN_S3C2410) += s3c2410_ts.o | |
+ obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI) += synaptics_i2c_rmi.o | |
obj-$(CONFIG_TOUCHSCREEN_TOUCHIT213) += touchit213.o | |
obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT) += touchright.o | |
obj-$(CONFIG_TOUCHSCREEN_TOUCHWIN) += touchwin.o | |
*************** | |
*** 47,49 **** | |
--- 49,52 ---- | |
obj-$(CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE) += zylonite-wm97xx.o | |
obj-$(CONFIG_TOUCHSCREEN_W90X900) += w90p910_ts.o | |
obj-$(CONFIG_TOUCHSCREEN_TPS6507X) += tps6507x-ts.o | |
+ obj-$(CONFIG_TOUCHSCREEN_QT602240) += qt602240.o | |
Only in 1/drivers/input/touchscreen: mxt224.c | |
Only in 1/drivers/input/touchscreen: qt602240.c | |
Only in 1/drivers/input/touchscreen: qt602240.h | |
Only in 1/drivers/input/touchscreen: synaptics_i2c_rmi.c | |
diff -crB 2/drivers/Kconfig 1/drivers/Kconfig | |
*** 2/drivers/Kconfig 2012-09-24 11:44:02.102813035 +0530 | |
--- 1/drivers/Kconfig 2011-05-18 12:39:27.000000000 +0530 | |
*************** | |
*** 10,15 **** | |
--- 10,18 ---- | |
source "drivers/parport/Kconfig" | |
+ # for TINY_FSR | |
+ source "drivers/tfsr/Kconfig" | |
+ | |
source "drivers/pnp/Kconfig" | |
source "drivers/block/Kconfig" | |
*************** | |
*** 88,93 **** | |
--- 91,98 ---- | |
source "drivers/leds/Kconfig" | |
+ source "drivers/switch/Kconfig" | |
+ | |
source "drivers/accessibility/Kconfig" | |
source "drivers/infiniband/Kconfig" | |
*************** | |
*** 111,114 **** | |
--- 116,122 ---- | |
source "drivers/staging/Kconfig" | |
source "drivers/platform/Kconfig" | |
+ | |
+ source "drivers/sensor/Kconfig" | |
+ | |
endmenu | |
diff -crB 2/drivers/leds/Kconfig 1/drivers/leds/Kconfig | |
*** 2/drivers/leds/Kconfig 2012-09-24 11:44:02.090813267 +0530 | |
--- 1/drivers/leds/Kconfig 2011-05-18 12:34:43.000000000 +0530 | |
*************** | |
*** 364,369 **** | |
--- 364,375 ---- | |
This allows LEDs to be initialised in the ON state. | |
If unsure, say Y. | |
+ config LEDS_TRIGGER_SLEEP | |
+ tristate "LED Sleep Mode Trigger" | |
+ depends on LEDS_TRIGGERS && HAS_EARLYSUSPEND | |
+ help | |
+ This turns LEDs on when the screen is off but the cpu still running. | |
+ | |
comment "iptables trigger is under Netfilter config (LED target)" | |
depends on LEDS_TRIGGERS | |
Only in 1/drivers/leds: ledtrig-sleep.c | |
diff -crB 2/drivers/leds/Makefile 1/drivers/leds/Makefile | |
*** 2/drivers/leds/Makefile 2012-09-24 11:44:02.090813267 +0530 | |
--- 1/drivers/leds/Makefile 2011-05-18 12:34:43.000000000 +0530 | |
*************** | |
*** 48,50 **** | |
--- 48,51 ---- | |
obj-$(CONFIG_LEDS_TRIGGER_BACKLIGHT) += ledtrig-backlight.o | |
obj-$(CONFIG_LEDS_TRIGGER_GPIO) += ledtrig-gpio.o | |
obj-$(CONFIG_LEDS_TRIGGER_DEFAULT_ON) += ledtrig-default-on.o | |
+ obj-$(CONFIG_LEDS_TRIGGER_SLEEP) += ledtrig-sleep.o | |
diff -crB 2/drivers/Makefile 1/drivers/Makefile | |
*** 2/drivers/Makefile 2012-09-24 11:44:02.322808912 +0530 | |
--- 1/drivers/Makefile 2011-05-18 12:39:44.000000000 +0530 | |
*************** | |
*** 39,44 **** | |
--- 39,45 ---- | |
obj-y += serial/ | |
obj-$(CONFIG_PARPORT) += parport/ | |
+ obj-$(CONFIG_INPUT_KEYBOARD) += input/keyboard/ | |
obj-y += base/ block/ misc/ mfd/ | |
obj-$(CONFIG_NUBUS) += nubus/ | |
obj-y += macintosh/ | |
*************** | |
*** 46,51 **** | |
--- 47,53 ---- | |
obj-$(CONFIG_SCSI) += scsi/ | |
obj-$(CONFIG_ATA) += ata/ | |
obj-$(CONFIG_MTD) += mtd/ | |
+ obj-$(CONFIG_TINY_FSR) += tfsr/ | |
obj-$(CONFIG_SPI) += spi/ | |
obj-y += net/ | |
obj-$(CONFIG_ATM) += atm/ | |
*************** | |
*** 95,100 **** | |
--- 97,103 ---- | |
obj-$(CONFIG_MMC) += mmc/ | |
obj-$(CONFIG_MEMSTICK) += memstick/ | |
obj-$(CONFIG_NEW_LEDS) += leds/ | |
+ obj-$(CONFIG_SWITCH) += switch/ | |
obj-$(CONFIG_INFINIBAND) += infiniband/ | |
obj-$(CONFIG_SGI_SN) += sn/ | |
obj-y += firmware/ | |
*************** | |
*** 111,115 **** | |
--- 114,119 ---- | |
obj-$(CONFIG_VHOST_NET) += vhost/ | |
obj-$(CONFIG_VLYNQ) += vlynq/ | |
obj-$(CONFIG_STAGING) += staging/ | |
+ obj-$(CONFIG_SENSOR) += sensor/ | |
obj-y += platform/ | |
obj-y += ieee802154/ | |
Only in 2/drivers/md: .gitignore | |
diff -crB 2/drivers/media/IR/Kconfig 1/drivers/media/IR/Kconfig | |
*** 2/drivers/media/IR/Kconfig 2012-09-24 11:44:01.442825381 +0530 | |
--- 1/drivers/media/IR/Kconfig 2011-05-18 12:34:43.000000000 +0530 | |
*************** | |
*** 1,5 **** | |
config IR_CORE | |
! tristate | |
depends on INPUT | |
default INPUT | |
--- 1,5 ---- | |
config IR_CORE | |
! tristate "Core IR support" | |
depends on INPUT | |
default INPUT | |
Only in 1/drivers/media/video: isx005.c | |
Only in 1/drivers/media/video: isx005.h | |
diff -crB 2/drivers/media/video/Kconfig 1/drivers/media/video/Kconfig | |
*** 2/drivers/media/video/Kconfig 2012-09-24 11:44:01.430825606 +0530 | |
--- 1/drivers/media/video/Kconfig 2011-05-18 12:34:44.000000000 +0530 | |
*************** | |
*** 37,42 **** | |
--- 37,46 ---- | |
depends on PCI | |
tristate | |
+ config VIDEO_IR | |
+ tristate | |
+ depends on INPUT | |
+ | |
config VIDEO_TVEEPROM | |
tristate | |
depends on I2C | |
*************** | |
*** 45,54 **** | |
tristate | |
depends on MEDIA_TUNER | |
- config V4L2_MEM2MEM_DEV | |
- tristate | |
- depends on VIDEOBUF_GEN | |
- | |
# | |
# Multimedia Video device configuration | |
# | |
--- 49,54 ---- | |
*************** | |
*** 1126,1131 **** | |
--- 1126,1152 ---- | |
This driver can be compiled as a module, called s2255drv. | |
endif # V4L_USB_DRIVERS | |
+ | |
+ config VIDEO_ISX005 | |
+ tristate "ISX005 supporting camera driver" | |
+ depends on I2C && VIDEO_V4L2 | |
+ ---help--- | |
+ This driver supports ISX005 SoC camera module | |
+ | |
+ config VIDEO_S5K6AAFX | |
+ tristate "S5K6AAFX Camera Sensor" | |
+ depends on I2C && VIDEO_V4L2 | |
+ ---help--- | |
+ This driver supports S5K6AAFX SoC camera module | |
+ | |
+ config VIDEO_S5K5CCGX | |
+ tristate "S5K5CCGX Camera Sensor" | |
+ depends on I2C && VIDEO_V4L2 | |
+ ---help--- | |
+ This driver supports S5K5CCGX SoC camera module | |
+ | |
+ source "drivers/media/video/samsung/Kconfig" | |
+ | |
endif # VIDEO_CAPTURE_DRIVERS | |
menuconfig V4L_MEM2MEM_DRIVERS | |
diff -crB 2/drivers/media/video/Makefile 1/drivers/media/video/Makefile | |
*** 2/drivers/media/video/Makefile 2012-09-24 11:44:01.434825531 +0530 | |
--- 1/drivers/media/video/Makefile 2011-05-18 12:34:44.000000000 +0530 | |
*************** | |
*** 84,89 **** | |
--- 84,92 ---- | |
obj-$(CONFIG_SOC_CAMERA_RJ54N1) += rj54n1cb0c.o | |
obj-$(CONFIG_SOC_CAMERA_TW9910) += tw9910.o | |
+ obj-$(CONFIG_VIDEO_ISX005) += isx005.o | |
+ obj-$(CONFIG_VIDEO_S5K6AAFX) += s5k6aafx.o | |
+ obj-$(CONFIG_VIDEO_S5K5CCGX) += s5k5ccgx.o | |
# And now the v4l2 drivers: | |
obj-$(CONFIG_VIDEO_BT848) += bt8xx/ | |
*************** | |
*** 171,176 **** | |
--- 174,180 ---- | |
obj-$(CONFIG_VIDEO_SH_VOU) += sh_vou.o | |
obj-$(CONFIG_VIDEO_AU0828) += au0828/ | |
+ obj-$(CONFIG_VIDEO_SAMSUNG) += samsung/ | |
obj-$(CONFIG_USB_VIDEO_CLASS) += uvc/ | |
obj-$(CONFIG_VIDEO_SAA7164) += saa7164/ | |
Only in 1/drivers/media/video: s5k4ecgx.c | |
Only in 1/drivers/media/video: s5k4ecgx_regs_1_0.h | |
Only in 1/drivers/media/video: s5k4ecgx_regs_1_1.h | |
Only in 1/drivers/media/video: s5k5ccgx.c | |
Only in 1/drivers/media/video: s5k5ccgx.h | |
Only in 1/drivers/media/video: s5k6aafx.c | |
Only in 1/drivers/media/video: s5k6aafx.h | |
Only in 1/drivers/media/video: s5ka3dfx.c | |
Only in 1/drivers/media/video: s5ka3dfx.h | |
Only in 1/drivers/media/video: samsung | |
diff -crB 2/drivers/mfd/Kconfig 1/drivers/mfd/Kconfig | |
*** 2/drivers/mfd/Kconfig 2012-09-24 11:44:01.550823361 +0530 | |
--- 1/drivers/mfd/Kconfig 2011-05-18 12:34:49.000000000 +0530 | |
*************** | |
*** 252,257 **** | |
--- 252,267 ---- | |
accessing the device, additional drivers must be enabled in order | |
to use the functionality of the device. | |
+ config MFD_MAX8998 | |
+ bool "Maxim Semiconductor MAX8998 PMIC Support" | |
+ depends on I2C=y | |
+ select MFD_CORE | |
+ help | |
+ Say yes here to support for Maxim Semiconductor MAX8998. This is | |
+ a Power Management IC. This driver provies common support for | |
+ accessing the device, additional drivers must be enabled in order | |
+ to use the functionality of the device. | |
+ | |
config MFD_WM8400 | |
tristate "Support Wolfson Microelectronics WM8400" | |
select MFD_CORE | |
diff -crB 2/drivers/mfd/Makefile 1/drivers/mfd/Makefile | |
*** 2/drivers/mfd/Makefile 2012-09-24 11:44:01.550823361 +0530 | |
--- 1/drivers/mfd/Makefile 2011-05-18 12:34:49.000000000 +0530 | |
*************** | |
*** 56,61 **** | |
--- 56,62 ---- | |
obj-$(CONFIG_PMIC_DA903X) += da903x.o | |
max8925-objs := max8925-core.o max8925-i2c.o | |
obj-$(CONFIG_MFD_MAX8925) += max8925.o | |
+ obj-$(CONFIG_MFD_MAX8998) += max8998.o max8998-irq.o | |
pcf50633-objs := pcf50633-core.o pcf50633-irq.o | |
obj-$(CONFIG_MFD_PCF50633) += pcf50633.o | |
Only in 1/drivers/mfd: max8998.c | |
Only in 1/drivers/mfd: max8998-irq.c | |
Only in 1/drivers/misc: 30pin_con.c | |
Only in 1/drivers/misc: ak8973.c | |
Only in 1/drivers/misc: ak8973-reg.h | |
Only in 1/drivers/misc: akm8975.c | |
Only in 1/drivers/misc: apanic.c | |
Only in 1/drivers/misc: fsa9480.c | |
diff -crB 2/drivers/misc/Kconfig 1/drivers/misc/Kconfig | |
*** 2/drivers/misc/Kconfig 2012-09-24 11:44:02.330808766 +0530 | |
--- 1/drivers/misc/Kconfig 2011-05-18 12:41:42.000000000 +0530 | |
*************** | |
*** 53,58 **** | |
--- 53,77 ---- | |
To compile this driver as a module, choose M here: the | |
module will be called ad525x_dpot-spi. | |
+ config ANDROID_PMEM | |
+ bool "Android pmem allocator" | |
+ default y | |
+ | |
+ if ANDROID_PMEM | |
+ comment "Reserved memory configurations" | |
+ config ANDROID_PMEM_MEMSIZE_PMEM | |
+ int "Memory size in kbytes for android surface using pmem" | |
+ default "8192" | |
+ | |
+ config ANDROID_PMEM_MEMSIZE_PMEM_GPU1 | |
+ int "Memory size in kbytes for android surface using pmem_gpu1" | |
+ default "3072" | |
+ | |
+ config ANDROID_PMEM_MEMSIZE_PMEM_ADSP | |
+ int "Memory size in kbytes for android surface using pmem_adsp" | |
+ default "6144" | |
+ endif | |
+ | |
config ATMEL_PWM | |
tristate "Atmel AT32/AT91 PWM support" | |
depends on AVR32 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91CAP9 | |
*************** | |
*** 199,204 **** | |
--- 218,230 ---- | |
driver (SCSI/ATA) which supports enclosures | |
or a SCSI enclosure device (SES) to use these services. | |
+ config KERNEL_DEBUGGER_CORE | |
+ bool "Kernel Debugger Core" | |
+ default n | |
+ ---help--- | |
+ Generic kernel debugging command processor used by low level | |
+ (interrupt context) platform-specific debuggers. | |
+ | |
config SGI_XP | |
tristate "Support communication between SGI SSIs" | |
depends on NET | |
*************** | |
*** 304,309 **** | |
--- 330,358 ---- | |
This driver can also be built as a module. If so, the module | |
will be called tsl2550. | |
+ config SENSORS_AK8973 | |
+ tristate "AK8973 magnetometer support" | |
+ default n | |
+ depends on I2C | |
+ help | |
+ If you say yes here you get support for Asahi Kasei's | |
+ orientation sensor AK8973. | |
+ | |
+ config SENSORS_AK8975 | |
+ tristate "AK8975 compass support" | |
+ default n | |
+ depends on I2C | |
+ help | |
+ If you say yes here you get support for Asahi Kasei's | |
+ orientation sensor AK8975. | |
+ | |
+ config SENSORS_KR3DM | |
+ tristate "KR3DM acceleration sensor support" | |
+ depends on I2C | |
+ default n | |
+ help | |
+ Driver for STMicro KR3DM accelerometer - digital motion sensor. | |
+ | |
config EP93XX_PWM | |
tristate "EP93xx PWM support" | |
depends on ARCH_EP93XX | |
*************** | |
*** 337,342 **** | |
--- 386,395 ---- | |
This driver can also be built as a module. If so, the module | |
will be calles ti_dac7512. | |
+ config UID_STAT | |
+ bool "UID based statistics tracking exported to /proc/uid_stat" | |
+ default n | |
+ | |
config VMWARE_BALLOON | |
tristate "VMware Balloon Driver" | |
depends on X86 | |
*************** | |
*** 353,361 **** | |
--- 406,504 ---- | |
To compile this driver as a module, choose M here: the | |
module will be called vmware_balloon. | |
+ config WL127X_RFKILL | |
+ tristate "Bluetooth power control driver for TI wl127x" | |
+ depends on RFKILL | |
+ default n | |
+ ---help--- | |
+ Creates an rfkill entry in sysfs for power control of Bluetooth | |
+ TI wl127x chips. | |
+ | |
+ config APANIC | |
+ bool "Android kernel panic diagnostics driver" | |
+ default n | |
+ ---help--- | |
+ Driver which handles kernel panics and attempts to write | |
+ critical debugging data to flash. | |
+ | |
+ config APANIC_PLABEL | |
+ string "Android panic dump flash partition label" | |
+ depends on APANIC | |
+ default "kpanic" | |
+ ---help--- | |
+ If your platform uses a different flash partition label for storing | |
+ crashdumps, enter it here. | |
+ | |
+ config SAMSUNG_JACK | |
+ bool "3.5MM ear jack driver for Samsung devices" | |
+ depends on INPUT | |
+ default n | |
+ ---help--- | |
+ This is 3.5MM ear jack driver for Samsung devices. | |
+ | |
+ If unsure, say N. | |
+ | |
+ config USB_SWITCH_FSA9480 | |
+ tristate "FSA9480 USB Switch" | |
+ depends on I2C | |
+ help | |
+ The FSA9480 is a USB port accessory detector and switch. | |
+ The FSA9480 is fully controlled using I2C and enables USB data, | |
+ stereo and mono audio, video, microphone and UART data to use | |
+ a common connector port. | |
+ | |
+ config 30PIN_CONN | |
+ tristate "Accessory detection driver" | |
+ depends on I2C | |
+ default n | |
+ help | |
+ Provides support for detecting Accessory,such as TA, Keyboard | |
+ | |
+ config MHL_SII9234 | |
+ tristate "SiI9234 MHL(Mobile HD Link) Transmitter support" | |
+ depends on I2C && VIDEO_TV20 | |
+ default n | |
+ ---help--- | |
+ Mobile HD Link Transmitter driver for SiI9234 | |
+ | |
source "drivers/misc/c2port/Kconfig" | |
source "drivers/misc/eeprom/Kconfig" | |
source "drivers/misc/cb710/Kconfig" | |
source "drivers/misc/iwmc3200top/Kconfig" | |
+ config SAMSUNG_MODEMCTL | |
+ bool "Samsung Modem Control/IO Driver" | |
+ | |
+ config SVNET_WHITELIST | |
+ bool "Samsung Modem control White port list" | |
+ depends on SAMSUNG_MODEMCTL | |
+ default n | |
+ help | |
+ send white port list | |
+ Say N, in doubt | |
+ | |
+ config PN544 | |
+ bool "NXP PN544 NFC Controller Driver" | |
+ default n | |
+ help | |
+ NXP PN544 Near Field Communication controller support. | |
+ | |
+ config VIBTONZ | |
+ tristate "Vibetonz" | |
+ default m | |
+ help | |
+ Say Y to enable Vibetonz support. | |
+ | |
+ config LEVEL | |
+ tristate "level_debug" | |
+ default y | |
+ help | |
+ Say Y to enable debug level I/F support. | |
+ | |
+ config STORAGE_DGS | |
+ tristate "readable dgs" | |
+ default m | |
+ help | |
+ Say Y to readable dgs I/F support. | |
+ | |
endif # MISC_DEVICES | |
Only in 1/drivers/misc: kernel_debugger.c | |
Only in 1/drivers/misc: kr3dm.c | |
Only in 1/drivers/misc: kr3dm_reg.h | |
Only in 1/drivers/misc: level | |
diff -crB 2/drivers/misc/Makefile 1/drivers/misc/Makefile | |
*** 2/drivers/misc/Makefile 2012-09-24 11:44:02.330808766 +0530 | |
--- 1/drivers/misc/Makefile 2011-05-18 12:41:17.000000000 +0530 | |
*************** | |
*** 14,21 **** | |
--- 14,23 ---- | |
obj-$(CONFIG_TIFM_CORE) += tifm_core.o | |
obj-$(CONFIG_TIFM_7XX1) += tifm_7xx1.o | |
obj-$(CONFIG_PHANTOM) += phantom.o | |
+ obj-$(CONFIG_ANDROID_PMEM) += pmem.o | |
obj-$(CONFIG_SGI_IOC4) += ioc4.o | |
obj-$(CONFIG_ENCLOSURE_SERVICES) += enclosure.o | |
+ obj-$(CONFIG_KERNEL_DEBUGGER_CORE) += kernel_debugger.o | |
obj-$(CONFIG_KGDB_TESTS) += kgdbts.o | |
obj-$(CONFIG_SGI_XP) += sgi-xp/ | |
obj-$(CONFIG_SGI_GRU) += sgi-gru/ | |
*************** | |
*** 26,33 **** | |
--- 28,47 ---- | |
obj-$(CONFIG_EP93XX_PWM) += ep93xx_pwm.o | |
obj-$(CONFIG_DS1682) += ds1682.o | |
obj-$(CONFIG_TI_DAC7512) += ti_dac7512.o | |
+ obj-$(CONFIG_UID_STAT) += uid_stat.o | |
obj-$(CONFIG_C2PORT) += c2port/ | |
obj-$(CONFIG_IWMC3200TOP) += iwmc3200top/ | |
obj-y += eeprom/ | |
obj-y += cb710/ | |
obj-$(CONFIG_VMWARE_BALLOON) += vmware_balloon.o | |
+ obj-$(CONFIG_WL127X_RFKILL) += wl127x-rfkill.o | |
+ obj-$(CONFIG_APANIC) += apanic.o | |
+ obj-$(CONFIG_PN544) += pn544.o | |
+ obj-$(CONFIG_SAMSUNG_JACK) += sec_jack.o | |
+ obj-$(CONFIG_USB_SWITCH_FSA9480) += fsa9480.o | |
+ obj-$(CONFIG_SAMSUNG_MODEMCTL) += samsung_modemctl/ | |
+ obj-$(CONFIG_VIBTONZ) += vibtonz/ | |
+ obj-$(CONFIG_LEVEL) += level/ | |
+ obj-$(CONFIG_30PIN_CONN) += 30pin_con.o | |
+ obj-$(CONFIG_MHL_SII9234) += sii9234.o | |
+ | |
Only in 1/drivers/misc: MHD_SiI9234.c | |
Only in 1/drivers/misc: MHD_SiI9234.h | |
Only in 1/drivers/misc: pmem.c | |
Only in 1/drivers/misc: pn544.c | |
Only in 1/drivers/misc: samsung_modemctl | |
Only in 1/drivers/misc: sec_jack.c | |
Only in 1/drivers/misc: sii9234.c | |
Only in 1/drivers/misc: sii9234.h | |
Only in 1/drivers/misc: sii9234_tpi_regs.h | |
Only in 1/drivers/misc: uid_stat.c | |
Only in 1/drivers/misc: vibtonz | |
Only in 1/drivers/misc: wl127x-rfkill.c | |
diff -crB 2/drivers/mmc/card/block.c 1/drivers/mmc/card/block.c | |
*** 2/drivers/mmc/card/block.c 2012-09-24 11:44:01.482824633 +0530 | |
--- 1/drivers/mmc/card/block.c 2011-05-18 12:34:49.000000000 +0530 | |
*************** | |
*** 86,96 **** | |
mutex_lock(&open_lock); | |
md->usage--; | |
if (md->usage == 0) { | |
! int devmaj = MAJOR(disk_devt(md->disk)); | |
! int devidx = MINOR(disk_devt(md->disk)) >> MMC_SHIFT; | |
! | |
! if (!devmaj) | |
! devidx = md->disk->first_minor >> MMC_SHIFT; | |
blk_cleanup_queue(md->queue.queue); | |
--- 86,92 ---- | |
mutex_lock(&open_lock); | |
md->usage--; | |
if (md->usage == 0) { | |
! int devidx = md->disk->first_minor >> MMC_SHIFT; | |
blk_cleanup_queue(md->queue.queue); | |
*************** | |
*** 237,247 **** | |
cmd.flags = MMC_RSP_SPI_R2 | MMC_RSP_R1 | MMC_CMD_AC; | |
err = mmc_wait_for_cmd(card->host, &cmd, 0); | |
if (err) | |
! printk(KERN_ERR "%s: error %d sending status comand", | |
req->rq_disk->disk_name, err); | |
return cmd.resp[0]; | |
} | |
static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) | |
{ | |
struct mmc_blk_data *md = mq->data; | |
--- 233,270 ---- | |
cmd.flags = MMC_RSP_SPI_R2 | MMC_RSP_R1 | MMC_CMD_AC; | |
err = mmc_wait_for_cmd(card->host, &cmd, 0); | |
if (err) | |
! printk(KERN_DEBUG "%s: error %d sending status comand", | |
req->rq_disk->disk_name, err); | |
return cmd.resp[0]; | |
} | |
+ static int | |
+ mmc_blk_set_blksize(struct mmc_blk_data *md, struct mmc_card *card) | |
+ { | |
+ struct mmc_command cmd; | |
+ int err; | |
+ | |
+ /* Block-addressed cards ignore MMC_SET_BLOCKLEN. */ | |
+ if (mmc_card_blockaddr(card)) | |
+ return 0; | |
+ | |
+ mmc_claim_host(card->host); | |
+ cmd.opcode = MMC_SET_BLOCKLEN; | |
+ cmd.arg = 512; | |
+ cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC; | |
+ err = mmc_wait_for_cmd(card->host, &cmd, 5); | |
+ mmc_release_host(card->host); | |
+ | |
+ if (err) { | |
+ printk(KERN_ERR "%s: unable to set block size to %d: %d\n", | |
+ md->disk->disk_name, cmd.arg, err); | |
+ return -EINVAL; | |
+ } | |
+ | |
+ return 0; | |
+ } | |
+ | |
+ | |
static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) | |
{ | |
struct mmc_blk_data *md = mq->data; | |
*************** | |
*** 249,254 **** | |
--- 272,284 ---- | |
struct mmc_blk_request brq; | |
int ret = 1, disable_multi = 0; | |
+ #ifdef CONFIG_MMC_BLOCK_DEFERRED_RESUME | |
+ if (mmc_bus_needs_resume(card->host)) { | |
+ mmc_resume_bus(card->host); | |
+ mmc_blk_set_blksize(md, card); | |
+ } | |
+ #endif | |
+ | |
mmc_claim_host(card->host); | |
do { | |
*************** | |
*** 348,361 **** | |
/* Redo read one sector at a time */ | |
printk(KERN_WARNING "%s: retrying using single " | |
"block read\n", req->rq_disk->disk_name); | |
! disable_multi = 1; | |
! continue; | |
} | |
status = get_card_status(card, req); | |
} | |
if (brq.cmd.error) { | |
! printk(KERN_ERR "%s: error %d sending read/write " | |
"command, response %#x, card status %#x\n", | |
req->rq_disk->disk_name, brq.cmd.error, | |
brq.cmd.resp[0], status); | |
--- 378,404 ---- | |
/* Redo read one sector at a time */ | |
printk(KERN_WARNING "%s: retrying using single " | |
"block read\n", req->rq_disk->disk_name); | |
! if(brq.data.error == -EILSEQ) { | |
! mq->rx_retries++; | |
! if(mq->rx_retries == 3) { | |
! mq->rx_retries = 0; | |
! disable_multi = 1; | |
! } | |
! mmc_card_adjust_cfg(card->host, READ); | |
! continue; | |
! } | |
! else { | |
! disable_multi = 1; | |
! continue; | |
! } | |
} | |
status = get_card_status(card, req); | |
+ } else if (disable_multi == 1) { | |
+ disable_multi = 0; | |
} | |
if (brq.cmd.error) { | |
! printk(KERN_DEBUG "%s: error %d sending read/write " | |
"command, response %#x, card status %#x\n", | |
req->rq_disk->disk_name, brq.cmd.error, | |
brq.cmd.resp[0], status); | |
*************** | |
*** 365,371 **** | |
if (brq.data.error == -ETIMEDOUT && brq.mrq.stop) | |
/* 'Stop' response contains card status */ | |
status = brq.mrq.stop->resp[0]; | |
! printk(KERN_ERR "%s: error %d transferring data," | |
" sector %u, nr %u, card status %#x\n", | |
req->rq_disk->disk_name, brq.data.error, | |
(unsigned)blk_rq_pos(req), | |
--- 408,414 ---- | |
if (brq.data.error == -ETIMEDOUT && brq.mrq.stop) | |
/* 'Stop' response contains card status */ | |
status = brq.mrq.stop->resp[0]; | |
! printk(KERN_DEBUG "%s: error %d transferring data," | |
" sector %u, nr %u, card status %#x\n", | |
req->rq_disk->disk_name, brq.data.error, | |
(unsigned)blk_rq_pos(req), | |
*************** | |
*** 373,379 **** | |
} | |
if (brq.stop.error) { | |
! printk(KERN_ERR "%s: error %d sending stop command, " | |
"response %#x, card status %#x\n", | |
req->rq_disk->disk_name, brq.stop.error, | |
brq.stop.resp[0], status); | |
--- 416,422 ---- | |
} | |
if (brq.stop.error) { | |
! printk(KERN_DEBUG "%s: error %d sending stop command, " | |
"response %#x, card status %#x\n", | |
req->rq_disk->disk_name, brq.stop.error, | |
brq.stop.resp[0], status); | |
*************** | |
*** 388,394 **** | |
cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; | |
err = mmc_wait_for_cmd(card->host, &cmd, 5); | |
if (err) { | |
! printk(KERN_ERR "%s: error %d requesting status\n", | |
req->rq_disk->disk_name, err); | |
goto cmd_err; | |
} | |
--- 431,437 ---- | |
cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; | |
err = mmc_wait_for_cmd(card->host, &cmd, 5); | |
if (err) { | |
! printk(KERN_DEBUG "%s: error %d requesting status\n", | |
req->rq_disk->disk_name, err); | |
goto cmd_err; | |
} | |
*************** | |
*** 421,426 **** | |
--- 464,479 ---- | |
spin_unlock_irq(&md->lock); | |
continue; | |
} | |
+ else { | |
+ if(brq.data.error == -EILSEQ) { | |
+ mq->tx_retries++; | |
+ mmc_card_adjust_cfg(card->host, WRITE); | |
+ if(mq->tx_retries < 3) | |
+ continue; | |
+ else | |
+ mq->tx_retries = 0; | |
+ } | |
+ } | |
goto cmd_err; | |
} | |
*************** | |
*** 522,527 **** | |
--- 575,581 ---- | |
md->disk->private_data = md; | |
md->disk->queue = md->queue.queue; | |
md->disk->driverfs_dev = &card->dev; | |
+ md->disk->flags = GENHD_FL_EXT_DEVT; | |
/* | |
* As discussed on lkml, GENHD_FL_REMOVABLE should: | |
*************** | |
*** 563,594 **** | |
return ERR_PTR(ret); | |
} | |
- static int | |
- mmc_blk_set_blksize(struct mmc_blk_data *md, struct mmc_card *card) | |
- { | |
- struct mmc_command cmd; | |
- int err; | |
- | |
- /* Block-addressed cards ignore MMC_SET_BLOCKLEN. */ | |
- if (mmc_card_blockaddr(card)) | |
- return 0; | |
- | |
- mmc_claim_host(card->host); | |
- cmd.opcode = MMC_SET_BLOCKLEN; | |
- cmd.arg = 512; | |
- cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC; | |
- err = mmc_wait_for_cmd(card->host, &cmd, 5); | |
- mmc_release_host(card->host); | |
- | |
- if (err) { | |
- printk(KERN_ERR "%s: unable to set block size to %d: %d\n", | |
- md->disk->disk_name, cmd.arg, err); | |
- return -EINVAL; | |
- } | |
- | |
- return 0; | |
- } | |
- | |
static int mmc_blk_probe(struct mmc_card *card) | |
{ | |
struct mmc_blk_data *md; | |
--- 617,622 ---- | |
*************** | |
*** 617,622 **** | |
--- 645,653 ---- | |
cap_str, md->read_only ? "(ro)" : ""); | |
mmc_set_drvdata(card, md); | |
+ #ifdef CONFIG_MMC_BLOCK_DEFERRED_RESUME | |
+ mmc_set_bus_resume_policy(card->host, 1); | |
+ #endif | |
add_disk(md->disk); | |
return 0; | |
*************** | |
*** 641,646 **** | |
--- 672,680 ---- | |
mmc_blk_put(md); | |
} | |
mmc_set_drvdata(card, NULL); | |
+ #ifdef CONFIG_MMC_BLOCK_DEFERRED_RESUME | |
+ mmc_set_bus_resume_policy(card->host, 0); | |
+ #endif | |
} | |
#ifdef CONFIG_PM | |
*************** | |
*** 659,665 **** | |
--- 693,701 ---- | |
struct mmc_blk_data *md = mmc_get_drvdata(card); | |
if (md) { | |
+ #ifndef CONFIG_MMC_BLOCK_DEFERRED_RESUME | |
mmc_blk_set_blksize(md, card); | |
+ #endif | |
mmc_queue_resume(&md->queue); | |
} | |
return 0; | |
diff -crB 2/drivers/mmc/card/Kconfig 1/drivers/mmc/card/Kconfig | |
*** 2/drivers/mmc/card/Kconfig 2012-09-24 11:44:01.482824633 +0530 | |
--- 1/drivers/mmc/card/Kconfig 2011-05-18 12:34:49.000000000 +0530 | |
*************** | |
*** 32,37 **** | |
--- 32,46 ---- | |
If unsure, say Y here. | |
+ config MMC_BLOCK_DEFERRED_RESUME | |
+ bool "Deferr MMC layer resume until I/O is requested" | |
+ depends on MMC_BLOCK | |
+ default n | |
+ help | |
+ Say Y here to enable deferred MMC resume until I/O | |
+ is requested. This will reduce overall resume latency and | |
+ save power when theres an SD card inserted but not being used. | |
+ | |
config SDIO_UART | |
tristate "SDIO UART/GPS class support" | |
help | |
diff -crB 2/drivers/mmc/card/queue.h 1/drivers/mmc/card/queue.h | |
*** 2/drivers/mmc/card/queue.h 2012-09-24 11:44:01.482824633 +0530 | |
--- 1/drivers/mmc/card/queue.h 2011-05-18 12:34:49.000000000 +0530 | |
*************** | |
*** 17,22 **** | |
--- 17,23 ---- | |
char *bounce_buf; | |
struct scatterlist *bounce_sg; | |
unsigned int bounce_sg_len; | |
+ unsigned int rx_retries, tx_retries; | |
}; | |
extern int mmc_init_queue(struct mmc_queue *, struct mmc_card *, spinlock_t *); | |
diff -crB 2/drivers/mmc/core/core.c 1/drivers/mmc/core/core.c | |
*** 2/drivers/mmc/core/core.c 2012-09-24 11:44:01.478824708 +0530 | |
--- 1/drivers/mmc/core/core.c 2011-05-18 12:34:49.000000000 +0530 | |
*************** | |
*** 22,27 **** | |
--- 22,28 ---- | |
#include <linux/scatterlist.h> | |
#include <linux/log2.h> | |
#include <linux/regulator/consumer.h> | |
+ #include <linux/wakelock.h> | |
#include <linux/mmc/card.h> | |
#include <linux/mmc/host.h> | |
*************** | |
*** 38,43 **** | |
--- 39,45 ---- | |
#include "sdio_ops.h" | |
static struct workqueue_struct *workqueue; | |
+ static struct wake_lock mmc_delayed_work_wake_lock; | |
/* | |
* Enabling software CRCs on the data blocks can be a significant (30%) | |
*************** | |
*** 69,74 **** | |
--- 71,77 ---- | |
static int mmc_schedule_delayed_work(struct delayed_work *work, | |
unsigned long delay) | |
{ | |
+ wake_lock(&mmc_delayed_work_wake_lock); | |
return queue_delayed_work(workqueue, work, delay); | |
} | |
*************** | |
*** 90,97 **** | |
*/ | |
void mmc_request_done(struct mmc_host *host, struct mmc_request *mrq) | |
{ | |
! struct mmc_command *cmd = mrq->cmd; | |
! int err = cmd->error; | |
if (err && cmd->retries && mmc_host_is_spi(host)) { | |
if (cmd->resp[0] & R1_SPI_ILLEGAL_COMMAND) | |
--- 93,110 ---- | |
*/ | |
void mmc_request_done(struct mmc_host *host, struct mmc_request *mrq) | |
{ | |
! struct mmc_command *cmd; | |
! int err; | |
! | |
! if(mrq == NULL) | |
! return; | |
! | |
! cmd = mrq->cmd; | |
! | |
! if(cmd == NULL) | |
! return; | |
! | |
! err = cmd->error; | |
if (err && cmd->retries && mmc_host_is_spi(host)) { | |
if (cmd->resp[0] & R1_SPI_ILLEGAL_COMMAND) | |
*************** | |
*** 545,553 **** | |
/* If the host is claimed then we do not want to disable it anymore */ | |
if (!mmc_try_claim_host(host)) | |
! return; | |
mmc_host_do_disable(host, 1); | |
mmc_do_release_host(host); | |
} | |
/** | |
--- 558,569 ---- | |
/* If the host is claimed then we do not want to disable it anymore */ | |
if (!mmc_try_claim_host(host)) | |
! goto out; | |
mmc_host_do_disable(host, 1); | |
mmc_do_release_host(host); | |
+ | |
+ out: | |
+ wake_unlock(&mmc_delayed_work_wake_lock); | |
} | |
/** | |
*************** | |
*** 907,918 **** | |
*/ | |
mmc_delay(10); | |
! if (host->f_min > 400000) { | |
! pr_warning("%s: Minimum clock frequency too high for " | |
! "identification mode\n", mmc_hostname(host)); | |
! host->ios.clock = host->f_min; | |
! } else | |
! host->ios.clock = 400000; | |
host->ios.power_mode = MMC_POWER_ON; | |
mmc_set_ios(host); | |
--- 923,929 ---- | |
*/ | |
mmc_delay(10); | |
! host->ios.clock = host->f_min; | |
host->ios.power_mode = MMC_POWER_ON; | |
mmc_set_ios(host); | |
*************** | |
*** 977,982 **** | |
--- 988,1034 ---- | |
spin_unlock_irqrestore(&host->lock, flags); | |
} | |
+ int mmc_resume_bus(struct mmc_host *host) | |
+ { | |
+ unsigned long flags; | |
+ int err = 0; | |
+ | |
+ if (!mmc_bus_needs_resume(host)) | |
+ return -EINVAL; | |
+ | |
+ printk("%s: Starting deferred resume\n", mmc_hostname(host)); | |
+ spin_lock_irqsave(&host->lock, flags); | |
+ host->bus_resume_flags &= ~MMC_BUSRESUME_NEEDS_RESUME; | |
+ host->rescan_disable = 0; | |
+ spin_unlock_irqrestore(&host->lock, flags); | |
+ | |
+ mmc_bus_get(host); | |
+ if (host->bus_ops && !host->bus_dead) { | |
+ mmc_power_up(host); | |
+ BUG_ON(!host->bus_ops->resume); | |
+ err = host->bus_ops->resume(host); | |
+ } | |
+ | |
+ #ifdef CONFIG_MACH_P1 | |
+ if (!err) { | |
+ #endif | |
+ if (host->bus_ops->detect && !host->bus_dead) | |
+ host->bus_ops->detect(host); | |
+ #ifdef CONFIG_MACH_P1 | |
+ } else { | |
+ printk(KERN_WARNING "%s: error %d during resume " | |
+ "(card was removed?)\n", | |
+ mmc_hostname(host), err); | |
+ } | |
+ #endif | |
+ | |
+ mmc_bus_put(host); | |
+ printk("%s: Deferred resume completed\n", mmc_hostname(host)); | |
+ return 0; | |
+ } | |
+ | |
+ EXPORT_SYMBOL(mmc_resume_bus); | |
+ | |
/* | |
* Assign a mmc bus handler to a host. Only one bus handler may control a | |
* host at any given time. | |
*************** | |
*** 1058,1063 **** | |
--- 1110,1116 ---- | |
u32 ocr; | |
int err; | |
unsigned long flags; | |
+ int extend_wakelock = 0; | |
spin_lock_irqsave(&host->lock, flags); | |
*************** | |
*** 1072,1079 **** | |
mmc_bus_get(host); | |
/* if there is a card registered, check whether it is still present */ | |
! if ((host->bus_ops != NULL) && host->bus_ops->detect && !host->bus_dead) | |
! host->bus_ops->detect(host); | |
mmc_bus_put(host); | |
--- 1125,1148 ---- | |
mmc_bus_get(host); | |
/* if there is a card registered, check whether it is still present */ | |
! if ((host->bus_ops != NULL) && host->bus_ops->detect && !host->bus_dead) { | |
! if(host->ops->get_cd && host->ops->get_cd(host) == 0) { | |
! if(host->bus_ops->remove) | |
! host->bus_ops->remove(host); | |
! | |
! mmc_claim_host(host); | |
! mmc_detach_bus(host); | |
! mmc_release_host(host); | |
! } | |
! else | |
! host->bus_ops->detect(host); | |
! } | |
! | |
! /* If the card was removed the bus will be marked | |
! * as dead - extend the wakelock so userspace | |
! * can respond */ | |
! if (host->bus_dead) | |
! extend_wakelock = 1; | |
mmc_bus_put(host); | |
*************** | |
*** 1112,1117 **** | |
--- 1181,1187 ---- | |
if (!err) { | |
if (mmc_attach_sdio(host, ocr)) | |
mmc_power_off(host); | |
+ extend_wakelock = 1; | |
goto out; | |
} | |
*************** | |
*** 1122,1127 **** | |
--- 1192,1198 ---- | |
if (!err) { | |
if (mmc_attach_sd(host, ocr)) | |
mmc_power_off(host); | |
+ extend_wakelock = 1; | |
goto out; | |
} | |
*************** | |
*** 1132,1137 **** | |
--- 1203,1209 ---- | |
if (!err) { | |
if (mmc_attach_mmc(host, ocr)) | |
mmc_power_off(host); | |
+ extend_wakelock = 1; | |
goto out; | |
} | |
*************** | |
*** 1139,1144 **** | |
--- 1211,1225 ---- | |
mmc_power_off(host); | |
out: | |
+ #if defined(CONFIG_MACH_P1) | |
+ wake_lock_timeout(&mmc_delayed_work_wake_lock, 3*HZ); | |
+ #else | |
+ if (extend_wakelock) | |
+ wake_lock_timeout(&mmc_delayed_work_wake_lock, HZ / 2); | |
+ else | |
+ wake_unlock(&mmc_delayed_work_wake_lock); | |
+ #endif | |
+ | |
if (host->caps & MMC_CAP_NEEDS_POLL) | |
mmc_schedule_delayed_work(&host->detect, HZ); | |
} | |
*************** | |
*** 1258,1263 **** | |
--- 1339,1351 ---- | |
} | |
EXPORT_SYMBOL(mmc_card_can_sleep); | |
+ void mmc_card_adjust_cfg(struct mmc_host *host, int rw) | |
+ { | |
+ if(host->ops->adjust_cfg) | |
+ host->ops->adjust_cfg(host, rw); | |
+ } | |
+ EXPORT_SYMBOL(mmc_card_adjust_cfg); | |
+ | |
#ifdef CONFIG_PM | |
/** | |
*************** | |
*** 1268,1273 **** | |
--- 1356,1364 ---- | |
{ | |
int err = 0; | |
+ if (mmc_bus_needs_resume(host)) | |
+ return 0; | |
+ | |
if (host->caps & MMC_CAP_DISABLE) | |
cancel_delayed_work(&host->disable); | |
cancel_delayed_work(&host->detect); | |
*************** | |
*** 1297,1302 **** | |
--- 1388,1399 ---- | |
int err = 0; | |
mmc_bus_get(host); | |
+ if (mmc_bus_manual_resume(host)) { | |
+ host->bus_resume_flags |= MMC_BUSRESUME_NEEDS_RESUME; | |
+ mmc_bus_put(host); | |
+ return 0; | |
+ } | |
+ | |
if (host->bus_ops && !host->bus_dead) { | |
if (!(host->pm_flags & MMC_PM_KEEP_POWER)) { | |
mmc_power_up(host); | |
*************** | |
*** 1334,1339 **** | |
--- 1430,1439 ---- | |
case PM_SUSPEND_PREPARE: | |
spin_lock_irqsave(&host->lock, flags); | |
+ if (mmc_bus_needs_resume(host)) { | |
+ spin_unlock_irqrestore(&host->lock, flags); | |
+ break; | |
+ } | |
host->rescan_disable = 1; | |
spin_unlock_irqrestore(&host->lock, flags); | |
cancel_delayed_work_sync(&host->detect); | |
*************** | |
*** 1355,1363 **** | |
case PM_POST_HIBERNATION: | |
spin_lock_irqsave(&host->lock, flags); | |
host->rescan_disable = 0; | |
spin_unlock_irqrestore(&host->lock, flags); | |
! mmc_detect_change(host, 0); | |
} | |
--- 1455,1468 ---- | |
case PM_POST_HIBERNATION: | |
spin_lock_irqsave(&host->lock, flags); | |
+ if (mmc_bus_manual_resume(host)) { | |
+ spin_unlock_irqrestore(&host->lock, flags); | |
+ break; | |
+ } | |
host->rescan_disable = 0; | |
spin_unlock_irqrestore(&host->lock, flags); | |
! if (!host->card || host->card->type != MMC_TYPE_SDIO) | |
! mmc_detect_change(host, 0); | |
} | |
*************** | |
*** 1365,1374 **** | |
--- 1470,1497 ---- | |
} | |
#endif | |
+ #ifdef CONFIG_MMC_EMBEDDED_SDIO | |
+ void mmc_set_embedded_sdio_data(struct mmc_host *host, | |
+ struct sdio_cis *cis, | |
+ struct sdio_cccr *cccr, | |
+ struct sdio_embedded_func *funcs, | |
+ int num_funcs) | |
+ { | |
+ host->embedded_sdio_data.cis = cis; | |
+ host->embedded_sdio_data.cccr = cccr; | |
+ host->embedded_sdio_data.funcs = funcs; | |
+ host->embedded_sdio_data.num_funcs = num_funcs; | |
+ } | |
+ | |
+ EXPORT_SYMBOL(mmc_set_embedded_sdio_data); | |
+ #endif | |
+ | |
static int __init mmc_init(void) | |
{ | |
int ret; | |
+ wake_lock_init(&mmc_delayed_work_wake_lock, WAKE_LOCK_SUSPEND, "mmc_delayed_work"); | |
+ | |
workqueue = create_singlethread_workqueue("kmmcd"); | |
if (!workqueue) | |
return -ENOMEM; | |
*************** | |
*** 1403,1408 **** | |
--- 1526,1532 ---- | |
mmc_unregister_host_class(); | |
mmc_unregister_bus(); | |
destroy_workqueue(workqueue); | |
+ wake_lock_destroy(&mmc_delayed_work_wake_lock); | |
} | |
subsys_initcall(mmc_init); | |
diff -crB 2/drivers/mmc/core/host.c 1/drivers/mmc/core/host.c | |
*** 2/drivers/mmc/core/host.c 2012-09-24 11:44:01.478824708 +0530 | |
--- 1/drivers/mmc/core/host.c 2011-05-18 12:34:49.000000000 +0530 | |
*************** | |
*** 137,143 **** | |
#endif | |
mmc_start_host(host); | |
! register_pm_notifier(&host->pm_notify); | |
return 0; | |
} | |
--- 137,144 ---- | |
#endif | |
mmc_start_host(host); | |
! if (!(host->pm_flags & MMC_PM_IGNORE_PM_NOTIFY)) | |
! register_pm_notifier(&host->pm_notify); | |
return 0; | |
} | |
*************** | |
*** 154,160 **** | |
*/ | |
void mmc_remove_host(struct mmc_host *host) | |
{ | |
! unregister_pm_notifier(&host->pm_notify); | |
mmc_stop_host(host); | |
#ifdef CONFIG_DEBUG_FS | |
--- 155,163 ---- | |
*/ | |
void mmc_remove_host(struct mmc_host *host) | |
{ | |
! if (!(host->pm_flags & MMC_PM_IGNORE_PM_NOTIFY)) | |
! unregister_pm_notifier(&host->pm_notify); | |
! | |
mmc_stop_host(host); | |
#ifdef CONFIG_DEBUG_FS | |
diff -crB 2/drivers/mmc/core/Kconfig 1/drivers/mmc/core/Kconfig | |
*** 2/drivers/mmc/core/Kconfig 2012-09-24 11:44:01.478824708 +0530 | |
--- 1/drivers/mmc/core/Kconfig 2011-05-18 12:34:49.000000000 +0530 | |
*************** | |
*** 16,18 **** | |
--- 16,35 ---- | |
This option sets a default which can be overridden by the | |
module parameter "removable=0" or "removable=1". | |
+ | |
+ config MMC_EMBEDDED_SDIO | |
+ boolean "MMC embedded SDIO device support (EXPERIMENTAL)" | |
+ depends on EXPERIMENTAL | |
+ help | |
+ If you say Y here, support will be added for embedded SDIO | |
+ devices which do not contain the necessary enumeration | |
+ support in hardware to be properly detected. | |
+ | |
+ config MMC_PARANOID_SD_INIT | |
+ bool "Enable paranoid SD card initialization (EXPERIMENTAL)" | |
+ depends on EXPERIMENTAL | |
+ help | |
+ If you say Y here, the MMC layer will be extra paranoid | |
+ about re-trying SD init requests. This can be a useful | |
+ work-around for buggy controllers and hardware. Enable | |
+ if you are experiencing issues with SD detection. | |
diff -crB 2/drivers/mmc/core/mmc.c 1/drivers/mmc/core/mmc.c | |
*** 2/drivers/mmc/core/mmc.c 2012-09-24 11:44:01.478824708 +0530 | |
--- 1/drivers/mmc/core/mmc.c 2011-05-18 12:34:49.000000000 +0530 | |
*************** | |
*** 114,130 **** | |
static int mmc_decode_csd(struct mmc_card *card) | |
{ | |
struct mmc_csd *csd = &card->csd; | |
! unsigned int e, m, csd_struct; | |
u32 *resp = card->raw_csd; | |
/* | |
* We only understand CSD structure v1.1 and v1.2. | |
* v1.2 has extra information in bits 15, 11 and 10. | |
*/ | |
! csd_struct = UNSTUFF_BITS(resp, 126, 2); | |
! if (csd_struct != 1 && csd_struct != 2) { | |
printk(KERN_ERR "%s: unrecognised CSD structure version %d\n", | |
! mmc_hostname(card->host), csd_struct); | |
return -EINVAL; | |
} | |
--- 114,131 ---- | |
static int mmc_decode_csd(struct mmc_card *card) | |
{ | |
struct mmc_csd *csd = &card->csd; | |
! unsigned int e, m; | |
u32 *resp = card->raw_csd; | |
/* | |
* We only understand CSD structure v1.1 and v1.2. | |
* v1.2 has extra information in bits 15, 11 and 10. | |
+ * We also support eMMC v4.4 & v4.41. | |
*/ | |
! csd->structure = UNSTUFF_BITS(resp, 126, 2); | |
! if (csd->structure == 0) { | |
printk(KERN_ERR "%s: unrecognised CSD structure version %d\n", | |
! mmc_hostname(card->host), csd->structure); | |
return -EINVAL; | |
} | |
*************** | |
*** 207,217 **** | |
goto out; | |
} | |
card->ext_csd.rev = ext_csd[EXT_CSD_REV]; | |
if (card->ext_csd.rev > 5) { | |
! printk(KERN_ERR "%s: unrecognised EXT_CSD structure " | |
! "version %d\n", mmc_hostname(card->host), | |
! card->ext_csd.rev); | |
err = -EINVAL; | |
goto out; | |
} | |
--- 208,229 ---- | |
goto out; | |
} | |
+ /* Version is coded in the CSD_STRUCTURE byte in the EXT_CSD register */ | |
+ if (card->csd.structure == 3) { | |
+ int ext_csd_struct = ext_csd[EXT_CSD_STRUCTURE]; | |
+ if (ext_csd_struct > 2) { | |
+ printk(KERN_ERR "%s: unrecognised EXT_CSD structure " | |
+ "version %d\n", mmc_hostname(card->host), | |
+ ext_csd_struct); | |
+ err = -EINVAL; | |
+ goto out; | |
+ } | |
+ } | |
+ | |
card->ext_csd.rev = ext_csd[EXT_CSD_REV]; | |
if (card->ext_csd.rev > 5) { | |
! printk(KERN_ERR "%s: unrecognised EXT_CSD revision %d\n", | |
! mmc_hostname(card->host), card->ext_csd.rev); | |
err = -EINVAL; | |
goto out; | |
} | |
*************** | |
*** 362,367 **** | |
--- 374,380 ---- | |
card->type = MMC_TYPE_MMC; | |
card->rca = 1; | |
memcpy(card->raw_cid, cid, sizeof(card->raw_cid)); | |
+ host->card = card; | |
} | |
/* | |
*************** | |
*** 474,487 **** | |
} | |
} | |
- if (!oldcard) | |
- host->card = card; | |
- | |
return 0; | |
free_card: | |
! if (!oldcard) | |
mmc_remove_card(card); | |
err: | |
return err; | |
--- 487,499 ---- | |
} | |
} | |
return 0; | |
free_card: | |
! if (!oldcard) { | |
mmc_remove_card(card); | |
+ host->card = NULL; | |
+ } | |
err: | |
return err; | |
diff -crB 2/drivers/mmc/core/sd.c 1/drivers/mmc/core/sd.c | |
*** 2/drivers/mmc/core/sd.c 2012-09-24 11:44:01.478824708 +0530 | |
--- 1/drivers/mmc/core/sd.c 2011-05-18 12:34:49.000000000 +0530 | |
*************** | |
*** 337,343 **** | |
int err; | |
u32 cid[4]; | |
unsigned int max_dtr; | |
! | |
BUG_ON(!host); | |
WARN_ON(!host->claimed); | |
--- 337,345 ---- | |
int err; | |
u32 cid[4]; | |
unsigned int max_dtr; | |
! #ifdef CONFIG_MMC_PARANOID_SD_INIT | |
! int retries; | |
! #endif | |
BUG_ON(!host); | |
WARN_ON(!host->claimed); | |
*************** | |
*** 392,397 **** | |
--- 394,400 ---- | |
card->type = MMC_TYPE_SD; | |
memcpy(card->raw_cid, cid, sizeof(card->raw_cid)); | |
+ host->card = card; | |
} | |
/* | |
*************** | |
*** 444,450 **** | |
--- 446,471 ---- | |
/* | |
* Fetch switch information from card. | |
*/ | |
+ #ifdef CONFIG_MMC_PARANOID_SD_INIT | |
+ for (retries = 1; retries <= 3; retries++) { | |
+ err = mmc_read_switch(card); | |
+ if (!err) { | |
+ if (retries > 1) { | |
+ printk(KERN_WARNING | |
+ "%s: recovered\n", | |
+ mmc_hostname(host)); | |
+ } | |
+ break; | |
+ } else { | |
+ printk(KERN_WARNING | |
+ "%s: read switch failed (attempt %d)\n", | |
+ mmc_hostname(host), retries); | |
+ } | |
+ } | |
+ #else | |
err = mmc_read_switch(card); | |
+ #endif | |
+ | |
if (err) | |
goto free_card; | |
} | |
*************** | |
*** 509,522 **** | |
} | |
} | |
- if (!oldcard) | |
- host->card = card; | |
- | |
return 0; | |
free_card: | |
! if (!oldcard) | |
mmc_remove_card(card); | |
err: | |
return err; | |
--- 530,542 ---- | |
} | |
} | |
return 0; | |
free_card: | |
! if (!oldcard) { | |
mmc_remove_card(card); | |
+ host->card = NULL; | |
+ } | |
err: | |
return err; | |
*************** | |
*** 539,556 **** | |
*/ | |
static void mmc_sd_detect(struct mmc_host *host) | |
{ | |
! int err; | |
BUG_ON(!host); | |
BUG_ON(!host->card); | |
! | |
mmc_claim_host(host); | |
/* | |
* Just check if our card has been removed. | |
*/ | |
err = mmc_send_status(host->card, NULL); | |
! | |
mmc_release_host(host); | |
if (err) { | |
--- 559,594 ---- | |
*/ | |
static void mmc_sd_detect(struct mmc_host *host) | |
{ | |
! int err = 0; | |
! #ifdef CONFIG_MMC_PARANOID_SD_INIT | |
! int retries = 5; | |
! #endif | |
BUG_ON(!host); | |
BUG_ON(!host->card); | |
! | |
mmc_claim_host(host); | |
/* | |
* Just check if our card has been removed. | |
*/ | |
+ #ifdef CONFIG_MMC_PARANOID_SD_INIT | |
+ while(retries) { | |
+ err = mmc_send_status(host->card, NULL); | |
+ if (err) { | |
+ retries--; | |
+ udelay(5); | |
+ continue; | |
+ } | |
+ break; | |
+ } | |
+ if (!retries) { | |
+ printk(KERN_ERR "%s(%s): Unable to re-detect card (%d)\n", | |
+ __func__, mmc_hostname(host), err); | |
+ } | |
+ #else | |
err = mmc_send_status(host->card, NULL); | |
! #endif | |
mmc_release_host(host); | |
if (err) { | |
*************** | |
*** 588,599 **** | |
--- 626,656 ---- | |
static int mmc_sd_resume(struct mmc_host *host) | |
{ | |
int err; | |
+ #ifdef CONFIG_MMC_PARANOID_SD_INIT | |
+ int retries; | |
+ #endif | |
BUG_ON(!host); | |
BUG_ON(!host->card); | |
mmc_claim_host(host); | |
+ #ifdef CONFIG_MMC_PARANOID_SD_INIT | |
+ retries = 5; | |
+ while (retries) { | |
+ err = mmc_sd_init_card(host, host->ocr, host->card); | |
+ | |
+ if (err) { | |
+ printk(KERN_ERR "%s: Re-init card rc = %d (retries = %d)\n", | |
+ mmc_hostname(host), err, retries); | |
+ mdelay(5); | |
+ retries--; | |
+ continue; | |
+ } | |
+ break; | |
+ } | |
+ #else | |
err = mmc_sd_init_card(host, host->ocr, host->card); | |
+ #endif | |
mmc_release_host(host); | |
return err; | |
*************** | |
*** 640,645 **** | |
--- 697,705 ---- | |
int mmc_attach_sd(struct mmc_host *host, u32 ocr) | |
{ | |
int err; | |
+ #ifdef CONFIG_MMC_PARANOID_SD_INIT | |
+ int retries; | |
+ #endif | |
BUG_ON(!host); | |
WARN_ON(!host->claimed); | |
*************** | |
*** 688,696 **** | |
--- 748,774 ---- | |
/* | |
* Detect and init the card. | |
*/ | |
+ #ifdef CONFIG_MMC_PARANOID_SD_INIT | |
+ retries = 5; | |
+ while (retries) { | |
+ err = mmc_sd_init_card(host, host->ocr, NULL); | |
+ if (err) { | |
+ retries--; | |
+ continue; | |
+ } | |
+ break; | |
+ } | |
+ | |
+ if (!retries) { | |
+ printk(KERN_ERR "%s: mmc_sd_init_card() failure (err = %d)\n", | |
+ mmc_hostname(host), err); | |
+ goto err; | |
+ } | |
+ #else | |
err = mmc_sd_init_card(host, host->ocr, NULL); | |
if (err) | |
goto err; | |
+ #endif | |
mmc_release_host(host); | |
diff -crB 2/drivers/mmc/core/sdio_bus.c 1/drivers/mmc/core/sdio_bus.c | |
*** 2/drivers/mmc/core/sdio_bus.c 2012-09-24 11:44:01.482824633 +0530 | |
--- 1/drivers/mmc/core/sdio_bus.c 2011-05-18 12:34:49.000000000 +0530 | |
*************** | |
*** 21,26 **** | |
--- 21,30 ---- | |
#include "sdio_cis.h" | |
#include "sdio_bus.h" | |
+ #ifdef CONFIG_MMC_EMBEDDED_SDIO | |
+ #include <linux/mmc/host.h> | |
+ #endif | |
+ | |
/* show configuration fields */ | |
#define sdio_config_attr(field, format_string) \ | |
static ssize_t \ | |
*************** | |
*** 200,206 **** | |
{ | |
struct sdio_func *func = dev_to_sdio_func(dev); | |
! sdio_free_func_cis(func); | |
if (func->info) | |
kfree(func->info); | |
--- 204,217 ---- | |
{ | |
struct sdio_func *func = dev_to_sdio_func(dev); | |
! #ifdef CONFIG_MMC_EMBEDDED_SDIO | |
! /* | |
! * If this device is embedded then we never allocated | |
! * cis tables for this func | |
! */ | |
! if (!func->card->host->embedded_sdio_data.funcs) | |
! #endif | |
! sdio_free_func_cis(func); | |
if (func->info) | |
kfree(func->info); | |
diff -crB 2/drivers/mmc/core/sdio.c 1/drivers/mmc/core/sdio.c | |
*** 2/drivers/mmc/core/sdio.c 2012-09-24 11:44:01.482824633 +0530 | |
--- 1/drivers/mmc/core/sdio.c 2011-05-18 12:34:49.000000000 +0530 | |
*************** | |
*** 24,29 **** | |
--- 24,35 ---- | |
#include "sdio_ops.h" | |
#include "sdio_cis.h" | |
+ #ifdef CONFIG_MMC_EMBEDDED_SDIO | |
+ #include <linux/mmc/sdio_ids.h> | |
+ #endif | |
+ | |
+ #define BRCM_PATCH | |
+ | |
static int sdio_read_fbr(struct sdio_func *func) | |
{ | |
int ret; | |
*************** | |
*** 321,339 **** | |
goto remove; | |
} | |
! /* | |
! * Read the common registers. | |
! */ | |
! err = sdio_read_cccr(card); | |
! if (err) | |
! goto remove; | |
! /* | |
! * Read the common CIS tuples. | |
! */ | |
! err = sdio_read_common_cis(card); | |
! if (err) | |
! goto remove; | |
if (oldcard) { | |
int same = (card->cis.vendor == oldcard->cis.vendor && | |
--- 327,361 ---- | |
goto remove; | |
} | |
! #ifdef CONFIG_MMC_EMBEDDED_SDIO | |
! if (host->embedded_sdio_data.cccr) | |
! memcpy(&card->cccr, host->embedded_sdio_data.cccr, sizeof(struct sdio_cccr)); | |
! else { | |
! #endif | |
! /* | |
! * Read the common registers. | |
! */ | |
! err = sdio_read_cccr(card); | |
! if (err) | |
! goto remove; | |
! #ifdef CONFIG_MMC_EMBEDDED_SDIO | |
! } | |
! #endif | |
! #ifdef CONFIG_MMC_EMBEDDED_SDIO | |
! if (host->embedded_sdio_data.cis) | |
! memcpy(&card->cis, host->embedded_sdio_data.cis, sizeof(struct sdio_cis)); | |
! else { | |
! #endif | |
! /* | |
! * Read the common CIS tuples. | |
! */ | |
! err = sdio_read_common_cis(card); | |
! if (err) | |
! goto remove; | |
! #ifdef CONFIG_MMC_EMBEDDED_SDIO | |
! } | |
! #endif | |
if (oldcard) { | |
int same = (card->cis.vendor == oldcard->cis.vendor && | |
*************** | |
*** 346,351 **** | |
--- 368,375 ---- | |
card = oldcard; | |
return 0; | |
} | |
+ else | |
+ host->card = card; | |
/* | |
* Switch to high-speed (if supported). | |
*************** | |
*** 376,388 **** | |
if (err) | |
goto remove; | |
- if (!oldcard) | |
- host->card = card; | |
return 0; | |
remove: | |
! if (!oldcard) | |
mmc_remove_card(card); | |
err: | |
return err; | |
--- 400,412 ---- | |
if (err) | |
goto remove; | |
return 0; | |
remove: | |
! if (!oldcard) { | |
mmc_remove_card(card); | |
+ host->card = NULL; | |
+ } | |
err: | |
return err; | |
*************** | |
*** 445,451 **** | |
static int mmc_sdio_suspend(struct mmc_host *host) | |
{ | |
int i, err = 0; | |
! | |
for (i = 0; i < host->card->sdio_funcs; i++) { | |
struct sdio_func *func = host->card->sdio_func[i]; | |
if (func && sdio_func_present(func) && func->dev.driver) { | |
--- 469,475 ---- | |
static int mmc_sdio_suspend(struct mmc_host *host) | |
{ | |
int i, err = 0; | |
! #ifndef BRCM_PATCH | |
for (i = 0; i < host->card->sdio_funcs; i++) { | |
struct sdio_func *func = host->card->sdio_func[i]; | |
if (func && sdio_func_present(func) && func->dev.driver) { | |
*************** | |
*** 472,485 **** | |
sdio_disable_wide(host->card); | |
mmc_release_host(host); | |
} | |
! | |
return err; | |
} | |
static int mmc_sdio_resume(struct mmc_host *host) | |
{ | |
! int i, err; | |
! | |
BUG_ON(!host); | |
BUG_ON(!host->card); | |
--- 496,509 ---- | |
sdio_disable_wide(host->card); | |
mmc_release_host(host); | |
} | |
! #endif | |
return err; | |
} | |
static int mmc_sdio_resume(struct mmc_host *host) | |
{ | |
! int i, err = 0; | |
! #ifndef BRCM_PATCH | |
BUG_ON(!host); | |
BUG_ON(!host->card); | |
*************** | |
*** 511,517 **** | |
err = pmops->resume(&func->dev); | |
} | |
} | |
! | |
return err; | |
} | |
--- 535,541 ---- | |
err = pmops->resume(&func->dev); | |
} | |
} | |
! #endif | |
return err; | |
} | |
*************** | |
*** 573,578 **** | |
--- 597,607 ---- | |
funcs = (ocr & 0x70000000) >> 28; | |
card->sdio_funcs = 0; | |
+ #ifdef CONFIG_MMC_EMBEDDED_SDIO | |
+ if (host->embedded_sdio_data.funcs) | |
+ card->sdio_funcs = funcs = host->embedded_sdio_data.num_funcs; | |
+ #endif | |
+ | |
/* | |
* If needed, disconnect card detection pull-up resistor. | |
*/ | |
*************** | |
*** 584,592 **** | |
* Initialize (but don't add) all present functions. | |
*/ | |
for (i = 0; i < funcs; i++, card->sdio_funcs++) { | |
! err = sdio_init_func(host->card, i + 1); | |
! if (err) | |
! goto remove; | |
} | |
mmc_release_host(host); | |
--- 613,639 ---- | |
* Initialize (but don't add) all present functions. | |
*/ | |
for (i = 0; i < funcs; i++, card->sdio_funcs++) { | |
! #ifdef CONFIG_MMC_EMBEDDED_SDIO | |
! if (host->embedded_sdio_data.funcs) { | |
! struct sdio_func *tmp; | |
! | |
! tmp = sdio_alloc_func(host->card); | |
! if (IS_ERR(tmp)) | |
! goto remove; | |
! tmp->num = (i + 1); | |
! card->sdio_func[i] = tmp; | |
! tmp->class = host->embedded_sdio_data.funcs[i].f_class; | |
! tmp->max_blksize = host->embedded_sdio_data.funcs[i].f_maxblksize; | |
! tmp->vendor = card->cis.vendor; | |
! tmp->device = card->cis.device; | |
! } else { | |
! #endif | |
! err = sdio_init_func(host->card, i + 1); | |
! if (err) | |
! goto remove; | |
! #ifdef CONFIG_MMC_EMBEDDED_SDIO | |
! } | |
! #endif | |
} | |
mmc_release_host(host); | |
*************** | |
*** 628,630 **** | |
--- 675,756 ---- | |
return err; | |
} | |
+ int sdio_reset_comm(struct mmc_card *card) | |
+ { | |
+ struct mmc_host *host = card->host; | |
+ u32 ocr; | |
+ int err; | |
+ | |
+ printk("%s():\n", __func__); | |
+ mmc_claim_host(host); | |
+ | |
+ mmc_go_idle(host); | |
+ | |
+ mmc_set_clock(host, host->f_min); | |
+ | |
+ err = mmc_send_io_op_cond(host, 0, &ocr); | |
+ if (err) | |
+ goto err; | |
+ | |
+ host->ocr = mmc_select_voltage(host, ocr); | |
+ if (!host->ocr) { | |
+ err = -EINVAL; | |
+ goto err; | |
+ } | |
+ | |
+ err = mmc_send_io_op_cond(host, host->ocr, &ocr); | |
+ if (err) | |
+ goto err; | |
+ | |
+ if (mmc_host_is_spi(host)) { | |
+ err = mmc_spi_set_crc(host, use_spi_crc); | |
+ if (err) | |
+ goto err; | |
+ } | |
+ | |
+ if (!mmc_host_is_spi(host)) { | |
+ err = mmc_send_relative_addr(host, &card->rca); | |
+ if (err) | |
+ goto err; | |
+ mmc_set_bus_mode(host, MMC_BUSMODE_PUSHPULL); | |
+ } | |
+ if (!mmc_host_is_spi(host)) { | |
+ err = mmc_select_card(card); | |
+ if (err) | |
+ goto err; | |
+ } | |
+ | |
+ /* | |
+ * Switch to high-speed (if supported). | |
+ */ | |
+ err = sdio_enable_hs(card); | |
+ if (err) | |
+ goto err; | |
+ | |
+ /* | |
+ * Change to the card's maximum speed. | |
+ */ | |
+ if (mmc_card_highspeed(card)) { | |
+ /* | |
+ * The SDIO specification doesn't mention how | |
+ * the CIS transfer speed register relates to | |
+ * high-speed, but it seems that 50 MHz is | |
+ * mandatory. | |
+ */ | |
+ mmc_set_clock(host, 50000000); | |
+ } else { | |
+ mmc_set_clock(host, card->cis.max_dtr); | |
+ } | |
+ | |
+ err = sdio_enable_wide(card); | |
+ if (err) | |
+ goto err; | |
+ mmc_release_host(host); | |
+ return 0; | |
+ err: | |
+ printk("%s: Error resetting SDIO communications (%d)\n", | |
+ mmc_hostname(host), err); | |
+ mmc_release_host(host); | |
+ return err; | |
+ } | |
+ EXPORT_SYMBOL(sdio_reset_comm); | |
diff -crB 2/drivers/mmc/core/sdio_io.c 1/drivers/mmc/core/sdio_io.c | |
*** 2/drivers/mmc/core/sdio_io.c 2012-09-24 11:44:01.478824708 +0530 | |
--- 1/drivers/mmc/core/sdio_io.c 2011-05-18 12:34:49.000000000 +0530 | |
*************** | |
*** 383,388 **** | |
--- 383,421 ---- | |
EXPORT_SYMBOL_GPL(sdio_readb); | |
/** | |
+ * sdio_readb_ext - read a single byte from a SDIO function | |
+ * @func: SDIO function to access | |
+ * @addr: address to read | |
+ * @err_ret: optional status value from transfer | |
+ * @in: value to add to argument | |
+ * | |
+ * Reads a single byte from the address space of a given SDIO | |
+ * function. If there is a problem reading the address, 0xff | |
+ * is returned and @err_ret will contain the error code. | |
+ */ | |
+ unsigned char sdio_readb_ext(struct sdio_func *func, unsigned int addr, | |
+ int *err_ret, unsigned in) | |
+ { | |
+ int ret; | |
+ unsigned char val; | |
+ | |
+ BUG_ON(!func); | |
+ | |
+ if (err_ret) | |
+ *err_ret = 0; | |
+ | |
+ ret = mmc_io_rw_direct(func->card, 0, func->num, addr, (u8)in, &val); | |
+ if (ret) { | |
+ if (err_ret) | |
+ *err_ret = ret; | |
+ return 0xFF; | |
+ } | |
+ | |
+ return val; | |
+ } | |
+ EXPORT_SYMBOL_GPL(sdio_readb_ext); | |
+ | |
+ /** | |
* sdio_writeb - write a single byte to a SDIO function | |
* @func: SDIO function to access | |
* @b: byte to write | |
diff -crB 2/drivers/mmc/host/Kconfig 1/drivers/mmc/host/Kconfig | |
*** 2/drivers/mmc/host/Kconfig 2012-09-24 11:44:01.478824708 +0530 | |
--- 1/drivers/mmc/host/Kconfig 2011-05-18 12:34:49.000000000 +0530 | |
*************** | |
*** 123,129 **** | |
config MMC_SDHCI_S3C | |
tristate "SDHCI support on Samsung S3C SoC" | |
! depends on MMC_SDHCI && (PLAT_S3C24XX || PLAT_S3C64XX) | |
help | |
This selects the Secure Digital Host Controller Interface (SDHCI) | |
often referrered to as the HSMMC block in some of the Samsung S3C | |
--- 123,129 ---- | |
config MMC_SDHCI_S3C | |
tristate "SDHCI support on Samsung S3C SoC" | |
! depends on MMC_SDHCI && (PLAT_S3C24XX || PLAT_S3C64XX || PLAT_S5P) | |
help | |
This selects the Secure Digital Host Controller Interface (SDHCI) | |
often referrered to as the HSMMC block in some of the Samsung S3C | |
*************** | |
*** 150,156 **** | |
config MMC_SDHCI_S3C_DMA | |
bool "DMA support on S3C SDHCI" | |
! depends on MMC_SDHCI_S3C && EXPERIMENTAL | |
help | |
Enable DMA support on the Samsung S3C SDHCI glue. The DMA | |
has proved to be problematic if the controller encounters | |
--- 150,156 ---- | |
config MMC_SDHCI_S3C_DMA | |
bool "DMA support on S3C SDHCI" | |
! depends on MMC_SDHCI_S3C | |
help | |
Enable DMA support on the Samsung S3C SDHCI glue. The DMA | |
has proved to be problematic if the controller encounters | |
diff -crB 2/drivers/mmc/host/sdhci.c 1/drivers/mmc/host/sdhci.c | |
*** 2/drivers/mmc/host/sdhci.c 2012-09-24 11:44:01.478824708 +0530 | |
--- 1/drivers/mmc/host/sdhci.c 2011-05-18 12:34:49.000000000 +0530 | |
*************** | |
*** 23,28 **** | |
--- 23,33 ---- | |
#include <linux/leds.h> | |
#include <linux/mmc/host.h> | |
+ #include <linux/mmc/card.h> | |
+ | |
+ #if defined(CONFIG_MMC_SDHCI_S3C) || defined(CONFIG_MMC_SDHCI_MODULE) | |
+ #include <plat/regs-sdhci.h> | |
+ #endif | |
#include "sdhci.h" | |
*************** | |
*** 93,98 **** | |
--- 98,121 ---- | |
* * | |
\*****************************************************************************/ | |
+ static void sdhci_enable_clock_card(struct sdhci_host *host) | |
+ { | |
+ u16 clk; | |
+ | |
+ clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL); | |
+ clk |= SDHCI_CLOCK_CARD_EN; | |
+ writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL); | |
+ } | |
+ | |
+ static void sdhci_disable_clock_card(struct sdhci_host *host) | |
+ { | |
+ u16 clk; | |
+ | |
+ clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL); | |
+ clk &= ~SDHCI_CLOCK_CARD_EN; | |
+ writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL); | |
+ } | |
+ | |
static void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set) | |
{ | |
u32 ier; | |
*************** | |
*** 878,886 **** | |
--- 901,914 ---- | |
int flags; | |
u32 mask; | |
unsigned long timeout; | |
+ #if defined(CONFIG_MMC_SDHCI_S3C) || defined(CONFIG_MMC_SDHCI_MODULE) | |
+ int i; | |
+ #endif | |
WARN_ON(host->cmd); | |
+ del_timer(&host->busy_check_timer); | |
+ | |
/* Wait max 10 ms */ | |
timeout = 10; | |
*************** | |
*** 910,917 **** | |
--- 938,949 ---- | |
host->cmd = cmd; | |
+ sdhci_enable_clock_card(host); | |
sdhci_prepare_data(host, cmd->data); | |
+ if(cmd->flags & MMC_RSP_BUSY) | |
+ sdhci_writeb(host, 0xE, SDHCI_TIMEOUT_CONTROL); | |
+ | |
sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT); | |
sdhci_set_transfer_mode(host, cmd->data); | |
*************** | |
*** 940,945 **** | |
--- 972,988 ---- | |
if (cmd->data) | |
flags |= SDHCI_CMD_DATA; | |
+ #if defined(CONFIG_MMC_SDHCI_S3C) || defined(CONFIG_MMC_SDHCI_MODULE) | |
+ mask = readl(host->ioaddr + SDHCI_INT_STATUS); | |
+ writel(mask & SDHCI_INT_DATA_MASK & SDHCI_INT_CMD_MASK, host->ioaddr + SDHCI_INT_STATUS); | |
+ | |
+ for(i=0; i<0x1000000; i++) { | |
+ mask = readl(host->ioaddr + S3C64XX_SDHCI_CONTROL4); | |
+ if(!(mask & S3C64XX_SDHCI_CONTROL4_BUSY)) | |
+ break; | |
+ } | |
+ #endif | |
+ | |
sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND); | |
} | |
*************** | |
*** 1112,1118 **** | |
host->mrq = mrq; | |
/* If polling, assume that the card is always present. */ | |
! if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) | |
present = true; | |
else | |
present = sdhci_readl(host, SDHCI_PRESENT_STATE) & | |
--- 1155,1162 ---- | |
host->mrq = mrq; | |
/* If polling, assume that the card is always present. */ | |
! if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) || | |
! (host->quirks & SDHCI_QUIRK_BROKEN_CARD_PRESENT_BIT)) | |
present = true; | |
else | |
present = sdhci_readl(host, SDHCI_PRESENT_STATE) & | |
*************** | |
*** 1136,1141 **** | |
--- 1180,1190 ---- | |
host = mmc_priv(mmc); | |
+ #ifdef CONFIG_MACH_P1 | |
+ if (host->ops->translate_vdd) | |
+ host->ops->translate_vdd(host, ios->vdd); | |
+ #endif | |
+ | |
spin_lock_irqsave(&host->lock, flags); | |
if (host->flags & SDHCI_DEVICE_DEAD) | |
*************** | |
*** 1150,1155 **** | |
--- 1199,1207 ---- | |
sdhci_reinit(host); | |
} | |
+ if (host->ops->set_ios) | |
+ host->ops->set_ios(host, ios); | |
+ | |
sdhci_set_clock(host, ios->clock); | |
if (ios->power_mode == MMC_POWER_OFF) | |
*************** | |
*** 1164,1170 **** | |
else | |
ctrl &= ~SDHCI_CTRL_4BITBUS; | |
! if (ios->timing == MMC_TIMING_SD_HS) | |
ctrl |= SDHCI_CTRL_HISPD; | |
else | |
ctrl &= ~SDHCI_CTRL_HISPD; | |
--- 1216,1223 ---- | |
else | |
ctrl &= ~SDHCI_CTRL_4BITBUS; | |
! if (!(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) && | |
! (ios->timing == MMC_TIMING_SD_HS)) | |
ctrl |= SDHCI_CTRL_HISPD; | |
else | |
ctrl &= ~SDHCI_CTRL_HISPD; | |
*************** | |
*** 1206,1211 **** | |
--- 1259,1281 ---- | |
return !(present & SDHCI_WRITE_PROTECT); | |
} | |
+ static int sdhci_get_cd(struct mmc_host *mmc) | |
+ { | |
+ struct sdhci_host *host; | |
+ unsigned long flags; | |
+ int present; | |
+ | |
+ host = mmc_priv(mmc); | |
+ | |
+ spin_lock_irqsave(&host->lock, flags); | |
+ | |
+ present = host->ops->get_cd(host); | |
+ | |
+ spin_unlock_irqrestore(&host->lock, flags); | |
+ | |
+ return present; | |
+ } | |
+ | |
static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable) | |
{ | |
struct sdhci_host *host; | |
*************** | |
*** 1228,1238 **** | |
spin_unlock_irqrestore(&host->lock, flags); | |
} | |
! static const struct mmc_host_ops sdhci_ops = { | |
.request = sdhci_request, | |
.set_ios = sdhci_set_ios, | |
.get_ro = sdhci_get_ro, | |
.enable_sdio_irq = sdhci_enable_sdio_irq, | |
}; | |
/*****************************************************************************\ | |
--- 1298,1330 ---- | |
spin_unlock_irqrestore(&host->lock, flags); | |
} | |
! void sdhci_adjust_cfg(struct mmc_host *mmc, int rw) | |
! { | |
! struct sdhci_host *host; | |
! unsigned long flags; | |
! struct mmc_ios *ios = &mmc->ios; | |
! unsigned int clock; | |
! | |
! host = mmc_priv(mmc); | |
! | |
! spin_lock_irqsave(&host->lock, flags); | |
! | |
! if(host->ops->adjust_cfg) | |
! host->ops->adjust_cfg(host, rw); | |
! | |
! sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); | |
! | |
! mmiowb(); | |
! spin_unlock_irqrestore(&host->lock, flags); | |
! } | |
! | |
! static struct mmc_host_ops sdhci_ops = { | |
.request = sdhci_request, | |
.set_ios = sdhci_set_ios, | |
.get_ro = sdhci_get_ro, | |
+ .get_cd = sdhci_get_cd, | |
.enable_sdio_irq = sdhci_enable_sdio_irq, | |
+ .adjust_cfg = sdhci_adjust_cfg, | |
}; | |
/*****************************************************************************\ | |
*************** | |
*** 1278,1289 **** | |
--- 1370,1387 ---- | |
host = (struct sdhci_host*)param; | |
+ if(host == NULL) | |
+ return; | |
+ | |
spin_lock_irqsave(&host->lock, flags); | |
del_timer(&host->timer); | |
mrq = host->mrq; | |
+ if(mrq == NULL || mrq->cmd == NULL) | |
+ goto out; | |
+ | |
/* | |
* The controller needs a reset of internal state machines | |
* upon error conditions. | |
*************** | |
*** 1309,1314 **** | |
--- 1407,1417 ---- | |
sdhci_reset(host, SDHCI_RESET_CMD); | |
sdhci_reset(host, SDHCI_RESET_DATA); | |
} | |
+ out: | |
+ if(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_DATA_INHIBIT) | |
+ mod_timer(&host->busy_check_timer, jiffies + msecs_to_jiffies(10)); | |
+ else | |
+ sdhci_disable_clock_card(host); | |
host->mrq = NULL; | |
host->cmd = NULL; | |
*************** | |
*** 1355,1360 **** | |
--- 1458,1480 ---- | |
spin_unlock_irqrestore(&host->lock, flags); | |
} | |
+ static void sdhci_busy_check_timer(unsigned long data) | |
+ { | |
+ struct sdhci_host *host; | |
+ unsigned long flags; | |
+ | |
+ host = (struct sdhci_host*)data; | |
+ | |
+ spin_lock_irqsave(&host->lock, flags); | |
+ | |
+ if(readl(host->ioaddr + SDHCI_PRESENT_STATE) & (SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT)) | |
+ mod_timer(&host->busy_check_timer, jiffies + msecs_to_jiffies(10)); | |
+ else | |
+ sdhci_disable_clock_card(host); | |
+ | |
+ spin_unlock_irqrestore(&host->lock, flags); | |
+ } | |
+ | |
/*****************************************************************************\ | |
* * | |
* Interrupt handling * | |
*************** | |
*** 1381,1386 **** | |
--- 1501,1507 ---- | |
if (host->cmd->error) { | |
tasklet_schedule(&host->finish_tasklet); | |
+ host->cmd = NULL; | |
return; | |
} | |
*************** | |
*** 1593,1631 **** | |
int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state) | |
{ | |
! int ret; | |
sdhci_disable_card_detection(host); | |
! ret = mmc_suspend_host(host->mmc); | |
! if (ret) | |
! return ret; | |
! free_irq(host->irq, host); | |
! return 0; | |
} | |
EXPORT_SYMBOL_GPL(sdhci_suspend_host); | |
int sdhci_resume_host(struct sdhci_host *host) | |
{ | |
! int ret; | |
if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { | |
if (host->ops->enable_dma) | |
host->ops->enable_dma(host); | |
} | |
! ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, | |
! mmc_hostname(host->mmc), host); | |
! if (ret) | |
! return ret; | |
sdhci_init(host, (host->mmc->pm_flags & MMC_PM_KEEP_POWER)); | |
mmiowb(); | |
! ret = mmc_resume_host(host->mmc); | |
sdhci_enable_card_detection(host); | |
return ret; | |
--- 1714,1758 ---- | |
int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state) | |
{ | |
! int ret = 0; | |
! struct mmc_host *mmc = host->mmc; | |
sdhci_disable_card_detection(host); | |
! if (mmc->card && (mmc->card->type != MMC_TYPE_SDIO)) | |
! ret = mmc_suspend_host(host->mmc); | |
! sdhci_mask_irqs(host, SDHCI_INT_ALL_MASK); | |
! del_timer(&host->busy_check_timer); | |
! | |
! if (host->irq) | |
! disable_irq(host->irq); | |
! | |
! return ret; | |
} | |
EXPORT_SYMBOL_GPL(sdhci_suspend_host); | |
int sdhci_resume_host(struct sdhci_host *host) | |
{ | |
! int ret = 0; | |
! struct mmc_host *mmc = host->mmc; | |
if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { | |
if (host->ops->enable_dma) | |
host->ops->enable_dma(host); | |
} | |
! if (host->irq) | |
! enable_irq(host->irq); | |
sdhci_init(host, (host->mmc->pm_flags & MMC_PM_KEEP_POWER)); | |
mmiowb(); | |
! if (mmc->card && (mmc->card->type != MMC_TYPE_SDIO)) | |
! ret = mmc_resume_host(host->mmc); | |
! | |
sdhci_enable_card_detection(host); | |
return ret; | |
*************** | |
*** 1784,1797 **** | |
/* | |
* Set host parameters. | |
*/ | |
mmc->ops = &sdhci_ops; | |
if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK && | |
host->ops->set_clock && host->ops->get_min_clock) | |
mmc->f_min = host->ops->get_min_clock(host); | |
else | |
! mmc->f_min = host->max_clk / 256; | |
mmc->f_max = host->max_clk; | |
! mmc->caps = MMC_CAP_SDIO_IRQ; | |
if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) | |
mmc->caps |= MMC_CAP_4_BIT_DATA; | |
--- 1911,1927 ---- | |
/* | |
* Set host parameters. | |
*/ | |
+ if(host->ops->get_ro) | |
+ sdhci_ops.get_ro = host->ops->get_ro; | |
+ | |
mmc->ops = &sdhci_ops; | |
if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK && | |
host->ops->set_clock && host->ops->get_min_clock) | |
mmc->f_min = host->ops->get_min_clock(host); | |
else | |
! mmc->f_min = 400000; | |
mmc->f_max = host->max_clk; | |
! mmc->caps |= MMC_CAP_SDIO_IRQ; | |
if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) | |
mmc->caps |= MMC_CAP_4_BIT_DATA; | |
*************** | |
*** 1878,1883 **** | |
--- 2008,2014 ---- | |
sdhci_tasklet_finish, (unsigned long)host); | |
setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host); | |
+ setup_timer(&host->busy_check_timer, sdhci_busy_check_timer, (unsigned long)host); | |
ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, | |
mmc_hostname(mmc), host); | |
*************** | |
*** 1964,1969 **** | |
--- 2095,2101 ---- | |
free_irq(host->irq, host); | |
del_timer_sync(&host->timer); | |
+ del_timer_sync(&host->busy_check_timer); | |
tasklet_kill(&host->card_tasklet); | |
tasklet_kill(&host->finish_tasklet); | |
diff -crB 2/drivers/mmc/host/sdhci.h 1/drivers/mmc/host/sdhci.h | |
*** 2/drivers/mmc/host/sdhci.h 2012-09-24 11:44:01.478824708 +0530 | |
--- 1/drivers/mmc/host/sdhci.h 2011-05-18 12:34:49.000000000 +0530 | |
*************** | |
*** 240,245 **** | |
--- 240,249 ---- | |
#define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN (1<<25) | |
/* Controller cannot support End Attribute in NOP ADMA descriptor */ | |
#define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC (1<<26) | |
+ /* Controller does not use HISPD bit field in HI-SPEED SD cards */ | |
+ #define SDHCI_QUIRK_NO_HISPD_BIT (1<<27) | |
+ /* Controller has unreliable card present bit */ | |
+ #define SDHCI_QUIRK_BROKEN_CARD_PRESENT_BIT (1<<28) | |
int irq; /* Device IRQ */ | |
void __iomem * ioaddr; /* Mapped address */ | |
*************** | |
*** 262,267 **** | |
--- 266,272 ---- | |
#define SDHCI_USE_ADMA (1<<1) /* Host is ADMA capable */ | |
#define SDHCI_REQ_USE_DMA (1<<2) /* Use DMA for this req. */ | |
#define SDHCI_DEVICE_DEAD (1<<3) /* Device unresponsive */ | |
+ #define SDHCI_DEVICE_ALIVE (1<<4) /* used on ext card detect */ | |
unsigned int version; /* SDHCI spec. version */ | |
*************** | |
*** 291,296 **** | |
--- 296,302 ---- | |
struct tasklet_struct finish_tasklet; | |
struct timer_list timer; /* Timer for timeouts */ | |
+ struct timer_list busy_check_timer; | |
unsigned long private[0] ____cacheline_aligned; | |
}; | |
*************** | |
*** 312,317 **** | |
--- 318,331 ---- | |
unsigned int (*get_max_clock)(struct sdhci_host *host); | |
unsigned int (*get_min_clock)(struct sdhci_host *host); | |
unsigned int (*get_timeout_clock)(struct sdhci_host *host); | |
+ #ifdef CONFIG_MACH_P1 | |
+ void (*translate_vdd)(struct sdhci_host *host, unsigned int vdd); | |
+ #endif | |
+ void (*set_ios)(struct sdhci_host *host, | |
+ struct mmc_ios *ios); | |
+ int (*get_ro) (struct mmc_host *mmc); | |
+ int (*get_cd)(struct sdhci_host *host); | |
+ void (*adjust_cfg)(struct sdhci_host *host, int rw); | |
}; | |
#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS | |
diff -crB 2/drivers/mmc/host/sdhci-s3c.c 1/drivers/mmc/host/sdhci-s3c.c | |
*** 2/drivers/mmc/host/sdhci-s3c.c 2012-09-24 11:44:01.478824708 +0530 | |
--- 1/drivers/mmc/host/sdhci-s3c.c 2011-05-18 12:34:49.000000000 +0530 | |
*************** | |
*** 20,25 **** | |
--- 20,26 ---- | |
#include <linux/io.h> | |
#include <linux/mmc/host.h> | |
+ #include <linux/mmc/card.h> | |
#include <plat/sdhci.h> | |
#include <plat/regs-sdhci.h> | |
*************** | |
*** 76,82 **** | |
tmp &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK; | |
tmp |= ourhost->cur_clk << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT; | |
! writel(tmp, host->ioaddr + 0x80); | |
} | |
} | |
--- 77,83 ---- | |
tmp &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK; | |
tmp |= ourhost->cur_clk << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT; | |
! writel(tmp, host->ioaddr + S3C_SDHCI_CONTROL2); | |
} | |
} | |
*************** | |
*** 115,120 **** | |
--- 116,172 ---- | |
return sdhci_s3c_get_max_clk(host) / 1000000; | |
} | |
+ #ifdef CONFIG_MACH_P1 | |
+ static void sdhci_s3c_translate_vdd(struct sdhci_host *host, unsigned int vdd) | |
+ { | |
+ struct sdhci_s3c *ourhost = to_s3c(host); | |
+ struct s3c_sdhci_platdata *pdata = ourhost->pdata; | |
+ | |
+ if (pdata->translate_vdd) | |
+ pdata->translate_vdd(ourhost->pdev, vdd); | |
+ } | |
+ #endif | |
+ | |
+ static void sdhci_s3c_set_ios(struct sdhci_host *host, | |
+ struct mmc_ios *ios) | |
+ { | |
+ struct sdhci_s3c *ourhost = to_s3c(host); | |
+ struct s3c_sdhci_platdata *pdata = ourhost->pdata; | |
+ int width; | |
+ u8 tmp; | |
+ | |
+ sdhci_s3c_check_sclk(host); | |
+ | |
+ if (ios->power_mode != MMC_POWER_OFF) { | |
+ switch (ios->bus_width) { | |
+ case MMC_BUS_WIDTH_8: | |
+ width = 8; | |
+ tmp = readb(host->ioaddr + SDHCI_HOST_CONTROL); | |
+ writeb(tmp | SDHCI_S3C_CTRL_8BITBUS, | |
+ host->ioaddr + SDHCI_HOST_CONTROL); | |
+ break; | |
+ case MMC_BUS_WIDTH_4: | |
+ width = 4; | |
+ break; | |
+ case MMC_BUS_WIDTH_1: | |
+ width = 1; | |
+ break; | |
+ default: | |
+ BUG(); | |
+ } | |
+ | |
+ if (pdata->cfg_gpio) | |
+ pdata->cfg_gpio(ourhost->pdev, width); | |
+ } | |
+ | |
+ if (pdata->cfg_card) { | |
+ pdata->cfg_card(ourhost->pdev, host->ioaddr, | |
+ ios, host->mmc->card); | |
+ pdata->rx_cfg = 0; | |
+ pdata->tx_cfg = 0; | |
+ } | |
+ } | |
+ | |
/** | |
* sdhci_s3c_consider_clock - consider one the bus clocks for current setting | |
* @ourhost: Our SDHCI instance. | |
*************** | |
*** 195,220 **** | |
ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT; | |
writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2); | |
} | |
! /* reconfigure the hardware for new clock rate */ | |
! { | |
! struct mmc_ios ios; | |
! ios.clock = clock; | |
! if (ourhost->pdata->cfg_card) | |
! (ourhost->pdata->cfg_card)(ourhost->pdev, host->ioaddr, | |
! &ios, NULL); | |
! } | |
} | |
static struct sdhci_ops sdhci_s3c_ops = { | |
.get_max_clock = sdhci_s3c_get_max_clk, | |
.get_timeout_clock = sdhci_s3c_get_timeout_clk, | |
.set_clock = sdhci_s3c_set_clock, | |
}; | |
static int __devinit sdhci_s3c_probe(struct platform_device *pdev) | |
{ | |
struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data; | |
--- 247,340 ---- | |
ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT; | |
writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2); | |
} | |
+ } | |
! static int sdhci_s3c_get_ro(struct mmc_host *mmc) | |
! { | |
! struct sdhci_host *host; | |
! struct sdhci_s3c *sc; | |
! host = mmc_priv(mmc); | |
! sc = sdhci_priv(host); | |
! if(sc->pdata->get_ro) | |
! return sc->pdata->get_ro(mmc); | |
! return 0; | |
! } | |
! | |
! static int sdhci_s3c_get_cd(struct sdhci_host *host) | |
! { | |
! unsigned int detect = -ENOSYS; | |
! struct sdhci_s3c* sc = sdhci_priv(host); | |
! | |
! if(sc->pdata->detect_ext_cd) | |
! detect = sc->pdata->detect_ext_cd(); | |
! | |
! return detect; | |
! } | |
! | |
! static void sdhci_s3c_adjust_cfg(struct sdhci_host *host, int rw) | |
! { | |
! struct sdhci_s3c *ourhost = to_s3c(host); | |
! struct s3c_sdhci_platdata *pdata = ourhost->pdata; | |
! | |
! if(pdata->adjust_cfg_card) | |
! pdata->adjust_cfg_card(pdata, host->ioaddr, rw); | |
} | |
static struct sdhci_ops sdhci_s3c_ops = { | |
.get_max_clock = sdhci_s3c_get_max_clk, | |
.get_timeout_clock = sdhci_s3c_get_timeout_clk, | |
.set_clock = sdhci_s3c_set_clock, | |
+ #ifdef CONFIG_MACH_P1 | |
+ .translate_vdd = sdhci_s3c_translate_vdd, | |
+ #endif | |
+ .set_ios = sdhci_s3c_set_ios, | |
+ .get_cd = sdhci_s3c_get_cd, | |
+ .adjust_cfg = sdhci_s3c_adjust_cfg, | |
}; | |
+ /* | |
+ * call this when you need sd stack to recognize insertion or removal of card | |
+ * that can't be told by SDHCI regs | |
+ */ | |
+ void sdhci_s3c_force_presence_change(struct platform_device *pdev) | |
+ { | |
+ struct sdhci_host *host = platform_get_drvdata(pdev); | |
+ | |
+ printk(KERN_DEBUG "%s : Enter\n",__FUNCTION__); | |
+ mmc_detect_change(host->mmc, msecs_to_jiffies(60)); | |
+ } | |
+ EXPORT_SYMBOL_GPL(sdhci_s3c_force_presence_change); | |
+ | |
+ irqreturn_t sdhci_irq_cd(int irq, void *dev_id) | |
+ { | |
+ struct sdhci_s3c* sc = dev_id; | |
+ uint detect; | |
+ | |
+ printk(KERN_DEBUG "sdhci: card interrupt.\n"); | |
+ | |
+ detect = sc->pdata->detect_ext_cd(); | |
+ printk(KERN_DEBUG "sdhci: card %s.\n", detect ? "inserted" : "removed"); | |
+ | |
+ if (sc->host->mmc) | |
+ sc->host->mmc->rescan_disable = 0; | |
+ | |
+ if (detect == ((sc->host->flags >> 4) & 0x01)) { | |
+ printk(KERN_WARNING "sdhci: card status isn't changed\n"); | |
+ } else { | |
+ if (detect) | |
+ sc->host->flags |= SDHCI_DEVICE_ALIVE; | |
+ else | |
+ sc->host->flags &= ~SDHCI_DEVICE_ALIVE; | |
+ | |
+ tasklet_schedule(&sc->host->card_tasklet); | |
+ } | |
+ | |
+ return IRQ_HANDLED; | |
+ } | |
+ | |
static int __devinit sdhci_s3c_probe(struct platform_device *pdev) | |
{ | |
struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data; | |
*************** | |
*** 311,316 **** | |
--- 431,439 ---- | |
if (pdata->cfg_gpio) | |
pdata->cfg_gpio(pdev, pdata->max_width); | |
+ if (pdata->get_ro) | |
+ sdhci_s3c_ops.get_ro = sdhci_s3c_get_ro; | |
+ | |
host->hw_name = "samsung-hsmmc"; | |
host->ops = &sdhci_s3c_ops; | |
host->quirks = 0; | |
*************** | |
*** 318,323 **** | |
--- 441,448 ---- | |
/* Setup quirks for the controller */ | |
host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC; | |
+ host->quirks |= SDHCI_QUIRK_BROKEN_CARD_PRESENT_BIT; | |
+ host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; | |
#ifndef CONFIG_MMC_SDHCI_S3C_DMA | |
*************** | |
*** 325,330 **** | |
--- 450,458 ---- | |
* support as well. */ | |
host->quirks |= SDHCI_QUIRK_BROKEN_DMA; | |
+ /* PIO currently has problems with multi-block IO */ | |
+ host->quirks |= SDHCI_QUIRK_NO_MULTIBLOCK; | |
+ | |
#endif /* CONFIG_MMC_SDHCI_S3C_DMA */ | |
/* It seems we do not get an DATA transfer complete on non-busy | |
*************** | |
*** 335,346 **** | |
--- 463,506 ---- | |
host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR | | |
SDHCI_QUIRK_32BIT_DMA_SIZE); | |
+ host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT; | |
+ | |
+ if (pdata->host_caps) | |
+ host->mmc->caps = pdata->host_caps; | |
+ else | |
+ host->mmc->caps = 0; | |
+ | |
+ /* Set pm_flags for built_in device */ | |
+ host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_IGNORE_PM_NOTIFY; | |
+ if (pdata->built_in) | |
+ host->mmc->pm_flags = MMC_PM_KEEP_POWER | MMC_PM_IGNORE_PM_NOTIFY; | |
+ | |
+ /* to add external irq as a card detect signal */ | |
+ if (pdata->cfg_ext_cd) { | |
+ pdata->cfg_ext_cd(); | |
+ | |
+ if (pdata->detect_ext_cd()) | |
+ host->flags |= SDHCI_DEVICE_ALIVE; | |
+ } | |
+ | |
+ /* to configure gpio pin as a card write protection signal */ | |
+ if (pdata->cfg_wp) | |
+ pdata->cfg_wp(); | |
+ | |
ret = sdhci_add_host(host); | |
if (ret) { | |
dev_err(dev, "sdhci_add_host() failed\n"); | |
goto err_add_host; | |
} | |
+ /* register external irq here (after all init is done) */ | |
+ if (pdata->cfg_ext_cd) { | |
+ ret = request_irq(pdata->ext_cd, sdhci_irq_cd, | |
+ IRQF_SHARED, mmc_hostname(host->mmc), sc); | |
+ if(ret) | |
+ goto err_add_host; | |
+ } | |
+ | |
return 0; | |
err_add_host: | |
*************** | |
*** 349,356 **** | |
err_req_regs: | |
for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { | |
! clk_disable(sc->clk_bus[ptr]); | |
! clk_put(sc->clk_bus[ptr]); | |
} | |
err_no_busclks: | |
--- 509,518 ---- | |
err_req_regs: | |
for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { | |
! if (sc->clk_bus[ptr]) { | |
! clk_disable(sc->clk_bus[ptr]); | |
! clk_put(sc->clk_bus[ptr]); | |
! } | |
} | |
err_no_busclks: | |
*************** | |
*** 367,379 **** | |
{ | |
struct sdhci_host *host = platform_get_drvdata(pdev); | |
struct sdhci_s3c *sc = sdhci_priv(host); | |
! int ptr; | |
! sdhci_remove_host(host, 1); | |
! for (ptr = 0; ptr < 3; ptr++) { | |
! clk_disable(sc->clk_bus[ptr]); | |
! clk_put(sc->clk_bus[ptr]); | |
} | |
clk_disable(sc->clk_io); | |
clk_put(sc->clk_io); | |
--- 529,551 ---- | |
{ | |
struct sdhci_host *host = platform_get_drvdata(pdev); | |
struct sdhci_s3c *sc = sdhci_priv(host); | |
! int ptr, dead = 0; | |
! u32 scratch; | |
! | |
! scratch = readl(host->ioaddr + SDHCI_INT_STATUS); | |
! if (scratch == (u32)-1) | |
! dead = 1; | |
! | |
! if(sc->pdata && sc->pdata->cfg_ext_cd) | |
! free_irq(sc->pdata->ext_cd, sc); | |
! sdhci_remove_host(host, dead); | |
! for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { | |
! if (sc->clk_bus[ptr]) { | |
! clk_disable(sc->clk_bus[ptr]); | |
! clk_put(sc->clk_bus[ptr]); | |
! } | |
} | |
clk_disable(sc->clk_io); | |
clk_put(sc->clk_io); | |
*************** | |
*** 393,408 **** | |
--- 565,600 ---- | |
static int sdhci_s3c_suspend(struct platform_device *dev, pm_message_t pm) | |
{ | |
struct sdhci_host *host = platform_get_drvdata(dev); | |
+ struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; | |
+ | |
+ struct mmc_host *mmc = host->mmc; | |
+ | |
+ if (mmc->card && (mmc->card->type == MMC_TYPE_SDIO)) | |
+ mmc->pm_flags |= MMC_PM_KEEP_POWER; | |
sdhci_suspend_host(host, pm); | |
+ | |
+ if (pdata && pdata->cfg_ext_cd) { | |
+ free_irq(pdata->ext_cd, sdhci_priv(host)); | |
+ } | |
return 0; | |
} | |
static int sdhci_s3c_resume(struct platform_device *dev) | |
{ | |
struct sdhci_host *host = platform_get_drvdata(dev); | |
+ struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; | |
+ int ret; | |
sdhci_resume_host(host); | |
+ | |
+ if (pdata && pdata->cfg_ext_cd) { | |
+ host->mmc->rescan_disable = 0; | |
+ ret = request_irq(pdata->ext_cd, sdhci_irq_cd, IRQF_SHARED, mmc_hostname(host->mmc), sdhci_priv(host)); | |
+ if (ret) | |
+ return ret; | |
+ } | |
+ | |
return 0; | |
} | |
diff -crB 2/drivers/mtd/nand/Kconfig 1/drivers/mtd/nand/Kconfig | |
*** 2/drivers/mtd/nand/Kconfig 2012-09-24 11:44:01.338827325 +0530 | |
--- 1/drivers/mtd/nand/Kconfig 2011-05-18 12:34:50.000000000 +0530 | |
*************** | |
*** 1,3 **** | |
--- 1,10 ---- | |
+ config MTD_NAND_IDS | |
+ tristate "Include chip ids for known NAND devices." | |
+ depends on MTD | |
+ help | |
+ Useful for NAND drivers that do not use the NAND subsystem but | |
+ still like to take advantage of the known chip information. | |
+ | |
config MTD_NAND_ECC | |
tristate | |
*************** | |
*** 122,130 **** | |
or in DMA interrupt mode. | |
Say y for DMA mode or MPU mode will be used | |
- config MTD_NAND_IDS | |
- tristate | |
- | |
config MTD_NAND_RICOH | |
tristate "Ricoh xD card reader" | |
default n | |
--- 129,134 ---- | |
diff -crB 2/drivers/mtd/nand/nand_base.c 1/drivers/mtd/nand/nand_base.c | |
*** 2/drivers/mtd/nand/nand_base.c 2012-09-24 11:44:01.334827400 +0530 | |
--- 1/drivers/mtd/nand/nand_base.c 2011-05-18 12:34:50.000000000 +0530 | |
*************** | |
*** 3021,3026 **** | |
--- 3021,3064 ---- | |
return 0; | |
} | |
+ static void nand_panic_wait(struct mtd_info *mtd) | |
+ { | |
+ struct nand_chip *chip = mtd->priv; | |
+ int i; | |
+ | |
+ if (chip->state != FL_READY) | |
+ for (i = 0; i < 40; i++) { | |
+ if (chip->dev_ready(mtd)) | |
+ break; | |
+ mdelay(10); | |
+ } | |
+ chip->state = FL_READY; | |
+ } | |
+ | |
+ static int nand_panic_write(struct mtd_info *mtd, loff_t to, size_t len, | |
+ size_t *retlen, const u_char *buf) | |
+ { | |
+ struct nand_chip *chip = mtd->priv; | |
+ int ret; | |
+ | |
+ /* Do not allow reads past end of device */ | |
+ if ((to + len) > mtd->size) | |
+ return -EINVAL; | |
+ if (!len) | |
+ return 0; | |
+ | |
+ nand_panic_wait(mtd); | |
+ | |
+ chip->ops.len = len; | |
+ chip->ops.datbuf = (uint8_t *)buf; | |
+ chip->ops.oobbuf = NULL; | |
+ | |
+ ret = nand_do_write_ops(mtd, to, &chip->ops); | |
+ | |
+ *retlen = chip->ops.retlen; | |
+ return ret; | |
+ } | |
+ | |
/** | |
* nand_scan_tail - [NAND Interface] Scan for the NAND device | |
*************** | |
*** 3230,3235 **** | |
--- 3268,3274 ---- | |
mtd->panic_write = panic_nand_write; | |
mtd->read_oob = nand_read_oob; | |
mtd->write_oob = nand_write_oob; | |
+ mtd->panic_write = nand_panic_write; | |
mtd->sync = nand_sync; | |
mtd->lock = NULL; | |
mtd->unlock = NULL; | |
diff -crB 2/drivers/mtd/onenand/onenand_base.c 1/drivers/mtd/onenand/onenand_base.c | |
*** 2/drivers/mtd/onenand/onenand_base.c 2012-09-24 11:44:01.338827325 +0530 | |
--- 1/drivers/mtd/onenand/onenand_base.c 2011-05-18 12:34:50.000000000 +0530 | |
*************** | |
*** 32,37 **** | |
--- 32,38 ---- | |
#include <linux/mtd/mtd.h> | |
#include <linux/mtd/onenand.h> | |
#include <linux/mtd/partitions.h> | |
+ #include <linux/clk.h> | |
#include <asm/io.h> | |
*************** | |
*** 958,964 **** | |
schedule(); | |
remove_wait_queue(&this->wq, &wait); | |
} | |
! | |
return 0; | |
} | |
--- 959,966 ---- | |
schedule(); | |
remove_wait_queue(&this->wq, &wait); | |
} | |
! if (this->clk && new_state != FL_PM_SUSPENDED) | |
! clk_enable(this->clk); | |
return 0; | |
} | |
*************** | |
*** 972,977 **** | |
--- 974,982 ---- | |
{ | |
struct onenand_chip *this = mtd->priv; | |
+ if (this->clk && this->state != FL_PM_SUSPENDED) | |
+ clk_disable(this->clk); | |
+ | |
/* Release the chip */ | |
spin_lock(&this->chip_lock); | |
this->state = FL_READY; | |
*************** | |
*** 3730,3746 **** | |
} | |
/** | |
! * onenand_probe - [OneNAND Interface] Probe the OneNAND device | |
* @param mtd MTD device structure | |
* | |
* OneNAND detection method: | |
* Compare the values from command with ones from register | |
*/ | |
! static int onenand_probe(struct mtd_info *mtd) | |
{ | |
struct onenand_chip *this = mtd->priv; | |
! int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id; | |
! int density; | |
int syscfg; | |
/* Save system configuration 1 */ | |
--- 3735,3750 ---- | |
} | |
/** | |
! * onenand_chip_probe - [OneNAND Interface] The generic chip probe | |
* @param mtd MTD device structure | |
* | |
* OneNAND detection method: | |
* Compare the values from command with ones from register | |
*/ | |
! static int onenand_chip_probe(struct mtd_info *mtd) | |
{ | |
struct onenand_chip *this = mtd->priv; | |
! int bram_maf_id, bram_dev_id, maf_id, dev_id; | |
int syscfg; | |
/* Save system configuration 1 */ | |
*************** | |
*** 3763,3774 **** | |
/* Restore system configuration 1 */ | |
this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); | |
- /* Workaround */ | |
- if (syscfg & ONENAND_SYS_CFG1_SYNC_WRITE) { | |
- bram_maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); | |
- bram_dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); | |
- } | |
- | |
/* Check manufacturer ID */ | |
if (onenand_check_maf(bram_maf_id)) | |
return -ENXIO; | |
--- 3767,3772 ---- | |
*************** | |
*** 3776,3788 **** | |
/* Read manufacturer and device IDs from Register */ | |
maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); | |
dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); | |
- ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); | |
- this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY); | |
/* Check OneNAND device */ | |
if (maf_id != bram_maf_id || dev_id != bram_dev_id) | |
return -ENXIO; | |
/* Flash device information */ | |
onenand_print_device_info(dev_id, ver_id); | |
this->device_id = dev_id; | |
--- 3774,3808 ---- | |
/* Read manufacturer and device IDs from Register */ | |
maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); | |
dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); | |
/* Check OneNAND device */ | |
if (maf_id != bram_maf_id || dev_id != bram_dev_id) | |
return -ENXIO; | |
+ return 0; | |
+ } | |
+ | |
+ /** | |
+ * onenand_probe - [OneNAND Interface] Probe the OneNAND device | |
+ * @param mtd MTD device structure | |
+ */ | |
+ static int onenand_probe(struct mtd_info *mtd) | |
+ { | |
+ struct onenand_chip *this = mtd->priv; | |
+ int maf_id, dev_id, ver_id; | |
+ int density; | |
+ int ret; | |
+ | |
+ ret = this->chip_probe(mtd); | |
+ if (ret) | |
+ return ret; | |
+ | |
+ /* Read manufacturer and device IDs from Register */ | |
+ maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); | |
+ dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); | |
+ ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); | |
+ this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY); | |
+ | |
/* Flash device information */ | |
onenand_print_device_info(dev_id, ver_id); | |
this->device_id = dev_id; | |
*************** | |
*** 3909,3914 **** | |
--- 3929,3937 ---- | |
if (!this->unlock_all) | |
this->unlock_all = onenand_unlock_all; | |
+ if (!this->chip_probe) | |
+ this->chip_probe = onenand_chip_probe; | |
+ | |
if (!this->read_bufferram) | |
this->read_bufferram = onenand_read_bufferram; | |
if (!this->write_bufferram) | |
diff -crB 2/drivers/mtd/onenand/samsung.c 1/drivers/mtd/onenand/samsung.c | |
*** 2/drivers/mtd/onenand/samsung.c 2012-09-24 11:44:01.338827325 +0530 | |
--- 1/drivers/mtd/onenand/samsung.c 2011-05-18 12:34:50.000000000 +0530 | |
*************** | |
*** 22,33 **** | |
--- 22,39 ---- | |
#include <linux/mtd/onenand.h> | |
#include <linux/mtd/partitions.h> | |
#include <linux/dma-mapping.h> | |
+ #include <linux/clk.h> | |
#include <asm/mach/flash.h> | |
#include <plat/regs-onenand.h> | |
#include <linux/io.h> | |
+ #ifdef CONFIG_MTD_PARTITIONS | |
+ #include <asm/setup.h> | |
+ #include <linux/string.h> | |
+ #endif | |
+ | |
enum soc_type { | |
TYPE_S3C6400, | |
TYPE_S3C6410, | |
*************** | |
*** 35,40 **** | |
--- 41,85 ---- | |
TYPE_S5PC110, | |
}; | |
+ struct mtd_partition s3c_partition_info[] = { | |
+ { | |
+ .name = "misc", | |
+ .offset = (768*SZ_1K), /* for bootloader */ | |
+ .size = (256*SZ_1K), | |
+ .mask_flags = MTD_CAP_NANDFLASH, | |
+ }, | |
+ { | |
+ .name = "recovery", | |
+ .offset = MTDPART_OFS_APPEND, | |
+ .size = (5*SZ_1M), | |
+ }, | |
+ { | |
+ .name = "kernel", | |
+ .offset = MTDPART_OFS_APPEND, | |
+ .size = (5*SZ_1M), | |
+ }, | |
+ { | |
+ .name = "ramdisk", | |
+ .offset = MTDPART_OFS_APPEND, | |
+ .size = (3*SZ_1M), | |
+ }, | |
+ { | |
+ .name = "system", | |
+ .offset = MTDPART_OFS_APPEND, | |
+ .size = (90*SZ_1M), | |
+ }, | |
+ { | |
+ .name = "cache", | |
+ .offset = MTDPART_OFS_APPEND, | |
+ .size = (80*SZ_1M), | |
+ }, | |
+ { | |
+ .name = "userdata", | |
+ .offset = MTDPART_OFS_APPEND, | |
+ .size = MTDPART_SIZ_FULL, | |
+ } | |
+ }; | |
+ | |
#define ONENAND_ERASE_STATUS 0x00 | |
#define ONENAND_MULTI_ERASE_SET 0x01 | |
#define ONENAND_ERASE_START 0x03 | |
*************** | |
*** 184,189 **** | |
--- 229,286 ---- | |
} | |
#endif | |
+ #ifdef CONFIG_MTD_PARTITIONS | |
+ struct slsi_ptbl_entry { | |
+ char name[16]; | |
+ __u32 offset; | |
+ __u32 size; | |
+ __u32 flags; | |
+ }; | |
+ | |
+ struct mtd_partition *partitions; | |
+ int num_partitions; | |
+ | |
+ #define MAX_PARTITIONS 12 | |
+ #define ATAG_SLSI_PARTITION 0x28247574 | |
+ struct mtd_partition slsi_nand_partitions[MAX_PARTITIONS]; | |
+ char slsi_nand_names[MAX_PARTITIONS * 16]; | |
+ | |
+ static int __init parse_tag_partition(const struct tag *tag) | |
+ { | |
+ struct mtd_partition *ptn = slsi_nand_partitions; | |
+ char *name = slsi_nand_names; | |
+ struct slsi_ptbl_entry *entry = (void *) &tag->u; | |
+ unsigned count, n; | |
+ | |
+ count = (tag->hdr.size - 2) / | |
+ (sizeof(struct slsi_ptbl_entry) / sizeof(__u32)); | |
+ | |
+ if (count > MAX_PARTITIONS) | |
+ count = MAX_PARTITIONS; | |
+ | |
+ for (n = 0; n < count; n++) { | |
+ memcpy(name, entry->name, 15); | |
+ name[15] = 0; | |
+ ptn->name = name; | |
+ ptn->offset = entry->offset; | |
+ ptn->size = entry->size; | |
+ | |
+ printk(KERN_INFO "Partition (from atag) %15s -- Offset:0x%08x Size:0x%08x\n", | |
+ entry->name, entry->offset, entry->size); | |
+ | |
+ name += 16; | |
+ entry++; | |
+ ptn++; | |
+ } | |
+ | |
+ num_partitions = count; | |
+ partitions = slsi_nand_partitions; | |
+ | |
+ return 0; | |
+ } | |
+ __tagtable(ATAG_SLSI_PARTITION, parse_tag_partition); | |
+ #endif | |
+ | |
static unsigned int s3c64xx_cmd_map(unsigned type, unsigned val) | |
{ | |
return (type << S3C64XX_CMD_MAP_SHIFT) | val; | |
*************** | |
*** 630,635 **** | |
--- 727,738 ---- | |
return 0; | |
} | |
+ static int s5pc110_chip_probe(struct mtd_info *mtd) | |
+ { | |
+ /* Now just return 0 */ | |
+ return 0; | |
+ } | |
+ | |
static int s3c_onenand_bbt_wait(struct mtd_info *mtd, int state) | |
{ | |
unsigned int flags = INT_ACT | LOAD_CMP; | |
*************** | |
*** 757,762 **** | |
--- 860,866 ---- | |
/* Use generic onenand functions */ | |
onenand->cmd_map = s5pc1xx_cmd_map; | |
this->read_bufferram = s5pc110_read_bufferram; | |
+ this->chip_probe = s5pc110_chip_probe; | |
return; | |
} else { | |
BUG(); | |
*************** | |
*** 781,787 **** | |
struct mtd_info *mtd; | |
struct resource *r; | |
int size, err; | |
- unsigned long onenand_ctrl_cfg = 0; | |
pdata = pdev->dev.platform_data; | |
/* No need to check pdata. the platform data is optional */ | |
--- 885,890 ---- | |
*************** | |
*** 829,834 **** | |
--- 932,948 ---- | |
err = -EFAULT; | |
goto ioremap_failed; | |
} | |
+ | |
+ this->clk = clk_get(&pdev->dev, "onenand"); | |
+ | |
+ if (IS_ERR(this->clk)) { | |
+ dev_err(&pdev->dev, "cannot get clock\n"); | |
+ err = PTR_ERR(this->clk); | |
+ goto clk_failed; | |
+ } | |
+ | |
+ clk_enable(this->clk); | |
+ | |
/* Set onenand_chip also */ | |
this->base = onenand->base; | |
*************** | |
*** 900,913 **** | |
} | |
onenand->phys_base = onenand->base_res->start; | |
- | |
- onenand_ctrl_cfg = readl(onenand->dma_addr + 0x100); | |
- if ((onenand_ctrl_cfg & ONENAND_SYS_CFG1_SYNC_WRITE) && | |
- onenand->dma_addr) | |
- writel(onenand_ctrl_cfg & ~ONENAND_SYS_CFG1_SYNC_WRITE, | |
- onenand->dma_addr + 0x100); | |
- else | |
- onenand_ctrl_cfg = 0; | |
} | |
if (onenand_scan(mtd, 1)) { | |
--- 1014,1019 ---- | |
*************** | |
*** 915,924 **** | |
goto scan_failed; | |
} | |
! if (onenand->type == TYPE_S5PC110) { | |
! if (onenand_ctrl_cfg && onenand->dma_addr) | |
! writel(onenand_ctrl_cfg, onenand->dma_addr + 0x100); | |
! } else { | |
/* S3C doesn't handle subpage write */ | |
mtd->subpage_sft = 0; | |
this->subpagesize = mtd->writesize; | |
--- 1021,1027 ---- | |
goto scan_failed; | |
} | |
! if (onenand->type != TYPE_S5PC110) { | |
/* S3C doesn't handle subpage write */ | |
mtd->subpage_sft = 0; | |
this->subpagesize = mtd->writesize; | |
*************** | |
*** 928,933 **** | |
--- 1031,1059 ---- | |
dev_info(&onenand->pdev->dev, "OneNAND Sync. Burst Read enabled\n"); | |
#ifdef CONFIG_MTD_PARTITIONS | |
+ #ifdef CONFIG_MTD_CMDLINE_PARTS | |
+ err = parse_mtd_partitions(mtd, part_probes, &onenand->parts, 0); | |
+ if (err > 0) | |
+ add_mtd_partitions(mtd, onenand->parts, err); | |
+ else if (err <= 0 && pdata && pdata->parts) | |
+ add_mtd_partitions(mtd, pdata->parts, pdata->nr_parts); | |
+ else | |
+ #endif | |
+ if (num_partitions <= 0) { | |
+ /* default partition table */ | |
+ num_partitions = ARRAY_SIZE(s3c_partition_info); /* pdata->nr_parts */ | |
+ partitions = s3c_partition_info; /* pdata->parts */ | |
+ } | |
+ | |
+ if (partitions && num_partitions > 0) | |
+ err = add_mtd_partitions(mtd, partitions, num_partitions); | |
+ else | |
+ #endif | |
+ err = add_mtd_device(mtd); | |
+ | |
+ | |
+ /* | |
+ #ifdef CONFIG_MTD_PARTITIONS | |
err = parse_mtd_partitions(mtd, part_probes, &onenand->parts, 0); | |
if (err > 0) | |
add_mtd_partitions(mtd, onenand->parts, err); | |
*************** | |
*** 936,944 **** | |
--- 1062,1072 ---- | |
else | |
#endif | |
err = add_mtd_device(mtd); | |
+ */ | |
platform_set_drvdata(pdev, mtd); | |
+ clk_disable(this->clk); | |
return 0; | |
scan_failed: | |
*************** | |
*** 961,966 **** | |
--- 1089,1097 ---- | |
dma_resource_failed: | |
ahb_resource_failed: | |
iounmap(onenand->base); | |
+ clk_disable(this->clk); | |
+ clk_put(this->clk); | |
+ clk_failed: | |
ioremap_failed: | |
if (onenand->base_res) | |
release_mem_region(onenand->base_res->start, | |
*************** | |
*** 975,980 **** | |
--- 1106,1112 ---- | |
static int __devexit s3c_onenand_remove(struct platform_device *pdev) | |
{ | |
struct mtd_info *mtd = platform_get_drvdata(pdev); | |
+ struct onenand_chip *this = mtd->priv; | |
onenand_release(mtd); | |
if (onenand->ahb_addr) | |
*************** | |
*** 995,1028 **** | |
platform_set_drvdata(pdev, NULL); | |
kfree(onenand->oob_buf); | |
kfree(onenand->page_buf); | |
kfree(onenand); | |
kfree(mtd); | |
return 0; | |
} | |
- static int s3c_pm_ops_suspend(struct device *dev) | |
- { | |
- struct platform_device *pdev = to_platform_device(dev); | |
- struct mtd_info *mtd = platform_get_drvdata(pdev); | |
- struct onenand_chip *this = mtd->priv; | |
- | |
- this->wait(mtd, FL_PM_SUSPENDED); | |
- return mtd->suspend(mtd); | |
- } | |
- | |
static int s3c_pm_ops_resume(struct device *dev) | |
{ | |
struct platform_device *pdev = to_platform_device(dev); | |
struct mtd_info *mtd = platform_get_drvdata(pdev); | |
struct onenand_chip *this = mtd->priv; | |
! mtd->resume(mtd); | |
this->unlock_all(mtd); | |
return 0; | |
} | |
static const struct dev_pm_ops s3c_pm_ops = { | |
- .suspend = s3c_pm_ops_suspend, | |
.resume = s3c_pm_ops_resume, | |
}; | |
--- 1127,1151 ---- | |
platform_set_drvdata(pdev, NULL); | |
kfree(onenand->oob_buf); | |
kfree(onenand->page_buf); | |
+ clk_put(this->clk); | |
kfree(onenand); | |
kfree(mtd); | |
return 0; | |
} | |
static int s3c_pm_ops_resume(struct device *dev) | |
{ | |
struct platform_device *pdev = to_platform_device(dev); | |
struct mtd_info *mtd = platform_get_drvdata(pdev); | |
struct onenand_chip *this = mtd->priv; | |
! clk_enable(this->clk); | |
this->unlock_all(mtd); | |
+ clk_disable(this->clk); | |
return 0; | |
} | |
static const struct dev_pm_ops s3c_pm_ops = { | |
.resume = s3c_pm_ops_resume, | |
}; | |
diff -crB 2/drivers/net/Kconfig 1/drivers/net/Kconfig | |
*** 2/drivers/net/Kconfig 2012-09-24 11:44:01.650821491 +0530 | |
--- 1/drivers/net/Kconfig 2011-05-18 12:34:50.000000000 +0530 | |
*************** | |
*** 3184,3189 **** | |
--- 3184,3206 ---- | |
used by ISPs and enterprises to tunnel PPP traffic over UDP | |
tunnels. L2TP is replacing PPTP for VPN uses. | |
+ config PPPOLAC | |
+ tristate "PPP on L2TP Access Concentrator" | |
+ depends on PPP && INET | |
+ help | |
+ L2TP (RFC 2661) is a tunneling protocol widely used in virtual private | |
+ networks. This driver handles L2TP data packets between a UDP socket | |
+ and a PPP channel, but only permits one session per socket. Thus it is | |
+ fairly simple and suited for clients. | |
+ | |
+ config PPPOPNS | |
+ tristate "PPP on PPTP Network Server" | |
+ depends on PPP && INET | |
+ help | |
+ PPTP (RFC 2637) is a tunneling protocol widely used in virtual private | |
+ networks. This driver handles PPTP data packets between a RAW socket | |
+ and a PPP channel. It is fairly simple and easy to use. | |
+ | |
config SLIP | |
tristate "SLIP (serial line) support" | |
---help--- | |
diff -crB 2/drivers/net/Makefile 1/drivers/net/Makefile | |
*** 2/drivers/net/Makefile 2012-09-24 11:44:01.654821416 +0530 | |
--- 1/drivers/net/Makefile 2011-05-18 12:34:50.000000000 +0530 | |
*************** | |
*** 162,167 **** | |
--- 162,169 ---- | |
obj-$(CONFIG_PPP_MPPE) += ppp_mppe.o | |
obj-$(CONFIG_PPPOE) += pppox.o pppoe.o | |
obj-$(CONFIG_PPPOL2TP) += pppox.o | |
+ obj-$(CONFIG_PPPOLAC) += pppox.o pppolac.o | |
+ obj-$(CONFIG_PPPOPNS) += pppox.o pppopns.o | |
obj-$(CONFIG_SLIP) += slip.o | |
obj-$(CONFIG_SLHC) += slhc.o | |
Only in 1/drivers/net: pppolac.c | |
Only in 1/drivers/net: pppopns.c | |
Only in 2/drivers/net/wan: .gitignore | |
Only in 1/drivers/net/wireless: bcm4329 | |
diff -crB 2/drivers/net/wireless/Kconfig 1/drivers/net/wireless/Kconfig | |
*** 2/drivers/net/wireless/Kconfig 2012-09-24 11:44:01.666821189 +0530 | |
--- 1/drivers/net/wireless/Kconfig 2011-05-18 12:34:57.000000000 +0530 | |
*************** | |
*** 271,276 **** | |
--- 271,277 ---- | |
source "drivers/net/wireless/ath/Kconfig" | |
source "drivers/net/wireless/b43/Kconfig" | |
source "drivers/net/wireless/b43legacy/Kconfig" | |
+ source "drivers/net/wireless/bcm4329/Kconfig" | |
source "drivers/net/wireless/hostap/Kconfig" | |
source "drivers/net/wireless/ipw2x00/Kconfig" | |
source "drivers/net/wireless/iwlwifi/Kconfig" | |
diff -crB 2/drivers/net/wireless/Makefile 1/drivers/net/wireless/Makefile | |
*** 2/drivers/net/wireless/Makefile 2012-09-24 11:44:01.666821189 +0530 | |
--- 1/drivers/net/wireless/Makefile 2011-05-18 12:34:57.000000000 +0530 | |
*************** | |
*** 52,54 **** | |
--- 52,56 ---- | |
obj-$(CONFIG_WL12XX) += wl12xx/ | |
obj-$(CONFIG_IWM) += iwmc3200wifi/ | |
+ | |
+ obj-$(CONFIG_BROADCOM_WIFI) += bcm4329/ | |
Only in 2/drivers/pci: .gitignore | |
Only in 1/drivers/power: fuel_gauge.c | |
diff -crB 2/drivers/power/Kconfig 1/drivers/power/Kconfig | |
*** 2/drivers/power/Kconfig 2012-09-24 11:44:02.322808912 +0530 | |
--- 1/drivers/power/Kconfig 2011-05-18 12:35:02.000000000 +0530 | |
*************** | |
*** 130,141 **** | |
--- 130,174 ---- | |
in handheld and portable equipment. The MAX17040 is configured | |
to operate with a single lithium cell | |
+ config BATTERY_MAX17042 | |
+ tristate "Maxim MAX17042 Fuel Gauge" | |
+ depends on I2C | |
+ help | |
+ The MAX17042 is fuel-gauge systems for lithium-ion (Li+) batteries | |
+ in handheld and portable equipment. The MAX17042 is configured | |
+ to operate with a single lithium cell | |
+ | |
+ config CHARGER_SMB136 | |
+ tristate "Summit SMB136 Charger" | |
+ depends on I2C | |
+ help | |
+ The SMB136 is a programmable single-cell lithium-ion/lithium-polymer battery charger | |
+ designed for a variety of partable applications. | |
+ | |
config BATTERY_Z2 | |
tristate "Z2 battery driver" | |
depends on I2C && MACH_ZIPIT2 | |
help | |
Say Y to include support for the battery on the Zipit Z2. | |
+ config BATTERY_S3C | |
+ tristate "S3C fake battery driver" | |
+ depends on ARCH_S5PV210 | |
+ help | |
+ Say Y to enable support for batteries with s5pc110 chip. | |
+ | |
+ config BATTERY_S5PC110 | |
+ tristate "Battery driver for CRESPO(S5PC110)" | |
+ depends on ARCH_S5PV210 | |
+ help | |
+ Say Y to enable support for batteries with s5pc110 chip. | |
+ | |
+ config BATTERY_P1 | |
+ tristate "Battery driver for P1(S5PC110)" | |
+ depends on ARCH_S5PV210 | |
+ help | |
+ Say Y to enable support for batteries with s5pc110 chip. | |
+ | |
config CHARGER_PCF50633 | |
tristate "NXP PCF50633 MBC" | |
depends on MFD_PCF50633 | |
diff -crB 2/drivers/power/Makefile 1/drivers/power/Makefile | |
*** 2/drivers/power/Makefile 2012-09-24 11:44:02.322808912 +0530 | |
--- 1/drivers/power/Makefile 2011-05-18 12:35:02.000000000 +0530 | |
*************** | |
*** 32,36 **** | |
--- 32,41 ---- | |
obj-$(CONFIG_BATTERY_BQ27x00) += bq27x00_battery.o | |
obj-$(CONFIG_BATTERY_DA9030) += da9030_battery.o | |
obj-$(CONFIG_BATTERY_MAX17040) += max17040_battery.o | |
+ obj-$(CONFIG_BATTERY_MAX17042) += max17042_battery.o | |
+ obj-$(CONFIG_CHARGER_SMB136) += smb136_charger.o | |
obj-$(CONFIG_BATTERY_Z2) += z2_battery.o | |
obj-$(CONFIG_CHARGER_PCF50633) += pcf50633-charger.o | |
+ obj-$(CONFIG_BATTERY_S5PC110) += s5pc110_battery.o | |
+ obj-$(CONFIG_BATTERY_P1) += sec_battery.o max8998_charger.o | |
+ obj-$(CONFIG_BATTERY_S3C) += s3c_fake_battery.o | |
diff -crB 2/drivers/power/max17040_battery.c 1/drivers/power/max17040_battery.c | |
*** 2/drivers/power/max17040_battery.c 2012-09-24 11:44:02.322808912 +0530 | |
--- 1/drivers/power/max17040_battery.c 2011-05-18 12:35:02.000000000 +0530 | |
*************** | |
*** 20,25 **** | |
--- 20,26 ---- | |
#include <linux/power_supply.h> | |
#include <linux/max17040_battery.h> | |
#include <linux/slab.h> | |
+ #include <linux/time.h> | |
#define MAX17040_VCELL_MSB 0x02 | |
#define MAX17040_VCELL_LSB 0x03 | |
*************** | |
*** 39,47 **** | |
struct max17040_chip { | |
struct i2c_client *client; | |
- struct delayed_work work; | |
struct power_supply battery; | |
struct max17040_platform_data *pdata; | |
/* State Of Connect */ | |
int online; | |
--- 40,48 ---- | |
struct max17040_chip { | |
struct i2c_client *client; | |
struct power_supply battery; | |
struct max17040_platform_data *pdata; | |
+ struct timespec next_update_time; | |
/* State Of Connect */ | |
int online; | |
*************** | |
*** 53,64 **** | |
--- 54,73 ---- | |
int status; | |
}; | |
+ static void max17040_update_values(struct max17040_chip *chip); | |
+ | |
static int max17040_get_property(struct power_supply *psy, | |
enum power_supply_property psp, | |
union power_supply_propval *val) | |
{ | |
struct max17040_chip *chip = container_of(psy, | |
struct max17040_chip, battery); | |
+ struct timespec now; | |
+ | |
+ ktime_get_ts(&now); | |
+ monotonic_to_bootbased(&now); | |
+ if (timespec_compare(&now, &chip->next_update_time) >= 0) | |
+ max17040_update_values(chip); | |
switch (psp) { | |
case POWER_SUPPLY_PROP_STATUS: | |
*************** | |
*** 68,74 **** | |
val->intval = chip->online; | |
break; | |
case POWER_SUPPLY_PROP_VOLTAGE_NOW: | |
! val->intval = chip->vcell; | |
break; | |
case POWER_SUPPLY_PROP_CAPACITY: | |
val->intval = chip->soc; | |
--- 77,83 ---- | |
val->intval = chip->online; | |
break; | |
case POWER_SUPPLY_PROP_VOLTAGE_NOW: | |
! val->intval = chip->vcell * 1250; | |
break; | |
case POWER_SUPPLY_PROP_CAPACITY: | |
val->intval = chip->soc; | |
*************** | |
*** 103,114 **** | |
return ret; | |
} | |
- static void max17040_reset(struct i2c_client *client) | |
- { | |
- max17040_write_reg(client, MAX17040_CMD_MSB, 0x54); | |
- max17040_write_reg(client, MAX17040_CMD_LSB, 0x00); | |
- } | |
- | |
static void max17040_get_vcell(struct i2c_client *client) | |
{ | |
struct max17040_chip *chip = i2c_get_clientdata(client); | |
--- 112,117 ---- | |
*************** | |
*** 130,136 **** | |
msb = max17040_read_reg(client, MAX17040_SOC_MSB); | |
lsb = max17040_read_reg(client, MAX17040_SOC_LSB); | |
! chip->soc = msb; | |
} | |
static void max17040_get_version(struct i2c_client *client) | |
--- 133,141 ---- | |
msb = max17040_read_reg(client, MAX17040_SOC_MSB); | |
lsb = max17040_read_reg(client, MAX17040_SOC_LSB); | |
! chip->soc = min(msb, (u8)100); | |
! // MIDAS: Test | |
! chip->soc = 100; | |
} | |
static void max17040_get_version(struct i2c_client *client) | |
*************** | |
*** 148,154 **** | |
{ | |
struct max17040_chip *chip = i2c_get_clientdata(client); | |
! if (chip->pdata->battery_online) | |
chip->online = chip->pdata->battery_online(); | |
else | |
chip->online = 1; | |
--- 153,159 ---- | |
{ | |
struct max17040_chip *chip = i2c_get_clientdata(client); | |
! if (chip->pdata && chip->pdata->battery_online) | |
chip->online = chip->pdata->battery_online(); | |
else | |
chip->online = 1; | |
*************** | |
*** 158,164 **** | |
{ | |
struct max17040_chip *chip = i2c_get_clientdata(client); | |
! if (!chip->pdata->charger_online || !chip->pdata->charger_enable) { | |
chip->status = POWER_SUPPLY_STATUS_UNKNOWN; | |
return; | |
} | |
--- 163,170 ---- | |
{ | |
struct max17040_chip *chip = i2c_get_clientdata(client); | |
! if (!chip->pdata || !chip->pdata->charger_online || | |
! !chip->pdata->charger_enable) { | |
chip->status = POWER_SUPPLY_STATUS_UNKNOWN; | |
return; | |
} | |
*************** | |
*** 176,193 **** | |
chip->status = POWER_SUPPLY_STATUS_FULL; | |
} | |
! static void max17040_work(struct work_struct *work) | |
{ | |
- struct max17040_chip *chip; | |
- | |
- chip = container_of(work, struct max17040_chip, work.work); | |
- | |
max17040_get_vcell(chip->client); | |
max17040_get_soc(chip->client); | |
max17040_get_online(chip->client); | |
max17040_get_status(chip->client); | |
! schedule_delayed_work(&chip->work, MAX17040_DELAY); | |
} | |
static enum power_supply_property max17040_battery_props[] = { | |
--- 182,198 ---- | |
chip->status = POWER_SUPPLY_STATUS_FULL; | |
} | |
! static void max17040_update_values(struct max17040_chip *chip) | |
{ | |
max17040_get_vcell(chip->client); | |
max17040_get_soc(chip->client); | |
max17040_get_online(chip->client); | |
max17040_get_status(chip->client); | |
! /* next update must be at least 1 second later */ | |
! ktime_get_ts(&chip->next_update_time); | |
! monotonic_to_bootbased(&chip->next_update_time); | |
! chip->next_update_time.tv_sec++; | |
} | |
static enum power_supply_property max17040_battery_props[] = { | |
*************** | |
*** 222,239 **** | |
chip->battery.properties = max17040_battery_props; | |
chip->battery.num_properties = ARRAY_SIZE(max17040_battery_props); | |
! ret = power_supply_register(&client->dev, &chip->battery); | |
if (ret) { | |
dev_err(&client->dev, "failed: power supply register\n"); | |
kfree(chip); | |
return ret; | |
} | |
- max17040_reset(client); | |
max17040_get_version(client); | |
! INIT_DELAYED_WORK_DEFERRABLE(&chip->work, max17040_work); | |
! schedule_delayed_work(&chip->work, MAX17040_DELAY); | |
return 0; | |
} | |
--- 227,249 ---- | |
chip->battery.properties = max17040_battery_props; | |
chip->battery.num_properties = ARRAY_SIZE(max17040_battery_props); | |
! max17040_update_values(chip); | |
! | |
! if (chip->pdata && chip->pdata->power_supply_register) | |
! ret = chip->pdata->power_supply_register(&client->dev, &chip->battery); | |
! else | |
! ret = power_supply_register(&client->dev, &chip->battery); | |
if (ret) { | |
dev_err(&client->dev, "failed: power supply register\n"); | |
kfree(chip); | |
return ret; | |
} | |
max17040_get_version(client); | |
! if (chip->pdata) | |
! i2c_smbus_write_word_data(client, MAX17040_RCOMP_MSB, | |
! swab16(chip->pdata->rcomp_value)); | |
return 0; | |
} | |
*************** | |
*** 242,279 **** | |
{ | |
struct max17040_chip *chip = i2c_get_clientdata(client); | |
! power_supply_unregister(&chip->battery); | |
! cancel_delayed_work(&chip->work); | |
kfree(chip); | |
return 0; | |
} | |
- #ifdef CONFIG_PM | |
- | |
- static int max17040_suspend(struct i2c_client *client, | |
- pm_message_t state) | |
- { | |
- struct max17040_chip *chip = i2c_get_clientdata(client); | |
- | |
- cancel_delayed_work(&chip->work); | |
- return 0; | |
- } | |
- | |
- static int max17040_resume(struct i2c_client *client) | |
- { | |
- struct max17040_chip *chip = i2c_get_clientdata(client); | |
- | |
- schedule_delayed_work(&chip->work, MAX17040_DELAY); | |
- return 0; | |
- } | |
- | |
- #else | |
- | |
- #define max17040_suspend NULL | |
- #define max17040_resume NULL | |
- | |
- #endif /* CONFIG_PM */ | |
- | |
static const struct i2c_device_id max17040_id[] = { | |
{ "max17040", 0 }, | |
{ } | |
--- 252,265 ---- | |
{ | |
struct max17040_chip *chip = i2c_get_clientdata(client); | |
! if (chip->pdata && chip->pdata->power_supply_unregister) | |
! chip->pdata->power_supply_unregister(&chip->battery); | |
! else | |
! power_supply_unregister(&chip->battery); | |
kfree(chip); | |
return 0; | |
} | |
static const struct i2c_device_id max17040_id[] = { | |
{ "max17040", 0 }, | |
{ } | |
*************** | |
*** 286,293 **** | |
}, | |
.probe = max17040_probe, | |
.remove = __devexit_p(max17040_remove), | |
- .suspend = max17040_suspend, | |
- .resume = max17040_resume, | |
.id_table = max17040_id, | |
}; | |
--- 272,277 ---- | |
Only in 1/drivers/power: max17042_battery.c | |
Only in 1/drivers/power: max8998_charger.c | |
diff -crB 2/drivers/power/power_supply_core.c 1/drivers/power/power_supply_core.c | |
*** 2/drivers/power/power_supply_core.c 2012-09-24 11:44:02.322808912 +0530 | |
--- 1/drivers/power/power_supply_core.c 2011-05-18 12:35:02.000000000 +0530 | |
*************** | |
*** 41,63 **** | |
static void power_supply_changed_work(struct work_struct *work) | |
{ | |
struct power_supply *psy = container_of(work, struct power_supply, | |
changed_work); | |
dev_dbg(psy->dev, "%s\n", __func__); | |
! class_for_each_device(power_supply_class, NULL, psy, | |
! __power_supply_changed_work); | |
! power_supply_update_leds(psy); | |
! kobject_uevent(&psy->dev->kobj, KOBJ_CHANGE); | |
} | |
void power_supply_changed(struct power_supply *psy) | |
{ | |
dev_dbg(psy->dev, "%s\n", __func__); | |
schedule_work(&psy->changed_work); | |
} | |
EXPORT_SYMBOL_GPL(power_supply_changed); | |
--- 41,80 ---- | |
static void power_supply_changed_work(struct work_struct *work) | |
{ | |
+ unsigned long flags; | |
struct power_supply *psy = container_of(work, struct power_supply, | |
changed_work); | |
dev_dbg(psy->dev, "%s\n", __func__); | |
! spin_lock_irqsave(&psy->changed_lock, flags); | |
! if (psy->changed) { | |
! psy->changed = false; | |
! spin_unlock_irqrestore(&psy->changed_lock, flags); | |
! class_for_each_device(power_supply_class, NULL, psy, | |
! __power_supply_changed_work); | |
! power_supply_update_leds(psy); | |
! | |
! kobject_uevent(&psy->dev->kobj, KOBJ_CHANGE); | |
! spin_lock_irqsave(&psy->changed_lock, flags); | |
! } | |
! if (!psy->changed) | |
! wake_unlock(&psy->work_wake_lock); | |
! spin_unlock_irqrestore(&psy->changed_lock, flags); | |
} | |
void power_supply_changed(struct power_supply *psy) | |
{ | |
+ unsigned long flags; | |
+ | |
dev_dbg(psy->dev, "%s\n", __func__); | |
+ spin_lock_irqsave(&psy->changed_lock, flags); | |
+ psy->changed = true; | |
+ wake_lock(&psy->work_wake_lock); | |
+ spin_unlock_irqrestore(&psy->changed_lock, flags); | |
schedule_work(&psy->changed_work); | |
} | |
EXPORT_SYMBOL_GPL(power_supply_changed); | |
*************** | |
*** 180,185 **** | |
--- 197,204 ---- | |
goto device_add_failed; | |
INIT_WORK(&psy->changed_work, power_supply_changed_work); | |
+ spin_lock_init(&psy->changed_lock); | |
+ wake_lock_init(&psy->work_wake_lock, WAKE_LOCK_SUSPEND, "power-supply"); | |
rc = power_supply_create_triggers(psy); | |
if (rc) | |
*************** | |
*** 190,195 **** | |
--- 209,215 ---- | |
goto success; | |
create_triggers_failed: | |
+ wake_lock_destroy(&psy->work_wake_lock); | |
device_unregister(psy->dev); | |
kobject_set_name_failed: | |
device_add_failed: | |
*************** | |
*** 203,208 **** | |
--- 223,229 ---- | |
{ | |
flush_scheduled_work(); | |
power_supply_remove_triggers(psy); | |
+ wake_lock_destroy(&psy->work_wake_lock); | |
device_unregister(psy->dev); | |
} | |
EXPORT_SYMBOL_GPL(power_supply_unregister); | |
Only in 1/drivers/power: s3c_fake_battery.c | |
Only in 1/drivers/power: s5pc110_battery.c | |
Only in 1/drivers/power: s5pc110_battery.h | |
Only in 1/drivers/power: sec_battery.c | |
Only in 1/drivers/power: smb136_charger.c | |
diff -crB 2/drivers/regulator/core.c 1/drivers/regulator/core.c | |
*** 2/drivers/regulator/core.c 2012-09-24 11:44:01.246829048 +0530 | |
--- 1/drivers/regulator/core.c 2011-05-18 12:35:03.000000000 +0530 | |
*************** | |
*** 1498,1503 **** | |
--- 1497,1512 ---- | |
} | |
EXPORT_SYMBOL_GPL(regulator_is_enabled); | |
+ // for using specific regulator (not match with use_count) | |
+ void regulator_set_use_count(struct regulator *regulator, int cnt) | |
+ { | |
+ mutex_lock(®ulator->rdev->mutex); | |
+ regulator->rdev->use_count = cnt; | |
+ mutex_unlock(®ulator->rdev->mutex); | |
+ } | |
+ EXPORT_SYMBOL_GPL(regulator_set_use_count); | |
+ | |
+ | |
/** | |
* regulator_count_voltages - count regulator_list_voltage() selectors | |
* @regulator: regulator source | |
diff -crB 2/drivers/regulator/Kconfig 1/drivers/regulator/Kconfig | |
*** 2/drivers/regulator/Kconfig 2012-09-24 11:44:01.246829048 +0530 | |
--- 1/drivers/regulator/Kconfig 2011-05-18 12:35:03.000000000 +0530 | |
*************** | |
*** 100,105 **** | |
--- 100,113 ---- | |
help | |
Say y here to support the voltage regulaltor of Maxim MAX8925 PMIC. | |
+ config REGULATOR_MAX8998 | |
+ tristate "Maxim 8998 voltage regulator" | |
+ depends on MFD_MAX8998 | |
+ help | |
+ This driver controls a Maxim 8998 voltage output regulator | |
+ via I2C bus. The provided regulator is suitable for S3C6410 | |
+ and S5PC1XX chips to control VCC_CORE and VCC_USIM voltages. | |
+ | |
config REGULATOR_TWL4030 | |
bool "TI TWL4030/TWL5030/TWL6030/TPS695x0 PMIC" | |
depends on TWL4030_CORE | |
diff -crB 2/drivers/regulator/Makefile 1/drivers/regulator/Makefile | |
*** 2/drivers/regulator/Makefile 2012-09-24 11:44:01.246829048 +0530 | |
--- 1/drivers/regulator/Makefile 2011-05-18 12:35:03.000000000 +0530 | |
*************** | |
*** 16,21 **** | |
--- 16,22 ---- | |
obj-$(CONFIG_REGULATOR_MAX8649) += max8649.o | |
obj-$(CONFIG_REGULATOR_MAX8660) += max8660.o | |
obj-$(CONFIG_REGULATOR_MAX8925) += max8925-regulator.o | |
+ obj-$(CONFIG_REGULATOR_MAX8998) += max8998.o | |
obj-$(CONFIG_REGULATOR_WM831X) += wm831x-dcdc.o | |
obj-$(CONFIG_REGULATOR_WM831X) += wm831x-isink.o | |
obj-$(CONFIG_REGULATOR_WM831X) += wm831x-ldo.o | |
Only in 1/drivers/regulator: max8998.c | |
Only in 1/drivers/rtc: alarm.c | |
Only in 1/drivers/rtc: alarm-dev.c | |
diff -crB 2/drivers/rtc/class.c 1/drivers/rtc/class.c | |
*** 2/drivers/rtc/class.c 2012-09-24 11:44:02.354808316 +0530 | |
--- 1/drivers/rtc/class.c 2011-05-18 12:35:03.000000000 +0530 | |
*************** | |
*** 41,65 **** | |
*/ | |
static struct timespec delta; | |
static time_t oldtime; | |
static int rtc_suspend(struct device *dev, pm_message_t mesg) | |
{ | |
struct rtc_device *rtc = to_rtc_device(dev); | |
struct rtc_time tm; | |
! struct timespec ts = current_kernel_time(); | |
if (strcmp(dev_name(&rtc->dev), CONFIG_RTC_HCTOSYS_DEVICE) != 0) | |
return 0; | |
rtc_read_time(rtc, &tm); | |
rtc_tm_to_time(&tm, &oldtime); | |
/* RTC precision is 1 second; adjust delta for avg 1/2 sec err */ | |
! set_normalized_timespec(&delta, | |
ts.tv_sec - oldtime, | |
ts.tv_nsec - (NSEC_PER_SEC >> 1)); | |
return 0; | |
} | |
--- 41,72 ---- | |
*/ | |
static struct timespec delta; | |
+ static struct timespec delta_delta; | |
static time_t oldtime; | |
static int rtc_suspend(struct device *dev, pm_message_t mesg) | |
{ | |
struct rtc_device *rtc = to_rtc_device(dev); | |
struct rtc_time tm; | |
! struct timespec ts; | |
! struct timespec new_delta; | |
if (strcmp(dev_name(&rtc->dev), CONFIG_RTC_HCTOSYS_DEVICE) != 0) | |
return 0; | |
+ getnstimeofday(&ts); | |
rtc_read_time(rtc, &tm); | |
rtc_tm_to_time(&tm, &oldtime); | |
/* RTC precision is 1 second; adjust delta for avg 1/2 sec err */ | |
! set_normalized_timespec(&new_delta, | |
ts.tv_sec - oldtime, | |
ts.tv_nsec - (NSEC_PER_SEC >> 1)); | |
+ /* prevent 1/2 sec errors from accumulating */ | |
+ delta_delta = timespec_sub(new_delta, delta); | |
+ if (delta_delta.tv_sec < -2 || delta_delta.tv_sec >= 2) | |
+ delta = new_delta; | |
return 0; | |
} | |
*************** | |
*** 79,84 **** | |
--- 86,93 ---- | |
return 0; | |
} | |
rtc_tm_to_time(&tm, &newtime); | |
+ if (delta_delta.tv_sec < -1) | |
+ newtime++; | |
if (newtime <= oldtime) { | |
if (newtime < oldtime) | |
pr_debug("%s: time travel!\n", dev_name(&rtc->dev)); | |
diff -crB 2/drivers/rtc/Kconfig 1/drivers/rtc/Kconfig | |
*** 2/drivers/rtc/Kconfig 2012-09-24 11:44:02.354808316 +0530 | |
--- 1/drivers/rtc/Kconfig 2011-05-18 12:35:03.000000000 +0530 | |
*************** | |
*** 109,114 **** | |
--- 109,132 ---- | |
clock several times per second, please enable this option | |
only if you know that you really need it. | |
+ config RTC_INTF_ALARM | |
+ bool "Android alarm driver" | |
+ depends on RTC_CLASS | |
+ default y | |
+ help | |
+ Provides non-wakeup and rtc backed wakeup alarms based on rtc or | |
+ elapsed realtime, and a non-wakeup alarm on the monotonic clock. | |
+ Also provides an interface to set the wall time which must be used | |
+ for elapsed realtime to work. | |
+ | |
+ config RTC_INTF_ALARM_DEV | |
+ bool "Android alarm device" | |
+ depends on RTC_INTF_ALARM | |
+ default y | |
+ help | |
+ Exports the alarm interface to user-space. | |
+ | |
+ | |
config RTC_DRV_TEST | |
tristate "Test driver/device" | |
help | |
*************** | |
*** 647,653 **** | |
config RTC_DRV_S3C | |
tristate "Samsung S3C series SoC RTC" | |
! depends on ARCH_S3C2410 || ARCH_S3C64XX | |
help | |
RTC (Realtime Clock) driver for the clock inbuilt into the | |
Samsung S3C24XX series of SoCs. This can provide periodic | |
--- 665,671 ---- | |
config RTC_DRV_S3C | |
tristate "Samsung S3C series SoC RTC" | |
! depends on ARCH_S3C2410 || ARCH_S3C64XX || ARCH_S5PV210 | |
help | |
RTC (Realtime Clock) driver for the clock inbuilt into the | |
Samsung S3C24XX series of SoCs. This can provide periodic | |
diff -crB 2/drivers/rtc/Makefile 1/drivers/rtc/Makefile | |
*** 2/drivers/rtc/Makefile 2012-09-24 11:44:02.354808316 +0530 | |
--- 1/drivers/rtc/Makefile 2011-05-18 12:35:03.000000000 +0530 | |
*************** | |
*** 11,16 **** | |
--- 11,18 ---- | |
obj-$(CONFIG_RTC_CLASS) += rtc-core.o | |
rtc-core-y := class.o interface.o | |
+ obj-$(CONFIG_RTC_INTF_ALARM) += alarm.o | |
+ obj-$(CONFIG_RTC_INTF_ALARM_DEV) += alarm-dev.o | |
rtc-core-$(CONFIG_RTC_INTF_DEV) += rtc-dev.o | |
rtc-core-$(CONFIG_RTC_INTF_PROC) += rtc-proc.o | |
rtc-core-$(CONFIG_RTC_INTF_SYSFS) += rtc-sysfs.o | |
*************** | |
*** 79,85 **** | |
obj-$(CONFIG_RTC_DRV_RX8025) += rtc-rx8025.o | |
obj-$(CONFIG_RTC_DRV_RX8581) += rtc-rx8581.o | |
obj-$(CONFIG_RTC_DRV_S35390A) += rtc-s35390a.o | |
! obj-$(CONFIG_RTC_DRV_S3C) += rtc-s3c.o | |
obj-$(CONFIG_RTC_DRV_SA1100) += rtc-sa1100.o | |
obj-$(CONFIG_RTC_DRV_SH) += rtc-sh.o | |
obj-$(CONFIG_RTC_DRV_STARFIRE) += rtc-starfire.o | |
--- 81,87 ---- | |
obj-$(CONFIG_RTC_DRV_RX8025) += rtc-rx8025.o | |
obj-$(CONFIG_RTC_DRV_RX8581) += rtc-rx8581.o | |
obj-$(CONFIG_RTC_DRV_S35390A) += rtc-s35390a.o | |
! obj-$(CONFIG_RTC_DRV_S3C) += rtc-max8998.o rtc-s3c.o | |
obj-$(CONFIG_RTC_DRV_SA1100) += rtc-sa1100.o | |
obj-$(CONFIG_RTC_DRV_SH) += rtc-sh.o | |
obj-$(CONFIG_RTC_DRV_STARFIRE) += rtc-starfire.o | |
Only in 1/drivers/rtc: rtc-max8998.c | |
diff -crB 2/drivers/rtc/rtc-s3c.c 1/drivers/rtc/rtc-s3c.c | |
*** 2/drivers/rtc/rtc-s3c.c 2012-09-24 11:44:02.354808316 +0530 | |
--- 1/drivers/rtc/rtc-s3c.c 2011-05-18 12:35:03.000000000 +0530 | |
*************** | |
*** 17,34 **** | |
#include <linux/init.h> | |
#include <linux/platform_device.h> | |
#include <linux/interrupt.h> | |
#include <linux/rtc.h> | |
#include <linux/bcd.h> | |
#include <linux/clk.h> | |
#include <linux/log2.h> | |
#include <linux/slab.h> | |
#include <mach/hardware.h> | |
- #include <asm/uaccess.h> | |
- #include <asm/io.h> | |
#include <asm/irq.h> | |
#include <plat/regs-rtc.h> | |
enum s3c_cpu_type { | |
TYPE_S3C2410, | |
TYPE_S3C64XX, | |
--- 17,38 ---- | |
#include <linux/init.h> | |
#include <linux/platform_device.h> | |
#include <linux/interrupt.h> | |
+ #include <linux/device.h> | |
#include <linux/rtc.h> | |
#include <linux/bcd.h> | |
#include <linux/clk.h> | |
#include <linux/log2.h> | |
#include <linux/slab.h> | |
+ #include <linux/uaccess.h> | |
+ #include <linux/io.h> | |
#include <mach/hardware.h> | |
#include <asm/irq.h> | |
+ #include <asm/mach/time.h> | |
#include <plat/regs-rtc.h> | |
+ #include "rtc-s3c.h" | |
+ | |
enum s3c_cpu_type { | |
TYPE_S3C2410, | |
TYPE_S3C64XX, | |
*************** | |
*** 42,51 **** | |
--- 46,60 ---- | |
static void __iomem *s3c_rtc_base; | |
static int s3c_rtc_alarmno = NO_IRQ; | |
static int s3c_rtc_tickno = NO_IRQ; | |
+ static int s3c_rtc_freq = 1; | |
static enum s3c_cpu_type s3c_rtc_cpu_type; | |
static DEFINE_SPINLOCK(s3c_rtc_pie_lock); | |
+ static unsigned int tick_count; | |
+ | |
+ static void s3c_rtc_enable(struct device *dev, int en); | |
+ static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm); | |
/* IRQ Handlers */ | |
static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) | |
*************** | |
*** 53,68 **** | |
--- 62,85 ---- | |
struct rtc_device *rdev = id; | |
rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF); | |
+ | |
+ writeb(S3C_INTP_ALM, s3c_rtc_base + S3C_INTP); | |
+ | |
return IRQ_HANDLED; | |
} | |
+ #ifndef CONFIG_HRT_RTC | |
static irqreturn_t s3c_rtc_tickirq(int irq, void *id) | |
{ | |
struct rtc_device *rdev = id; | |
rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF); | |
+ | |
+ writeb(S3C_INTP_TIC, s3c_rtc_base + S3C_INTP); | |
+ | |
return IRQ_HANDLED; | |
} | |
+ #endif | |
/* Update control registers */ | |
static void s3c_rtc_setaie(int to) | |
*************** | |
*** 88,108 **** | |
spin_lock_irq(&s3c_rtc_pie_lock); | |
if (s3c_rtc_cpu_type == TYPE_S3C64XX) { | |
! tmp = readb(s3c_rtc_base + S3C2410_RTCCON); | |
tmp &= ~S3C64XX_RTCCON_TICEN; | |
if (enabled) | |
tmp |= S3C64XX_RTCCON_TICEN; | |
! writeb(tmp, s3c_rtc_base + S3C2410_RTCCON); | |
} else { | |
! tmp = readb(s3c_rtc_base + S3C2410_TICNT); | |
tmp &= ~S3C2410_TICNT_ENABLE; | |
if (enabled) | |
tmp |= S3C2410_TICNT_ENABLE; | |
! writeb(tmp, s3c_rtc_base + S3C2410_TICNT); | |
} | |
spin_unlock_irq(&s3c_rtc_pie_lock); | |
--- 105,125 ---- | |
spin_lock_irq(&s3c_rtc_pie_lock); | |
if (s3c_rtc_cpu_type == TYPE_S3C64XX) { | |
! tmp = readw(s3c_rtc_base + S3C2410_RTCCON); | |
tmp &= ~S3C64XX_RTCCON_TICEN; | |
if (enabled) | |
tmp |= S3C64XX_RTCCON_TICEN; | |
! writew(tmp, s3c_rtc_base + S3C2410_RTCCON); | |
} else { | |
! tmp = readw(s3c_rtc_base + S3C2410_TICNT); | |
tmp &= ~S3C2410_TICNT_ENABLE; | |
if (enabled) | |
tmp |= S3C2410_TICNT_ENABLE; | |
! writew(tmp, s3c_rtc_base + S3C2410_TICNT); | |
} | |
spin_unlock_irq(&s3c_rtc_pie_lock); | |
*************** | |
*** 122,134 **** | |
spin_lock_irq(&s3c_rtc_pie_lock); | |
if (s3c_rtc_cpu_type == TYPE_S3C2410) { | |
! tmp = readb(s3c_rtc_base + S3C2410_TICNT); | |
tmp &= S3C2410_TICNT_ENABLE; | |
} | |
tmp |= (rtc_dev->max_user_freq / freq)-1; | |
! writeb(tmp, s3c_rtc_base + S3C2410_TICNT); | |
spin_unlock_irq(&s3c_rtc_pie_lock); | |
return 0; | |
--- 139,151 ---- | |
spin_lock_irq(&s3c_rtc_pie_lock); | |
if (s3c_rtc_cpu_type == TYPE_S3C2410) { | |
! tmp = readw(s3c_rtc_base + S3C2410_TICNT); | |
tmp &= S3C2410_TICNT_ENABLE; | |
} | |
tmp |= (rtc_dev->max_user_freq / freq)-1; | |
! writel(tmp, s3c_rtc_base + S3C2410_TICNT); | |
spin_unlock_irq(&s3c_rtc_pie_lock); | |
return 0; | |
*************** | |
*** 141,153 **** | |
unsigned int have_retried = 0; | |
void __iomem *base = s3c_rtc_base; | |
retry_get_time: | |
rtc_tm->tm_min = readb(base + S3C2410_RTCMIN); | |
rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR); | |
rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE); | |
rtc_tm->tm_mon = readb(base + S3C2410_RTCMON); | |
rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR); | |
! rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC); | |
/* the only way to work out wether the system was mid-update | |
* when we read it is to check the second counter, and if it | |
--- 158,177 ---- | |
unsigned int have_retried = 0; | |
void __iomem *base = s3c_rtc_base; | |
+ s3c_rtc_enable(dev, 1); | |
retry_get_time: | |
+ rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC); | |
rtc_tm->tm_min = readb(base + S3C2410_RTCMIN); | |
rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR); | |
rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE); | |
rtc_tm->tm_mon = readb(base + S3C2410_RTCMON); | |
+ | |
+ #if defined(CONFIG_CPU_S5PV210) | |
+ rtc_tm->tm_year = readl(base + S3C2410_RTCYEAR); | |
+ #else | |
rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR); | |
! #endif | |
! | |
/* the only way to work out wether the system was mid-update | |
* when we read it is to check the second counter, and if it | |
*************** | |
*** 158,163 **** | |
--- 182,188 ---- | |
have_retried = 1; | |
goto retry_get_time; | |
} | |
+ s3c_rtc_enable(dev, 0); | |
pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n", | |
rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday, | |
*************** | |
*** 168,176 **** | |
rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour); | |
rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday); | |
rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon); | |
rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year); | |
- | |
rtc_tm->tm_year += 100; | |
rtc_tm->tm_mon -= 1; | |
return 0; | |
--- 193,206 ---- | |
rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour); | |
rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday); | |
rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon); | |
+ #if defined(CONFIG_CPU_S5PV210) | |
+ rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year & 0xff) + | |
+ bcd2bin(rtc_tm->tm_year >> 8) * 100; | |
+ #else | |
rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year); | |
rtc_tm->tm_year += 100; | |
+ #endif | |
+ | |
rtc_tm->tm_mon -= 1; | |
return 0; | |
*************** | |
*** 179,185 **** | |
--- 209,220 ---- | |
static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) | |
{ | |
void __iomem *base = s3c_rtc_base; | |
+ #if defined(CONFIG_CPU_S5PV210) | |
+ int year = tm->tm_year; | |
+ int year100; | |
+ #else | |
int year = tm->tm_year - 100; | |
+ #endif | |
pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n", | |
tm->tm_year, tm->tm_mon, tm->tm_mday, | |
*************** | |
*** 187,203 **** | |
--- 222,259 ---- | |
/* we get around y2k by simply not supporting it */ | |
+ | |
+ #if defined(CONFIG_CPU_S5PV210) | |
+ if (year < 0 || year >= 1000) { | |
+ dev_err(dev, "rtc only supports 0~999 years\n"); | |
+ #else | |
if (year < 0 || year >= 100) { | |
dev_err(dev, "rtc only supports 100 years\n"); | |
+ #endif | |
return -EINVAL; | |
} | |
+ s3c_rtc_enable(dev, 1); | |
+ | |
writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC); | |
writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN); | |
writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR); | |
writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE); | |
writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON); | |
+ | |
+ #if defined(CONFIG_CPU_S5PV210) | |
+ year100 = year/100; | |
+ year = year%100; | |
+ year = bin2bcd(year) | ((bin2bcd(year100)) << 8); | |
+ year = (0x00000fff & year); | |
+ pr_debug("year %x\n", year); | |
+ writel(year, base + S3C2410_RTCYEAR); | |
+ #else | |
writeb(bin2bcd(year), base + S3C2410_RTCYEAR); | |
+ #endif | |
+ s3c_rtc_enable(dev, 0); | |
+ | |
+ max8998_rtc_set_time(tm); | |
return 0; | |
} | |
*************** | |
*** 208,219 **** | |
--- 264,284 ---- | |
void __iomem *base = s3c_rtc_base; | |
unsigned int alm_en; | |
+ s3c_rtc_enable(dev, 1); | |
+ | |
alm_tm->tm_sec = readb(base + S3C2410_ALMSEC); | |
alm_tm->tm_min = readb(base + S3C2410_ALMMIN); | |
alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR); | |
alm_tm->tm_mon = readb(base + S3C2410_ALMMON); | |
alm_tm->tm_mday = readb(base + S3C2410_ALMDATE); | |
+ #if defined(CONFIG_CPU_S5PV210) | |
+ alm_tm->tm_year = readl(base + S3C2410_ALMYEAR); | |
+ alm_tm->tm_year = (0x00000fff & alm_tm->tm_year); | |
+ #else | |
alm_tm->tm_year = readb(base + S3C2410_ALMYEAR); | |
+ #endif | |
+ | |
+ s3c_rtc_enable(dev, 0); | |
alm_en = readb(base + S3C2410_RTCALM); | |
*************** | |
*** 254,263 **** | |
alm_tm->tm_mon = 0xff; | |
} | |
! if (alm_en & S3C2410_RTCALM_YEAREN) | |
alm_tm->tm_year = bcd2bin(alm_tm->tm_year); | |
! else | |
alm_tm->tm_year = 0xffff; | |
return 0; | |
} | |
--- 319,334 ---- | |
alm_tm->tm_mon = 0xff; | |
} | |
! if (alm_en & S3C2410_RTCALM_YEAREN) { | |
! #if defined(CONFIG_CPU_S5PV210) | |
! alm_tm->tm_year = bcd2bin(alm_tm->tm_year & 0xff) + | |
! bcd2bin(alm_tm->tm_year >> 8) * 100; | |
! #else | |
alm_tm->tm_year = bcd2bin(alm_tm->tm_year); | |
! #endif | |
! } else { | |
alm_tm->tm_year = 0xffff; | |
+ } | |
return 0; | |
} | |
*************** | |
*** 268,279 **** | |
--- 339,359 ---- | |
void __iomem *base = s3c_rtc_base; | |
unsigned int alrm_en; | |
+ #if defined(CONFIG_CPU_S5PV210) | |
+ int year = tm->tm_year; | |
+ int year100; | |
+ #else | |
+ int year = tm->tm_year - 100; | |
+ #endif | |
+ | |
pr_debug("s3c_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n", | |
alrm->enabled, | |
tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff, | |
tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec); | |
+ s3c_rtc_enable(dev, 1); | |
+ | |
alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; | |
writeb(0x00, base + S3C2410_RTCALM); | |
*************** | |
*** 292,297 **** | |
--- 372,406 ---- | |
writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR); | |
} | |
+ if (tm->tm_mday >= 0) { | |
+ alrm_en |= S3C2410_RTCALM_DAYEN; | |
+ writeb(bin2bcd(tm->tm_mday), base + S3C2410_ALMDATE); | |
+ } | |
+ | |
+ if (tm->tm_mon < 13 && tm->tm_mon >= 0) { | |
+ alrm_en |= S3C2410_RTCALM_MONEN; | |
+ writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_ALMMON); | |
+ } | |
+ | |
+ #if defined(CONFIG_CPU_S5PV210) | |
+ if (year < 1000 && year >= 0) { | |
+ alrm_en |= S3C2410_RTCALM_YEAREN; | |
+ year100 = year/100; | |
+ year = year%100; | |
+ year = bin2bcd(year) | ((bin2bcd(year100)) << 8); | |
+ year = (0x00000fff & year); | |
+ pr_debug("year %x\n", year); | |
+ writel(year, base + S3C2410_ALMYEAR); | |
+ } | |
+ #else | |
+ if (year < 100 && year >= 0) { | |
+ alrm_en |= S3C2410_RTCALM_YEAREN; | |
+ writeb(bin2bcd(year), base + S3C2410_ALMYEAR); | |
+ } | |
+ #endif | |
+ | |
+ s3c_rtc_enable(dev, 0); | |
+ | |
pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en); | |
writeb(alrm_en, base + S3C2410_RTCALM); | |
*************** | |
*** 301,319 **** | |
return 0; | |
} | |
! static int s3c_rtc_proc(struct device *dev, struct seq_file *seq) | |
{ | |
! unsigned int ticnt; | |
! if (s3c_rtc_cpu_type == TYPE_S3C64XX) { | |
! ticnt = readb(s3c_rtc_base + S3C2410_RTCCON); | |
! ticnt &= S3C64XX_RTCCON_TICEN; | |
! } else { | |
! ticnt = readb(s3c_rtc_base + S3C2410_TICNT); | |
! ticnt &= S3C2410_TICNT_ENABLE; | |
! } | |
! seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no"); | |
return 0; | |
} | |
--- 410,466 ---- | |
return 0; | |
} | |
! static int s3c_rtc_ioctl(struct device *dev, | |
! unsigned int cmd, unsigned long arg) | |
{ | |
! unsigned int ret = -ENOIOCTLCMD; | |
! switch (cmd) { | |
! case RTC_AIE_OFF: | |
! case RTC_AIE_ON: | |
! s3c_rtc_setaie((cmd == RTC_AIE_ON) ? 1 : 0); | |
! ret = 0; | |
! break; | |
! | |
! case RTC_PIE_OFF: | |
! case RTC_PIE_ON: | |
! tick_count = 0; | |
! s3c_rtc_setpie(dev, (cmd == RTC_PIE_ON) ? 1 : 0); | |
! ret = 0; | |
! break; | |
! | |
! case RTC_IRQP_READ: | |
! ret = put_user(s3c_rtc_freq, (unsigned long __user *)arg); | |
! break; | |
! | |
! case RTC_IRQP_SET: | |
! /* check for power of 2 */ | |
! | |
! if ((arg & (arg-1)) != 0 || arg < 1) { | |
! ret = -EINVAL; | |
! goto exit; | |
! } | |
! | |
! pr_debug("s3c2410_rtc: setting frequency %ld\n", arg); | |
! | |
! s3c_rtc_setfreq(dev, arg); | |
! ret = 0; | |
! break; | |
! | |
! case RTC_UIE_ON: | |
! case RTC_UIE_OFF: | |
! ret = -EINVAL; | |
! } | |
! exit: | |
! return ret; | |
! } | |
! static int s3c_rtc_proc(struct device *dev, struct seq_file *seq) | |
! { | |
! unsigned int ticnt = readw(s3c_rtc_base + S3C2410_TICNT); | |
! | |
! seq_printf(seq, "periodic_IRQ\t: %s\n", | |
! (ticnt & S3C2410_TICNT_ENABLE) ? "yes" : "no"); | |
return 0; | |
} | |
*************** | |
*** 331,336 **** | |
--- 478,484 ---- | |
return ret; | |
} | |
+ #ifndef CONFIG_HRT_RTC | |
ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq, | |
IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev); | |
*************** | |
*** 338,349 **** | |
--- 486,500 ---- | |
dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret); | |
goto tick_err; | |
} | |
+ #endif | |
return ret; | |
+ #ifndef CONFIG_HRT_RTC | |
tick_err: | |
free_irq(s3c_rtc_alarmno, rtc_dev); | |
return ret; | |
+ #endif | |
} | |
static void s3c_rtc_release(struct device *dev) | |
*************** | |
*** 351,366 **** | |
--- 502,522 ---- | |
struct platform_device *pdev = to_platform_device(dev); | |
struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | |
+ #ifndef CONFIG_HRT_RTC | |
/* do not clear AIE here, it may be needed for wake */ | |
s3c_rtc_setpie(dev, 0); | |
free_irq(s3c_rtc_alarmno, rtc_dev); | |
free_irq(s3c_rtc_tickno, rtc_dev); | |
+ #endif | |
+ free_irq(s3c_rtc_alarmno, rtc_dev); | |
+ | |
} | |
static const struct rtc_class_ops s3c_rtcops = { | |
.open = s3c_rtc_open, | |
.release = s3c_rtc_release, | |
+ .ioctl = s3c_rtc_ioctl, | |
.read_time = s3c_rtc_gettime, | |
.set_time = s3c_rtc_settime, | |
.read_alarm = s3c_rtc_getalarm, | |
*************** | |
*** 370,376 **** | |
.proc = s3c_rtc_proc, | |
}; | |
! static void s3c_rtc_enable(struct platform_device *pdev, int en) | |
{ | |
void __iomem *base = s3c_rtc_base; | |
unsigned int tmp; | |
--- 526,532 ---- | |
.proc = s3c_rtc_proc, | |
}; | |
! static void s3c_rtc_enable(struct device *dev, int en) | |
{ | |
void __iomem *base = s3c_rtc_base; | |
unsigned int tmp; | |
*************** | |
*** 379,417 **** | |
return; | |
if (!en) { | |
! tmp = readb(base + S3C2410_RTCCON); | |
! if (s3c_rtc_cpu_type == TYPE_S3C64XX) | |
! tmp &= ~S3C64XX_RTCCON_TICEN; | |
! tmp &= ~S3C2410_RTCCON_RTCEN; | |
! writeb(tmp, base + S3C2410_RTCCON); | |
! | |
! if (s3c_rtc_cpu_type == TYPE_S3C2410) { | |
! tmp = readb(base + S3C2410_TICNT); | |
! tmp &= ~S3C2410_TICNT_ENABLE; | |
! writeb(tmp, base + S3C2410_TICNT); | |
! } | |
} else { | |
/* re-enable the device, and check it is ok */ | |
! if ((readb(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0){ | |
! dev_info(&pdev->dev, "rtc disabled, re-enabling\n"); | |
! tmp = readb(base + S3C2410_RTCCON); | |
! writeb(tmp|S3C2410_RTCCON_RTCEN, base+S3C2410_RTCCON); | |
} | |
! if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)){ | |
! dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n"); | |
! tmp = readb(base + S3C2410_RTCCON); | |
! writeb(tmp& ~S3C2410_RTCCON_CNTSEL, base+S3C2410_RTCCON); | |
} | |
! if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)){ | |
! dev_info(&pdev->dev, "removing RTCCON_CLKRST\n"); | |
! tmp = readb(base + S3C2410_RTCCON); | |
! writeb(tmp & ~S3C2410_RTCCON_CLKRST, base+S3C2410_RTCCON); | |
} | |
} | |
} | |
--- 535,571 ---- | |
return; | |
if (!en) { | |
! tmp = readw(base + S3C2410_RTCCON); | |
! #ifdef CONFIG_HRT_RTC | |
! writew(tmp & ~(S3C2410_RTCCON_RTCEN), base + S3C2410_RTCCON); | |
! #else | |
! writew(tmp & ~(S3C2410_RTCCON_RTCEN | S3C_RTCCON_TICEN), | |
! base + S3C2410_RTCCON); | |
! #endif /* CONFIG_HRT_RTC */ | |
} else { | |
/* re-enable the device, and check it is ok */ | |
! if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) { | |
! dev_info(dev, "rtc disabled, re-enabling\n"); | |
! tmp = readw(base + S3C2410_RTCCON); | |
! writew(tmp|S3C2410_RTCCON_RTCEN, base+S3C2410_RTCCON); | |
} | |
! if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) { | |
! dev_info(dev, "removing RTCCON_CNTSEL\n"); | |
! tmp = readw(base + S3C2410_RTCCON); | |
! writew(tmp & ~S3C2410_RTCCON_CNTSEL, | |
! base+S3C2410_RTCCON); | |
} | |
! if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) { | |
! dev_info(dev, "removing RTCCON_CLKRST\n"); | |
! tmp = readw(base + S3C2410_RTCCON); | |
! writew(tmp & ~S3C2410_RTCCON_CLKRST, | |
! base+S3C2410_RTCCON); | |
} | |
} | |
} | |
*************** | |
*** 437,443 **** | |
--- 591,603 ---- | |
{ | |
struct rtc_device *rtc; | |
struct resource *res; | |
+ unsigned char bcd_tmp, bcd_loop; | |
int ret; | |
+ struct rtc_time tm; | |
+ int year; | |
+ #if defined(CONFIG_CPU_S5PV210) | |
+ int year100; | |
+ #endif | |
pr_debug("%s: probe=%p\n", __func__, pdev); | |
*************** | |
*** 485,497 **** | |
/* check to see if everything is setup correctly */ | |
- s3c_rtc_enable(pdev, 1); | |
! pr_debug("s3c2410_rtc: RTCCON=%02x\n", | |
! readb(s3c_rtc_base + S3C2410_RTCCON)); | |
device_init_wakeup(&pdev->dev, 1); | |
/* register RTC and exit */ | |
rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops, | |
--- 645,720 ---- | |
/* check to see if everything is setup correctly */ | |
! pr_debug("s3c2410_rtc: RTCCON=%02x\n", | |
! readw(s3c_rtc_base + S3C2410_RTCCON)); | |
! #ifdef CONFIG_PM | |
! s3c_rtc_setfreq(&pdev->dev, 0); | |
! #else | |
! s3c_rtc_setfreq(&pdev->dev, 1); | |
! #endif | |
device_init_wakeup(&pdev->dev, 1); | |
+ | |
+ s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data; | |
+ | |
+ max8998_rtc_read_time(&tm); | |
+ | |
+ /* update time from pmic */ | |
+ | |
+ | |
+ #if defined(CONFIG_CPU_S5PV210) | |
+ year = tm.tm_year; | |
+ #else | |
+ year = tm.tm_year - 100; | |
+ #endif | |
+ | |
+ #if defined(CONFIG_CPU_S5PV210) | |
+ if (year < 0 || year >= 1000) { | |
+ dev_err(&pdev->dev, "rtc only supports 0 ~ 999 years\n"); | |
+ #else | |
+ if (year < 0 || year >= 100) { | |
+ dev_err(&pdev->dev, "rtc only supports 100 years\n"); | |
+ #endif | |
+ /* Set the default time. 2010:1:1:12:0:0 */ | |
+ year = 110; | |
+ tm.tm_mon = 0; | |
+ tm.tm_mday = 1; | |
+ tm.tm_hour = 12; | |
+ tm.tm_min = 0; | |
+ tm.tm_sec = 0; | |
+ } | |
+ | |
+ s3c_rtc_enable(&pdev->dev, 1); | |
+ | |
+ writeb(bin2bcd(tm.tm_sec), s3c_rtc_base + S3C2410_RTCSEC); | |
+ writeb(bin2bcd(tm.tm_min), s3c_rtc_base + S3C2410_RTCMIN); | |
+ writeb(bin2bcd(tm.tm_hour), s3c_rtc_base + S3C2410_RTCHOUR); | |
+ writeb(bin2bcd(tm.tm_mday), s3c_rtc_base + S3C2410_RTCDATE); | |
+ writeb(bin2bcd(tm.tm_mon + 1), s3c_rtc_base + S3C2410_RTCMON); | |
+ | |
+ #if defined(CONFIG_CPU_S5PV210) | |
+ year100 = year/100; | |
+ year = year%100; | |
+ year = bin2bcd(year) | ((bin2bcd(year100)) << 8); | |
+ year = (0x00000fff & year); | |
+ pr_debug("year %x\n", year); | |
+ writel(year, s3c_rtc_base + S3C2410_RTCYEAR); | |
+ #else | |
+ writeb(bin2bcd(year), s3c_rtc_base + S3C2410_RTCYEAR); | |
+ #endif | |
+ | |
+ /* check rtc time */ | |
+ for (bcd_loop = S3C2410_RTCSEC; bcd_loop <= S3C2410_RTCYEAR | |
+ ; bcd_loop += 0x4) { | |
+ bcd_tmp = readw(s3c_rtc_base + bcd_loop); | |
+ if (((bcd_tmp & 0xf) > 0x9) || ((bcd_tmp & 0xf0) > 0x90)) | |
+ writew(0, s3c_rtc_base + bcd_loop); | |
+ } | |
+ | |
+ s3c_rtc_enable(&pdev->dev, 0); | |
+ | |
/* register RTC and exit */ | |
rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops, | |
*************** | |
*** 503,510 **** | |
goto err_nortc; | |
} | |
- s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data; | |
- | |
if (s3c_rtc_cpu_type == TYPE_S3C64XX) | |
rtc->max_user_freq = 32768; | |
else | |
--- 726,731 ---- | |
*************** | |
*** 517,523 **** | |
return 0; | |
err_nortc: | |
- s3c_rtc_enable(pdev, 0); | |
iounmap(s3c_rtc_base); | |
err_nomap: | |
--- 738,743 ---- | |
*************** | |
*** 531,547 **** | |
/* RTC Power management control */ | |
! static int ticnt_save, ticnt_en_save; | |
static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state) | |
{ | |
/* save TICNT for anyone using periodic interrupts */ | |
! ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT); | |
! if (s3c_rtc_cpu_type == TYPE_S3C64XX) { | |
! ticnt_en_save = readb(s3c_rtc_base + S3C2410_RTCCON); | |
! ticnt_en_save &= S3C64XX_RTCCON_TICEN; | |
! } | |
! s3c_rtc_enable(pdev, 0); | |
if (device_may_wakeup(&pdev->dev)) | |
enable_irq_wake(s3c_rtc_alarmno); | |
--- 751,765 ---- | |
/* RTC Power management control */ | |
! static int ticnt_save; | |
static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state) | |
{ | |
+ struct timespec time; | |
+ | |
+ time.tv_nsec = 0; | |
/* save TICNT for anyone using periodic interrupts */ | |
! ticnt_save = readl(s3c_rtc_base + S3C2410_TICNT); | |
if (device_may_wakeup(&pdev->dev)) | |
enable_irq_wake(s3c_rtc_alarmno); | |
*************** | |
*** 551,564 **** | |
static int s3c_rtc_resume(struct platform_device *pdev) | |
{ | |
! unsigned int tmp; | |
! s3c_rtc_enable(pdev, 1); | |
! writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT); | |
! if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) { | |
! tmp = readb(s3c_rtc_base + S3C2410_RTCCON); | |
! writeb(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON); | |
! } | |
if (device_may_wakeup(&pdev->dev)) | |
disable_irq_wake(s3c_rtc_alarmno); | |
--- 769,779 ---- | |
static int s3c_rtc_resume(struct platform_device *pdev) | |
{ | |
! struct timespec time; | |
! time.tv_nsec = 0; | |
! | |
! writel(ticnt_save, s3c_rtc_base + S3C2410_TICNT); | |
if (device_may_wakeup(&pdev->dev)) | |
disable_irq_wake(s3c_rtc_alarmno); | |
*************** | |
*** 595,601 **** | |
}, | |
}; | |
! static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n"; | |
static int __init s3c_rtc_init(void) | |
{ | |
--- 810,817 ---- | |
}, | |
}; | |
! static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 " | |
! "Simtec Electronics\n"; | |
static int __init s3c_rtc_init(void) | |
{ | |
Only in 1/drivers/rtc: rtc-s3c.h | |
Only in 2/drivers/scsi/aic7xxx: .gitignore | |
Only in 2/drivers/scsi: .gitignore | |
Only in 1/drivers: sensor | |
diff -crB 2/drivers/serial/Kconfig 1/drivers/serial/Kconfig | |
*** 2/drivers/serial/Kconfig 2012-09-24 11:44:01.194830020 +0530 | |
--- 1/drivers/serial/Kconfig 2011-05-18 12:35:07.000000000 +0530 | |
*************** | |
*** 544,550 **** | |
config SERIAL_S5PV210 | |
tristate "Samsung S5PV210 Serial port support" | |
! depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442) | |
select SERIAL_SAMSUNG_UARTS_4 if CPU_S5PV210 | |
default y | |
help | |
--- 544,550 ---- | |
config SERIAL_S5PV210 | |
tristate "Samsung S5PV210 Serial port support" | |
! depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442) && SERIAL_SAMSUNG_CONSOLE | |
select SERIAL_SAMSUNG_UARTS_4 if CPU_S5PV210 | |
default y | |
help | |
diff -crB 2/drivers/serial/s5pv210.c 1/drivers/serial/s5pv210.c | |
*** 2/drivers/serial/s5pv210.c 2012-09-24 11:44:01.194830020 +0530 | |
--- 1/drivers/serial/s5pv210.c 2011-05-18 12:35:07.000000000 +0530 | |
*************** | |
*** 32,38 **** | |
if (strcmp(clk->name, "pclk") == 0) | |
ucon &= ~S5PV210_UCON_CLKMASK; | |
! else if (strcmp(clk->name, "uclk1") == 0) | |
ucon |= S5PV210_UCON_CLKMASK; | |
else { | |
printk(KERN_ERR "unknown clock source %s\n", clk->name); | |
--- 32,38 ---- | |
if (strcmp(clk->name, "pclk") == 0) | |
ucon &= ~S5PV210_UCON_CLKMASK; | |
! else if (strcmp(clk->name, "sclk") == 0) | |
ucon |= S5PV210_UCON_CLKMASK; | |
else { | |
printk(KERN_ERR "unknown clock source %s\n", clk->name); | |
*************** | |
*** 56,62 **** | |
clk->name = "pclk"; | |
break; | |
case S5PV210_UCON_UCLK: | |
! clk->name = "uclk1"; | |
break; | |
} | |
--- 56,62 ---- | |
clk->name = "pclk"; | |
break; | |
case S5PV210_UCON_UCLK: | |
! clk->name = "sclk"; | |
break; | |
} | |
diff -crB 2/drivers/serial/samsung.c 1/drivers/serial/samsung.c | |
*** 2/drivers/serial/samsung.c 2012-09-24 11:44:01.194830020 +0530 | |
--- 1/drivers/serial/samsung.c 2011-05-18 12:35:07.000000000 +0530 | |
*************** | |
*** 81,87 **** | |
static int s3c24xx_serial_txempty_nofifo(struct uart_port *port) | |
{ | |
! return (rd_regl(port, S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE); | |
} | |
static void s3c24xx_serial_rx_enable(struct uart_port *port) | |
--- 81,87 ---- | |
static int s3c24xx_serial_txempty_nofifo(struct uart_port *port) | |
{ | |
! return rd_regl(port, S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE; | |
} | |
static void s3c24xx_serial_rx_enable(struct uart_port *port) | |
*************** | |
*** 163,174 **** | |
{ | |
} | |
! static inline struct s3c24xx_uart_info *s3c24xx_port_to_info(struct uart_port *port) | |
{ | |
return to_ourport(port)->info; | |
} | |
! static inline struct s3c2410_uartcfg *s3c24xx_port_to_cfg(struct uart_port *port) | |
{ | |
if (port->dev == NULL) | |
return NULL; | |
--- 163,176 ---- | |
{ | |
} | |
! static inline struct | |
! s3c24xx_uart_info *s3c24xx_port_to_info(struct uart_port *port) | |
{ | |
return to_ourport(port)->info; | |
} | |
! static inline struct | |
! s3c2410_uartcfg *s3c24xx_port_to_cfg(struct uart_port *port) | |
{ | |
if (port->dev == NULL) | |
return NULL; | |
*************** | |
*** 243,249 **** | |
dbg("break!\n"); | |
port->icount.brk++; | |
if (uart_handle_break(port)) | |
! goto ignore_char; | |
} | |
if (uerstat & S3C2410_UERSTAT_FRAME) | |
--- 245,251 ---- | |
dbg("break!\n"); | |
port->icount.brk++; | |
if (uart_handle_break(port)) | |
! goto ignore_char; | |
} | |
if (uerstat & S3C2410_UERSTAT_FRAME) | |
*************** | |
*** 293,299 **** | |
/* if there isnt anything more to transmit, or the uart is now | |
* stopped, disable the uart and exit | |
! */ | |
if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | |
s3c24xx_serial_stop_tx(port); | |
--- 295,301 ---- | |
/* if there isnt anything more to transmit, or the uart is now | |
* stopped, disable the uart and exit | |
! */ | |
if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | |
s3c24xx_serial_stop_tx(port); | |
*************** | |
*** 305,312 **** | |
while (!uart_circ_empty(xmit) && count-- > 0) { | |
if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull) | |
break; | |
! | |
! wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]); | |
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
port->icount.tx++; | |
} | |
--- 307,313 ---- | |
while (!uart_circ_empty(xmit) && count-- > 0) { | |
if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull) | |
break; | |
! wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]); | |
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
port->icount.tx++; | |
} | |
*************** | |
*** 352,357 **** | |
--- 353,366 ---- | |
static void s3c24xx_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
{ | |
/* todo - possibly remove AFC and do manual CTS */ | |
+ unsigned int umcon = 0; | |
+ umcon = rd_regl(port, S3C2410_UMCON); | |
+ if (mctrl & TIOCM_RTS) | |
+ umcon |= S3C2410_UMCOM_AFC; | |
+ else | |
+ umcon &= ~S3C2410_UMCOM_AFC; | |
+ | |
+ wr_regl(port, S3C2410_UMCON, umcon); | |
} | |
static void s3c24xx_serial_break_ctl(struct uart_port *port, int break_state) | |
*************** | |
*** 397,403 **** | |
int ret; | |
dbg("s3c24xx_serial_startup: port=%p (%08lx,%p)\n", | |
! port->mapbase, port->membase); | |
rx_enabled(port) = 1; | |
--- 406,412 ---- | |
int ret; | |
dbg("s3c24xx_serial_startup: port=%p (%08lx,%p)\n", | |
! port, port->mapbase, port->membase); | |
rx_enabled(port) = 1; | |
*************** | |
*** 448,453 **** | |
--- 457,465 ---- | |
switch (level) { | |
case 3: | |
+ disable_irq(ourport->tx_irq); | |
+ disable_irq(ourport->rx_irq); | |
+ | |
if (!IS_ERR(ourport->baudclk) && ourport->baudclk != NULL) | |
clk_disable(ourport->baudclk); | |
*************** | |
*** 460,465 **** | |
--- 472,479 ---- | |
if (!IS_ERR(ourport->baudclk) && ourport->baudclk != NULL) | |
clk_enable(ourport->baudclk); | |
+ enable_irq(ourport->tx_irq); | |
+ enable_irq(ourport->rx_irq); | |
break; | |
default: | |
printk(KERN_ERR "s3c24xx_serial: unknown pm %d\n", level); | |
*************** | |
*** 676,683 **** | |
/* | |
* Ask the core to calculate the divisor for us. | |
*/ | |
- baud = uart_get_baud_rate(port, termios, old, 0, 115200*8); | |
if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) | |
quot = port->custom_divisor; | |
--- 690,697 ---- | |
/* | |
* Ask the core to calculate the divisor for us. | |
*/ | |
+ baud = uart_get_baud_rate(port, termios, old, 0, 3000000); | |
if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) | |
quot = port->custom_divisor; | |
*************** | |
*** 773,779 **** | |
*/ | |
port->read_status_mask = S3C2410_UERSTAT_OVERRUN; | |
if (termios->c_iflag & INPCK) | |
! port->read_status_mask |= S3C2410_UERSTAT_FRAME | S3C2410_UERSTAT_PARITY; | |
/* | |
* Which character status flags should we ignore? | |
--- 787,794 ---- | |
*/ | |
port->read_status_mask = S3C2410_UERSTAT_OVERRUN; | |
if (termios->c_iflag & INPCK) | |
! port->read_status_mask |= S3C2410_UERSTAT_FRAME | |
! | S3C2410_UERSTAT_PARITY; | |
/* | |
* Which character status flags should we ignore? | |
*************** | |
*** 845,856 **** | |
return 0; | |
} | |
#ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE | |
static struct console s3c24xx_serial_console; | |
! #define S3C24XX_SERIAL_CONSOLE &s3c24xx_serial_console | |
#else | |
#define S3C24XX_SERIAL_CONSOLE NULL | |
#endif | |
--- 860,879 ---- | |
return 0; | |
} | |
+ static void | |
+ s3c24xx_serial_wake_peer(struct uart_port *port) | |
+ { | |
+ struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port); | |
+ | |
+ if (cfg->wake_peer) | |
+ cfg->wake_peer(port); | |
+ } | |
#ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE | |
static struct console s3c24xx_serial_console; | |
! #define S3C24XX_SERIAL_CONSOLE (&s3c24xx_serial_console) | |
#else | |
#define S3C24XX_SERIAL_CONSOLE NULL | |
#endif | |
*************** | |
*** 873,878 **** | |
--- 896,902 ---- | |
.request_port = s3c24xx_serial_request_port, | |
.config_port = s3c24xx_serial_config_port, | |
.verify_port = s3c24xx_serial_verify_port, | |
+ .wake_peer = s3c24xx_serial_wake_peer, | |
}; | |
*************** | |
*** 886,892 **** | |
.minor = S3C24XX_SERIAL_MINOR, | |
}; | |
! static struct s3c24xx_uart_port s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS] = { | |
[0] = { | |
.port = { | |
.lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[0].port.lock), | |
--- 910,917 ---- | |
.minor = S3C24XX_SERIAL_MINOR, | |
}; | |
! static struct s3c24xx_uart_port | |
! s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS] = { | |
[0] = { | |
.port = { | |
.lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[0].port.lock), | |
*************** | |
*** 1014,1020 **** | |
return 0; | |
} | |
! static inline int s3c24xx_serial_cpufreq_register(struct s3c24xx_uart_port *port) | |
{ | |
port->freq_transition.notifier_call = s3c24xx_serial_cpufreq_transition; | |
--- 1039,1046 ---- | |
return 0; | |
} | |
! static inline int | |
! s3c24xx_serial_cpufreq_register(struct s3c24xx_uart_port *port) | |
{ | |
port->freq_transition.notifier_call = s3c24xx_serial_cpufreq_transition; | |
*************** | |
*** 1022,1040 **** | |
CPUFREQ_TRANSITION_NOTIFIER); | |
} | |
! static inline void s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *port) | |
{ | |
cpufreq_unregister_notifier(&port->freq_transition, | |
CPUFREQ_TRANSITION_NOTIFIER); | |
} | |
#else | |
! static inline int s3c24xx_serial_cpufreq_register(struct s3c24xx_uart_port *port) | |
{ | |
return 0; | |
} | |
! static inline void s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *port) | |
{ | |
} | |
#endif | |
--- 1048,1069 ---- | |
CPUFREQ_TRANSITION_NOTIFIER); | |
} | |
! static inline void | |
! s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *port) | |
{ | |
cpufreq_unregister_notifier(&port->freq_transition, | |
CPUFREQ_TRANSITION_NOTIFIER); | |
} | |
#else | |
! static inline int | |
! s3c24xx_serial_cpufreq_register(struct s3c24xx_uart_port *port) | |
{ | |
return 0; | |
} | |
! static inline void | |
! s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *port) | |
{ | |
} | |
#endif | |
*************** | |
*** 1105,1111 **** | |
ourport->rx_irq = ret; | |
ourport->tx_irq = ret + 1; | |
} | |
! | |
ret = platform_get_irq(platdev, 1); | |
if (ret > 0) | |
ourport->tx_irq = ret; | |
--- 1134,1140 ---- | |
ourport->rx_irq = ret; | |
ourport->tx_irq = ret + 1; | |
} | |
! | |
ret = platform_get_irq(platdev, 1); | |
if (ret > 0) | |
ourport->tx_irq = ret; | |
*************** | |
*** 1118,1123 **** | |
--- 1147,1155 ---- | |
/* reset the fifos (and setup the uart) */ | |
s3c24xx_serial_resetport(port, cfg); | |
+ | |
+ s3c_setup_uart_cfg_gpio(cfg->hwport); | |
+ | |
return 0; | |
} | |
*************** | |
*** 1135,1152 **** | |
/* Device driver serial port probe */ | |
- static int probe_index; | |
- | |
int s3c24xx_serial_probe(struct platform_device *dev, | |
struct s3c24xx_uart_info *info) | |
{ | |
struct s3c24xx_uart_port *ourport; | |
int ret; | |
! dbg("s3c24xx_serial_probe(%p, %p) %d\n", dev, info, probe_index); | |
! ourport = &s3c24xx_serial_ports[probe_index]; | |
! probe_index++; | |
dbg("%s: initialising port %p...\n", __func__, ourport); | |
--- 1167,1186 ---- | |
/* Device driver serial port probe */ | |
int s3c24xx_serial_probe(struct platform_device *dev, | |
struct s3c24xx_uart_info *info) | |
{ | |
struct s3c24xx_uart_port *ourport; | |
int ret; | |
! dbg("s3c24xx_serial_probe(%p, %p) %d\n", dev, info, dev->id); | |
! | |
! if (dev->id >= ARRAY_SIZE(s3c24xx_serial_ports)) { | |
! dev_err(&dev->dev, "unsupported device id %d\n", dev->id); | |
! return -ENODEV; | |
! } | |
! ourport = &s3c24xx_serial_ports[dev->id]; | |
dbg("%s: initialising port %p...\n", __func__, ourport); | |
*************** | |
*** 1193,1204 **** | |
#ifdef CONFIG_PM | |
! static int s3c24xx_serial_suspend(struct platform_device *dev, pm_message_t state) | |
{ | |
struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); | |
! if (port) | |
uart_suspend_port(&s3c24xx_uart_drv, port); | |
return 0; | |
} | |
--- 1225,1260 ---- | |
#ifdef CONFIG_PM | |
! #include <plat/pm.h> | |
! | |
! #define SAVE_UART(va) \ | |
! SAVE_ITEM((va) + S3C2410_ULCON), \ | |
! SAVE_ITEM((va) + S3C2410_UCON), \ | |
! SAVE_ITEM((va) + S3C2410_UFCON), \ | |
! SAVE_ITEM((va) + S3C2410_UMCON), \ | |
! SAVE_ITEM((va) + S3C2410_UBRDIV), \ | |
! SAVE_ITEM((va) + S3C2410_UDIVSLOT), \ | |
! SAVE_ITEM((va) + S3C2410_UINTMSK) | |
! | |
! static struct sleep_save uart_save[] = { | |
! SAVE_UART(S3C_VA_UARTx(0)), | |
! SAVE_UART(S3C_VA_UARTx(1)), | |
! SAVE_UART(S3C_VA_UARTx(2)), | |
! SAVE_UART(S3C_VA_UARTx(3)), | |
! }; | |
! | |
! #define SAVE_UART_PORT (ARRAY_SIZE(uart_save) / 4) | |
! | |
! static int | |
! s3c24xx_serial_suspend(struct platform_device *dev, pm_message_t state) | |
{ | |
struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); | |
! if (port) { | |
uart_suspend_port(&s3c24xx_uart_drv, port); | |
+ s3c_pm_do_save(uart_save + port->line * SAVE_UART_PORT, | |
+ SAVE_UART_PORT); | |
+ } | |
return 0; | |
} | |
*************** | |
*** 1212,1218 **** | |
clk_enable(ourport->clk); | |
s3c24xx_serial_resetport(port, s3c24xx_port_to_cfg(port)); | |
clk_disable(ourport->clk); | |
! | |
uart_resume_port(&s3c24xx_uart_drv, port); | |
} | |
--- 1268,1275 ---- | |
clk_enable(ourport->clk); | |
s3c24xx_serial_resetport(port, s3c24xx_port_to_cfg(port)); | |
clk_disable(ourport->clk); | |
! s3c_pm_do_restore(uart_save + port->line * SAVE_UART_PORT, | |
! SAVE_UART_PORT); | |
uart_resume_port(&s3c24xx_uart_drv, port); | |
} | |
*************** | |
*** 1296,1302 **** | |
s3c24xx_serial_console_write(struct console *co, const char *s, | |
unsigned int count) | |
{ | |
! uart_console_write(cons_uart, s, count, s3c24xx_serial_console_putchar); | |
} | |
static void __init | |
--- 1352,1358 ---- | |
s3c24xx_serial_console_write(struct console *co, const char *s, | |
unsigned int count) | |
{ | |
! uart_console_write(cons_uart, s, count, s3c24xx_serial_console_putchar); | |
} | |
static void __init | |
*************** | |
*** 1384,1392 **** | |
platdev_ptr = s3c24xx_uart_devs; | |
! for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++, ptr++, platdev_ptr++) { | |
s3c24xx_serial_init_port(ptr, info[i], *platdev_ptr); | |
- } | |
return 0; | |
} | |
--- 1440,1447 ---- | |
platdev_ptr = s3c24xx_uart_devs; | |
! for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++, ptr++, platdev_ptr++) | |
s3c24xx_serial_init_port(ptr, info[i], *platdev_ptr); | |
return 0; | |
} | |
diff -crB 2/drivers/serial/samsung.h 1/drivers/serial/samsung.h | |
*** 2/drivers/serial/samsung.h 2012-09-24 11:44:01.194830020 +0530 | |
--- 1/drivers/serial/samsung.h 2011-05-18 12:35:07.000000000 +0530 | |
*************** | |
*** 57,63 **** | |
/* conversion functions */ | |
#define s3c24xx_dev_to_port(__dev) (struct uart_port *)dev_get_drvdata(__dev) | |
! #define s3c24xx_dev_to_cfg(__dev) (struct s3c2410_uartcfg *)((__dev)->platform_data) | |
/* register access controls */ | |
--- 57,64 ---- | |
/* conversion functions */ | |
#define s3c24xx_dev_to_port(__dev) (struct uart_port *)dev_get_drvdata(__dev) | |
! #define s3c24xx_dev_to_cfg(__dev) \ | |
! (struct s3c2410_uartcfg *)((__dev)->platform_data) | |
/* register access controls */ | |
*************** | |
*** 80,85 **** | |
--- 81,88 ---- | |
extern int s3c24xx_serial_init(struct platform_driver *drv, | |
struct s3c24xx_uart_info *info); | |
+ extern void s3c_setup_uart_cfg_gpio(unsigned char port); | |
+ | |
#ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE | |
#define s3c24xx_console_init(__drv, __inf) \ | |
*************** | |
*** 96,102 **** | |
console_initcall(s3c_serial_console_init) | |
#else | |
! #define s3c24xx_console_init(drv, inf) extern void no_console(void) | |
#endif | |
#ifdef CONFIG_SERIAL_SAMSUNG_DEBUG | |
--- 99,105 ---- | |
console_initcall(s3c_serial_console_init) | |
#else | |
! #define s3c24xx_console_init(drv, inf) void no_console(void) {} | |
#endif | |
#ifdef CONFIG_SERIAL_SAMSUNG_DEBUG | |
diff -crB 2/drivers/serial/serial_core.c 1/drivers/serial/serial_core.c | |
*** 2/drivers/serial/serial_core.c 2012-09-24 11:44:01.194830020 +0530 | |
--- 1/drivers/serial/serial_core.c 2011-05-18 12:35:07.000000000 +0530 | |
*************** | |
*** 94,99 **** | |
--- 94,102 ---- | |
struct uart_state *state = tty->driver_data; | |
struct uart_port *port = state->uart_port; | |
+ if (port->ops->wake_peer) | |
+ port->ops->wake_peer(port); | |
+ | |
if (!uart_circ_empty(&state->xmit) && state->xmit.buf && | |
!tty->stopped && !tty->hw_stopped) | |
port->ops->start_tx(port); | |
diff -crB 2/drivers/spi/spi_bitbang.c 1/drivers/spi/spi_bitbang.c | |
*** 2/drivers/spi/spi_bitbang.c 2012-09-24 11:44:02.094813190 +0530 | |
--- 1/drivers/spi/spi_bitbang.c 2011-05-18 12:35:07.000000000 +0530 | |
*************** | |
*** 292,298 **** | |
cs_change = 1; | |
status = 0; | |
! list_for_each_entry (t, &m->transfers, transfer_list) { | |
/* override speed or wordsize? */ | |
if (t->speed_hz || t->bits_per_word) | |
--- 292,298 ---- | |
cs_change = 1; | |
status = 0; | |
! list_for_each_entry(t, &m->transfers, transfer_list) { | |
/* override speed or wordsize? */ | |
if (t->speed_hz || t->bits_per_word) | |
*************** | |
*** 452,458 **** | |
INIT_LIST_HEAD(&bitbang->queue); | |
if (!bitbang->master->mode_bits) | |
! bitbang->master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags; | |
if (!bitbang->master->transfer) | |
bitbang->master->transfer = spi_bitbang_transfer; | |
--- 452,459 ---- | |
INIT_LIST_HEAD(&bitbang->queue); | |
if (!bitbang->master->mode_bits) | |
! bitbang->master->mode_bits = SPI_CPOL | SPI_CPHA | |
! | bitbang->flags; | |
if (!bitbang->master->transfer) | |
bitbang->master->transfer = spi_bitbang_transfer; | |
diff -crB 2/drivers/spi/spi_gpio.c 1/drivers/spi/spi_gpio.c | |
*** 2/drivers/spi/spi_gpio.c 2012-09-24 11:44:02.094813190 +0530 | |
--- 1/drivers/spi/spi_gpio.c 2011-05-18 12:35:07.000000000 +0530 | |
*************** | |
*** 88,94 **** | |
/*----------------------------------------------------------------------*/ | |
! static inline const struct spi_gpio_platform_data * __pure | |
spi_to_pdata(const struct spi_device *spi) | |
{ | |
const struct spi_bitbang *bang; | |
--- 88,94 ---- | |
/*----------------------------------------------------------------------*/ | |
! static inline const struct spi_gpio_platform_data *__pure | |
spi_to_pdata(const struct spi_device *spi) | |
{ | |
const struct spi_bitbang *bang; | |
*************** | |
*** 114,120 **** | |
static inline int getmiso(const struct spi_device *spi) | |
{ | |
! return !!gpio_get_value(SPI_MISO_GPIO); | |
} | |
#undef pdata | |
--- 114,123 ---- | |
static inline int getmiso(const struct spi_device *spi) | |
{ | |
! if (gpio_is_valid(SPI_MISO_GPIO)) | |
! return !!gpio_get_value(SPI_MISO_GPIO); | |
! else | |
! return 0; | |
} | |
#undef pdata | |
*************** | |
*** 242,250 **** | |
if (value) | |
goto done; | |
! value = spi_gpio_alloc(SPI_MISO_GPIO, label, true); | |
! if (value) | |
! goto free_mosi; | |
value = spi_gpio_alloc(SPI_SCK_GPIO, label, false); | |
if (value) | |
--- 245,255 ---- | |
if (value) | |
goto done; | |
! if (gpio_is_valid(SPI_MISO_GPIO)) { | |
! value = spi_gpio_alloc(SPI_MISO_GPIO, label, true); | |
! if (value) | |
! goto free_mosi; | |
! } | |
value = spi_gpio_alloc(SPI_SCK_GPIO, label, false); | |
if (value) | |
*************** | |
*** 307,313 **** | |
if (status < 0) { | |
spi_master_put(spi_gpio->bitbang.master); | |
gpio_free: | |
! gpio_free(SPI_MISO_GPIO); | |
gpio_free(SPI_MOSI_GPIO); | |
gpio_free(SPI_SCK_GPIO); | |
spi_master_put(master); | |
--- 312,319 ---- | |
if (status < 0) { | |
spi_master_put(spi_gpio->bitbang.master); | |
gpio_free: | |
! if (gpio_is_valid(SPI_MISO_GPIO)) | |
! gpio_free(SPI_MISO_GPIO); | |
gpio_free(SPI_MOSI_GPIO); | |
gpio_free(SPI_SCK_GPIO); | |
spi_master_put(master); | |
*************** | |
*** 331,337 **** | |
platform_set_drvdata(pdev, NULL); | |
! gpio_free(SPI_MISO_GPIO); | |
gpio_free(SPI_MOSI_GPIO); | |
gpio_free(SPI_SCK_GPIO); | |
--- 337,344 ---- | |
platform_set_drvdata(pdev, NULL); | |
! if (gpio_is_valid(SPI_MISO_GPIO)) | |
! gpio_free(SPI_MISO_GPIO); | |
gpio_free(SPI_MOSI_GPIO); | |
gpio_free(SPI_SCK_GPIO); | |
Only in 1/drivers/staging: android | |
diff -crB 2/drivers/staging/Kconfig 1/drivers/staging/Kconfig | |
*** 2/drivers/staging/Kconfig 2012-09-24 11:44:02.134812432 +0530 | |
--- 1/drivers/staging/Kconfig 2011-05-18 12:35:07.000000000 +0530 | |
*************** | |
*** 81,86 **** | |
--- 81,88 ---- | |
source "drivers/staging/frontier/Kconfig" | |
+ source "drivers/staging/android/Kconfig" | |
+ | |
source "drivers/staging/dream/Kconfig" | |
source "drivers/staging/pohmelfs/Kconfig" | |
diff -crB 2/drivers/staging/Makefile 1/drivers/staging/Makefile | |
*** 2/drivers/staging/Makefile 2012-09-24 11:44:02.290809484 +0530 | |
--- 1/drivers/staging/Makefile 2011-05-18 12:35:07.000000000 +0530 | |
*************** | |
*** 23,28 **** | |
--- 23,29 ---- | |
obj-$(CONFIG_RTL8192U) += rtl8192u/ | |
obj-$(CONFIG_RTL8192E) += rtl8192e/ | |
obj-$(CONFIG_TRANZPORT) += frontier/ | |
+ obj-$(CONFIG_ANDROID) += android/ | |
obj-$(CONFIG_DREAM) += dream/ | |
obj-$(CONFIG_POHMELFS) += pohmelfs/ | |
obj-$(CONFIG_IDE_PHISON) += phison/ | |
Only in 1/drivers: switch | |
Only in 1/drivers: tfsr | |
Only in 1/drivers/usb/gadget: android.c | |
diff -crB 2/drivers/usb/gadget/composite.c 1/drivers/usb/gadget/composite.c | |
*** 2/drivers/usb/gadget/composite.c 2012-09-24 11:44:01.210829719 +0530 | |
--- 1/drivers/usb/gadget/composite.c 2011-05-18 12:35:13.000000000 +0530 | |
*************** | |
*** 38,43 **** | |
--- 38,111 ---- | |
/* big enough to hold our biggest descriptor */ | |
#define USB_BUFSIZ 1024 | |
+ #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
+ /* soonyong.cho : This is refered from S1. | |
+ * This code must be moved in mtp config function. | |
+ */ | |
+ | |
+ #include <mach/map.h> | |
+ #include <plat/regs-otg.h> | |
+ | |
+ struct os_string_descriptor_set { | |
+ char bLength; | |
+ char bDescType; | |
+ unsigned char qwsignature[14]; | |
+ char bMS_VendorCode; | |
+ char bPad; | |
+ } __attribute__ ((packed)); | |
+ | |
+ typedef struct os_string_descriptor_set os_string_descriptor_set; | |
+ #endif | |
+ | |
+ | |
+ /* | |
+ * Debugging macro and defines | |
+ */ | |
+ #if 0 | |
+ #define CSY_DEBUG | |
+ #define CSY_MORE_DEBUG | |
+ #define CSY_DEBUG2 | |
+ | |
+ #define CSY_DEBUG_ESS | |
+ #endif | |
+ | |
+ #ifdef CSY_DEBUG | |
+ # ifdef CSY_MORE_DEBUG | |
+ # define CSY_DBG(fmt, args...) printk(KERN_INFO "usb %s:%d "fmt, __func__, __LINE__, ##args) | |
+ # else | |
+ # define CSY_DBG(fmt, args...) printk(KERN_INFO "usb "fmt, ##args) | |
+ # endif | |
+ #else /* DO NOT PRINT LOG */ | |
+ # define CSY_DBG(fmt, args...) do { } while (0) | |
+ #endif /* CSY_DEBUG */ | |
+ | |
+ #ifdef CSY_DEBUG2 | |
+ # ifdef CSY_MORE_DEBUG | |
+ # define CSY_DBG2(fmt, args...) printk(KERN_INFO "usb %s:%d "fmt, __func__, __LINE__, ##args) | |
+ # else | |
+ # define CSY_DBG2(fmt, args...) printk(KERN_INFO "usb "fmt, ##args) | |
+ # endif | |
+ #else /* DO NOT PRINT LOG */ | |
+ # define CSY_DBG2(fmt, args...) do { } while (0) | |
+ #endif /* CSY_DEBUG2 */ | |
+ | |
+ #ifdef CSY_DEBUG_ESS | |
+ # ifdef CSY_MORE_DEBUG | |
+ # define CSY_DBG_ESS(fmt, args...) printk(KERN_INFO "usb %s:%d "fmt, __func__, __LINE__, ##args) | |
+ # else | |
+ # define CSY_DBG_ESS(fmt, args...) printk(KERN_INFO "usb "fmt, ##args) | |
+ # endif | |
+ #else /* DO NOT PRINT LOG */ | |
+ # define CSY_DBG_ESS(fmt, args...) do { } while (0) | |
+ #endif /* CSY_DEBUG_ESS */ | |
+ | |
+ #ifdef CSY_DEBUG | |
+ #undef DBG | |
+ # define DBG(devvalue, fmt, args...) \ | |
+ printk(KERN_INFO "usb %s:%d "fmt, __func__, __LINE__, ##args) | |
+ #endif | |
+ | |
+ | |
static struct usb_composite_driver *composite; | |
/* Some systems will need runtime overrides for the product identifers | |
*************** | |
*** 71,76 **** | |
--- 139,201 ---- | |
/*-------------------------------------------------------------------------*/ | |
+ static ssize_t enable_show(struct device *dev, struct device_attribute *attr, | |
+ char *buf) | |
+ { | |
+ struct usb_function *f = dev_get_drvdata(dev); | |
+ CSY_DBG2("\n"); | |
+ return sprintf(buf, "%d\n", !f->disabled); | |
+ } | |
+ | |
+ static ssize_t enable_store( | |
+ struct device *dev, struct device_attribute *attr, | |
+ const char *buf, size_t size) | |
+ { | |
+ struct usb_function *f = dev_get_drvdata(dev); | |
+ struct usb_composite_driver *driver = f->config->cdev->driver; | |
+ int value; | |
+ CSY_DBG2("\n"); | |
+ | |
+ sscanf(buf, "%d", &value); | |
+ if (driver->enable_function) | |
+ driver->enable_function(f, value); | |
+ else | |
+ usb_function_set_enabled(f, value); | |
+ | |
+ return size; | |
+ } | |
+ | |
+ static DEVICE_ATTR(enable, S_IRUGO | S_IWUSR, enable_show, enable_store); | |
+ | |
+ void usb_function_set_enabled(struct usb_function *f, int enabled) | |
+ { | |
+ f->disabled = !enabled; | |
+ CSY_DBG2("name=%s, enabled=%d\n", f->name, enabled); | |
+ kobject_uevent(&f->dev->kobj, KOBJ_CHANGE); | |
+ } | |
+ | |
+ | |
+ void usb_composite_force_reset(struct usb_composite_dev *cdev) | |
+ { | |
+ unsigned long flags; | |
+ | |
+ spin_lock_irqsave(&cdev->lock, flags); | |
+ /* force reenumeration */ | |
+ if (cdev && cdev->gadget && | |
+ cdev->gadget->speed != USB_SPEED_UNKNOWN) { | |
+ /* avoid sending a disconnect switch event until after we disconnect */ | |
+ INFO(cdev, "mute_switch is set\n"); | |
+ cdev->mute_switch = 1; | |
+ spin_unlock_irqrestore(&cdev->lock, flags); | |
+ | |
+ usb_gadget_disconnect(cdev->gadget); | |
+ msleep(10); | |
+ usb_gadget_connect(cdev->gadget); | |
+ } else { | |
+ spin_unlock_irqrestore(&cdev->lock, flags); | |
+ } | |
+ } | |
+ | |
/** | |
* usb_add_function() - add a function to a configuration | |
* @config: the configuration | |
*************** | |
*** 88,102 **** | |
int usb_add_function(struct usb_configuration *config, | |
struct usb_function *function) | |
{ | |
int value = -EINVAL; | |
! DBG(config->cdev, "adding '%s'/%p to config '%s'/%p\n", | |
function->name, function, | |
config->label, config); | |
if (!function->set_alt || !function->disable) | |
goto done; | |
function->config = config; | |
list_add_tail(&function->list, &config->functions); | |
--- 213,242 ---- | |
int usb_add_function(struct usb_configuration *config, | |
struct usb_function *function) | |
{ | |
+ struct usb_composite_dev *cdev = config->cdev; | |
int value = -EINVAL; | |
+ int index; | |
! DBG(cdev, "adding '%s'/%p to config '%s'/%p\n", | |
function->name, function, | |
config->label, config); | |
if (!function->set_alt || !function->disable) | |
goto done; | |
+ index = atomic_inc_return(&cdev->driver->function_count); | |
+ function->dev = device_create(cdev->driver->class, NULL, | |
+ MKDEV(0, index), NULL, function->name); | |
+ if (IS_ERR(function->dev)) | |
+ return PTR_ERR(function->dev); | |
+ | |
+ value = device_create_file(function->dev, &dev_attr_enable); | |
+ if (value < 0) { | |
+ device_destroy(cdev->driver->class, MKDEV(0, index)); | |
+ return value; | |
+ } | |
+ dev_set_drvdata(function->dev, function); | |
+ | |
function->config = config; | |
list_add_tail(&function->list, &config->functions); | |
*************** | |
*** 122,128 **** | |
done: | |
if (value) | |
! DBG(config->cdev, "adding '%s'/%p --> %d\n", | |
function->name, function, value); | |
return value; | |
} | |
--- 262,268 ---- | |
done: | |
if (value) | |
! DBG(cdev, "adding '%s'/%p --> %d\n", | |
function->name, function, value); | |
return value; | |
} | |
*************** | |
*** 152,157 **** | |
--- 292,298 ---- | |
unsigned long flags; | |
int status = 0; | |
+ CSY_DBG2("\n"); | |
spin_lock_irqsave(&cdev->lock, flags); | |
if (cdev->deactivations == 0) | |
*************** | |
*** 178,183 **** | |
--- 319,325 ---- | |
struct usb_composite_dev *cdev = function->config->cdev; | |
int status = 0; | |
+ CSY_DBG2("\n"); | |
spin_lock(&cdev->lock); | |
if (WARN_ON(cdev->deactivations == 0)) | |
*************** | |
*** 220,225 **** | |
--- 362,368 ---- | |
{ | |
unsigned id = config->next_interface_id; | |
+ CSY_DBG2("\n"); | |
if (id < MAX_CONFIG_INTERFACES) { | |
config->interface[id] = function; | |
config->next_interface_id = id + 1; | |
*************** | |
*** 232,248 **** | |
enum usb_device_speed speed, void *buf, u8 type) | |
{ | |
struct usb_config_descriptor *c = buf; | |
void *next = buf + USB_DT_CONFIG_SIZE; | |
int len = USB_BUFSIZ - USB_DT_CONFIG_SIZE; | |
struct usb_function *f; | |
int status; | |
! | |
/* write the config descriptor */ | |
c = buf; | |
c->bLength = USB_DT_CONFIG_SIZE; | |
c->bDescriptorType = type; | |
! /* wTotalLength is written later */ | |
! c->bNumInterfaces = config->next_interface_id; | |
c->bConfigurationValue = config->bConfigurationValue; | |
c->iConfiguration = config->iConfiguration; | |
c->bmAttributes = USB_CONFIG_ATT_ONE | config->bmAttributes; | |
--- 375,397 ---- | |
enum usb_device_speed speed, void *buf, u8 type) | |
{ | |
struct usb_config_descriptor *c = buf; | |
+ struct usb_interface_descriptor *intf; | |
void *next = buf + USB_DT_CONFIG_SIZE; | |
int len = USB_BUFSIZ - USB_DT_CONFIG_SIZE; | |
struct usb_function *f; | |
int status; | |
! int interfaceCount = 0; | |
! u8 *dest; | |
! #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
! /* soonyong.cho : set interface number dynamically based on product function sequence. */ | |
! int i; | |
! char **product_functions = config->cdev->products->functions; | |
! #endif | |
/* write the config descriptor */ | |
c = buf; | |
c->bLength = USB_DT_CONFIG_SIZE; | |
c->bDescriptorType = type; | |
! /* wTotalLength and bNumInterfaces are written later */ | |
c->bConfigurationValue = config->bConfigurationValue; | |
c->iConfiguration = config->iConfiguration; | |
c->bmAttributes = USB_CONFIG_ATT_ONE | config->bmAttributes; | |
*************** | |
*** 257,283 **** | |
len -= status; | |
next += status; | |
} | |
! | |
! /* add each function's descriptors */ | |
! list_for_each_entry(f, &config->functions, list) { | |
! struct usb_descriptor_header **descriptors; | |
! | |
! if (speed == USB_SPEED_HIGH) | |
! descriptors = f->hs_descriptors; | |
! else | |
! descriptors = f->descriptors; | |
! if (!descriptors) | |
! continue; | |
! status = usb_descriptor_fillbuf(next, len, | |
! (const struct usb_descriptor_header **) descriptors); | |
! if (status < 0) | |
! return status; | |
! len -= status; | |
! next += status; | |
} | |
! | |
len = next - buf; | |
c->wTotalLength = cpu_to_le16(len); | |
return len; | |
} | |
--- 406,473 ---- | |
len -= status; | |
next += status; | |
} | |
! #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
! /* soonyong.cho : set interface number dynamically based on product function sequence. */ | |
! CSY_DBG("config_buf config->cdev=0x%p\n", config->cdev); | |
! for(i=0; i < config->cdev->product_num; i++) | |
! { | |
! char *product_function = *product_functions++; | |
! #endif | |
! /* add each function's descriptors */ | |
! list_for_each_entry(f, &config->functions, list) { | |
! struct usb_descriptor_header **descriptors; | |
! struct usb_descriptor_header *descriptor; | |
! #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
! /* soonyong.cho : set interface number dynamically based on product function sequence. */ | |
! CSY_DBG("i=%d config-cdev->product_num=%d, p_func=%s, c_func=%s\n", | |
! i, config->cdev->product_num, product_function, f->name); | |
! if(!strcmp(f->name, product_function)) | |
! { | |
! CSY_DBG("set interface number (%s)\n", f->name); | |
! #endif | |
! if (speed == USB_SPEED_HIGH) | |
! descriptors = f->hs_descriptors; | |
! else | |
! descriptors = f->descriptors; | |
! if (f->disabled || !descriptors || descriptors[0] == NULL) { | |
! CSY_DBG("config_buf skip %s function disabled\n",f->name); | |
! continue; | |
! } | |
! status = usb_descriptor_fillbuf(next, len, | |
! (const struct usb_descriptor_header **) descriptors); | |
! if (status < 0) | |
! return status; | |
! | |
! /* set interface numbers dynamically */ | |
! dest = next; | |
! while ((descriptor = *descriptors++) != NULL) { | |
! intf = (struct usb_interface_descriptor *)dest; | |
! if (intf->bDescriptorType == USB_DT_INTERFACE) { | |
! /* don't increment bInterfaceNumber for alternate settings */ | |
! | |
! if (intf->bAlternateSetting == 0) | |
! intf->bInterfaceNumber = interfaceCount++; | |
! else | |
! intf->bInterfaceNumber = interfaceCount - 1; | |
! CSY_DBG("config_buf %s function (interfaceCount=%d)\n",f->name, intf->bInterfaceNumber); | |
! } | |
! dest += intf->bLength; | |
! } | |
! | |
! len -= status; | |
! next += status; | |
! #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
! /* soonyong.cho : set interface number dynamically based on product function sequence. */ | |
! } | |
! #endif | |
! } | |
! #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
! /* soonyong.cho : set interface number dynamically based on product function sequence. */ | |
} | |
! #endif | |
len = next - buf; | |
c->wTotalLength = cpu_to_le16(len); | |
+ c->bNumInterfaces = interfaceCount; | |
return len; | |
} | |
*************** | |
*** 288,293 **** | |
--- 478,484 ---- | |
u8 type = w_value >> 8; | |
enum usb_device_speed speed = USB_SPEED_UNKNOWN; | |
+ CSY_DBG2("\n"); | |
if (gadget_is_dualspeed(gadget)) { | |
int hs = 0; | |
*************** | |
*** 311,318 **** | |
if (!c->fullspeed) | |
continue; | |
} | |
! if (w_value == 0) | |
return config_buf(c, speed, cdev->req->buf, type); | |
w_value--; | |
} | |
return -EINVAL; | |
--- 502,511 ---- | |
if (!c->fullspeed) | |
continue; | |
} | |
! if (w_value == 0) { | |
! CSY_DBG("c=0x%p, cdev=0x%p, cdev->req=0x%p, cdev->req->buf=0x%p\n", c, cdev, cdev->req, cdev->req->buf); | |
return config_buf(c, speed, cdev->req->buf, type); | |
+ } | |
w_value--; | |
} | |
return -EINVAL; | |
*************** | |
*** 325,330 **** | |
--- 518,524 ---- | |
unsigned count = 0; | |
int hs = 0; | |
+ CSY_DBG2("\n"); | |
if (gadget_is_dualspeed(gadget)) { | |
if (gadget->speed == USB_SPEED_HIGH) | |
hs = 1; | |
*************** | |
*** 349,354 **** | |
--- 543,549 ---- | |
{ | |
struct usb_qualifier_descriptor *qual = cdev->req->buf; | |
+ CSY_DBG2("\n"); | |
qual->bLength = sizeof(*qual); | |
qual->bDescriptorType = USB_DT_DEVICE_QUALIFIER; | |
/* POLICY: same bcdUSB and device type info at both speeds */ | |
*************** | |
*** 388,393 **** | |
--- 583,589 ---- | |
unsigned power = gadget_is_otg(gadget) ? 8 : 100; | |
int tmp; | |
+ CSY_DBG2("\n"); | |
if (cdev->config) | |
reset_config(cdev); | |
*************** | |
*** 424,429 **** | |
--- 620,627 ---- | |
if (!f) | |
break; | |
+ if (f->disabled) | |
+ continue; | |
/* | |
* Record which endpoints are used by the function. This is used | |
*************** | |
*** 463,468 **** | |
--- 661,668 ---- | |
power = c->bMaxPower ? (2 * c->bMaxPower) : CONFIG_USB_GADGET_VBUS_DRAW; | |
done: | |
usb_gadget_vbus_draw(gadget, power); | |
+ | |
+ schedule_work(&cdev->switch_work); | |
return result; | |
} | |
*************** | |
*** 508,513 **** | |
--- 708,715 ---- | |
config->next_interface_id = 0; | |
status = config->bind(config); | |
+ DBG(cdev, "config->bind(%p) status=%d\n",config, status); | |
+ | |
if (status < 0) { | |
list_del(&config->list); | |
config->cdev = NULL; | |
*************** | |
*** 559,564 **** | |
--- 761,767 ---- | |
u16 language; | |
__le16 *tmp; | |
+ CSY_DBG2("\n"); | |
while (*sp) { | |
s = *sp; | |
language = cpu_to_le16(s->language); | |
*************** | |
*** 600,605 **** | |
--- 803,809 ---- | |
struct usb_function *f; | |
int len; | |
+ CSY_DBG2("\n"); | |
/* Yes, not only is USB's I18N support probably more than most | |
* folk will ever care about ... also, it's all supported here. | |
* (Except for UTF8 support for Unicode's "Astral Planes".) | |
*************** | |
*** 637,642 **** | |
--- 841,896 ---- | |
s->bLength = 2 * (len + 1); | |
return s->bLength; | |
} | |
+ #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
+ /* soonyong.cho : This is refered from S1 | |
+ * This code must be moved in mtp config function | |
+ */ | |
+ else if (id == 0xEE) { | |
+ char **product_functions = cdev->products->functions; | |
+ int has_mtp = 0; | |
+ int i; | |
+ | |
+ CSY_DBG("mtp cmd id=0x%x)\n", id); | |
+ for(i=0; i < cdev->product_num; i++) { | |
+ char *product_function = *product_functions++; | |
+ if(!strcmp("mtp", product_function)) { | |
+ CSY_DBG("this product have mtp function (id=0x%x)\n", id); | |
+ has_mtp = 1; | |
+ } | |
+ } | |
+ | |
+ if(has_mtp == 1) { | |
+ os_string_descriptor_set output; | |
+ struct usb_string_descriptor *os_desc = buf; | |
+ | |
+ printk("this product have mtp function line = %d\n", __LINE__); | |
+ memset(os_desc, 0x00, 256); | |
+ os_desc->bDescriptorType = USB_DT_STRING; | |
+ | |
+ output.qwsignature[0] = 0x4D; | |
+ output.qwsignature[1] = 0x00; | |
+ output.qwsignature[2] = 0x53; | |
+ output.qwsignature[3] = 0x00; | |
+ output.qwsignature[4] = 0x46; | |
+ output.qwsignature[5] = 0x00; | |
+ output.qwsignature[6] = 0x54; | |
+ output.qwsignature[7] = 0x00; | |
+ output.qwsignature[8] = 0x31; | |
+ output.qwsignature[9] = 0x00; | |
+ output.qwsignature[10] = 0x30; | |
+ output.qwsignature[11] = 0x00; | |
+ output.qwsignature[12] = 0x30; | |
+ output.qwsignature[13] = 0x00; | |
+ | |
+ output.bMS_VendorCode = 0x54; | |
+ output.bPad = 0x00; | |
+ | |
+ memcpy(os_desc->wData, &output.qwsignature, sizeof(os_string_descriptor_set)); | |
+ os_desc->bLength = 0x12; | |
+ return os_desc->bLength; | |
+ } | |
+ } | |
+ #endif | |
/* Otherwise, look up and return a specified string. String IDs | |
* are device-scoped, so we look up each string table we're told | |
*************** | |
*** 691,696 **** | |
--- 945,951 ---- | |
static void composite_setup_complete(struct usb_ep *ep, struct usb_request *req) | |
{ | |
+ CSY_DBG("composite_setup_complete req->length=0x%x\n", req->length); | |
if (req->status || req->actual != req->length) | |
DBG((struct usb_composite_dev *) ep->driver_data, | |
"setup complete --> %d, %d/%d\n", | |
*************** | |
*** 717,722 **** | |
--- 972,989 ---- | |
struct usb_function *f = NULL; | |
u8 endp; | |
+ #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
+ int i; | |
+ /* soonyong.cho : Added handler to respond to host about MS OS Descriptors. | |
+ * Below compatible ID is for MTP. | |
+ * So, If you set composite included MTP, you have to respond to host about 0x54 request. | |
+ * Below handler must be moved in mtp function. | |
+ */ | |
+ char ms_descriptor[38] = { 0x00, 0x00, 0x00, 0x01, 0x04, 0x00,0x01,0x00,0x00,0x00,0x00,0x00, 0x00, 0x00, 0x00, 0x01, | |
+ 0x4D, 0x54, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; | |
+ | |
+ #endif | |
/* partial re-init of the response message; the function or the | |
* gadget might need to intercept e.g. a control-OUT completion | |
* when we delegate to it. | |
*************** | |
*** 724,746 **** | |
req->zero = 0; | |
req->complete = composite_setup_complete; | |
req->length = USB_BUFSIZ; | |
gadget->ep0->driver_data = cdev; | |
switch (ctrl->bRequest) { | |
! | |
! /* we handle all standard USB descriptors */ | |
case USB_REQ_GET_DESCRIPTOR: | |
if (ctrl->bRequestType != USB_DIR_IN) | |
goto unknown; | |
switch (w_value >> 8) { | |
case USB_DT_DEVICE: | |
cdev->desc.bNumConfigurations = | |
count_configs(cdev, USB_DT_DEVICE); | |
value = min(w_length, (u16) sizeof cdev->desc); | |
memcpy(req->buf, &cdev->desc, value); | |
break; | |
case USB_DT_DEVICE_QUALIFIER: | |
if (!gadget_is_dualspeed(gadget)) | |
break; | |
device_qual(cdev); | |
--- 991,1043 ---- | |
req->zero = 0; | |
req->complete = composite_setup_complete; | |
req->length = USB_BUFSIZ; | |
+ CSY_DBG("++setup req->length=0x%x\n", req->length); | |
gadget->ep0->driver_data = cdev; | |
switch (ctrl->bRequest) { | |
! #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
! /* soonyong.cho : Added handler to respond to host about MS OS Descriptors. | |
! * Below handler is requirement if you use MTP. | |
! * So, If you set composite included MTP, you have to respond to host about 0x54 request | |
! * Below handler must be moved in mtp function. | |
! */ | |
! case 0x54: | |
! if(cdev->products) { | |
! for(i = 0; i < cdev->product_num; i++) { | |
! if (!strcmp(cdev->products->functions[i], "mtp")) { | |
! struct usb_string_descriptor *os_func_desc = req->buf; | |
! CSY_DBG_ESS("0x54 request, mode=mtp, p_num=%d, f_index=%d\n",cdev->product_num,i); | |
! os_func_desc->bDescriptorType = 0x00; | |
! // memcpy(os_func_desc->wData, &ms_descriptor, sizeof(ms_descriptor)); | |
! memcpy(os_func_desc->wData, &ms_descriptor, 40); | |
! // value = sizeof(ms_descriptor); | |
! // os_func_desc->bLength = value; // fix for digital camera detction issue in media player mode. | |
! os_func_desc->bLength = value = 0x28; | |
! if (value >= 0) { | |
! value = min(w_length, (u16) value); | |
! } | |
! break; | |
! } | |
! } | |
! } | |
! break; | |
! | |
! #endif | |
! /* we handle all standard USB descriptors */ | |
case USB_REQ_GET_DESCRIPTOR: | |
if (ctrl->bRequestType != USB_DIR_IN) | |
goto unknown; | |
switch (w_value >> 8) { | |
case USB_DT_DEVICE: | |
+ CSY_DBG_ESS("GET_DES-DEV\n"); | |
cdev->desc.bNumConfigurations = | |
count_configs(cdev, USB_DT_DEVICE); | |
value = min(w_length, (u16) sizeof cdev->desc); | |
memcpy(req->buf, &cdev->desc, value); | |
break; | |
case USB_DT_DEVICE_QUALIFIER: | |
+ CSY_DBG("GET_DESCRIPTOR-DT_DEVICE_QUALIFIER\n"); | |
if (!gadget_is_dualspeed(gadget)) | |
break; | |
device_qual(cdev); | |
*************** | |
*** 748,764 **** | |
--- 1045,1080 ---- | |
sizeof(struct usb_qualifier_descriptor)); | |
break; | |
case USB_DT_OTHER_SPEED_CONFIG: | |
+ CSY_DBG("GET_DESCRIPTOR-DT_OTHER_SPEED_CONFIG\n"); | |
if (!gadget_is_dualspeed(gadget)) | |
break; | |
/* FALLTHROUGH */ | |
case USB_DT_CONFIG: | |
+ CSY_DBG_ESS("GET_DES-CON\n"); | |
value = config_desc(cdev, w_value); | |
if (value >= 0) | |
value = min(w_length, (u16) value); | |
break; | |
case USB_DT_STRING: | |
+ CSY_DBG2("GET_DESCRIPTOR-DT_STRING\n"); | |
value = get_string(cdev, req->buf, | |
w_index, w_value & 0xff); | |
+ | |
+ /* Allow functions to handle USB_DT_STRING. | |
+ * This is required for MTP. | |
+ */ | |
+ if (value < 0) { | |
+ struct usb_configuration *cfg; | |
+ list_for_each_entry(cfg, &cdev->configs, list) { | |
+ if (cfg && cfg->setup) { | |
+ CSY_DBG("DT-STRING value=%d, N:cfg->setup\n",value); | |
+ value = cfg->setup(cfg, ctrl); | |
+ if (value >= 0) | |
+ break; | |
+ } | |
+ } | |
+ } | |
+ | |
if (value >= 0) | |
value = min(w_length, (u16) value); | |
break; | |
*************** | |
*** 767,772 **** | |
--- 1083,1089 ---- | |
/* any number of configs can work */ | |
case USB_REQ_SET_CONFIGURATION: | |
+ CSY_DBG_ESS("SET_CON w_v=%d\n", w_value); | |
if (ctrl->bRequestType != 0) | |
goto unknown; | |
if (gadget_is_otg(gadget)) { | |
*************** | |
*** 784,794 **** | |
case USB_REQ_GET_CONFIGURATION: | |
if (ctrl->bRequestType != USB_DIR_IN) | |
goto unknown; | |
! if (cdev->config) | |
*(u8 *)req->buf = cdev->config->bConfigurationValue; | |
! else | |
*(u8 *)req->buf = 0; | |
! value = min(w_length, (u16) 1); | |
break; | |
/* function drivers must handle get/set altsetting; if there's | |
--- 1101,1112 ---- | |
case USB_REQ_GET_CONFIGURATION: | |
if (ctrl->bRequestType != USB_DIR_IN) | |
goto unknown; | |
! if (cdev->config) { | |
*(u8 *)req->buf = cdev->config->bConfigurationValue; | |
! value = min(w_length, (u16) 1); | |
! } else | |
*(u8 *)req->buf = 0; | |
! CSY_DBG("GET_CONFIGURATION value=%d\n", value); | |
break; | |
/* function drivers must handle get/set altsetting; if there's | |
*************** | |
*** 804,810 **** | |
--- 1122,1130 ---- | |
break; | |
if (w_value && !f->set_alt) | |
break; | |
+ CSY_DBG("Before SET_INTERFACE w_index=%d w_value=%d f->name=%s\n", w_index, w_value,f->name); | |
value = f->set_alt(f, w_index, w_value); | |
+ CSY_DBG("After SET_INTERFACE w_index=%d w_value=%d f->name=%s\n", w_index, w_value,f->name); | |
break; | |
case USB_REQ_GET_INTERFACE: | |
if (ctrl->bRequestType != (USB_DIR_IN|USB_RECIP_INTERFACE)) | |
*************** | |
*** 819,829 **** | |
--- 1139,1154 ---- | |
if (value < 0) | |
break; | |
*((u8 *)req->buf) = value; | |
+ CSY_DBG("GET_INTERFACE value=%d, f->name=%s\n", value, f->name); | |
value = min(w_length, (u16) 1); | |
break; | |
default: | |
unknown: | |
+ #ifdef CSY_DEBUG | |
+ CSY_DBG( | |
+ #else | |
VDBG(cdev, | |
+ #endif | |
"non-core control req%02x.%02x v%04x i%04x l%d\n", | |
ctrl->bRequestType, ctrl->bRequest, | |
w_value, w_index, w_length); | |
*************** | |
*** 836,844 **** | |
--- 1161,1205 ---- | |
* take such requests too, if that's ever needed: to work | |
* in config 0, etc. | |
*/ | |
+ | |
+ CSY_DBG("ctrl->bRequestType=0x%x, cdev->config=0x%p, intf=0x%x\n", ctrl->bRequestType, cdev->config, intf); | |
switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
case USB_RECIP_INTERFACE: | |
+ if (cdev->config == NULL) | |
+ return value; | |
+ | |
+ #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
+ /* soonyong.cho : RNDIS interface must be setted to 0. | |
+ * But sequence to set interface is depend on all functions list. | |
+ * So, If you don't set RNDIS interface firstly in all functions list, | |
+ * you have to change interface number to real rndis interface number from w_index. | |
+ */ | |
+ # ifdef CSY_DBG | |
+ for (i = 0; i < MAX_CONFIG_INTERFACES; i++) { | |
+ f = cdev->config->interface[i]; | |
+ CSY_DBG("interface %d f=0x%p\n", i, f); | |
+ if (!f) | |
+ continue; | |
+ CSY_DBG("interface %d = %s/%p disabled=%d\n", i, f->name, f, f->disabled); | |
+ } | |
+ # endif | |
+ for (i = 0; i < MAX_CONFIG_INTERFACES; i++) { | |
+ f = cdev->config->interface[i]; | |
+ if (!f) | |
+ continue; | |
+ | |
+ /* RNDIS interface number must be changed to real interface number if rndis is enabled. */ | |
+ if ((f->disabled == 0) && (!strcmp(f->name, "rndis"))) { | |
+ if ((i != intf) && (intf == 0)) { | |
+ CSY_DBG("chaged intf to %d from %d (name=%s)\n", i, intf, f->name); | |
+ intf = i; | |
+ } | |
+ break; | |
+ } | |
+ } | |
+ #endif | |
f = cdev->config->interface[intf]; | |
+ CSY_DBG("f=0x%p, f->setup=0x%p, f->name=%s\n", f, f->setup, f->name); | |
break; | |
case USB_RECIP_ENDPOINT: | |
*************** | |
*** 858,865 **** | |
struct usb_configuration *c; | |
c = cdev->config; | |
! if (c && c->setup) | |
value = c->setup(c, ctrl); | |
} | |
goto done; | |
--- 1219,1249 ---- | |
struct usb_configuration *c; | |
c = cdev->config; | |
! if (c && c->setup) { | |
! CSY_DBG("ctrl->bRequest : default N:c->setup()\n"); | |
value = c->setup(c, ctrl); | |
+ } | |
+ } | |
+ | |
+ /* If the vendor request is not processed (value < 0), | |
+ * call all device registered configure setup callbacks | |
+ * to process it. | |
+ * This is used to handle the following cases: | |
+ * - vendor request is for the device and arrives before | |
+ * setconfiguration. | |
+ * - Some devices are required to handle vendor request before | |
+ * setconfiguration such as MTP, USBNET. | |
+ */ | |
+ | |
+ if (value < 0) { | |
+ struct usb_configuration *cfg; | |
+ | |
+ list_for_each_entry(cfg, &cdev->configs, list) { | |
+ if (cfg && cfg->setup) { | |
+ CSY_DBG("vendor request is not processed :cfg->setup()\n"); | |
+ value = cfg->setup(cfg, ctrl); | |
+ } | |
+ } | |
} | |
goto done; | |
*************** | |
*** 868,873 **** | |
--- 1252,1258 ---- | |
/* respond with data transfer before status phase? */ | |
if (value >= 0) { | |
req->length = value; | |
+ CSY_DBG("-respond with data transfer before status phase (req->length=%d, w_length=%d)\n", req->length,w_length); | |
req->zero = value < w_length; | |
value = usb_ep_queue(gadget->ep0, req, GFP_ATOMIC); | |
if (value < 0) { | |
*************** | |
*** 878,883 **** | |
--- 1263,1273 ---- | |
} | |
done: | |
+ if(cdev->mute_switch) { | |
+ INFO(cdev, "mute_switch is unset. composite_setup\n"); | |
+ cdev->mute_switch = 0; | |
+ } | |
+ CSY_DBG("--setup value=%d\n", value); | |
/* device either stalls (value < 0) or reports success */ | |
return value; | |
} | |
*************** | |
*** 890,898 **** | |
/* REVISIT: should we have config and device level | |
* disconnect callbacks? | |
*/ | |
spin_lock_irqsave(&cdev->lock, flags); | |
! if (cdev->config) | |
reset_config(cdev); | |
spin_unlock_irqrestore(&cdev->lock, flags); | |
} | |
--- 1280,1306 ---- | |
/* REVISIT: should we have config and device level | |
* disconnect callbacks? | |
*/ | |
+ | |
+ INFO(cdev, "composite_disconnect called\n"); | |
+ | |
spin_lock_irqsave(&cdev->lock, flags); | |
! if (cdev->config) { | |
! INFO(cdev, "composite_disconnect -> reset_config\n"); | |
reset_config(cdev); | |
+ } | |
+ | |
+ if (cdev->mute_switch) { | |
+ /* Replace below sequence (mute_switch value set 0), | |
+ * some times, disconnect is called more then one time. | |
+ * mode 0x8 is tethering. tethering does not notify disconnection event. | |
+ */ | |
+ INFO(cdev, "clean mute_switch\n"); | |
+ cdev->mute_switch = 0; | |
+ } | |
+ else { | |
+ schedule_work(&cdev->switch_work); | |
+ INFO(cdev, "composite_disconnect -> switch_work\n"); | |
+ } | |
spin_unlock_irqrestore(&cdev->lock, flags); | |
} | |
*************** | |
*** 905,910 **** | |
--- 1313,1319 ---- | |
struct usb_gadget *gadget = dev_to_usb_gadget(dev); | |
struct usb_composite_dev *cdev = get_gadget_data(gadget); | |
+ CSY_DBG("\n"); | |
return sprintf(buf, "%d\n", cdev->suspended); | |
} | |
*************** | |
*** 922,927 **** | |
--- 1331,1337 ---- | |
*/ | |
WARN_ON(cdev->config); | |
+ CSY_DBG("\n"); | |
while (!list_empty(&cdev->configs)) { | |
struct usb_configuration *c; | |
*************** | |
*** 954,959 **** | |
--- 1364,1371 ---- | |
kfree(cdev->req->buf); | |
usb_ep_free_request(gadget->ep0, cdev->req); | |
} | |
+ | |
+ switch_dev_unregister(&cdev->sdev); | |
kfree(cdev); | |
set_gadget_data(gadget, NULL); | |
device_remove_file(&gadget->dev, &dev_attr_suspended); | |
*************** | |
*** 982,992 **** | |
--- 1394,1436 ---- | |
} | |
} | |
+ static void | |
+ composite_switch_work(struct work_struct *data) | |
+ { | |
+ struct usb_composite_dev *cdev = | |
+ container_of(data, struct usb_composite_dev, switch_work); | |
+ struct usb_configuration *config = cdev->config; | |
+ int state = 0; | |
+ | |
+ if (config) { | |
+ INFO(cdev, "usb switch_work: config = %d\n", config->bConfigurationValue); | |
+ state = config->bConfigurationValue; | |
+ | |
+ #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
+ /* Some function driver needs a state of vbus */ | |
+ } else if (cdev->products && cdev->products->mode && | |
+ (cdev->products->mode == 1 /* KIES */ || | |
+ cdev->products->mode == 2 /* MTP */ || | |
+ cdev->products->mode == 8 /* Tethering */ )) { | |
+ u32 gctl = readl(S3C_UDC_OTG_GOTGCTL); | |
+ INFO(cdev, "usb switch_work: %d\n", (gctl & B_SESSION_VALID)?1:0); | |
+ state = (gctl & B_SESSION_VALID)?1:0; | |
+ #endif | |
+ } | |
+ | |
+ INFO(cdev, "usb uevent : old = %d, new = %d, %s\n", cdev->sdev.state, state, | |
+ cdev->sdev.state == state ? "No event" : | |
+ cdev->sdev.state > state ? "Disconnect": "Connect"); | |
+ | |
+ switch_set_state(&cdev->sdev, state); | |
+ } | |
+ | |
static int composite_bind(struct usb_gadget *gadget) | |
{ | |
struct usb_composite_dev *cdev; | |
int status = -ENOMEM; | |
+ CSY_DBG2("\n"); | |
cdev = kzalloc(sizeof *cdev, GFP_KERNEL); | |
if (!cdev) | |
return status; | |
*************** | |
*** 1033,1038 **** | |
--- 1477,1488 ---- | |
if (status < 0) | |
goto fail; | |
+ cdev->sdev.name = "usb_configuration"; | |
+ status = switch_dev_register(&cdev->sdev); | |
+ if (status < 0) | |
+ goto fail; | |
+ INIT_WORK(&cdev->switch_work, composite_switch_work); | |
+ | |
cdev->desc = *composite->dev; | |
cdev->desc.bMaxPacketSize0 = gadget->ep0->maxpacket; | |
*************** | |
*** 1107,1112 **** | |
--- 1557,1582 ---- | |
cdev->suspended = 0; | |
} | |
+ static int | |
+ composite_uevent(struct device *dev, struct kobj_uevent_env *env) | |
+ { | |
+ struct usb_function *f = dev_get_drvdata(dev); | |
+ | |
+ if(f) { | |
+ pr_info("usb composite_uevent : %s (%d)\n", f->name, !f->disabled); | |
+ } else { | |
+ /* this happens when the device is first created */ | |
+ pr_info("usb composite_uevent : USB Function is null\n"); | |
+ return 0; | |
+ } | |
+ | |
+ if (add_uevent_var(env, "FUNCTION=%s", f->name)) | |
+ return -ENOMEM; | |
+ if (add_uevent_var(env, "ENABLED=%d", !f->disabled)) | |
+ return -ENOMEM; | |
+ return 0; | |
+ } | |
+ | |
/*-------------------------------------------------------------------------*/ | |
static struct usb_gadget_driver composite_driver = { | |
*************** | |
*** 1143,1148 **** | |
--- 1613,1619 ---- | |
*/ | |
int usb_composite_register(struct usb_composite_driver *driver) | |
{ | |
+ CSY_DBG2("\n"); | |
if (!driver || !driver->dev || !driver->bind || composite) | |
return -EINVAL; | |
*************** | |
*** 1152,1157 **** | |
--- 1623,1633 ---- | |
composite_driver.driver.name = driver->name; | |
composite = driver; | |
+ driver->class = class_create(THIS_MODULE, "usb_composite"); | |
+ if (IS_ERR(driver->class)) | |
+ return PTR_ERR(driver->class); | |
+ driver->class->dev_uevent = composite_uevent; | |
+ | |
return usb_gadget_register_driver(&composite_driver); | |
} | |
*************** | |
*** 1164,1169 **** | |
--- 1640,1646 ---- | |
*/ | |
void usb_composite_unregister(struct usb_composite_driver *driver) | |
{ | |
+ CSY_DBG2("\n"); | |
if (composite != driver) | |
return; | |
usb_gadget_unregister_driver(&composite_driver); | |
diff -crB 2/drivers/usb/gadget/epautoconf.c 1/drivers/usb/gadget/epautoconf.c | |
*** 2/drivers/usb/gadget/epautoconf.c 2012-09-24 11:44:01.210829719 +0530 | |
--- 1/drivers/usb/gadget/epautoconf.c 2011-05-18 12:35:13.000000000 +0530 | |
*************** | |
*** 283,288 **** | |
--- 283,348 ---- | |
if (ep && ep_matches (gadget, ep, desc)) | |
return ep; | |
#endif | |
+ | |
+ } else if (gadget_is_s3c(gadget)) { | |
+ if (USB_ENDPOINT_XFER_INT == type) { | |
+ /* single buffering is enough */ | |
+ ep = find_ep (gadget, "ep3-int"); | |
+ if (ep && ep_matches (gadget, ep, desc)) | |
+ return ep; | |
+ ep = find_ep (gadget, "ep6-int"); | |
+ if (ep && ep_matches (gadget, ep, desc)) | |
+ return ep; | |
+ ep = find_ep (gadget, "ep9-int"); | |
+ if (ep && ep_matches (gadget, ep, desc)) | |
+ return ep; | |
+ #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
+ /* soonyong.cho : It is refered from S1. samsung composite used many ep */ | |
+ ep = find_ep (gadget, "ep12-int"); | |
+ if (ep && ep_matches (gadget, ep, desc)) | |
+ return ep; | |
+ #endif | |
+ } else if (USB_ENDPOINT_XFER_BULK == type | |
+ && (USB_DIR_IN & desc->bEndpointAddress)) { | |
+ ep = find_ep (gadget, "ep2-bulk"); | |
+ if (ep && ep_matches (gadget, ep, desc)) | |
+ return ep; | |
+ ep = find_ep (gadget, "ep5-bulk"); | |
+ if (ep && ep_matches (gadget, ep, desc)) | |
+ return ep; | |
+ ep = find_ep (gadget, "ep8-bulk"); | |
+ if (ep && ep_matches (gadget, ep, desc)) | |
+ return ep; | |
+ #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
+ /* soonyong.cho : It is refered from S1. samsung composite used many ep */ | |
+ ep = find_ep (gadget, "ep11-bulk"); | |
+ if (ep && ep_matches (gadget, ep, desc)) | |
+ return ep; | |
+ ep = find_ep (gadget, "ep14-bulk"); | |
+ if (ep && ep_matches (gadget, ep, desc)) | |
+ return ep; | |
+ #endif | |
+ } else if (USB_ENDPOINT_XFER_BULK == type | |
+ && !(USB_DIR_IN & desc->bEndpointAddress)) { | |
+ ep = find_ep (gadget, "ep1-bulk"); | |
+ if (ep && ep_matches (gadget, ep, desc)) | |
+ return ep; | |
+ ep = find_ep (gadget, "ep4-bulk"); | |
+ if (ep && ep_matches (gadget, ep, desc)) | |
+ return ep; | |
+ ep = find_ep (gadget, "ep7-bulk"); | |
+ #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
+ /* soonyong.cho : It is refered from S1. samsung composite used many ep */ | |
+ if (ep && ep_matches (gadget, ep, desc)) | |
+ return ep; | |
+ ep = find_ep (gadget, "ep10-bulk"); | |
+ if (ep && ep_matches (gadget, ep, desc)) | |
+ return ep; | |
+ ep = find_ep (gadget, "ep13-bulk"); | |
+ #endif | |
+ if (ep && ep_matches (gadget, ep, desc)) | |
+ return ep; | |
+ } | |
} | |
/* Second, look at endpoints until an unclaimed one looks usable */ | |
diff -crB 2/drivers/usb/gadget/f_acm.c 1/drivers/usb/gadget/f_acm.c | |
*** 2/drivers/usb/gadget/f_acm.c 2012-09-24 11:44:01.210829719 +0530 | |
--- 1/drivers/usb/gadget/f_acm.c 2011-05-18 12:35:13.000000000 +0530 | |
*************** | |
*** 17,26 **** | |
--- 17,34 ---- | |
#include <linux/slab.h> | |
#include <linux/kernel.h> | |
#include <linux/device.h> | |
+ #include <linux/usb/android_composite.h> | |
#include "u_serial.h" | |
#include "gadget_chips.h" | |
+ /* #define CSY_SAMSUNG_NO_IAD */ | |
+ #ifdef CONFIG_USB_DUN_SUPPORT | |
+ /* refered from S1 */ | |
+ extern int modem_register(void * data); | |
+ extern void modem_unregister(void); | |
+ extern void notify_control_line_state(u32 value); | |
+ #endif | |
/* | |
* This CDC ACM function support just wraps control functions and | |
*************** | |
*** 101,107 **** | |
#define GS_NOTIFY_MAXPACKET 10 /* notification + 2 bytes */ | |
/* interface and class descriptors: */ | |
! | |
static struct usb_interface_assoc_descriptor | |
acm_iad_descriptor = { | |
.bLength = sizeof acm_iad_descriptor, | |
--- 109,117 ---- | |
#define GS_NOTIFY_MAXPACKET 10 /* notification + 2 bytes */ | |
/* interface and class descriptors: */ | |
! #ifdef CSY_SAMSUNG_NO_IAD | |
! /* Nothing to do */ | |
! #else | |
static struct usb_interface_assoc_descriptor | |
acm_iad_descriptor = { | |
.bLength = sizeof acm_iad_descriptor, | |
*************** | |
*** 114,120 **** | |
.bFunctionProtocol = USB_CDC_PROTO_NONE, | |
/* .iFunction = DYNAMIC */ | |
}; | |
! | |
static struct usb_interface_descriptor acm_control_interface_desc = { | |
.bLength = USB_DT_INTERFACE_SIZE, | |
--- 124,130 ---- | |
.bFunctionProtocol = USB_CDC_PROTO_NONE, | |
/* .iFunction = DYNAMIC */ | |
}; | |
! #endif | |
static struct usb_interface_descriptor acm_control_interface_desc = { | |
.bLength = USB_DT_INTERFACE_SIZE, | |
*************** | |
*** 195,201 **** | |
--- 205,215 ---- | |
}; | |
static struct usb_descriptor_header *acm_fs_function[] = { | |
+ #ifdef CSY_SAMSUNG_NO_IAD | |
+ /* Nothing to do */ | |
+ #else | |
(struct usb_descriptor_header *) &acm_iad_descriptor, | |
+ #endif | |
(struct usb_descriptor_header *) &acm_control_interface_desc, | |
(struct usb_descriptor_header *) &acm_header_desc, | |
(struct usb_descriptor_header *) &acm_call_mgmt_descriptor, | |
*************** | |
*** 234,240 **** | |
--- 248,258 ---- | |
}; | |
static struct usb_descriptor_header *acm_hs_function[] = { | |
+ #ifdef CSY_SAMSUNG_NO_IAD | |
+ /* Nothing to do */ | |
+ #else | |
(struct usb_descriptor_header *) &acm_iad_descriptor, | |
+ #endif | |
(struct usb_descriptor_header *) &acm_control_interface_desc, | |
(struct usb_descriptor_header *) &acm_header_desc, | |
(struct usb_descriptor_header *) &acm_call_mgmt_descriptor, | |
*************** | |
*** 251,263 **** | |
--- 269,289 ---- | |
#define ACM_CTRL_IDX 0 | |
#define ACM_DATA_IDX 1 | |
+ #ifdef CSY_SAMSUNG_NO_IAD | |
+ /* Nothing to do */ | |
+ #else | |
#define ACM_IAD_IDX 2 | |
+ #endif | |
/* static strings, in UTF-8 */ | |
static struct usb_string acm_string_defs[] = { | |
[ACM_CTRL_IDX].s = "CDC Abstract Control Model (ACM)", | |
[ACM_DATA_IDX].s = "CDC ACM Data", | |
+ #ifdef CSY_SAMSUNG_NO_IAD | |
+ /* Nothing to do */ | |
+ #else | |
[ACM_IAD_IDX ].s = "CDC Serial", | |
+ #endif | |
{ /* ZEROES END LIST */ }, | |
}; | |
*************** | |
*** 366,371 **** | |
--- 392,401 ---- | |
* that bit, we should return to that no-flow state. | |
*/ | |
acm->port_handshake_bits = w_value; | |
+ #ifdef CONFIG_USB_DUN_SUPPORT | |
+ /* refered from S1 */ | |
+ notify_control_line_state((unsigned long)w_value); | |
+ #endif | |
break; | |
default: | |
*************** | |
*** 405,414 **** | |
usb_ep_disable(acm->notify); | |
} else { | |
VDBG(cdev, "init acm ctrl interface %d\n", intf); | |
- acm->notify_desc = ep_choose(cdev->gadget, | |
- acm->hs.notify, | |
- acm->fs.notify); | |
} | |
usb_ep_enable(acm->notify, acm->notify_desc); | |
acm->notify->driver_data = acm; | |
--- 435,444 ---- | |
usb_ep_disable(acm->notify); | |
} else { | |
VDBG(cdev, "init acm ctrl interface %d\n", intf); | |
} | |
+ acm->notify_desc = ep_choose(cdev->gadget, | |
+ acm->hs.notify, | |
+ acm->fs.notify); | |
usb_ep_enable(acm->notify, acm->notify_desc); | |
acm->notify->driver_data = acm; | |
*************** | |
*** 418,428 **** | |
gserial_disconnect(&acm->port); | |
} else { | |
DBG(cdev, "activate acm ttyGS%d\n", acm->port_num); | |
- acm->port.in_desc = ep_choose(cdev->gadget, | |
- acm->hs.in, acm->fs.in); | |
- acm->port.out_desc = ep_choose(cdev->gadget, | |
- acm->hs.out, acm->fs.out); | |
} | |
gserial_connect(&acm->port, acm->port_num); | |
} else | |
--- 448,458 ---- | |
gserial_disconnect(&acm->port); | |
} else { | |
DBG(cdev, "activate acm ttyGS%d\n", acm->port_num); | |
} | |
+ acm->port.in_desc = ep_choose(cdev->gadget, | |
+ acm->hs.in, acm->fs.in); | |
+ acm->port.out_desc = ep_choose(cdev->gadget, | |
+ acm->hs.out, acm->fs.out); | |
gserial_connect(&acm->port, acm->port_num); | |
} else | |
*************** | |
*** 536,541 **** | |
--- 566,581 ---- | |
acm_notify_serial_state(acm); | |
} | |
+ #ifdef CONFIG_USB_DUN_SUPPORT | |
+ /* refered from S1 */ | |
+ void acm_notify(void * dev, u16 state) | |
+ { | |
+ struct f_acm *acm = (struct f_acm *)dev; | |
+ | |
+ acm->serial_state = state; | |
+ acm_notify_serial_state(acm); | |
+ } | |
+ #endif | |
/* connect == the TTY link is open */ | |
static void acm_connect(struct gserial *port) | |
*************** | |
*** 584,591 **** | |
if (status < 0) | |
goto fail; | |
acm->ctrl_id = status; | |
acm_iad_descriptor.bFirstInterface = status; | |
! | |
acm_control_interface_desc.bInterfaceNumber = status; | |
acm_union_desc .bMasterInterface0 = status; | |
--- 624,634 ---- | |
if (status < 0) | |
goto fail; | |
acm->ctrl_id = status; | |
+ #ifdef CSY_SAMSUNG_NO_IAD | |
+ /* Nothing to do */ | |
+ #else | |
acm_iad_descriptor.bFirstInterface = status; | |
! #endif | |
acm_control_interface_desc.bInterfaceNumber = status; | |
acm_union_desc .bMasterInterface0 = status; | |
*************** | |
*** 669,674 **** | |
--- 712,721 ---- | |
gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full", | |
acm->port.in->name, acm->port.out->name, | |
acm->notify->name); | |
+ #ifdef CONFIG_USB_DUN_SUPPORT | |
+ /* refered from S1 */ | |
+ modem_register(acm); | |
+ #endif | |
return 0; | |
fail: | |
*************** | |
*** 698,703 **** | |
--- 745,759 ---- | |
usb_free_descriptors(f->descriptors); | |
gs_free_req(acm->notify, acm->notify_req); | |
kfree(acm); | |
+ #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
+ /* refered from S1 */ | |
+ gserial_disconnect(&acm->port); | |
+ gserial_cleanup(); | |
+ #endif | |
+ #ifdef CONFIG_USB_DUN_SUPPORT | |
+ /* refered from S1 */ | |
+ modem_unregister(); | |
+ #endif | |
} | |
/* Some controllers can't support CDC ACM ... */ | |
*************** | |
*** 746,758 **** | |
acm_string_defs[ACM_DATA_IDX].id = status; | |
acm_data_interface_desc.iInterface = status; | |
! | |
status = usb_string_id(c->cdev); | |
if (status < 0) | |
return status; | |
acm_string_defs[ACM_IAD_IDX].id = status; | |
acm_iad_descriptor.iFunction = status; | |
} | |
/* allocate and initialize one new instance */ | |
--- 802,817 ---- | |
acm_string_defs[ACM_DATA_IDX].id = status; | |
acm_data_interface_desc.iInterface = status; | |
! #ifdef CSY_SAMSUNG_NO_IAD | |
! /* Nothing to do */ | |
! #else | |
status = usb_string_id(c->cdev); | |
if (status < 0) | |
return status; | |
acm_string_defs[ACM_IAD_IDX].id = status; | |
acm_iad_descriptor.iFunction = status; | |
+ #endif | |
} | |
/* allocate and initialize one new instance */ | |
*************** | |
*** 782,784 **** | |
--- 841,868 ---- | |
kfree(acm); | |
return status; | |
} | |
+ | |
+ #ifdef CONFIG_USB_ANDROID_ACM | |
+ | |
+ int acm_function_bind_config(struct usb_configuration *c) | |
+ { | |
+ int ret = acm_bind_config(c, 0); | |
+ if (ret == 0) | |
+ gserial_setup(c->cdev->gadget, 1); | |
+ return ret; | |
+ } | |
+ | |
+ static struct android_usb_function acm_function = { | |
+ .name = "acm", | |
+ .bind_config = acm_function_bind_config, | |
+ }; | |
+ | |
+ static int __init init(void) | |
+ { | |
+ printk(KERN_INFO "f_acm init\n"); | |
+ android_register_function(&acm_function); | |
+ return 0; | |
+ } | |
+ module_init(init); | |
+ | |
+ #endif /* CONFIG_USB_ANDROID_ACM */ | |
Only in 1/drivers/usb/gadget: f_adb.c | |
diff -crB 2/drivers/usb/gadget/f_mass_storage.c 1/drivers/usb/gadget/f_mass_storage.c | |
*** 2/drivers/usb/gadget/f_mass_storage.c 2012-09-24 11:44:01.214829646 +0530 | |
--- 1/drivers/usb/gadget/f_mass_storage.c 2011-05-18 12:35:13.000000000 +0530 | |
*************** | |
*** 295,301 **** | |
--- 295,306 ---- | |
#include "gadget_chips.h" | |
+ #ifdef CONFIG_USB_ANDROID_MASS_STORAGE | |
+ #include <linux/usb/android_composite.h> | |
+ #include <linux/platform_device.h> | |
+ #define FUNCTION_NAME "usb_mass_storage" | |
+ #endif | |
/*------------------------------------------------------------------------*/ | |
*************** | |
*** 408,413 **** | |
--- 413,422 ---- | |
u16 release; | |
char can_stall; | |
+ | |
+ #ifdef CONFIG_USB_ANDROID_MASS_STORAGE | |
+ struct platform_device *pdev; | |
+ #endif | |
}; | |
*************** | |
*** 616,622 **** | |
if (ctrl->bRequestType != | |
(USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE)) | |
break; | |
! if (w_index != fsg->interface_number || w_value != 0) | |
return -EDOM; | |
VDBG(fsg, "get max LUN\n"); | |
*(u8 *) req->buf = fsg->common->nluns - 1; | |
--- 625,632 ---- | |
if (ctrl->bRequestType != | |
(USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE)) | |
break; | |
! // if (w_index != fsg->interface_number || w_value != 0) - for support two Luns in ums mode | |
! if (w_value != 0) | |
return -EDOM; | |
VDBG(fsg, "get max LUN\n"); | |
*(u8 *) req->buf = fsg->common->nluns - 1; | |
*************** | |
*** 872,882 **** | |
--- 882,894 ---- | |
curlun->sense_data = SS_INVALID_FIELD_IN_CDB; | |
return -EINVAL; | |
} | |
+ #ifndef CONFIG_USB_ANDROID_MASS_STORAGE | |
if (common->cmnd[1] & 0x08) { /* FUA */ | |
spin_lock(&curlun->filp->f_lock); | |
curlun->filp->f_flags |= O_SYNC; | |
spin_unlock(&curlun->filp->f_lock); | |
} | |
+ #endif | |
} | |
if (lba >= curlun->num_sectors) { | |
curlun->sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE; | |
*************** | |
*** 2717,2723 **** | |
--- 2729,2741 ---- | |
curlun->ro = lcfg->cdrom || lcfg->ro; | |
curlun->removable = lcfg->removable; | |
curlun->dev.release = fsg_lun_release; | |
+ | |
+ #ifdef CONFIG_USB_ANDROID_MASS_STORAGE | |
+ /* use "usb_mass_storage" platform device as parent */ | |
+ curlun->dev.parent = &cfg->pdev->dev; | |
+ #else | |
curlun->dev.parent = &gadget->dev; | |
+ #endif | |
/* curlun->dev.driver = &fsg_driver.driver; XXX */ | |
dev_set_drvdata(&curlun->dev, &common->filesem); | |
dev_set_name(&curlun->dev, | |
*************** | |
*** 3001,3007 **** | |
--- 3019,3029 ---- | |
if (unlikely(!fsg)) | |
return -ENOMEM; | |
+ #ifdef CONFIG_USB_ANDROID_MASS_STORAGE | |
+ fsg->function.name = FUNCTION_NAME; | |
+ #else | |
fsg->function.name = FSG_DRIVER_DESC; | |
+ #endif | |
fsg->function.strings = fsg_strings_array; | |
fsg->function.bind = fsg_bind; | |
fsg->function.unbind = fsg_unbind; | |
*************** | |
*** 3118,3120 **** | |
--- 3140,3202 ---- | |
return fsg_common_init(common, cdev, &cfg); | |
} | |
+ #ifdef CONFIG_USB_ANDROID_MASS_STORAGE | |
+ | |
+ static struct fsg_config fsg_cfg; | |
+ | |
+ static int fsg_probe(struct platform_device *pdev) | |
+ { | |
+ struct usb_mass_storage_platform_data *pdata = pdev->dev.platform_data; | |
+ int i, nluns; | |
+ | |
+ printk(KERN_INFO "fsg_probe pdev: %p, pdata: %p\n", pdev, pdata); | |
+ if (!pdata) | |
+ return -1; | |
+ | |
+ nluns = pdata->nluns; | |
+ if (nluns > FSG_MAX_LUNS) | |
+ nluns = FSG_MAX_LUNS; | |
+ fsg_cfg.nluns = nluns; | |
+ for (i = 0; i < nluns; i++) | |
+ fsg_cfg.luns[i].removable = 1; | |
+ | |
+ fsg_cfg.vendor_name = pdata->vendor; | |
+ fsg_cfg.product_name = pdata->product; | |
+ fsg_cfg.release = pdata->release; | |
+ fsg_cfg.can_stall = 0; | |
+ fsg_cfg.pdev = pdev; | |
+ | |
+ return 0; | |
+ } | |
+ | |
+ static struct platform_driver fsg_platform_driver = { | |
+ .driver = { .name = FUNCTION_NAME, }, | |
+ .probe = fsg_probe, | |
+ }; | |
+ | |
+ int mass_storage_bind_config(struct usb_configuration *c) | |
+ { | |
+ struct fsg_common *common = fsg_common_init(NULL, c->cdev, &fsg_cfg); | |
+ if (IS_ERR(common)) | |
+ return -1; | |
+ return fsg_add(c->cdev, c, common); | |
+ } | |
+ | |
+ static struct android_usb_function mass_storage_function = { | |
+ .name = FUNCTION_NAME, | |
+ .bind_config = mass_storage_bind_config, | |
+ }; | |
+ | |
+ static int __init init(void) | |
+ { | |
+ int rc; | |
+ printk(KERN_INFO "f_mass_storage init\n"); | |
+ rc = platform_driver_register(&fsg_platform_driver); | |
+ if (rc != 0) | |
+ return rc; | |
+ android_register_function(&mass_storage_function); | |
+ return 0; | |
+ }module_init(init); | |
+ | |
+ #endif /* CONFIG_USB_ANDROID_MASS_STORAGE */ | |
+ | |
Only in 1/drivers/usb/gadget: f_mtp.c | |
Only in 1/drivers/usb/gadget: f_mtp.h | |
Only in 1/drivers/usb/gadget: f_mtp_samsung.c | |
diff -crB 2/drivers/usb/gadget/f_rndis.c 1/drivers/usb/gadget/f_rndis.c | |
*** 2/drivers/usb/gadget/f_rndis.c 2012-09-24 11:44:01.214829646 +0530 | |
--- 1/drivers/usb/gadget/f_rndis.c 2011-05-18 12:35:13.000000000 +0530 | |
*************** | |
*** 26,33 **** | |
#include <linux/slab.h> | |
#include <linux/kernel.h> | |
! #include <linux/device.h> | |
#include <linux/etherdevice.h> | |
#include <asm/atomic.h> | |
--- 26,34 ---- | |
#include <linux/slab.h> | |
#include <linux/kernel.h> | |
! #include <linux/platform_device.h> | |
#include <linux/etherdevice.h> | |
+ #include <linux/usb/android_composite.h> | |
#include <asm/atomic.h> | |
*************** | |
*** 76,81 **** | |
--- 77,117 ---- | |
* - MS-Windows drivers sometimes emit undocumented requests. | |
*/ | |
+ /* | |
+ * Debugging macro and defines | |
+ */ | |
+ /* #undef CSY_DEBUG */ | |
+ //#define CSY_DEBUG | |
+ | |
+ #ifdef CSY_DEBUG | |
+ # define CSY_DBG(fmt, args...) \ | |
+ printk(KERN_INFO "usb %s:%d "fmt, __func__, __LINE__, ##args) | |
+ #else /* DO NOT PRINT LOG */ | |
+ # define CSY_DBG(fmt, args...) do { } while (0) | |
+ #endif /* CSY_DEBUG */ | |
+ | |
+ #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
+ /*#define CSY_SAMSUNG_COMMAND_LOG */ | |
+ /*#define CSY_SAMSUNG_NO_IAD */ | |
+ | |
+ /* soonyong.cho : For using RNDIS interface 0, 1. | |
+ * If RNDIS uses another interface number, host driver will have some problem. | |
+ */ | |
+ # define CSY_SAMSUNG_FIX_IAD_INTERFACE_NUMBER | |
+ | |
+ #endif | |
+ | |
+ #ifdef CSY_DEBUG | |
+ #undef DBG | |
+ # define DBG(devvalue, fmt, args...) \ | |
+ printk(KERN_INFO "usb %s:%d "fmt, __func__, __LINE__, ##args) | |
+ #endif | |
+ #ifdef CSY_DEBUG | |
+ #undef VDBG | |
+ # define VDBG(devvalue, fmt, args...) \ | |
+ printk(KERN_INFO "usb %s:%d "fmt, __func__, __LINE__, ##args) | |
+ #endif | |
+ | |
struct rndis_ep_descs { | |
struct usb_endpoint_descriptor *in; | |
struct usb_endpoint_descriptor *out; | |
*************** | |
*** 129,137 **** | |
--- 165,180 ---- | |
/* .bInterfaceNumber = DYNAMIC */ | |
/* status endpoint is optional; this could be patched later */ | |
.bNumEndpoints = 1, | |
+ #ifdef CONFIG_USB_ANDROID_RNDIS_WCEIS | |
+ /* "Wireless" RNDIS; auto-detected by Windows */ | |
+ .bInterfaceClass = USB_CLASS_WIRELESS_CONTROLLER, | |
+ .bInterfaceSubClass = 1, | |
+ .bInterfaceProtocol = 3, | |
+ #else | |
.bInterfaceClass = USB_CLASS_COMM, | |
.bInterfaceSubClass = USB_CDC_SUBCLASS_ACM, | |
.bInterfaceProtocol = USB_CDC_ACM_PROTO_VENDOR, | |
+ #endif | |
/* .iInterface = DYNAMIC */ | |
}; | |
*************** | |
*** 182,188 **** | |
/* .iInterface = DYNAMIC */ | |
}; | |
! | |
static struct usb_interface_assoc_descriptor | |
rndis_iad_descriptor = { | |
.bLength = sizeof rndis_iad_descriptor, | |
--- 225,233 ---- | |
/* .iInterface = DYNAMIC */ | |
}; | |
! #ifdef CSY_SAMSUNG_NO_IAD | |
! /* Nothing to do */ | |
! #else | |
static struct usb_interface_assoc_descriptor | |
rndis_iad_descriptor = { | |
.bLength = sizeof rndis_iad_descriptor, | |
*************** | |
*** 190,200 **** | |
--- 235,252 ---- | |
.bFirstInterface = 0, /* XXX, hardcoded */ | |
.bInterfaceCount = 2, // control + data | |
+ # ifdef CONFIG_USB_ANDROID_SAMSUNG_RNDIS_WITH_MS_COMPOSITE | |
+ .bFunctionClass = 0xe0, | |
+ .bFunctionSubClass = 0x01, | |
+ .bFunctionProtocol = 0x03, | |
+ # else | |
.bFunctionClass = USB_CLASS_COMM, | |
.bFunctionSubClass = USB_CDC_SUBCLASS_ETHERNET, | |
.bFunctionProtocol = USB_CDC_PROTO_NONE, | |
+ # endif | |
/* .iFunction = DYNAMIC */ | |
}; | |
+ #endif | |
/* full speed support: */ | |
*************** | |
*** 225,231 **** | |
--- 277,287 ---- | |
}; | |
static struct usb_descriptor_header *eth_fs_function[] = { | |
+ #ifdef CSY_SAMSUNG_NO_IAD | |
+ /* Nothing to do */ | |
+ #else | |
(struct usb_descriptor_header *) &rndis_iad_descriptor, | |
+ #endif | |
/* control interface matches ACM, not Ethernet */ | |
(struct usb_descriptor_header *) &rndis_control_intf, | |
(struct usb_descriptor_header *) &header_desc, | |
*************** | |
*** 270,276 **** | |
--- 326,336 ---- | |
}; | |
static struct usb_descriptor_header *eth_hs_function[] = { | |
+ #ifdef CSY_SAMSUNG_NO_IAD | |
+ /* Nothing to do */ | |
+ #else | |
(struct usb_descriptor_header *) &rndis_iad_descriptor, | |
+ #endif | |
/* control interface matches ACM, not Ethernet */ | |
(struct usb_descriptor_header *) &rndis_control_intf, | |
(struct usb_descriptor_header *) &header_desc, | |
*************** | |
*** 290,296 **** | |
--- 350,360 ---- | |
static struct usb_string rndis_string_defs[] = { | |
[0].s = "RNDIS Communications Control", | |
[1].s = "RNDIS Ethernet Data", | |
+ #ifdef CSY_SAMSUNG_NO_IAD | |
+ /* Nothing to do */ | |
+ #else | |
[2].s = "RNDIS", | |
+ #endif | |
{ } /* end of list */ | |
}; | |
*************** | |
*** 304,309 **** | |
--- 368,377 ---- | |
NULL, | |
}; | |
+ #ifdef CONFIG_USB_ANDROID_RNDIS | |
+ static struct usb_ether_platform_data *rndis_pdata; | |
+ #endif | |
+ | |
/*-------------------------------------------------------------------------*/ | |
static struct sk_buff *rndis_add_header(struct gether *port, | |
*************** | |
*** 351,356 **** | |
--- 419,425 ---- | |
struct usb_composite_dev *cdev = rndis->port.func.config->cdev; | |
int status = req->status; | |
+ CSY_DBG("rndis_response_complete req->length=0x%x\n", req->length); | |
/* after TX: | |
* - USB_CDC_GET_ENCAPSULATED_RESPONSE (ep0/control) | |
* - RNDIS_RESPONSE_AVAILABLE (status/irq) | |
*************** | |
*** 392,401 **** | |
--- 461,481 ---- | |
/* received RNDIS command from USB_CDC_SEND_ENCAPSULATED_COMMAND */ | |
// spin_lock(&dev->lock); | |
+ #ifdef CSY_SAMSUNG_COMMAND_LOG | |
+ int i; | |
+ printk("usb rndis_command_complete buf="); | |
+ for(i=0; i < req->length; i++) | |
+ { | |
+ printk("%02x ", ((char*)req->buf)[i]); | |
+ } | |
+ printk("\n"); | |
+ #endif | |
status = rndis_msg_parser(rndis->config, (u8 *) req->buf); | |
if (status < 0) | |
ERROR(cdev, "RNDIS command error %d, %d/%d\n", | |
status, req->actual, req->length); | |
+ | |
+ CSY_DBG("rndis_command_complete req->length=0x%x\n", req->length); | |
// spin_unlock(&dev->lock); | |
} | |
*************** | |
*** 410,415 **** | |
--- 490,508 ---- | |
u16 w_value = le16_to_cpu(ctrl->wValue); | |
u16 w_length = le16_to_cpu(ctrl->wLength); | |
+ #ifdef CSY_DEBUG | |
+ u16 rt = ctrl->bRequestType << 8; | |
+ CSY_DBG("bRequestType=0x%x, ctrl->bRequest=0x%x, req->length=%d w_length=%d,rndis->ctrl_id=%d,w_index=%d\n", rt, ctrl->bRequest, req->length,w_length, rndis->ctrl_id, w_index); | |
+ #endif | |
+ | |
+ #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
+ /* soonyong.cho : if you use composite framework and RNDIS is not first in all function list, | |
+ you have to change w_index number. And please use RNDIS only if you possible. | |
+ */ | |
+ if (w_index == 0) | |
+ w_index = rndis->ctrl_id; | |
+ | |
+ #endif | |
/* composite driver infrastructure handles everything except | |
* CDC class messages; interface activation uses set_alt(). | |
*/ | |
*************** | |
*** 420,425 **** | |
--- 513,519 ---- | |
*/ | |
case ((USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE) << 8) | |
| USB_CDC_SEND_ENCAPSULATED_COMMAND: | |
+ CSY_DBG("USB_CDC_SEND_ENCAPSULATED_COMMAND++\n"); | |
if (w_length > req->length || w_value | |
|| w_index != rndis->ctrl_id) | |
goto invalid; | |
*************** | |
*** 427,437 **** | |
--- 521,533 ---- | |
value = w_length; | |
req->complete = rndis_command_complete; | |
req->context = rndis; | |
+ CSY_DBG("USB_CDC_SEND_ENCAPSULATED_COMMAND--\n"); | |
/* later, rndis_response_available() sends a notification */ | |
break; | |
case ((USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE) << 8) | |
| USB_CDC_GET_ENCAPSULATED_RESPONSE: | |
+ CSY_DBG("USB_CDC_GET_ENCAPSULATED_COMMAND++\n"); | |
if (w_value || w_index != rndis->ctrl_id) | |
goto invalid; | |
else { | |
*************** | |
*** 446,451 **** | |
--- 542,548 ---- | |
rndis_free_response(rndis->config, buf); | |
value = n; | |
} | |
+ CSY_DBG("USB_CDC_GET_ENCAPSULATED_COMMAND--\n"); | |
/* else stalls ... spec says to avoid that */ | |
} | |
break; | |
*************** | |
*** 464,469 **** | |
--- 561,567 ---- | |
w_value, w_index, w_length); | |
req->zero = (value < w_length); | |
req->length = value; | |
+ CSY_DBG("rndis_setup value>=0, req->length=0x%x\n", req->length); | |
value = usb_ep_queue(cdev->gadget->ep0, req, GFP_ATOMIC); | |
if (value < 0) | |
ERROR(cdev, "rndis response on err %d\n", value); | |
*************** | |
*** 481,496 **** | |
/* we know alt == 0 */ | |
if (intf == rndis->ctrl_id) { | |
if (rndis->notify->driver_data) { | |
VDBG(cdev, "reset rndis control %d\n", intf); | |
usb_ep_disable(rndis->notify); | |
} else { | |
VDBG(cdev, "init rndis ctrl %d\n", intf); | |
- rndis->notify_desc = ep_choose(cdev->gadget, | |
- rndis->hs.notify, | |
- rndis->fs.notify); | |
} | |
usb_ep_enable(rndis->notify, rndis->notify_desc); | |
rndis->notify->driver_data = rndis; | |
--- 579,596 ---- | |
/* we know alt == 0 */ | |
+ CSY_DBG("rndis_set_alt: intf=0x%x,rndis->ctrl_id=0x%x,rndis->data_id=0x%x,alt=0x%x", | |
+ intf, rndis->ctrl_id, rndis->data_id,alt); | |
if (intf == rndis->ctrl_id) { | |
if (rndis->notify->driver_data) { | |
VDBG(cdev, "reset rndis control %d\n", intf); | |
usb_ep_disable(rndis->notify); | |
} else { | |
VDBG(cdev, "init rndis ctrl %d\n", intf); | |
} | |
+ rndis->notify_desc = ep_choose(cdev->gadget, | |
+ rndis->hs.notify, | |
+ rndis->fs.notify); | |
usb_ep_enable(rndis->notify, rndis->notify_desc); | |
rndis->notify->driver_data = rndis; | |
*************** | |
*** 504,514 **** | |
if (!rndis->port.in) { | |
DBG(cdev, "init rndis\n"); | |
- rndis->port.in = ep_choose(cdev->gadget, | |
- rndis->hs.in, rndis->fs.in); | |
- rndis->port.out = ep_choose(cdev->gadget, | |
- rndis->hs.out, rndis->fs.out); | |
} | |
/* Avoid ZLPs; they can be troublesome. */ | |
rndis->port.is_zlp_ok = false; | |
--- 604,614 ---- | |
if (!rndis->port.in) { | |
DBG(cdev, "init rndis\n"); | |
} | |
+ rndis->port.in = ep_choose(cdev->gadget, | |
+ rndis->hs.in, rndis->fs.in); | |
+ rndis->port.out = ep_choose(cdev->gadget, | |
+ rndis->hs.out, rndis->fs.out); | |
/* Avoid ZLPs; they can be troublesome. */ | |
rndis->port.is_zlp_ok = false; | |
*************** | |
*** 529,534 **** | |
--- 629,635 ---- | |
DBG(cdev, "RNDIS RX/TX early activation ... \n"); | |
net = gether_connect(&rndis->port); | |
+ CSY_DBG("gether_connect ret=0x%p\n", net); | |
if (IS_ERR(net)) | |
return PTR_ERR(net); | |
*************** | |
*** 607,613 **** | |
--- 708,722 ---- | |
if (status < 0) | |
goto fail; | |
rndis->ctrl_id = status; | |
+ #ifdef CSY_SAMSUNG_NO_IAD | |
+ /* Nothing to do */ | |
+ #else | |
+ # ifdef CSY_SAMSUNG_FIX_IAD_INTERFACE_NUMBER | |
+ /* Nothing to do */ | |
+ # else | |
rndis_iad_descriptor.bFirstInterface = status; | |
+ # endif | |
+ #endif | |
rndis_control_intf.bInterfaceNumber = status; | |
rndis_union_desc.bMasterInterface0 = status; | |
*************** | |
*** 655,660 **** | |
--- 764,770 ---- | |
if (!rndis->notify_req->buf) | |
goto fail; | |
rndis->notify_req->length = STATUS_BYTECOUNT; | |
+ CSY_DBG("rndis->notify->>length=0x%x\n", rndis->notify_req->length); | |
rndis->notify_req->context = rndis; | |
rndis->notify_req->complete = rndis_response_complete; | |
*************** | |
*** 707,717 **** | |
rndis_set_param_medium(rndis->config, NDIS_MEDIUM_802_3, 0); | |
rndis_set_host_mac(rndis->config, rndis->ethaddr); | |
! #if 0 | |
! // FIXME | |
! if (rndis_set_param_vendor(rndis->config, vendorID, | |
! manufacturer)) | |
! goto fail0; | |
#endif | |
/* NOTE: all that is done without knowing or caring about | |
--- 817,828 ---- | |
rndis_set_param_medium(rndis->config, NDIS_MEDIUM_802_3, 0); | |
rndis_set_host_mac(rndis->config, rndis->ethaddr); | |
! #ifdef CONFIG_USB_ANDROID_RNDIS | |
! if (rndis_pdata) { | |
! if (rndis_set_param_vendor(rndis->config, rndis_pdata->vendorID, | |
! rndis_pdata->vendorDescr)) | |
! goto fail; | |
! } | |
#endif | |
/* NOTE: all that is done without knowing or caring about | |
*************** | |
*** 816,828 **** | |
return status; | |
rndis_string_defs[1].id = status; | |
rndis_data_intf.iInterface = status; | |
! | |
/* IAD iFunction label */ | |
status = usb_string_id(c->cdev); | |
if (status < 0) | |
return status; | |
rndis_string_defs[2].id = status; | |
rndis_iad_descriptor.iFunction = status; | |
} | |
/* allocate and initialize one new instance */ | |
--- 927,942 ---- | |
return status; | |
rndis_string_defs[1].id = status; | |
rndis_data_intf.iInterface = status; | |
! #ifdef CSY_SAMSUNG_NO_IAD | |
! /* Nothing to do */ | |
! #else | |
/* IAD iFunction label */ | |
status = usb_string_id(c->cdev); | |
if (status < 0) | |
return status; | |
rndis_string_defs[2].id = status; | |
rndis_iad_descriptor.iFunction = status; | |
+ #endif | |
} | |
/* allocate and initialize one new instance */ | |
*************** | |
*** 850,855 **** | |
--- 964,974 ---- | |
rndis->port.func.setup = rndis_setup; | |
rndis->port.func.disable = rndis_disable; | |
+ #ifdef CONFIG_USB_ANDROID_RNDIS | |
+ /* start disabled */ | |
+ rndis->port.func.disabled = 1; | |
+ #endif | |
+ | |
status = usb_add_function(c, &rndis->port.func); | |
if (status) { | |
kfree(rndis); | |
*************** | |
*** 858,860 **** | |
--- 977,1036 ---- | |
} | |
return status; | |
} | |
+ | |
+ #ifdef CONFIG_USB_ANDROID_RNDIS | |
+ #include "rndis.c" | |
+ | |
+ static int rndis_probe(struct platform_device *pdev) | |
+ { | |
+ rndis_pdata = pdev->dev.platform_data; | |
+ return 0; | |
+ } | |
+ | |
+ static struct platform_driver rndis_platform_driver = { | |
+ .driver = { .name = "rndis", }, | |
+ .probe = rndis_probe, | |
+ }; | |
+ | |
+ int rndis_function_bind_config(struct usb_configuration *c) | |
+ { | |
+ int ret; | |
+ | |
+ if (!rndis_pdata) { | |
+ printk(KERN_ERR "rndis_pdata null in rndis_function_bind_config\n"); | |
+ return -1; | |
+ } | |
+ #ifdef CSY_SAMSUNG | |
+ CSY_DBG( | |
+ #else | |
+ printk(KERN_INFO | |
+ #endif | |
+ "rndis_function_bind_config MAC: %02X:%02X:%02X:%02X:%02X:%02X\n", | |
+ rndis_pdata->ethaddr[0], rndis_pdata->ethaddr[1], | |
+ rndis_pdata->ethaddr[2], rndis_pdata->ethaddr[3], | |
+ rndis_pdata->ethaddr[4], rndis_pdata->ethaddr[5]); | |
+ | |
+ ret = gether_setup(c->cdev->gadget, rndis_pdata->ethaddr); | |
+ CSY_DBG("gether_setup ret=%d\n",ret); | |
+ if (ret == 0){ | |
+ ret = rndis_bind_config(c, rndis_pdata->ethaddr); | |
+ CSY_DBG("rndis_bind_config ret=%d\n", ret); | |
+ } | |
+ return ret; | |
+ } | |
+ | |
+ static struct android_usb_function rndis_function = { | |
+ .name = "rndis", | |
+ .bind_config = rndis_function_bind_config, | |
+ }; | |
+ | |
+ static int __init init(void) | |
+ { | |
+ printk(KERN_INFO "f_rndis init\n"); | |
+ platform_driver_register(&rndis_platform_driver); | |
+ android_register_function(&rndis_function); | |
+ return 0; | |
+ } | |
+ module_init(init); | |
+ | |
+ #endif /* CONFIG_USB_ANDROID_RNDIS */ | |
diff -crB 2/drivers/usb/gadget/gadget_chips.h 1/drivers/usb/gadget/gadget_chips.h | |
*** 2/drivers/usb/gadget/gadget_chips.h 2012-09-24 11:44:01.210829719 +0530 | |
--- 1/drivers/usb/gadget/gadget_chips.h 2011-05-18 12:35:13.000000000 +0530 | |
*************** | |
*** 76,81 **** | |
--- 76,87 ---- | |
#define gadget_is_s3c2410(g) 0 | |
#endif | |
+ #if CONFIG_USB_GADGET_S3C_OTGD | |
+ #define gadget_is_s3c(g) !strcmp("s3c-udc", (g)->name) | |
+ #else | |
+ #define gadget_is_s3c(g) 0 | |
+ #endif | |
+ | |
#ifdef CONFIG_USB_GADGET_AT91 | |
#define gadget_is_at91(g) !strcmp("at91_udc", (g)->name) | |
#else | |
*************** | |
*** 200,205 **** | |
--- 206,213 ---- | |
return 0x25; | |
else if (gadget_is_s3c_hsotg(gadget)) | |
return 0x26; | |
+ else if (gadget_is_s3c(gadget)) | |
+ return 0x27; | |
return -ENOENT; | |
} | |
diff -crB 2/drivers/usb/gadget/Kconfig 1/drivers/usb/gadget/Kconfig | |
*** 2/drivers/usb/gadget/Kconfig 2012-09-24 11:44:01.214829646 +0530 | |
--- 1/drivers/usb/gadget/Kconfig 2011-05-18 12:35:13.000000000 +0530 | |
*************** | |
*** 112,117 **** | |
--- 112,118 ---- | |
choice | |
prompt "USB Peripheral Controller" | |
depends on USB_GADGET | |
+ default USB_GADGET_S3C_OTGD if (ARCH_S5PV210) | |
help | |
A USB device uses a controller to talk to its host. | |
Systems should have only one such upstream link. | |
*************** | |
*** 348,353 **** | |
--- 349,368 ---- | |
boolean "S3C2410 udc debug messages" | |
depends on USB_GADGET_S3C2410 | |
+ config USB_GADGET_S3C_OTGD | |
+ boolean "S3C HS USB OTG Device" | |
+ depends on (ARCH_S5PV210) && !(USB_S3C_OTG_HOST) | |
+ help | |
+ Samsung's S3C64XX processors include high speed USB OTG2.0 | |
+ controller. It has 15 configurable endpoints, as well as | |
+ endpoint zero (for control transfers). | |
+ | |
+ This driver has been tested on the S3C6410, S5P6440, S5PC100 processor. | |
+ | |
+ Say "y" to link the driver statically, or "m" to build a | |
+ dynamically linked module called "s3c-udc-otg" and force all | |
+ gadget drivers to also be dynamically linked. | |
+ | |
# | |
# Controllers available in both integrated and discrete versions | |
# | |
*************** | |
*** 544,549 **** | |
--- 559,601 ---- | |
endchoice | |
+ comment "NOTE: S3C OTG device role enables the controller driver below" | |
+ depends on USB_GADGET_S3C_OTGD | |
+ | |
+ config USB_S3C_OTGD | |
+ tristate "S3C high speed(2.0, dual-speed) USB OTG device" | |
+ depends on USB_GADGET && USB_GADGET_S3C_OTGD && !(USB_S3C_OTG_HOST) | |
+ default y | |
+ default USB_GADGET | |
+ select USB_GADGET_SELECTED | |
+ select USB_GADGET_DUALSPEED | |
+ help | |
+ Say "y" to link the driver statically, or "m" to build a | |
+ dynamically linked module called "s3c-udc-otg-hs" and force all | |
+ gadget drivers to also be dynamically linked. | |
+ | |
+ choice | |
+ prompt "S3C OTGD transfer mode" | |
+ depends on USB_S3C_OTGD | |
+ default y | |
+ help | |
+ S3C USB OTG conteroller supports DMA mode and Slave mode | |
+ for the dat transfer. You must slect one for the core | |
+ operation mode. | |
+ | |
+ config USB_GADGET_S3C_OTGD_DMA_MODE | |
+ bool "enabled DMA MODE" | |
+ depends on USB_GADGET_S3C_OTGD | |
+ help | |
+ S3C USB OTG core operates in DMA mode. | |
+ | |
+ config USB_GADGET_S3C_OTGD_SLAVE_MODE | |
+ bool "enabled Slave MODE" | |
+ depends on USB_GADGET_S3C_OTGD | |
+ help | |
+ S3C USB OTG core operates in Slave mode. | |
+ endchoice | |
+ | |
config USB_GADGET_DUALSPEED | |
bool | |
depends on USB_GADGET | |
*************** | |
*** 836,841 **** | |
--- 888,971 ---- | |
For more information, see Documentation/usb/gadget_printer.txt | |
which includes sample code for accessing the device file. | |
+ config USB_ANDROID | |
+ boolean "Android Gadget" | |
+ depends on SWITCH | |
+ help | |
+ The Android gadget driver supports multiple USB functions. | |
+ The functions can be configured via a board file and may be | |
+ enabled and disabled dynamically. | |
+ | |
+ config USB_ANDROID_ACM | |
+ boolean "Android gadget ACM serial function" | |
+ depends on USB_ANDROID | |
+ help | |
+ Provides ACM serial function for android gadget driver. | |
+ | |
+ config USB_DUN_SUPPORT | |
+ boolean "DUN support function" | |
+ depends on USB_ANDROID_ACM | |
+ help | |
+ Provides USB modem serial driver. | |
+ | |
+ config USB_ANDROID_ADB | |
+ boolean "Android gadget adb function" | |
+ depends on USB_ANDROID | |
+ help | |
+ Provides adb function for android gadget driver. | |
+ | |
+ config USB_ANDROID_MASS_STORAGE | |
+ boolean "Android gadget mass storage function" | |
+ depends on USB_ANDROID && SWITCH | |
+ help | |
+ Provides USB mass storage function for android gadget driver. | |
+ | |
+ config USB_ANDROID_MTP | |
+ boolean "Android MTP function" | |
+ depends on USB_ANDROID | |
+ help | |
+ Provides Media Transfer Protocol (MTP) support for android gadget driver. | |
+ | |
+ config USB_ANDROID_RNDIS | |
+ boolean "Android gadget RNDIS ethernet function" | |
+ depends on USB_ANDROID | |
+ help | |
+ Provides RNDIS ethernet function for android gadget driver. | |
+ | |
+ config USB_ANDROID_RNDIS_WCEIS | |
+ boolean "Use Windows Internet Sharing Class/SubClass/Protocol" | |
+ depends on USB_ANDROID_RNDIS | |
+ help | |
+ Causes the driver to look like a Windows-compatible Internet | |
+ Sharing device, so Windows auto-detects it. | |
+ | |
+ If you enable this option, the device is no longer CDC ethernet | |
+ compatible. | |
+ | |
+ config USB_ANDROID_SAMSUNG_COMPOSITE | |
+ boolean "Samsung Composite function" | |
+ depends on USB_ANDROID | |
+ help | |
+ Provides SAMSUNG composite driver using ACM, UMS, ADB, MTP, RNDIS | |
+ | |
+ config USB_ANDROID_SAMSUNG_ESCAPE | |
+ boolean "Use escape usb host driver in PC side." | |
+ depends on USB_ANDROID_SAMSUNG_COMPOSITE | |
+ help | |
+ If you enable this option, the device will setting custom IAD for Escape driver. | |
+ | |
+ config CONFIG_USB_ANDROID_SAMSUNG_RNDIS_WITH_MS_COMPOSITE | |
+ boolean "Use RNDIS with ms composite in PC side." | |
+ depends on USB_ANDROID_SAMSUNG_COMPOSITE | |
+ help | |
+ If you enable this option, the device will setting custom IAD for to use ms composite. | |
+ | |
+ config USB_ANDROID_SAMSUNG_MTP | |
+ boolean "Samsung MTP function" | |
+ depends on USB_ANDROID | |
+ help | |
+ Provides Media Transfer Protocol (MTP) support for samsung gadget driver. | |
+ | |
config USB_CDC_COMPOSITE | |
tristate "CDC Composite Device (Ethernet and ACM)" | |
depends on NET | |
diff -crB 2/drivers/usb/gadget/Makefile 1/drivers/usb/gadget/Makefile | |
*** 2/drivers/usb/gadget/Makefile 2012-09-24 11:44:01.214829646 +0530 | |
--- 1/drivers/usb/gadget/Makefile 2011-05-18 12:35:13.000000000 +0530 | |
*************** | |
*** 15,20 **** | |
--- 15,21 ---- | |
obj-$(CONFIG_USB_OMAP) += omap_udc.o | |
obj-$(CONFIG_USB_LH7A40X) += lh7a40x_udc.o | |
obj-$(CONFIG_USB_S3C2410) += s3c2410_udc.o | |
+ obj-$(CONFIG_USB_S3C_OTGD) += s3c_udc_otg.o | |
obj-$(CONFIG_USB_AT91) += at91_udc.o | |
obj-$(CONFIG_USB_ATMEL_USBA) += atmel_usba_udc.o | |
obj-$(CONFIG_USB_FSL_USB2) += fsl_usb2_udc.o | |
*************** | |
*** 64,66 **** | |
--- 65,77 ---- | |
obj-$(CONFIG_USB_G_NOKIA) += g_nokia.o | |
obj-$(CONFIG_USB_G_WEBCAM) += g_webcam.o | |
+ obj-$(CONFIG_USB_ANDROID) += android.o | |
+ obj-$(CONFIG_USB_ANDROID_ACM) += f_acm.o u_serial.o | |
+ obj-$(CONFIG_USB_DUN_SUPPORT) += serial_acm.o | |
+ obj-$(CONFIG_USB_ANDROID_ADB) += f_adb.o | |
+ obj-$(CONFIG_USB_ANDROID_MASS_STORAGE) += f_mass_storage.o | |
+ obj-$(CONFIG_USB_ANDROID_MTP) += f_mtp.o | |
+ obj-$(CONFIG_USB_ANDROID_SAMSUNG_MTP) += f_mtp_samsung.o | |
+ ifneq ($(CONFIG_ARIES_NTT),y) | |
+ obj-$(CONFIG_USB_ANDROID_RNDIS) += f_rndis.o u_ether.o | |
+ endif | |
Only in 1/drivers/usb/gadget: s3c_udc.h | |
Only in 1/drivers/usb/gadget: s3c_udc_otg.c | |
Only in 1/drivers/usb/gadget: s3c_udc_otg_xfer_dma.c | |
Only in 1/drivers/usb/gadget: serial_acm.c | |
diff -crB 2/drivers/usb/gadget/storage_common.c 1/drivers/usb/gadget/storage_common.c | |
*** 2/drivers/usb/gadget/storage_common.c 2012-09-24 11:44:01.210829719 +0530 | |
--- 1/drivers/usb/gadget/storage_common.c 2011-05-18 12:35:13.000000000 +0530 | |
*************** | |
*** 750,759 **** | |
--- 750,765 ---- | |
struct rw_semaphore *filesem = dev_get_drvdata(dev); | |
int rc = 0; | |
+ | |
+ #ifndef CONFIG_USB_ANDROID_MASS_STORAGE | |
+ /* disabled in android because we need to allow closing the backing file | |
+ * if the media was removed | |
+ */ | |
if (curlun->prevent_medium_removal && fsg_lun_is_open(curlun)) { | |
LDBG(curlun, "eject attempt prevented\n"); | |
return -EBUSY; /* "Door is locked" */ | |
} | |
+ #endif | |
/* Remove a trailing newline */ | |
if (count > 0 && buf[count-1] == '\n') | |
diff -crB 2/drivers/usb/gadget/u_ether.c 1/drivers/usb/gadget/u_ether.c | |
*** 2/drivers/usb/gadget/u_ether.c 2012-09-24 11:44:01.210829719 +0530 | |
--- 1/drivers/usb/gadget/u_ether.c 2011-05-18 12:35:13.000000000 +0530 | |
*************** | |
*** 240,246 **** | |
--- 240,251 ---- | |
size += out->maxpacket - 1; | |
size -= size % out->maxpacket; | |
+ #ifdef CONFIG_USB_GADGET_S3C_OTGD_DMA_MODE | |
+ /* for double word align */ | |
+ skb = alloc_skb(size + NET_IP_ALIGN + 6, gfp_flags); | |
+ #else | |
skb = alloc_skb(size + NET_IP_ALIGN, gfp_flags); | |
+ #endif | |
if (skb == NULL) { | |
DBG(dev, "no rx skb\n"); | |
goto enomem; | |
*************** | |
*** 250,256 **** | |
--- 255,266 ---- | |
* but on at least one, checksumming fails otherwise. Note: | |
* RNDIS headers involve variable numbers of LE32 values. | |
*/ | |
+ #ifdef CONFIG_USB_GADGET_S3C_OTGD_DMA_MODE | |
+ /* for double word align */ | |
+ skb_reserve(skb, NET_IP_ALIGN + 6); | |
+ #else | |
skb_reserve(skb, NET_IP_ALIGN); | |
+ #endif | |
req->buf = skb->data; | |
req->length = size; | |
*************** | |
*** 481,486 **** | |
--- 491,501 ---- | |
spin_unlock(&dev->req_lock); | |
dev_kfree_skb_any(skb); | |
+ #ifdef CONFIG_USB_GADGET_S3C_OTGD_DMA_MODE | |
+ if (req->buf != skb->data) | |
+ kfree(req->buf); | |
+ #endif | |
+ | |
atomic_dec(&dev->tx_qlen); | |
if (netif_carrier_ok(dev->net)) | |
netif_wake_queue(dev->net); | |
*************** | |
*** 574,580 **** | |
--- 589,609 ---- | |
length = skb->len; | |
} | |
+ | |
+ #ifdef CONFIG_USB_GADGET_S3C_OTGD_DMA_MODE | |
+ /* for double word align */ | |
+ req->buf = kmalloc(skb->len, GFP_ATOMIC | GFP_DMA); | |
+ | |
+ if (!req->buf) { | |
+ req->buf = skb->data; | |
+ printk("%s: fail to kmalloc [req->buf = skb->data]\n", __FUNCTION__); | |
+ } | |
+ else | |
+ memcpy((void *)req->buf, (void *)skb->data, skb->len); | |
+ #else | |
req->buf = skb->data; | |
+ #endif | |
+ | |
req->context = skb; | |
req->complete = tx_complete; | |
*************** | |
*** 582,589 **** | |
* though any robust network rx path ignores extra padding. | |
* and some hardware doesn't like to write zlps. | |
*/ | |
! req->zero = 1; | |
! if (!dev->zlp && (length % in->maxpacket) == 0) | |
length++; | |
req->length = length; | |
--- 611,619 ---- | |
* though any robust network rx path ignores extra padding. | |
* and some hardware doesn't like to write zlps. | |
*/ | |
! if (dev->zlp) | |
! req->zero = 1; | |
! else if (length % in->maxpacket == 0) | |
length++; | |
req->length = length; | |
*************** | |
*** 608,613 **** | |
--- 638,649 ---- | |
dev_kfree_skb_any(skb); | |
drop: | |
dev->net->stats.tx_dropped++; | |
+ | |
+ | |
+ #ifdef CONFIG_USB_GADGET_S3C_OTGD_DMA_MODE | |
+ if (req->buf != skb->data) | |
+ kfree(req->buf); | |
+ #endif | |
spin_lock_irqsave(&dev->req_lock, flags); | |
if (list_empty(&dev->tx_reqs)) | |
netif_start_queue(net); | |
*************** | |
*** 947,953 **** | |
struct eth_dev *dev = link->ioport; | |
struct usb_request *req; | |
- WARN_ON(!dev); | |
if (!dev) | |
return; | |
--- 983,988 ---- | |
diff -crB 2/drivers/usb/gadget/u_ether.h 1/drivers/usb/gadget/u_ether.h | |
*** 2/drivers/usb/gadget/u_ether.h 2012-09-24 11:44:01.214829646 +0530 | |
--- 1/drivers/usb/gadget/u_ether.h 2011-05-18 12:35:13.000000000 +0530 | |
*************** | |
*** 105,111 **** | |
int ecm_bind_config(struct usb_configuration *c, u8 ethaddr[ETH_ALEN]); | |
int eem_bind_config(struct usb_configuration *c); | |
! #ifdef USB_ETH_RNDIS | |
int rndis_bind_config(struct usb_configuration *c, u8 ethaddr[ETH_ALEN]); | |
--- 105,111 ---- | |
int ecm_bind_config(struct usb_configuration *c, u8 ethaddr[ETH_ALEN]); | |
int eem_bind_config(struct usb_configuration *c); | |
! #if defined(USB_ETH_RNDIS) || defined(CONFIG_USB_ANDROID_RNDIS) | |
int rndis_bind_config(struct usb_configuration *c, u8 ethaddr[ETH_ALEN]); | |
Only in 1/drivers/video/backlight: cmc623_pwm_bl.c | |
diff -crB 2/drivers/video/backlight/Kconfig 1/drivers/video/backlight/Kconfig | |
*** 2/drivers/video/backlight/Kconfig 2012-09-24 11:44:01.330827476 +0530 | |
--- 1/drivers/video/backlight/Kconfig 2011-05-18 12:35:14.000000000 +0530 | |
*************** | |
*** 307,312 **** | |
--- 307,330 ---- | |
If you have a backlight driven by a NXP PCF50633 MFD, say Y here to | |
enable its driver. | |
+ config BACKLIGHT_NT39411B | |
+ bool "NT39411 Backlight Driver" | |
+ depends on FB_S3C_LVDS | |
+ default n | |
+ help | |
+ | |
+ config BACKLIGHT_MDNIE_PWM | |
+ bool "mDNIe PWM Backlight Driver" | |
+ depends on FB_S3C_LVDS && FB_S3C_MDNIE | |
+ default n | |
+ help | |
+ | |
+ config BACKLIGHT_CMC623_PWM | |
+ bool "CMC623 PWM Backlight Driver" | |
+ depends on FB_S3C_LVDS && FB_S3C_CMC623 | |
+ default y | |
+ help | |
+ | |
endif # BACKLIGHT_CLASS_DEVICE | |
endif # BACKLIGHT_LCD_SUPPORT | |
diff -crB 2/drivers/video/backlight/Makefile 1/drivers/video/backlight/Makefile | |
*** 2/drivers/video/backlight/Makefile 2012-09-24 11:44:01.330827476 +0530 | |
--- 1/drivers/video/backlight/Makefile 2011-05-18 12:35:14.000000000 +0530 | |
*************** | |
*** 35,38 **** | |
--- 35,41 ---- | |
obj-$(CONFIG_BACKLIGHT_ADP8860) += adp8860_bl.o | |
obj-$(CONFIG_BACKLIGHT_88PM860X) += 88pm860x_bl.o | |
obj-$(CONFIG_BACKLIGHT_PCF50633) += pcf50633-backlight.o | |
+ obj-$(CONFIG_BACKLIGHT_NT39411B) += nt39411b_bl.o | |
+ obj-$(CONFIG_BACKLIGHT_MDNIE_PWM) += mdnie_pwm_bl.o | |
+ obj-$(CONFIG_BACKLIGHT_CMC623_PWM) += cmc623_pwm_bl.o | |
Only in 1/drivers/video/backlight: mdnie_pwm_bl.c | |
Only in 1/drivers/video/backlight: nt39411b_bl.c | |
diff -crB 2/drivers/video/Kconfig 1/drivers/video/Kconfig | |
*** 2/drivers/video/Kconfig 2012-09-24 11:44:01.330827476 +0530 | |
--- 1/drivers/video/Kconfig 2011-05-18 12:35:14.000000000 +0530 | |
*************** | |
*** 17,22 **** | |
--- 17,24 ---- | |
source "drivers/gpu/drm/Kconfig" | |
+ source "drivers/gpu/pvr/Kconfig" | |
+ | |
config VGASTATE | |
tristate | |
default n | |
*************** | |
*** 245,250 **** | |
--- 247,254 ---- | |
comment "Frame buffer hardware drivers" | |
depends on FB | |
+ source "drivers/video/samsung/Kconfig" | |
+ | |
config FB_CIRRUS | |
tristate "Cirrus Logic support" | |
depends on FB && (ZORRO || PCI) | |
*************** | |
*** 1928,1980 **** | |
depends on FB_TMIO | |
default y | |
- config FB_S3C | |
- tristate "Samsung S3C framebuffer support" | |
- depends on FB && ARCH_S3C64XX | |
- select FB_CFB_FILLRECT | |
- select FB_CFB_COPYAREA | |
- select FB_CFB_IMAGEBLIT | |
- ---help--- | |
- Frame buffer driver for the built-in FB controller in the Samsung | |
- SoC line from the S3C2443 onwards, including the S3C2416, S3C2450, | |
- and the S3C64XX series such as the S3C6400 and S3C6410. | |
- | |
- These chips all have the same basic framebuffer design with the | |
- actual capabilities depending on the chip. For instance the S3C6400 | |
- and S3C6410 support 4 hardware windows whereas the S3C24XX series | |
- currently only have two. | |
- | |
- Currently the support is only for the S3C6400 and S3C6410 SoCs. | |
- | |
- config FB_S3C_DEBUG_REGWRITE | |
- bool "Debug register writes" | |
- depends on FB_S3C | |
- ---help--- | |
- Show all register writes via printk(KERN_DEBUG) | |
- | |
- config FB_S3C2410 | |
- tristate "S3C2410 LCD framebuffer support" | |
- depends on FB && ARCH_S3C2410 | |
- select FB_CFB_FILLRECT | |
- select FB_CFB_COPYAREA | |
- select FB_CFB_IMAGEBLIT | |
- ---help--- | |
- Frame buffer driver for the built-in LCD controller in the Samsung | |
- S3C2410 processor. | |
- | |
- This driver is also available as a module ( = code which can be | |
- inserted and removed from the running kernel whenever you want). The | |
- module will be called s3c2410fb. If you want to compile it as a module, | |
- say M here and read <file:Documentation/kbuild/modules.txt>. | |
- | |
- If unsure, say N. | |
- config FB_S3C2410_DEBUG | |
- bool "S3C2410 lcd debug messages" | |
- depends on FB_S3C2410 | |
- help | |
- Turn on debugging messages. Note that you can set/unset at run time | |
- through sysfs | |
- | |
config FB_NUC900 | |
bool "NUC900 LCD framebuffer support" | |
depends on FB && ARCH_W90X900 | |
--- 1932,1937 ---- | |
Only in 2/drivers/video/logo: .gitignore | |
diff -crB 2/drivers/video/Makefile 1/drivers/video/Makefile | |
*** 2/drivers/video/Makefile 2012-09-24 11:44:01.330827476 +0530 | |
--- 1/drivers/video/Makefile 2011-05-18 12:35:14.000000000 +0530 | |
*************** | |
*** 113,119 **** | |
obj-$(CONFIG_FB_S1D13XXX) += s1d13xxxfb.o | |
obj-$(CONFIG_FB_SH7760) += sh7760fb.o | |
obj-$(CONFIG_FB_IMX) += imxfb.o | |
! obj-$(CONFIG_FB_S3C) += s3c-fb.o | |
obj-$(CONFIG_FB_S3C2410) += s3c2410fb.o | |
obj-$(CONFIG_FB_FSL_DIU) += fsl-diu-fb.o | |
obj-$(CONFIG_FB_COBALT) += cobalt_lcdfb.o | |
--- 113,119 ---- | |
obj-$(CONFIG_FB_S1D13XXX) += s1d13xxxfb.o | |
obj-$(CONFIG_FB_SH7760) += sh7760fb.o | |
obj-$(CONFIG_FB_IMX) += imxfb.o | |
! obj-$(CONFIG_FB_S3C) += samsung/ | |
obj-$(CONFIG_FB_S3C2410) += s3c2410fb.o | |
obj-$(CONFIG_FB_FSL_DIU) += fsl-diu-fb.o | |
obj-$(CONFIG_FB_COBALT) += cobalt_lcdfb.o | |
Only in 1/drivers/video: samsung | |
diff -crB 2/drivers/w1/w1.c 1/drivers/w1/w1.c | |
*** 2/drivers/w1/w1.c 2012-09-24 11:44:01.482824633 +0530 | |
--- 1/drivers/w1/w1.c 2011-05-18 12:35:16.000000000 +0530 | |
*************** | |
*** 517,526 **** | |
static W1_MASTER_ATTR_RO(attempts, S_IRUGO); | |
static W1_MASTER_ATTR_RO(timeout, S_IRUGO); | |
static W1_MASTER_ATTR_RO(pointer, S_IRUGO); | |
! static W1_MASTER_ATTR_RW(search, S_IRUGO | S_IWUGO); | |
! static W1_MASTER_ATTR_RW(pullup, S_IRUGO | S_IWUGO); | |
! static W1_MASTER_ATTR_RW(add, S_IRUGO | S_IWUGO); | |
! static W1_MASTER_ATTR_RW(remove, S_IRUGO | S_IWUGO); | |
static struct attribute *w1_master_default_attrs[] = { | |
&w1_master_attribute_name.attr, | |
--- 517,526 ---- | |
static W1_MASTER_ATTR_RO(attempts, S_IRUGO); | |
static W1_MASTER_ATTR_RO(timeout, S_IRUGO); | |
static W1_MASTER_ATTR_RO(pointer, S_IRUGO); | |
! static W1_MASTER_ATTR_RW(search, S_IRUGO | S_IWUSR | S_IWGRP); | |
! static W1_MASTER_ATTR_RW(pullup, S_IRUGO | S_IWUSR | S_IWGRP); | |
! static W1_MASTER_ATTR_RW(add, S_IRUGO | S_IWUSR | S_IWGRP); | |
! static W1_MASTER_ATTR_RW(remove, S_IRUGO | S_IWUSR | S_IWGRP); | |
static struct attribute *w1_master_default_attrs[] = { | |
&w1_master_attribute_name.attr, | |
diff -crB 2/drivers/watchdog/s3c2410_wdt.c 1/drivers/watchdog/s3c2410_wdt.c | |
*** 2/drivers/watchdog/s3c2410_wdt.c 2012-09-24 11:44:01.482824633 +0530 | |
--- 1/drivers/watchdog/s3c2410_wdt.c 2011-05-18 12:35:17.000000000 +0530 | |
*************** | |
*** 224,230 **** | |
{ | |
/* | |
* Shut off the timer. | |
! * Lock it in if it's a module and we set nowayout | |
*/ | |
if (expect_close == 42) | |
--- 224,230 ---- | |
{ | |
/* | |
* Shut off the timer. | |
! * Lock it in if it's a module and we set nowayout | |
*/ | |
if (expect_close == 42) | |
Only in 2/drivers/zorro: .gitignore | |
Only in 2/firmware/cis: .gitignore | |
Only in 2/firmware: .gitignore | |
diff -crB 2/firmware/Makefile 1/firmware/Makefile | |
*** 2/firmware/Makefile 2012-09-24 11:44:02.398807491 +0530 | |
--- 1/firmware/Makefile 2011-05-18 12:35:17.000000000 +0530 | |
*************** | |
*** 26,31 **** | |
--- 26,32 ---- | |
else | |
acenic-objs := acenic/tg1.bin acenic/tg2.bin | |
endif | |
+ fw-shipped-$(CONFIG_VIDEO_MFC50) += samsung_mfc_fw.bin | |
fw-shipped-$(CONFIG_3C359) += 3com/3C359.bin | |
fw-shipped-$(CONFIG_ACENIC) += $(acenic-objs) | |
fw-shipped-$(CONFIG_ADAPTEC_STARFIRE) += adaptec/starfire_rx.bin \ | |
Only in 1/firmware: samsung_mfc_fw.bin.ihex | |
diff -crB 2/fs/eventpoll.c 1/fs/eventpoll.c | |
*** 2/fs/eventpoll.c 2012-09-24 11:44:02.522805171 +0530 | |
--- 1/fs/eventpoll.c 2011-05-18 12:35:19.000000000 +0530 | |
*************** | |
*** 77,85 **** | |
/* Maximum number of nesting allowed inside epoll sets */ | |
#define EP_MAX_NESTS 4 | |
- /* Maximum msec timeout value storeable in a long int */ | |
- #define EP_MAX_MSTIMEO min(1000ULL * MAX_SCHEDULE_TIMEOUT / HZ, (LONG_MAX - 999ULL) / HZ) | |
- | |
#define EP_MAX_EVENTS (INT_MAX / sizeof(struct epoll_event)) | |
#define EP_UNACTIVE_PTR ((void *) -1L) | |
--- 77,82 ---- | |
*************** | |
*** 1116,1133 **** | |
static int ep_poll(struct eventpoll *ep, struct epoll_event __user *events, | |
int maxevents, long timeout) | |
{ | |
! int res, eavail; | |
unsigned long flags; | |
! long jtimeout; | |
wait_queue_t wait; | |
! /* | |
! * Calculate the timeout by checking for the "infinite" value (-1) | |
! * and the overflow condition. The passed timeout is in milliseconds, | |
! * that why (t * HZ) / 1000. | |
! */ | |
! jtimeout = (timeout < 0 || timeout >= EP_MAX_MSTIMEO) ? | |
! MAX_SCHEDULE_TIMEOUT : (timeout * HZ + 999) / 1000; | |
retry: | |
spin_lock_irqsave(&ep->lock, flags); | |
--- 1113,1134 ---- | |
static int ep_poll(struct eventpoll *ep, struct epoll_event __user *events, | |
int maxevents, long timeout) | |
{ | |
! int res, eavail, timed_out = 0; | |
unsigned long flags; | |
! long slack; | |
wait_queue_t wait; | |
+ struct timespec end_time; | |
+ ktime_t expires, *to = NULL; | |
! if (timeout > 0) { | |
! ktime_get_ts(&end_time); | |
! timespec_add_ns(&end_time, (u64)timeout * NSEC_PER_MSEC); | |
! slack = select_estimate_accuracy(&end_time); | |
! to = &expires; | |
! *to = timespec_to_ktime(end_time); | |
! } else if (timeout == 0) { | |
! timed_out = 1; | |
! } | |
retry: | |
spin_lock_irqsave(&ep->lock, flags); | |
*************** | |
*** 1149,1155 **** | |
* to TASK_INTERRUPTIBLE before doing the checks. | |
*/ | |
set_current_state(TASK_INTERRUPTIBLE); | |
! if (!list_empty(&ep->rdllist) || !jtimeout) | |
break; | |
if (signal_pending(current)) { | |
res = -EINTR; | |
--- 1150,1156 ---- | |
* to TASK_INTERRUPTIBLE before doing the checks. | |
*/ | |
set_current_state(TASK_INTERRUPTIBLE); | |
! if (!list_empty(&ep->rdllist) || timed_out) | |
break; | |
if (signal_pending(current)) { | |
res = -EINTR; | |
*************** | |
*** 1157,1163 **** | |
} | |
spin_unlock_irqrestore(&ep->lock, flags); | |
! jtimeout = schedule_timeout(jtimeout); | |
spin_lock_irqsave(&ep->lock, flags); | |
} | |
__remove_wait_queue(&ep->wq, &wait); | |
--- 1158,1166 ---- | |
} | |
spin_unlock_irqrestore(&ep->lock, flags); | |
! if (!schedule_hrtimeout_range(to, slack, HRTIMER_MODE_ABS)) | |
! timed_out = 1; | |
! | |
spin_lock_irqsave(&ep->lock, flags); | |
} | |
__remove_wait_queue(&ep->wq, &wait); | |
*************** | |
*** 1175,1181 **** | |
* more luck. | |
*/ | |
if (!res && eavail && | |
! !(res = ep_send_events(ep, events, maxevents)) && jtimeout) | |
goto retry; | |
return res; | |
--- 1178,1184 ---- | |
* more luck. | |
*/ | |
if (!res && eavail && | |
! !(res = ep_send_events(ep, events, maxevents)) && !timed_out) | |
goto retry; | |
return res; | |
diff -crB 2/fs/fat/dir.c 1/fs/fat/dir.c | |
*** 2/fs/fat/dir.c 2012-09-24 11:44:02.422807041 +0530 | |
--- 1/fs/fat/dir.c 2011-05-18 12:35:20.000000000 +0530 | |
*************** | |
*** 753,758 **** | |
--- 753,765 ---- | |
return ret; | |
} | |
+ static int fat_ioctl_volume_id(struct inode *dir) | |
+ { | |
+ struct super_block *sb = dir->i_sb; | |
+ struct msdos_sb_info *sbi = MSDOS_SB(sb); | |
+ return sbi->vol_id; | |
+ } | |
+ | |
static long fat_dir_ioctl(struct file *filp, unsigned int cmd, | |
unsigned long arg) | |
{ | |
*************** | |
*** 769,774 **** | |
--- 776,783 ---- | |
short_only = 0; | |
both = 1; | |
break; | |
+ case VFAT_IOCTL_GET_VOLUME_ID: | |
+ return fat_ioctl_volume_id(inode); | |
default: | |
return fat_generic_ioctl(filp, cmd, arg); | |
} | |
diff -crB 2/fs/fat/fat.h 1/fs/fat/fat.h | |
*** 2/fs/fat/fat.h 2012-09-24 11:44:02.422807041 +0530 | |
--- 1/fs/fat/fat.h 2011-05-18 12:35:20.000000000 +0530 | |
*************** | |
*** 78,83 **** | |
--- 78,84 ---- | |
const void *dir_ops; /* Opaque; default directory operations */ | |
int dir_per_block; /* dir entries per block */ | |
int dir_per_block_bits; /* log2(dir_per_block) */ | |
+ unsigned long vol_id; /* volume ID */ | |
int fatent_shift; | |
struct fatent_operations *fatent_ops; | |
diff -crB 2/fs/fat/inode.c 1/fs/fat/inode.c | |
*** 2/fs/fat/inode.c 2012-09-24 11:44:02.422807041 +0530 | |
--- 1/fs/fat/inode.c 2011-05-18 12:35:20.000000000 +0530 | |
*************** | |
*** 1249,1254 **** | |
--- 1249,1255 ---- | |
struct inode *root_inode = NULL, *fat_inode = NULL; | |
struct buffer_head *bh; | |
struct fat_boot_sector *b; | |
+ struct fat_boot_bsx *bsx; | |
struct msdos_sb_info *sbi; | |
u16 logical_sector_size; | |
u32 total_sectors, total_clusters, fat_clusters, rootdir_sectors; | |
*************** | |
*** 1393,1398 **** | |
--- 1394,1401 ---- | |
goto out_fail; | |
} | |
+ bsx = (struct fat_boot_bsx *)(bh->b_data + FAT32_BSX_OFFSET); | |
+ | |
fsinfo = (struct fat_boot_fsinfo *)fsinfo_bh->b_data; | |
if (!IS_FSINFO(fsinfo)) { | |
printk(KERN_WARNING "FAT: Invalid FSINFO signature: " | |
*************** | |
*** 1408,1415 **** | |
--- 1411,1424 ---- | |
} | |
brelse(fsinfo_bh); | |
+ } else { | |
+ bsx = (struct fat_boot_bsx *)(bh->b_data + FAT16_BSX_OFFSET); | |
} | |
+ /* interpret volume ID as a little endian 32 bit integer */ | |
+ sbi->vol_id = (((u32)bsx->vol_id[0]) | ((u32)bsx->vol_id[1] << 8) | | |
+ ((u32)bsx->vol_id[2] << 16) | ((u32)bsx->vol_id[3] << 24)); | |
+ | |
sbi->dir_per_block = sb->s_blocksize / sizeof(struct msdos_dir_entry); | |
sbi->dir_per_block_bits = ffs(sbi->dir_per_block) - 1; | |
diff -crB 2/fs/fs-writeback.c 1/fs/fs-writeback.c | |
*** 2/fs/fs-writeback.c 2012-09-24 11:44:02.426806966 +0530 | |
--- 1/fs/fs-writeback.c 2011-05-18 12:35:20.000000000 +0530 | |
*************** | |
*** 910,916 **** | |
if ((inode->i_state & flags) == flags) | |
return; | |
! if (unlikely(block_dump)) | |
block_dump___mark_inode_dirty(inode); | |
spin_lock(&inode_lock); | |
--- 910,916 ---- | |
if ((inode->i_state & flags) == flags) | |
return; | |
! if (unlikely(block_dump > 1)) | |
block_dump___mark_inode_dirty(inode); | |
spin_lock(&inode_lock); | |
diff -crB 2/fs/Kconfig 1/fs/Kconfig | |
*** 2/fs/Kconfig 2012-09-24 11:44:02.522805171 +0530 | |
--- 1/fs/Kconfig 2011-05-18 12:52:48.000000000 +0530 | |
*************** | |
*** 174,179 **** | |
--- 174,183 ---- | |
source "fs/befs/Kconfig" | |
source "fs/bfs/Kconfig" | |
source "fs/efs/Kconfig" | |
+ | |
+ # Patched by YAFFS | |
+ source "fs/yaffs2/Kconfig" | |
+ | |
source "fs/jffs2/Kconfig" | |
# UBIFS File system configuration | |
source "fs/ubifs/Kconfig" | |
diff -crB 2/fs/Makefile 1/fs/Makefile | |
*** 2/fs/Makefile 2012-09-24 11:44:02.526805096 +0530 | |
--- 1/fs/Makefile 2011-05-18 12:42:39.000000000 +0530 | |
*************** | |
*** 126,128 **** | |
--- 126,131 ---- | |
obj-$(CONFIG_GFS2_FS) += gfs2/ | |
obj-$(CONFIG_EXOFS_FS) += exofs/ | |
obj-$(CONFIG_CEPH_FS) += ceph/ | |
+ | |
+ # Patched by YAFFS | |
+ obj-$(CONFIG_YAFFS_FS) += yaffs2/ | |
diff -crB 2/fs/partitions/check.c 1/fs/partitions/check.c | |
*** 2/fs/partitions/check.c 2012-09-24 11:44:02.554804573 +0530 | |
--- 1/fs/partitions/check.c 2011-05-18 12:35:22.000000000 +0530 | |
*************** | |
*** 21,26 **** | |
--- 21,27 ---- | |
#include <linux/ctype.h> | |
#include <linux/genhd.h> | |
#include <linux/blktrace_api.h> | |
+ #include <linux/vmalloc.h> | |
#include "check.h" | |
*************** | |
*** 162,169 **** | |
--- 163,176 ---- | |
int i, res, err; | |
state = kzalloc(sizeof(struct parsed_partitions), GFP_KERNEL); | |
+ if (!state) { | |
+ state = (struct parsed_partitions *)vmalloc(sizeof(struct parsed_partitions)); | |
if (!state) | |
return NULL; | |
+ memset(state, 0, sizeof(struct parsed_partitions)); | |
+ state->is_kzalloc = false; | |
+ } else | |
+ state->is_kzalloc = true; | |
state->bdev = bdev; | |
disk_name(hd, 0, state->name); | |
*************** | |
*** 196,202 **** | |
--- 203,214 ---- | |
printk(" unknown partition table\n"); | |
else if (warn_no_part) | |
printk(" unable to read partition table\n"); | |
+ | |
+ if (state->is_kzalloc) | |
kfree(state); | |
+ else | |
+ vfree(state); | |
+ | |
return ERR_PTR(res); | |
} | |
*************** | |
*** 272,277 **** | |
--- 284,296 ---- | |
return sprintf(buf, "%8u %8u\n", p->in_flight[0], p->in_flight[1]); | |
} | |
+ ssize_t part_partition_name_show(struct device *dev, | |
+ struct device_attribute *attr, char *buf) | |
+ { | |
+ struct hd_struct *p = dev_to_part(dev); | |
+ return sprintf(buf, "%s\n", p->partition_name); | |
+ } | |
+ | |
#ifdef CONFIG_FAIL_MAKE_REQUEST | |
ssize_t part_fail_show(struct device *dev, | |
struct device_attribute *attr, char *buf) | |
*************** | |
*** 303,308 **** | |
--- 322,329 ---- | |
NULL); | |
static DEVICE_ATTR(stat, S_IRUGO, part_stat_show, NULL); | |
static DEVICE_ATTR(inflight, S_IRUGO, part_inflight_show, NULL); | |
+ static DEVICE_ATTR(partition_name, S_IRUGO, part_partition_name_show, NULL); | |
+ | |
#ifdef CONFIG_FAIL_MAKE_REQUEST | |
static struct device_attribute dev_attr_fail = | |
__ATTR(make-it-fail, S_IRUGO|S_IWUSR, part_fail_show, part_fail_store); | |
*************** | |
*** 316,321 **** | |
--- 337,343 ---- | |
&dev_attr_discard_alignment.attr, | |
&dev_attr_stat.attr, | |
&dev_attr_inflight.attr, | |
+ &dev_attr_partition_name.attr, | |
#ifdef CONFIG_FAIL_MAKE_REQUEST | |
&dev_attr_fail.attr, | |
#endif | |
*************** | |
*** 341,350 **** | |
--- 363,383 ---- | |
kfree(p); | |
} | |
+ static int part_uevent(struct device *dev, struct kobj_uevent_env *env) | |
+ { | |
+ struct hd_struct *part = dev_to_part(dev); | |
+ | |
+ add_uevent_var(env, "PARTN=%u", part->partno); | |
+ if (part->partition_name) | |
+ add_uevent_var(env, "PARTNAME=%s", part->partition_name); | |
+ return 0; | |
+ } | |
+ | |
struct device_type part_type = { | |
.name = "partition", | |
.groups = part_attr_groups, | |
.release = part_release, | |
+ .uevent = part_uevent, | |
}; | |
static void delete_partition_rcu_cb(struct rcu_head *head) | |
*************** | |
*** 386,391 **** | |
--- 419,429 ---- | |
static DEVICE_ATTR(whole_disk, S_IRUSR | S_IRGRP | S_IROTH, | |
whole_disk_show, NULL); | |
+ static void name_partition(struct hd_struct *p, const char *name) | |
+ { | |
+ strlcpy(p->partition_name, name, GENHD_PART_NAME_SIZE); | |
+ } | |
+ | |
struct hd_struct *add_partition(struct gendisk *disk, int partno, | |
sector_t start, sector_t len, int flags) | |
{ | |
*************** | |
*** 565,571 **** | |
--- 603,613 ---- | |
int p, highest, res; | |
rescan: | |
if (state && !IS_ERR(state)) { | |
+ if (state->is_kzalloc) | |
kfree(state); | |
+ else | |
+ vfree(state); | |
+ | |
state = NULL; | |
} | |
*************** | |
*** 669,680 **** | |
--- 711,728 ---- | |
disk->disk_name, p, -PTR_ERR(part)); | |
continue; | |
} | |
+ name_partition(part, state->parts[p].name); | |
#ifdef CONFIG_BLK_DEV_MD | |
if (state->parts[p].flags & ADDPART_FLAG_RAID) | |
md_autodetect_dev(part_to_dev(part)->devt); | |
#endif | |
} | |
+ | |
+ if (state->is_kzalloc) | |
kfree(state); | |
+ else | |
+ vfree(state); | |
+ | |
return 0; | |
} | |
diff -crB 2/fs/partitions/check.h 1/fs/partitions/check.h | |
*** 2/fs/partitions/check.h 2012-09-24 11:44:02.554804573 +0530 | |
--- 1/fs/partitions/check.h 2011-05-18 12:35:22.000000000 +0530 | |
*************** | |
*** 1,6 **** | |
--- 1,8 ---- | |
#include <linux/pagemap.h> | |
#include <linux/blkdev.h> | |
+ #define PART_NAME_SIZE 128 | |
+ | |
/* | |
* add_gd_partition adds a partitions details to the devices partition | |
* description. | |
*************** | |
*** 12,21 **** | |
--- 14,25 ---- | |
sector_t from; | |
sector_t size; | |
int flags; | |
+ char name[PART_NAME_SIZE]; | |
} parts[DISK_MAX_PARTS]; | |
int next; | |
int limit; | |
bool access_beyond_eod; | |
+ bool is_kzalloc; | |
}; | |
static inline void *read_part_sector(struct parsed_partitions *state, | |
*************** | |
*** 29,42 **** | |
} | |
static inline void | |
! put_partition(struct parsed_partitions *p, int n, sector_t from, sector_t size) | |
{ | |
if (n < p->limit) { | |
p->parts[n].from = from; | |
p->parts[n].size = size; | |
printk(" %s%d", p->name, n); | |
} | |
} | |
extern int warn_no_part; | |
--- 33,60 ---- | |
} | |
static inline void | |
! put_named_partition(struct parsed_partitions *p, int n, sector_t from, | |
! sector_t size, const char *name, size_t name_size) | |
{ | |
if (n < p->limit) { | |
p->parts[n].from = from; | |
p->parts[n].size = size; | |
printk(" %s%d", p->name, n); | |
+ if (name) { | |
+ if (name_size > PART_NAME_SIZE - 1) | |
+ name_size = PART_NAME_SIZE - 1; | |
+ memcpy(p->parts[n].name, name, name_size); | |
+ p->parts[n].name[name_size] = 0; | |
+ printk(" (%s)", p->parts[n].name); | |
+ } | |
} | |
} | |
+ static inline void | |
+ put_partition(struct parsed_partitions *p, int n, sector_t from, sector_t size) | |
+ { | |
+ put_named_partition(p, n, from, size, NULL, 0); | |
+ } | |
+ | |
extern int warn_no_part; | |
diff -crB 2/fs/partitions/efi.c 1/fs/partitions/efi.c | |
*** 2/fs/partitions/efi.c 2012-09-24 11:44:02.554804573 +0530 | |
--- 1/fs/partitions/efi.c 2011-05-18 12:35:22.000000000 +0530 | |
*************** | |
*** 602,608 **** | |
{ | |
gpt_header *gpt = NULL; | |
gpt_entry *ptes = NULL; | |
! u32 i; | |
unsigned ssz = bdev_logical_block_size(state->bdev) / 512; | |
if (!find_valid_gpt(state, &gpt, &ptes) || !gpt || !ptes) { | |
--- 602,608 ---- | |
{ | |
gpt_header *gpt = NULL; | |
gpt_entry *ptes = NULL; | |
! u32 i, j; | |
unsigned ssz = bdev_logical_block_size(state->bdev) / 512; | |
if (!find_valid_gpt(state, &gpt, &ptes) || !gpt || !ptes) { | |
*************** | |
*** 617,627 **** | |
u64 start = le64_to_cpu(ptes[i].starting_lba); | |
u64 size = le64_to_cpu(ptes[i].ending_lba) - | |
le64_to_cpu(ptes[i].starting_lba) + 1ULL; | |
if (!is_pte_valid(&ptes[i], last_lba(state->bdev))) | |
continue; | |
! put_partition(state, i+1, start * ssz, size * ssz); | |
/* If this is a RAID volume, tell md */ | |
if (!efi_guidcmp(ptes[i].partition_type_guid, | |
--- 617,633 ---- | |
u64 start = le64_to_cpu(ptes[i].starting_lba); | |
u64 size = le64_to_cpu(ptes[i].ending_lba) - | |
le64_to_cpu(ptes[i].starting_lba) + 1ULL; | |
+ u8 name[sizeof(ptes->partition_name) / sizeof(efi_char16_t)]; | |
if (!is_pte_valid(&ptes[i], last_lba(state->bdev))) | |
continue; | |
! /* Truncate to ASCII. UTF8 might be better... */ | |
! for (j = 0; j < sizeof(name); j++) | |
! name[j] = ptes[i].partition_name[j] & 0x7f; | |
! | |
! put_named_partition(state, i+1, start * ssz, size * ssz, | |
! name, strnlen(name, sizeof(name))); | |
/* If this is a RAID volume, tell md */ | |
if (!efi_guidcmp(ptes[i].partition_type_guid, | |
diff -crB 2/fs/proc/base.c 1/fs/proc/base.c | |
*** 2/fs/proc/base.c 2012-09-24 11:44:02.510805393 +0530 | |
--- 1/fs/proc/base.c 2011-05-18 12:35:23.000000000 +0530 | |
*************** | |
*** 129,134 **** | |
--- 129,140 ---- | |
NULL, &proc_single_file_operations, \ | |
{ .proc_show = show } ) | |
+ /* ANDROID is for special files in /proc. */ | |
+ #define ANDROID(NAME, MODE, OTYPE) \ | |
+ NOD(NAME, (S_IFREG|(MODE)), \ | |
+ &proc_##OTYPE##_inode_operations, \ | |
+ &proc_##OTYPE##_operations, {}) | |
+ | |
/* | |
* Count the number of hardlinks for the pid_entry table, excluding the . | |
* and .. links. | |
*************** | |
*** 230,236 **** | |
mm = get_task_mm(task); | |
if (mm && mm != current->mm && | |
! !ptrace_may_access(task, PTRACE_MODE_READ)) { | |
mmput(mm); | |
mm = NULL; | |
} | |
--- 236,243 ---- | |
mm = get_task_mm(task); | |
if (mm && mm != current->mm && | |
! !ptrace_may_access(task, PTRACE_MODE_READ) && | |
! !capable(CAP_SYS_RESOURCE)) { | |
mmput(mm); | |
mm = NULL; | |
} | |
*************** | |
*** 1047,1052 **** | |
--- 1054,1086 ---- | |
return count; | |
} | |
+ static int oom_adjust_permission(struct inode *inode, int mask) | |
+ { | |
+ uid_t uid; | |
+ struct task_struct *p = get_proc_task(inode); | |
+ if(p) { | |
+ uid = task_uid(p); | |
+ put_task_struct(p); | |
+ } | |
+ | |
+ /* | |
+ * System Server (uid == 1000) is granted access to oom_adj of all | |
+ * android applications (uid > 10000) as and services (uid >= 1000) | |
+ */ | |
+ if (p && (current_fsuid() == 1000) && (uid >= 1000)) { | |
+ if (inode->i_mode >> 6 & mask) { | |
+ return 0; | |
+ } | |
+ } | |
+ | |
+ /* Fall back to default. */ | |
+ return generic_permission(inode, mask, NULL); | |
+ } | |
+ | |
+ static const struct inode_operations proc_oom_adjust_inode_operations = { | |
+ .permission = oom_adjust_permission, | |
+ }; | |
+ | |
static const struct file_operations proc_oom_adjust_operations = { | |
.read = oom_adjust_read, | |
.write = oom_adjust_write, | |
*************** | |
*** 2624,2630 **** | |
REG("cgroup", S_IRUGO, proc_cgroup_operations), | |
#endif | |
INF("oom_score", S_IRUGO, proc_oom_score), | |
! REG("oom_adj", S_IRUGO|S_IWUSR, proc_oom_adjust_operations), | |
#ifdef CONFIG_AUDITSYSCALL | |
REG("loginuid", S_IWUSR|S_IRUGO, proc_loginuid_operations), | |
REG("sessionid", S_IRUGO, proc_sessionid_operations), | |
--- 2658,2664 ---- | |
REG("cgroup", S_IRUGO, proc_cgroup_operations), | |
#endif | |
INF("oom_score", S_IRUGO, proc_oom_score), | |
! ANDROID("oom_adj",S_IRUGO|S_IWUSR, oom_adjust), | |
#ifdef CONFIG_AUDITSYSCALL | |
REG("loginuid", S_IWUSR|S_IRUGO, proc_loginuid_operations), | |
REG("sessionid", S_IRUGO, proc_sessionid_operations), | |
diff -crB 2/fs/select.c 1/fs/select.c | |
*** 2/fs/select.c 2012-09-24 11:44:02.522805171 +0530 | |
--- 1/fs/select.c 2011-05-18 12:35:24.000000000 +0530 | |
*************** | |
*** 67,73 **** | |
return slack; | |
} | |
! static long estimate_accuracy(struct timespec *tv) | |
{ | |
unsigned long ret; | |
struct timespec now; | |
--- 67,73 ---- | |
return slack; | |
} | |
! long select_estimate_accuracy(struct timespec *tv) | |
{ | |
unsigned long ret; | |
struct timespec now; | |
*************** | |
*** 417,423 **** | |
} | |
if (end_time && !timed_out) | |
! slack = estimate_accuracy(end_time); | |
retval = 0; | |
for (;;) { | |
--- 417,423 ---- | |
} | |
if (end_time && !timed_out) | |
! slack = select_estimate_accuracy(end_time); | |
retval = 0; | |
for (;;) { | |
*************** | |
*** 769,775 **** | |
} | |
if (end_time && !timed_out) | |
! slack = estimate_accuracy(end_time); | |
for (;;) { | |
struct poll_list *walk; | |
--- 769,775 ---- | |
} | |
if (end_time && !timed_out) | |
! slack = select_estimate_accuracy(end_time); | |
for (;;) { | |
struct poll_list *walk; | |
Only in 1/fs: yaffs2 | |
Only in 1/include/linux: akm8975.h | |
diff -crB 2/include/linux/amba/mmci.h 1/include/linux/amba/mmci.h | |
*** 2/include/linux/amba/mmci.h 2012-09-24 11:44:02.574804197 +0530 | |
--- 1/include/linux/amba/mmci.h 2011-05-18 12:35:25.000000000 +0530 | |
*************** | |
*** 5,10 **** | |
--- 5,19 ---- | |
#define AMBA_MMCI_H | |
#include <linux/mmc/host.h> | |
+ #include <linux/mmc/card.h> | |
+ #include <linux/mmc/sdio_func.h> | |
+ | |
+ struct embedded_sdio_data { | |
+ struct sdio_cis cis; | |
+ struct sdio_cccr cccr; | |
+ struct sdio_embedded_func *funcs; | |
+ int num_funcs; | |
+ }; | |
/** | |
* struct mmci_platform_data - platform configuration for the MMCI | |
*************** | |
*** 34,39 **** | |
--- 43,51 ---- | |
int gpio_wp; | |
int gpio_cd; | |
unsigned long capabilities; | |
+ unsigned int status_irq; | |
+ struct embedded_sdio_data *embedded_sdio; | |
+ int (*register_status_notify)(void (*callback)(int card_present, void *dev_id), void *dev_id); | |
}; | |
#endif | |
Only in 1/include/linux: android_aid.h | |
Only in 1/include/linux: android_alarm.h | |
Only in 1/include/linux: android_pmem.h | |
Only in 1/include/linux: ashmem.h | |
Only in 1/include/linux: bh1721.h | |
Only in 1/include/linux: cpuacct.h | |
Only in 1/include/linux: earlysuspend.h | |
Only in 1/include/linux: fsa9480.h | |
Only in 1/include/linux: fsr_if.h | |
diff -crB 2/include/linux/genhd.h 1/include/linux/genhd.h | |
*** 2/include/linux/genhd.h 2012-09-24 11:44:02.610803523 +0530 | |
--- 1/include/linux/genhd.h 2011-05-18 12:35:26.000000000 +0530 | |
*************** | |
*** 21,26 **** | |
--- 21,28 ---- | |
#define disk_to_dev(disk) (&(disk)->part0.__dev) | |
#define part_to_dev(part) (&((part)->__dev)) | |
+ #define GENHD_PART_NAME_SIZE 128 | |
+ | |
extern struct device_type part_type; | |
extern struct kobject *block_depr; | |
extern struct class block_class; | |
*************** | |
*** 106,111 **** | |
--- 108,114 ---- | |
struct disk_stats dkstats; | |
#endif | |
struct rcu_head rcu_head; | |
+ char partition_name[GENHD_PART_NAME_SIZE]; | |
}; | |
#define GENHD_FL_REMOVABLE 1 | |
Only in 1/include/linux: gp2a.h | |
Only in 1/include/linux: gpio_event.h | |
diff -crB 2/include/linux/gpio_keys.h 1/include/linux/gpio_keys.h | |
*** 2/include/linux/gpio_keys.h 2012-09-24 11:44:02.606803598 +0530 | |
--- 1/include/linux/gpio_keys.h 2011-05-18 12:35:26.000000000 +0530 | |
*************** | |
*** 11,16 **** | |
--- 11,19 ---- | |
int wakeup; /* configure the button as a wake-up source */ | |
int debounce_interval; /* debounce ticks interval in msecs */ | |
bool can_disable; | |
+ #if defined(CONFIG_KEYBOARD_GPIO) | |
+ bool pressed; | |
+ #endif | |
}; | |
struct gpio_keys_platform_data { | |
Only in 1/include/linux/i2c: ak8973.h | |
Only in 1/include/linux/i2c: l3g4200d.h | |
Only in 1/include/linux: if_pppolac.h | |
Only in 1/include/linux: if_pppopns.h | |
diff -crB 2/include/linux/if_pppox.h 1/include/linux/if_pppox.h | |
*** 2/include/linux/if_pppox.h 2012-09-24 11:44:02.562804421 +0530 | |
--- 1/include/linux/if_pppox.h 2011-05-18 12:35:26.000000000 +0530 | |
*************** | |
*** 27,32 **** | |
--- 27,34 ---- | |
#include <linux/ppp_channel.h> | |
#endif /* __KERNEL__ */ | |
#include <linux/if_pppol2tp.h> | |
+ #include <linux/if_pppolac.h> | |
+ #include <linux/if_pppopns.h> | |
/* For user-space programs to pick up these definitions | |
* which they wouldn't get otherwise without defining __KERNEL__ | |
*************** | |
*** 51,57 **** | |
*/ | |
#define PX_PROTO_OE 0 /* Currently just PPPoE */ | |
#define PX_PROTO_OL2TP 1 /* Now L2TP also */ | |
! #define PX_MAX_PROTO 2 | |
struct sockaddr_pppox { | |
sa_family_t sa_family; /* address family, AF_PPPOX */ | |
--- 53,61 ---- | |
*/ | |
#define PX_PROTO_OE 0 /* Currently just PPPoE */ | |
#define PX_PROTO_OL2TP 1 /* Now L2TP also */ | |
! #define PX_PROTO_OLAC 2 | |
! #define PX_PROTO_OPNS 3 | |
! #define PX_MAX_PROTO 4 | |
struct sockaddr_pppox { | |
sa_family_t sa_family; /* address family, AF_PPPOX */ | |
*************** | |
*** 150,155 **** | |
--- 154,175 ---- | |
relayed to (PPPoE relaying) */ | |
}; | |
+ struct pppolac_opt { | |
+ __u32 local; | |
+ __u32 remote; | |
+ __u16 sequence; | |
+ __u8 sequencing; | |
+ int (*backlog_rcv)(struct sock *sk_udp, struct sk_buff *skb); | |
+ }; | |
+ | |
+ struct pppopns_opt { | |
+ __u16 local; | |
+ __u16 remote; | |
+ __u32 sequence; | |
+ void (*data_ready)(struct sock *sk_raw, int length); | |
+ int (*backlog_rcv)(struct sock *sk_raw, struct sk_buff *skb); | |
+ }; | |
+ | |
#include <net/sock.h> | |
struct pppox_sock { | |
*************** | |
*** 159,164 **** | |
--- 179,186 ---- | |
struct pppox_sock *next; /* for hash table */ | |
union { | |
struct pppoe_opt pppoe; | |
+ struct pppolac_opt lac; | |
+ struct pppopns_opt pns; | |
} proto; | |
__be16 num; | |
}; | |
Only in 1/include/linux/input: cypress-touchkey.h | |
Only in 1/include/linux/input: k3g.h | |
Only in 1/include/linux/input: mxt224.h | |
Only in 1/include/linux: kernel_debugger.h | |
Only in 1/include/linux: kernel_sec_common.h | |
Only in 1/include/linux: keychord.h | |
Only in 1/include/linux: keyreset.h | |
Only in 1/include/linux: kr3dm.h | |
diff -crB 2/include/linux/max17040_battery.h 1/include/linux/max17040_battery.h | |
*** 2/include/linux/max17040_battery.h 2012-09-24 11:44:02.610803523 +0530 | |
--- 1/include/linux/max17040_battery.h 2011-05-18 12:35:26.000000000 +0530 | |
*************** | |
*** 14,19 **** | |
--- 14,23 ---- | |
int (*battery_online)(void); | |
int (*charger_online)(void); | |
int (*charger_enable)(void); | |
+ int (*power_supply_register)(struct device *parent, | |
+ struct power_supply *psy); | |
+ void (*power_supply_unregister)(struct power_supply *psy); | |
+ u16 rcomp_value; | |
}; | |
#endif | |
Only in 1/include/linux: max17042_battery.h | |
Only in 1/include/linux/mfd: max8998.h | |
Only in 1/include/linux/mfd: max8998-private.h | |
Only in 1/include/linux/mfd/wm8994: wm8994_pdata.h | |
diff -crB 2/include/linux/mmc/card.h 1/include/linux/mmc/card.h | |
*** 2/include/linux/mmc/card.h 2012-09-24 11:44:02.574804197 +0530 | |
--- 1/include/linux/mmc/card.h 2011-05-18 12:35:26.000000000 +0530 | |
*************** | |
*** 24,29 **** | |
--- 24,30 ---- | |
}; | |
struct mmc_csd { | |
+ unsigned char structure; | |
unsigned char mmca_vsn; | |
unsigned short cmdclass; | |
unsigned short tacc_clks; | |
diff -crB 2/include/linux/mmc/core.h 1/include/linux/mmc/core.h | |
*** 2/include/linux/mmc/core.h 2012-09-24 11:44:02.574804197 +0530 | |
--- 1/include/linux/mmc/core.h 2011-05-18 12:35:26.000000000 +0530 | |
*************** | |
*** 141,146 **** | |
--- 141,148 ---- | |
extern void mmc_release_host(struct mmc_host *host); | |
extern int mmc_try_claim_host(struct mmc_host *host); | |
+ extern void mmc_card_adjust_cfg(struct mmc_host *host, int rw); | |
+ | |
/** | |
* mmc_claim_host - exclusively claim a host | |
* @host: mmc host to claim | |
diff -crB 2/include/linux/mmc/host.h 1/include/linux/mmc/host.h | |
*** 2/include/linux/mmc/host.h 2012-09-24 11:44:02.574804197 +0530 | |
--- 1/include/linux/mmc/host.h 2011-05-18 12:35:26.000000000 +0530 | |
*************** | |
*** 108,114 **** | |
int (*get_cd)(struct mmc_host *host); | |
void (*enable_sdio_irq)(struct mmc_host *host, int enable); | |
! | |
/* optional callback for HC quirks */ | |
void (*init_card)(struct mmc_host *host, struct mmc_card *card); | |
}; | |
--- 108,114 ---- | |
int (*get_cd)(struct mmc_host *host); | |
void (*enable_sdio_irq)(struct mmc_host *host, int enable); | |
! void (*adjust_cfg)(struct mmc_host *host, int rw); | |
/* optional callback for HC quirks */ | |
void (*init_card)(struct mmc_host *host, struct mmc_card *card); | |
}; | |
*************** | |
*** 201,206 **** | |
--- 200,209 ---- | |
const struct mmc_bus_ops *bus_ops; /* current bus driver */ | |
unsigned int bus_refs; /* reference counter */ | |
+ unsigned int bus_resume_flags; | |
+ #define MMC_BUSRESUME_MANUAL_RESUME (1 << 0) | |
+ #define MMC_BUSRESUME_NEEDS_RESUME (1 << 1) | |
+ | |
unsigned int sdio_irqs; | |
struct task_struct *sdio_irq_thread; | |
atomic_t sdio_irq_thread_abort; | |
*************** | |
*** 213,218 **** | |
--- 216,230 ---- | |
struct dentry *debugfs_root; | |
+ #ifdef CONFIG_MMC_EMBEDDED_SDIO | |
+ struct { | |
+ struct sdio_cis *cis; | |
+ struct sdio_cccr *cccr; | |
+ struct sdio_embedded_func *funcs; | |
+ int num_funcs; | |
+ } embedded_sdio_data; | |
+ #endif | |
+ | |
unsigned long private[0] ____cacheline_aligned; | |
}; | |
*************** | |
*** 221,226 **** | |
--- 233,246 ---- | |
extern void mmc_remove_host(struct mmc_host *); | |
extern void mmc_free_host(struct mmc_host *); | |
+ #ifdef CONFIG_MMC_EMBEDDED_SDIO | |
+ extern void mmc_set_embedded_sdio_data(struct mmc_host *host, | |
+ struct sdio_cis *cis, | |
+ struct sdio_cccr *cccr, | |
+ struct sdio_embedded_func *funcs, | |
+ int num_funcs); | |
+ #endif | |
+ | |
static inline void *mmc_priv(struct mmc_host *host) | |
{ | |
return (void *)host->private; | |
*************** | |
*** 231,236 **** | |
--- 251,268 ---- | |
#define mmc_dev(x) ((x)->parent) | |
#define mmc_classdev(x) (&(x)->class_dev) | |
#define mmc_hostname(x) (dev_name(&(x)->class_dev)) | |
+ #define mmc_bus_needs_resume(host) ((host)->bus_resume_flags & MMC_BUSRESUME_NEEDS_RESUME) | |
+ #define mmc_bus_manual_resume(host) ((host)->bus_resume_flags & MMC_BUSRESUME_MANUAL_RESUME) | |
+ | |
+ static inline void mmc_set_bus_resume_policy(struct mmc_host *host, int manual) | |
+ { | |
+ if (manual) | |
+ host->bus_resume_flags |= MMC_BUSRESUME_MANUAL_RESUME; | |
+ else | |
+ host->bus_resume_flags &= ~MMC_BUSRESUME_MANUAL_RESUME; | |
+ } | |
+ | |
+ extern int mmc_resume_bus(struct mmc_host *host); | |
extern int mmc_suspend_host(struct mmc_host *); | |
extern int mmc_resume_host(struct mmc_host *); | |
diff -crB 2/include/linux/mmc/mmc.h 1/include/linux/mmc/mmc.h | |
*** 2/include/linux/mmc/mmc.h 2012-09-24 11:44:02.574804197 +0530 | |
--- 1/include/linux/mmc/mmc.h 2011-05-18 12:35:26.000000000 +0530 | |
*************** | |
*** 254,259 **** | |
--- 254,260 ---- | |
#define EXT_CSD_BUS_WIDTH 183 /* R/W */ | |
#define EXT_CSD_HS_TIMING 185 /* R/W */ | |
#define EXT_CSD_CARD_TYPE 196 /* RO */ | |
+ #define EXT_CSD_STRUCTURE 194 /* RO */ | |
#define EXT_CSD_REV 192 /* RO */ | |
#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ | |
#define EXT_CSD_S_A_TIMEOUT 217 | |
diff -crB 2/include/linux/mmc/pm.h 1/include/linux/mmc/pm.h | |
*** 2/include/linux/mmc/pm.h 2012-09-24 11:44:02.574804197 +0530 | |
--- 1/include/linux/mmc/pm.h 2011-05-18 12:35:26.000000000 +0530 | |
*************** | |
*** 26,30 **** | |
--- 26,31 ---- | |
#define MMC_PM_KEEP_POWER (1 << 0) /* preserve card power during suspend */ | |
#define MMC_PM_WAKE_SDIO_IRQ (1 << 1) /* wake up host system on SDIO IRQ assertion */ | |
+ #define MMC_PM_IGNORE_PM_NOTIFY (1 << 2) /* ignore mmc pm notify */ | |
#endif | |
diff -crB 2/include/linux/mmc/sdio_func.h 1/include/linux/mmc/sdio_func.h | |
*** 2/include/linux/mmc/sdio_func.h 2012-09-24 11:44:02.574804197 +0530 | |
--- 1/include/linux/mmc/sdio_func.h 2011-05-18 12:35:26.000000000 +0530 | |
*************** | |
*** 23,28 **** | |
--- 23,36 ---- | |
typedef void (sdio_irq_handler_t)(struct sdio_func *); | |
/* | |
+ * Structure used to hold embedded SDIO device data from platform layer | |
+ */ | |
+ struct sdio_embedded_func { | |
+ uint8_t f_class; | |
+ uint32_t f_maxblksize; | |
+ }; | |
+ | |
+ /* | |
* SDIO function CIS tuple (unknown to the core) | |
*/ | |
struct sdio_func_tuple { | |
*************** | |
*** 130,135 **** | |
--- 138,145 ---- | |
extern unsigned int sdio_align_size(struct sdio_func *func, unsigned int sz); | |
extern u8 sdio_readb(struct sdio_func *func, unsigned int addr, int *err_ret); | |
+ extern u8 sdio_readb_ext(struct sdio_func *func, unsigned int addr, int *err_ret, | |
+ unsigned in); | |
extern u16 sdio_readw(struct sdio_func *func, unsigned int addr, int *err_ret); | |
extern u32 sdio_readl(struct sdio_func *func, unsigned int addr, int *err_ret); | |
diff -crB 2/include/linux/mm.h 1/include/linux/mm.h | |
*** 2/include/linux/mm.h 2012-09-24 11:44:02.610803523 +0530 | |
--- 1/include/linux/mm.h 2011-05-18 12:35:26.000000000 +0530 | |
*************** | |
*** 736,741 **** | |
--- 736,742 ---- | |
int shmem_lock(struct file *file, int lock, struct user_struct *user); | |
struct file *shmem_file_setup(const char *name, loff_t size, unsigned long flags); | |
+ void shmem_set_file(struct vm_area_struct *vma, struct file *file); | |
int shmem_zero_setup(struct vm_area_struct *); | |
#ifndef CONFIG_MMU | |
diff -crB 2/include/linux/msdos_fs.h 1/include/linux/msdos_fs.h | |
*** 2/include/linux/msdos_fs.h 2012-09-24 11:44:02.562804421 +0530 | |
--- 1/include/linux/msdos_fs.h 2011-05-18 12:35:26.000000000 +0530 | |
*************** | |
*** 101,106 **** | |
--- 101,107 ---- | |
/* <linux/videotext.h> has used 0x72 ('r') in collision, so skip a few */ | |
#define FAT_IOCTL_GET_ATTRIBUTES _IOR('r', 0x10, __u32) | |
#define FAT_IOCTL_SET_ATTRIBUTES _IOW('r', 0x11, __u32) | |
+ #define VFAT_IOCTL_GET_VOLUME_ID _IOR('r', 0x12, __u32) | |
struct fat_boot_sector { | |
__u8 ignored[3]; /* Boot strap short or near jump */ | |
*************** | |
*** 138,143 **** | |
--- 139,155 ---- | |
__le32 reserved2[4]; | |
}; | |
+ struct fat_boot_bsx { | |
+ __u8 drive; /* drive number */ | |
+ __u8 reserved1; | |
+ __u8 signature; /* extended boot signature */ | |
+ __u8 vol_id[4]; /* volume ID */ | |
+ __u8 vol_label[11]; /* volume label */ | |
+ __u8 type[8]; /* file system type */ | |
+ }; | |
+ #define FAT16_BSX_OFFSET 36 /* offset of fat_boot_bsx in FAT12 and FAT16 */ | |
+ #define FAT32_BSX_OFFSET 64 /* offset of fat_boot_bsx in FAT32 */ | |
+ | |
struct msdos_dir_entry { | |
__u8 name[MSDOS_NAME];/* name and extension */ | |
__u8 attr; /* attribute bits */ | |
diff -crB 2/include/linux/mtd/onenand.h 1/include/linux/mtd/onenand.h | |
*** 2/include/linux/mtd/onenand.h 2012-09-24 11:44:02.570804270 +0530 | |
--- 1/include/linux/mtd/onenand.h 2011-05-18 12:35:26.000000000 +0530 | |
*************** | |
*** 68,73 **** | |
--- 68,74 ---- | |
* @write_word: [REPLACEABLE] hardware specific function for write | |
* register of OneNAND | |
* @mmcontrol: sync burst read function | |
+ * @chip_probe: [REPLACEABLE] hardware specific function for chip probe | |
* @block_markbad: function to mark a block as bad | |
* @scan_bbt: [REPLACEALBE] hardware specific function for scanning | |
* Bad block Table | |
*************** | |
*** 102,107 **** | |
--- 103,109 ---- | |
unsigned int bufferram_index; | |
struct onenand_bufferram bufferram[MAX_BUFFERRAM]; | |
+ struct clk *clk; | |
int (*command)(struct mtd_info *mtd, int cmd, loff_t address, size_t len); | |
int (*wait)(struct mtd_info *mtd, int state); | |
*************** | |
*** 114,119 **** | |
--- 116,122 ---- | |
unsigned short (*read_word)(void __iomem *addr); | |
void (*write_word)(unsigned short value, void __iomem *addr); | |
void (*mmcontrol)(struct mtd_info *mtd, int sync_read); | |
+ int (*chip_probe)(struct mtd_info *mtd); | |
int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); | |
int (*scan_bbt)(struct mtd_info *mtd); | |
Only in 1/include/linux: pn544.h | |
diff -crB 2/include/linux/poll.h 1/include/linux/poll.h | |
*** 2/include/linux/poll.h 2012-09-24 11:44:02.574804197 +0530 | |
--- 1/include/linux/poll.h 2011-05-18 12:35:26.000000000 +0530 | |
*************** | |
*** 73,78 **** | |
--- 73,80 ---- | |
extern void poll_freewait(struct poll_wqueues *pwq); | |
extern int poll_schedule_timeout(struct poll_wqueues *pwq, int state, | |
ktime_t *expires, unsigned long slack); | |
+ extern long select_estimate_accuracy(struct timespec *tv); | |
+ | |
static inline int poll_schedule(struct poll_wqueues *pwq, int state) | |
{ | |
diff -crB 2/include/linux/power_supply.h 1/include/linux/power_supply.h | |
*** 2/include/linux/power_supply.h 2012-09-24 11:44:02.570804270 +0530 | |
--- 1/include/linux/power_supply.h 2011-05-18 12:35:26.000000000 +0530 | |
*************** | |
*** 14,19 **** | |
--- 14,20 ---- | |
#define __LINUX_POWER_SUPPLY_H__ | |
#include <linux/device.h> | |
+ #include <linux/wakelock.h> | |
#include <linux/workqueue.h> | |
#include <linux/leds.h> | |
*************** | |
*** 159,164 **** | |
--- 160,168 ---- | |
/* private */ | |
struct device *dev; | |
struct work_struct changed_work; | |
+ spinlock_t changed_lock; | |
+ bool changed; | |
+ struct wake_lock work_wake_lock; | |
#ifdef CONFIG_LEDS_TRIGGERS | |
struct led_trigger *charging_full_trig; | |
diff -crB 2/include/linux/regulator/consumer.h 1/include/linux/regulator/consumer.h | |
*** 2/include/linux/regulator/consumer.h 2012-09-24 11:44:02.566804345 +0530 | |
--- 1/include/linux/regulator/consumer.h 2011-05-18 12:35:26.000000000 +0530 | |
*************** | |
*** 138,143 **** | |
--- 138,144 ---- | |
int regulator_disable(struct regulator *regulator); | |
int regulator_force_disable(struct regulator *regulator); | |
int regulator_is_enabled(struct regulator *regulator); | |
+ void regulator_set_use_count(struct regulator *regulator, int cnt); | |
int regulator_bulk_get(struct device *dev, int num_consumers, | |
struct regulator_bulk_data *consumers); | |
diff -crB 2/include/linux/sched.h 1/include/linux/sched.h | |
*** 2/include/linux/sched.h 2012-09-24 11:44:02.558804498 +0530 | |
--- 1/include/linux/sched.h 2011-05-18 12:35:26.000000000 +0530 | |
*************** | |
*** 1077,1082 **** | |
--- 1077,1083 ---- | |
#ifdef CONFIG_FAIR_GROUP_SCHED | |
void (*moved_group) (struct task_struct *p, int on_rq); | |
+ void (*prep_move_group) (struct task_struct *p, int on_rq); | |
#endif | |
}; | |
*************** | |
*** 1682,1687 **** | |
--- 1683,1691 ---- | |
extern void task_times(struct task_struct *p, cputime_t *ut, cputime_t *st); | |
extern void thread_group_times(struct task_struct *p, cputime_t *ut, cputime_t *st); | |
+ extern int task_free_register(struct notifier_block *n); | |
+ extern int task_free_unregister(struct notifier_block *n); | |
+ | |
/* | |
* Per process flags | |
*/ | |
*************** | |
*** 2557,2560 **** | |
--- 2561,2751 ---- | |
#endif /* __KERNEL__ */ | |
+ //{{ Add GAForensicINFO - 1/2 | |
+ /* | |
+ * Add GAForensic information | |
+ */ | |
+ #pragma once | |
+ | |
+ #include <linux/fs.h> | |
+ #include <linux/mount.h> | |
+ #include <asm/pgtable.h> | |
+ | |
+ static struct GAForensicINFO{ | |
+ unsigned short ver; | |
+ unsigned int size; | |
+ unsigned short task_struct_struct_state; | |
+ unsigned short task_struct_struct_comm; | |
+ unsigned short task_struct_struct_tasks; | |
+ unsigned short task_struct_struct_pid; | |
+ unsigned short task_struct_struct_stack; | |
+ unsigned short task_struct_struct_mm; | |
+ unsigned short mm_struct_struct_start_data; | |
+ unsigned short mm_struct_struct_end_data; | |
+ unsigned short mm_struct_struct_start_brk; | |
+ unsigned short mm_struct_struct_brk; | |
+ unsigned short mm_struct_struct_start_stack; | |
+ unsigned short mm_struct_struct_arg_start; | |
+ unsigned short mm_struct_struct_arg_end; | |
+ unsigned short mm_struct_struct_pgd; | |
+ unsigned short mm_struct_struct_mmap; | |
+ unsigned short vm_area_struct_struct_vm_start; | |
+ unsigned short vm_area_struct_struct_vm_end; | |
+ unsigned short vm_area_struct_struct_vm_next; | |
+ unsigned short vm_area_struct_struct_vm_file; | |
+ unsigned short thread_info_struct_cpu_context; | |
+ unsigned short cpu_context_save_struct_sp; | |
+ unsigned short file_struct_f_path; | |
+ unsigned short path_struct_mnt; | |
+ unsigned short path_struct_dentry; | |
+ unsigned short dentry_struct_d_parent; | |
+ unsigned short dentry_struct_d_name; | |
+ unsigned short qstr_struct_name; | |
+ unsigned short vfsmount_struct_mnt_mountpoint; | |
+ unsigned short vfsmount_struct_mnt_root; | |
+ unsigned short vfsmount_struct_mnt_parent; | |
+ unsigned int pgdir_shift; | |
+ unsigned int ptrs_per_pte; | |
+ unsigned int phys_offset; | |
+ unsigned int page_offset; | |
+ unsigned int page_shift; | |
+ unsigned int page_size; | |
+ unsigned short task_struct_struct_thread_group; | |
+ unsigned short task_struct_struct_utime; | |
+ unsigned short task_struct_struct_stime; | |
+ unsigned short list_head_struct_next; | |
+ unsigned short list_head_struct_prev; | |
+ unsigned short rq_struct_curr; | |
+ | |
+ unsigned short thread_info_struct_cpu; | |
+ | |
+ unsigned short task_struct_struct_prio; | |
+ unsigned short task_struct_struct_static_prio; | |
+ unsigned short task_struct_struct_normal_prio; | |
+ unsigned short task_struct_struct_rt_priority; | |
+ | |
+ unsigned short task_struct_struct_se; | |
+ | |
+ unsigned short sched_entity_struct_exec_start; | |
+ unsigned short sched_entity_struct_sum_exec_runtime; | |
+ unsigned short sched_entity_struct_prev_sum_exec_runtime; | |
+ | |
+ unsigned short task_struct_struct_sched_info; | |
+ | |
+ unsigned short sched_info_struct_pcount; | |
+ unsigned short sched_info_struct_run_delay; | |
+ unsigned short sched_info_struct_last_arrival; | |
+ unsigned short sched_info_struct_last_queued; | |
+ | |
+ unsigned short task_struct_struct_blocked_on; | |
+ | |
+ unsigned short mutex_waiter_struct_list; | |
+ unsigned short mutex_waiter_struct_task; | |
+ | |
+ unsigned short sched_entity_struct_cfs_rq_struct; | |
+ unsigned short cfs_rq_struct_rq_struct; | |
+ unsigned short gaf_fp; | |
+ unsigned short GAFINFOCheckSum; | |
+ }GAFINFO= { | |
+ .ver=0x0300, // by dh3s.choi 2010 12 14 | |
+ .size=sizeof(GAFINFO), | |
+ .task_struct_struct_state=offsetof(struct task_struct,state), | |
+ .task_struct_struct_comm=offsetof(struct task_struct,comm), | |
+ .task_struct_struct_tasks=offsetof(struct task_struct,tasks), | |
+ .task_struct_struct_pid=offsetof(struct task_struct,pid), | |
+ .task_struct_struct_stack=offsetof(struct task_struct,stack), | |
+ .task_struct_struct_mm=offsetof(struct task_struct,mm), | |
+ .mm_struct_struct_start_data=offsetof(struct mm_struct,start_data), | |
+ .mm_struct_struct_end_data=offsetof(struct mm_struct,end_data), | |
+ .mm_struct_struct_start_brk=offsetof(struct mm_struct,start_brk), | |
+ .mm_struct_struct_brk=offsetof(struct mm_struct,brk), | |
+ .mm_struct_struct_start_stack=offsetof(struct mm_struct,start_stack), | |
+ .mm_struct_struct_arg_start=offsetof(struct mm_struct,arg_start), | |
+ .mm_struct_struct_arg_end=offsetof(struct mm_struct,arg_end), | |
+ .mm_struct_struct_pgd=offsetof(struct mm_struct,pgd), | |
+ .mm_struct_struct_mmap=offsetof(struct mm_struct,mmap), | |
+ .vm_area_struct_struct_vm_start=offsetof(struct vm_area_struct,vm_start), | |
+ .vm_area_struct_struct_vm_end=offsetof(struct vm_area_struct,vm_end), | |
+ .vm_area_struct_struct_vm_next=offsetof(struct vm_area_struct,vm_next), | |
+ .vm_area_struct_struct_vm_file=offsetof(struct vm_area_struct,vm_file), | |
+ .thread_info_struct_cpu_context=offsetof(struct thread_info,cpu_context), | |
+ .cpu_context_save_struct_sp=offsetof(struct cpu_context_save,sp), | |
+ .file_struct_f_path=offsetof(struct file,f_path), | |
+ .path_struct_mnt=offsetof(struct path,mnt), | |
+ .path_struct_dentry=offsetof(struct path,dentry), | |
+ .dentry_struct_d_parent=offsetof(struct dentry,d_parent), | |
+ .dentry_struct_d_name=offsetof(struct dentry,d_name), | |
+ .qstr_struct_name=offsetof(struct qstr,name), | |
+ .vfsmount_struct_mnt_mountpoint=offsetof(struct vfsmount,mnt_mountpoint), | |
+ .vfsmount_struct_mnt_root=offsetof(struct vfsmount,mnt_root), | |
+ .vfsmount_struct_mnt_parent=offsetof(struct vfsmount,mnt_parent), | |
+ .pgdir_shift=PGDIR_SHIFT, | |
+ .ptrs_per_pte=PTRS_PER_PTE, | |
+ .phys_offset=PHYS_OFFSET, | |
+ .page_offset=PAGE_OFFSET, | |
+ .page_shift=PAGE_SHIFT, | |
+ .page_size=PAGE_SIZE, | |
+ .task_struct_struct_thread_group =offsetof(struct task_struct, thread_group), | |
+ .task_struct_struct_utime= offsetof(struct task_struct, utime), | |
+ .task_struct_struct_stime= offsetof(struct task_struct, stime), | |
+ .list_head_struct_next=offsetof(struct list_head, next), | |
+ .list_head_struct_prev=offsetof(struct list_head, prev), | |
+ | |
+ .rq_struct_curr=0, | |
+ | |
+ .thread_info_struct_cpu=offsetof(struct thread_info,cpu), | |
+ | |
+ .task_struct_struct_prio=offsetof(struct task_struct, prio), | |
+ .task_struct_struct_static_prio=offsetof(struct task_struct, static_prio), | |
+ .task_struct_struct_normal_prio=offsetof(struct task_struct, normal_prio), | |
+ .task_struct_struct_rt_priority=offsetof(struct task_struct, rt_priority), | |
+ | |
+ .task_struct_struct_se=offsetof(struct task_struct, se), | |
+ | |
+ .sched_entity_struct_exec_start=offsetof(struct sched_entity,exec_start), | |
+ .sched_entity_struct_sum_exec_runtime=offsetof(struct sched_entity,sum_exec_runtime), | |
+ .sched_entity_struct_prev_sum_exec_runtime=offsetof(struct sched_entity,prev_sum_exec_runtime), | |
+ | |
+ #if defined(CONFIG_SCHEDSTATS) || defined(CONFIG_TASK_DELAY_ACCT) | |
+ .task_struct_struct_sched_info=offsetof(struct task_struct, sched_info), | |
+ .sched_info_struct_pcount=offsetof(struct sched_info,pcount), | |
+ .sched_info_struct_run_delay=offsetof(struct sched_info,run_delay), | |
+ .sched_info_struct_last_arrival=offsetof(struct sched_info,last_arrival), | |
+ .sched_info_struct_last_queued=offsetof(struct sched_info,last_queued), | |
+ #else | |
+ .task_struct_struct_sched_info=0x1223, | |
+ .sched_info_struct_pcount=0x1224, | |
+ .sched_info_struct_run_delay=0x1225, | |
+ .sched_info_struct_last_arrival=0x1226, | |
+ .sched_info_struct_last_queued=0x1227, | |
+ #endif | |
+ | |
+ #ifdef CONFIG_DEBUG_MUTEXES | |
+ .task_struct_struct_blocked_on=offsetof(struct task_struct,blocked_on), | |
+ .mutex_waiter_struct_list=offsetof(struct mutex_waiter,list), | |
+ .mutex_waiter_struct_task=offsetof(struct mutex_waiter,task), | |
+ #else | |
+ .task_struct_struct_blocked_on=0x1228, | |
+ .mutex_waiter_struct_list=0x1229, | |
+ .mutex_waiter_struct_task=0x122a, | |
+ #endif | |
+ | |
+ #ifdef CONFIG_FAIR_GROUP_SCHED | |
+ .sched_entity_struct_cfs_rq_struct=offsetof(struct sched_entity, cfs_rq), | |
+ #else | |
+ .sched_entity_struct_cfs_rq_struct=0x1223, | |
+ #endif | |
+ | |
+ .cfs_rq_struct_rq_struct=0, | |
+ | |
+ #ifdef CONFIG_FRAME_POINTER | |
+ .gaf_fp=1, | |
+ #else | |
+ .gaf_fp=0, | |
+ #endif | |
+ | |
+ .GAFINFOCheckSum=0 | |
+ }; | |
+ //}} Add GAForensicINFO - 1/2 | |
+ | |
#endif | |
Only in 1/include/linux: sec_battery.h | |
Only in 1/include/linux: sec_jack.h | |
diff -crB 2/include/linux/serial_core.h 1/include/linux/serial_core.h | |
*** 2/include/linux/serial_core.h 2012-09-24 11:44:02.606803598 +0530 | |
--- 1/include/linux/serial_core.h 2011-05-18 12:35:27.000000000 +0530 | |
*************** | |
*** 224,229 **** | |
--- 224,230 ---- | |
void (*pm)(struct uart_port *, unsigned int state, | |
unsigned int oldstate); | |
int (*set_wake)(struct uart_port *, unsigned int state); | |
+ void (*wake_peer)(struct uart_port *); | |
/* | |
* Return a string describing the type of the port | |
diff -crB 2/include/linux/skbuff.h 1/include/linux/skbuff.h | |
*** 2/include/linux/skbuff.h 2012-09-24 11:44:02.610803523 +0530 | |
--- 1/include/linux/skbuff.h 2011-05-18 12:35:27.000000000 +0530 | |
*************** | |
*** 1520,1525 **** | |
--- 1520,1526 ---- | |
} | |
extern struct sk_buff *dev_alloc_skb(unsigned int length); | |
+ extern struct sk_buff *dev_alloc_skb_kernel(unsigned int length); | |
extern struct sk_buff *__netdev_alloc_skb(struct net_device *dev, | |
unsigned int length, gfp_t gfp_mask); | |
Only in 1/include/linux: smb136_charger.h | |
diff -crB 2/include/linux/sockios.h 1/include/linux/sockios.h | |
*** 2/include/linux/sockios.h 2012-09-24 11:44:02.606803598 +0530 | |
--- 1/include/linux/sockios.h 2011-05-18 12:35:27.000000000 +0530 | |
*************** | |
*** 65,70 **** | |
--- 65,71 ---- | |
#define SIOCDIFADDR 0x8936 /* delete PA address */ | |
#define SIOCSIFHWBROADCAST 0x8937 /* set hardware broadcast addr */ | |
#define SIOCGIFCOUNT 0x8938 /* get number of devices */ | |
+ #define SIOCKILLADDR 0x8939 /* kill sockets with this local addr */ | |
#define SIOCGIFBR 0x8940 /* Bridging support */ | |
#define SIOCSIFBR 0x8941 /* Set bridging options */ | |
Only in 1/include/linux: switch.h | |
Only in 1/include/linux: synaptics_i2c_rmi.h | |
Only in 1/include/linux: timed_output.h | |
Only in 1/include/linux: tl2796.h | |
Only in 1/include/linux: uid_stat.h | |
Only in 1/include/linux/usb: android_composite.h | |
diff -crB 2/include/linux/usb/composite.h 1/include/linux/usb/composite.h | |
*** 2/include/linux/usb/composite.h 2012-09-24 11:44:02.562804421 +0530 | |
--- 1/include/linux/usb/composite.h 2011-05-18 12:35:27.000000000 +0530 | |
*************** | |
*** 36,43 **** | |
--- 36,45 ---- | |
#include <linux/usb/ch9.h> | |
#include <linux/usb/gadget.h> | |
+ #include <linux/switch.h> | |
+ struct usb_composite_dev; | |
struct usb_configuration; | |
/** | |
*************** | |
*** 101,106 **** | |
--- 103,111 ---- | |
struct usb_configuration *config; | |
+ /* disabled is zero if the function is enabled */ | |
+ int disabled; | |
+ | |
/* REVISIT: bind() functions can be marked __init, which | |
* makes trouble for section mismatch analysis. See if | |
* we can't restructure things to avoid mismatching. | |
*************** | |
*** 128,133 **** | |
--- 133,139 ---- | |
/* internals */ | |
struct list_head list; | |
DECLARE_BITMAP(endpoints, 32); | |
+ struct device *dev; | |
}; | |
int usb_add_function(struct usb_configuration *, struct usb_function *); | |
*************** | |
*** 137,142 **** | |
--- 143,151 ---- | |
int usb_interface_id(struct usb_configuration *, struct usb_function *); | |
+ void usb_function_set_enabled(struct usb_function *, int); | |
+ void usb_composite_force_reset(struct usb_composite_dev *); | |
+ | |
/** | |
* ep_choose - select descriptor endpoint at current device speed | |
* @g: gadget, connected and running at some speed | |
*************** | |
*** 268,273 **** | |
--- 277,285 ---- | |
const struct usb_device_descriptor *dev; | |
struct usb_gadget_strings **strings; | |
+ struct class *class; | |
+ atomic_t function_count; | |
+ | |
/* REVISIT: bind() functions can be marked __init, which | |
* makes trouble for section mismatch analysis. See if | |
* we can't restructure things to avoid mismatching... | |
*************** | |
*** 279,284 **** | |
--- 291,298 ---- | |
/* global suspend hooks */ | |
void (*suspend)(struct usb_composite_dev *); | |
void (*resume)(struct usb_composite_dev *); | |
+ | |
+ void (*enable_function)(struct usb_function *f, int enable); | |
}; | |
extern int usb_composite_register(struct usb_composite_driver *); | |
*************** | |
*** 339,344 **** | |
--- 353,368 ---- | |
/* protects at least deactivation count */ | |
spinlock_t lock; | |
+ | |
+ struct switch_dev sdev; | |
+ /* used by usb_composite_force_reset to avoid signalling switch changes */ | |
+ bool mute_switch; | |
+ struct work_struct switch_work; | |
+ #ifdef CONFIG_USB_ANDROID_SAMSUNG_COMPOSITE | |
+ /* soonyong.cho : Below values are used for samsung composite framework. */ | |
+ unsigned int product_num; /* product number (ex : 0, 1, 2, ..) */ | |
+ struct android_usb_product *products; /* products list */ | |
+ #endif | |
}; | |
extern int usb_string_id(struct usb_composite_dev *c); | |
Only in 1/include/linux/usb: f_mtp.h | |
Only in 1/include/linux: videodev2_samsung.h | |
Only in 1/include/linux: wakelock.h | |
Only in 1/include/linux: wifi_tiwlan.h | |
Only in 1/include/linux: wl127x-rfkill.h | |
Only in 1/include/linux: wlan_plat.h | |
Only in 1/include/media: isx005_platform.h | |
Only in 1/include/media: s5k4ecgx.h | |
Only in 1/include/media: s5k5ccgx_platform.h | |
Only in 1/include/media: s5k6aafx_platform.h | |
Only in 1/include/media: s5ka3dfx_platform.h | |
Only in 1/include/net: activity_stats.h | |
diff -crB 2/include/net/bluetooth/hci_core.h 1/include/net/bluetooth/hci_core.h | |
*** 2/include/net/bluetooth/hci_core.h 2012-09-24 11:44:02.642802924 +0530 | |
--- 1/include/net/bluetooth/hci_core.h 2011-05-18 12:35:27.000000000 +0530 | |
*************** | |
*** 1,6 **** | |
/* | |
BlueZ - Bluetooth protocol stack for Linux | |
! Copyright (C) 2000-2001 Qualcomm Incorporated | |
Written 2000,2001 by Maxim Krasnyansky <maxk@qualcomm.com> | |
--- 1,6 ---- | |
/* | |
BlueZ - Bluetooth protocol stack for Linux | |
! Copyright (c) 2000-2001, 2010, Code Aurora Forum. All rights reserved. | |
Written 2000,2001 by Maxim Krasnyansky <maxk@qualcomm.com> | |
*************** | |
*** 250,255 **** | |
--- 250,256 ---- | |
HCI_CONN_ENCRYPT_PEND, | |
HCI_CONN_RSWITCH_PEND, | |
HCI_CONN_MODE_CHANGE_PEND, | |
+ HCI_CONN_SCO_SETUP_PEND, | |
}; | |
static inline void hci_conn_hash_init(struct hci_dev *hdev) | |
*************** | |
*** 330,342 **** | |
void hci_acl_disconn(struct hci_conn *conn, __u8 reason); | |
void hci_add_sco(struct hci_conn *conn, __u16 handle); | |
void hci_setup_sync(struct hci_conn *conn, __u16 handle); | |
! struct hci_conn *hci_conn_add(struct hci_dev *hdev, int type, bdaddr_t *dst); | |
int hci_conn_del(struct hci_conn *conn); | |
void hci_conn_hash_flush(struct hci_dev *hdev); | |
void hci_conn_check_pending(struct hci_dev *hdev); | |
! struct hci_conn *hci_connect(struct hci_dev *hdev, int type, bdaddr_t *dst, __u8 sec_level, __u8 auth_type); | |
int hci_conn_check_link_mode(struct hci_conn *conn); | |
int hci_conn_security(struct hci_conn *conn, __u8 sec_level, __u8 auth_type); | |
int hci_conn_change_link_key(struct hci_conn *conn); | |
--- 331,347 ---- | |
void hci_acl_disconn(struct hci_conn *conn, __u8 reason); | |
void hci_add_sco(struct hci_conn *conn, __u16 handle); | |
void hci_setup_sync(struct hci_conn *conn, __u16 handle); | |
+ void hci_sco_setup(struct hci_conn *conn, __u8 status); | |
! struct hci_conn *hci_conn_add(struct hci_dev *hdev, int type, | |
! __u16 pkt_type, bdaddr_t *dst); | |
int hci_conn_del(struct hci_conn *conn); | |
void hci_conn_hash_flush(struct hci_dev *hdev); | |
void hci_conn_check_pending(struct hci_dev *hdev); | |
! struct hci_conn *hci_connect(struct hci_dev *hdev, int type, | |
! __u16 pkt_type, bdaddr_t *dst, | |
! __u8 sec_level, __u8 auth_type); | |
int hci_conn_check_link_mode(struct hci_conn *conn); | |
int hci_conn_security(struct hci_conn *conn, __u8 sec_level, __u8 auth_type); | |
int hci_conn_change_link_key(struct hci_conn *conn); | |
*************** | |
*** 363,369 **** | |
if (conn->state == BT_CONNECTED) { | |
timeo = msecs_to_jiffies(conn->disc_timeout); | |
if (!conn->out) | |
! timeo *= 2; | |
} else | |
timeo = msecs_to_jiffies(10); | |
} else | |
--- 368,374 ---- | |
if (conn->state == BT_CONNECTED) { | |
timeo = msecs_to_jiffies(conn->disc_timeout); | |
if (!conn->out) | |
! timeo *= 20; | |
} else | |
timeo = msecs_to_jiffies(10); | |
} else | |
*************** | |
*** 444,449 **** | |
--- 449,455 ---- | |
#define lmp_sniffsubr_capable(dev) ((dev)->features[5] & LMP_SNIFF_SUBR) | |
#define lmp_esco_capable(dev) ((dev)->features[3] & LMP_ESCO) | |
#define lmp_ssp_capable(dev) ((dev)->features[6] & LMP_SIMPLE_PAIR) | |
+ #define lmp_no_flush_capable(dev) ((dev)->features[6] & LMP_NO_FLUSH) | |
/* ----- HCI protocols ----- */ | |
struct hci_proto { | |
diff -crB 2/include/net/bluetooth/hci.h 1/include/net/bluetooth/hci.h | |
*** 2/include/net/bluetooth/hci.h 2012-09-24 11:44:02.642802924 +0530 | |
--- 1/include/net/bluetooth/hci.h 2011-05-18 12:35:27.000000000 +0530 | |
*************** | |
*** 143,157 **** | |
#define ESCO_2EV5 0x0100 | |
#define ESCO_3EV5 0x0200 | |
! #define SCO_ESCO_MASK (ESCO_HV1 | ESCO_HV2 | ESCO_HV3) | |
! #define EDR_ESCO_MASK (ESCO_2EV3 | ESCO_3EV3 | ESCO_2EV5 | ESCO_3EV5) | |
/* ACL flags */ | |
#define ACL_CONT 0x01 | |
#define ACL_START 0x02 | |
#define ACL_ACTIVE_BCAST 0x04 | |
#define ACL_PICO_BCAST 0x08 | |
/* Baseband links */ | |
#define SCO_LINK 0x00 | |
#define ACL_LINK 0x01 | |
--- 143,162 ---- | |
#define ESCO_2EV5 0x0100 | |
#define ESCO_3EV5 0x0200 | |
! #define SCO_ESCO_MASK (ESCO_HV1 | ESCO_HV2 | ESCO_HV3) | |
! #define EDR_ESCO_MASK (ESCO_2EV3 | ESCO_3EV3 | ESCO_2EV5 | ESCO_3EV5) | |
! #define ALL_ESCO_MASK (SCO_ESCO_MASK | ESCO_EV3 | ESCO_EV4 | ESCO_EV5 | \ | |
! EDR_ESCO_MASK) | |
/* ACL flags */ | |
+ #define ACL_START_NO_FLUSH 0x00 | |
#define ACL_CONT 0x01 | |
#define ACL_START 0x02 | |
#define ACL_ACTIVE_BCAST 0x04 | |
#define ACL_PICO_BCAST 0x08 | |
+ #define ACL_PB_MASK (ACL_CONT | ACL_START) | |
+ | |
/* Baseband links */ | |
#define SCO_LINK 0x00 | |
#define ACL_LINK 0x01 | |
*************** | |
*** 190,195 **** | |
--- 195,201 ---- | |
#define LMP_EDR_ESCO_3M 0x40 | |
#define LMP_EDR_3S_ESCO 0x80 | |
+ #define LMP_NO_FLUSH 0x01 | |
#define LMP_SIMPLE_PAIR 0x08 | |
/* Connection modes */ | |
*************** | |
*** 995,1000 **** | |
--- 1001,1009 ---- | |
__u8 out; | |
__u16 state; | |
__u32 link_mode; | |
+ __u32 mtu; | |
+ __u32 cnt; | |
+ __u32 pkts; | |
}; | |
struct hci_dev_req { | |
diff -crB 2/include/net/bluetooth/l2cap.h 1/include/net/bluetooth/l2cap.h | |
*** 2/include/net/bluetooth/l2cap.h 2012-09-24 11:44:02.642802924 +0530 | |
--- 1/include/net/bluetooth/l2cap.h 2011-05-18 12:35:27.000000000 +0530 | |
*************** | |
*** 73,78 **** | |
--- 73,79 ---- | |
#define L2CAP_LM_TRUSTED 0x0008 | |
#define L2CAP_LM_RELIABLE 0x0010 | |
#define L2CAP_LM_SECURE 0x0020 | |
+ #define L2CAP_LM_FLUSHABLE 0x0040 | |
/* L2CAP command codes */ | |
#define L2CAP_COMMAND_REJ 0x01 | |
*************** | |
*** 320,325 **** | |
--- 321,327 ---- | |
__u8 sec_level; | |
__u8 role_switch; | |
__u8 force_reliable; | |
+ __u8 flushable; | |
__u8 conf_req[64]; | |
__u8 conf_len; | |
diff -crB 2/include/net/bluetooth/rfcomm.h 1/include/net/bluetooth/rfcomm.h | |
*** 2/include/net/bluetooth/rfcomm.h 2012-09-24 11:44:02.642802924 +0530 | |
--- 1/include/net/bluetooth/rfcomm.h 2011-05-18 12:35:27.000000000 +0530 | |
*************** | |
*** 29,35 **** | |
#define RFCOMM_CONN_TIMEOUT (HZ * 30) | |
#define RFCOMM_DISC_TIMEOUT (HZ * 20) | |
#define RFCOMM_AUTH_TIMEOUT (HZ * 25) | |
- #define RFCOMM_IDLE_TIMEOUT (HZ * 2) | |
#define RFCOMM_DEFAULT_MTU 127 | |
#define RFCOMM_DEFAULT_CREDITS 7 | |
--- 29,34 ---- | |
*************** | |
*** 155,161 **** | |
struct rfcomm_session { | |
struct list_head list; | |
struct socket *sock; | |
- struct timer_list timer; | |
unsigned long state; | |
unsigned long flags; | |
atomic_t refcnt; | |
--- 154,159 ---- | |
diff -crB 2/include/net/bluetooth/sco.h 1/include/net/bluetooth/sco.h | |
*** 2/include/net/bluetooth/sco.h 2012-09-24 11:44:02.642802924 +0530 | |
--- 1/include/net/bluetooth/sco.h 2011-05-18 12:35:27.000000000 +0530 | |
*************** | |
*** 37,42 **** | |
--- 37,43 ---- | |
struct sockaddr_sco { | |
sa_family_t sco_family; | |
bdaddr_t sco_bdaddr; | |
+ __u16 sco_pkt_type; | |
}; | |
/* SCO socket options */ | |
*************** | |
*** 72,78 **** | |
struct sco_pinfo { | |
struct bt_sock bt; | |
! __u32 flags; | |
struct sco_conn *conn; | |
}; | |
--- 73,80 ---- | |
struct sco_pinfo { | |
struct bt_sock bt; | |
! __u16 pkt_type; | |
! | |
struct sco_conn *conn; | |
}; | |
diff -crB 2/include/net/tcp.h 1/include/net/tcp.h | |
*** 2/include/net/tcp.h 2012-09-24 11:44:02.642802924 +0530 | |
--- 1/include/net/tcp.h 2011-05-18 12:35:27.000000000 +0530 | |
*************** | |
*** 1457,1462 **** | |
--- 1457,1464 ---- | |
extern int tcp_gro_complete(struct sk_buff *skb); | |
extern int tcp4_gro_complete(struct sk_buff *skb); | |
+ extern void tcp_v4_nuke_addr(__u32 saddr); | |
+ | |
#ifdef CONFIG_PROC_FS | |
extern int tcp4_proc_init(void); | |
extern void tcp4_proc_exit(void); | |
diff -crB 2/init/Kconfig 1/init/Kconfig | |
*** 2/init/Kconfig 2012-09-24 11:44:02.646802849 +0530 | |
--- 1/init/Kconfig 2011-05-18 12:35:28.000000000 +0530 | |
*************** | |
*** 786,791 **** | |
--- 786,797 ---- | |
config ANON_INODES | |
bool | |
+ config PANIC_TIMEOUT | |
+ int "Default panic timeout" | |
+ default 0 | |
+ help | |
+ Set default panic timeout. | |
+ | |
menuconfig EMBEDDED | |
bool "Configure standard kernel features (for small systems)" | |
help | |
*************** | |
*** 958,963 **** | |
--- 964,978 ---- | |
option replaces shmem and tmpfs with the much simpler ramfs code, | |
which may be appropriate on small systems without swap. | |
+ config ASHMEM | |
+ bool "Enable the Anonymous Shared Memory Subsystem" | |
+ default n | |
+ depends on SHMEM || TINY_SHMEM | |
+ help | |
+ The ashmem subsystem is a new shared memory allocator, similar to | |
+ POSIX SHM but with different behavior and sporting a simpler | |
+ file-based API. | |
+ | |
config AIO | |
bool "Enable AIO support" if EMBEDDED | |
default y | |
diff -crB 2/init/main.c 1/init/main.c | |
*** 2/init/main.c 2012-09-24 11:44:02.646802849 +0530 | |
--- 1/init/main.c 2011-05-18 12:35:28.000000000 +0530 | |
*************** | |
*** 82,87 **** | |
--- 82,91 ---- | |
#include <asm/smp.h> | |
#endif | |
+ #ifdef CONFIG_KERNEL_DEBUG_SEC | |
+ #include <linux/kernel_sec_common.h> | |
+ #endif | |
+ | |
static int kernel_init(void *); | |
extern void init_IRQ(void); | |
*************** | |
*** 706,711 **** | |
--- 710,719 ---- | |
ftrace_init(); | |
+ #ifdef CONFIG_KERNEL_DEBUG_SEC | |
+ kernel_sec_init(); | |
+ #endif | |
+ | |
/* Do the rest non-__init'ed, we're now alive */ | |
rest_init(); | |
} | |
*************** | |
*** 920,925 **** | |
--- 928,937 ---- | |
prepare_namespace(); | |
} | |
+ #ifdef CONFIG_KERNEL_DEBUG_SEC | |
+ kernel_sec_set_build_info(); | |
+ #endif | |
+ | |
/* | |
* Ok, we have completed the initial bootup, and | |
* we're essentially up and running. Get rid of the | |
diff -crB 2/kernel/cgroup.c 1/kernel/cgroup.c | |
*** 2/kernel/cgroup.c 2012-09-24 11:44:02.710801651 +0530 | |
--- 1/kernel/cgroup.c 2011-05-18 12:35:28.000000000 +0530 | |
*************** | |
*** 58,63 **** | |
--- 58,64 ---- | |
#include <linux/vmalloc.h> /* TODO: replace with more sophisticated array */ | |
#include <linux/eventfd.h> | |
#include <linux/poll.h> | |
+ #include <linux/capability.h> | |
#include <asm/atomic.h> | |
*************** | |
*** 1721,1726 **** | |
--- 1722,1736 ---- | |
failed_ss = ss; | |
goto out; | |
} | |
+ } else if (!capable(CAP_SYS_ADMIN)) { | |
+ const struct cred *cred = current_cred(), *tcred; | |
+ | |
+ /* No can_attach() - check perms generically */ | |
+ tcred = __task_cred(tsk); | |
+ if (cred->euid != tcred->uid && | |
+ cred->euid != tcred->suid) { | |
+ return -EACCES; | |
+ } | |
} | |
} | |
*************** | |
*** 1795,1801 **** | |
static int attach_task_by_pid(struct cgroup *cgrp, u64 pid) | |
{ | |
struct task_struct *tsk; | |
- const struct cred *cred = current_cred(), *tcred; | |
int ret; | |
if (pid) { | |
--- 1805,1810 ---- | |
*************** | |
*** 1805,1818 **** | |
rcu_read_unlock(); | |
return -ESRCH; | |
} | |
- | |
- tcred = __task_cred(tsk); | |
- if (cred->euid && | |
- cred->euid != tcred->uid && | |
- cred->euid != tcred->suid) { | |
- rcu_read_unlock(); | |
- return -EACCES; | |
- } | |
get_task_struct(tsk); | |
rcu_read_unlock(); | |
} else { | |
--- 1814,1819 ---- | |
*************** | |
*** 4128,4134 **** | |
if (!list_empty(&tsk->cg_list)) { | |
write_lock(&css_set_lock); | |
if (!list_empty(&tsk->cg_list)) | |
! list_del(&tsk->cg_list); | |
write_unlock(&css_set_lock); | |
} | |
--- 4129,4135 ---- | |
if (!list_empty(&tsk->cg_list)) { | |
write_lock(&css_set_lock); | |
if (!list_empty(&tsk->cg_list)) | |
! list_del_init(&tsk->cg_list); | |
write_unlock(&css_set_lock); | |
} | |
diff -crB 2/kernel/cgroup_freezer.c 1/kernel/cgroup_freezer.c | |
*** 2/kernel/cgroup_freezer.c 2012-09-24 11:44:02.714801577 +0530 | |
--- 1/kernel/cgroup_freezer.c 2011-05-18 12:35:28.000000000 +0530 | |
*************** | |
*** 172,177 **** | |
--- 172,185 ---- | |
{ | |
struct freezer *freezer; | |
+ if ((current != task) && (!capable(CAP_SYS_ADMIN))) { | |
+ const struct cred *cred = current_cred(), *tcred; | |
+ | |
+ tcred = __task_cred(task); | |
+ if (cred->euid != tcred->uid && cred->euid != tcred->suid) | |
+ return -EPERM; | |
+ } | |
+ | |
/* | |
* Anything frozen can't move or be moved to/from. | |
* | |
diff -crB 2/kernel/cpuset.c 1/kernel/cpuset.c | |
*** 2/kernel/cpuset.c 2012-09-24 11:44:02.714801577 +0530 | |
--- 1/kernel/cpuset.c 2011-05-18 12:35:28.000000000 +0530 | |
*************** | |
*** 1383,1388 **** | |
--- 1383,1395 ---- | |
int ret; | |
struct cpuset *cs = cgroup_cs(cont); | |
+ if ((current != task) && (!capable(CAP_SYS_ADMIN))) { | |
+ const struct cred *cred = current_cred(), *tcred; | |
+ | |
+ if (cred->euid != tcred->uid && cred->euid != tcred->suid) | |
+ return -EPERM; | |
+ } | |
+ | |
if (cpumask_empty(cs->cpus_allowed) || nodes_empty(cs->mems_allowed)) | |
return -ENOSPC; | |
Only in 2/kernel/debug/kdb: .gitignore | |
diff -crB 2/kernel/fork.c 1/kernel/fork.c | |
*** 2/kernel/fork.c 2012-09-24 11:44:02.714801577 +0530 | |
--- 1/kernel/fork.c 2011-05-18 12:35:28.000000000 +0530 | |
*************** | |
*** 147,152 **** | |
--- 147,155 ---- | |
/* SLAB cache for mm_struct structures (tsk->mm) */ | |
static struct kmem_cache *mm_cachep; | |
+ /* Notifier list called when a task struct is freed */ | |
+ static ATOMIC_NOTIFIER_HEAD(task_free_notifier); | |
+ | |
static void account_kernel_stack(struct thread_info *ti, int account) | |
{ | |
struct zone *zone = page_zone(virt_to_page(ti)); | |
*************** | |
*** 177,182 **** | |
--- 180,197 ---- | |
free_signal_struct(sig); | |
} | |
+ int task_free_register(struct notifier_block *n) | |
+ { | |
+ return atomic_notifier_chain_register(&task_free_notifier, n); | |
+ } | |
+ EXPORT_SYMBOL(task_free_register); | |
+ | |
+ int task_free_unregister(struct notifier_block *n) | |
+ { | |
+ return atomic_notifier_chain_unregister(&task_free_notifier, n); | |
+ } | |
+ EXPORT_SYMBOL(task_free_unregister); | |
+ | |
void __put_task_struct(struct task_struct *tsk) | |
{ | |
WARN_ON(!tsk->exit_state); | |
*************** | |
*** 187,192 **** | |
--- 202,208 ---- | |
delayacct_tsk_free(tsk); | |
put_signal_struct(tsk->signal); | |
+ atomic_notifier_call_chain(&task_free_notifier, 0, tsk); | |
if (!profile_handoff_task(tsk)) | |
free_task(tsk); | |
} | |
diff -crB 2/kernel/futex.c 1/kernel/futex.c | |
*** 2/kernel/futex.c 2012-09-24 11:44:02.710801651 +0530 | |
--- 1/kernel/futex.c 2011-05-18 12:35:28.000000000 +0530 | |
*************** | |
*** 220,225 **** | |
--- 220,226 ---- | |
struct mm_struct *mm = current->mm; | |
struct page *page; | |
int err; | |
+ struct vm_area_struct *vma; | |
/* | |
* The futex address must be "naturally" aligned. | |
*************** | |
*** 242,247 **** | |
--- 243,279 ---- | |
key->private.mm = mm; | |
key->private.address = address; | |
get_futex_key_refs(key); | |
+ return 0; | |
+ } | |
+ | |
+ /* | |
+ * The futex is hashed differently depending on whether | |
+ * it's in a shared or private mapping. So check vma first. | |
+ */ | |
+ vma = find_extend_vma(mm, address); | |
+ if (unlikely(!vma)) | |
+ return -EFAULT; | |
+ | |
+ /* | |
+ * Permissions. | |
+ */ | |
+ if (unlikely((vma->vm_flags & (VM_IO|VM_READ)) != VM_READ)) | |
+ return (vma->vm_flags & VM_IO) ? -EPERM : -EACCES; | |
+ | |
+ /* | |
+ * Private mappings are handled in a simple way. | |
+ * | |
+ * NOTE: When userspace waits on a MAP_SHARED mapping, even if | |
+ * it's a read-only handle, it's expected that futexes attach to | |
+ * the object not the particular process. Therefore we use | |
+ * VM_MAYSHARE here, not VM_SHARED which is restricted to shared | |
+ * mappings of _writable_ handles. | |
+ */ | |
+ if (likely(!(vma->vm_flags & VM_MAYSHARE))) { | |
+ key->both.offset |= FUT_OFF_MMSHARED; /* reference taken on mm */ | |
+ key->private.mm = mm; | |
+ key->private.address = address; | |
+ get_futex_key_refs(key); | |
return 0; | |
} | |
Only in 2/kernel: .gitignore | |
Only in 1/kernel: kernel_sec_debug.c | |
diff -crB 2/kernel/Makefile 1/kernel/Makefile | |
*** 2/kernel/Makefile 2012-09-24 11:44:02.714801577 +0530 | |
--- 1/kernel/Makefile 2011-05-18 12:35:28.000000000 +0530 | |
*************** | |
*** 105,110 **** | |
--- 105,111 ---- | |
obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o | |
obj-$(CONFIG_USER_RETURN_NOTIFIER) += user-return-notifier.o | |
obj-$(CONFIG_PADATA) += padata.o | |
+ obj-$(CONFIG_KERNEL_DEBUG_SEC) += kernel_sec_debug.o | |
ifneq ($(CONFIG_SCHED_OMIT_FRAME_POINTER),y) | |
# According to Alan Modra <alan@linuxcare.com.au>, the -fno-omit-frame-pointer is | |
diff -crB 2/kernel/panic.c 1/kernel/panic.c | |
*** 2/kernel/panic.c 2012-09-24 11:44:02.714801577 +0530 | |
--- 1/kernel/panic.c 2011-05-18 12:35:28.000000000 +0530 | |
*************** | |
*** 23,28 **** | |
--- 23,31 ---- | |
#include <linux/init.h> | |
#include <linux/nmi.h> | |
#include <linux/dmi.h> | |
+ #ifdef CONFIG_KERNEL_DEBUG_SEC | |
+ #include <linux/kernel_sec_common.h> | |
+ #endif | |
int panic_on_oops; | |
static unsigned long tainted_mask; | |
*************** | |
*** 30,36 **** | |
static int pause_on_oops_flag; | |
static DEFINE_SPINLOCK(pause_on_oops_lock); | |
! int panic_timeout; | |
ATOMIC_NOTIFIER_HEAD(panic_notifier_list); | |
--- 33,42 ---- | |
static int pause_on_oops_flag; | |
static DEFINE_SPINLOCK(pause_on_oops_lock); | |
! #ifndef CONFIG_PANIC_TIMEOUT | |
! #define CONFIG_PANIC_TIMEOUT 0 | |
! #endif | |
! int panic_timeout = CONFIG_PANIC_TIMEOUT; | |
ATOMIC_NOTIFIER_HEAD(panic_notifier_list); | |
*************** | |
*** 124,133 **** | |
--- 130,146 ---- | |
*/ | |
printk(KERN_EMERG "Rebooting in %d seconds..", panic_timeout); | |
+ #ifndef CONFIG_KERNEL_DEBUG_SEC | |
for (i = 0; i < panic_timeout; i++) { | |
touch_nmi_watchdog(); | |
panic_blink_one_second(); | |
} | |
+ #else | |
+ kernel_sec_set_cp_upload(); | |
+ kernel_sec_save_final_context(); | |
+ kernel_sec_set_upload_cause(UPLOAD_CAUSE_KERNEL_PANIC); | |
+ kernel_sec_hw_reset(false); | |
+ #endif | |
/* | |
* This will not be a clean reboot, with everything | |
* shutting down. But if there is a chance of | |
*************** | |
*** 151,161 **** | |
--- 164,181 ---- | |
disabled_wait(caller); | |
} | |
#endif | |
+ #ifndef CONFIG_KERNEL_DEBUG_SEC | |
local_irq_enable(); | |
while (1) { | |
touch_softlockup_watchdog(); | |
panic_blink_one_second(); | |
} | |
+ #else | |
+ kernel_sec_set_cp_upload(); | |
+ kernel_sec_save_final_context(); | |
+ kernel_sec_set_upload_cause(UPLOAD_CAUSE_KERNEL_PANIC); | |
+ kernel_sec_hw_reset(false); | |
+ #endif | |
} | |
EXPORT_SYMBOL(panic); | |
Only in 1/kernel/power: consoleearlysuspend.c | |
Only in 1/kernel/power: earlysuspend.c | |
Only in 1/kernel/power: fbearlysuspend.c | |
diff -crB 2/kernel/power/Kconfig 1/kernel/power/Kconfig | |
*** 2/kernel/power/Kconfig 2012-09-24 11:44:02.714801577 +0530 | |
--- 1/kernel/power/Kconfig 2011-05-18 12:35:29.000000000 +0530 | |
*************** | |
*** 134,139 **** | |
--- 134,206 ---- | |
Turning OFF this setting is NOT recommended! If in doubt, say Y. | |
+ config HAS_WAKELOCK | |
+ bool | |
+ | |
+ config HAS_EARLYSUSPEND | |
+ bool | |
+ | |
+ config WAKELOCK | |
+ bool "Wake lock" | |
+ depends on PM && RTC_CLASS | |
+ default n | |
+ select HAS_WAKELOCK | |
+ ---help--- | |
+ Enable wakelocks. When user space request a sleep state the | |
+ sleep request will be delayed until no wake locks are held. | |
+ | |
+ config WAKELOCK_STAT | |
+ bool "Wake lock stats" | |
+ depends on WAKELOCK | |
+ default y | |
+ ---help--- | |
+ Report wake lock stats in /proc/wakelocks | |
+ | |
+ config USER_WAKELOCK | |
+ bool "Userspace wake locks" | |
+ depends on WAKELOCK | |
+ default y | |
+ ---help--- | |
+ User-space wake lock api. Write "lockname" or "lockname timeout" | |
+ to /sys/power/wake_lock lock and if needed create a wake lock. | |
+ Write "lockname" to /sys/power/wake_unlock to unlock a user wake | |
+ lock. | |
+ | |
+ config EARLYSUSPEND | |
+ bool "Early suspend" | |
+ depends on WAKELOCK | |
+ default y | |
+ select HAS_EARLYSUSPEND | |
+ ---help--- | |
+ Call early suspend handlers when the user requested sleep state | |
+ changes. | |
+ | |
+ choice | |
+ prompt "User-space screen access" | |
+ default FB_EARLYSUSPEND if !FRAMEBUFFER_CONSOLE | |
+ default CONSOLE_EARLYSUSPEND | |
+ depends on HAS_EARLYSUSPEND | |
+ | |
+ config NO_USER_SPACE_SCREEN_ACCESS_CONTROL | |
+ bool "None" | |
+ | |
+ config CONSOLE_EARLYSUSPEND | |
+ bool "Console switch on early-suspend" | |
+ depends on HAS_EARLYSUSPEND && VT | |
+ ---help--- | |
+ Register early suspend handler to perform a console switch to | |
+ when user-space should stop drawing to the screen and a switch | |
+ back when it should resume. | |
+ | |
+ config FB_EARLYSUSPEND | |
+ bool "Sysfs interface" | |
+ depends on HAS_EARLYSUSPEND | |
+ ---help--- | |
+ Register early suspend handler that notifies and waits for | |
+ user-space through sysfs when user-space should stop drawing | |
+ to the screen and notifies user-space when it should resume. | |
+ endchoice | |
+ | |
config HIBERNATION | |
bool "Hibernation (aka 'suspend to disk')" | |
depends on PM && SWAP && ARCH_HIBERNATION_POSSIBLE | |
diff -crB 2/kernel/power/main.c 1/kernel/power/main.c | |
*** 2/kernel/power/main.c 2012-09-24 11:44:02.714801577 +0530 | |
--- 1/kernel/power/main.c 2011-05-18 12:35:29.000000000 +0530 | |
*************** | |
*** 13,18 **** | |
--- 13,22 ---- | |
#include <linux/resume-trace.h> | |
#include <linux/workqueue.h> | |
+ #ifdef CONFIG_DVFS_LIMIT | |
+ #include <mach/cpu-freq-v210.h> | |
+ #endif | |
+ | |
#include "power.h" | |
DEFINE_MUTEX(pm_mutex); | |
*************** | |
*** 173,179 **** | |
--- 177,187 ---- | |
const char *buf, size_t n) | |
{ | |
#ifdef CONFIG_SUSPEND | |
+ #ifdef CONFIG_EARLYSUSPEND | |
+ suspend_state_t state = PM_SUSPEND_ON; | |
+ #else | |
suspend_state_t state = PM_SUSPEND_STANDBY; | |
+ #endif | |
const char * const *s; | |
#endif | |
char *p; | |
*************** | |
*** 195,202 **** | |
--- 203,217 ---- | |
break; | |
} | |
if (state < PM_SUSPEND_MAX && *s) | |
+ #ifdef CONFIG_EARLYSUSPEND | |
+ if (state == PM_SUSPEND_ON || valid_state(state)) { | |
+ error = 0; | |
+ request_suspend_state(state); | |
+ } | |
+ #else | |
error = enter_state(state); | |
#endif | |
+ #endif | |
Exit: | |
return error ? error : n; | |
*************** | |
*** 229,234 **** | |
--- 244,333 ---- | |
power_attr(pm_trace); | |
#endif /* CONFIG_PM_TRACE */ | |
+ #ifdef CONFIG_USER_WAKELOCK | |
+ power_attr(wake_lock); | |
+ power_attr(wake_unlock); | |
+ #endif | |
+ | |
+ #ifdef CONFIG_DVFS_LIMIT | |
+ //extern int g_dbs_timer_started; | |
+ static int dvfsctrl_locked = 0; | |
+ static int gdDvfsctrl = 0; | |
+ | |
+ static void do_dvfsunlock_timer(struct work_struct *work); | |
+ //static DEFINE_MUTEX (dvfslock_ctrl_mutex); | |
+ static DECLARE_DELAYED_WORK(dvfslock_crtl_unlock_work, do_dvfsunlock_timer); | |
+ | |
+ static ssize_t dvfslock_ctrl(const char *buf, size_t count) | |
+ { | |
+ unsigned int ret = -EINVAL; | |
+ int dlevel; | |
+ int dtime_msec; | |
+ | |
+ //mutex_lock(&dvfslock_ctrl_mutex); | |
+ ret = sscanf(buf, "%u", &gdDvfsctrl); | |
+ if (ret != 1) | |
+ return -EINVAL; | |
+ | |
+ //if (!g_dbs_timer_started) return -EINVAL; | |
+ if (gdDvfsctrl == 0) { | |
+ if (dvfsctrl_locked) { | |
+ s5pv210_unlock_dvfs_high_level(DVFS_LOCK_TOKEN_6); | |
+ dvfsctrl_locked = 0; | |
+ } | |
+ return -EINVAL; | |
+ } | |
+ | |
+ if (dvfsctrl_locked) | |
+ return 0; | |
+ | |
+ dlevel = gdDvfsctrl & 0xffff0000; | |
+ dtime_msec = gdDvfsctrl & 0x0000ffff; | |
+ | |
+ if (dtime_msec < 16) | |
+ dtime_msec = 16; | |
+ if (dtime_msec == 0) | |
+ return -EINVAL; | |
+ | |
+ if (dlevel) | |
+ dlevel = L1; | |
+ else | |
+ dlevel = L0; | |
+ | |
+ printk(KERN_DEBUG "%s : level=%d, time=%d\n", __func__, dlevel, dtime_msec); | |
+ | |
+ s5pv210_lock_dvfs_high_level(DVFS_LOCK_TOKEN_6, dlevel); | |
+ dvfsctrl_locked = 1; | |
+ | |
+ schedule_delayed_work(&dvfslock_crtl_unlock_work, msecs_to_jiffies(dtime_msec)); | |
+ | |
+ //mutex_unlock(&dvfslock_ctrl_mutex); | |
+ | |
+ return -EINVAL; | |
+ } | |
+ | |
+ static void do_dvfsunlock_timer(struct work_struct *work) | |
+ { | |
+ dvfsctrl_locked = 0; | |
+ s5pv210_unlock_dvfs_high_level(DVFS_LOCK_TOKEN_6); | |
+ } | |
+ | |
+ static ssize_t dvfslock_ctrl_show(struct kobject *kobj, | |
+ struct kobj_attribute *attr, char *buf) | |
+ { | |
+ return sprintf(buf, "0x%08x\n", gdDvfsctrl); | |
+ } | |
+ | |
+ static ssize_t dvfslock_ctrl_store(struct kobject *kobj, struct kobj_attribute *attr, | |
+ const char *buf, size_t n) | |
+ { | |
+ dvfslock_ctrl(buf, 0); | |
+ return n; | |
+ } | |
+ | |
+ power_attr(dvfslock_ctrl); | |
+ #endif | |
+ | |
static struct attribute * g[] = { | |
&state_attr.attr, | |
#ifdef CONFIG_PM_TRACE | |
*************** | |
*** 239,244 **** | |
--- 338,350 ---- | |
#ifdef CONFIG_PM_DEBUG | |
&pm_test_attr.attr, | |
#endif | |
+ #ifdef CONFIG_USER_WAKELOCK | |
+ &wake_lock_attr.attr, | |
+ &wake_unlock_attr.attr, | |
+ #endif | |
+ #endif | |
+ #ifdef CONFIG_DVFS_LIMIT | |
+ &dvfslock_ctrl_attr.attr, | |
#endif | |
NULL, | |
}; | |
diff -crB 2/kernel/power/Makefile 1/kernel/power/Makefile | |
*** 2/kernel/power/Makefile 2012-09-24 11:44:02.714801577 +0530 | |
--- 1/kernel/power/Makefile 2011-05-18 12:35:29.000000000 +0530 | |
*************** | |
*** 11,15 **** | |
--- 11,21 ---- | |
obj-$(CONFIG_HIBERNATION) += hibernate.o snapshot.o swap.o user.o \ | |
block_io.o | |
obj-$(CONFIG_SUSPEND_NVS) += nvs.o | |
+ obj-$(CONFIG_WAKELOCK) += wakelock.o | |
+ obj-$(CONFIG_USER_WAKELOCK) += userwakelock.o | |
+ obj-$(CONFIG_EARLYSUSPEND) += earlysuspend.o | |
+ obj-$(CONFIG_CONSOLE_EARLYSUSPEND) += consoleearlysuspend.o | |
+ obj-$(CONFIG_FB_EARLYSUSPEND) += fbearlysuspend.o | |
obj-$(CONFIG_MAGIC_SYSRQ) += poweroff.o | |
+ obj-$(CONFIG_SVNET_WHITELIST) += portlist.o | |
Only in 1/kernel/power: portlist.c | |
Only in 1/kernel/power: portlist.h | |
diff -crB 2/kernel/power/power.h 1/kernel/power/power.h | |
*** 2/kernel/power/power.h 2012-09-24 11:44:02.714801577 +0530 | |
--- 1/kernel/power/power.h 2011-05-18 12:35:29.000000000 +0530 | |
*************** | |
*** 233,235 **** | |
--- 233,259 ---- | |
{ | |
} | |
#endif | |
+ | |
+ #ifdef CONFIG_WAKELOCK | |
+ /* kernel/power/wakelock.c */ | |
+ extern struct workqueue_struct *suspend_work_queue; | |
+ extern struct wake_lock main_wake_lock; | |
+ extern suspend_state_t requested_suspend_state; | |
+ #endif | |
+ | |
+ #ifdef CONFIG_USER_WAKELOCK | |
+ ssize_t wake_lock_show(struct kobject *kobj, struct kobj_attribute *attr, | |
+ char *buf); | |
+ ssize_t wake_lock_store(struct kobject *kobj, struct kobj_attribute *attr, | |
+ const char *buf, size_t n); | |
+ ssize_t wake_unlock_show(struct kobject *kobj, struct kobj_attribute *attr, | |
+ char *buf); | |
+ ssize_t wake_unlock_store(struct kobject *kobj, struct kobj_attribute *attr, | |
+ const char *buf, size_t n); | |
+ #endif | |
+ | |
+ #ifdef CONFIG_EARLYSUSPEND | |
+ /* kernel/power/earlysuspend.c */ | |
+ void request_suspend_state(suspend_state_t state); | |
+ suspend_state_t get_suspend_state(void); | |
+ #endif | |
diff -crB 2/kernel/power/process.c 1/kernel/power/process.c | |
*** 2/kernel/power/process.c 2012-09-24 11:44:02.714801577 +0530 | |
--- 1/kernel/power/process.c 2011-05-18 12:35:29.000000000 +0530 | |
*************** | |
*** 15,20 **** | |
--- 15,21 ---- | |
#include <linux/syscalls.h> | |
#include <linux/freezer.h> | |
#include <linux/delay.h> | |
+ #include <linux/wakelock.h> | |
/* | |
* Timeout for stopping processes | |
*************** | |
*** 38,43 **** | |
--- 39,45 ---- | |
struct timeval start, end; | |
u64 elapsed_csecs64; | |
unsigned int elapsed_csecs; | |
+ unsigned int wakeup = 0; | |
do_gettimeofday(&start); | |
*************** | |
*** 63,68 **** | |
--- 65,74 ---- | |
todo++; | |
} while_each_thread(g, p); | |
read_unlock(&tasklist_lock); | |
+ if (todo && has_wake_lock(WAKE_LOCK_SUSPEND)) { | |
+ wakeup = 1; | |
+ break; | |
+ } | |
if (!todo || time_after(jiffies, end_time)) | |
break; | |
*************** | |
*** 84,97 **** | |
* and caller must call thaw_processes() if something fails), | |
* but it cleans up leftover PF_FREEZE requests. | |
*/ | |
! printk("\n"); | |
! printk(KERN_ERR "Freezing of tasks failed after %d.%02d seconds " | |
! "(%d tasks refusing to freeze):\n", | |
! elapsed_csecs / 100, elapsed_csecs % 100, todo); | |
read_lock(&tasklist_lock); | |
do_each_thread(g, p) { | |
task_lock(p); | |
! if (freezing(p) && !freezer_should_skip(p)) | |
sched_show_task(p); | |
cancel_freezing(p); | |
task_unlock(p); | |
--- 90,111 ---- | |
* and caller must call thaw_processes() if something fails), | |
* but it cleans up leftover PF_FREEZE requests. | |
*/ | |
! if(wakeup) { | |
! printk("\n"); | |
! printk(KERN_ERR "Freezing of %s aborted\n", | |
! sig_only ? "user space " : "tasks "); | |
! } | |
! else { | |
! printk("\n"); | |
! printk(KERN_ERR "Freezing of tasks failed after %d.%02d seconds " | |
! "(%d tasks refusing to freeze):\n", | |
! elapsed_csecs / 100, elapsed_csecs % 100, todo); | |
! } | |
read_lock(&tasklist_lock); | |
do_each_thread(g, p) { | |
task_lock(p); | |
! if (freezing(p) && !freezer_should_skip(p) && | |
! elapsed_csecs > 100) | |
sched_show_task(p); | |
cancel_freezing(p); | |
task_unlock(p); | |
diff -crB 2/kernel/power/suspend.c 1/kernel/power/suspend.c | |
*** 2/kernel/power/suspend.c 2012-09-24 11:44:02.714801577 +0530 | |
--- 1/kernel/power/suspend.c 2011-05-18 12:35:29.000000000 +0530 | |
*************** | |
*** 26,31 **** | |
--- 26,34 ---- | |
#include "power.h" | |
const char *const pm_states[PM_SUSPEND_MAX] = { | |
+ #ifdef CONFIG_EARLYSUSPEND | |
+ [PM_SUSPEND_ON] = "on", | |
+ #endif | |
[PM_SUSPEND_STANDBY] = "standby", | |
[PM_SUSPEND_MEM] = "mem", | |
}; | |
Only in 1/kernel/power: userwakelock.c | |
Only in 1/kernel/power: wakelock.c | |
diff -crB 2/kernel/printk.c 1/kernel/printk.c | |
*** 2/kernel/printk.c 2012-09-24 11:44:02.710801651 +0530 | |
--- 1/kernel/printk.c 2011-05-18 12:35:29.000000000 +0530 | |
*************** | |
*** 55,60 **** | |
--- 55,64 ---- | |
#define __LOG_BUF_LEN (1 << CONFIG_LOG_BUF_SHIFT) | |
+ #ifdef CONFIG_DEBUG_LL | |
+ extern void printascii(char *); | |
+ #endif | |
+ | |
/* printk's without a loglevel use this.. */ | |
#define DEFAULT_MESSAGE_LOGLEVEL 4 /* KERN_WARNING */ | |
*************** | |
*** 165,170 **** | |
--- 169,194 ---- | |
} | |
#endif | |
+ /* | |
+ * Mark for GetLog (tkhwang) | |
+ */ | |
+ | |
+ struct struct_kernel_log_mark { | |
+ u32 special_mark_1; | |
+ u32 special_mark_2; | |
+ u32 special_mark_3; | |
+ u32 special_mark_4; | |
+ void *p__log_buf; | |
+ }; | |
+ | |
+ static struct struct_kernel_log_mark kernel_log_mark = { | |
+ .special_mark_1 = (('*' << 24) | ('^' << 16) | ('^' << 8) | ('*' << 0)), | |
+ .special_mark_2 = (('I' << 24) | ('n' << 16) | ('f' << 8) | ('o' << 0)), | |
+ .special_mark_3 = (('H' << 24) | ('e' << 16) | ('r' << 8) | ('e' << 0)), | |
+ .special_mark_4 = (('k' << 24) | ('l' << 16) | ('o' << 8) | ('g' << 0)), | |
+ .p__log_buf = __log_buf, | |
+ }; | |
+ | |
static int __init log_buf_len_setup(char *str) | |
{ | |
unsigned size = memparse(str, &str); | |
*************** | |
*** 201,206 **** | |
--- 225,235 ---- | |
printk(KERN_NOTICE "log_buf_len: %d\n", log_buf_len); | |
} | |
out: | |
+ | |
+ /* | |
+ * Mark for GetLog (tkhwang) | |
+ */ | |
+ kernel_log_mark.p__log_buf = __log_buf; | |
return 1; | |
} | |
*************** | |
*** 259,264 **** | |
--- 288,355 ---- | |
} | |
#endif | |
+ /* | |
+ * Return the number of unread characters in the log buffer. | |
+ */ | |
+ static int log_buf_get_len(void) | |
+ { | |
+ return logged_chars; | |
+ } | |
+ | |
+ /* | |
+ * Clears the ring-buffer | |
+ */ | |
+ void log_buf_clear(void) | |
+ { | |
+ logged_chars = 0; | |
+ } | |
+ | |
+ /* | |
+ * Copy a range of characters from the log buffer. | |
+ */ | |
+ int log_buf_copy(char *dest, int idx, int len) | |
+ { | |
+ int ret, max; | |
+ bool took_lock = false; | |
+ | |
+ if (!oops_in_progress) { | |
+ spin_lock_irq(&logbuf_lock); | |
+ took_lock = true; | |
+ } | |
+ | |
+ max = log_buf_get_len(); | |
+ if (idx < 0 || idx >= max) { | |
+ ret = -1; | |
+ } else { | |
+ if (len > max - idx) | |
+ len = max - idx; | |
+ ret = len; | |
+ idx += (log_end - max); | |
+ while (len-- > 0) | |
+ dest[len] = LOG_BUF(idx + len); | |
+ } | |
+ | |
+ if (took_lock) | |
+ spin_unlock_irq(&logbuf_lock); | |
+ | |
+ return ret; | |
+ } | |
+ | |
+ /* | |
+ * Commands to do_syslog: | |
+ * | |
+ * 0 -- Close the log. Currently a NOP. | |
+ * 1 -- Open the log. Currently a NOP. | |
+ * 2 -- Read from the log. | |
+ * 3 -- Read all messages remaining in the ring buffer. | |
+ * 4 -- Read and clear all messages remaining in the ring buffer | |
+ * 5 -- Clear ring buffer. | |
+ * 6 -- Disable printk's to console | |
+ * 7 -- Enable printk's to console | |
+ * 8 -- Set level of messages printed to console | |
+ * 9 -- Return number of unread characters in the log buffer | |
+ * 10 -- Return size of the log buffer | |
+ */ | |
int do_syslog(int type, char __user *buf, int len, bool from_file) | |
{ | |
unsigned i, j, limit, count; | |
*************** | |
*** 734,739 **** | |
--- 825,833 ---- | |
printed_len += vscnprintf(printk_buf + printed_len, | |
sizeof(printk_buf) - printed_len, fmt, args); | |
+ #ifdef CONFIG_DEBUG_LL | |
+ printascii(printk_buf); | |
+ #endif | |
p = printk_buf; | |
diff -crB 2/kernel/sched.c 1/kernel/sched.c | |
*** 2/kernel/sched.c 2012-09-24 11:44:02.710801651 +0530 | |
--- 1/kernel/sched.c 2011-05-18 12:35:29.000000000 +0530 | |
*************** | |
*** 72,77 **** | |
--- 72,78 ---- | |
#include <linux/ctype.h> | |
#include <linux/ftrace.h> | |
#include <linux/slab.h> | |
+ #include <linux/cpuacct.h> | |
#include <asm/tlb.h> | |
#include <asm/irq_regs.h> | |
*************** | |
*** 5081,5087 **** | |
unsigned state; | |
state = p->state ? __ffs(p->state) + 1 : 0; | |
! printk(KERN_INFO "%-13.13s %c", p->comm, | |
state < sizeof(stat_nam) - 1 ? stat_nam[state] : '?'); | |
#if BITS_PER_LONG == 32 | |
if (state == TASK_RUNNING) | |
--- 5082,5088 ---- | |
unsigned state; | |
state = p->state ? __ffs(p->state) + 1 : 0; | |
! printk(KERN_INFO "%-15.15s %c", p->comm, | |
state < sizeof(stat_nam) - 1 ? stat_nam[state] : '?'); | |
#if BITS_PER_LONG == 32 | |
if (state == TASK_RUNNING) | |
*************** | |
*** 7497,7502 **** | |
--- 7498,7528 ---- | |
int i, j; | |
unsigned long alloc_size = 0, ptr; | |
+ //{{ Add GAForensic INFO - 2/2 | |
+ /* | |
+ * Add GAForensic init for preventing symbol removal for optimization. | |
+ */ | |
+ | |
+ GAFINFO.rq_struct_curr = offsetof(struct rq, curr); | |
+ | |
+ #ifdef CONFIG_FAIR_GROUP_SCHED | |
+ GAFINFO.cfs_rq_struct_rq_struct=offsetof(struct cfs_rq, rq); | |
+ #else | |
+ GAFINFO.cfs_rq_struct_rq_struct=0x1224; | |
+ #endif | |
+ | |
+ unsigned short *checksum = &(GAFINFO.GAFINFOCheckSum); | |
+ unsigned char *memory = &GAFINFO; | |
+ unsigned char address; | |
+ for (*checksum=0,address = 0; address < (sizeof(GAFINFO) -sizeof(GAFINFO.GAFINFOCheckSum)); address++) | |
+ { | |
+ if ((*checksum) & 0x8000) | |
+ (*checksum) = (((*checksum) << 1) | 1 ) ^ memory[address]; | |
+ else | |
+ (*checksum) = ((*checksum) << 1) ^ memory[address]; | |
+ } | |
+ //}} Add GAForensicINFO - 2/2 | |
+ | |
#ifdef CONFIG_FAIR_GROUP_SCHED | |
alloc_size += 2 * nr_cpu_ids * sizeof(void **); | |
#endif | |
*************** | |
*** 7680,7692 **** | |
return (nested == PREEMPT_INATOMIC_BASE + preempt_offset); | |
} | |
void __might_sleep(const char *file, int line, int preempt_offset) | |
{ | |
#ifdef in_atomic | |
static unsigned long prev_jiffy; /* ratelimiting */ | |
if ((preempt_count_equals(preempt_offset) && !irqs_disabled()) || | |
! system_state != SYSTEM_RUNNING || oops_in_progress) | |
return; | |
if (time_before(jiffies, prev_jiffy + HZ) && prev_jiffy) | |
return; | |
--- 7706,7729 ---- | |
return (nested == PREEMPT_INATOMIC_BASE + preempt_offset); | |
} | |
+ static int __might_sleep_init_called; | |
+ int __init __might_sleep_init(void) | |
+ { | |
+ __might_sleep_init_called = 1; | |
+ return 0; | |
+ } | |
+ early_initcall(__might_sleep_init); | |
+ | |
void __might_sleep(const char *file, int line, int preempt_offset) | |
{ | |
#ifdef in_atomic | |
static unsigned long prev_jiffy; /* ratelimiting */ | |
if ((preempt_count_equals(preempt_offset) && !irqs_disabled()) || | |
! oops_in_progress) | |
! return; | |
! if (system_state != SYSTEM_RUNNING && | |
! (!__might_sleep_init_called || system_state != SYSTEM_BOOTING)) | |
return; | |
if (time_before(jiffies, prev_jiffy + HZ) && prev_jiffy) | |
return; | |
*************** | |
*** 8086,8091 **** | |
--- 8123,8133 ---- | |
if (unlikely(running)) | |
tsk->sched_class->put_prev_task(rq, tsk); | |
+ #ifdef CONFIG_FAIR_GROUP_SCHED | |
+ if (tsk->sched_class->prep_move_group) | |
+ tsk->sched_class->prep_move_group(tsk, on_rq); | |
+ #endif | |
+ | |
set_task_rq(tsk, task_cpu(tsk)); | |
#ifdef CONFIG_FAIR_GROUP_SCHED | |
*************** | |
*** 8503,8508 **** | |
--- 8545,8559 ---- | |
static int | |
cpu_cgroup_can_attach_task(struct cgroup *cgrp, struct task_struct *tsk) | |
{ | |
+ if ((current != tsk) && (!capable(CAP_SYS_NICE))) { | |
+ const struct cred *cred = current_cred(), *tcred; | |
+ | |
+ tcred = __task_cred(tsk); | |
+ | |
+ if (cred->euid != tcred->uid && cred->euid != tcred->suid) | |
+ return -EPERM; | |
+ } | |
+ | |
#ifdef CONFIG_RT_GROUP_SCHED | |
if (!sched_rt_can_attach(cgroup_tg(cgrp), tsk)) | |
return -EINVAL; | |
*************** | |
*** 8647,8654 **** | |
--- 8698,8727 ---- | |
u64 __percpu *cpuusage; | |
struct percpu_counter cpustat[CPUACCT_STAT_NSTATS]; | |
struct cpuacct *parent; | |
+ struct cpuacct_charge_calls *cpufreq_fn; | |
+ void *cpuacct_data; | |
}; | |
+ static struct cpuacct *cpuacct_root; | |
+ | |
+ /* Default calls for cpufreq accounting */ | |
+ static struct cpuacct_charge_calls *cpuacct_cpufreq; | |
+ int cpuacct_register_cpufreq(struct cpuacct_charge_calls *fn) | |
+ { | |
+ cpuacct_cpufreq = fn; | |
+ | |
+ /* | |
+ * Root node is created before platform can register callbacks, | |
+ * initalize here. | |
+ */ | |
+ if (cpuacct_root && fn) { | |
+ cpuacct_root->cpufreq_fn = fn; | |
+ if (fn->init) | |
+ fn->init(&cpuacct_root->cpuacct_data); | |
+ } | |
+ return 0; | |
+ } | |
+ | |
struct cgroup_subsys cpuacct_subsys; | |
/* return cpu accounting group corresponding to this container */ | |
*************** | |
*** 8683,8690 **** | |
--- 8756,8771 ---- | |
if (percpu_counter_init(&ca->cpustat[i], 0)) | |
goto out_free_counters; | |
+ ca->cpufreq_fn = cpuacct_cpufreq; | |
+ | |
+ /* If available, have platform code initalize cpu frequency table */ | |
+ if (ca->cpufreq_fn && ca->cpufreq_fn->init) | |
+ ca->cpufreq_fn->init(&ca->cpuacct_data); | |
+ | |
if (cgrp->parent) | |
ca->parent = cgroup_ca(cgrp->parent); | |
+ else | |
+ cpuacct_root = ca; | |
return &ca->css; | |
*************** | |
*** 8812,8817 **** | |
--- 8893,8924 ---- | |
return 0; | |
} | |
+ static int cpuacct_cpufreq_show(struct cgroup *cgrp, struct cftype *cft, | |
+ struct cgroup_map_cb *cb) | |
+ { | |
+ struct cpuacct *ca = cgroup_ca(cgrp); | |
+ if (ca->cpufreq_fn && ca->cpufreq_fn->cpufreq_show) | |
+ ca->cpufreq_fn->cpufreq_show(ca->cpuacct_data, cb); | |
+ | |
+ return 0; | |
+ } | |
+ | |
+ /* return total cpu power usage (milliWatt second) of a group */ | |
+ static u64 cpuacct_powerusage_read(struct cgroup *cgrp, struct cftype *cft) | |
+ { | |
+ int i; | |
+ struct cpuacct *ca = cgroup_ca(cgrp); | |
+ u64 totalpower = 0; | |
+ | |
+ if (ca->cpufreq_fn && ca->cpufreq_fn->power_usage) | |
+ for_each_present_cpu(i) { | |
+ totalpower += ca->cpufreq_fn->power_usage( | |
+ ca->cpuacct_data); | |
+ } | |
+ | |
+ return totalpower; | |
+ } | |
+ | |
static struct cftype files[] = { | |
{ | |
.name = "usage", | |
*************** | |
*** 8826,8831 **** | |
--- 8933,8946 ---- | |
.name = "stat", | |
.read_map = cpuacct_stats_show, | |
}, | |
+ { | |
+ .name = "cpufreq", | |
+ .read_map = cpuacct_cpufreq_show, | |
+ }, | |
+ { | |
+ .name = "power", | |
+ .read_u64 = cpuacct_powerusage_read | |
+ }, | |
}; | |
static int cpuacct_populate(struct cgroup_subsys *ss, struct cgroup *cgrp) | |
*************** | |
*** 8855,8860 **** | |
--- 8970,8979 ---- | |
for (; ca; ca = ca->parent) { | |
u64 *cpuusage = per_cpu_ptr(ca->cpuusage, cpu); | |
*cpuusage += cputime; | |
+ | |
+ /* Call back into platform code to account for CPU speeds */ | |
+ if (ca->cpufreq_fn && ca->cpufreq_fn->charge) | |
+ ca->cpufreq_fn->charge(ca->cpuacct_data, cputime, cpu); | |
} | |
rcu_read_unlock(); | |
diff -crB 2/kernel/sched_fair.c 1/kernel/sched_fair.c | |
*** 2/kernel/sched_fair.c 2012-09-24 11:44:02.714801577 +0530 | |
--- 1/kernel/sched_fair.c 2011-05-18 12:35:29.000000000 +0530 | |
*************** | |
*** 802,807 **** | |
--- 802,809 ---- | |
static void | |
dequeue_entity(struct cfs_rq *cfs_rq, struct sched_entity *se, int flags) | |
{ | |
+ u64 min_vruntime; | |
+ | |
/* | |
* Update run-time statistics of the 'current'. | |
*/ | |
*************** | |
*** 826,831 **** | |
--- 828,835 ---- | |
if (se != cfs_rq->curr) | |
__dequeue_entity(cfs_rq, se); | |
account_entity_dequeue(cfs_rq, se); | |
+ | |
+ min_vruntime = cfs_rq->min_vruntime; | |
update_min_vruntime(cfs_rq); | |
/* | |
*************** | |
*** 834,840 **** | |
* movement in our normalized position. | |
*/ | |
if (!(flags & DEQUEUE_SLEEP)) | |
! se->vruntime -= cfs_rq->min_vruntime; | |
} | |
/* | |
--- 838,844 ---- | |
* movement in our normalized position. | |
*/ | |
if (!(flags & DEQUEUE_SLEEP)) | |
! se->vruntime -= min_vruntime; | |
} | |
/* | |
*************** | |
*** 3618,3627 **** | |
static void moved_group_fair(struct task_struct *p, int on_rq) | |
{ | |
struct cfs_rq *cfs_rq = task_cfs_rq(p); | |
update_curr(cfs_rq); | |
if (!on_rq) | |
! place_entity(cfs_rq, &p->se, 1); | |
} | |
#endif | |
--- 3622,3642 ---- | |
static void moved_group_fair(struct task_struct *p, int on_rq) | |
{ | |
struct cfs_rq *cfs_rq = task_cfs_rq(p); | |
+ struct sched_entity *se = &p->se; | |
update_curr(cfs_rq); | |
if (!on_rq) | |
! se->vruntime += cfs_rq->min_vruntime; | |
! } | |
! | |
! static void prep_move_group_fair(struct task_struct *p, int on_rq) | |
! { | |
! struct cfs_rq *cfs_rq = task_cfs_rq(p); | |
! struct sched_entity *se = &p->se; | |
! | |
! /* normalize the runtime of a sleeping task before moving it */ | |
! if (!on_rq) | |
! se->vruntime -= cfs_rq->min_vruntime; | |
} | |
#endif | |
*************** | |
*** 3674,3679 **** | |
--- 3689,3695 ---- | |
#ifdef CONFIG_FAIR_GROUP_SCHED | |
.moved_group = moved_group_fair, | |
+ .prep_move_group = prep_move_group_fair, | |
#endif | |
}; | |
diff -crB 2/kernel/sysctl.c 1/kernel/sysctl.c | |
*** 2/kernel/sysctl.c 2012-09-24 11:44:02.714801577 +0530 | |
--- 1/kernel/sysctl.c 2011-05-18 12:35:29.000000000 +0530 | |
*************** | |
*** 92,97 **** | |
--- 92,98 ---- | |
extern unsigned int core_pipe_limit; | |
extern int pid_max; | |
extern int min_free_kbytes; | |
+ extern int min_free_order_shift; | |
extern int pid_max_min, pid_max_max; | |
extern int sysctl_drop_caches; | |
extern int percpu_pagelist_fraction; | |
*************** | |
*** 1155,1160 **** | |
--- 1156,1168 ---- | |
.extra1 = &zero, | |
}, | |
{ | |
+ .procname = "min_free_order_shift", | |
+ .data = &min_free_order_shift, | |
+ .maxlen = sizeof(min_free_order_shift), | |
+ .mode = 0644, | |
+ .proc_handler = &proc_dointvec | |
+ }, | |
+ { | |
.procname = "percpu_pagelist_fraction", | |
.data = &percpu_pagelist_fraction, | |
.maxlen = sizeof(percpu_pagelist_fraction), | |
Only in 2/lib: .gitignore | |
diff -crB 2/lib/Kconfig.debug 1/lib/Kconfig.debug | |
*** 2/lib/Kconfig.debug 2012-09-24 11:44:02.714801577 +0530 | |
--- 1/lib/Kconfig.debug 2011-05-18 12:35:29.000000000 +0530 | |
*************** | |
*** 587,594 **** | |
mutexes and rwsems. | |
config STACKTRACE | |
! bool | |
depends on STACKTRACE_SUPPORT | |
config DEBUG_KOBJECT | |
bool "kobject debugging" | |
--- 587,595 ---- | |
mutexes and rwsems. | |
config STACKTRACE | |
! bool "Stacktrace" | |
depends on STACKTRACE_SUPPORT | |
+ default y | |
config DEBUG_KOBJECT | |
bool "kobject debugging" | |
diff -crB 2/Makefile 1/Makefile | |
*** 2/Makefile 2012-09-24 11:44:02.718801502 +0530 | |
--- 1/Makefile 2011-05-18 12:34:10.000000000 +0530 | |
*************** | |
*** 188,196 **** | |
# Default value for CROSS_COMPILE is not to prefix executables | |
# Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile | |
export KBUILD_BUILDHOST := $(SUBARCH) | |
! ARCH ?= $(SUBARCH) | |
! CROSS_COMPILE ?= | |
! CROSS_COMPILE ?= $(CONFIG_CROSS_COMPILE:"%"=%) | |
# Architecture as present in compile.h | |
UTS_MACHINE := $(ARCH) | |
--- 188,195 ---- | |
# Default value for CROSS_COMPILE is not to prefix executables | |
# Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile | |
export KBUILD_BUILDHOST := $(SUBARCH) | |
! ARCH ?= arm | |
! CROSS_COMPILE ?= /opt/toolchains/arm-2009q3/bin/arm-none-linux-gnueabi- | |
# Architecture as present in compile.h | |
UTS_MACHINE := $(ARCH) | |
Only in 1/mm: ashmem.c | |
diff -crB 2/mm/Makefile 1/mm/Makefile | |
*** 2/mm/Makefile 2012-09-24 11:44:02.722801425 +0530 | |
--- 1/mm/Makefile 2011-05-18 12:35:29.000000000 +0530 | |
*************** | |
*** 24,29 **** | |
--- 24,30 ---- | |
obj-$(CONFIG_NUMA) += mempolicy.o | |
obj-$(CONFIG_SPARSEMEM) += sparse.o | |
obj-$(CONFIG_SPARSEMEM_VMEMMAP) += sparse-vmemmap.o | |
+ obj-$(CONFIG_ASHMEM) += ashmem.o | |
obj-$(CONFIG_SLOB) += slob.o | |
obj-$(CONFIG_COMPACTION) += compaction.o | |
obj-$(CONFIG_MMU_NOTIFIER) += mmu_notifier.o | |
diff -crB 2/mm/page_alloc.c 1/mm/page_alloc.c | |
*** 2/mm/page_alloc.c 2012-09-24 11:44:02.718801502 +0530 | |
--- 1/mm/page_alloc.c 2011-05-18 12:35:29.000000000 +0530 | |
*************** | |
*** 166,171 **** | |
--- 166,172 ---- | |
}; | |
int min_free_kbytes = 1024; | |
+ int min_free_order_shift = 1; | |
static unsigned long __meminitdata nr_kernel_pages; | |
static unsigned long __meminitdata nr_all_pages; | |
*************** | |
*** 1477,1483 **** | |
free_pages -= z->free_area[o].nr_free << o; | |
/* Require fewer higher order pages to be free */ | |
! min >>= 1; | |
if (free_pages <= min) | |
return 0; | |
--- 1478,1484 ---- | |
free_pages -= z->free_area[o].nr_free << o; | |
/* Require fewer higher order pages to be free */ | |
! min >>= min_free_order_shift; | |
if (free_pages <= min) | |
return 0; | |
*************** | |
*** 3148,3153 **** | |
--- 3149,3168 ---- | |
#define LONG_ALIGN(x) (((x)+(sizeof(long))-1)&~((sizeof(long))-1)) | |
/* | |
+ * Check if a pageblock contains reserved pages | |
+ */ | |
+ static int pageblock_is_reserved(unsigned long start_pfn) | |
+ { | |
+ unsigned long end_pfn = start_pfn + pageblock_nr_pages; | |
+ unsigned long pfn; | |
+ | |
+ for (pfn = start_pfn; pfn < end_pfn; pfn++) | |
+ if (PageReserved(pfn_to_page(pfn))) | |
+ return 1; | |
+ return 0; | |
+ } | |
+ | |
+ /* | |
* Mark a number of pageblocks as MIGRATE_RESERVE. The number | |
* of blocks reserved is based on min_wmark_pages(zone). The memory within | |
* the reserve will tend to store contiguous free pages. Setting min_free_kbytes | |
*************** | |
*** 3186,3192 **** | |
continue; | |
/* Blocks with reserved pages will never free, skip them. */ | |
! if (PageReserved(page)) | |
continue; | |
block_migratetype = get_pageblock_migratetype(page); | |
--- 3201,3207 ---- | |
continue; | |
/* Blocks with reserved pages will never free, skip them. */ | |
! if (pageblock_is_reserved(pfn)) | |
continue; | |
block_migratetype = get_pageblock_migratetype(page); | |
diff -crB 2/mm/shmem.c 1/mm/shmem.c | |
*** 2/mm/shmem.c 2012-09-24 11:44:02.718801502 +0530 | |
--- 1/mm/shmem.c 2011-05-18 12:35:29.000000000 +0530 | |
*************** | |
*** 2739,2744 **** | |
--- 2739,2752 ---- | |
} | |
EXPORT_SYMBOL_GPL(shmem_file_setup); | |
+ void shmem_set_file(struct vm_area_struct *vma, struct file *file) | |
+ { | |
+ if (vma->vm_file) | |
+ fput(vma->vm_file); | |
+ vma->vm_file = file; | |
+ vma->vm_ops = &shmem_vm_ops; | |
+ } | |
+ | |
/** | |
* shmem_zero_setup - setup a shared anonymous mapping | |
* @vma: the vma to be mmapped is prepared by do_mmap_pgoff | |
*************** | |
*** 2751,2760 **** | |
file = shmem_file_setup("dev/zero", size, vma->vm_flags); | |
if (IS_ERR(file)) | |
return PTR_ERR(file); | |
! | |
! if (vma->vm_file) | |
! fput(vma->vm_file); | |
! vma->vm_file = file; | |
! vma->vm_ops = &shmem_vm_ops; | |
return 0; | |
} | |
--- 2759,2764 ---- | |
file = shmem_file_setup("dev/zero", size, vma->vm_flags); | |
if (IS_ERR(file)) | |
return PTR_ERR(file); | |
! shmem_set_file(vma, file); | |
return 0; | |
} | |
Only in 1/net: activity_stats.c | |
diff -crB 2/net/bluetooth/af_bluetooth.c 1/net/bluetooth/af_bluetooth.c | |
*** 2/net/bluetooth/af_bluetooth.c 2012-09-24 11:44:02.726801349 +0530 | |
--- 1/net/bluetooth/af_bluetooth.c 2011-05-18 12:35:30.000000000 +0530 | |
*************** | |
*** 40,45 **** | |
--- 40,54 ---- | |
#include <net/bluetooth/bluetooth.h> | |
+ #ifdef CONFIG_ANDROID_PARANOID_NETWORK | |
+ #include <linux/android_aid.h> | |
+ #endif | |
+ | |
+ #ifndef CONFIG_BT_SOCK_DEBUG | |
+ #undef BT_DBG | |
+ #define BT_DBG(D...) | |
+ #endif | |
+ | |
#define VERSION "2.15" | |
/* Bluetooth sockets */ | |
*************** | |
*** 125,135 **** | |
--- 134,173 ---- | |
} | |
EXPORT_SYMBOL(bt_sock_unregister); | |
+ #ifdef CONFIG_ANDROID_PARANOID_NETWORK | |
+ static inline int current_has_bt_admin(void) | |
+ { | |
+ return (!current_euid() || in_egroup_p(AID_NET_BT_ADMIN)); | |
+ } | |
+ | |
+ static inline int current_has_bt(void) | |
+ { | |
+ return (current_has_bt_admin() || in_egroup_p(AID_NET_BT)); | |
+ } | |
+ # else | |
+ static inline int current_has_bt_admin(void) | |
+ { | |
+ return 1; | |
+ } | |
+ | |
+ static inline int current_has_bt(void) | |
+ { | |
+ return 1; | |
+ } | |
+ #endif | |
+ | |
static int bt_sock_create(struct net *net, struct socket *sock, int proto, | |
int kern) | |
{ | |
int err; | |
+ if (proto == BTPROTO_RFCOMM || proto == BTPROTO_SCO || | |
+ proto == BTPROTO_L2CAP) { | |
+ if (!current_has_bt()) | |
+ return -EPERM; | |
+ } else if (!current_has_bt_admin()) | |
+ return -EPERM; | |
+ | |
if (net != &init_net) | |
return -EAFNOSUPPORT; | |
diff -crB 2/net/bluetooth/hci_conn.c 1/net/bluetooth/hci_conn.c | |
*** 2/net/bluetooth/hci_conn.c 2012-09-24 11:44:02.726801349 +0530 | |
--- 1/net/bluetooth/hci_conn.c 2011-05-18 12:35:30.000000000 +0530 | |
*************** | |
*** 1,6 **** | |
/* | |
BlueZ - Bluetooth protocol stack for Linux | |
! Copyright (C) 2000-2001 Qualcomm Incorporated | |
Written 2000,2001 by Maxim Krasnyansky <maxk@qualcomm.com> | |
--- 1,6 ---- | |
/* | |
BlueZ - Bluetooth protocol stack for Linux | |
! Copyright (c) 2000-2001, 2010, Code Aurora Forum. All rights reserved. | |
Written 2000,2001 by Maxim Krasnyansky <maxk@qualcomm.com> | |
*************** | |
*** 155,160 **** | |
--- 155,181 ---- | |
hci_send_cmd(hdev, HCI_OP_SETUP_SYNC_CONN, sizeof(cp), &cp); | |
} | |
+ /* Device _must_ be locked */ | |
+ void hci_sco_setup(struct hci_conn *conn, __u8 status) | |
+ { | |
+ struct hci_conn *sco = conn->link; | |
+ | |
+ BT_DBG("%p", conn); | |
+ | |
+ if (!sco) | |
+ return; | |
+ | |
+ if (!status) { | |
+ if (lmp_esco_capable(conn->hdev)) | |
+ hci_setup_sync(sco, conn->handle); | |
+ else | |
+ hci_add_sco(sco, conn->handle); | |
+ } else { | |
+ hci_proto_connect_cfm(sco, status); | |
+ hci_conn_del(sco); | |
+ } | |
+ } | |
+ | |
static void hci_conn_timeout(unsigned long arg) | |
{ | |
struct hci_conn *conn = (void *) arg; | |
*************** | |
*** 196,202 **** | |
hci_conn_enter_sniff_mode(conn); | |
} | |
! struct hci_conn *hci_conn_add(struct hci_dev *hdev, int type, bdaddr_t *dst) | |
{ | |
struct hci_conn *conn; | |
--- 217,224 ---- | |
hci_conn_enter_sniff_mode(conn); | |
} | |
! struct hci_conn *hci_conn_add(struct hci_dev *hdev, int type, | |
! __u16 pkt_type, bdaddr_t *dst) | |
{ | |
struct hci_conn *conn; | |
*************** | |
*** 221,234 **** | |
conn->pkt_type = hdev->pkt_type & ACL_PTYPE_MASK; | |
break; | |
case SCO_LINK: | |
! if (lmp_esco_capable(hdev)) | |
! conn->pkt_type = (hdev->esco_type & SCO_ESCO_MASK) | | |
! (hdev->esco_type & EDR_ESCO_MASK); | |
! else | |
! conn->pkt_type = hdev->pkt_type & SCO_PTYPE_MASK; | |
! break; | |
case ESCO_LINK: | |
! conn->pkt_type = hdev->esco_type & ~EDR_ESCO_MASK; | |
break; | |
} | |
--- 243,264 ---- | |
conn->pkt_type = hdev->pkt_type & ACL_PTYPE_MASK; | |
break; | |
case SCO_LINK: | |
! if (!pkt_type) | |
! pkt_type = SCO_ESCO_MASK; | |
case ESCO_LINK: | |
! if (!pkt_type) | |
! pkt_type = ALL_ESCO_MASK; | |
! if (lmp_esco_capable(hdev)) { | |
! /* HCI Setup Synchronous Connection Command uses | |
! reverse logic on the EDR_ESCO_MASK bits */ | |
! conn->pkt_type = (pkt_type ^ EDR_ESCO_MASK) & | |
! hdev->esco_type; | |
! } else { | |
! /* Legacy HCI Add Sco Connection Command uses a | |
! shifted bitmask */ | |
! conn->pkt_type = (pkt_type << 5) & hdev->pkt_type & | |
! SCO_PTYPE_MASK; | |
! } | |
break; | |
} | |
*************** | |
*** 340,346 **** | |
/* Create SCO or ACL connection. | |
* Device _must_ be locked */ | |
! struct hci_conn *hci_connect(struct hci_dev *hdev, int type, bdaddr_t *dst, __u8 sec_level, __u8 auth_type) | |
{ | |
struct hci_conn *acl; | |
struct hci_conn *sco; | |
--- 370,378 ---- | |
/* Create SCO or ACL connection. | |
* Device _must_ be locked */ | |
! struct hci_conn *hci_connect(struct hci_dev *hdev, int type, | |
! __u16 pkt_type, bdaddr_t *dst, | |
! __u8 sec_level, __u8 auth_type) | |
{ | |
struct hci_conn *acl; | |
struct hci_conn *sco; | |
*************** | |
*** 348,354 **** | |
BT_DBG("%s dst %s", hdev->name, batostr(dst)); | |
if (!(acl = hci_conn_hash_lookup_ba(hdev, ACL_LINK, dst))) { | |
! if (!(acl = hci_conn_add(hdev, ACL_LINK, dst))) | |
return NULL; | |
} | |
--- 380,386 ---- | |
BT_DBG("%s dst %s", hdev->name, batostr(dst)); | |
if (!(acl = hci_conn_hash_lookup_ba(hdev, ACL_LINK, dst))) { | |
! if (!(acl = hci_conn_add(hdev, ACL_LINK, 0, dst))) | |
return NULL; | |
} | |
*************** | |
*** 369,375 **** | |
return acl; | |
if (!(sco = hci_conn_hash_lookup_ba(hdev, type, dst))) { | |
! if (!(sco = hci_conn_add(hdev, type, dst))) { | |
hci_conn_put(acl); | |
return NULL; | |
} | |
--- 401,407 ---- | |
return acl; | |
if (!(sco = hci_conn_hash_lookup_ba(hdev, type, dst))) { | |
! if (!(sco = hci_conn_add(hdev, type, pkt_type, dst))) { | |
hci_conn_put(acl); | |
return NULL; | |
} | |
*************** | |
*** 385,394 **** | |
acl->power_save = 1; | |
hci_conn_enter_active_mode(acl); | |
! if (lmp_esco_capable(hdev)) | |
! hci_setup_sync(sco, acl->handle); | |
! else | |
! hci_add_sco(sco, acl->handle); | |
} | |
return sco; | |
--- 417,429 ---- | |
acl->power_save = 1; | |
hci_conn_enter_active_mode(acl); | |
! if (test_bit(HCI_CONN_MODE_CHANGE_PEND, &acl->pend)) { | |
! /* defer SCO setup until mode change completed */ | |
! set_bit(HCI_CONN_SCO_SETUP_PEND, &acl->pend); | |
! return sco; | |
! } | |
! | |
! hci_sco_setup(acl, 0x00); | |
} | |
return sco; | |
*************** | |
*** 505,511 **** | |
if (test_bit(HCI_RAW, &hdev->flags)) | |
return; | |
! if (conn->mode != HCI_CM_SNIFF || !conn->power_save) | |
goto timer; | |
if (!test_and_set_bit(HCI_CONN_MODE_CHANGE_PEND, &conn->pend)) { | |
--- 540,546 ---- | |
if (test_bit(HCI_RAW, &hdev->flags)) | |
return; | |
! if (conn->mode != HCI_CM_SNIFF /* || !conn->power_save */) | |
goto timer; | |
if (!test_and_set_bit(HCI_CONN_MODE_CHANGE_PEND, &conn->pend)) { | |
*************** | |
*** 644,649 **** | |
--- 679,693 ---- | |
(ci + n)->out = c->out; | |
(ci + n)->state = c->state; | |
(ci + n)->link_mode = c->link_mode; | |
+ if (c->type == SCO_LINK) { | |
+ (ci + n)->mtu = hdev->sco_mtu; | |
+ (ci + n)->cnt = hdev->sco_cnt; | |
+ (ci + n)->pkts = hdev->sco_pkts; | |
+ } else { | |
+ (ci + n)->mtu = hdev->acl_mtu; | |
+ (ci + n)->cnt = hdev->acl_cnt; | |
+ (ci + n)->pkts = hdev->acl_pkts; | |
+ } | |
if (++n >= req.conn_num) | |
break; | |
} | |
*************** | |
*** 680,685 **** | |
--- 724,738 ---- | |
ci.out = conn->out; | |
ci.state = conn->state; | |
ci.link_mode = conn->link_mode; | |
+ if (req.type == SCO_LINK) { | |
+ ci.mtu = hdev->sco_mtu; | |
+ ci.cnt = hdev->sco_cnt; | |
+ ci.pkts = hdev->sco_pkts; | |
+ } else { | |
+ ci.mtu = hdev->acl_mtu; | |
+ ci.cnt = hdev->acl_cnt; | |
+ ci.pkts = hdev->acl_pkts; | |
+ } | |
} | |
hci_dev_unlock_bh(hdev); | |
diff -crB 2/net/bluetooth/hci_core.c 1/net/bluetooth/hci_core.c | |
*** 2/net/bluetooth/hci_core.c 2012-09-24 11:44:02.726801349 +0530 | |
--- 1/net/bluetooth/hci_core.c 2011-05-18 12:35:30.000000000 +0530 | |
*************** | |
*** 1283,1289 **** | |
skb->dev = (void *) hdev; | |
bt_cb(skb)->pkt_type = HCI_ACLDATA_PKT; | |
! hci_add_acl_hdr(skb, conn->handle, flags | ACL_START); | |
if (!(list = skb_shinfo(skb)->frag_list)) { | |
/* Non fragmented */ | |
--- 1283,1289 ---- | |
skb->dev = (void *) hdev; | |
bt_cb(skb)->pkt_type = HCI_ACLDATA_PKT; | |
! hci_add_acl_hdr(skb, conn->handle, flags); | |
if (!(list = skb_shinfo(skb)->frag_list)) { | |
/* Non fragmented */ | |
*************** | |
*** 1300,1311 **** | |
spin_lock_bh(&conn->data_q.lock); | |
__skb_queue_tail(&conn->data_q, skb); | |
do { | |
skb = list; list = list->next; | |
skb->dev = (void *) hdev; | |
bt_cb(skb)->pkt_type = HCI_ACLDATA_PKT; | |
! hci_add_acl_hdr(skb, conn->handle, flags | ACL_CONT); | |
BT_DBG("%s frag %p len %d", hdev->name, skb, skb->len); | |
--- 1300,1313 ---- | |
spin_lock_bh(&conn->data_q.lock); | |
__skb_queue_tail(&conn->data_q, skb); | |
+ flags &= ~ACL_PB_MASK; | |
+ flags |= ACL_CONT; | |
do { | |
skb = list; list = list->next; | |
skb->dev = (void *) hdev; | |
bt_cb(skb)->pkt_type = HCI_ACLDATA_PKT; | |
! hci_add_acl_hdr(skb, conn->handle, flags); | |
BT_DBG("%s frag %p len %d", hdev->name, skb, skb->len); | |
diff -crB 2/net/bluetooth/hci_event.c 1/net/bluetooth/hci_event.c | |
*** 2/net/bluetooth/hci_event.c 2012-09-24 11:44:02.726801349 +0530 | |
--- 1/net/bluetooth/hci_event.c 2011-05-18 12:35:30.000000000 +0530 | |
*************** | |
*** 1,6 **** | |
/* | |
BlueZ - Bluetooth protocol stack for Linux | |
! Copyright (C) 2000-2001 Qualcomm Incorporated | |
Written 2000,2001 by Maxim Krasnyansky <maxk@qualcomm.com> | |
--- 1,6 ---- | |
/* | |
BlueZ - Bluetooth protocol stack for Linux | |
! Copyright (c) 2000-2001, 2010, Code Aurora Forum. All rights reserved. | |
Written 2000,2001 by Maxim Krasnyansky <maxk@qualcomm.com> | |
*************** | |
*** 579,585 **** | |
} | |
} else { | |
if (!conn) { | |
! conn = hci_conn_add(hdev, ACL_LINK, &cp->bdaddr); | |
if (conn) { | |
conn->out = 1; | |
conn->link_mode |= HCI_LM_MASTER; | |
--- 579,585 ---- | |
} | |
} else { | |
if (!conn) { | |
! conn = hci_conn_add(hdev, ACL_LINK, 0, &cp->bdaddr); | |
if (conn) { | |
conn->out = 1; | |
conn->link_mode |= HCI_LM_MASTER; | |
*************** | |
*** 785,793 **** | |
hci_dev_lock(hdev); | |
conn = hci_conn_hash_lookup_handle(hdev, __le16_to_cpu(cp->handle)); | |
! if (conn) | |
clear_bit(HCI_CONN_MODE_CHANGE_PEND, &conn->pend); | |
hci_dev_unlock(hdev); | |
} | |
--- 785,797 ---- | |
hci_dev_lock(hdev); | |
conn = hci_conn_hash_lookup_handle(hdev, __le16_to_cpu(cp->handle)); | |
! if (conn) { | |
clear_bit(HCI_CONN_MODE_CHANGE_PEND, &conn->pend); | |
+ if (test_and_clear_bit(HCI_CONN_SCO_SETUP_PEND, &conn->pend)) | |
+ hci_sco_setup(conn, status); | |
+ } | |
+ | |
hci_dev_unlock(hdev); | |
} | |
*************** | |
*** 808,816 **** | |
hci_dev_lock(hdev); | |
conn = hci_conn_hash_lookup_handle(hdev, __le16_to_cpu(cp->handle)); | |
! if (conn) | |
clear_bit(HCI_CONN_MODE_CHANGE_PEND, &conn->pend); | |
hci_dev_unlock(hdev); | |
} | |
--- 812,824 ---- | |
hci_dev_lock(hdev); | |
conn = hci_conn_hash_lookup_handle(hdev, __le16_to_cpu(cp->handle)); | |
! if (conn) { | |
clear_bit(HCI_CONN_MODE_CHANGE_PEND, &conn->pend); | |
+ if (test_and_clear_bit(HCI_CONN_SCO_SETUP_PEND, &conn->pend)) | |
+ hci_sco_setup(conn, status); | |
+ } | |
+ | |
hci_dev_unlock(hdev); | |
} | |
*************** | |
*** 915,934 **** | |
} else | |
conn->state = BT_CLOSED; | |
! if (conn->type == ACL_LINK) { | |
! struct hci_conn *sco = conn->link; | |
! if (sco) { | |
! if (!ev->status) { | |
! if (lmp_esco_capable(hdev)) | |
! hci_setup_sync(sco, conn->handle); | |
! else | |
! hci_add_sco(sco, conn->handle); | |
! } else { | |
! hci_proto_connect_cfm(sco, ev->status); | |
! hci_conn_del(sco); | |
! } | |
! } | |
! } | |
if (ev->status) { | |
hci_proto_connect_cfm(conn, ev->status); | |
--- 923,930 ---- | |
} else | |
conn->state = BT_CLOSED; | |
! if (conn->type == ACL_LINK) | |
! hci_sco_setup(conn, ev->status); | |
if (ev->status) { | |
hci_proto_connect_cfm(conn, ev->status); | |
*************** | |
*** 964,970 **** | |
conn = hci_conn_hash_lookup_ba(hdev, ev->link_type, &ev->bdaddr); | |
if (!conn) { | |
! if (!(conn = hci_conn_add(hdev, ev->link_type, &ev->bdaddr))) { | |
BT_ERR("No memmory for new connection"); | |
hci_dev_unlock(hdev); | |
return; | |
--- 960,968 ---- | |
conn = hci_conn_hash_lookup_ba(hdev, ev->link_type, &ev->bdaddr); | |
if (!conn) { | |
! /* pkt_type not yet used for incoming connections */ | |
! if (!(conn = hci_conn_add(hdev, ev->link_type, 0, | |
! &ev->bdaddr))) { | |
BT_ERR("No memmory for new connection"); | |
hci_dev_unlock(hdev); | |
return; | |
*************** | |
*** 1481,1486 **** | |
--- 1479,1487 ---- | |
else | |
conn->power_save = 0; | |
} | |
+ | |
+ if (test_and_clear_bit(HCI_CONN_SCO_SETUP_PEND, &conn->pend)) | |
+ hci_sco_setup(conn, ev->status); | |
} | |
hci_dev_unlock(hdev); | |
*************** | |
*** 1700,1705 **** | |
--- 1701,1707 ---- | |
hci_conn_add_sysfs(conn); | |
break; | |
+ case 0x10: /* Connection Accept Timeout */ | |
case 0x11: /* Unsupported Feature or Parameter Value */ | |
case 0x1c: /* SCO interval rejected */ | |
case 0x1a: /* Unsupported Remote Feature */ | |
diff -crB 2/net/bluetooth/l2cap.c 1/net/bluetooth/l2cap.c | |
*** 2/net/bluetooth/l2cap.c 2012-09-24 11:44:02.726801349 +0530 | |
--- 1/net/bluetooth/l2cap.c 2011-05-18 12:35:30.000000000 +0530 | |
*************** | |
*** 337,349 **** | |
static inline void l2cap_send_cmd(struct l2cap_conn *conn, u8 ident, u8 code, u16 len, void *data) | |
{ | |
struct sk_buff *skb = l2cap_build_cmd(conn, code, ident, len, data); | |
BT_DBG("code 0x%2.2x", code); | |
if (!skb) | |
return; | |
! hci_send_acl(conn->hcon, skb, 0); | |
} | |
static inline void l2cap_send_sframe(struct l2cap_pinfo *pi, u16 control) | |
--- 337,355 ---- | |
static inline void l2cap_send_cmd(struct l2cap_conn *conn, u8 ident, u8 code, u16 len, void *data) | |
{ | |
struct sk_buff *skb = l2cap_build_cmd(conn, code, ident, len, data); | |
+ u8 flags; | |
BT_DBG("code 0x%2.2x", code); | |
if (!skb) | |
return; | |
! if (lmp_no_flush_capable(conn->hcon->hdev)) | |
! flags = ACL_START_NO_FLUSH; | |
! else | |
! flags = ACL_START; | |
! | |
! hci_send_acl(conn->hcon, skb, flags); | |
} | |
static inline void l2cap_send_sframe(struct l2cap_pinfo *pi, u16 control) | |
*************** | |
*** 492,498 **** | |
struct sock *parent = bt_sk(sk)->parent; | |
rsp.result = cpu_to_le16(L2CAP_CR_PEND); | |
rsp.status = cpu_to_le16(L2CAP_CS_AUTHOR_PEND); | |
! parent->sk_data_ready(parent, 0); | |
} else { | |
sk->sk_state = BT_CONFIG; | |
--- 498,505 ---- | |
struct sock *parent = bt_sk(sk)->parent; | |
rsp.result = cpu_to_le16(L2CAP_CR_PEND); | |
rsp.status = cpu_to_le16(L2CAP_CS_AUTHOR_PEND); | |
! if (parent) | |
! parent->sk_data_ready(parent, 0); | |
} else { | |
sk->sk_state = BT_CONFIG; | |
*************** | |
*** 809,814 **** | |
--- 816,822 ---- | |
pi->sec_level = l2cap_pi(parent)->sec_level; | |
pi->role_switch = l2cap_pi(parent)->role_switch; | |
pi->force_reliable = l2cap_pi(parent)->force_reliable; | |
+ pi->flushable = l2cap_pi(parent)->flushable; | |
} else { | |
pi->imtu = L2CAP_DEFAULT_MTU; | |
pi->omtu = 0; | |
*************** | |
*** 822,827 **** | |
--- 830,836 ---- | |
pi->sec_level = BT_SECURITY_LOW; | |
pi->role_switch = 0; | |
pi->force_reliable = 0; | |
+ pi->flushable = 0; | |
} | |
/* Default config options */ | |
*************** | |
*** 999,1005 **** | |
} | |
} | |
! hcon = hci_connect(hdev, ACL_LINK, dst, | |
l2cap_pi(sk)->sec_level, auth_type); | |
if (!hcon) | |
goto done; | |
--- 1008,1014 ---- | |
} | |
} | |
! hcon = hci_connect(hdev, ACL_LINK, 0, dst, | |
l2cap_pi(sk)->sec_level, auth_type); | |
if (!hcon) | |
goto done; | |
*************** | |
*** 1335,1344 **** | |
static inline void l2cap_do_send(struct sock *sk, struct sk_buff *skb) | |
{ | |
struct l2cap_pinfo *pi = l2cap_pi(sk); | |
BT_DBG("sk %p, skb %p len %d", sk, skb, skb->len); | |
! hci_send_acl(pi->conn->hcon, skb, 0); | |
} | |
static int l2cap_streaming_send(struct sock *sk) | |
--- 1344,1360 ---- | |
static inline void l2cap_do_send(struct sock *sk, struct sk_buff *skb) | |
{ | |
struct l2cap_pinfo *pi = l2cap_pi(sk); | |
+ struct hci_conn *hcon = pi->conn->hcon; | |
+ u16 flags; | |
BT_DBG("sk %p, skb %p len %d", sk, skb, skb->len); | |
! if (lmp_no_flush_capable(hcon->hdev) && !l2cap_pi(sk)->flushable) | |
! flags = ACL_START_NO_FLUSH; | |
! else | |
! flags = ACL_START; | |
! | |
! hci_send_acl(hcon, skb, flags); | |
} | |
static int l2cap_streaming_send(struct sock *sk) | |
*************** | |
*** 1907,1912 **** | |
--- 1923,1929 ---- | |
l2cap_pi(sk)->role_switch = (opt & L2CAP_LM_MASTER); | |
l2cap_pi(sk)->force_reliable = (opt & L2CAP_LM_RELIABLE); | |
+ l2cap_pi(sk)->flushable = (opt & L2CAP_LM_FLUSHABLE); | |
break; | |
default: | |
*************** | |
*** 2037,2042 **** | |
--- 2054,2062 ---- | |
if (l2cap_pi(sk)->force_reliable) | |
opt |= L2CAP_LM_RELIABLE; | |
+ if (l2cap_pi(sk)->flushable) | |
+ opt |= L2CAP_LM_FLUSHABLE; | |
+ | |
if (put_user(opt, (u32 __user *) optval)) | |
err = -EFAULT; | |
break; | |
*************** | |
*** 4457,4463 **** | |
BT_DBG("conn %p len %d flags 0x%x", conn, skb->len, flags); | |
! if (flags & ACL_START) { | |
struct l2cap_hdr *hdr; | |
int len; | |
--- 4477,4483 ---- | |
BT_DBG("conn %p len %d flags 0x%x", conn, skb->len, flags); | |
! if (!(flags & ACL_CONT)) { | |
struct l2cap_hdr *hdr; | |
int len; | |
diff -crB 2/net/bluetooth/rfcomm/core.c 1/net/bluetooth/rfcomm/core.c | |
*** 2/net/bluetooth/rfcomm/core.c 2012-09-24 11:44:02.726801349 +0530 | |
--- 1/net/bluetooth/rfcomm/core.c 2011-05-18 12:35:30.000000000 +0530 | |
*************** | |
*** 248,279 **** | |
auth_type); | |
} | |
- static void rfcomm_session_timeout(unsigned long arg) | |
- { | |
- struct rfcomm_session *s = (void *) arg; | |
- | |
- BT_DBG("session %p state %ld", s, s->state); | |
- | |
- set_bit(RFCOMM_TIMED_OUT, &s->flags); | |
- rfcomm_schedule(RFCOMM_SCHED_TIMEO); | |
- } | |
- | |
- static void rfcomm_session_set_timer(struct rfcomm_session *s, long timeout) | |
- { | |
- BT_DBG("session %p state %ld timeout %ld", s, s->state, timeout); | |
- | |
- if (!mod_timer(&s->timer, jiffies + timeout)) | |
- rfcomm_session_hold(s); | |
- } | |
- | |
- static void rfcomm_session_clear_timer(struct rfcomm_session *s) | |
- { | |
- BT_DBG("session %p state %ld", s, s->state); | |
- | |
- if (timer_pending(&s->timer) && del_timer(&s->timer)) | |
- rfcomm_session_put(s); | |
- } | |
- | |
/* ---- RFCOMM DLCs ---- */ | |
static void rfcomm_dlc_timeout(unsigned long arg) | |
{ | |
--- 248,253 ---- | |
*************** | |
*** 350,356 **** | |
rfcomm_session_hold(s); | |
- rfcomm_session_clear_timer(s); | |
rfcomm_dlc_hold(d); | |
list_add(&d->list, &s->dlcs); | |
d->session = s; | |
--- 324,329 ---- | |
*************** | |
*** 366,374 **** | |
d->session = NULL; | |
rfcomm_dlc_put(d); | |
- if (list_empty(&s->dlcs)) | |
- rfcomm_session_set_timer(s, RFCOMM_IDLE_TIMEOUT); | |
- | |
rfcomm_session_put(s); | |
} | |
--- 339,344 ---- | |
*************** | |
*** 462,468 **** | |
switch (d->state) { | |
case BT_CONNECT: | |
- case BT_CONFIG: | |
if (test_and_clear_bit(RFCOMM_DEFER_SETUP, &d->flags)) { | |
set_bit(RFCOMM_AUTH_REJECT, &d->flags); | |
rfcomm_schedule(RFCOMM_SCHED_AUTH); | |
--- 432,437 ---- | |
*************** | |
*** 482,488 **** | |
break; | |
case BT_OPEN: | |
- case BT_CONNECT2: | |
if (test_and_clear_bit(RFCOMM_DEFER_SETUP, &d->flags)) { | |
set_bit(RFCOMM_AUTH_REJECT, &d->flags); | |
rfcomm_schedule(RFCOMM_SCHED_AUTH); | |
--- 451,456 ---- | |
*************** | |
*** 601,608 **** | |
BT_DBG("session %p sock %p", s, sock); | |
- setup_timer(&s->timer, rfcomm_session_timeout, (unsigned long) s); | |
- | |
INIT_LIST_HEAD(&s->dlcs); | |
s->state = state; | |
s->sock = sock; | |
--- 569,574 ---- | |
*************** | |
*** 634,640 **** | |
if (state == BT_CONNECTED) | |
rfcomm_send_disc(s, 0); | |
- rfcomm_session_clear_timer(s); | |
sock_release(s->sock); | |
kfree(s); | |
--- 600,605 ---- | |
*************** | |
*** 676,682 **** | |
__rfcomm_dlc_close(d, err); | |
} | |
- rfcomm_session_clear_timer(s); | |
rfcomm_session_put(s); | |
} | |
--- 641,646 ---- | |
*************** | |
*** 1238,1245 **** | |
rfcomm_send_ua(d->session, d->dlci); | |
- rfcomm_dlc_clear_timer(d); | |
- | |
rfcomm_dlc_lock(d); | |
d->state = BT_CONNECTED; | |
d->state_change(d, 0); | |
--- 1202,1207 ---- | |
*************** | |
*** 1257,1267 **** | |
if (d->defer_setup) { | |
set_bit(RFCOMM_DEFER_SETUP, &d->flags); | |
rfcomm_dlc_set_timer(d, RFCOMM_AUTH_TIMEOUT); | |
- | |
- rfcomm_dlc_lock(d); | |
- d->state = BT_CONNECT2; | |
- d->state_change(d, 0); | |
- rfcomm_dlc_unlock(d); | |
} else | |
rfcomm_dlc_accept(d); | |
} else { | |
--- 1219,1224 ---- | |
*************** | |
*** 1803,1813 **** | |
if (d->defer_setup) { | |
set_bit(RFCOMM_DEFER_SETUP, &d->flags); | |
rfcomm_dlc_set_timer(d, RFCOMM_AUTH_TIMEOUT); | |
- | |
- rfcomm_dlc_lock(d); | |
- d->state = BT_CONNECT2; | |
- d->state_change(d, 0); | |
- rfcomm_dlc_unlock(d); | |
} else | |
rfcomm_dlc_accept(d); | |
} | |
--- 1760,1765 ---- | |
*************** | |
*** 1923,1935 **** | |
struct rfcomm_session *s; | |
s = list_entry(p, struct rfcomm_session, list); | |
- if (test_and_clear_bit(RFCOMM_TIMED_OUT, &s->flags)) { | |
- s->state = BT_DISCONN; | |
- rfcomm_send_disc(s, 0); | |
- rfcomm_session_put(s); | |
- continue; | |
- } | |
- | |
if (s->state == BT_LISTEN) { | |
rfcomm_accept_connection(s); | |
continue; | |
--- 1875,1880 ---- | |
diff -crB 2/net/bluetooth/sco.c 1/net/bluetooth/sco.c | |
*** 2/net/bluetooth/sco.c 2012-09-24 11:44:02.726801349 +0530 | |
--- 1/net/bluetooth/sco.c 2011-05-18 12:35:30.000000000 +0530 | |
*************** | |
*** 178,183 **** | |
--- 178,184 ---- | |
{ | |
bdaddr_t *src = &bt_sk(sk)->src; | |
bdaddr_t *dst = &bt_sk(sk)->dst; | |
+ __u16 pkt_type = sco_pi(sk)->pkt_type; | |
struct sco_conn *conn; | |
struct hci_conn *hcon; | |
struct hci_dev *hdev; | |
*************** | |
*** 194,203 **** | |
if (lmp_esco_capable(hdev) && !disable_esco) | |
type = ESCO_LINK; | |
! else | |
type = SCO_LINK; | |
! hcon = hci_connect(hdev, type, dst, BT_SECURITY_LOW, HCI_AT_NO_BONDING); | |
if (!hcon) | |
goto done; | |
--- 195,207 ---- | |
if (lmp_esco_capable(hdev) && !disable_esco) | |
type = ESCO_LINK; | |
! else { | |
type = SCO_LINK; | |
+ pkt_type &= SCO_ESCO_MASK; | |
+ } | |
! hcon = hci_connect(hdev, type, pkt_type, dst, | |
! BT_SECURITY_LOW, HCI_AT_NO_BONDING); | |
if (!hcon) | |
goto done; | |
*************** | |
*** 450,467 **** | |
return 0; | |
} | |
! static int sco_sock_bind(struct socket *sock, struct sockaddr *addr, int addr_len) | |
{ | |
! struct sockaddr_sco *sa = (struct sockaddr_sco *) addr; | |
struct sock *sk = sock->sk; | |
! bdaddr_t *src = &sa->sco_bdaddr; | |
! int err = 0; | |
! BT_DBG("sk %p %s", sk, batostr(&sa->sco_bdaddr)); | |
if (!addr || addr->sa_family != AF_BLUETOOTH) | |
return -EINVAL; | |
lock_sock(sk); | |
if (sk->sk_state != BT_OPEN) { | |
--- 454,475 ---- | |
return 0; | |
} | |
! static int sco_sock_bind(struct socket *sock, struct sockaddr *addr, int alen) | |
{ | |
! struct sockaddr_sco sa; | |
struct sock *sk = sock->sk; | |
! bdaddr_t *src = &sa.sco_bdaddr; | |
! int len, err = 0; | |
! BT_DBG("sk %p %s", sk, batostr(&sa.sco_bdaddr)); | |
if (!addr || addr->sa_family != AF_BLUETOOTH) | |
return -EINVAL; | |
+ memset(&sa, 0, sizeof(sa)); | |
+ len = min_t(unsigned int, sizeof(sa), alen); | |
+ memcpy(&sa, addr, len); | |
+ | |
lock_sock(sk); | |
if (sk->sk_state != BT_OPEN) { | |
*************** | |
*** 475,481 **** | |
err = -EADDRINUSE; | |
} else { | |
/* Save source address */ | |
! bacpy(&bt_sk(sk)->src, &sa->sco_bdaddr); | |
sk->sk_state = BT_BOUND; | |
} | |
--- 483,490 ---- | |
err = -EADDRINUSE; | |
} else { | |
/* Save source address */ | |
! bacpy(&bt_sk(sk)->src, &sa.sco_bdaddr); | |
! sco_pi(sk)->pkt_type = sa.sco_pkt_type; | |
sk->sk_state = BT_BOUND; | |
} | |
*************** | |
*** 488,514 **** | |
static int sco_sock_connect(struct socket *sock, struct sockaddr *addr, int alen, int flags) | |
{ | |
- struct sockaddr_sco *sa = (struct sockaddr_sco *) addr; | |
struct sock *sk = sock->sk; | |
! int err = 0; | |
! | |
BT_DBG("sk %p", sk); | |
! if (alen < sizeof(struct sockaddr_sco) || | |
! addr->sa_family != AF_BLUETOOTH) | |
return -EINVAL; | |
! if (sk->sk_state != BT_OPEN && sk->sk_state != BT_BOUND) | |
! return -EBADFD; | |
! | |
! if (sk->sk_type != SOCK_SEQPACKET) | |
! return -EINVAL; | |
lock_sock(sk); | |
/* Set destination address and psm */ | |
! bacpy(&bt_sk(sk)->dst, &sa->sco_bdaddr); | |
if ((err = sco_connect(sk))) | |
goto done; | |
--- 497,530 ---- | |
static int sco_sock_connect(struct socket *sock, struct sockaddr *addr, int alen, int flags) | |
{ | |
struct sock *sk = sock->sk; | |
! struct sockaddr_sco sa; | |
! int len, err = 0; | |
BT_DBG("sk %p", sk); | |
! if (!addr || addr->sa_family != AF_BLUETOOTH) | |
return -EINVAL; | |
! memset(&sa, 0, sizeof(sa)); | |
! len = min_t(unsigned int, sizeof(sa), alen); | |
! memcpy(&sa, addr, len); | |
lock_sock(sk); | |
+ if (sk->sk_type != SOCK_SEQPACKET) { | |
+ err = -EINVAL; | |
+ goto done; | |
+ } | |
+ | |
+ if (sk->sk_state != BT_OPEN && sk->sk_state != BT_BOUND) { | |
+ err = -EBADFD; | |
+ goto done; | |
+ } | |
+ | |
/* Set destination address and psm */ | |
! bacpy(&bt_sk(sk)->dst, &sa.sco_bdaddr); | |
! sco_pi(sk)->pkt_type = sa.sco_pkt_type; | |
if ((err = sco_connect(sk))) | |
goto done; | |
*************** | |
*** 614,619 **** | |
--- 630,636 ---- | |
bacpy(&sa->sco_bdaddr, &bt_sk(sk)->dst); | |
else | |
bacpy(&sa->sco_bdaddr, &bt_sk(sk)->src); | |
+ sa->sco_pkt_type = sco_pi(sk)->pkt_type; | |
return 0; | |
} | |
diff -crB 2/net/core/skbuff.c 1/net/core/skbuff.c | |
*** 2/net/core/skbuff.c 2012-09-24 11:44:03.054795217 +0530 | |
--- 1/net/core/skbuff.c 2011-05-18 12:35:30.000000000 +0530 | |
*************** | |
*** 303,308 **** | |
--- 303,318 ---- | |
} | |
EXPORT_SYMBOL(dev_alloc_skb); | |
+ struct sk_buff *dev_alloc_skb_kernel(unsigned int length) | |
+ { | |
+ /* | |
+ * There is more code here than it seems: | |
+ * __dev_alloc_skb is an inline | |
+ */ | |
+ return __dev_alloc_skb(length, GFP_KERNEL); | |
+ } | |
+ EXPORT_SYMBOL(dev_alloc_skb_kernel); | |
+ | |
static void skb_drop_list(struct sk_buff **listp) | |
{ | |
struct sk_buff *list = *listp; | |
diff -crB 2/net/ipv4/af_inet.c 1/net/ipv4/af_inet.c | |
*** 2/net/ipv4/af_inet.c 2012-09-24 11:44:03.038795530 +0530 | |
--- 1/net/ipv4/af_inet.c 2011-05-18 12:35:30.000000000 +0530 | |
*************** | |
*** 117,122 **** | |
--- 117,135 ---- | |
#include <linux/mroute.h> | |
#endif | |
+ #ifdef CONFIG_ANDROID_PARANOID_NETWORK | |
+ #include <linux/android_aid.h> | |
+ | |
+ static inline int current_has_network(void) | |
+ { | |
+ return in_egroup_p(AID_INET) || capable(CAP_NET_RAW); | |
+ } | |
+ #else | |
+ static inline int current_has_network(void) | |
+ { | |
+ return 1; | |
+ } | |
+ #endif | |
/* The inetsw table contains everything that inet_create needs to | |
* build a new socket. | |
*************** | |
*** 275,280 **** | |
--- 289,297 ---- | |
int try_loading_module = 0; | |
int err; | |
+ if (!current_has_network()) | |
+ return -EACCES; | |
+ | |
if (unlikely(!inet_ehash_secret)) | |
if (sock->type != SOCK_RAW && sock->type != SOCK_DGRAM) | |
build_ehash_secret(); | |
*************** | |
*** 864,869 **** | |
--- 881,887 ---- | |
case SIOCSIFPFLAGS: | |
case SIOCGIFPFLAGS: | |
case SIOCSIFFLAGS: | |
+ case SIOCKILLADDR: | |
err = devinet_ioctl(net, cmd, (void __user *)arg); | |
break; | |
default: | |
diff -crB 2/net/ipv4/devinet.c 1/net/ipv4/devinet.c | |
*** 2/net/ipv4/devinet.c 2012-09-24 11:44:03.042795425 +0530 | |
--- 1/net/ipv4/devinet.c 2011-05-18 12:35:30.000000000 +0530 | |
*************** | |
*** 58,63 **** | |
--- 58,64 ---- | |
#include <net/arp.h> | |
#include <net/ip.h> | |
+ #include <net/tcp.h> | |
#include <net/route.h> | |
#include <net/ip_fib.h> | |
#include <net/rtnetlink.h> | |
*************** | |
*** 635,640 **** | |
--- 636,642 ---- | |
case SIOCSIFBRDADDR: /* Set the broadcast address */ | |
case SIOCSIFDSTADDR: /* Set the destination address */ | |
case SIOCSIFNETMASK: /* Set the netmask for the interface */ | |
+ case SIOCKILLADDR: /* Nuke all sockets on this address */ | |
ret = -EACCES; | |
if (!capable(CAP_NET_ADMIN)) | |
goto out; | |
*************** | |
*** 686,692 **** | |
} | |
ret = -EADDRNOTAVAIL; | |
! if (!ifa && cmd != SIOCSIFADDR && cmd != SIOCSIFFLAGS) | |
goto done; | |
switch (cmd) { | |
--- 688,695 ---- | |
} | |
ret = -EADDRNOTAVAIL; | |
! if (!ifa && cmd != SIOCSIFADDR && cmd != SIOCSIFFLAGS | |
! && cmd != SIOCKILLADDR) | |
goto done; | |
switch (cmd) { | |
*************** | |
*** 811,816 **** | |
--- 814,823 ---- | |
inet_insert_ifa(ifa); | |
} | |
break; | |
+ case SIOCKILLADDR: /* Nuke all connections on this address */ | |
+ ret = 0; | |
+ tcp_v4_nuke_addr(sin->sin_addr.s_addr); | |
+ break; | |
} | |
done: | |
rtnl_unlock(); | |
diff -crB 2/net/ipv4/Makefile 1/net/ipv4/Makefile | |
*** 2/net/ipv4/Makefile 2012-09-24 11:44:03.042795425 +0530 | |
--- 1/net/ipv4/Makefile 2011-05-18 12:35:30.000000000 +0530 | |
*************** | |
*** 14,19 **** | |
--- 14,20 ---- | |
inet_fragment.o | |
obj-$(CONFIG_SYSCTL) += sysctl_net_ipv4.o | |
+ obj-$(CONFIG_SYSFS) += sysfs_net_ipv4.o | |
obj-$(CONFIG_IP_FIB_HASH) += fib_hash.o | |
obj-$(CONFIG_IP_FIB_TRIE) += fib_trie.o | |
obj-$(CONFIG_PROC_FS) += proc.o | |
Only in 1/net/ipv4: sysfs_net_ipv4.c | |
diff -crB 2/net/ipv4/tcp.c 1/net/ipv4/tcp.c | |
*** 2/net/ipv4/tcp.c 2012-09-24 11:44:03.042795425 +0530 | |
--- 1/net/ipv4/tcp.c 2011-05-18 12:35:31.000000000 +0530 | |
*************** | |
*** 266,271 **** | |
--- 266,272 ---- | |
#include <linux/crypto.h> | |
#include <linux/time.h> | |
#include <linux/slab.h> | |
+ #include <linux/uid_stat.h> | |
#include <net/icmp.h> | |
#include <net/tcp.h> | |
*************** | |
*** 1102,1107 **** | |
--- 1103,1111 ---- | |
tcp_push(sk, flags, mss_now, tp->nonagle); | |
TCP_CHECK_TIMER(sk); | |
release_sock(sk); | |
+ | |
+ if (copied > 0) | |
+ uid_stat_tcp_snd(current_uid(), copied); | |
return copied; | |
do_fault: | |
*************** | |
*** 1378,1385 **** | |
tcp_rcv_space_adjust(sk); | |
/* Clean up data we have read: This will do ACK frames. */ | |
! if (copied > 0) | |
tcp_cleanup_rbuf(sk, copied); | |
return copied; | |
} | |
--- 1382,1392 ---- | |
tcp_rcv_space_adjust(sk); | |
/* Clean up data we have read: This will do ACK frames. */ | |
! if (copied > 0) { | |
tcp_cleanup_rbuf(sk, copied); | |
+ uid_stat_tcp_rcv(current_uid(), copied); | |
+ } | |
+ | |
return copied; | |
} | |
*************** | |
*** 1765,1770 **** | |
--- 1772,1780 ---- | |
TCP_CHECK_TIMER(sk); | |
release_sock(sk); | |
+ | |
+ if (copied > 0) | |
+ uid_stat_tcp_rcv(current_uid(), copied); | |
return copied; | |
out: | |
*************** | |
*** 1774,1779 **** | |
--- 1784,1791 ---- | |
recv_urg: | |
err = tcp_recv_urg(sk, msg, len, flags); | |
+ if (err > 0) | |
+ uid_stat_tcp_rcv(current_uid(), err); | |
goto out; | |
} | |
diff -crB 2/net/ipv4/tcp_ipv4.c 1/net/ipv4/tcp_ipv4.c | |
*** 2/net/ipv4/tcp_ipv4.c 2012-09-24 11:44:03.042795425 +0530 | |
--- 1/net/ipv4/tcp_ipv4.c 2011-05-18 12:35:31.000000000 +0530 | |
*************** | |
*** 1963,1968 **** | |
--- 1963,2011 ---- | |
EXPORT_SYMBOL(tcp_v4_destroy_sock); | |
+ /* | |
+ * tcp_v4_nuke_addr - destroy all sockets on the given local address | |
+ */ | |
+ void tcp_v4_nuke_addr(__u32 saddr) | |
+ { | |
+ unsigned int bucket; | |
+ | |
+ for (bucket = 0; bucket < tcp_hashinfo.ehash_mask; bucket++) { | |
+ struct hlist_nulls_node *node; | |
+ struct sock *sk; | |
+ spinlock_t *lock = inet_ehash_lockp(&tcp_hashinfo, bucket); | |
+ | |
+ restart: | |
+ spin_lock_bh(lock); | |
+ sk_nulls_for_each(sk, node, &tcp_hashinfo.ehash[bucket].chain) { | |
+ struct inet_sock *inet = inet_sk(sk); | |
+ | |
+ if (inet->inet_rcv_saddr != saddr) | |
+ continue; | |
+ if (sysctl_ip_dynaddr && sk->sk_state == TCP_SYN_SENT) | |
+ continue; | |
+ if (sock_flag(sk, SOCK_DEAD)) | |
+ continue; | |
+ | |
+ sock_hold(sk); | |
+ spin_unlock_bh(lock); | |
+ | |
+ local_bh_disable(); | |
+ bh_lock_sock(sk); | |
+ sk->sk_err = ETIMEDOUT; | |
+ sk->sk_error_report(sk); | |
+ | |
+ tcp_done(sk); | |
+ bh_unlock_sock(sk); | |
+ local_bh_enable(); | |
+ sock_put(sk); | |
+ | |
+ goto restart; | |
+ } | |
+ spin_unlock_bh(lock); | |
+ } | |
+ } | |
+ | |
#ifdef CONFIG_PROC_FS | |
/* Proc filesystem TCP sock list dumping. */ | |
diff -crB 2/net/ipv6/af_inet6.c 1/net/ipv6/af_inet6.c | |
*** 2/net/ipv6/af_inet6.c 2012-09-24 11:44:03.038795530 +0530 | |
--- 1/net/ipv6/af_inet6.c 2011-05-18 12:35:31.000000000 +0530 | |
*************** | |
*** 63,68 **** | |
--- 63,82 ---- | |
#include <asm/system.h> | |
#include <linux/mroute6.h> | |
+ #ifdef CONFIG_ANDROID_PARANOID_NETWORK | |
+ #include <linux/android_aid.h> | |
+ | |
+ static inline int current_has_network(void) | |
+ { | |
+ return in_egroup_p(AID_INET) || capable(CAP_NET_RAW); | |
+ } | |
+ #else | |
+ static inline int current_has_network(void) | |
+ { | |
+ return 1; | |
+ } | |
+ #endif | |
+ | |
MODULE_AUTHOR("Cast of dozens"); | |
MODULE_DESCRIPTION("IPv6 protocol stack for Linux"); | |
MODULE_LICENSE("GPL"); | |
*************** | |
*** 109,114 **** | |
--- 123,131 ---- | |
int try_loading_module = 0; | |
int err; | |
+ if (!current_has_network()) | |
+ return -EACCES; | |
+ | |
if (sock->type != SOCK_RAW && | |
sock->type != SOCK_DGRAM && | |
!inet_ehash_secret) | |
diff -crB 2/net/Kconfig 1/net/Kconfig | |
*** 2/net/Kconfig 2012-09-24 11:44:03.054795217 +0530 | |
--- 1/net/Kconfig 2011-05-18 12:35:30.000000000 +0530 | |
*************** | |
*** 79,84 **** | |
--- 79,98 ---- | |
endif # if INET | |
+ config ANDROID_PARANOID_NETWORK | |
+ bool "Only allow certain groups to create sockets" | |
+ default y | |
+ help | |
+ none | |
+ | |
+ config NET_ACTIVITY_STATS | |
+ bool "Network activity statistics tracking" | |
+ default y | |
+ help | |
+ Network activity statistics are useful for tracking wireless | |
+ modem activity on 2G, 3G, 4G wireless networks. Counts number of | |
+ transmissions and groups them in specified time buckets. | |
+ | |
config NETWORK_SECMARK | |
bool "Security Marking" | |
help | |
diff -crB 2/net/l2tp/l2tp_eth.c 1/net/l2tp/l2tp_eth.c | |
*** 2/net/l2tp/l2tp_eth.c 2012-09-24 11:44:02.722801425 +0530 | |
--- 1/net/l2tp/l2tp_eth.c 2011-05-18 12:35:31.000000000 +0530 | |
*************** | |
*** 284,290 **** | |
return 0; | |
} | |
! static __net_initdata struct pernet_operations l2tp_eth_net_ops = { | |
.init = l2tp_eth_init_net, | |
.id = &l2tp_eth_net_id, | |
.size = sizeof(struct l2tp_eth_net), | |
--- 284,290 ---- | |
return 0; | |
} | |
! static struct pernet_operations l2tp_eth_net_ops = { | |
.init = l2tp_eth_init_net, | |
.id = &l2tp_eth_net_id, | |
.size = sizeof(struct l2tp_eth_net), | |
diff -crB 2/net/Makefile 1/net/Makefile | |
*** 2/net/Makefile 2012-09-24 11:44:03.058795150 +0530 | |
--- 1/net/Makefile 2011-05-18 12:35:30.000000000 +0530 | |
*************** | |
*** 67,69 **** | |
--- 67,70 ---- | |
obj-$(CONFIG_SYSCTL) += sysctl_net.o | |
endif | |
obj-$(CONFIG_WIMAX) += wimax/ | |
+ obj-$(CONFIG_NET_ACTIVITY_STATS) += activity_stats.o | |
diff -crB 2/net/phonet/af_phonet.c 1/net/phonet/af_phonet.c | |
*** 2/net/phonet/af_phonet.c 2012-09-24 11:44:03.054795217 +0530 | |
--- 1/net/phonet/af_phonet.c 2011-05-18 12:35:32.000000000 +0530 | |
*************** | |
*** 67,76 **** | |
struct pn_sock *pn; | |
struct phonet_protocol *pnp; | |
int err; | |
! | |
! if (!capable(CAP_SYS_ADMIN)) | |
return -EPERM; | |
! | |
if (protocol == 0) { | |
/* Default protocol selection */ | |
switch (sock->type) { | |
--- 67,76 ---- | |
struct pn_sock *pn; | |
struct phonet_protocol *pnp; | |
int err; | |
! #if 0 | |
! if (!capable(CAP_SYS_ADMIN) && !capable(CAP_NET_ADMIN)) | |
return -EPERM; | |
! #endif | |
if (protocol == 0) { | |
/* Default protocol selection */ | |
switch (sock->type) { | |
diff -crB 2/net/phonet/socket.c 1/net/phonet/socket.c | |
*** 2/net/phonet/socket.c 2012-09-24 11:44:03.054795217 +0530 | |
--- 1/net/phonet/socket.c 2011-05-18 12:35:32.000000000 +0530 | |
*************** | |
*** 429,435 **** | |
phonet_get_local_port_range(&pmin, &pmax); | |
for (port = pmin; port <= pmax; port++) { | |
! port_cur++; | |
if (port_cur < pmin || port_cur > pmax) | |
port_cur = pmin; | |
--- 429,435 ---- | |
phonet_get_local_port_range(&pmin, &pmax); | |
for (port = pmin; port <= pmax; port++) { | |
! port_cur += PN_HASHSIZE; | |
if (port_cur < pmin || port_cur > pmax) | |
port_cur = pmin; | |
diff -crB 2/net/phonet/sysctl.c 1/net/phonet/sysctl.c | |
*** 2/net/phonet/sysctl.c 2012-09-24 11:44:03.054795217 +0530 | |
--- 1/net/phonet/sysctl.c 2011-05-18 12:35:32.000000000 +0530 | |
*************** | |
*** 28,34 **** | |
#include <linux/init.h> | |
#define DYNAMIC_PORT_MIN 0x40 | |
! #define DYNAMIC_PORT_MAX 0x7f | |
static DEFINE_SEQLOCK(local_port_range_lock); | |
static int local_port_range_min[2] = {0, 0}; | |
--- 28,34 ---- | |
#include <linux/init.h> | |
#define DYNAMIC_PORT_MIN 0x40 | |
! #define DYNAMIC_PORT_MAX 0xff | |
static DEFINE_SEQLOCK(local_port_range_lock); | |
static int local_port_range_min[2] = {0, 0}; | |
diff -crB 2/net/rfkill/core.c 1/net/rfkill/core.c | |
*** 2/net/rfkill/core.c 2012-09-24 11:44:03.058795150 +0530 | |
--- 1/net/rfkill/core.c 2011-05-18 12:35:32.000000000 +0530 | |
*************** | |
*** 783,788 **** | |
--- 783,789 ---- | |
} | |
EXPORT_SYMBOL(rfkill_pause_polling); | |
+ #ifdef CONFIG_RFKILL_PM | |
void rfkill_resume_polling(struct rfkill *rfkill) | |
{ | |
BUG_ON(!rfkill); | |
*************** | |
*** 817,830 **** | |
--- 818,834 ---- | |
return 0; | |
} | |
+ #endif | |
static struct class rfkill_class = { | |
.name = "rfkill", | |
.dev_release = rfkill_release, | |
.dev_attrs = rfkill_dev_attrs, | |
.dev_uevent = rfkill_dev_uevent, | |
+ #ifdef CONFIG_RFKILL_PM | |
.suspend = rfkill_suspend, | |
.resume = rfkill_resume, | |
+ #endif | |
}; | |
bool rfkill_blocked(struct rfkill *rfkill) | |
diff -crB 2/net/rfkill/Kconfig 1/net/rfkill/Kconfig | |
*** 2/net/rfkill/Kconfig 2012-09-24 11:44:03.058795150 +0530 | |
--- 1/net/rfkill/Kconfig 2011-05-18 12:35:32.000000000 +0530 | |
*************** | |
*** 10,15 **** | |
--- 10,20 ---- | |
To compile this driver as a module, choose M here: the | |
module will be called rfkill. | |
+ config RFKILL_PM | |
+ bool "Power off on suspend" | |
+ depends on RFKILL && PM | |
+ default y | |
+ | |
# LED trigger support | |
config RFKILL_LEDS | |
bool | |
diff -crB 2/net/socket.c 1/net/socket.c | |
*** 2/net/socket.c 2012-09-24 11:44:03.038795530 +0530 | |
--- 1/net/socket.c 2011-05-18 12:35:33.000000000 +0530 | |
*************** | |
*** 570,576 **** | |
if (err) | |
return err; | |
! return sock->ops->sendmsg(iocb, sock, msg, size); | |
} | |
int sock_sendmsg(struct socket *sock, struct msghdr *msg, size_t size) | |
--- 570,577 ---- | |
if (err) | |
return err; | |
! err = sock->ops->sendmsg(iocb, sock, msg, size); | |
! return err; | |
} | |
int sock_sendmsg(struct socket *sock, struct msghdr *msg, size_t size) | |
*************** | |
*** 685,690 **** | |
--- 686,692 ---- | |
static inline int __sock_recvmsg_nosec(struct kiocb *iocb, struct socket *sock, | |
struct msghdr *msg, size_t size, int flags) | |
{ | |
+ int err; | |
struct sock_iocb *si = kiocb_to_siocb(iocb); | |
sock_update_classid(sock->sk); | |
*************** | |
*** 695,701 **** | |
si->size = size; | |
si->flags = flags; | |
! return sock->ops->recvmsg(iocb, sock, msg, size, flags); | |
} | |
static inline int __sock_recvmsg(struct kiocb *iocb, struct socket *sock, | |
--- 697,704 ---- | |
si->size = size; | |
si->flags = flags; | |
! err = sock->ops->recvmsg(iocb, sock, msg, size, flags); | |
! return err; | |
} | |
static inline int __sock_recvmsg(struct kiocb *iocb, struct socket *sock, | |
Only in 2/net/wireless: .gitignore | |
diff -crB 2/net/wireless/Kconfig 1/net/wireless/Kconfig | |
*** 2/net/wireless/Kconfig 2012-09-24 11:44:03.058795150 +0530 | |
--- 1/net/wireless/Kconfig 2011-05-18 12:35:33.000000000 +0530 | |
*************** | |
*** 1,4 **** | |
--- 1,5 ---- | |
config WIRELESS_EXT | |
+ def_bool y | |
bool | |
config WEXT_CORE | |
*************** | |
*** 14,19 **** | |
--- 15,21 ---- | |
bool | |
config WEXT_PRIV | |
+ def_bool y | |
bool | |
config CFG80211 | |
Only in 2/scripts/basic: .gitignore | |
Only in 2/scripts/dtc: .gitignore | |
Only in 2/scripts/genksyms: .gitignore | |
Only in 2/scripts: .gitignore | |
Only in 2/scripts/kconfig: .gitignore | |
Only in 2/scripts/kconfig/lxdialog: .gitignore | |
Only in 2/scripts/mod: .gitignore | |
Only in 2/scripts/selinux/genheaders: .gitignore | |
Only in 2/scripts/selinux/mdp: .gitignore | |
diff -crB 2/security/commoncap.c 1/security/commoncap.c | |
*** 2/security/commoncap.c 2012-09-24 11:44:03.070794915 +0530 | |
--- 1/security/commoncap.c 2011-05-18 12:35:34.000000000 +0530 | |
*************** | |
*** 29,34 **** | |
--- 29,38 ---- | |
#include <linux/securebits.h> | |
#include <linux/syslog.h> | |
+ #ifdef CONFIG_ANDROID_PARANOID_NETWORK | |
+ #include <linux/android_aid.h> | |
+ #endif | |
+ | |
/* | |
* If a non-root user executes a setuid-root binary in | |
* !secure(SECURE_NOROOT) mode, then we raise capabilities. | |
*************** | |
*** 83,88 **** | |
--- 87,98 ---- | |
int cap_capable(struct task_struct *tsk, const struct cred *cred, int cap, | |
int audit) | |
{ | |
+ #ifdef CONFIG_ANDROID_PARANOID_NETWORK | |
+ if (cap == CAP_NET_RAW && in_egroup_p(AID_NET_RAW)) | |
+ return 0; | |
+ if (cap == CAP_NET_ADMIN && in_egroup_p(AID_NET_ADMIN)) | |
+ return 0; | |
+ #endif | |
return cap_raised(cred->cap_effective, cap) ? 0 : -EPERM; | |
} | |
Only in 2/security/selinux: .gitignore | |
diff -crB 2/sound/core/pcm_lib.c 1/sound/core/pcm_lib.c | |
*** 2/sound/core/pcm_lib.c 2012-09-24 11:44:03.138793634 +0530 | |
--- 1/sound/core/pcm_lib.c 2011-05-18 12:35:34.000000000 +0530 | |
*************** | |
*** 1726,1732 **** | |
} | |
set_current_state(TASK_INTERRUPTIBLE); | |
snd_pcm_stream_unlock_irq(substream); | |
! tout = schedule_timeout(msecs_to_jiffies(10000)); | |
snd_pcm_stream_lock_irq(substream); | |
switch (runtime->status->state) { | |
case SNDRV_PCM_STATE_SUSPENDED: | |
--- 1726,1732 ---- | |
} | |
set_current_state(TASK_INTERRUPTIBLE); | |
snd_pcm_stream_unlock_irq(substream); | |
! tout = schedule_timeout(msecs_to_jiffies(30000)); | |
snd_pcm_stream_lock_irq(substream); | |
switch (runtime->status->state) { | |
case SNDRV_PCM_STATE_SUSPENDED: | |
*************** | |
*** 1748,1754 **** | |
goto _endloop; | |
} | |
if (!tout) { | |
! snd_printd("%s write error (DMA or IRQ trouble?)\n", | |
is_playback ? "playback" : "capture"); | |
err = -EIO; | |
break; | |
--- 1748,1754 ---- | |
goto _endloop; | |
} | |
if (!tout) { | |
! printk("wait_for_avail_min : %s write error (DMA or IRQ trouble?)\n", | |
is_playback ? "playback" : "capture"); | |
err = -EIO; | |
break; | |
diff -crB 2/sound/Kconfig 1/sound/Kconfig | |
*** 2/sound/Kconfig 2012-09-24 11:44:03.134793710 +0530 | |
--- 1/sound/Kconfig 2011-05-18 12:35:34.000000000 +0530 | |
*************** | |
*** 121,126 **** | |
--- 121,129 ---- | |
endif # SOUND_PRIME | |
+ # S5PC110 SRP Driver | |
+ source "sound/s5p-rp/Kconfig" | |
+ | |
endif # !M68K | |
endif # SOUND | |
diff -crB 2/sound/Makefile 1/sound/Makefile | |
*** 2/sound/Makefile 2012-09-24 11:44:03.182792812 +0530 | |
--- 1/sound/Makefile 2011-05-18 12:35:34.000000000 +0530 | |
*************** | |
*** 8,13 **** | |
--- 8,14 ---- | |
obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ \ | |
sparc/ spi/ parisc/ pcmcia/ mips/ soc/ atmel/ | |
obj-$(CONFIG_SND_AOA) += aoa/ | |
+ obj-$(CONFIG_SND_S5P_RP) += s5p-rp/ | |
# This one must be compilable even if sound is configured out | |
obj-$(CONFIG_AC97_BUS) += ac97_bus.o | |
Only in 2/sound/oss: .gitignore | |
Only in 1/sound: s5p-rp | |
diff -crB 2/sound/soc/codecs/Kconfig 1/sound/soc/codecs/Kconfig | |
*** 2/sound/soc/codecs/Kconfig 2012-09-24 11:44:03.134793710 +0530 | |
--- 1/sound/soc/codecs/Kconfig 2011-05-18 12:35:37.000000000 +0530 | |
*************** | |
*** 64,70 **** | |
select SND_SOC_WM8988 if SND_SOC_I2C_AND_SPI | |
select SND_SOC_WM8990 if I2C | |
select SND_SOC_WM8993 if I2C | |
! select SND_SOC_WM8994 if MFD_WM8994 | |
select SND_SOC_WM9081 if I2C | |
select SND_SOC_WM9090 if I2C | |
select SND_SOC_WM9705 if SND_SOC_AC97_BUS | |
--- 64,71 ---- | |
select SND_SOC_WM8988 if SND_SOC_I2C_AND_SPI | |
select SND_SOC_WM8990 if I2C | |
select SND_SOC_WM8993 if I2C | |
! #select SND_SOC_WM8994 if MFD_WM8994 | |
! select SND_SOC_WM8994 if I2C | |
select SND_SOC_WM9081 if I2C | |
select SND_SOC_WM9090 if I2C | |
select SND_SOC_WM9705 if SND_SOC_AC97_BUS | |
diff -crB 2/sound/soc/codecs/Makefile 1/sound/soc/codecs/Makefile | |
*** 2/sound/soc/codecs/Makefile 2012-09-24 11:44:03.134793710 +0530 | |
--- 1/sound/soc/codecs/Makefile 2011-05-18 12:35:37.000000000 +0530 | |
*************** | |
*** 50,56 **** | |
snd-soc-wm8988-objs := wm8988.o | |
snd-soc-wm8990-objs := wm8990.o | |
snd-soc-wm8993-objs := wm8993.o | |
! snd-soc-wm8994-objs := wm8994.o | |
snd-soc-wm9081-objs := wm9081.o | |
snd-soc-wm9705-objs := wm9705.o | |
snd-soc-wm9712-objs := wm9712.o | |
--- 50,56 ---- | |
snd-soc-wm8988-objs := wm8988.o | |
snd-soc-wm8990-objs := wm8990.o | |
snd-soc-wm8993-objs := wm8993.o | |
! snd-soc-wm8994-objs := wm8994.o wm8994_p1.o | |
snd-soc-wm9081-objs := wm9081.o | |
snd-soc-wm9705-objs := wm9705.o | |
snd-soc-wm9712-objs := wm9712.o | |
diff -crB 2/sound/soc/codecs/wm8994.c 1/sound/soc/codecs/wm8994.c | |
*** 2/sound/soc/codecs/wm8994.c 2012-09-24 11:44:03.134793710 +0530 | |
--- 1/sound/soc/codecs/wm8994.c 2011-05-18 12:35:37.000000000 +0530 | |
*************** | |
*** 1,3111 **** | |
! /* | |
! * wm8994.c -- WM8994 ALSA SoC Audio driver | |
* | |
! * Copyright 2009 Wolfson Microelectronics plc | |
* | |
! * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
* | |
* | |
! * This program is free software; you can redistribute it and/or modify | |
! * it under the terms of the GNU General Public License version 2 as | |
! * published by the Free Software Foundation. | |
*/ | |
#include <linux/module.h> | |
! #include <linux/moduleparam.h> | |
#include <linux/init.h> | |
#include <linux/delay.h> | |
#include <linux/pm.h> | |
#include <linux/i2c.h> | |
- #include <linux/platform_device.h> | |
- #include <linux/regulator/consumer.h> | |
#include <linux/slab.h> | |
#include <sound/core.h> | |
#include <sound/pcm.h> | |
#include <sound/pcm_params.h> | |
#include <sound/soc.h> | |
#include <sound/soc-dapm.h> | |
- #include <sound/initval.h> | |
#include <sound/tlv.h> | |
! | |
! #include <linux/mfd/wm8994/core.h> | |
! #include <linux/mfd/wm8994/registers.h> | |
! #include <linux/mfd/wm8994/pdata.h> | |
! #include <linux/mfd/wm8994/gpio.h> | |
! | |
#include "wm8994.h" | |
- #include "wm_hubs.h" | |
! static struct snd_soc_codec *wm8994_codec; | |
! struct snd_soc_codec_device soc_codec_dev_wm8994; | |
! struct fll_config { | |
! int src; | |
! int in; | |
! int out; | |
! }; | |
! #define WM8994_NUM_DRC 3 | |
! #define WM8994_NUM_EQ 3 | |
! static int wm8994_drc_base[] = { | |
! WM8994_AIF1_DRC1_1, | |
! WM8994_AIF1_DRC2_1, | |
! WM8994_AIF2_DRC_1, | |
! }; | |
! static int wm8994_retune_mobile_base[] = { | |
! WM8994_AIF1_DAC1_EQ_GAINS_1, | |
! WM8994_AIF1_DAC2_EQ_GAINS_1, | |
! WM8994_AIF2_EQ_GAINS_1, | |
}; | |
! #define WM8994_REG_CACHE_SIZE 0x621 | |
! struct wm8994_micdet { | |
! struct snd_soc_jack *jack; | |
! int det; | |
! int shrt; | |
}; | |
! /* codec private data */ | |
! struct wm8994_priv { | |
! struct wm_hubs_data hubs; | |
! struct snd_soc_codec codec; | |
! u16 reg_cache[WM8994_REG_CACHE_SIZE + 1]; | |
! int sysclk[2]; | |
! int sysclk_rate[2]; | |
! int mclk[2]; | |
! int aifclk[2]; | |
! struct fll_config fll[2], fll_suspend[2]; | |
! | |
! int dac_rates[2]; | |
! int lrclk_shared[2]; | |
! | |
! /* Platform dependant DRC configuration */ | |
! const char **drc_texts; | |
! int drc_cfg[WM8994_NUM_DRC]; | |
! struct soc_enum drc_enum; | |
! | |
! /* Platform dependant ReTune mobile configuration */ | |
! int num_retune_mobile_texts; | |
! const char **retune_mobile_texts; | |
! int retune_mobile_cfg[WM8994_NUM_EQ]; | |
! struct soc_enum retune_mobile_enum; | |
- struct wm8994_micdet micdet[2]; | |
! struct wm8994_pdata *pdata; | |
! }; | |
! static struct { | |
! unsigned short readable; /* Mask of readable bits */ | |
! unsigned short writable; /* Mask of writable bits */ | |
! unsigned short vol; /* Mask of volatile bits */ | |
! } access_masks[] = { | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R0 - Software Reset */ | |
! { 0x3B37, 0x3B37, 0x0000 }, /* R1 - Power Management (1) */ | |
! { 0x6BF0, 0x6BF0, 0x0000 }, /* R2 - Power Management (2) */ | |
! { 0x3FF0, 0x3FF0, 0x0000 }, /* R3 - Power Management (3) */ | |
! { 0x3F3F, 0x3F3F, 0x0000 }, /* R4 - Power Management (4) */ | |
! { 0x3F0F, 0x3F0F, 0x0000 }, /* R5 - Power Management (5) */ | |
! { 0x003F, 0x003F, 0x0000 }, /* R6 - Power Management (6) */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R7 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R8 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R9 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R10 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R11 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R12 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R13 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R14 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R15 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R16 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R17 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R18 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R19 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R20 */ | |
! { 0x01C0, 0x01C0, 0x0000 }, /* R21 - Input Mixer (1) */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R22 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R23 */ | |
! { 0x00DF, 0x01DF, 0x0000 }, /* R24 - Left Line Input 1&2 Volume */ | |
! { 0x00DF, 0x01DF, 0x0000 }, /* R25 - Left Line Input 3&4 Volume */ | |
! { 0x00DF, 0x01DF, 0x0000 }, /* R26 - Right Line Input 1&2 Volume */ | |
! { 0x00DF, 0x01DF, 0x0000 }, /* R27 - Right Line Input 3&4 Volume */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R28 - Left Output Volume */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R29 - Right Output Volume */ | |
! { 0x0077, 0x0077, 0x0000 }, /* R30 - Line Outputs Volume */ | |
! { 0x0030, 0x0030, 0x0000 }, /* R31 - HPOUT2 Volume */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R32 - Left OPGA Volume */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R33 - Right OPGA Volume */ | |
! { 0x007F, 0x007F, 0x0000 }, /* R34 - SPKMIXL Attenuation */ | |
! { 0x017F, 0x017F, 0x0000 }, /* R35 - SPKMIXR Attenuation */ | |
! { 0x003F, 0x003F, 0x0000 }, /* R36 - SPKOUT Mixers */ | |
! { 0x003F, 0x003F, 0x0000 }, /* R37 - ClassD */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R38 - Speaker Volume Left */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R39 - Speaker Volume Right */ | |
! { 0x00FF, 0x00FF, 0x0000 }, /* R40 - Input Mixer (2) */ | |
! { 0x01B7, 0x01B7, 0x0000 }, /* R41 - Input Mixer (3) */ | |
! { 0x01B7, 0x01B7, 0x0000 }, /* R42 - Input Mixer (4) */ | |
! { 0x01C7, 0x01C7, 0x0000 }, /* R43 - Input Mixer (5) */ | |
! { 0x01C7, 0x01C7, 0x0000 }, /* R44 - Input Mixer (6) */ | |
! { 0x01FF, 0x01FF, 0x0000 }, /* R45 - Output Mixer (1) */ | |
! { 0x01FF, 0x01FF, 0x0000 }, /* R46 - Output Mixer (2) */ | |
! { 0x0FFF, 0x0FFF, 0x0000 }, /* R47 - Output Mixer (3) */ | |
! { 0x0FFF, 0x0FFF, 0x0000 }, /* R48 - Output Mixer (4) */ | |
! { 0x0FFF, 0x0FFF, 0x0000 }, /* R49 - Output Mixer (5) */ | |
! { 0x0FFF, 0x0FFF, 0x0000 }, /* R50 - Output Mixer (6) */ | |
! { 0x0038, 0x0038, 0x0000 }, /* R51 - HPOUT2 Mixer */ | |
! { 0x0077, 0x0077, 0x0000 }, /* R52 - Line Mixer (1) */ | |
! { 0x0077, 0x0077, 0x0000 }, /* R53 - Line Mixer (2) */ | |
! { 0x03FF, 0x03FF, 0x0000 }, /* R54 - Speaker Mixer */ | |
! { 0x00C1, 0x00C1, 0x0000 }, /* R55 - Additional Control */ | |
! { 0x00F0, 0x00F0, 0x0000 }, /* R56 - AntiPOP (1) */ | |
! { 0x01EF, 0x01EF, 0x0000 }, /* R57 - AntiPOP (2) */ | |
! { 0x00FF, 0x00FF, 0x0000 }, /* R58 - MICBIAS */ | |
! { 0x000F, 0x000F, 0x0000 }, /* R59 - LDO 1 */ | |
! { 0x0007, 0x0007, 0x0000 }, /* R60 - LDO 2 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R61 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R62 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R63 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R64 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R65 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R66 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R67 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R68 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R69 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R70 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R71 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R72 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R73 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R74 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R75 */ | |
! { 0x8000, 0x8000, 0x0000 }, /* R76 - Charge Pump (1) */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R77 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R78 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R79 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R80 */ | |
! { 0x0301, 0x0301, 0x0000 }, /* R81 - Class W (1) */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R82 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R83 */ | |
! { 0x333F, 0x333F, 0x0000 }, /* R84 - DC Servo (1) */ | |
! { 0x0FEF, 0x0FEF, 0x0000 }, /* R85 - DC Servo (2) */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R86 */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R87 - DC Servo (4) */ | |
! { 0x0333, 0x0000, 0x0000 }, /* R88 - DC Servo Readback */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R89 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R90 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R91 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R92 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R93 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R94 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R95 */ | |
! { 0x00EE, 0x00EE, 0x0000 }, /* R96 - Analogue HP (1) */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R97 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R98 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R99 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R100 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R101 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R102 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R103 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R104 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R105 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R106 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R107 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R108 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R109 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R110 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R111 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R112 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R113 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R114 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R115 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R116 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R117 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R118 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R119 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R120 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R121 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R122 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R123 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R124 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R125 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R126 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R127 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R128 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R129 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R130 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R131 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R132 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R133 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R134 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R135 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R136 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R137 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R138 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R139 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R140 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R141 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R142 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R143 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R144 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R145 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R146 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R147 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R148 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R149 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R150 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R151 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R152 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R153 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R154 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R155 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R156 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R157 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R158 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R159 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R160 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R161 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R162 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R163 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R164 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R165 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R166 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R167 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R168 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R169 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R170 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R171 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R172 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R173 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R174 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R175 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R176 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R177 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R178 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R179 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R180 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R181 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R182 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R183 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R184 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R185 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R186 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R187 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R188 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R189 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R190 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R191 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R192 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R193 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R194 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R195 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R196 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R197 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R198 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R199 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R200 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R201 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R202 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R203 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R204 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R205 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R206 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R207 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R208 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R209 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R210 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R211 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R212 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R213 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R214 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R215 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R216 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R217 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R218 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R219 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R220 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R221 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R222 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R223 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R224 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R225 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R226 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R227 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R228 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R229 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R230 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R231 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R232 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R233 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R234 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R235 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R236 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R237 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R238 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R239 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R240 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R241 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R242 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R243 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R244 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R245 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R246 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R247 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R248 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R249 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R250 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R251 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R252 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R253 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R254 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R255 */ | |
! { 0x000F, 0x0000, 0x0000 }, /* R256 - Chip Revision */ | |
! { 0x0074, 0x0074, 0x0000 }, /* R257 - Control Interface */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R258 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R259 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R260 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R261 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R262 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R263 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R264 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R265 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R266 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R267 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R268 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R269 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R270 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R271 */ | |
! { 0x807F, 0x837F, 0x0000 }, /* R272 - Write Sequencer Ctrl (1) */ | |
! { 0x017F, 0x0000, 0x0000 }, /* R273 - Write Sequencer Ctrl (2) */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R274 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R275 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R276 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R277 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R278 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R279 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R280 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R281 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R282 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R283 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R284 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R285 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R286 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R287 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R288 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R289 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R290 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R291 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R292 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R293 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R294 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R295 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R296 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R297 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R298 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R299 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R300 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R301 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R302 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R303 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R304 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R305 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R306 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R307 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R308 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R309 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R310 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R311 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R312 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R313 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R314 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R315 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R316 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R317 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R318 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R319 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R320 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R321 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R322 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R323 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R324 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R325 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R326 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R327 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R328 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R329 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R330 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R331 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R332 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R333 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R334 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R335 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R336 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R337 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R338 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R339 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R340 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R341 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R342 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R343 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R344 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R345 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R346 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R347 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R348 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R349 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R350 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R351 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R352 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R353 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R354 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R355 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R356 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R357 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R358 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R359 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R360 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R361 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R362 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R363 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R364 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R365 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R366 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R367 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R368 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R369 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R370 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R371 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R372 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R373 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R374 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R375 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R376 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R377 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R378 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R379 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R380 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R381 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R382 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R383 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R384 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R385 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R386 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R387 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R388 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R389 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R390 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R391 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R392 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R393 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R394 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R395 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R396 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R397 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R398 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R399 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R400 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R401 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R402 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R403 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R404 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R405 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R406 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R407 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R408 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R409 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R410 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R411 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R412 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R413 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R414 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R415 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R416 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R417 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R418 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R419 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R420 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R421 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R422 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R423 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R424 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R425 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R426 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R427 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R428 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R429 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R430 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R431 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R432 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R433 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R434 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R435 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R436 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R437 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R438 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R439 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R440 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R441 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R442 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R443 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R444 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R445 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R446 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R447 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R448 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R449 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R450 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R451 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R452 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R453 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R454 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R455 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R456 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R457 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R458 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R459 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R460 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R461 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R462 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R463 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R464 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R465 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R466 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R467 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R468 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R469 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R470 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R471 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R472 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R473 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R474 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R475 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R476 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R477 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R478 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R479 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R480 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R481 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R482 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R483 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R484 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R485 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R486 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R487 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R488 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R489 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R490 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R491 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R492 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R493 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R494 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R495 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R496 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R497 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R498 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R499 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R500 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R501 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R502 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R503 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R504 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R505 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R506 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R507 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R508 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R509 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R510 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R511 */ | |
! { 0x001F, 0x001F, 0x0000 }, /* R512 - AIF1 Clocking (1) */ | |
! { 0x003F, 0x003F, 0x0000 }, /* R513 - AIF1 Clocking (2) */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R514 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R515 */ | |
! { 0x001F, 0x001F, 0x0000 }, /* R516 - AIF2 Clocking (1) */ | |
! { 0x003F, 0x003F, 0x0000 }, /* R517 - AIF2 Clocking (2) */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R518 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R519 */ | |
! { 0x001F, 0x001F, 0x0000 }, /* R520 - Clocking (1) */ | |
! { 0x0777, 0x0777, 0x0000 }, /* R521 - Clocking (2) */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R522 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R523 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R524 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R525 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R526 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R527 */ | |
! { 0x00FF, 0x00FF, 0x0000 }, /* R528 - AIF1 Rate */ | |
! { 0x00FF, 0x00FF, 0x0000 }, /* R529 - AIF2 Rate */ | |
! { 0x000F, 0x0000, 0x0000 }, /* R530 - Rate Status */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R531 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R532 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R533 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R534 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R535 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R536 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R537 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R538 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R539 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R540 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R541 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R542 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R543 */ | |
! { 0x0007, 0x0007, 0x0000 }, /* R544 - FLL1 Control (1) */ | |
! { 0x3F77, 0x3F77, 0x0000 }, /* R545 - FLL1 Control (2) */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R546 - FLL1 Control (3) */ | |
! { 0x7FEF, 0x7FEF, 0x0000 }, /* R547 - FLL1 Control (4) */ | |
! { 0x1FDB, 0x1FDB, 0x0000 }, /* R548 - FLL1 Control (5) */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R549 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R550 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R551 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R552 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R553 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R554 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R555 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R556 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R557 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R558 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R559 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R560 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R561 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R562 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R563 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R564 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R565 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R566 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R567 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R568 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R569 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R570 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R571 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R572 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R573 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R574 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R575 */ | |
! { 0x0007, 0x0007, 0x0000 }, /* R576 - FLL2 Control (1) */ | |
! { 0x3F77, 0x3F77, 0x0000 }, /* R577 - FLL2 Control (2) */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R578 - FLL2 Control (3) */ | |
! { 0x7FEF, 0x7FEF, 0x0000 }, /* R579 - FLL2 Control (4) */ | |
! { 0x1FDB, 0x1FDB, 0x0000 }, /* R580 - FLL2 Control (5) */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R581 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R582 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R583 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R584 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R585 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R586 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R587 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R588 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R589 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R590 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R591 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R592 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R593 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R594 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R595 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R596 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R597 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R598 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R599 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R600 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R601 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R602 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R603 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R604 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R605 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R606 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R607 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R608 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R609 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R610 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R611 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R612 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R613 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R614 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R615 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R616 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R617 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R618 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R619 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R620 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R621 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R622 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R623 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R624 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R625 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R626 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R627 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R628 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R629 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R630 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R631 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R632 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R633 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R634 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R635 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R636 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R637 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R638 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R639 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R640 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R641 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R642 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R643 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R644 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R645 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R646 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R647 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R648 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R649 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R650 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R651 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R652 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R653 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R654 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R655 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R656 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R657 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R658 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R659 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R660 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R661 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R662 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R663 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R664 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R665 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R666 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R667 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R668 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R669 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R670 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R671 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R672 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R673 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R674 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R675 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R676 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R677 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R678 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R679 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R680 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R681 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R682 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R683 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R684 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R685 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R686 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R687 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R688 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R689 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R690 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R691 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R692 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R693 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R694 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R695 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R696 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R697 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R698 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R699 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R700 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R701 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R702 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R703 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R704 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R705 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R706 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R707 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R708 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R709 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R710 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R711 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R712 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R713 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R714 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R715 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R716 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R717 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R718 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R719 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R720 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R721 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R722 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R723 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R724 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R725 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R726 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R727 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R728 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R729 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R730 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R731 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R732 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R733 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R734 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R735 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R736 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R737 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R738 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R739 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R740 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R741 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R742 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R743 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R744 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R745 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R746 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R747 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R748 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R749 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R750 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R751 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R752 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R753 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R754 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R755 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R756 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R757 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R758 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R759 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R760 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R761 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R762 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R763 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R764 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R765 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R766 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R767 */ | |
! { 0xE1F8, 0xE1F8, 0x0000 }, /* R768 - AIF1 Control (1) */ | |
! { 0xCD1F, 0xCD1F, 0x0000 }, /* R769 - AIF1 Control (2) */ | |
! { 0xF000, 0xF000, 0x0000 }, /* R770 - AIF1 Master/Slave */ | |
! { 0x01F0, 0x01F0, 0x0000 }, /* R771 - AIF1 BCLK */ | |
! { 0x0FFF, 0x0FFF, 0x0000 }, /* R772 - AIF1ADC LRCLK */ | |
! { 0x0FFF, 0x0FFF, 0x0000 }, /* R773 - AIF1DAC LRCLK */ | |
! { 0x0003, 0x0003, 0x0000 }, /* R774 - AIF1DAC Data */ | |
! { 0x0003, 0x0003, 0x0000 }, /* R775 - AIF1ADC Data */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R776 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R777 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R778 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R779 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R780 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R781 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R782 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R783 */ | |
! { 0xF1F8, 0xF1F8, 0x0000 }, /* R784 - AIF2 Control (1) */ | |
! { 0xFD1F, 0xFD1F, 0x0000 }, /* R785 - AIF2 Control (2) */ | |
! { 0xF000, 0xF000, 0x0000 }, /* R786 - AIF2 Master/Slave */ | |
! { 0x01F0, 0x01F0, 0x0000 }, /* R787 - AIF2 BCLK */ | |
! { 0x0FFF, 0x0FFF, 0x0000 }, /* R788 - AIF2ADC LRCLK */ | |
! { 0x0FFF, 0x0FFF, 0x0000 }, /* R789 - AIF2DAC LRCLK */ | |
! { 0x0003, 0x0003, 0x0000 }, /* R790 - AIF2DAC Data */ | |
! { 0x0003, 0x0003, 0x0000 }, /* R791 - AIF2ADC Data */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R792 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R793 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R794 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R795 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R796 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R797 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R798 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R799 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R800 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R801 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R802 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R803 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R804 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R805 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R806 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R807 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R808 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R809 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R810 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R811 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R812 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R813 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R814 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R815 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R816 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R817 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R818 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R819 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R820 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R821 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R822 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R823 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R824 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R825 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R826 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R827 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R828 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R829 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R830 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R831 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R832 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R833 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R834 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R835 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R836 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R837 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R838 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R839 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R840 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R841 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R842 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R843 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R844 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R845 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R846 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R847 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R848 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R849 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R850 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R851 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R852 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R853 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R854 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R855 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R856 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R857 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R858 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R859 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R860 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R861 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R862 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R863 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R864 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R865 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R866 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R867 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R868 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R869 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R870 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R871 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R872 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R873 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R874 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R875 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R876 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R877 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R878 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R879 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R880 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R881 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R882 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R883 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R884 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R885 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R886 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R887 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R888 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R889 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R890 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R891 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R892 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R893 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R894 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R895 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R896 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R897 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R898 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R899 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R900 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R901 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R902 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R903 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R904 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R905 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R906 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R907 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R908 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R909 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R910 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R911 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R912 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R913 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R914 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R915 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R916 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R917 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R918 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R919 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R920 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R921 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R922 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R923 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R924 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R925 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R926 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R927 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R928 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R929 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R930 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R931 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R932 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R933 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R934 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R935 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R936 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R937 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R938 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R939 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R940 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R941 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R942 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R943 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R944 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R945 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R946 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R947 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R948 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R949 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R950 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R951 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R952 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R953 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R954 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R955 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R956 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R957 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R958 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R959 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R960 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R961 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R962 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R963 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R964 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R965 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R966 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R967 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R968 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R969 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R970 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R971 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R972 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R973 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R974 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R975 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R976 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R977 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R978 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R979 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R980 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R981 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R982 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R983 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R984 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R985 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R986 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R987 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R988 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R989 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R990 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R991 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R992 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R993 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R994 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R995 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R996 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R997 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R998 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R999 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1000 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1001 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1002 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1003 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1004 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1005 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1006 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1007 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1008 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1009 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1010 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1011 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1012 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1013 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1014 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1015 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1016 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1017 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1018 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1019 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1020 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1021 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1022 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1023 */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R1024 - AIF1 ADC1 Left Volume */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R1025 - AIF1 ADC1 Right Volume */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R1026 - AIF1 DAC1 Left Volume */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R1027 - AIF1 DAC1 Right Volume */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R1028 - AIF1 ADC2 Left Volume */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R1029 - AIF1 ADC2 Right Volume */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R1030 - AIF1 DAC2 Left Volume */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R1031 - AIF1 DAC2 Right Volume */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1032 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1033 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1034 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1035 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1036 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1037 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1038 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1039 */ | |
! { 0xF800, 0xF800, 0x0000 }, /* R1040 - AIF1 ADC1 Filters */ | |
! { 0x7800, 0x7800, 0x0000 }, /* R1041 - AIF1 ADC2 Filters */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1042 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1043 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1044 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1045 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1046 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1047 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1048 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1049 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1050 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1051 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1052 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1053 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1054 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1055 */ | |
! { 0x02B6, 0x02B6, 0x0000 }, /* R1056 - AIF1 DAC1 Filters (1) */ | |
! { 0x3F00, 0x3F00, 0x0000 }, /* R1057 - AIF1 DAC1 Filters (2) */ | |
! { 0x02B6, 0x02B6, 0x0000 }, /* R1058 - AIF1 DAC2 Filters (1) */ | |
! { 0x3F00, 0x3F00, 0x0000 }, /* R1059 - AIF1 DAC2 Filters (2) */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1060 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1061 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1062 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1063 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1064 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1065 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1066 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1067 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1068 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1069 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1070 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1071 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1072 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1073 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1074 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1075 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1076 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1077 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1078 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1079 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1080 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1081 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1082 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1083 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1084 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1085 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1086 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1087 */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1088 - AIF1 DRC1 (1) */ | |
! { 0x1FFF, 0x1FFF, 0x0000 }, /* R1089 - AIF1 DRC1 (2) */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1090 - AIF1 DRC1 (3) */ | |
! { 0x07FF, 0x07FF, 0x0000 }, /* R1091 - AIF1 DRC1 (4) */ | |
! { 0x03FF, 0x03FF, 0x0000 }, /* R1092 - AIF1 DRC1 (5) */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1093 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1094 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1095 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1096 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1097 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1098 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1099 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1100 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1101 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1102 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1103 */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1104 - AIF1 DRC2 (1) */ | |
! { 0x1FFF, 0x1FFF, 0x0000 }, /* R1105 - AIF1 DRC2 (2) */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1106 - AIF1 DRC2 (3) */ | |
! { 0x07FF, 0x07FF, 0x0000 }, /* R1107 - AIF1 DRC2 (4) */ | |
! { 0x03FF, 0x03FF, 0x0000 }, /* R1108 - AIF1 DRC2 (5) */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1109 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1110 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1111 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1112 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1113 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1114 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1115 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1116 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1117 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1118 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1119 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1120 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1121 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1122 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1123 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1124 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1125 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1126 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1127 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1128 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1129 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1130 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1131 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1132 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1133 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1134 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1135 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1136 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1137 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1138 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1139 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1140 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1141 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1142 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1143 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1144 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1145 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1146 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1147 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1148 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1149 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1150 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1151 */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1152 - AIF1 DAC1 EQ Gains (1) */ | |
! { 0xFFC0, 0xFFC0, 0x0000 }, /* R1153 - AIF1 DAC1 EQ Gains (2) */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1154 - AIF1 DAC1 EQ Band 1 A */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1155 - AIF1 DAC1 EQ Band 1 B */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1156 - AIF1 DAC1 EQ Band 1 PG */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1157 - AIF1 DAC1 EQ Band 2 A */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1158 - AIF1 DAC1 EQ Band 2 B */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1159 - AIF1 DAC1 EQ Band 2 C */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1160 - AIF1 DAC1 EQ Band 2 PG */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1161 - AIF1 DAC1 EQ Band 3 A */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1162 - AIF1 DAC1 EQ Band 3 B */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1163 - AIF1 DAC1 EQ Band 3 C */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1164 - AIF1 DAC1 EQ Band 3 PG */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1165 - AIF1 DAC1 EQ Band 4 A */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1166 - AIF1 DAC1 EQ Band 4 B */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1167 - AIF1 DAC1 EQ Band 4 C */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1168 - AIF1 DAC1 EQ Band 4 PG */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1169 - AIF1 DAC1 EQ Band 5 A */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1170 - AIF1 DAC1 EQ Band 5 B */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1171 - AIF1 DAC1 EQ Band 5 PG */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1172 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1173 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1174 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1175 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1176 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1177 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1178 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1179 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1180 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1181 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1182 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1183 */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1184 - AIF1 DAC2 EQ Gains (1) */ | |
! { 0xFFC0, 0xFFC0, 0x0000 }, /* R1185 - AIF1 DAC2 EQ Gains (2) */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1186 - AIF1 DAC2 EQ Band 1 A */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1187 - AIF1 DAC2 EQ Band 1 B */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1188 - AIF1 DAC2 EQ Band 1 PG */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1189 - AIF1 DAC2 EQ Band 2 A */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1190 - AIF1 DAC2 EQ Band 2 B */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1191 - AIF1 DAC2 EQ Band 2 C */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1192 - AIF1 DAC2 EQ Band 2 PG */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1193 - AIF1 DAC2 EQ Band 3 A */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1194 - AIF1 DAC2 EQ Band 3 B */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1195 - AIF1 DAC2 EQ Band 3 C */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1196 - AIF1 DAC2 EQ Band 3 PG */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1197 - AIF1 DAC2 EQ Band 4 A */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1198 - AIF1 DAC2 EQ Band 4 B */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1199 - AIF1 DAC2 EQ Band 4 C */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1200 - AIF1 DAC2 EQ Band 4 PG */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1201 - AIF1 DAC2 EQ Band 5 A */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1202 - AIF1 DAC2 EQ Band 5 B */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1203 - AIF1 DAC2 EQ Band 5 PG */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1204 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1205 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1206 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1207 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1208 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1209 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1210 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1211 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1212 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1213 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1214 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1215 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1216 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1217 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1218 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1219 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1220 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1221 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1222 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1223 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1224 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1225 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1226 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1227 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1228 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1229 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1230 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1231 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1232 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1233 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1234 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1235 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1236 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1237 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1238 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1239 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1240 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1241 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1242 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1243 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1244 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1245 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1246 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1247 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1248 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1249 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1250 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1251 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1252 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1253 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1254 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1255 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1256 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1257 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1258 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1259 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1260 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1261 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1262 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1263 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1264 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1265 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1266 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1267 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1268 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1269 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1270 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1271 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1272 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1273 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1274 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1275 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1276 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1277 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1278 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1279 */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R1280 - AIF2 ADC Left Volume */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R1281 - AIF2 ADC Right Volume */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R1282 - AIF2 DAC Left Volume */ | |
! { 0x00FF, 0x01FF, 0x0000 }, /* R1283 - AIF2 DAC Right Volume */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1284 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1285 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1286 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1287 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1288 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1289 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1290 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1291 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1292 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1293 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1294 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1295 */ | |
! { 0xF800, 0xF800, 0x0000 }, /* R1296 - AIF2 ADC Filters */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1297 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1298 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1299 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1300 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1301 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1302 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1303 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1304 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1305 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1306 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1307 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1308 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1309 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1310 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1311 */ | |
! { 0x02B6, 0x02B6, 0x0000 }, /* R1312 - AIF2 DAC Filters (1) */ | |
! { 0x3F00, 0x3F00, 0x0000 }, /* R1313 - AIF2 DAC Filters (2) */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1314 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1315 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1316 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1317 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1318 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1319 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1320 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1321 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1322 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1323 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1324 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1325 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1326 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1327 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1328 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1329 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1330 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1331 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1332 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1333 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1334 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1335 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1336 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1337 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1338 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1339 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1340 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1341 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1342 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1343 */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1344 - AIF2 DRC (1) */ | |
! { 0x1FFF, 0x1FFF, 0x0000 }, /* R1345 - AIF2 DRC (2) */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1346 - AIF2 DRC (3) */ | |
! { 0x07FF, 0x07FF, 0x0000 }, /* R1347 - AIF2 DRC (4) */ | |
! { 0x03FF, 0x03FF, 0x0000 }, /* R1348 - AIF2 DRC (5) */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1349 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1350 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1351 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1352 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1353 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1354 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1355 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1356 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1357 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1358 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1359 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1360 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1361 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1362 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1363 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1364 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1365 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1366 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1367 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1368 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1369 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1370 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1371 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1372 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1373 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1374 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1375 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1376 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1377 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1378 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1379 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1380 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1381 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1382 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1383 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1384 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1385 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1386 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1387 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1388 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1389 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1390 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1391 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1392 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1393 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1394 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1395 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1396 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1397 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1398 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1399 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1400 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1401 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1402 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1403 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1404 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1405 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1406 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1407 */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1408 - AIF2 EQ Gains (1) */ | |
! { 0xFFC0, 0xFFC0, 0x0000 }, /* R1409 - AIF2 EQ Gains (2) */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1410 - AIF2 EQ Band 1 A */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1411 - AIF2 EQ Band 1 B */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1412 - AIF2 EQ Band 1 PG */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1413 - AIF2 EQ Band 2 A */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1414 - AIF2 EQ Band 2 B */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1415 - AIF2 EQ Band 2 C */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1416 - AIF2 EQ Band 2 PG */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1417 - AIF2 EQ Band 3 A */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1418 - AIF2 EQ Band 3 B */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1419 - AIF2 EQ Band 3 C */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1420 - AIF2 EQ Band 3 PG */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1421 - AIF2 EQ Band 4 A */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1422 - AIF2 EQ Band 4 B */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1423 - AIF2 EQ Band 4 C */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1424 - AIF2 EQ Band 4 PG */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1425 - AIF2 EQ Band 5 A */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1426 - AIF2 EQ Band 5 B */ | |
! { 0xFFFF, 0xFFFF, 0x0000 }, /* R1427 - AIF2 EQ Band 5 PG */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1428 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1429 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1430 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1431 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1432 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1433 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1434 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1435 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1436 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1437 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1438 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1439 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1440 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1441 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1442 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1443 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1444 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1445 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1446 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1447 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1448 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1449 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1450 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1451 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1452 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1453 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1454 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1455 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1456 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1457 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1458 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1459 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1460 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1461 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1462 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1463 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1464 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1465 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1466 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1467 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1468 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1469 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1470 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1471 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1472 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1473 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1474 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1475 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1476 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1477 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1478 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1479 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1480 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1481 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1482 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1483 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1484 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1485 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1486 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1487 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1488 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1489 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1490 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1491 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1492 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1493 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1494 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1495 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1496 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1497 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1498 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1499 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1500 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1501 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1502 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1503 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1504 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1505 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1506 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1507 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1508 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1509 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1510 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1511 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1512 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1513 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1514 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1515 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1516 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1517 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1518 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1519 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1520 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1521 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1522 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1523 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1524 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1525 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1526 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1527 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1528 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1529 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1530 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1531 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1532 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1533 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1534 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1535 */ | |
! { 0x01EF, 0x01EF, 0x0000 }, /* R1536 - DAC1 Mixer Volumes */ | |
! { 0x0037, 0x0037, 0x0000 }, /* R1537 - DAC1 Left Mixer Routing */ | |
! { 0x0037, 0x0037, 0x0000 }, /* R1538 - DAC1 Right Mixer Routing */ | |
! { 0x01EF, 0x01EF, 0x0000 }, /* R1539 - DAC2 Mixer Volumes */ | |
! { 0x0037, 0x0037, 0x0000 }, /* R1540 - DAC2 Left Mixer Routing */ | |
! { 0x0037, 0x0037, 0x0000 }, /* R1541 - DAC2 Right Mixer Routing */ | |
! { 0x0003, 0x0003, 0x0000 }, /* R1542 - AIF1 ADC1 Left Mixer Routing */ | |
! { 0x0003, 0x0003, 0x0000 }, /* R1543 - AIF1 ADC1 Right Mixer Routing */ | |
! { 0x0003, 0x0003, 0x0000 }, /* R1544 - AIF1 ADC2 Left Mixer Routing */ | |
! { 0x0003, 0x0003, 0x0000 }, /* R1545 - AIF1 ADC2 Right mixer Routing */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1546 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1547 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1548 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1549 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1550 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1551 */ | |
! { 0x02FF, 0x03FF, 0x0000 }, /* R1552 - DAC1 Left Volume */ | |
! { 0x02FF, 0x03FF, 0x0000 }, /* R1553 - DAC1 Right Volume */ | |
! { 0x02FF, 0x03FF, 0x0000 }, /* R1554 - DAC2 Left Volume */ | |
! { 0x02FF, 0x03FF, 0x0000 }, /* R1555 - DAC2 Right Volume */ | |
! { 0x0003, 0x0003, 0x0000 }, /* R1556 - DAC Softmute */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1557 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1558 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1559 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1560 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1561 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1562 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1563 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1564 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1565 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1566 */ | |
! { 0x0000, 0x0000, 0x0000 }, /* R1567 */ | |
! { 0x0003, 0x0003, 0x0000 }, /* R1568 - Oversampling */ | |
! { 0x03C3, 0x03C3, 0x0000 }, /* R1569 - Sidetone */ | |
}; | |
- static int wm8994_readable(unsigned int reg) | |
- { | |
- if (reg >= ARRAY_SIZE(access_masks)) | |
- return 0; | |
- return access_masks[reg].readable != 0; | |
- } | |
! static int wm8994_volatile(unsigned int reg) | |
{ | |
! if (reg >= WM8994_REG_CACHE_SIZE) | |
! return 1; | |
! switch (reg) { | |
! case WM8994_SOFTWARE_RESET: | |
! case WM8994_CHIP_REVISION: | |
! case WM8994_DC_SERVO_1: | |
! case WM8994_DC_SERVO_READBACK: | |
! case WM8994_RATE_STATUS: | |
! case WM8994_LDO_1: | |
! case WM8994_LDO_2: | |
! return 1; | |
! default: | |
return 0; | |
} | |
} | |
! static int wm8994_write(struct snd_soc_codec *codec, unsigned int reg, | |
! unsigned int value) | |
{ | |
! struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | |
! | |
! BUG_ON(reg > WM8994_MAX_REGISTER); | |
! if (!wm8994_volatile(reg)) | |
! wm8994->reg_cache[reg] = value; | |
! dev_dbg(codec->dev, "0x%x = 0x%x\n", reg, value); | |
! return wm8994_reg_write(codec->control_data, reg, value); | |
} | |
! static unsigned int wm8994_read(struct snd_soc_codec *codec, | |
! unsigned int reg) | |
{ | |
! u16 *reg_cache = codec->reg_cache; | |
! BUG_ON(reg > WM8994_MAX_REGISTER); | |
! if (wm8994_volatile(reg)) | |
! return wm8994_reg_read(codec->control_data, reg); | |
! else | |
! return reg_cache[reg]; | |
} | |
! static int configure_aif_clock(struct snd_soc_codec *codec, int aif) | |
{ | |
! struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | |
! int rate; | |
! int reg1 = 0; | |
! int offset; | |
! | |
! if (aif) | |
! offset = 4; | |
! else | |
! offset = 0; | |
! | |
! switch (wm8994->sysclk[aif]) { | |
! case WM8994_SYSCLK_MCLK1: | |
! rate = wm8994->mclk[0]; | |
! break; | |
! case WM8994_SYSCLK_MCLK2: | |
! reg1 |= 0x8; | |
! rate = wm8994->mclk[1]; | |
! break; | |
! case WM8994_SYSCLK_FLL1: | |
! reg1 |= 0x10; | |
! rate = wm8994->fll[0].out; | |
! break; | |
! case WM8994_SYSCLK_FLL2: | |
! reg1 |= 0x18; | |
! rate = wm8994->fll[1].out; | |
! break; | |
! default: | |
! return -EINVAL; | |
! } | |
- if (rate >= 13500000) { | |
- rate /= 2; | |
- reg1 |= WM8994_AIF1CLK_DIV; | |
! dev_dbg(codec->dev, "Dividing AIF%d clock to %dHz\n", | |
! aif + 1, rate); | |
! } | |
- if (rate && rate < 3000000) | |
- dev_warn(codec->dev, "AIF%dCLK is %dHz, should be >=3MHz for optimal performance\n", | |
- aif + 1, rate); | |
- wm8994->aifclk[aif] = rate; | |
! snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1 + offset, | |
! WM8994_AIF1CLK_SRC_MASK | WM8994_AIF1CLK_DIV, | |
! reg1); | |
return 0; | |
} | |
! static int configure_clock(struct snd_soc_codec *codec) | |
{ | |
! struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | |
! int old, new; | |
! /* Bring up the AIF clocks first */ | |
! configure_aif_clock(codec, 0); | |
! configure_aif_clock(codec, 1); | |
! | |
! /* Then switch CLK_SYS over to the higher of them; a change | |
! * can only happen as a result of a clocking change which can | |
! * only be made outside of DAPM so we can safely redo the | |
! * clocking. | |
! */ | |
! /* If they're equal it doesn't matter which is used */ | |
! if (wm8994->aifclk[0] == wm8994->aifclk[1]) | |
! return 0; | |
! if (wm8994->aifclk[0] < wm8994->aifclk[1]) | |
! new = WM8994_SYSCLK_SRC; | |
else | |
! new = 0; | |
! | |
! old = snd_soc_read(codec, WM8994_CLOCKING_1) & WM8994_SYSCLK_SRC; | |
- /* If there's no change then we're done. */ | |
- if (old == new) | |
- return 0; | |
! snd_soc_update_bits(codec, WM8994_CLOCKING_1, WM8994_SYSCLK_SRC, new); | |
! snd_soc_dapm_sync(codec); | |
return 0; | |
} | |
! static int check_clk_sys(struct snd_soc_dapm_widget *source, | |
! struct snd_soc_dapm_widget *sink) | |
{ | |
! int reg = snd_soc_read(source->codec, WM8994_CLOCKING_1); | |
! const char *clk; | |
! /* Check what we're currently using for CLK_SYS */ | |
! if (reg & WM8994_SYSCLK_SRC) | |
! clk = "AIF2CLK"; | |
! else | |
! clk = "AIF1CLK"; | |
! return strcmp(source->name, clk) == 0; | |
} | |
! static const char *sidetone_hpf_text[] = { | |
! "2.7kHz", "1.35kHz", "675Hz", "370Hz", "180Hz", "90Hz", "45Hz" | |
! }; | |
! | |
! static const struct soc_enum sidetone_hpf = | |
! SOC_ENUM_SINGLE(WM8994_SIDETONE, 7, 7, sidetone_hpf_text); | |
! | |
! static const DECLARE_TLV_DB_SCALE(aif_tlv, 0, 600, 0); | |
! static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1); | |
! static const DECLARE_TLV_DB_SCALE(st_tlv, -3600, 300, 0); | |
! static const DECLARE_TLV_DB_SCALE(wm8994_3d_tlv, -1600, 183, 0); | |
! static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); | |
! | |
! #define WM8994_DRC_SWITCH(xname, reg, shift) \ | |
! { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
! .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\ | |
! .put = wm8994_put_drc_sw, \ | |
! .private_value = SOC_SINGLE_VALUE(reg, shift, 1, 0) } | |
! | |
! static int wm8994_put_drc_sw(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
{ | |
- struct soc_mixer_control *mc = | |
- (struct soc_mixer_control *)kcontrol->private_value; | |
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! int mask, ret; | |
! | |
! /* Can't enable both ADC and DAC paths simultaneously */ | |
! if (mc->shift == WM8994_AIF1DAC1_DRC_ENA_SHIFT) | |
! mask = WM8994_AIF1ADC1L_DRC_ENA_MASK | | |
! WM8994_AIF1ADC1R_DRC_ENA_MASK; | |
! else | |
! mask = WM8994_AIF1DAC1_DRC_ENA_MASK; | |
! | |
! ret = snd_soc_read(codec, mc->reg); | |
! if (ret < 0) | |
! return ret; | |
! if (ret & mask) | |
! return -EINVAL; | |
! | |
! return snd_soc_put_volsw(kcontrol, ucontrol); | |
! } | |
! | |
! | |
! static void wm8994_set_drc(struct snd_soc_codec *codec, int drc) | |
! { | |
! struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | |
! struct wm8994_pdata *pdata = wm8994->pdata; | |
! int base = wm8994_drc_base[drc]; | |
! int cfg = wm8994->drc_cfg[drc]; | |
! int save, i; | |
! /* Save any enables; the configuration should clear them. */ | |
! save = snd_soc_read(codec, base); | |
! save &= WM8994_AIF1DAC1_DRC_ENA | WM8994_AIF1ADC1L_DRC_ENA | | |
! WM8994_AIF1ADC1R_DRC_ENA; | |
! for (i = 0; i < WM8994_DRC_REGS; i++) | |
! snd_soc_update_bits(codec, base + i, 0xffff, | |
! pdata->drc_cfgs[cfg].regs[i]); | |
! snd_soc_update_bits(codec, base, WM8994_AIF1DAC1_DRC_ENA | | |
! WM8994_AIF1ADC1L_DRC_ENA | | |
! WM8994_AIF1ADC1R_DRC_ENA, save); | |
! } | |
! /* Icky as hell but saves code duplication */ | |
! static int wm8994_get_drc(const char *name) | |
! { | |
! if (strcmp(name, "AIF1DRC1 Mode") == 0) | |
! return 0; | |
! if (strcmp(name, "AIF1DRC2 Mode") == 0) | |
! return 1; | |
! if (strcmp(name, "AIF2DRC Mode") == 0) | |
! return 2; | |
! return -EINVAL; | |
! } | |
! static int wm8994_put_drc_enum(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
! { | |
! struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | |
! struct wm8994_pdata *pdata = wm8994->pdata; | |
! int drc = wm8994_get_drc(kcontrol->id.name); | |
! int value = ucontrol->value.integer.value[0]; | |
! if (drc < 0) | |
! return drc; | |
! if (value >= pdata->num_drc_cfgs) | |
! return -EINVAL; | |
- wm8994->drc_cfg[drc] = value; | |
! wm8994_set_drc(codec, drc); | |
return 0; | |
} | |
! static int wm8994_get_drc_enum(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
{ | |
! struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | |
! int drc = wm8994_get_drc(kcontrol->id.name); | |
! | |
! ucontrol->value.enumerated.item[0] = wm8994->drc_cfg[drc]; | |
return 0; | |
} | |
! static void wm8994_set_retune_mobile(struct snd_soc_codec *codec, int block) | |
{ | |
! struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | |
! struct wm8994_pdata *pdata = wm8994->pdata; | |
! int base = wm8994_retune_mobile_base[block]; | |
! int iface, best, best_val, save, i, cfg; | |
! | |
! if (!pdata || !wm8994->num_retune_mobile_texts) | |
! return; | |
! | |
! switch (block) { | |
! case 0: | |
! case 1: | |
! iface = 0; | |
! break; | |
! case 2: | |
! iface = 1; | |
! break; | |
! default: | |
! return; | |
} | |
! /* Find the version of the currently selected configuration | |
! * with the nearest sample rate. */ | |
! cfg = wm8994->retune_mobile_cfg[block]; | |
! best = 0; | |
! best_val = INT_MAX; | |
! for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) { | |
! if (strcmp(pdata->retune_mobile_cfgs[i].name, | |
! wm8994->retune_mobile_texts[cfg]) == 0 && | |
! abs(pdata->retune_mobile_cfgs[i].rate | |
! - wm8994->dac_rates[iface]) < best_val) { | |
! best = i; | |
! best_val = abs(pdata->retune_mobile_cfgs[i].rate | |
! - wm8994->dac_rates[iface]); | |
! } | |
} | |
! dev_dbg(codec->dev, "ReTune Mobile %d %s/%dHz for %dHz sample rate\n", | |
! block, | |
! pdata->retune_mobile_cfgs[best].name, | |
! pdata->retune_mobile_cfgs[best].rate, | |
! wm8994->dac_rates[iface]); | |
- /* The EQ will be disabled while reconfiguring it, remember the | |
- * current configuration. | |
- */ | |
- save = snd_soc_read(codec, base); | |
- save &= WM8994_AIF1DAC1_EQ_ENA; | |
! for (i = 0; i < WM8994_EQ_REGS; i++) | |
! snd_soc_update_bits(codec, base + i, 0xffff, | |
! pdata->retune_mobile_cfgs[best].regs[i]); | |
! snd_soc_update_bits(codec, base, WM8994_AIF1DAC1_EQ_ENA, save); | |
} | |
! /* Icky as hell but saves code duplication */ | |
! static int wm8994_get_retune_mobile_block(const char *name) | |
{ | |
! if (strcmp(name, "AIF1.1 EQ Mode") == 0) | |
return 0; | |
! if (strcmp(name, "AIF1.2 EQ Mode") == 0) | |
! return 1; | |
! if (strcmp(name, "AIF2 EQ Mode") == 0) | |
! return 2; | |
! return -EINVAL; | |
! } | |
! static int wm8994_put_retune_mobile_enum(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
! { | |
! struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | |
! struct wm8994_pdata *pdata = wm8994->pdata; | |
! int block = wm8994_get_retune_mobile_block(kcontrol->id.name); | |
! int value = ucontrol->value.integer.value[0]; | |
! if (block < 0) | |
! return block; | |
! if (value >= pdata->num_retune_mobile_cfgs) | |
! return -EINVAL; | |
! wm8994->retune_mobile_cfg[block] = value; | |
! wm8994_set_retune_mobile(codec, block); | |
return 0; | |
} | |
! static int wm8994_get_retune_mobile_enum(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
! { | |
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | |
! int block = wm8994_get_retune_mobile_block(kcontrol->id.name); | |
! ucontrol->value.enumerated.item[0] = wm8994->retune_mobile_cfg[block]; | |
return 0; | |
} | |
! static const struct snd_kcontrol_new wm8994_snd_controls[] = { | |
! SOC_DOUBLE_R_TLV("AIF1ADC1 Volume", WM8994_AIF1_ADC1_LEFT_VOLUME, | |
! WM8994_AIF1_ADC1_RIGHT_VOLUME, | |
! 1, 119, 0, digital_tlv), | |
! SOC_DOUBLE_R_TLV("AIF1ADC2 Volume", WM8994_AIF1_ADC2_LEFT_VOLUME, | |
! WM8994_AIF1_ADC2_RIGHT_VOLUME, | |
! 1, 119, 0, digital_tlv), | |
! SOC_DOUBLE_R_TLV("AIF2ADC Volume", WM8994_AIF2_ADC_LEFT_VOLUME, | |
! WM8994_AIF2_ADC_RIGHT_VOLUME, | |
! 1, 119, 0, digital_tlv), | |
! | |
! SOC_DOUBLE_R_TLV("AIF1DAC1 Volume", WM8994_AIF1_DAC1_LEFT_VOLUME, | |
! WM8994_AIF1_DAC1_RIGHT_VOLUME, 1, 96, 0, digital_tlv), | |
! SOC_DOUBLE_R_TLV("AIF1DAC2 Volume", WM8994_AIF1_DAC2_LEFT_VOLUME, | |
! WM8994_AIF1_DAC2_RIGHT_VOLUME, 1, 96, 0, digital_tlv), | |
! SOC_DOUBLE_R_TLV("AIF2DAC Volume", WM8994_AIF2_DAC_LEFT_VOLUME, | |
! WM8994_AIF2_DAC_RIGHT_VOLUME, 1, 96, 0, digital_tlv), | |
! | |
! SOC_SINGLE_TLV("AIF1 Boost Volume", WM8994_AIF1_CONTROL_2, 10, 3, 0, aif_tlv), | |
! SOC_SINGLE_TLV("AIF2 Boost Volume", WM8994_AIF2_CONTROL_2, 10, 3, 0, aif_tlv), | |
! | |
! SOC_SINGLE("AIF1DAC1 EQ Switch", WM8994_AIF1_DAC1_EQ_GAINS_1, 0, 1, 0), | |
! SOC_SINGLE("AIF1DAC2 EQ Switch", WM8994_AIF1_DAC2_EQ_GAINS_1, 0, 1, 0), | |
! SOC_SINGLE("AIF2 EQ Switch", WM8994_AIF2_EQ_GAINS_1, 0, 1, 0), | |
! | |
! WM8994_DRC_SWITCH("AIF1DAC1 DRC Switch", WM8994_AIF1_DRC1_1, 2), | |
! WM8994_DRC_SWITCH("AIF1ADC1L DRC Switch", WM8994_AIF1_DRC1_1, 1), | |
! WM8994_DRC_SWITCH("AIF1ADC1R DRC Switch", WM8994_AIF1_DRC1_1, 0), | |
! | |
! WM8994_DRC_SWITCH("AIF1DAC2 DRC Switch", WM8994_AIF1_DRC2_1, 2), | |
! WM8994_DRC_SWITCH("AIF1ADC2L DRC Switch", WM8994_AIF1_DRC2_1, 1), | |
! WM8994_DRC_SWITCH("AIF1ADC2R DRC Switch", WM8994_AIF1_DRC2_1, 0), | |
! | |
! WM8994_DRC_SWITCH("AIF2DAC DRC Switch", WM8994_AIF2_DRC_1, 2), | |
! WM8994_DRC_SWITCH("AIF2ADCL DRC Switch", WM8994_AIF2_DRC_1, 1), | |
! WM8994_DRC_SWITCH("AIF2ADCR DRC Switch", WM8994_AIF2_DRC_1, 0), | |
! | |
! SOC_SINGLE_TLV("DAC1 Right Sidetone Volume", WM8994_DAC1_MIXER_VOLUMES, | |
! 5, 12, 0, st_tlv), | |
! SOC_SINGLE_TLV("DAC1 Left Sidetone Volume", WM8994_DAC1_MIXER_VOLUMES, | |
! 0, 12, 0, st_tlv), | |
! SOC_SINGLE_TLV("DAC2 Right Sidetone Volume", WM8994_DAC2_MIXER_VOLUMES, | |
! 5, 12, 0, st_tlv), | |
! SOC_SINGLE_TLV("DAC2 Left Sidetone Volume", WM8994_DAC2_MIXER_VOLUMES, | |
! 0, 12, 0, st_tlv), | |
! SOC_ENUM("Sidetone HPF Mux", sidetone_hpf), | |
! SOC_SINGLE("Sidetone HPF Switch", WM8994_SIDETONE, 6, 1, 0), | |
! | |
! SOC_DOUBLE_R_TLV("DAC1 Volume", WM8994_DAC1_LEFT_VOLUME, | |
! WM8994_DAC1_RIGHT_VOLUME, 1, 96, 0, digital_tlv), | |
! SOC_DOUBLE_R("DAC1 Switch", WM8994_DAC1_LEFT_VOLUME, | |
! WM8994_DAC1_RIGHT_VOLUME, 9, 1, 1), | |
! | |
! SOC_DOUBLE_R_TLV("DAC2 Volume", WM8994_DAC2_LEFT_VOLUME, | |
! WM8994_DAC2_RIGHT_VOLUME, 1, 96, 0, digital_tlv), | |
! SOC_DOUBLE_R("DAC2 Switch", WM8994_DAC2_LEFT_VOLUME, | |
! WM8994_DAC2_RIGHT_VOLUME, 9, 1, 1), | |
! | |
! SOC_SINGLE_TLV("SPKL DAC2 Volume", WM8994_SPKMIXL_ATTENUATION, | |
! 6, 1, 1, wm_hubs_spkmix_tlv), | |
! SOC_SINGLE_TLV("SPKL DAC1 Volume", WM8994_SPKMIXL_ATTENUATION, | |
! 2, 1, 1, wm_hubs_spkmix_tlv), | |
! | |
! SOC_SINGLE_TLV("SPKR DAC2 Volume", WM8994_SPKMIXR_ATTENUATION, | |
! 6, 1, 1, wm_hubs_spkmix_tlv), | |
! SOC_SINGLE_TLV("SPKR DAC1 Volume", WM8994_SPKMIXR_ATTENUATION, | |
! 2, 1, 1, wm_hubs_spkmix_tlv), | |
! | |
! SOC_SINGLE_TLV("AIF1DAC1 3D Stereo Volume", WM8994_AIF1_DAC1_FILTERS_2, | |
! 10, 15, 0, wm8994_3d_tlv), | |
! SOC_SINGLE("AIF1DAC1 3D Stereo Switch", WM8994_AIF1_DAC2_FILTERS_2, | |
! 8, 1, 0), | |
! SOC_SINGLE_TLV("AIF1DAC2 3D Stereo Volume", WM8994_AIF1_DAC2_FILTERS_2, | |
! 10, 15, 0, wm8994_3d_tlv), | |
! SOC_SINGLE("AIF1DAC2 3D Stereo Switch", WM8994_AIF1_DAC2_FILTERS_2, | |
! 8, 1, 0), | |
! SOC_SINGLE_TLV("AIF2DAC 3D Stereo Volume", WM8994_AIF1_DAC1_FILTERS_2, | |
! 10, 15, 0, wm8994_3d_tlv), | |
! SOC_SINGLE("AIF2DAC 3D Stereo Switch", WM8994_AIF1_DAC2_FILTERS_2, | |
! 8, 1, 0), | |
! }; | |
! | |
! static const struct snd_kcontrol_new wm8994_eq_controls[] = { | |
! SOC_SINGLE_TLV("AIF1DAC1 EQ1 Volume", WM8994_AIF1_DAC1_EQ_GAINS_1, 11, 31, 0, | |
! eq_tlv), | |
! SOC_SINGLE_TLV("AIF1DAC1 EQ2 Volume", WM8994_AIF1_DAC1_EQ_GAINS_1, 6, 31, 0, | |
! eq_tlv), | |
! SOC_SINGLE_TLV("AIF1DAC1 EQ3 Volume", WM8994_AIF1_DAC1_EQ_GAINS_1, 1, 31, 0, | |
! eq_tlv), | |
! SOC_SINGLE_TLV("AIF1DAC1 EQ4 Volume", WM8994_AIF1_DAC1_EQ_GAINS_2, 11, 31, 0, | |
! eq_tlv), | |
! SOC_SINGLE_TLV("AIF1DAC1 EQ5 Volume", WM8994_AIF1_DAC1_EQ_GAINS_2, 6, 31, 0, | |
! eq_tlv), | |
! | |
! SOC_SINGLE_TLV("AIF1DAC2 EQ1 Volume", WM8994_AIF1_DAC2_EQ_GAINS_1, 11, 31, 0, | |
! eq_tlv), | |
! SOC_SINGLE_TLV("AIF1DAC2 EQ2 Volume", WM8994_AIF1_DAC2_EQ_GAINS_1, 6, 31, 0, | |
! eq_tlv), | |
! SOC_SINGLE_TLV("AIF1DAC2 EQ3 Volume", WM8994_AIF1_DAC2_EQ_GAINS_1, 1, 31, 0, | |
! eq_tlv), | |
! SOC_SINGLE_TLV("AIF1DAC2 EQ4 Volume", WM8994_AIF1_DAC2_EQ_GAINS_2, 11, 31, 0, | |
! eq_tlv), | |
! SOC_SINGLE_TLV("AIF1DAC2 EQ5 Volume", WM8994_AIF1_DAC2_EQ_GAINS_2, 6, 31, 0, | |
! eq_tlv), | |
! | |
! SOC_SINGLE_TLV("AIF2 EQ1 Volume", WM8994_AIF2_EQ_GAINS_1, 11, 31, 0, | |
! eq_tlv), | |
! SOC_SINGLE_TLV("AIF2 EQ2 Volume", WM8994_AIF2_EQ_GAINS_1, 6, 31, 0, | |
! eq_tlv), | |
! SOC_SINGLE_TLV("AIF2 EQ3 Volume", WM8994_AIF2_EQ_GAINS_1, 1, 31, 0, | |
! eq_tlv), | |
! SOC_SINGLE_TLV("AIF2 EQ4 Volume", WM8994_AIF2_EQ_GAINS_2, 11, 31, 0, | |
! eq_tlv), | |
! SOC_SINGLE_TLV("AIF2 EQ5 Volume", WM8994_AIF2_EQ_GAINS_2, 6, 31, 0, | |
! eq_tlv), | |
! }; | |
! | |
! static int clk_sys_event(struct snd_soc_dapm_widget *w, | |
! struct snd_kcontrol *kcontrol, int event) | |
{ | |
! struct snd_soc_codec *codec = w->codec; | |
! switch (event) { | |
! case SND_SOC_DAPM_PRE_PMU: | |
! return configure_clock(codec); | |
! case SND_SOC_DAPM_POST_PMD: | |
! configure_clock(codec); | |
! break; | |
! } | |
return 0; | |
} | |
! static void wm8994_update_class_w(struct snd_soc_codec *codec) | |
! { | |
! int enable = 1; | |
! int source = 0; /* GCC flow analysis can't track enable */ | |
! int reg, reg_r; | |
! | |
! /* Only support direct DAC->headphone paths */ | |
! reg = snd_soc_read(codec, WM8994_OUTPUT_MIXER_1); | |
! if (!(reg & WM8994_DAC1L_TO_HPOUT1L)) { | |
! dev_vdbg(codec->dev, "HPL connected to output mixer\n"); | |
! enable = 0; | |
! } | |
! | |
! reg = snd_soc_read(codec, WM8994_OUTPUT_MIXER_2); | |
! if (!(reg & WM8994_DAC1R_TO_HPOUT1R)) { | |
! dev_vdbg(codec->dev, "HPR connected to output mixer\n"); | |
! enable = 0; | |
! } | |
! | |
! /* We also need the same setting for L/R and only one path */ | |
! reg = snd_soc_read(codec, WM8994_DAC1_LEFT_MIXER_ROUTING); | |
! switch (reg) { | |
! case WM8994_AIF2DACL_TO_DAC1L: | |
! dev_vdbg(codec->dev, "Class W source AIF2DAC\n"); | |
! source = 2 << WM8994_CP_DYN_SRC_SEL_SHIFT; | |
! break; | |
! case WM8994_AIF1DAC2L_TO_DAC1L: | |
! dev_vdbg(codec->dev, "Class W source AIF1DAC2\n"); | |
! source = 1 << WM8994_CP_DYN_SRC_SEL_SHIFT; | |
! break; | |
! case WM8994_AIF1DAC1L_TO_DAC1L: | |
! dev_vdbg(codec->dev, "Class W source AIF1DAC1\n"); | |
! source = 0 << WM8994_CP_DYN_SRC_SEL_SHIFT; | |
! break; | |
! default: | |
! dev_vdbg(codec->dev, "DAC mixer setting: %x\n", reg); | |
! enable = 0; | |
! break; | |
! } | |
! | |
! reg_r = snd_soc_read(codec, WM8994_DAC1_RIGHT_MIXER_ROUTING); | |
! if (reg_r != reg) { | |
! dev_vdbg(codec->dev, "Left and right DAC mixers different\n"); | |
! enable = 0; | |
! } | |
! if (enable) { | |
! dev_dbg(codec->dev, "Class W enabled\n"); | |
! snd_soc_update_bits(codec, WM8994_CLASS_W_1, | |
! WM8994_CP_DYN_PWR | | |
! WM8994_CP_DYN_SRC_SEL_MASK, | |
! source | WM8994_CP_DYN_PWR); | |
! | |
! } else { | |
! dev_dbg(codec->dev, "Class W disabled\n"); | |
! snd_soc_update_bits(codec, WM8994_CLASS_W_1, | |
! WM8994_CP_DYN_PWR, 0); | |
! } | |
} | |
! static const char *hp_mux_text[] = { | |
! "Mixer", | |
! "DAC", | |
! }; | |
! | |
! #define WM8994_HP_ENUM(xname, xenum) \ | |
! { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
! .info = snd_soc_info_enum_double, \ | |
! .get = snd_soc_dapm_get_enum_double, \ | |
! .put = wm8994_put_hp_enum, \ | |
! .private_value = (unsigned long)&xenum } | |
! | |
! static int wm8994_put_hp_enum(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
{ | |
! struct snd_soc_dapm_widget *w = snd_kcontrol_chip(kcontrol); | |
! struct snd_soc_codec *codec = w->codec; | |
! int ret; | |
! | |
! ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol); | |
! wm8994_update_class_w(codec); | |
! return ret; | |
! } | |
! static const struct soc_enum hpl_enum = | |
! SOC_ENUM_SINGLE(WM8994_OUTPUT_MIXER_1, 8, 2, hp_mux_text); | |
! static const struct snd_kcontrol_new hpl_mux = | |
! WM8994_HP_ENUM("Left Headphone Mux", hpl_enum); | |
! static const struct soc_enum hpr_enum = | |
! SOC_ENUM_SINGLE(WM8994_OUTPUT_MIXER_2, 8, 2, hp_mux_text); | |
! static const struct snd_kcontrol_new hpr_mux = | |
! WM8994_HP_ENUM("Right Headphone Mux", hpr_enum); | |
! static const char *adc_mux_text[] = { | |
! "ADC", | |
! "DMIC", | |
! }; | |
! static const struct soc_enum adc_enum = | |
! SOC_ENUM_SINGLE(0, 0, 2, adc_mux_text); | |
! static const struct snd_kcontrol_new adcl_mux = | |
! SOC_DAPM_ENUM_VIRT("ADCL Mux", adc_enum); | |
! static const struct snd_kcontrol_new adcr_mux = | |
! SOC_DAPM_ENUM_VIRT("ADCR Mux", adc_enum); | |
! static const struct snd_kcontrol_new left_speaker_mixer[] = { | |
! SOC_DAPM_SINGLE("DAC2 Switch", WM8994_SPEAKER_MIXER, 9, 1, 0), | |
! SOC_DAPM_SINGLE("Input Switch", WM8994_SPEAKER_MIXER, 7, 1, 0), | |
! SOC_DAPM_SINGLE("IN1LP Switch", WM8994_SPEAKER_MIXER, 5, 1, 0), | |
! SOC_DAPM_SINGLE("Output Switch", WM8994_SPEAKER_MIXER, 3, 1, 0), | |
! SOC_DAPM_SINGLE("DAC1 Switch", WM8994_SPEAKER_MIXER, 1, 1, 0), | |
! }; | |
! static const struct snd_kcontrol_new right_speaker_mixer[] = { | |
! SOC_DAPM_SINGLE("DAC2 Switch", WM8994_SPEAKER_MIXER, 8, 1, 0), | |
! SOC_DAPM_SINGLE("Input Switch", WM8994_SPEAKER_MIXER, 6, 1, 0), | |
! SOC_DAPM_SINGLE("IN1RP Switch", WM8994_SPEAKER_MIXER, 4, 1, 0), | |
! SOC_DAPM_SINGLE("Output Switch", WM8994_SPEAKER_MIXER, 2, 1, 0), | |
! SOC_DAPM_SINGLE("DAC1 Switch", WM8994_SPEAKER_MIXER, 0, 1, 0), | |
! }; | |
- /* Debugging; dump chip status after DAPM transitions */ | |
- static int post_ev(struct snd_soc_dapm_widget *w, | |
- struct snd_kcontrol *kcontrol, int event) | |
- { | |
- struct snd_soc_codec *codec = w->codec; | |
- dev_dbg(codec->dev, "SRC status: %x\n", | |
- snd_soc_read(codec, | |
- WM8994_RATE_STATUS)); | |
return 0; | |
} | |
! static const struct snd_kcontrol_new aif1adc1l_mix[] = { | |
! SOC_DAPM_SINGLE("ADC/DMIC Switch", WM8994_AIF1_ADC1_LEFT_MIXER_ROUTING, | |
! 1, 1, 0), | |
! SOC_DAPM_SINGLE("AIF2 Switch", WM8994_AIF1_ADC1_LEFT_MIXER_ROUTING, | |
! 0, 1, 0), | |
! }; | |
! | |
! static const struct snd_kcontrol_new aif1adc1r_mix[] = { | |
! SOC_DAPM_SINGLE("ADC/DMIC Switch", WM8994_AIF1_ADC1_RIGHT_MIXER_ROUTING, | |
! 1, 1, 0), | |
! SOC_DAPM_SINGLE("AIF2 Switch", WM8994_AIF1_ADC1_RIGHT_MIXER_ROUTING, | |
! 0, 1, 0), | |
! }; | |
- static const struct snd_kcontrol_new aif2dac2l_mix[] = { | |
- SOC_DAPM_SINGLE("Right Sidetone Switch", WM8994_DAC2_LEFT_MIXER_ROUTING, | |
- 5, 1, 0), | |
- SOC_DAPM_SINGLE("Left Sidetone Switch", WM8994_DAC2_LEFT_MIXER_ROUTING, | |
- 4, 1, 0), | |
- SOC_DAPM_SINGLE("AIF2 Switch", WM8994_DAC2_LEFT_MIXER_ROUTING, | |
- 2, 1, 0), | |
- SOC_DAPM_SINGLE("AIF1.2 Switch", WM8994_DAC2_LEFT_MIXER_ROUTING, | |
- 1, 1, 0), | |
- SOC_DAPM_SINGLE("AIF1.1 Switch", WM8994_DAC2_LEFT_MIXER_ROUTING, | |
- 0, 1, 0), | |
- }; | |
! static const struct snd_kcontrol_new aif2dac2r_mix[] = { | |
! SOC_DAPM_SINGLE("Right Sidetone Switch", WM8994_DAC2_RIGHT_MIXER_ROUTING, | |
! 5, 1, 0), | |
! SOC_DAPM_SINGLE("Left Sidetone Switch", WM8994_DAC2_RIGHT_MIXER_ROUTING, | |
! 4, 1, 0), | |
! SOC_DAPM_SINGLE("AIF2 Switch", WM8994_DAC2_RIGHT_MIXER_ROUTING, | |
! 2, 1, 0), | |
! SOC_DAPM_SINGLE("AIF1.2 Switch", WM8994_DAC2_RIGHT_MIXER_ROUTING, | |
! 1, 1, 0), | |
! SOC_DAPM_SINGLE("AIF1.1 Switch", WM8994_DAC2_RIGHT_MIXER_ROUTING, | |
! 0, 1, 0), | |
! }; | |
! #define WM8994_CLASS_W_SWITCH(xname, reg, shift, max, invert) \ | |
! { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
! .info = snd_soc_info_volsw, \ | |
! .get = snd_soc_dapm_get_volsw, .put = wm8994_put_class_w, \ | |
! .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) } | |
! static int wm8994_put_class_w(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
! { | |
! struct snd_soc_dapm_widget *w = snd_kcontrol_chip(kcontrol); | |
! struct snd_soc_codec *codec = w->codec; | |
! int ret; | |
- ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol); | |
! wm8994_update_class_w(codec); | |
! return ret; | |
} | |
! static const struct snd_kcontrol_new dac1l_mix[] = { | |
! WM8994_CLASS_W_SWITCH("Right Sidetone Switch", WM8994_DAC1_LEFT_MIXER_ROUTING, | |
! 5, 1, 0), | |
! WM8994_CLASS_W_SWITCH("Left Sidetone Switch", WM8994_DAC1_LEFT_MIXER_ROUTING, | |
! 4, 1, 0), | |
! WM8994_CLASS_W_SWITCH("AIF2 Switch", WM8994_DAC1_LEFT_MIXER_ROUTING, | |
! 2, 1, 0), | |
! WM8994_CLASS_W_SWITCH("AIF1.2 Switch", WM8994_DAC1_LEFT_MIXER_ROUTING, | |
! 1, 1, 0), | |
! WM8994_CLASS_W_SWITCH("AIF1.1 Switch", WM8994_DAC1_LEFT_MIXER_ROUTING, | |
! 0, 1, 0), | |
! }; | |
! static const struct snd_kcontrol_new dac1r_mix[] = { | |
! WM8994_CLASS_W_SWITCH("Right Sidetone Switch", WM8994_DAC1_RIGHT_MIXER_ROUTING, | |
! 5, 1, 0), | |
! WM8994_CLASS_W_SWITCH("Left Sidetone Switch", WM8994_DAC1_RIGHT_MIXER_ROUTING, | |
! 4, 1, 0), | |
! WM8994_CLASS_W_SWITCH("AIF2 Switch", WM8994_DAC1_RIGHT_MIXER_ROUTING, | |
! 2, 1, 0), | |
! WM8994_CLASS_W_SWITCH("AIF1.2 Switch", WM8994_DAC1_RIGHT_MIXER_ROUTING, | |
! 1, 1, 0), | |
! WM8994_CLASS_W_SWITCH("AIF1.1 Switch", WM8994_DAC1_RIGHT_MIXER_ROUTING, | |
! 0, 1, 0), | |
! }; | |
! static const char *sidetone_text[] = { | |
! "ADC/DMIC1", "DMIC2", | |
! }; | |
! static const struct soc_enum sidetone1_enum = | |
! SOC_ENUM_SINGLE(WM8994_SIDETONE, 0, 2, sidetone_text); | |
! static const struct snd_kcontrol_new sidetone1_mux = | |
! SOC_DAPM_ENUM("Left Sidetone Mux", sidetone1_enum); | |
! static const struct soc_enum sidetone2_enum = | |
! SOC_ENUM_SINGLE(WM8994_SIDETONE, 1, 2, sidetone_text); | |
! static const struct snd_kcontrol_new sidetone2_mux = | |
! SOC_DAPM_ENUM("Right Sidetone Mux", sidetone2_enum); | |
! static const char *aif1dac_text[] = { | |
! "AIF1DACDAT", "AIF3DACDAT", | |
! }; | |
! | |
! static const struct soc_enum aif1dac_enum = | |
! SOC_ENUM_SINGLE(WM8994_POWER_MANAGEMENT_6, 0, 2, aif1dac_text); | |
! static const struct snd_kcontrol_new aif1dac_mux = | |
! SOC_DAPM_ENUM("AIF1DAC Mux", aif1dac_enum); | |
! static const char *aif2dac_text[] = { | |
! "AIF2DACDAT", "AIF3DACDAT", | |
! }; | |
! static const struct soc_enum aif2dac_enum = | |
! SOC_ENUM_SINGLE(WM8994_POWER_MANAGEMENT_6, 1, 2, aif2dac_text); | |
! static const struct snd_kcontrol_new aif2dac_mux = | |
! SOC_DAPM_ENUM("AIF2DAC Mux", aif2dac_enum); | |
! static const char *aif2adc_text[] = { | |
! "AIF2ADCDAT", "AIF3DACDAT", | |
! }; | |
- static const struct soc_enum aif2adc_enum = | |
- SOC_ENUM_SINGLE(WM8994_POWER_MANAGEMENT_6, 2, 2, aif2adc_text); | |
! static const struct snd_kcontrol_new aif2adc_mux = | |
! SOC_DAPM_ENUM("AIF2ADC Mux", aif2adc_enum); | |
- static const char *aif3adc_text[] = { | |
- "AIF1ADCDAT", "AIF2ADCDAT", "AIF2DACDAT", | |
- }; | |
! static const struct soc_enum aif3adc_enum = | |
! SOC_ENUM_SINGLE(WM8994_POWER_MANAGEMENT_6, 3, 3, aif3adc_text); | |
! static const struct snd_kcontrol_new aif3adc_mux = | |
! SOC_DAPM_ENUM("AIF3ADC Mux", aif3adc_enum); | |
! static const struct snd_soc_dapm_widget wm8994_dapm_widgets[] = { | |
! SND_SOC_DAPM_INPUT("DMIC1DAT"), | |
! SND_SOC_DAPM_INPUT("DMIC2DAT"), | |
! SND_SOC_DAPM_SUPPLY("CLK_SYS", SND_SOC_NOPM, 0, 0, clk_sys_event, | |
! SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), | |
! SND_SOC_DAPM_SUPPLY("DSP1CLK", WM8994_CLOCKING_1, 3, 0, NULL, 0), | |
! SND_SOC_DAPM_SUPPLY("DSP2CLK", WM8994_CLOCKING_1, 2, 0, NULL, 0), | |
! SND_SOC_DAPM_SUPPLY("DSPINTCLK", WM8994_CLOCKING_1, 1, 0, NULL, 0), | |
! | |
! SND_SOC_DAPM_SUPPLY("AIF1CLK", WM8994_AIF1_CLOCKING_1, 0, 0, NULL, 0), | |
! SND_SOC_DAPM_SUPPLY("AIF2CLK", WM8994_AIF2_CLOCKING_1, 0, 0, NULL, 0), | |
! | |
! SND_SOC_DAPM_AIF_OUT("AIF1ADC1L", "AIF1 Capture", | |
! 0, WM8994_POWER_MANAGEMENT_4, 9, 0), | |
! SND_SOC_DAPM_AIF_OUT("AIF1ADC1R", "AIF1 Capture", | |
! 0, WM8994_POWER_MANAGEMENT_4, 8, 0), | |
! SND_SOC_DAPM_AIF_IN("AIF1DAC1L", NULL, 0, | |
! WM8994_POWER_MANAGEMENT_5, 9, 0), | |
! SND_SOC_DAPM_AIF_IN("AIF1DAC1R", NULL, 0, | |
! WM8994_POWER_MANAGEMENT_5, 8, 0), | |
! | |
! SND_SOC_DAPM_AIF_OUT("AIF1ADC2L", "AIF1 Capture", | |
! 0, WM8994_POWER_MANAGEMENT_4, 11, 0), | |
! SND_SOC_DAPM_AIF_OUT("AIF1ADC2R", "AIF1 Capture", | |
! 0, WM8994_POWER_MANAGEMENT_4, 10, 0), | |
! SND_SOC_DAPM_AIF_IN("AIF1DAC2L", NULL, 0, | |
! WM8994_POWER_MANAGEMENT_5, 11, 0), | |
! SND_SOC_DAPM_AIF_IN("AIF1DAC2R", NULL, 0, | |
! WM8994_POWER_MANAGEMENT_5, 10, 0), | |
! | |
! SND_SOC_DAPM_MIXER("AIF1ADC1L Mixer", SND_SOC_NOPM, 0, 0, | |
! aif1adc1l_mix, ARRAY_SIZE(aif1adc1l_mix)), | |
! SND_SOC_DAPM_MIXER("AIF1ADC1R Mixer", SND_SOC_NOPM, 0, 0, | |
! aif1adc1r_mix, ARRAY_SIZE(aif1adc1r_mix)), | |
! | |
! SND_SOC_DAPM_MIXER("AIF2DAC2L Mixer", SND_SOC_NOPM, 0, 0, | |
! aif2dac2l_mix, ARRAY_SIZE(aif2dac2l_mix)), | |
! SND_SOC_DAPM_MIXER("AIF2DAC2R Mixer", SND_SOC_NOPM, 0, 0, | |
! aif2dac2r_mix, ARRAY_SIZE(aif2dac2r_mix)), | |
! | |
! SND_SOC_DAPM_MUX("Left Sidetone", SND_SOC_NOPM, 0, 0, &sidetone1_mux), | |
! SND_SOC_DAPM_MUX("Right Sidetone", SND_SOC_NOPM, 0, 0, &sidetone2_mux), | |
! | |
! SND_SOC_DAPM_MIXER("DAC1L Mixer", SND_SOC_NOPM, 0, 0, | |
! dac1l_mix, ARRAY_SIZE(dac1l_mix)), | |
! SND_SOC_DAPM_MIXER("DAC1R Mixer", SND_SOC_NOPM, 0, 0, | |
! dac1r_mix, ARRAY_SIZE(dac1r_mix)), | |
! | |
! SND_SOC_DAPM_AIF_OUT("AIF2ADCL", NULL, 0, | |
! WM8994_POWER_MANAGEMENT_4, 13, 0), | |
! SND_SOC_DAPM_AIF_OUT("AIF2ADCR", NULL, 0, | |
! WM8994_POWER_MANAGEMENT_4, 12, 0), | |
! SND_SOC_DAPM_AIF_IN("AIF2DACL", NULL, 0, | |
! WM8994_POWER_MANAGEMENT_5, 13, 0), | |
! SND_SOC_DAPM_AIF_IN("AIF2DACR", NULL, 0, | |
! WM8994_POWER_MANAGEMENT_5, 12, 0), | |
! | |
! SND_SOC_DAPM_AIF_IN("AIF1DACDAT", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), | |
! SND_SOC_DAPM_AIF_IN("AIF2DACDAT", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), | |
! SND_SOC_DAPM_AIF_OUT("AIF2ADCDAT", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0), | |
! | |
! SND_SOC_DAPM_MUX("AIF1DAC Mux", SND_SOC_NOPM, 0, 0, &aif1dac_mux), | |
! SND_SOC_DAPM_MUX("AIF2DAC Mux", SND_SOC_NOPM, 0, 0, &aif2dac_mux), | |
! SND_SOC_DAPM_MUX("AIF2ADC Mux", SND_SOC_NOPM, 0, 0, &aif2adc_mux), | |
! SND_SOC_DAPM_MUX("AIF3ADC Mux", SND_SOC_NOPM, 0, 0, &aif3adc_mux), | |
! | |
! SND_SOC_DAPM_AIF_IN("AIF3DACDAT", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0), | |
! SND_SOC_DAPM_AIF_IN("AIF3ADCDAT", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0), | |
! | |
! SND_SOC_DAPM_SUPPLY("TOCLK", WM8994_CLOCKING_1, 4, 0, NULL, 0), | |
! | |
! SND_SOC_DAPM_ADC("DMIC2L", NULL, WM8994_POWER_MANAGEMENT_4, 5, 0), | |
! SND_SOC_DAPM_ADC("DMIC2R", NULL, WM8994_POWER_MANAGEMENT_4, 4, 0), | |
! SND_SOC_DAPM_ADC("DMIC1L", NULL, WM8994_POWER_MANAGEMENT_4, 3, 0), | |
! SND_SOC_DAPM_ADC("DMIC1R", NULL, WM8994_POWER_MANAGEMENT_4, 2, 0), | |
! | |
! /* Power is done with the muxes since the ADC power also controls the | |
! * downsampling chain, the chip will automatically manage the analogue | |
! * specific portions. | |
! */ | |
! SND_SOC_DAPM_ADC("ADCL", NULL, SND_SOC_NOPM, 1, 0), | |
! SND_SOC_DAPM_ADC("ADCR", NULL, SND_SOC_NOPM, 0, 0), | |
! SND_SOC_DAPM_MUX("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux), | |
! SND_SOC_DAPM_MUX("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux), | |
! SND_SOC_DAPM_DAC("DAC2L", NULL, WM8994_POWER_MANAGEMENT_5, 3, 0), | |
! SND_SOC_DAPM_DAC("DAC2R", NULL, WM8994_POWER_MANAGEMENT_5, 2, 0), | |
! SND_SOC_DAPM_DAC("DAC1L", NULL, WM8994_POWER_MANAGEMENT_5, 1, 0), | |
! SND_SOC_DAPM_DAC("DAC1R", NULL, WM8994_POWER_MANAGEMENT_5, 0, 0), | |
! | |
! SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0, &hpl_mux), | |
! SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0, &hpr_mux), | |
! | |
! SND_SOC_DAPM_MIXER("SPKL", WM8994_POWER_MANAGEMENT_3, 8, 0, | |
! left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)), | |
! SND_SOC_DAPM_MIXER("SPKR", WM8994_POWER_MANAGEMENT_3, 9, 0, | |
! right_speaker_mixer, ARRAY_SIZE(right_speaker_mixer)), | |
! SND_SOC_DAPM_POST("Debug log", post_ev), | |
}; | |
- static const struct snd_soc_dapm_route intercon[] = { | |
- | |
- { "CLK_SYS", NULL, "AIF1CLK", check_clk_sys }, | |
- { "CLK_SYS", NULL, "AIF2CLK", check_clk_sys }, | |
! { "DSP1CLK", NULL, "CLK_SYS" }, | |
! { "DSP2CLK", NULL, "CLK_SYS" }, | |
! { "DSPINTCLK", NULL, "CLK_SYS" }, | |
! | |
! { "AIF1ADC1L", NULL, "AIF1CLK" }, | |
! { "AIF1ADC1L", NULL, "DSP1CLK" }, | |
! { "AIF1ADC1R", NULL, "AIF1CLK" }, | |
! { "AIF1ADC1R", NULL, "DSP1CLK" }, | |
! { "AIF1ADC1R", NULL, "DSPINTCLK" }, | |
! | |
! { "AIF1DAC1L", NULL, "AIF1CLK" }, | |
! { "AIF1DAC1L", NULL, "DSP1CLK" }, | |
! { "AIF1DAC1R", NULL, "AIF1CLK" }, | |
! { "AIF1DAC1R", NULL, "DSP1CLK" }, | |
! { "AIF1DAC1R", NULL, "DSPINTCLK" }, | |
! | |
! { "AIF1ADC2L", NULL, "AIF1CLK" }, | |
! { "AIF1ADC2L", NULL, "DSP1CLK" }, | |
! { "AIF1ADC2R", NULL, "AIF1CLK" }, | |
! { "AIF1ADC2R", NULL, "DSP1CLK" }, | |
! { "AIF1ADC2R", NULL, "DSPINTCLK" }, | |
! | |
! { "AIF1DAC2L", NULL, "AIF1CLK" }, | |
! { "AIF1DAC2L", NULL, "DSP1CLK" }, | |
! { "AIF1DAC2R", NULL, "AIF1CLK" }, | |
! { "AIF1DAC2R", NULL, "DSP1CLK" }, | |
! { "AIF1DAC2R", NULL, "DSPINTCLK" }, | |
! | |
! { "AIF2ADCL", NULL, "AIF2CLK" }, | |
! { "AIF2ADCL", NULL, "DSP2CLK" }, | |
! { "AIF2ADCR", NULL, "AIF2CLK" }, | |
! { "AIF2ADCR", NULL, "DSP2CLK" }, | |
! { "AIF2ADCR", NULL, "DSPINTCLK" }, | |
! | |
! { "AIF2DACL", NULL, "AIF2CLK" }, | |
! { "AIF2DACL", NULL, "DSP2CLK" }, | |
! { "AIF2DACR", NULL, "AIF2CLK" }, | |
! { "AIF2DACR", NULL, "DSP2CLK" }, | |
! { "AIF2DACR", NULL, "DSPINTCLK" }, | |
! | |
! { "DMIC1L", NULL, "DMIC1DAT" }, | |
! { "DMIC1L", NULL, "CLK_SYS" }, | |
! { "DMIC1R", NULL, "DMIC1DAT" }, | |
! { "DMIC1R", NULL, "CLK_SYS" }, | |
! { "DMIC2L", NULL, "DMIC2DAT" }, | |
! { "DMIC2L", NULL, "CLK_SYS" }, | |
! { "DMIC2R", NULL, "DMIC2DAT" }, | |
! { "DMIC2R", NULL, "CLK_SYS" }, | |
! | |
! { "ADCL", NULL, "AIF1CLK" }, | |
! { "ADCL", NULL, "DSP1CLK" }, | |
! { "ADCL", NULL, "DSPINTCLK" }, | |
! | |
! { "ADCR", NULL, "AIF1CLK" }, | |
! { "ADCR", NULL, "DSP1CLK" }, | |
! { "ADCR", NULL, "DSPINTCLK" }, | |
! | |
! { "ADCL Mux", "ADC", "ADCL" }, | |
! { "ADCL Mux", "DMIC", "DMIC1L" }, | |
! { "ADCR Mux", "ADC", "ADCR" }, | |
! { "ADCR Mux", "DMIC", "DMIC1R" }, | |
! | |
! { "DAC1L", NULL, "AIF1CLK" }, | |
! { "DAC1L", NULL, "DSP1CLK" }, | |
! { "DAC1L", NULL, "DSPINTCLK" }, | |
! | |
! { "DAC1R", NULL, "AIF1CLK" }, | |
! { "DAC1R", NULL, "DSP1CLK" }, | |
! { "DAC1R", NULL, "DSPINTCLK" }, | |
! | |
! { "DAC2L", NULL, "AIF2CLK" }, | |
! { "DAC2L", NULL, "DSP2CLK" }, | |
! { "DAC2L", NULL, "DSPINTCLK" }, | |
! | |
! { "DAC2R", NULL, "AIF2DACR" }, | |
! { "DAC2R", NULL, "AIF2CLK" }, | |
! { "DAC2R", NULL, "DSP2CLK" }, | |
! { "DAC2R", NULL, "DSPINTCLK" }, | |
! | |
! { "TOCLK", NULL, "CLK_SYS" }, | |
! | |
! /* AIF1 outputs */ | |
! { "AIF1ADC1L", NULL, "AIF1ADC1L Mixer" }, | |
! { "AIF1ADC1L Mixer", "ADC/DMIC Switch", "ADCL Mux" }, | |
! { "AIF1ADC1L Mixer", "AIF2 Switch", "AIF2DACL" }, | |
! | |
! { "AIF1ADC1R", NULL, "AIF1ADC1R Mixer" }, | |
! { "AIF1ADC1R Mixer", "ADC/DMIC Switch", "ADCR Mux" }, | |
! { "AIF1ADC1R Mixer", "AIF2 Switch", "AIF2DACR" }, | |
! | |
! /* Pin level routing for AIF3 */ | |
! { "AIF1DAC1L", NULL, "AIF1DAC Mux" }, | |
! { "AIF1DAC1R", NULL, "AIF1DAC Mux" }, | |
! { "AIF1DAC2L", NULL, "AIF1DAC Mux" }, | |
! { "AIF1DAC2R", NULL, "AIF1DAC Mux" }, | |
! | |
! { "AIF2DACL", NULL, "AIF2DAC Mux" }, | |
! { "AIF2DACR", NULL, "AIF2DAC Mux" }, | |
! | |
! { "AIF1DAC Mux", "AIF1DACDAT", "AIF1DACDAT" }, | |
! { "AIF1DAC Mux", "AIF3DACDAT", "AIF3DACDAT" }, | |
! { "AIF2DAC Mux", "AIF2DACDAT", "AIF2DACDAT" }, | |
! { "AIF2DAC Mux", "AIF3DACDAT", "AIF3DACDAT" }, | |
! { "AIF2ADC Mux", "AIF2ADCDAT", "AIF2ADCL" }, | |
! { "AIF2ADC Mux", "AIF2ADCDAT", "AIF2ADCR" }, | |
! { "AIF2ADC Mux", "AIF3DACDAT", "AIF3ADCDAT" }, | |
! | |
! /* DAC1 inputs */ | |
! { "DAC1L", NULL, "DAC1L Mixer" }, | |
! { "DAC1L Mixer", "AIF2 Switch", "AIF2DACL" }, | |
! { "DAC1L Mixer", "AIF1.2 Switch", "AIF1DAC2L" }, | |
! { "DAC1L Mixer", "AIF1.1 Switch", "AIF1DAC1L" }, | |
! { "DAC1L Mixer", "Left Sidetone Switch", "Left Sidetone" }, | |
! { "DAC1L Mixer", "Right Sidetone Switch", "Right Sidetone" }, | |
! | |
! { "DAC1R", NULL, "DAC1R Mixer" }, | |
! { "DAC1R Mixer", "AIF2 Switch", "AIF2DACR" }, | |
! { "DAC1R Mixer", "AIF1.2 Switch", "AIF1DAC2R" }, | |
! { "DAC1R Mixer", "AIF1.1 Switch", "AIF1DAC1R" }, | |
! { "DAC1R Mixer", "Left Sidetone Switch", "Left Sidetone" }, | |
! { "DAC1R Mixer", "Right Sidetone Switch", "Right Sidetone" }, | |
! | |
! /* DAC2/AIF2 outputs */ | |
! { "AIF2ADCL", NULL, "AIF2DAC2L Mixer" }, | |
! { "DAC2L", NULL, "AIF2DAC2L Mixer" }, | |
! { "AIF2DAC2L Mixer", "AIF2 Switch", "AIF2DACL" }, | |
! { "AIF2DAC2L Mixer", "AIF1.2 Switch", "AIF1DAC2L" }, | |
! { "AIF2DAC2L Mixer", "AIF1.1 Switch", "AIF1DAC1L" }, | |
! { "AIF2DAC2L Mixer", "Left Sidetone Switch", "Left Sidetone" }, | |
! { "AIF2DAC2L Mixer", "Right Sidetone Switch", "Right Sidetone" }, | |
! | |
! { "AIF2ADCR", NULL, "AIF2DAC2R Mixer" }, | |
! { "DAC2R", NULL, "AIF2DAC2R Mixer" }, | |
! { "AIF2DAC2R Mixer", "AIF2 Switch", "AIF2DACR" }, | |
! { "AIF2DAC2R Mixer", "AIF1.2 Switch", "AIF1DAC2R" }, | |
! { "AIF2DAC2R Mixer", "AIF1.1 Switch", "AIF1DAC1R" }, | |
! { "AIF2DAC2R Mixer", "Left Sidetone Switch", "Left Sidetone" }, | |
! { "AIF2DAC2R Mixer", "Right Sidetone Switch", "Right Sidetone" }, | |
! | |
! { "AIF2ADCDAT", NULL, "AIF2ADC Mux" }, | |
! | |
! /* AIF3 output */ | |
! { "AIF3ADCDAT", "AIF1ADCDAT", "AIF1ADC1L" }, | |
! { "AIF3ADCDAT", "AIF1ADCDAT", "AIF1ADC1R" }, | |
! { "AIF3ADCDAT", "AIF1ADCDAT", "AIF1ADC2L" }, | |
! { "AIF3ADCDAT", "AIF1ADCDAT", "AIF1ADC2R" }, | |
! { "AIF3ADCDAT", "AIF2ADCDAT", "AIF2ADCL" }, | |
! { "AIF3ADCDAT", "AIF2ADCDAT", "AIF2ADCR" }, | |
! { "AIF3ADCDAT", "AIF2DACDAT", "AIF2DACL" }, | |
! { "AIF3ADCDAT", "AIF2DACDAT", "AIF2DACR" }, | |
! | |
! /* Sidetone */ | |
! { "Left Sidetone", "ADC/DMIC1", "ADCL Mux" }, | |
! { "Left Sidetone", "DMIC2", "DMIC2L" }, | |
! { "Right Sidetone", "ADC/DMIC1", "ADCR Mux" }, | |
! { "Right Sidetone", "DMIC2", "DMIC2R" }, | |
! | |
! /* Output stages */ | |
! { "Left Output Mixer", "DAC Switch", "DAC1L" }, | |
! { "Right Output Mixer", "DAC Switch", "DAC1R" }, | |
! | |
! { "SPKL", "DAC1 Switch", "DAC1L" }, | |
! { "SPKL", "DAC2 Switch", "DAC2L" }, | |
! { "SPKR", "DAC1 Switch", "DAC1R" }, | |
! { "SPKR", "DAC2 Switch", "DAC2R" }, | |
! { "Left Headphone Mux", "DAC", "DAC1L" }, | |
! { "Right Headphone Mux", "DAC", "DAC1R" }, | |
! }; | |
- /* The size in bits of the FLL divide multiplied by 10 | |
- * to allow rounding later */ | |
- #define FIXED_FLL_SIZE ((1 << 16) * 10) | |
- | |
- struct fll_div { | |
- u16 outdiv; | |
- u16 n; | |
- u16 k; | |
- u16 clk_ref_div; | |
- u16 fll_fratio; | |
- }; | |
! static int wm8994_get_fll_config(struct fll_div *fll, | |
! int freq_in, int freq_out) | |
{ | |
! u64 Kpart; | |
! unsigned int K, Ndiv, Nmod; | |
! | |
! pr_debug("FLL input=%dHz, output=%dHz\n", freq_in, freq_out); | |
! | |
! /* Scale the input frequency down to <= 13.5MHz */ | |
! fll->clk_ref_div = 0; | |
! while (freq_in > 13500000) { | |
! fll->clk_ref_div++; | |
! freq_in /= 2; | |
! if (fll->clk_ref_div > 3) | |
! return -EINVAL; | |
! } | |
! pr_debug("CLK_REF_DIV=%d, Fref=%dHz\n", fll->clk_ref_div, freq_in); | |
! | |
! /* Scale the output to give 90MHz<=Fvco<=100MHz */ | |
! fll->outdiv = 3; | |
! while (freq_out * (fll->outdiv + 1) < 90000000) { | |
! fll->outdiv++; | |
! if (fll->outdiv > 63) | |
! return -EINVAL; | |
} | |
! freq_out *= fll->outdiv + 1; | |
! pr_debug("OUTDIV=%d, Fvco=%dHz\n", fll->outdiv, freq_out); | |
! if (freq_in > 1000000) { | |
! fll->fll_fratio = 0; | |
! } else if (freq_in > 256000) { | |
! fll->fll_fratio = 1; | |
! freq_in *= 2; | |
! } else if (freq_in > 128000) { | |
! fll->fll_fratio = 2; | |
! freq_in *= 4; | |
! } else if (freq_in > 64000) { | |
! fll->fll_fratio = 3; | |
! freq_in *= 8; | |
! } else { | |
! fll->fll_fratio = 4; | |
! freq_in *= 16; | |
! } | |
! pr_debug("FLL_FRATIO=%d, Fref=%dHz\n", fll->fll_fratio, freq_in); | |
! /* Now, calculate N.K */ | |
! Ndiv = freq_out / freq_in; | |
! fll->n = Ndiv; | |
! Nmod = freq_out % freq_in; | |
! pr_debug("Nmod=%d\n", Nmod); | |
! /* Calculate fractional part - scale up so we can round. */ | |
! Kpart = FIXED_FLL_SIZE * (long long)Nmod; | |
! do_div(Kpart, freq_in); | |
! K = Kpart & 0xFFFFFFFF; | |
! if ((K % 10) >= 5) | |
! K += 5; | |
! /* Move down to proper range now rounding is done */ | |
! fll->k = K / 10; | |
! pr_debug("N=%x K=%x\n", fll->n, fll->k); | |
return 0; | |
} | |
! static int wm8994_set_fll(struct snd_soc_dai *dai, int id, int src, | |
! unsigned int freq_in, unsigned int freq_out) | |
{ | |
! struct snd_soc_codec *codec = dai->codec; | |
! struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | |
! int reg_offset, ret; | |
! struct fll_div fll; | |
! u16 reg, aif1, aif2; | |
! | |
! aif1 = snd_soc_read(codec, WM8994_AIF1_CLOCKING_1) | |
! & WM8994_AIF1CLK_ENA; | |
! | |
! aif2 = snd_soc_read(codec, WM8994_AIF2_CLOCKING_1) | |
! & WM8994_AIF2CLK_ENA; | |
! | |
! switch (id) { | |
! case WM8994_FLL1: | |
! reg_offset = 0; | |
! id = 0; | |
! break; | |
! case WM8994_FLL2: | |
! reg_offset = 0x20; | |
! id = 1; | |
! break; | |
! default: | |
! return -EINVAL; | |
! } | |
! | |
! switch (src) { | |
! case 0: | |
! /* Allow no source specification when stopping */ | |
! if (freq_out) | |
! return -EINVAL; | |
! break; | |
! case WM8994_FLL_SRC_MCLK1: | |
! case WM8994_FLL_SRC_MCLK2: | |
! case WM8994_FLL_SRC_LRCLK: | |
! case WM8994_FLL_SRC_BCLK: | |
! break; | |
! default: | |
! return -EINVAL; | |
! } | |
! /* Are we changing anything? */ | |
! if (wm8994->fll[id].src == src && | |
! wm8994->fll[id].in == freq_in && wm8994->fll[id].out == freq_out) | |
! return 0; | |
! /* If we're stopping the FLL redo the old config - no | |
! * registers will actually be written but we avoid GCC flow | |
! * analysis bugs spewing warnings. | |
! */ | |
! if (freq_out) | |
! ret = wm8994_get_fll_config(&fll, freq_in, freq_out); | |
! else | |
! ret = wm8994_get_fll_config(&fll, wm8994->fll[id].in, | |
! wm8994->fll[id].out); | |
! if (ret < 0) | |
! return ret; | |
! /* Gate the AIF clocks while we reclock */ | |
! snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, | |
! WM8994_AIF1CLK_ENA, 0); | |
! snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, | |
! WM8994_AIF2CLK_ENA, 0); | |
! | |
! /* We always need to disable the FLL while reconfiguring */ | |
! snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_1 + reg_offset, | |
! WM8994_FLL1_ENA, 0); | |
! | |
! reg = (fll.outdiv << WM8994_FLL1_OUTDIV_SHIFT) | | |
! (fll.fll_fratio << WM8994_FLL1_FRATIO_SHIFT); | |
! snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_2 + reg_offset, | |
! WM8994_FLL1_OUTDIV_MASK | | |
! WM8994_FLL1_FRATIO_MASK, reg); | |
! | |
! snd_soc_write(codec, WM8994_FLL1_CONTROL_3 + reg_offset, fll.k); | |
! | |
! snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_4 + reg_offset, | |
! WM8994_FLL1_N_MASK, | |
! fll.n << WM8994_FLL1_N_SHIFT); | |
! | |
! snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_5 + reg_offset, | |
! WM8994_FLL1_REFCLK_DIV_MASK | | |
! WM8994_FLL1_REFCLK_SRC_MASK, | |
! (fll.clk_ref_div << WM8994_FLL1_REFCLK_DIV_SHIFT) | | |
! (src - 1)); | |
! | |
! /* Enable (with fractional mode if required) */ | |
! if (freq_out) { | |
! if (fll.k) | |
! reg = WM8994_FLL1_ENA | WM8994_FLL1_FRAC; | |
else | |
! reg = WM8994_FLL1_ENA; | |
! snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_1 + reg_offset, | |
! WM8994_FLL1_ENA | WM8994_FLL1_FRAC, | |
! reg); | |
! } | |
! | |
! wm8994->fll[id].in = freq_in; | |
! wm8994->fll[id].out = freq_out; | |
! wm8994->fll[id].src = src; | |
! | |
! /* Enable any gated AIF clocks */ | |
! snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, | |
! WM8994_AIF1CLK_ENA, aif1); | |
! snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, | |
! WM8994_AIF2CLK_ENA, aif2); | |
! | |
! configure_clock(codec); | |
! | |
! return 0; | |
! } | |
! | |
! static int wm8994_set_dai_sysclk(struct snd_soc_dai *dai, | |
! int clk_id, unsigned int freq, int dir) | |
! { | |
! struct snd_soc_codec *codec = dai->codec; | |
! struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | |
! | |
! switch (dai->id) { | |
! case 1: | |
! case 2: | |
! break; | |
! | |
! default: | |
! /* AIF3 shares clocking with AIF1/2 */ | |
! return -EINVAL; | |
} | |
! switch (clk_id) { | |
! case WM8994_SYSCLK_MCLK1: | |
! wm8994->sysclk[dai->id - 1] = WM8994_SYSCLK_MCLK1; | |
! wm8994->mclk[0] = freq; | |
! dev_dbg(dai->dev, "AIF%d using MCLK1 at %uHz\n", | |
! dai->id, freq); | |
! break; | |
! case WM8994_SYSCLK_MCLK2: | |
! /* TODO: Set GPIO AF */ | |
! wm8994->sysclk[dai->id - 1] = WM8994_SYSCLK_MCLK2; | |
! wm8994->mclk[1] = freq; | |
! dev_dbg(dai->dev, "AIF%d using MCLK2 at %uHz\n", | |
! dai->id, freq); | |
! break; | |
! case WM8994_SYSCLK_FLL1: | |
! wm8994->sysclk[dai->id - 1] = WM8994_SYSCLK_FLL1; | |
! dev_dbg(dai->dev, "AIF%d using FLL1\n", dai->id); | |
! break; | |
! case WM8994_SYSCLK_FLL2: | |
! wm8994->sysclk[dai->id - 1] = WM8994_SYSCLK_FLL2; | |
! dev_dbg(dai->dev, "AIF%d using FLL2\n", dai->id); | |
! break; | |
! default: | |
! return -EINVAL; | |
} | |
! configure_clock(codec); | |
return 0; | |
} | |
static int wm8994_set_bias_level(struct snd_soc_codec *codec, | |
enum snd_soc_bias_level level) | |
{ | |
switch (level) { | |
case SND_SOC_BIAS_ON: | |
- break; | |
- | |
case SND_SOC_BIAS_PREPARE: | |
! /* VMID=2x40k */ | |
snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_1, | |
WM8994_VMID_SEL_MASK, 0x2); | |
break; | |
case SND_SOC_BIAS_STANDBY: | |
if (codec->bias_level == SND_SOC_BIAS_OFF) { | |
! /* Tweak DC servo configuration for improved | |
! * performance. */ | |
! snd_soc_write(codec, 0x102, 0x3); | |
! snd_soc_write(codec, 0x56, 0x3); | |
! snd_soc_write(codec, 0x102, 0); | |
! | |
! /* Discharge LINEOUT1 & 2 */ | |
! snd_soc_update_bits(codec, WM8994_ANTIPOP_1, | |
! WM8994_LINEOUT1_DISCH | | |
! WM8994_LINEOUT2_DISCH, | |
! WM8994_LINEOUT1_DISCH | | |
! WM8994_LINEOUT2_DISCH); | |
! | |
! /* Startup bias, VMID ramp & buffer */ | |
snd_soc_update_bits(codec, WM8994_ANTIPOP_2, | |
WM8994_STARTUP_BIAS_ENA | | |
WM8994_VMID_BUF_ENA | | |
! WM8994_VMID_RAMP_MASK, | |
WM8994_STARTUP_BIAS_ENA | | |
WM8994_VMID_BUF_ENA | | |
! (0x11 << WM8994_VMID_RAMP_SHIFT)); | |
! | |
! /* Main bias enable, VMID=2x40k */ | |
snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_1, | |
! WM8994_BIAS_ENA | | |
! WM8994_VMID_SEL_MASK, | |
WM8994_BIAS_ENA | 0x2); | |
! msleep(20); | |
} | |
! /* VMID=2x500k */ | |
snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_1, | |
WM8994_VMID_SEL_MASK, 0x4); | |
break; | |
case SND_SOC_BIAS_OFF: | |
! if (codec->bias_level == SND_SOC_BIAS_STANDBY) { | |
! /* Switch over to startup biases */ | |
! snd_soc_update_bits(codec, WM8994_ANTIPOP_2, | |
! WM8994_BIAS_SRC | | |
! WM8994_STARTUP_BIAS_ENA | | |
! WM8994_VMID_BUF_ENA | | |
! WM8994_VMID_RAMP_MASK, | |
! WM8994_BIAS_SRC | | |
! WM8994_STARTUP_BIAS_ENA | | |
! WM8994_VMID_BUF_ENA | | |
! (1 << WM8994_VMID_RAMP_SHIFT)); | |
! | |
! /* Disable main biases */ | |
! snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_1, | |
! WM8994_BIAS_ENA | | |
! WM8994_VMID_SEL_MASK, 0); | |
! | |
! /* Discharge line */ | |
! snd_soc_update_bits(codec, WM8994_ANTIPOP_1, | |
! WM8994_LINEOUT1_DISCH | | |
! WM8994_LINEOUT2_DISCH, | |
! WM8994_LINEOUT1_DISCH | | |
! WM8994_LINEOUT2_DISCH); | |
! | |
! msleep(5); | |
! /* Switch off startup biases */ | |
! snd_soc_update_bits(codec, WM8994_ANTIPOP_2, | |
! WM8994_BIAS_SRC | | |
! WM8994_STARTUP_BIAS_ENA | | |
! WM8994_VMID_BUF_ENA | | |
! WM8994_VMID_RAMP_MASK, 0); | |
! } | |
break; | |
} | |
codec->bias_level = level; | |
return 0; | |
} | |
! static int wm8994_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) | |
{ | |
! struct snd_soc_codec *codec = dai->codec; | |
! int ms_reg; | |
! int aif1_reg; | |
! int ms = 0; | |
! int aif1 = 0; | |
! | |
! switch (dai->id) { | |
! case 1: | |
! ms_reg = WM8994_AIF1_MASTER_SLAVE; | |
! aif1_reg = WM8994_AIF1_CONTROL_1; | |
! break; | |
! case 2: | |
! ms_reg = WM8994_AIF2_MASTER_SLAVE; | |
! aif1_reg = WM8994_AIF2_CONTROL_1; | |
break; | |
default: | |
return -EINVAL; | |
} | |
--- 1,1388 ---- | |
! /* | |
! * wm8994.c -- WM8994 ALSA Soc Audio driver | |
* | |
! * Copyright 2010 Wolfson Microelectronics PLC. | |
* | |
! * This program is free software; you can redistribute it and/or modify it | |
! * under the terms of the GNU General Public License as published by the | |
! * Free Software Foundation; either version 2 of the License, or (at your | |
! * option) any later version. | |
* | |
+ * Notes: | |
+ * The WM8994 is a multichannel codec with S/PDIF support, featuring six | |
+ * DAC channels and two ADC channels. | |
* | |
! * Currently only the primary audio interface is supported - S/PDIF and | |
! * the secondary audio interfaces are not. | |
*/ | |
#include <linux/module.h> | |
! #include <linux/moduleparam.h> | |
! #include <linux/kernel.h> | |
#include <linux/init.h> | |
#include <linux/delay.h> | |
#include <linux/pm.h> | |
#include <linux/i2c.h> | |
#include <linux/slab.h> | |
+ #include <linux/platform_device.h> | |
#include <sound/core.h> | |
#include <sound/pcm.h> | |
#include <sound/pcm_params.h> | |
#include <sound/soc.h> | |
#include <sound/soc-dapm.h> | |
#include <sound/tlv.h> | |
! #include <sound/initval.h> | |
! #include <asm/div64.h> | |
! #include <asm/io.h> | |
! #include <plat/map-base.h> | |
! #include <mach/regs-clock.h> | |
#include "wm8994.h" | |
! #if defined ATTACH_ADDITINAL_PCM_DRIVER | |
! #include "../s3c24xx/s3c-pcmdev.h" //define USE_INFINIEON_EC_FOR_VT | |
! #endif | |
! //#define WM8994_VERSION "0.1" | |
! #define SUBJECT "wm8994.c" | |
! #if defined(CONFIG_VIDEO_TV20) && defined(CONFIG_SND_S5P_WM8994_MASTER) | |
! #define HDMI_USE_AUDIO | |
! #endif | |
! #ifdef CONFIG_SND_S5P_RP | |
! extern volatile int s5p_rp_is_running; | |
! #endif | |
! //------------------------------------------------ | |
! // Definitions of clock related. | |
! //------------------------------------------------ | |
! static struct { | |
! int ratio; | |
! int clk_sys_rate; | |
! } clk_sys_rates[] = { | |
! { 64, 0 }, | |
! { 128, 1 }, | |
! { 192, 2 }, | |
! { 256, 3 }, | |
! { 384, 4 }, | |
! { 512, 5 }, | |
! { 768, 6 }, | |
! { 1024, 7 }, | |
! { 1408, 8 }, | |
! { 1536, 9 }, | |
}; | |
! static struct { | |
! int rate; | |
! int sample_rate; | |
! } sample_rates[] = { | |
! { 8000, 0 }, | |
! { 11025, 1 }, | |
! { 12000, 2 }, | |
! { 16000, 3 }, | |
! { 22050, 4 }, | |
! { 24000, 5 }, | |
! { 32000, 6 }, | |
! { 44100, 7 }, | |
! { 48000, 8 }, | |
! { 88200, 9 }, | |
! { 96000, 10 }, | |
! }; | |
! static struct { | |
! int div; /* *10 due to .5s */ | |
! int bclk_div; | |
! } bclk_divs[] = { | |
! #if 0 | |
! { 10, 0 }, | |
! { 15, 1 }, | |
! { 20, 2 }, | |
! { 30, 3 }, | |
! { 40, 4 }, | |
! { 55, 5 }, | |
! { 60, 6 }, | |
! { 80, 7 }, | |
! { 110, 8 }, | |
! { 120, 9 }, | |
! { 160, 10 }, | |
! { 220, 11 }, | |
! { 240, 12 }, | |
! { 320, 13 }, | |
! { 440, 14 }, | |
! { 480, 15 }, | |
! #endif | |
! { 1, 0 }, | |
! { 2, 1 }, | |
! { 4, 2 }, | |
! { 6, 3 }, | |
! { 8, 4 }, | |
! { 12, 5 }, | |
! { 16, 6 }, | |
! { 24, 7 }, | |
! { 32, 8 }, | |
! { 48, 9 }, | |
}; | |
! #if defined ATTACH_ADDITINAL_PCM_DRIVER | |
! int vtCallActive = 0; | |
! #endif | |
! static const char *playback_path[] = { "OFF", "RCV", "SPK", "HP", "HP_NO_MIC", "BT", "SPK_HP", "RING_SPK", "RING_HP", "RING_NO_MIC", "RING_SPK_HP", "EXTRA_DOCK_SPEAKER", "TV_OUT", "HDMI_TV_OUT", "HDMI_SPK", "HDMI_DUAL" }; | |
! static const char *voicecall_path[] = { "OFF", "RCV", "SPK", "HP", "HP_NO_MIC", "BT", }; | |
! static const char *mic_path[] = {"Main Mic", "Hands Free Mic", "BT Sco Mic", "MIC OFF" }; | |
! | |
! static const char *fmradio_path[] = { "FMR_OFF", "FMR_SPK", "FMR_HP", "FMR_SPK_MIX", "FMR_HP_MIX", "FMR_DUAL_MIX"}; | |
! static const char *codec_tuning_control[] = {"OFF", "ON"}; | |
! static const char *codec_status_control[] = {"FMR_VOL_0", "FMR_VOL_1", "FMR_OFF", "REC_OFF", "REC_ON"}; | |
! static const char * voice_record_path[] = {"CALL_RECORDING_OFF", "CALL_RECORDING_MAIN", "CALL_RECORDING_SUB"}; | |
! static const char * call_recording_channel[] ={"CH_OFF"," CH_UPLINK","CH_DOWNLINK","CH_UDLINK"}; | |
! #ifdef CONFIG_TARGET_LOCALE_KOR | |
! static const char *voipcall_path[] = { "OFF", "RCV", "SPK", "HP", "HP_NO_MIC", "BT", }; | |
! #endif | |
! //------------------------------------------------ | |
! // Definitions of sound path | |
! //------------------------------------------------ | |
! select_route universal_wm8994_playback_paths[] = | |
! { | |
! wm8994_set_off, | |
! wm8994_set_playback_receiver, | |
! wm8994_set_playback_speaker, | |
! wm8994_set_playback_headset, | |
! wm8994_set_playback_headset, | |
! wm8994_set_playback_bluetooth, | |
! wm8994_set_playback_speaker_headset, | |
! wm8994_set_playback_extra_dock_speaker, | |
! wm8994_set_playback_hdmi_tvout, | |
! wm8994_set_playback_speaker_hdmitvout, | |
! wm8994_set_playback_speakerheadset_hdmitvout | |
! }; | |
! | |
! select_route universal_wm8994_voicecall_paths[] = | |
! { | |
! wm8994_set_off, | |
! wm8994_set_voicecall_receiver, | |
! wm8994_set_voicecall_speaker, | |
! wm8994_set_voicecall_headset, | |
! wm8994_set_voicecall_headphone, | |
! wm8994_set_voicecall_bluetooth | |
! }; | |
! | |
! #ifdef CONFIG_TARGET_LOCALE_KOR | |
! select_route universal_wm8994_voipcall_paths[] = | |
! { | |
! wm8994_set_off, | |
! wm8994_set_voipcall_receiver, | |
! wm8994_set_voipcall_speaker, | |
! wm8994_set_voipcall_headset, | |
! wm8994_set_voipcall_headphone, | |
! wm8994_set_voipcall_bluetooth | |
! }; | |
! #endif | |
! select_mic_route universal_wm8994_mic_paths[] = | |
! { | |
! wm8994_record_main_mic, | |
! wm8994_record_headset_mic, | |
! wm8994_record_bluetooth | |
}; | |
! //------------------------------------------------ | |
! // Implementation of I2C functions | |
! //------------------------------------------------ | |
! static unsigned int wm8994_read_hw(struct snd_soc_codec *codec, u16 reg) | |
{ | |
! struct i2c_msg xfer[2]; | |
! u16 data; | |
! int ret; | |
! struct i2c_client *i2c = codec->control_data; | |
! data = ((reg & 0xff00) >> 8) | ((reg & 0xff) << 8); | |
! | |
! /* Write register */ | |
! xfer[0].addr = i2c->addr; | |
! xfer[0].flags = 0; | |
! xfer[0].len = 2; //1 | |
! //xfer[0].buf = ® | |
! xfer[0].buf = (void *)&data; | |
! | |
! /* Read data */ | |
! xfer[1].addr = i2c->addr; | |
! xfer[1].flags = I2C_M_RD; | |
! xfer[1].len = 2; | |
! xfer[1].buf = (u8 *)&data; | |
! ret = i2c_transfer(i2c->adapter, xfer, 2); | |
! if (ret != 2) { | |
! dev_err(codec->dev, "Failed to read 0x%x: %d\n", reg, ret); | |
return 0; | |
} | |
+ | |
+ return (data >> 8) | ((data & 0xff) << 8); | |
} | |
! int wm8994_write(struct snd_soc_codec *codec, unsigned int reg, unsigned int value) | |
{ | |
! u8 data[4]; | |
! int ret; | |
! //BUG_ON(reg > WM8993_MAX_REGISTER); | |
! /* data is | |
! * D15..D9 WM8993 register offset | |
! * D8...D0 register data | |
! */ | |
! data[0] = (reg & 0xff00 ) >> 8; | |
! data[1] = reg & 0x00ff; | |
! data[2] = value >> 8; | |
! data[3] = value & 0x00ff; | |
! ret = codec->hw_write(codec->control_data, data, 4); | |
! if (ret == 4) { | |
! return 0; | |
! } | |
! else { | |
! dev_err(codec->dev, "Failed to write 0x%x: %d\n", reg, ret); | |
! return ret; | |
! } | |
! } | |
! inline unsigned int wm8994_read(struct snd_soc_codec *codec, unsigned int reg) | |
! { | |
! return wm8994_read_hw(codec, reg); | |
} | |
! //------------------------------------------------ | |
! // Functions related volume. | |
! //------------------------------------------------ | |
! static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1); | |
! | |
! static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
{ | |
! int ret; | |
! u16 val; | |
! | |
! struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! struct soc_mixer_control *mc = | |
! (struct soc_mixer_control *)kcontrol->private_value; | |
! int reg = mc->reg; | |
! DEBUG_LOG(""); | |
! ret = snd_soc_put_volsw_2r(kcontrol, ucontrol); | |
! if (ret < 0) | |
! return ret; | |
! | |
! /* now hit the volume update bits (always bit 8) */ | |
! val = wm8994_read(codec, reg); | |
! | |
! return wm8994_write(codec, reg, val | 0x0100); | |
} | |
! static int wm899x_inpga_put_volsw_vu(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
{ | |
! struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! struct soc_mixer_control *mc = | |
! (struct soc_mixer_control *)kcontrol->private_value; | |
! int reg = mc->reg; | |
! int ret; | |
! u16 val; | |
! ret = snd_soc_put_volsw(kcontrol, ucontrol); | |
! if (ret < 0) | |
! return ret; | |
! /* now hit the volume update bits (always bit 8) */ | |
! val = wm8994_read(codec, reg); | |
! return wm8994_write(codec, reg, val | 0x0100); | |
! } | |
! //------------------------------------------------ | |
! // Implementation of sound path | |
! //------------------------------------------------ | |
! static int wm8994_get_mic_path(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
! { | |
! #if 0 | |
! DEBUG_LOG(""); | |
+ ucontrol->value.integer.value[0] = wm8994_mic_path; | |
+ return 0; | |
+ #endif | |
return 0; | |
} | |
! static int wm8994_set_mic_path(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
{ | |
! struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! DEBUG_LOG(""); | |
! wm8994->codec_state |= CAPTURE_ACTIVE; | |
! if (ucontrol->value.integer.value[0] == 0) // MAIN MIC | |
! { | |
! wm8994->rec_path = MAIN; | |
! } | |
! else if (ucontrol->value.integer.value[0] == 1) // SUB MIC | |
! { | |
! wm8994->rec_path = SUB; | |
! } | |
! else if (ucontrol->value.integer.value[0] == 2) // BT Voice Command | |
! { | |
! wm8994->rec_path = BT_REC; | |
! wm8994->universal_mic_path[wm8994->rec_path](codec); | |
! return 0; | |
! } | |
else | |
! { | |
! return -EINVAL; | |
! } | |
! if(wm8994->rec_path == MAIN) | |
! { | |
! audio_ctrl_mic_bias_gpio(1); | |
! } | |
! else //SUB | |
! { | |
! audio_ctrl_mic_bias_gpio(0); | |
! audio_ctrl_earmic_bias_gpio(1); | |
! } | |
! wm8994->universal_mic_path[wm8994->rec_path ](codec); | |
return 0; | |
} | |
! static int wm8994_get_playback_path(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
{ | |
! #if 0 | |
! DEBUG_LOG(""); | |
! int i = 0; | |
! while(playback_path[i] != NULL) { | |
! if(!strcmp(playback_path[i], kcontrol->id.name) && ((wm8994_path >> 4) == i)) { | |
! ucontrol->value.integer.value[0] = wm8994_path & 0xf; | |
! break; | |
! } | |
! i++; | |
! } | |
! #endif | |
! return 0; | |
} | |
! static int wm8994_set_playback_path(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
{ | |
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! struct soc_enum *mc = | |
! (struct soc_enum *)kcontrol->private_value; | |
! | |
! int val; | |
! | |
! // Get path value | |
! int path_num = ucontrol->value.integer.value[0]; | |
! | |
! #ifdef CONFIG_SND_S5P_RP | |
! if(s5p_rp_is_running | |
! && (path_num == wm8994->cur_path) | |
! && (wm8994->codec_state == PLAYBACK_ACTIVE) | |
! ) | |
! { | |
! DEBUG_LOG("s5p_rp_is_running : Skip to set path\n"); | |
! return 0; | |
! } | |
! #endif | |
! //select the requested path from the array of function pointers | |
! switch(path_num) | |
! { | |
! case PLAYBACK_OFF : | |
! DEBUG_LOG("Switching off output path"); | |
! break; | |
! case RCV: | |
! case SPK: | |
! case HP: | |
! case HP_NO_MIC: | |
! case BT: | |
! case SPK_HP : | |
! DEBUG_LOG("routing to %s", mc->texts[path_num] ); | |
! wm8994->ringtone_active = OFF; | |
! break; | |
! case RING_SPK : | |
! case RING_HP : | |
! case RING_NO_MIC : | |
! DEBUG_LOG("routing to %s", mc->texts[path_num] ); | |
! wm8994->ringtone_active = ON; | |
! path_num -= 5; | |
! break; | |
! case RING_SPK_HP : | |
! DEBUG_LOG("routing to %s", mc->texts[path_num] ); | |
! wm8994->ringtone_active = ON; | |
! path_num -= 4; | |
! break; | |
! | |
! case EXTRA_DOCK_SPEAKER: | |
! case TV_OUT: | |
! DEBUG_LOG("routing to %s", mc->texts[path_num] ); | |
! wm8994->ringtone_active = OFF; | |
! path_num -= 4; | |
! break; | |
! | |
! case HDMI_TV_OUT: | |
! case HDMI_SPK: | |
! case HDMI_DUAL: | |
! DEBUG_LOG("routing to %s", mc->texts[path_num] ); | |
! wm8994->ringtone_active = OFF; | |
! path_num -= 5; | |
! break; | |
! | |
! default: | |
! DEBUG_LOG_ERR("The audio path[%d] does not exists!!", path_num); | |
! return -ENODEV; | |
! break; | |
! } | |
! wm8994->codec_state |= PLAYBACK_ACTIVE; | |
! if(wm8994->codec_state & FMRADIO_ACTIVE) | |
! { | |
! wm8994->codec_state &= ~(FMRADIO_ACTIVE); | |
! wm8994->fmr_mix_path = FMR_MIX_OFF; | |
! wm8994->fmradio_path = FMR_OFF; | |
! } | |
! if(wm8994->codec_state & CALL_ACTIVE) | |
! { | |
! wm8994->codec_state &= ~(CALL_ACTIVE); | |
! //For avoiding pop noise during end of call. | |
! val = wm8994_read(codec, WM8994_CLOCKING_1); | |
! val &= ~(WM8994_DSP_FS2CLK_ENA_MASK | WM8994_SYSCLK_SRC_MASK); | |
! wm8994_write(codec, WM8994_CLOCKING_1, val); | |
! } | |
! if(wm8994->testmode_config_flag == SEC_TEST_PBA_DUAL_SPK && (path_num == HP || path_num == HP_NO_MIC)) | |
! { | |
! DEBUG_LOG("SEC_TEST_PBA_DUAL_SPK : forced set path to SPK"); | |
! path_num = SPK; | |
! } | |
+ wm8994->cur_path = path_num; | |
+ wm8994->universal_playback_path[wm8994->cur_path](codec); | |
+ | |
return 0; | |
} | |
! static int wm8994_get_call_path(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
{ | |
! #if 0 | |
! DEBUG_LOG(""); | |
+ while(playback_path[i] != NULL) { | |
+ if(!strcmp(playback_path[i], kcontrol->id.name) && ((wm8994_path >> 4) == i)) { | |
+ ucontrol->value.integer.value[0] = wm8994_path & 0xf; | |
+ break; | |
+ } | |
+ i++; | |
+ } | |
+ #endif | |
return 0; | |
} | |
! static int wm8994_set_call_path(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
{ | |
! struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! struct soc_enum *mc = | |
! (struct soc_enum *)kcontrol->private_value; | |
! | |
! // Get path value | |
! int path_num = ucontrol->value.integer.value[0]; | |
! | |
! if(strcmp( mc->texts[path_num], voicecall_path[path_num]) ) | |
! { | |
! DEBUG_LOG_ERR("Unknown path %s", mc->texts[path_num] ); | |
! return -ENODEV; | |
! } | |
! | |
! switch(path_num) | |
! { | |
! case PLAYBACK_OFF : | |
! DEBUG_LOG("Switching off output path"); | |
! break; | |
! | |
! case SPK : | |
! case RCV : | |
! case HP: | |
! case HP_NO_MIC: | |
! case BT : | |
! DEBUG_LOG("routing voice path to %s", mc->texts[path_num] ); | |
! break; | |
! | |
! default: | |
! DEBUG_LOG_ERR("The audio path[%d] does not exists!!", path_num); | |
! return -ENODEV; | |
! break; | |
} | |
! if(wm8994->cur_path != path_num || !(wm8994->codec_state & CALL_ACTIVE)) | |
! { | |
! wm8994->codec_state |= CALL_ACTIVE; | |
! wm8994->cur_path = path_num; | |
! wm8994->universal_voicecall_path[wm8994->cur_path](codec); | |
! } | |
! else | |
! { | |
! int val; | |
! | |
! val = wm8994_read(codec, WM8994_AIF1_DAC1_FILTERS_1); | |
! val &= ~(WM8994_AIF1DAC1_MUTE_MASK); | |
! val |= (WM8994_AIF1DAC1_UNMUTE); | |
! wm8994_write(codec, WM8994_AIF1_DAC1_FILTERS_1, val); | |
} | |
! return 0; | |
! } | |
! static int wm8994_get_fmradio_path(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
! { | |
! #if 0 | |
! int pathnum = ucontrol->value.integer.value[0]; | |
! DEBUG_LOG("wm8994_get_fmradio_path : %d", pathnum); | |
! #endif | |
! return 0; | |
} | |
! static int wm8994_set_fmradio_path(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
{ | |
! struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! struct soc_enum *mc = | |
! (struct soc_enum *)kcontrol->private_value; | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! | |
! int path_num = ucontrol->value.integer.value[0]; | |
! | |
! if(strcmp( mc->texts[path_num], fmradio_path[path_num]) ) | |
! { | |
! DEBUG_LOG_ERR("Unknown path %s", mc->texts[path_num] ); | |
! } | |
! | |
! if(path_num == wm8994->fmradio_path) | |
! { | |
! int val; | |
! | |
! DEBUG_LOG("%s is already set. skip to set path..", mc->texts[path_num]); | |
! | |
! val = wm8994_read(codec, WM8994_AIF1_DAC1_FILTERS_1); | |
! val &= ~(WM8994_AIF1DAC1_MUTE_MASK); | |
! val |= (WM8994_AIF1DAC1_UNMUTE); | |
! wm8994_write(codec, WM8994_AIF1_DAC1_FILTERS_1, val); | |
! | |
return 0; | |
! } | |
! wm8994->codec_state |= FMRADIO_ACTIVE; | |
! | |
! switch(path_num) | |
! { | |
! case FMR_OFF: | |
! DEBUG_LOG("Switching off output path"); | |
! wm8994_disable_fmradio_path(codec, FMR_OFF); | |
! break; | |
! | |
! case FMR_SPK: | |
! DEBUG_LOG("routing fmradio path to %s", mc->texts[path_num] ); | |
! wm8994->fmr_mix_path = FMR_MIX_OFF; | |
! wm8994_set_fmradio_speaker(codec); | |
! break; | |
! case FMR_HP: | |
! DEBUG_LOG("routing fmradio path to %s", mc->texts[path_num] ); | |
! wm8994->fmr_mix_path = FMR_MIX_OFF; | |
! wm8994_set_fmradio_headset(codec); | |
! break; | |
! case FMR_SPK_MIX: | |
! DEBUG_LOG("routing fmradio path to %s", mc->texts[path_num]); | |
! if(wm8994->fmr_mix_path != FMR_MIX_SPK) | |
! { | |
! wm8994->fmr_mix_path = FMR_MIX_SPK; | |
! wm8994_set_fmradio_speaker_mix(codec); | |
! } | |
! else | |
! { | |
! wm8994_write(codec,WM8994_AIF1_DAC1_FILTERS_1, WM8994_AIF1DAC1_UNMUTE); | |
! DEBUG_LOG("FMR_MIX_SPK is already set!!! Skip path!!"); | |
! } | |
! break; | |
! | |
! case FMR_HP_MIX: | |
! DEBUG_LOG("routing fmradio path to %s", mc->texts[path_num]); | |
! | |
! if(wm8994->fmr_mix_path != FMR_MIX_HP) | |
! { | |
! wm8994->fmr_mix_path = FMR_MIX_HP; | |
! wm8994_set_fmradio_headset_mix(codec); | |
! } | |
! else | |
! { | |
! wm8994_write(codec,WM8994_AIF1_DAC1_FILTERS_1, WM8994_AIF1DAC1_UNMUTE); | |
! DEBUG_LOG("FMR_MIX_HP is already set!!! Skip path!!"); | |
! } | |
! break; | |
! case FMR_DUAL_MIX : | |
! DEBUG_LOG("routing fmradio path to %s", mc->texts[path_num]); | |
! wm8994->fmr_mix_path = FMR_DUAL_MIX; | |
! wm8994_set_fmradio_speaker_headset_mix(codec); | |
! break; | |
+ default: | |
+ DEBUG_LOG_ERR("The audio path[%d] does not exists!!", path_num); | |
+ return -ENODEV; | |
+ break; | |
+ } | |
+ | |
return 0; | |
} | |
! static int wm8994_get_codec_tuning(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
! { | |
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! DEBUG_LOG("Get testmode_config_flag = [%d]", wm8994->testmode_config_flag); | |
! ucontrol->value.integer.value[0] = wm8994->testmode_config_flag; | |
return 0; | |
} | |
! static int wm8994_set_codec_tuning(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
{ | |
! struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! int control_flag = ucontrol->value.integer.value[0]; | |
! DEBUG_LOG("Set testmode_config_flag =[%d]", control_flag); | |
! | |
! wm8994->testmode_config_flag = control_flag; | |
return 0; | |
} | |
! static int wm8994_get_codec_status(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
! { | |
! // struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! // struct wm8994_priv *wm8994 = codec->drvdata; | |
! return 0; | |
} | |
! static int wm8994_set_codec_status(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
{ | |
! struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! struct snd_soc_dai *codec_dai = codec->dai; | |
! struct snd_pcm_substream tempstream; | |
! int control_data = ucontrol->value.integer.value[0]; | |
! //DEBUG_LOG("Received control_data = [0x%X]", control_data); | |
! switch(control_data) | |
! { | |
! // FM Radio Volume zero control | |
! case CMD_FMR_INPUT_DEACTIVE : | |
! case CMD_FMR_INPUT_ACTIVE : | |
! if(wm8994->codec_state & FMRADIO_ACTIVE) | |
! wm8994_set_fmradio_common(codec, control_data); | |
! break; | |
! | |
! // To remove pop up noise for FM radio. | |
! case CMD_FMR_FLAG_CLEAR: | |
! DEBUG_LOG("FM Radio Flag is clear!!"); | |
! wm8994->codec_state &= ~(FMRADIO_ACTIVE); | |
! break; | |
! case CMD_FMR_END : | |
! DEBUG_LOG("Call shutdown function forcely for FM radio!!"); | |
! wm8994->codec_state &= ~(FMRADIO_ACTIVE); | |
! tempstream.stream = SNDRV_PCM_STREAM_PLAYBACK; | |
! wm8994_shutdown(&tempstream, codec_dai); | |
! break; | |
! // For voice recognition. | |
! case CMD_RECOGNITION_DEACTIVE : | |
! DEBUG_LOG("Recognition Gain is deactivated!!"); | |
! wm8994->recognition_active = REC_OFF; | |
! break; | |
! case CMD_RECOGNITION_ACTIVE : | |
! DEBUG_LOG("Recognition Gain is activated!!"); | |
! wm8994->recognition_active = REC_ON; | |
! break; | |
! // To remove pop up noise for Call. | |
! case CMD_CALL_FLAG_CLEAR: | |
! DEBUG_LOG("Call Flag is clear!!"); | |
! wm8994->codec_state &= ~(CALL_ACTIVE); | |
! break; | |
! case CMD_CALL_END : | |
! DEBUG_LOG("Call shutdown function forcely for call!!"); | |
! wm8994->codec_state &= ~(CALL_ACTIVE); | |
! tempstream.stream = SNDRV_PCM_STREAM_PLAYBACK; | |
! wm8994_shutdown(&tempstream, codec_dai); | |
! break; | |
! #ifdef FEATURE_VSUITE_RECOGNITION | |
! // For vsuite voice recognition. | |
! case CMD_VSUITE_RECOGNITION_DEACTIVE : | |
! DEBUG_LOG("VSuite recognition Gain is deactivated!!"); | |
! wm8994->vsuite_recognition_active = REC_OFF; | |
! break; | |
! case CMD_VSUITE_RECOGNITION_ACTIVE : | |
! DEBUG_LOG("VSuite recognition Gain is activated!!"); | |
! wm8994->vsuite_recognition_active = REC_ON; | |
! break; | |
! #endif | |
! default : | |
! break; | |
! } | |
! | |
! return 0; | |
! } | |
! static int wm8994_get_voice_recording_ch(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
! { | |
! //DEBUG_LOG(""); | |
return 0; | |
} | |
! static int wm8994_set_voice_recording_ch(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
! { | |
! struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! int channel = ucontrol->value.integer.value[0]; | |
! wm8994 ->call_record_ch = channel; | |
! DEBUG_LOG("control_data = [0x%X]", channel); | |
! switch(channel) | |
! { | |
! case CH_OFF: | |
! wm8994 ->call_record_path = CALL_RECORDING_OFF; | |
! wm8994_set_voicecall_record_off(codec); | |
! break; | |
! case CH_UPLINK: | |
! case CH_DOWNLINK: | |
! case CH_UDLINK: | |
! break; | |
! | |
! default : | |
! break; | |
! } | |
! | |
! return 0; | |
! | |
} | |
! static int wm8994_get_voice_call_recording(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
! { | |
! //DEBUG_LOG(""); | |
! return 0; | |
! } | |
! static int wm8994_set_voice_call_recording(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
! { | |
! struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! int path_num = ucontrol->value.integer.value[0]; | |
! DEBUG_LOG("control_data = [0x%X]", path_num); | |
! wm8994 ->call_record_path = path_num; | |
! switch(path_num) | |
! { | |
! case CALL_RECORDING_OFF : | |
! break; | |
! case CALL_RECORDING_MAIN : | |
! case CALL_RECORDING_SUB : | |
! wm8994_set_voicecall_record(codec, (int)wm8994 ->call_record_ch); | |
! break; | |
! | |
! default : | |
! break; | |
! } | |
! | |
! return 0; | |
! | |
! } | |
! #ifdef CONFIG_TARGET_LOCALE_KOR | |
! static int wm8994_get_voip_call_path(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
! { | |
! #if 0 | |
! DEBUG_LOG(""); | |
! while(playback_path[i] != NULL) { | |
! if(!strcmp(playback_path[i], kcontrol->id.name) && ((wm8994_path >> 4) == i)) { | |
! ucontrol->value.integer.value[0] = wm8994_path & 0xf; | |
! break; | |
! } | |
! i++; | |
! } | |
! #endif | |
! return 0; | |
! } | |
! static int wm8994_set_voip_call_path(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
! { | |
! struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! struct soc_enum *mc = | |
! (struct soc_enum *)kcontrol->private_value; | |
! | |
! // Get path value | |
! int path_num = ucontrol->value.integer.value[0]; | |
! | |
! if(strcmp( mc->texts[path_num], voipcall_path[path_num]) ) | |
! { | |
! DEBUG_LOG_ERR("Unknown path %s", mc->texts[path_num] ); | |
! return -ENODEV; | |
! } | |
! | |
! switch(path_num) | |
! { | |
! case PLAYBACK_OFF : | |
! DEBUG_LOG("Switching off output path"); | |
! break; | |
! | |
! case SPK : | |
! case RCV : | |
! case HP: | |
! case HP_NO_MIC: | |
! case BT : | |
! DEBUG_LOG("routing voice path to %s", mc->texts[path_num] ); | |
! break; | |
! | |
! default: | |
! DEBUG_LOG_ERR("The audio path[%d] does not exists!!", path_num); | |
! return -ENODEV; | |
! break; | |
! } | |
! if(wm8994->cur_path != path_num || !(wm8994->codec_state & CALL_ACTIVE)) | |
! { | |
! wm8994->codec_state |= CALL_ACTIVE; | |
! wm8994->cur_path = path_num; | |
! wm8994->universal_voipcall_path[wm8994->cur_path](codec); | |
! } | |
! else | |
! { | |
! int val; | |
! | |
! val = wm8994_read(codec, WM8994_AIF1_DAC1_FILTERS_1); | |
! val &= ~(WM8994_AIF1DAC1_MUTE_MASK); | |
! val |= (WM8994_AIF1DAC1_UNMUTE); | |
! wm8994_write(codec, WM8994_AIF1_DAC1_FILTERS_1, val); | |
! } | |
! return 0; | |
! } | |
! #endif | |
! void wm8994_set_off(struct snd_soc_codec *codec) | |
! { | |
! DEBUG_LOG(""); | |
! | |
! audio_power(0); | |
! } | |
! #if defined USE_INFINIEON_EC_FOR_VT | |
! static const char *clock_control[] = { "OFF", "ON"}; | |
! static const struct soc_enum clock_control_enum[] = { | |
! SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(clock_control),clock_control), | |
! }; | |
! static int s3c_pcmdev_get_clock(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
! { | |
! return 0; | |
! } | |
! static int s3c_pcmdev_set_clock(struct snd_kcontrol *kcontrol, | |
! struct snd_ctl_elem_value *ucontrol) | |
! { | |
! // Get path value | |
! int enable = ucontrol->value.integer.value[0]; | |
! DEBUG_LOG("Enable = [%d]", enable); | |
! s3c_pcmdev_clock_control(enable); | |
! return 0; | |
! } | |
! #endif | |
! #define SOC_WM899X_OUTPGA_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert, tlv_array) \ | |
! { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ | |
! .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
! SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
! .tlv.p = (tlv_array), \ | |
! .info = snd_soc_info_volsw_2r, \ | |
! .get = snd_soc_get_volsw_2r, .put = wm899x_outpga_put_volsw_vu, \ | |
! .private_value = (unsigned long)&(struct soc_mixer_control) \ | |
! {.reg = reg_left, .rreg = reg_right, .shift = xshift, \ | |
! .max = xmax, .invert = xinvert} } | |
! | |
! | |
! #define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\ | |
! tlv_array) {\ | |
! .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ | |
! .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
! SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
! .tlv.p = (tlv_array), \ | |
! .info = snd_soc_info_volsw, \ | |
! .get = snd_soc_get_volsw, .put = wm899x_inpga_put_volsw_vu, \ | |
! .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) } | |
! | |
! //these are all factors of .01dB | |
! static const DECLARE_TLV_DB_SCALE(digital_tlv, -7162, 37, 1); | |
! static const DECLARE_TLV_DB_LINEAR(digital_tlv_spkr,-5700,600); | |
! static const DECLARE_TLV_DB_LINEAR(digital_tlv_rcv,-5700,600); | |
! static const DECLARE_TLV_DB_LINEAR(digital_tlv_headphone,-5700,600); | |
! static const DECLARE_TLV_DB_LINEAR(digital_tlv_mic,-7162,7162); | |
! | |
! | |
! static const struct soc_enum path_control_enum[] = { | |
! SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(playback_path),playback_path), | |
! SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(voicecall_path),voicecall_path), | |
! SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(mic_path),mic_path), | |
! SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(fmradio_path),fmradio_path), | |
! SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(codec_tuning_control), codec_tuning_control), | |
! SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(codec_status_control), codec_status_control), | |
! SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(voice_record_path), voice_record_path), | |
! SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(call_recording_channel), call_recording_channel), | |
! #ifdef CONFIG_TARGET_LOCALE_KOR | |
! SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(voipcall_path), voipcall_path), | |
! #endif | |
}; | |
! static const struct snd_kcontrol_new wm8994_snd_controls[] = { | |
! SOC_WM899X_OUTPGA_DOUBLE_R_TLV("Playback Volume", WM8994_LEFT_OPGA_VOLUME , | |
! WM8994_RIGHT_OPGA_VOLUME , 0, 0x3F, 0, digital_tlv_rcv), | |
! SOC_WM899X_OUTPGA_DOUBLE_R_TLV("Playback Spkr Volume", WM8994_SPEAKER_VOLUME_LEFT , | |
! WM8994_SPEAKER_VOLUME_RIGHT , 1,0x3F, 0, digital_tlv_spkr), | |
! SOC_WM899X_OUTPGA_DOUBLE_R_TLV("Playback Headset Volume",WM8994_LEFT_OUTPUT_VOLUME , | |
! WM8994_RIGHT_OUTPUT_VOLUME , 1,0x3F, 0, digital_tlv_headphone), | |
! SOC_WM899X_OUTPGA_SINGLE_R_TLV("Capture Volume", WM8994_AIF1_ADC1_LEFT_VOLUME , | |
! 0, 0xEF, 0, digital_tlv_mic), | |
! | |
! /* Path Control */ | |
! SOC_ENUM_EXT("Playback Path", path_control_enum[0], | |
! wm8994_get_playback_path, wm8994_set_playback_path), | |
! | |
! SOC_ENUM_EXT("Voice Call Path", path_control_enum[1], | |
! wm8994_get_call_path, wm8994_set_call_path), | |
! | |
! SOC_ENUM_EXT("Capture MIC Path", path_control_enum[2], | |
! wm8994_get_mic_path, wm8994_set_mic_path), | |
! | |
! SOC_ENUM_EXT("FM Radio Path", path_control_enum[3], | |
! wm8994_get_fmradio_path, wm8994_set_fmradio_path), | |
! | |
! SOC_ENUM_EXT("Codec Tuning", path_control_enum[4], | |
! wm8994_get_codec_tuning, wm8994_set_codec_tuning), | |
! | |
! SOC_ENUM_EXT("Codec Status", path_control_enum[5], | |
! wm8994_get_codec_status, wm8994_set_codec_status), | |
! | |
! SOC_ENUM_EXT("Voice Call Recording", path_control_enum[6], | |
! wm8994_get_voice_call_recording, wm8994_set_voice_call_recording), | |
! | |
! SOC_ENUM_EXT("Recording Channel", path_control_enum[7], | |
! wm8994_get_voice_recording_ch, wm8994_set_voice_recording_ch), | |
! | |
! #ifdef CONFIG_TARGET_LOCALE_KOR | |
! SOC_ENUM_EXT("VoIP Call Path", path_control_enum[8], | |
! wm8994_get_voip_call_path, wm8994_set_voip_call_path), | |
! #endif | |
! #if defined USE_INFINIEON_EC_FOR_VT | |
! SOC_ENUM_EXT("Clock Control", clock_control_enum[0], | |
! s3c_pcmdev_get_clock, s3c_pcmdev_set_clock), | |
! #endif | |
! } ;//snd_ctrls | |
! /* Add non-DAPM controls */ | |
! static int wm8994_add_controls(struct snd_soc_codec *codec) | |
{ | |
! int err, i; | |
! for (i = 0; i < ARRAY_SIZE(wm8994_snd_controls); i++) { | |
! err = snd_ctl_add(codec->card, | |
! snd_soc_cnew(&wm8994_snd_controls[i], | |
! codec, NULL)); | |
! if (err < 0) | |
! return err; | |
} | |
! return 0; | |
! } | |
! static const struct snd_soc_dapm_widget wm8994_dapm_widgets[] = { | |
! //SND_SOC_DAPM_DAC("DAC1", "Playback", WM8580_PWRDN1, 2, 1), | |
! //SND_SOC_DAPM_DAC("DAC2", "Playback", WM8580_PWRDN1, 3, 1), | |
! //SND_SOC_DAPM_DAC("DAC3", "Playback", WM8580_PWRDN1, 4, 1), | |
! //SND_SOC_DAPM_OUTPUT("VOUT1L"), | |
! //SND_SOC_DAPM_OUTPUT("VOUT1R"), | |
! //SND_SOC_DAPM_OUTPUT("VOUT2L"), | |
! //SND_SOC_DAPM_OUTPUT("VOUT2R"), | |
! //SND_SOC_DAPM_OUTPUT("VOUT3L"), | |
! //SND_SOC_DAPM_OUTPUT("VOUT3R"), | |
! //SND_SOC_DAPM_ADC("ADC", "Capture", WM8580_PWRDN1, 1, 1), | |
! //SND_SOC_DAPM_INPUT("AINL"), | |
! //SND_SOC_DAPM_INPUT("AINR"), | |
! }; | |
! static const struct snd_soc_dapm_route audio_map[] = { | |
! #if 0 | |
! { "VOUT1L", NULL, "DAC1" }, | |
! { "VOUT1R", NULL, "DAC1" }, | |
! { "VOUT2L", NULL, "DAC2" }, | |
! { "VOUT2R", NULL, "DAC2" }, | |
! { "VOUT3L", NULL, "DAC3" }, | |
! { "VOUT3R", NULL, "DAC3" }, | |
! { "ADC", NULL, "AINL" }, | |
! { "ADC", NULL, "AINR" }, | |
! #endif | |
! }; | |
! static int wm8994_add_widgets(struct snd_soc_codec *codec) | |
! { | |
! snd_soc_dapm_new_controls(codec, wm8994_dapm_widgets, | |
! ARRAY_SIZE(wm8994_dapm_widgets)); | |
! snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); | |
+ snd_soc_dapm_new_widgets(codec); | |
return 0; | |
} | |
! static int configure_clock(struct snd_soc_codec *codec) | |
{ | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! unsigned int reg; | |
! //DEBUG_LOG(""); | |
! reg = wm8994_read(codec, WM8994_AIF1_CLOCKING_1); | |
! if (wm8994->codec_state != DEACTIVE) | |
! { | |
! if (reg !=0) | |
! { | |
! DEBUG_LOG("Codec is already actvied. Skip clock setting."); | |
! return 0; | |
! } | |
else | |
! { | |
! pr_info("%s : wm8994->codec_state need to check\n", __func__); | |
! } | |
} | |
! reg &= ~WM8994_AIF1CLK_ENA ; //disable the clock | |
! reg &= ~WM8994_AIF1CLK_SRC_MASK; | |
! wm8994_write(codec, WM8994_AIF1_CLOCKING_1, reg); | |
! /* This should be done on init() for bypass paths */ | |
! switch (wm8994->sysclk_source) | |
! { | |
! case WM8994_SYSCLK_MCLK: | |
! dev_dbg(codec->dev, "Using %dHz MCLK\n", wm8994->mclk_rate); | |
! reg = wm8994_read(codec,WM8994_AIF1_CLOCKING_1); | |
! reg &= ~WM8994_AIF1CLK_ENA ; //disable the clock | |
! wm8994_write(codec, WM8994_AIF1_CLOCKING_1, reg); | |
! | |
! reg = wm8994_read(codec,WM8994_AIF1_CLOCKING_1); | |
! reg &= 0x07; //clear clksrc bits ..now it is for MCLK | |
! | |
! if(wm8994->mclk_rate > 13500000) | |
! { | |
! reg |= WM8994_AIF1CLK_DIV ; | |
! wm8994->sysclk_rate = wm8994->mclk_rate / 2; | |
! } | |
! else | |
! { | |
! reg &= ~WM8994_AIF1CLK_DIV; | |
! wm8994->sysclk_rate = wm8994->mclk_rate; | |
! } | |
! reg |= WM8994_AIF1CLK_ENA ; //enable the clocks | |
! wm8994_write(codec, WM8994_AIF1_CLOCKING_1, reg); | |
! | |
! //Enable clocks to the Audio core and sysclk of wm8994 | |
! reg = wm8994_read(codec, WM8994_CLOCKING_1 ); | |
! reg &= ~(WM8994_SYSCLK_SRC_MASK | WM8994_DSP_FSINTCLK_ENA_MASK|WM8994_DSP_FS1CLK_ENA_MASK); | |
! reg |= (WM8994_DSP_FS1CLK_ENA | WM8994_DSP_FSINTCLK_ENA); | |
! wm8994_write(codec,WM8994_CLOCKING_1 ,reg); | |
! break; | |
! case WM8994_SYSCLK_FLL: | |
! switch(wm8994->fs ) | |
! { | |
! case 8000: | |
! wm8994_write(codec, WM8994_FLL1_CONTROL_2, 0x2F00); | |
! wm8994_write(codec, WM8994_FLL1_CONTROL_3, 0x3126); | |
! wm8994_write(codec, WM8994_FLL1_CONTROL_4, 0x0100); | |
! wm8994_write(codec, WM8994_FLL1_CONTROL_5, 0x0C88); | |
! wm8994_write(codec, WM8994_FLL1_CONTROL_1, WM8994_FLL1_FRACN_ENA |WM8994_FLL1_ENA); | |
! break; | |
! | |
! case 11025: | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_2, 0x1F00 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_3, 0x86C2 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_5, 0x0C88 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_4, 0x00e0 ); | |
! wm8994_write(codec, WM8994_FLL1_CONTROL_1, WM8994_FLL1_FRACN_ENA |WM8994_FLL1_ENA); | |
! break; | |
! | |
! case 12000: | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_2, 0x1F00 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_3, 0x3126); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_5, 0x0C88 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_4, 0x0100 ); | |
! wm8994_write(codec, WM8994_FLL1_CONTROL_1, WM8994_FLL1_FRACN_ENA |WM8994_FLL1_ENA); | |
! break; | |
! | |
! case 16000: | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_2, 0x1900 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_3, 0xE23E ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_5, 0x0C88 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_4, 0x0100 ); | |
! wm8994_write(codec, WM8994_FLL1_CONTROL_1, WM8994_FLL1_FRACN_ENA |WM8994_FLL1_ENA); | |
! break; | |
! | |
! case 22050: | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_2, 0x0F00 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_3, 0x86C2 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_5, 0x0C88 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_4, 0x00E0 ); | |
! wm8994_write(codec, WM8994_FLL1_CONTROL_1, WM8994_FLL1_FRACN_ENA |WM8994_FLL1_ENA); | |
! break; | |
! | |
! case 24000: | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_2, 0x0F00 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_3, 0x3126 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_5, 0x0C88 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_4, 0x0100 ); | |
! wm8994_write(codec, WM8994_FLL1_CONTROL_1, WM8994_FLL1_FRACN_ENA |WM8994_FLL1_ENA); | |
! break; | |
! | |
! case 32000: | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_2, 0x0C00 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_3, 0xE23E ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_5, 0x0C88 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_4, 0x0100 ); | |
! wm8994_write(codec, WM8994_FLL1_CONTROL_1, WM8994_FLL1_FRACN_ENA |WM8994_FLL1_ENA); | |
! break; | |
! | |
! case 44100: | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_2, 0x0700 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_3, 0x86C2 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_5, 0x0C88 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_4, 0x00E0 ); | |
! wm8994_write(codec, WM8994_FLL1_CONTROL_1, WM8994_FLL1_FRACN_ENA |WM8994_FLL1_ENA); | |
! break; | |
! | |
! case 48000: | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_2, 0x0700 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_3, 0x3126 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_5, 0x0C88 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_4, 0x0100 ); | |
! wm8994_write(codec, WM8994_FLL1_CONTROL_1, WM8994_FLL1_FRACN_ENA |WM8994_FLL1_ENA); | |
! break; | |
! | |
! default: | |
! DEBUG_LOG_ERR("Unsupported Frequency"); | |
! break; | |
! } | |
! | |
! reg = wm8994_read(codec,WM8994_AIF1_CLOCKING_1); | |
! reg |= WM8994_AIF1CLK_ENA ; //enable the clocks | |
! reg |= WM8994_AIF1CLK_SRC_FLL1;//selecting FLL1 | |
! wm8994_write(codec, WM8994_AIF1_CLOCKING_1, reg); | |
! | |
! //Enable clocks to the Audio core and sysclk of wm8994 | |
! reg = wm8994_read(codec, WM8994_CLOCKING_1 ); | |
! reg &= ~(WM8994_SYSCLK_SRC_MASK | WM8994_DSP_FSINTCLK_ENA_MASK|WM8994_DSP_FS1CLK_ENA_MASK); | |
! reg |= (WM8994_DSP_FS1CLK_ENA | WM8994_DSP_FSINTCLK_ENA ); | |
! wm8994_write(codec,WM8994_CLOCKING_1 ,reg); | |
! break; | |
! default: | |
! dev_err(codec->dev, "System clock not configured\n"); | |
! return -EINVAL; | |
} | |
! dev_dbg(codec->dev, "CLK_SYS is %dHz\n", wm8994->sysclk_rate); | |
return 0; | |
} | |
+ #if 0 //Not used | |
static int wm8994_set_bias_level(struct snd_soc_codec *codec, | |
enum snd_soc_bias_level level) | |
{ | |
+ #if 0 | |
+ DEBUG_LOG(""); | |
+ | |
switch (level) { | |
case SND_SOC_BIAS_ON: | |
case SND_SOC_BIAS_PREPARE: | |
! /* VMID=2*40k */ | |
snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_1, | |
WM8994_VMID_SEL_MASK, 0x2); | |
+ snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_2, | |
+ WM8994_TSHUT_ENA, WM8994_TSHUT_ENA); | |
break; | |
case SND_SOC_BIAS_STANDBY: | |
if (codec->bias_level == SND_SOC_BIAS_OFF) { | |
! /* Bring up VMID with fast soft start */ | |
snd_soc_update_bits(codec, WM8994_ANTIPOP_2, | |
WM8994_STARTUP_BIAS_ENA | | |
WM8994_VMID_BUF_ENA | | |
! WM8994_VMID_RAMP_MASK | | |
! WM8994_BIAS_SRC, | |
WM8994_STARTUP_BIAS_ENA | | |
WM8994_VMID_BUF_ENA | | |
! WM8994_VMID_RAMP_MASK | | |
! WM8994_BIAS_SRC); | |
! #if 0 | |
! /* If either line output is single ended we | |
! * need the VMID buffer */ | |
! if (!wm8993->pdata.lineout1_diff || | |
! !wm8993->pdata.lineout2_diff) | |
! snd_soc_update_bits(codec, WM8994_ANTIPOP1, | |
! WM8994_LINEOUT_VMID_BUF_ENA, | |
! WM8994_LINEOUT_VMID_BUF_ENA); | |
! #endif //if 0 shaju | |
! /* VMID=2*40k */ | |
snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_1, | |
! WM8994_VMID_SEL_MASK | | |
! WM8994_BIAS_ENA, | |
WM8994_BIAS_ENA | 0x2); | |
+ msleep(32); | |
! /* Switch to normal bias */ | |
! snd_soc_update_bits(codec, WM8994_ANTIPOP_2, | |
! WM8994_BIAS_SRC | | |
! WM8994_STARTUP_BIAS_ENA, 0); | |
} | |
! /* VMID=2*240k */ | |
snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_1, | |
WM8994_VMID_SEL_MASK, 0x4); | |
+ snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_2, | |
+ WM8994_TSHUT_ENA, 0); | |
break; | |
case SND_SOC_BIAS_OFF: | |
! snd_soc_update_bits(codec, WM8994_ANTIPOP_1, | |
! WM8994_LINEOUT_VMID_BUF_ENA, 0); | |
! snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_1, | |
! WM8994_VMID_SEL_MASK | WM8994_BIAS_ENA, | |
! 0); | |
break; | |
} | |
+ | |
codec->bias_level = level; | |
+ #endif | |
+ | |
return 0; | |
} | |
+ #endif | |
! static int wm8994_set_sysclk(struct snd_soc_dai *codec_dai, | |
! int clk_id, unsigned int freq, int dir) | |
{ | |
! struct snd_soc_codec *codec = codec_dai->codec; | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! | |
! //DEBUG_LOG("clk_id =%d ", clk_id); | |
! | |
! switch (clk_id) { | |
! case WM8994_SYSCLK_MCLK: | |
! wm8994->mclk_rate = freq; | |
! wm8994->sysclk_source = clk_id; | |
! break; | |
! case WM8994_SYSCLK_FLL: | |
! wm8994->sysclk_rate = freq; | |
! wm8994->sysclk_source = clk_id; | |
break; | |
+ | |
default: | |
return -EINVAL; | |
} | |
*************** | |
*** 3110,3120 **** | |
return -EINVAL; | |
} | |
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
case SND_SOC_DAIFMT_CBS_CFS: | |
break; | |
case SND_SOC_DAIFMT_CBM_CFM: | |
! ms = WM8994_AIF1_MSTR; | |
break; | |
default: | |
return -EINVAL; | |
--- 1387,1428 ---- | |
return -EINVAL; | |
} | |
+ return 0; | |
+ } | |
+ | |
+ | |
+ static int wm8994_set_dai_fmt(struct snd_soc_dai *dai, | |
+ unsigned int fmt) | |
+ { | |
+ struct snd_soc_codec *codec = dai->codec; | |
+ struct wm8994_priv *wm8994 = codec->drvdata; | |
+ | |
+ unsigned int aif1 = wm8994_read(codec,WM8994_AIF1_CONTROL_1); | |
+ unsigned int aif2 = wm8994_read(codec,WM8994_AIF1_MASTER_SLAVE ); | |
+ | |
+ //DEBUG_LOG(""); | |
+ | |
+ aif1 &= ~(WM8994_AIF1_LRCLK_INV |WM8994_AIF1_BCLK_INV | | |
+ WM8994_AIF1_WL_MASK | WM8994_AIF1_FMT_MASK); | |
+ | |
+ aif2 &= ~( WM8994_AIF1_LRCLK_FRC_MASK| WM8994_AIF1_CLK_FRC| WM8994_AIF1_MSTR ) ; //to enable LRCLK and bclk in master mode | |
+ | |
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
case SND_SOC_DAIFMT_CBS_CFS: | |
+ wm8994->master = 0; | |
+ break; | |
+ case SND_SOC_DAIFMT_CBS_CFM: | |
+ aif2 |= (WM8994_AIF1_MSTR|WM8994_AIF1_LRCLK_FRC); | |
+ wm8994->master = 1; | |
+ break; | |
+ case SND_SOC_DAIFMT_CBM_CFS: | |
+ aif2 |= (WM8994_AIF1_MSTR|WM8994_AIF1_CLK_FRC) ; | |
+ wm8994->master = 1; | |
break; | |
case SND_SOC_DAIFMT_CBM_CFM: | |
! aif2 |= (WM8994_AIF1_MSTR|WM8994_AIF1_CLK_FRC| WM8994_AIF1_LRCLK_FRC); | |
! //aif2 |= (WM8994_AIF1_MSTR); | |
! wm8994->master = 1; | |
break; | |
default: | |
return -EINVAL; | |
*************** | |
*** 3122,3128 **** | |
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
case SND_SOC_DAIFMT_DSP_B: | |
! aif1 |= WM8994_AIF1_LRCLK_INV; | |
case SND_SOC_DAIFMT_DSP_A: | |
aif1 |= 0x18; | |
break; | |
--- 1430,1436 ---- | |
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
case SND_SOC_DAIFMT_DSP_B: | |
! aif1 |=WM8994_AIF1_LRCLK_INV; | |
case SND_SOC_DAIFMT_DSP_A: | |
aif1 |= 0x18; | |
break; | |
*************** | |
*** 3146,3152 **** | |
case SND_SOC_DAIFMT_NB_NF: | |
break; | |
case SND_SOC_DAIFMT_IB_NF: | |
! aif1 |= WM8994_AIF1_BCLK_INV; | |
break; | |
default: | |
return -EINVAL; | |
--- 1454,1460 ---- | |
case SND_SOC_DAIFMT_NB_NF: | |
break; | |
case SND_SOC_DAIFMT_IB_NF: | |
! aif1 |= WM8994_AIF1_BCLK_INV; | |
break; | |
default: | |
return -EINVAL; | |
*************** | |
*** 3160,3169 **** | |
case SND_SOC_DAIFMT_NB_NF: | |
break; | |
case SND_SOC_DAIFMT_IB_IF: | |
! aif1 |= WM8994_AIF1_BCLK_INV | WM8994_AIF1_LRCLK_INV; | |
break; | |
case SND_SOC_DAIFMT_IB_NF: | |
! aif1 |= WM8994_AIF1_BCLK_INV; | |
break; | |
case SND_SOC_DAIFMT_NB_IF: | |
aif1 |= WM8994_AIF1_LRCLK_INV; | |
--- 1468,1477 ---- | |
case SND_SOC_DAIFMT_NB_NF: | |
break; | |
case SND_SOC_DAIFMT_IB_IF: | |
! aif1 |= WM8994_AIF1_BCLK_INV |WM8994_AIF1_LRCLK_INV; | |
break; | |
case SND_SOC_DAIFMT_IB_NF: | |
! aif1 |= WM8994_AIF1_BCLK_INV; | |
break; | |
case SND_SOC_DAIFMT_NB_IF: | |
aif1 |= WM8994_AIF1_LRCLK_INV; | |
*************** | |
*** 3176,4075 **** | |
return -EINVAL; | |
} | |
! snd_soc_update_bits(codec, aif1_reg, | |
! WM8994_AIF1_BCLK_INV | WM8994_AIF1_LRCLK_INV | | |
! WM8994_AIF1_FMT_MASK, | |
! aif1); | |
! snd_soc_update_bits(codec, ms_reg, WM8994_AIF1_MSTR, | |
! ms); | |
! | |
return 0; | |
} | |
- static struct { | |
- int val, rate; | |
- } srs[] = { | |
- { 0, 8000 }, | |
- { 1, 11025 }, | |
- { 2, 12000 }, | |
- { 3, 16000 }, | |
- { 4, 22050 }, | |
- { 5, 24000 }, | |
- { 6, 32000 }, | |
- { 7, 44100 }, | |
- { 8, 48000 }, | |
- { 9, 88200 }, | |
- { 10, 96000 }, | |
- }; | |
- | |
- static int fs_ratios[] = { | |
- 64, 128, 192, 256, 348, 512, 768, 1024, 1408, 1536 | |
- }; | |
- | |
- static int bclk_divs[] = { | |
- 10, 15, 20, 30, 40, 50, 60, 80, 110, 120, 160, 220, 240, 320, 440, 480, | |
- 640, 880, 960, 1280, 1760, 1920 | |
- }; | |
- | |
static int wm8994_hw_params(struct snd_pcm_substream *substream, | |
struct snd_pcm_hw_params *params, | |
struct snd_soc_dai *dai) | |
{ | |
struct snd_soc_codec *codec = dai->codec; | |
! struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | |
! int aif1_reg; | |
! int bclk_reg; | |
! int lrclk_reg; | |
! int rate_reg; | |
! int aif1 = 0; | |
! int bclk = 0; | |
! int lrclk = 0; | |
! int rate_val = 0; | |
! int id = dai->id - 1; | |
! | |
! int i, cur_val, best_val, bclk_rate, best; | |
! | |
! switch (dai->id) { | |
! case 1: | |
! aif1_reg = WM8994_AIF1_CONTROL_1; | |
! bclk_reg = WM8994_AIF1_BCLK; | |
! rate_reg = WM8994_AIF1_RATE; | |
! if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK || | |
! wm8994->lrclk_shared[0]) | |
! lrclk_reg = WM8994_AIF1DAC_LRCLK; | |
! else | |
! lrclk_reg = WM8994_AIF1ADC_LRCLK; | |
! break; | |
! case 2: | |
! aif1_reg = WM8994_AIF2_CONTROL_1; | |
! bclk_reg = WM8994_AIF2_BCLK; | |
! rate_reg = WM8994_AIF2_RATE; | |
! if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK || | |
! wm8994->lrclk_shared[1]) | |
! lrclk_reg = WM8994_AIF2DAC_LRCLK; | |
! else | |
! lrclk_reg = WM8994_AIF2ADC_LRCLK; | |
! break; | |
! default: | |
! return -EINVAL; | |
! } | |
- bclk_rate = params_rate(params) * 2; | |
switch (params_format(params)) { | |
! case SNDRV_PCM_FORMAT_S16_LE: | |
! bclk_rate *= 16; | |
! break; | |
! case SNDRV_PCM_FORMAT_S20_3LE: | |
! bclk_rate *= 20; | |
! aif1 |= 0x20; | |
! break; | |
! case SNDRV_PCM_FORMAT_S24_LE: | |
! bclk_rate *= 24; | |
! aif1 |= 0x40; | |
! break; | |
! case SNDRV_PCM_FORMAT_S32_LE: | |
! bclk_rate *= 32; | |
! aif1 |= 0x60; | |
! break; | |
! default: | |
! return -EINVAL; | |
! } | |
! /* Try to find an appropriate sample rate; look for an exact match. */ | |
! for (i = 0; i < ARRAY_SIZE(srs); i++) | |
! if (srs[i].rate == params_rate(params)) | |
break; | |
- if (i == ARRAY_SIZE(srs)) | |
- return -EINVAL; | |
- rate_val |= srs[i].val << WM8994_AIF1_SR_SHIFT; | |
! dev_dbg(dai->dev, "Sample rate is %dHz\n", srs[i].rate); | |
! dev_dbg(dai->dev, "AIF%dCLK is %dHz, target BCLK %dHz\n", | |
! dai->id, wm8994->aifclk[id], bclk_rate); | |
! if (wm8994->aifclk[id] == 0) { | |
! dev_err(dai->dev, "AIF%dCLK not configured\n", dai->id); | |
! return -EINVAL; | |
} | |
! /* AIFCLK/fs ratio; look for a close match in either direction */ | |
best = 0; | |
! best_val = abs((fs_ratios[0] * params_rate(params)) | |
! - wm8994->aifclk[id]); | |
! for (i = 1; i < ARRAY_SIZE(fs_ratios); i++) { | |
! cur_val = abs((fs_ratios[i] * params_rate(params)) | |
! - wm8994->aifclk[id]); | |
! if (cur_val >= best_val) | |
! continue; | |
! best = i; | |
! best_val = cur_val; | |
! } | |
! dev_dbg(dai->dev, "Selected AIF%dCLK/fs = %d\n", | |
! dai->id, fs_ratios[best]); | |
! rate_val |= best; | |
! | |
! /* We may not get quite the right frequency if using | |
! * approximate clocks so look for the closest match that is | |
! * higher than the target (we need to ensure that there enough | |
! * BCLKs to clock out the samples). | |
! */ | |
best = 0; | |
for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) { | |
! cur_val = (wm8994->aifclk[id] * 10 / bclk_divs[i]) - bclk_rate; | |
! if (cur_val < 0) /* BCLK table is sorted */ | |
! break; | |
! best = i; | |
! } | |
! bclk_rate = wm8994->aifclk[id] * 10 / bclk_divs[best]; | |
! dev_dbg(dai->dev, "Using BCLK_DIV %d for actual BCLK %dHz\n", | |
! bclk_divs[best], bclk_rate); | |
! bclk |= best << WM8994_AIF1_BCLK_DIV_SHIFT; | |
! | |
! lrclk = bclk_rate / params_rate(params); | |
! dev_dbg(dai->dev, "Using LRCLK rate %d for actual LRCLK %dHz\n", | |
! lrclk, bclk_rate / lrclk); | |
! | |
! snd_soc_update_bits(codec, aif1_reg, WM8994_AIF1_WL_MASK, aif1); | |
! snd_soc_update_bits(codec, bclk_reg, WM8994_AIF1_BCLK_DIV_MASK, bclk); | |
! snd_soc_update_bits(codec, lrclk_reg, WM8994_AIF1DAC_RATE_MASK, | |
! lrclk); | |
! snd_soc_update_bits(codec, rate_reg, WM8994_AIF1_SR_MASK | | |
! WM8994_AIF1CLK_RATE_MASK, rate_val); | |
! | |
! if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | |
! switch (dai->id) { | |
! case 1: | |
! wm8994->dac_rates[0] = params_rate(params); | |
! wm8994_set_retune_mobile(codec, 0); | |
! wm8994_set_retune_mobile(codec, 1); | |
! break; | |
! case 2: | |
! wm8994->dac_rates[1] = params_rate(params); | |
! wm8994_set_retune_mobile(codec, 2); | |
break; | |
} | |
} | |
return 0; | |
} | |
! static int wm8994_aif_mute(struct snd_soc_dai *codec_dai, int mute) | |
{ | |
struct snd_soc_codec *codec = codec_dai->codec; | |
! int mute_reg; | |
! int reg; | |
! | |
! switch (codec_dai->id) { | |
! case 1: | |
! mute_reg = WM8994_AIF1_DAC1_FILTERS_1; | |
! break; | |
! case 2: | |
! mute_reg = WM8994_AIF2_DAC_FILTERS_1; | |
! break; | |
! default: | |
! return -EINVAL; | |
! } | |
if (mute) | |
! reg = WM8994_AIF1DAC1_MUTE; | |
else | |
! reg = 0; | |
! snd_soc_update_bits(codec, mute_reg, WM8994_AIF1DAC1_MUTE, reg); | |
return 0; | |
} | |
! static int wm8994_set_tristate(struct snd_soc_dai *codec_dai, int tristate) | |
{ | |
struct snd_soc_codec *codec = codec_dai->codec; | |
! int reg, val, mask; | |
! switch (codec_dai->id) { | |
! case 1: | |
! reg = WM8994_AIF1_MASTER_SLAVE; | |
! mask = WM8994_AIF1_TRI; | |
! break; | |
! case 2: | |
! reg = WM8994_AIF2_MASTER_SLAVE; | |
! mask = WM8994_AIF2_TRI; | |
! break; | |
! case 3: | |
! reg = WM8994_POWER_MANAGEMENT_6; | |
! mask = WM8994_AIF3_TRI; | |
! break; | |
! default: | |
! return -EINVAL; | |
! } | |
! if (tristate) | |
! val = mask; | |
else | |
! val = 0; | |
! return snd_soc_update_bits(codec, reg, mask, reg); | |
} | |
! #define WM8994_RATES SNDRV_PCM_RATE_8000_96000 | |
! | |
! #define WM8994_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | |
! SNDRV_PCM_FMTBIT_S24_LE) | |
! static struct snd_soc_dai_ops wm8994_aif1_dai_ops = { | |
! .set_sysclk = wm8994_set_dai_sysclk, | |
! .set_fmt = wm8994_set_dai_fmt, | |
! .hw_params = wm8994_hw_params, | |
! .digital_mute = wm8994_aif_mute, | |
! .set_pll = wm8994_set_fll, | |
! .set_tristate = wm8994_set_tristate, | |
! }; | |
! | |
! static struct snd_soc_dai_ops wm8994_aif2_dai_ops = { | |
! .set_sysclk = wm8994_set_dai_sysclk, | |
! .set_fmt = wm8994_set_dai_fmt, | |
! .hw_params = wm8994_hw_params, | |
! .digital_mute = wm8994_aif_mute, | |
! .set_pll = wm8994_set_fll, | |
! .set_tristate = wm8994_set_tristate, | |
! }; | |
! static struct snd_soc_dai_ops wm8994_aif3_dai_ops = { | |
! .set_tristate = wm8994_set_tristate, | |
! }; | |
! struct snd_soc_dai wm8994_dai[] = { | |
! { | |
! .name = "WM8994 AIF1", | |
! .id = 1, | |
! .playback = { | |
! .stream_name = "AIF1 Playback", | |
! .channels_min = 2, | |
! .channels_max = 2, | |
! .rates = WM8994_RATES, | |
! .formats = WM8994_FORMATS, | |
! }, | |
! .capture = { | |
! .stream_name = "AIF1 Capture", | |
! .channels_min = 2, | |
! .channels_max = 2, | |
! .rates = WM8994_RATES, | |
! .formats = WM8994_FORMATS, | |
! }, | |
! .ops = &wm8994_aif1_dai_ops, | |
! }, | |
{ | |
! .name = "WM8994 AIF2", | |
! .id = 2, | |
! .playback = { | |
! .stream_name = "AIF2 Playback", | |
! .channels_min = 2, | |
! .channels_max = 2, | |
! .rates = WM8994_RATES, | |
! .formats = WM8994_FORMATS, | |
! }, | |
! .capture = { | |
! .stream_name = "AIF2 Capture", | |
! .channels_min = 2, | |
! .channels_max = 2, | |
! .rates = WM8994_RATES, | |
! .formats = WM8994_FORMATS, | |
! }, | |
! .ops = &wm8994_aif2_dai_ops, | |
! }, | |
{ | |
! .name = "WM8994 AIF3", | |
! .id = 3, | |
! .playback = { | |
! .stream_name = "AIF3 Playback", | |
! .channels_min = 2, | |
! .channels_max = 2, | |
! .rates = WM8994_RATES, | |
! .formats = WM8994_FORMATS, | |
! }, | |
! .capture = { | |
! .stream_name = "AIF3 Capture", | |
! .channels_min = 2, | |
! .channels_max = 2, | |
! .rates = WM8994_RATES, | |
! .formats = WM8994_FORMATS, | |
! }, | |
! .ops = &wm8994_aif3_dai_ops, | |
} | |
- }; | |
- EXPORT_SYMBOL_GPL(wm8994_dai); | |
! #ifdef CONFIG_PM | |
! static int wm8994_suspend(struct platform_device *pdev, pm_message_t state) | |
! { | |
! struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
! struct snd_soc_codec *codec = socdev->card->codec; | |
! struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | |
! int i, ret; | |
! | |
! for (i = 0; i < ARRAY_SIZE(wm8994->fll); i++) { | |
! memcpy(&wm8994->fll_suspend[i], &wm8994->fll[i], | |
! sizeof(struct fll_config)); | |
! ret = wm8994_set_fll(&codec->dai[0], i + 1, 0, 0, 0); | |
! if (ret < 0) | |
! dev_warn(codec->dev, "Failed to stop FLL%d: %d\n", | |
! i + 1, ret); | |
! } | |
! wm8994_set_bias_level(codec, SND_SOC_BIAS_OFF); | |
! return 0; | |
! } | |
! static int wm8994_resume(struct platform_device *pdev) | |
! { | |
! struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
! struct snd_soc_codec *codec = socdev->card->codec; | |
! struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | |
! u16 *reg_cache = codec->reg_cache; | |
! int i, ret; | |
! | |
! /* Restore the registers */ | |
! for (i = 1; i < ARRAY_SIZE(wm8994->reg_cache); i++) { | |
! switch (i) { | |
! case WM8994_LDO_1: | |
! case WM8994_LDO_2: | |
! case WM8994_SOFTWARE_RESET: | |
! /* Handled by other MFD drivers */ | |
! continue; | |
! default: | |
! break; | |
} | |
! if (!access_masks[i].writable) | |
! continue; | |
! wm8994_reg_write(codec->control_data, i, reg_cache[i]); | |
} | |
! wm8994_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
! for (i = 0; i < ARRAY_SIZE(wm8994->fll); i++) { | |
! if (!wm8994->fll_suspend[i].out) | |
! continue; | |
! ret = wm8994_set_fll(&codec->dai[0], i + 1, | |
! wm8994->fll_suspend[i].src, | |
! wm8994->fll_suspend[i].in, | |
! wm8994->fll_suspend[i].out); | |
! if (ret < 0) | |
! dev_warn(codec->dev, "Failed to restore FLL%d: %d\n", | |
! i + 1, ret); | |
} | |
return 0; | |
} | |
- #else | |
- #define wm8994_suspend NULL | |
- #define wm8994_resume NULL | |
#endif | |
! static void wm8994_handle_retune_mobile_pdata(struct wm8994_priv *wm8994) | |
! { | |
! struct snd_soc_codec *codec = &wm8994->codec; | |
! struct wm8994_pdata *pdata = wm8994->pdata; | |
! struct snd_kcontrol_new controls[] = { | |
! SOC_ENUM_EXT("AIF1.1 EQ Mode", | |
! wm8994->retune_mobile_enum, | |
! wm8994_get_retune_mobile_enum, | |
! wm8994_put_retune_mobile_enum), | |
! SOC_ENUM_EXT("AIF1.2 EQ Mode", | |
! wm8994->retune_mobile_enum, | |
! wm8994_get_retune_mobile_enum, | |
! wm8994_put_retune_mobile_enum), | |
! SOC_ENUM_EXT("AIF2 EQ Mode", | |
! wm8994->retune_mobile_enum, | |
! wm8994_get_retune_mobile_enum, | |
! wm8994_put_retune_mobile_enum), | |
! }; | |
! int ret, i, j; | |
! const char **t; | |
! | |
! /* We need an array of texts for the enum API but the number | |
! * of texts is likely to be less than the number of | |
! * configurations due to the sample rate dependency of the | |
! * configurations. */ | |
! wm8994->num_retune_mobile_texts = 0; | |
! wm8994->retune_mobile_texts = NULL; | |
! for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) { | |
! for (j = 0; j < wm8994->num_retune_mobile_texts; j++) { | |
! if (strcmp(pdata->retune_mobile_cfgs[i].name, | |
! wm8994->retune_mobile_texts[j]) == 0) | |
! break; | |
! } | |
! if (j != wm8994->num_retune_mobile_texts) | |
! continue; | |
! | |
! /* Expand the array... */ | |
! t = krealloc(wm8994->retune_mobile_texts, | |
! sizeof(char *) * | |
! (wm8994->num_retune_mobile_texts + 1), | |
! GFP_KERNEL); | |
! if (t == NULL) | |
! continue; | |
! | |
! /* ...store the new entry... */ | |
! t[wm8994->num_retune_mobile_texts] = | |
! pdata->retune_mobile_cfgs[i].name; | |
! | |
! /* ...and remember the new version. */ | |
! wm8994->num_retune_mobile_texts++; | |
! wm8994->retune_mobile_texts = t; | |
! } | |
! dev_dbg(codec->dev, "Allocated %d unique ReTune Mobile names\n", | |
! wm8994->num_retune_mobile_texts); | |
! wm8994->retune_mobile_enum.max = wm8994->num_retune_mobile_texts; | |
! wm8994->retune_mobile_enum.texts = wm8994->retune_mobile_texts; | |
! ret = snd_soc_add_controls(&wm8994->codec, controls, | |
! ARRAY_SIZE(controls)); | |
! if (ret != 0) | |
! dev_err(wm8994->codec.dev, | |
! "Failed to add ReTune Mobile controls: %d\n", ret); | |
! } | |
! static void wm8994_handle_pdata(struct wm8994_priv *wm8994) | |
{ | |
! struct snd_soc_codec *codec = &wm8994->codec; | |
! struct wm8994_pdata *pdata = wm8994->pdata; | |
! int ret, i; | |
! if (!pdata) | |
! return; | |
! wm_hubs_handle_analogue_pdata(codec, pdata->lineout1_diff, | |
! pdata->lineout2_diff, | |
! pdata->lineout1fb, | |
! pdata->lineout2fb, | |
! pdata->jd_scthr, | |
! pdata->jd_thr, | |
! pdata->micbias1_lvl, | |
! pdata->micbias2_lvl); | |
! | |
! dev_dbg(codec->dev, "%d DRC configurations\n", pdata->num_drc_cfgs); | |
! | |
! if (pdata->num_drc_cfgs) { | |
! struct snd_kcontrol_new controls[] = { | |
! SOC_ENUM_EXT("AIF1DRC1 Mode", wm8994->drc_enum, | |
! wm8994_get_drc_enum, wm8994_put_drc_enum), | |
! SOC_ENUM_EXT("AIF1DRC2 Mode", wm8994->drc_enum, | |
! wm8994_get_drc_enum, wm8994_put_drc_enum), | |
! SOC_ENUM_EXT("AIF2DRC Mode", wm8994->drc_enum, | |
! wm8994_get_drc_enum, wm8994_put_drc_enum), | |
! }; | |
! | |
! /* We need an array of texts for the enum API */ | |
! wm8994->drc_texts = kmalloc(sizeof(char *) | |
! * pdata->num_drc_cfgs, GFP_KERNEL); | |
! if (!wm8994->drc_texts) { | |
! dev_err(wm8994->codec.dev, | |
! "Failed to allocate %d DRC config texts\n", | |
! pdata->num_drc_cfgs); | |
! return; | |
! } | |
! for (i = 0; i < pdata->num_drc_cfgs; i++) | |
! wm8994->drc_texts[i] = pdata->drc_cfgs[i].name; | |
- wm8994->drc_enum.max = pdata->num_drc_cfgs; | |
- wm8994->drc_enum.texts = wm8994->drc_texts; | |
! ret = snd_soc_add_controls(&wm8994->codec, controls, | |
! ARRAY_SIZE(controls)); | |
! if (ret != 0) | |
! dev_err(wm8994->codec.dev, | |
! "Failed to add DRC mode controls: %d\n", ret); | |
! for (i = 0; i < WM8994_NUM_DRC; i++) | |
! wm8994_set_drc(codec, i); | |
} | |
! dev_dbg(codec->dev, "%d ReTune Mobile configurations\n", | |
! pdata->num_retune_mobile_cfgs); | |
! if (pdata->num_retune_mobile_cfgs) | |
! wm8994_handle_retune_mobile_pdata(wm8994); | |
! else | |
! snd_soc_add_controls(&wm8994->codec, wm8994_eq_controls, | |
! ARRAY_SIZE(wm8994_eq_controls)); | |
} | |
! static int wm8994_probe(struct platform_device *pdev) | |
{ | |
! struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
! struct snd_soc_codec *codec; | |
! int ret = 0; | |
! if (wm8994_codec == NULL) { | |
! dev_err(&pdev->dev, "Codec device not registered\n"); | |
! return -ENODEV; | |
! } | |
! socdev->card->codec = wm8994_codec; | |
! codec = wm8994_codec; | |
! /* register pcms */ | |
! ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); | |
if (ret < 0) { | |
! dev_err(codec->dev, "failed to create pcms: %d\n", ret); | |
! return ret; | |
} | |
! wm8994_handle_pdata(snd_soc_codec_get_drvdata(codec)); | |
! | |
! wm_hubs_add_analogue_controls(codec); | |
! snd_soc_add_controls(codec, wm8994_snd_controls, | |
! ARRAY_SIZE(wm8994_snd_controls)); | |
! snd_soc_dapm_new_controls(codec, wm8994_dapm_widgets, | |
! ARRAY_SIZE(wm8994_dapm_widgets)); | |
! wm_hubs_add_analogue_routes(codec, 0, 0); | |
! snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon)); | |
! return 0; | |
} | |
! static int wm8994_remove(struct platform_device *pdev) | |
{ | |
! struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
! snd_soc_free_pcms(socdev); | |
! snd_soc_dapm_free(socdev); | |
return 0; | |
} | |
! struct snd_soc_codec_device soc_codec_dev_wm8994 = { | |
! .probe = wm8994_probe, | |
! .remove = wm8994_remove, | |
! .suspend = wm8994_suspend, | |
! .resume = wm8994_resume, | |
}; | |
! EXPORT_SYMBOL_GPL(soc_codec_dev_wm8994); | |
! /** | |
! * wm8994_mic_detect - Enable microphone detection via the WM8994 IRQ | |
! * | |
! * @codec: WM8994 codec | |
! * @jack: jack to report detection events on | |
! * @micbias: microphone bias to detect on | |
! * @det: value to report for presence detection | |
! * @shrt: value to report for short detection | |
! * | |
! * Enable microphone detection via IRQ on the WM8994. If GPIOs are | |
! * being used to bring out signals to the processor then only platform | |
! * data configuration is needed for WM8903 and processor GPIOs should | |
! * be configured using snd_soc_jack_add_gpios() instead. | |
! * | |
! * Configuration of detection levels is available via the micbias1_lvl | |
! * and micbias2_lvl platform data members. | |
! */ | |
! int wm8994_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack, | |
! int micbias, int det, int shrt) | |
! { | |
! struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); | |
! struct wm8994_micdet *micdet; | |
! int reg; | |
! | |
! switch (micbias) { | |
! case 1: | |
! micdet = &wm8994->micdet[0]; | |
! break; | |
! case 2: | |
! micdet = &wm8994->micdet[1]; | |
! break; | |
! default: | |
! return -EINVAL; | |
! } | |
! | |
! dev_dbg(codec->dev, "Configuring microphone detection on %d: %x %x\n", | |
! micbias, det, shrt); | |
! /* Store the configuration */ | |
! micdet->jack = jack; | |
! micdet->det = det; | |
! micdet->shrt = shrt; | |
! | |
! /* If either of the jacks is set up then enable detection */ | |
! if (wm8994->micdet[0].jack || wm8994->micdet[1].jack) | |
! reg = WM8994_MICD_ENA; | |
! else | |
! reg = 0; | |
! snd_soc_update_bits(codec, WM8994_MICBIAS, WM8994_MICD_ENA, reg); | |
return 0; | |
} | |
! EXPORT_SYMBOL_GPL(wm8994_mic_detect); | |
! static irqreturn_t wm8994_mic_irq(int irq, void *data) | |
{ | |
! struct wm8994_priv *priv = data; | |
! struct snd_soc_codec *codec = &priv->codec; | |
! int reg; | |
! int report; | |
! reg = snd_soc_read(codec, WM8994_INTERRUPT_RAW_STATUS_2); | |
! if (reg < 0) { | |
! dev_err(codec->dev, "Failed to read microphone status: %d\n", | |
! reg); | |
! return IRQ_HANDLED; | |
} | |
! dev_dbg(codec->dev, "Microphone status: %x\n", reg); | |
! report = 0; | |
! if (reg & WM8994_MIC1_DET_STS) | |
! report |= priv->micdet[0].det; | |
! if (reg & WM8994_MIC1_SHRT_STS) | |
! report |= priv->micdet[0].shrt; | |
! snd_soc_jack_report(priv->micdet[0].jack, report, | |
! priv->micdet[0].det | priv->micdet[0].shrt); | |
! report = 0; | |
! if (reg & WM8994_MIC2_DET_STS) | |
! report |= priv->micdet[1].det; | |
! if (reg & WM8994_MIC2_SHRT_STS) | |
! report |= priv->micdet[1].shrt; | |
! snd_soc_jack_report(priv->micdet[1].jack, report, | |
! priv->micdet[1].det | priv->micdet[1].shrt); | |
! return IRQ_HANDLED; | |
} | |
! static int wm8994_codec_probe(struct platform_device *pdev) | |
{ | |
! int ret; | |
! struct wm8994_priv *wm8994; | |
struct snd_soc_codec *codec; | |
! int i; | |
! u16 rev; | |
! if (wm8994_codec) { | |
! dev_err(&pdev->dev, "Another WM8994 is registered\n"); | |
! return -EINVAL; | |
! } | |
wm8994 = kzalloc(sizeof(struct wm8994_priv), GFP_KERNEL); | |
! if (!wm8994) { | |
! dev_err(&pdev->dev, "Failed to allocate private data\n"); | |
return -ENOMEM; | |
! } | |
! | |
codec = &wm8994->codec; | |
! mutex_init(&codec->mutex); | |
! INIT_LIST_HEAD(&codec->dapm_widgets); | |
! INIT_LIST_HEAD(&codec->dapm_paths); | |
! snd_soc_codec_set_drvdata(codec, wm8994); | |
! codec->control_data = dev_get_drvdata(pdev->dev.parent); | |
! codec->name = "WM8994"; | |
! codec->owner = THIS_MODULE; | |
! codec->read = wm8994_read; | |
! codec->write = wm8994_write; | |
! codec->readable_register = wm8994_readable; | |
! codec->bias_level = SND_SOC_BIAS_OFF; | |
! codec->set_bias_level = wm8994_set_bias_level; | |
! codec->dai = &wm8994_dai[0]; | |
! codec->num_dai = 3; | |
! codec->reg_cache_size = WM8994_MAX_REGISTER; | |
! codec->reg_cache = &wm8994->reg_cache; | |
! codec->dev = &pdev->dev; | |
! | |
! wm8994->pdata = pdev->dev.parent->platform_data; | |
! | |
! /* Fill the cache with physical values we inherited; don't reset */ | |
! ret = wm8994_bulk_read(codec->control_data, 0, | |
! ARRAY_SIZE(wm8994->reg_cache) - 1, | |
! codec->reg_cache); | |
! if (ret < 0) { | |
! dev_err(codec->dev, "Failed to fill register cache: %d\n", | |
! ret); | |
! goto err; | |
} | |
! | |
! /* Clear the cached values for unreadable/volatile registers to | |
! * avoid potential confusion. | |
! */ | |
! for (i = 0; i < ARRAY_SIZE(wm8994->reg_cache); i++) | |
! if (wm8994_volatile(i) || !wm8994_readable(i)) | |
! wm8994->reg_cache[i] = 0; | |
! | |
! /* Set revision-specific configuration */ | |
! rev = snd_soc_read(codec, WM8994_CHIP_REVISION); | |
! switch (rev) { | |
! case 2: | |
! case 3: | |
! wm8994->hubs.dcs_codes = -5; | |
! wm8994->hubs.hp_startup_mode = 1; | |
! wm8994->hubs.dcs_readback_mode = 1; | |
! break; | |
! default: | |
! wm8994->hubs.dcs_readback_mode = 1; | |
! break; | |
} | |
! ret = wm8994_request_irq(codec->control_data, WM8994_IRQ_MIC1_DET, | |
! wm8994_mic_irq, "Mic 1 detect", wm8994); | |
! if (ret != 0) | |
! dev_warn(&pdev->dev, | |
! "Failed to request Mic1 detect IRQ: %d\n", ret); | |
! ret = wm8994_request_irq(codec->control_data, WM8994_IRQ_MIC1_SHRT, | |
! wm8994_mic_irq, "Mic 1 short", wm8994); | |
! if (ret != 0) | |
! dev_warn(&pdev->dev, | |
! "Failed to request Mic1 short IRQ: %d\n", ret); | |
! ret = wm8994_request_irq(codec->control_data, WM8994_IRQ_MIC2_DET, | |
! wm8994_mic_irq, "Mic 2 detect", wm8994); | |
! if (ret != 0) | |
! dev_warn(&pdev->dev, | |
! "Failed to request Mic2 detect IRQ: %d\n", ret); | |
! ret = wm8994_request_irq(codec->control_data, WM8994_IRQ_MIC2_SHRT, | |
! wm8994_mic_irq, "Mic 2 short", wm8994); | |
! if (ret != 0) | |
! dev_warn(&pdev->dev, | |
! "Failed to request Mic2 short IRQ: %d\n", ret); | |
! /* Remember if AIFnLRCLK is configured as a GPIO. This should be | |
! * configured on init - if a system wants to do this dynamically | |
! * at runtime we can deal with that then. | |
! */ | |
! ret = wm8994_reg_read(codec->control_data, WM8994_GPIO_1); | |
! if (ret < 0) { | |
! dev_err(codec->dev, "Failed to read GPIO1 state: %d\n", ret); | |
! goto err_irq; | |
! } | |
! if ((ret & WM8994_GPN_FN_MASK) != WM8994_GP_FN_PIN_SPECIFIC) { | |
! wm8994->lrclk_shared[0] = 1; | |
! wm8994_dai[0].symmetric_rates = 1; | |
! } else { | |
! wm8994->lrclk_shared[0] = 0; | |
! } | |
! ret = wm8994_reg_read(codec->control_data, WM8994_GPIO_6); | |
! if (ret < 0) { | |
! dev_err(codec->dev, "Failed to read GPIO6 state: %d\n", ret); | |
! goto err_irq; | |
! } | |
! if ((ret & WM8994_GPN_FN_MASK) != WM8994_GP_FN_PIN_SPECIFIC) { | |
! wm8994->lrclk_shared[1] = 1; | |
! wm8994_dai[1].symmetric_rates = 1; | |
! } else { | |
! wm8994->lrclk_shared[1] = 0; | |
! } | |
! for (i = 0; i < ARRAY_SIZE(wm8994_dai); i++) | |
! wm8994_dai[i].dev = codec->dev; | |
! wm8994_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
! wm8994_codec = codec; | |
- /* Latch volume updates (right only; we always do left then right). */ | |
- snd_soc_update_bits(codec, WM8994_AIF1_DAC1_RIGHT_VOLUME, | |
- WM8994_AIF1DAC1_VU, WM8994_AIF1DAC1_VU); | |
- snd_soc_update_bits(codec, WM8994_AIF1_DAC2_RIGHT_VOLUME, | |
- WM8994_AIF1DAC2_VU, WM8994_AIF1DAC2_VU); | |
- snd_soc_update_bits(codec, WM8994_AIF2_DAC_RIGHT_VOLUME, | |
- WM8994_AIF2DAC_VU, WM8994_AIF2DAC_VU); | |
- snd_soc_update_bits(codec, WM8994_AIF1_ADC1_RIGHT_VOLUME, | |
- WM8994_AIF1ADC1_VU, WM8994_AIF1ADC1_VU); | |
- snd_soc_update_bits(codec, WM8994_AIF1_ADC2_RIGHT_VOLUME, | |
- WM8994_AIF1ADC2_VU, WM8994_AIF1ADC2_VU); | |
- snd_soc_update_bits(codec, WM8994_AIF2_ADC_RIGHT_VOLUME, | |
- WM8994_AIF2ADC_VU, WM8994_AIF1ADC2_VU); | |
- snd_soc_update_bits(codec, WM8994_DAC1_RIGHT_VOLUME, | |
- WM8994_DAC1_VU, WM8994_DAC1_VU); | |
- snd_soc_update_bits(codec, WM8994_DAC2_RIGHT_VOLUME, | |
- WM8994_DAC2_VU, WM8994_DAC2_VU); | |
- | |
- /* Set the low bit of the 3D stereo depth so TLV matches */ | |
- snd_soc_update_bits(codec, WM8994_AIF1_DAC1_FILTERS_2, | |
- 1 << WM8994_AIF1DAC1_3D_GAIN_SHIFT, | |
- 1 << WM8994_AIF1DAC1_3D_GAIN_SHIFT); | |
- snd_soc_update_bits(codec, WM8994_AIF1_DAC2_FILTERS_2, | |
- 1 << WM8994_AIF1DAC2_3D_GAIN_SHIFT, | |
- 1 << WM8994_AIF1DAC2_3D_GAIN_SHIFT); | |
- snd_soc_update_bits(codec, WM8994_AIF2_DAC_FILTERS_2, | |
- 1 << WM8994_AIF2DAC_3D_GAIN_SHIFT, | |
- 1 << WM8994_AIF2DAC_3D_GAIN_SHIFT); | |
! wm8994_update_class_w(codec); | |
! ret = snd_soc_register_codec(codec); | |
! if (ret != 0) { | |
! dev_err(codec->dev, "Failed to register codec: %d\n", ret); | |
! goto err_irq; | |
! } | |
! ret = snd_soc_register_dais(wm8994_dai, ARRAY_SIZE(wm8994_dai)); | |
! if (ret != 0) { | |
! dev_err(codec->dev, "Failed to register DAIs: %d\n", ret); | |
! goto err_codec; | |
} | |
! platform_set_drvdata(pdev, wm8994); | |
return 0; | |
- | |
- err_codec: | |
- snd_soc_unregister_codec(codec); | |
- err_irq: | |
- wm8994_free_irq(codec->control_data, WM8994_IRQ_MIC2_SHRT, wm8994); | |
- wm8994_free_irq(codec->control_data, WM8994_IRQ_MIC2_DET, wm8994); | |
- wm8994_free_irq(codec->control_data, WM8994_IRQ_MIC1_SHRT, wm8994); | |
- wm8994_free_irq(codec->control_data, WM8994_IRQ_MIC1_DET, wm8994); | |
- err: | |
- kfree(wm8994); | |
- return ret; | |
} | |
! static int __devexit wm8994_codec_remove(struct platform_device *pdev) | |
! { | |
! struct wm8994_priv *wm8994 = platform_get_drvdata(pdev); | |
! struct snd_soc_codec *codec = &wm8994->codec; | |
! | |
! wm8994_set_bias_level(codec, SND_SOC_BIAS_OFF); | |
! snd_soc_unregister_dais(wm8994_dai, ARRAY_SIZE(wm8994_dai)); | |
! snd_soc_unregister_codec(&wm8994->codec); | |
! wm8994_free_irq(codec->control_data, WM8994_IRQ_MIC2_SHRT, wm8994); | |
! wm8994_free_irq(codec->control_data, WM8994_IRQ_MIC2_DET, wm8994); | |
! wm8994_free_irq(codec->control_data, WM8994_IRQ_MIC1_SHRT, wm8994); | |
! wm8994_free_irq(codec->control_data, WM8994_IRQ_MIC1_DET, wm8994); | |
! kfree(wm8994); | |
! wm8994_codec = NULL; | |
! return 0; | |
! } | |
! static struct platform_driver wm8994_codec_driver = { | |
! .driver = { | |
! .name = "wm8994-codec", | |
! .owner = THIS_MODULE, | |
! }, | |
! .probe = wm8994_codec_probe, | |
! .remove = __devexit_p(wm8994_codec_remove), | |
}; | |
! static __init int wm8994_init(void) | |
{ | |
! return platform_driver_register(&wm8994_codec_driver); | |
} | |
! module_init(wm8994_init); | |
! static __exit void wm8994_exit(void) | |
{ | |
! platform_driver_unregister(&wm8994_codec_driver); | |
} | |
module_exit(wm8994_exit); | |
--- 1484,2406 ---- | |
return -EINVAL; | |
} | |
! aif1 |= 0x4000; | |
! wm8994_write(codec,WM8994_AIF1_CONTROL_1, aif1); | |
! wm8994_write(codec,WM8994_AIF1_MASTER_SLAVE, aif2); | |
! wm8994_write( codec,WM8994_AIF1_CONTROL_2, 0x4000); | |
! | |
return 0; | |
} | |
static int wm8994_hw_params(struct snd_pcm_substream *substream, | |
struct snd_pcm_hw_params *params, | |
struct snd_soc_dai *dai) | |
{ | |
struct snd_soc_codec *codec = dai->codec; | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! int ret, i, best, best_val, cur_val; | |
! unsigned int clocking1, clocking3, aif1, aif4,aif5; | |
! | |
! //DEBUG_LOG(""); | |
! | |
! clocking1 = wm8994_read(codec,WM8994_AIF1_BCLK); | |
! clocking1 &= ~ WM8994_AIF1_BCLK_DIV_MASK ; | |
! | |
! clocking3 = wm8994_read(codec, WM8994_AIF1_RATE); | |
! clocking3 &= ~(WM8994_AIF1_SR_MASK | WM8994_AIF1CLK_RATE_MASK); | |
! | |
! aif1 = wm8994_read(codec, WM8994_AIF1_CONTROL_1); | |
! aif1 &= ~WM8994_AIF1_WL_MASK; | |
! aif4 = wm8994_read(codec,WM8994_AIF1ADC_LRCLK); | |
! aif4 &= ~WM8994_AIF1ADC_LRCLK_DIR ; | |
! aif5 = wm8994_read(codec,WM8994_AIF1DAC_LRCLK); | |
! aif5 &= ~WM8994_AIF1DAC_LRCLK_DIR_MASK; | |
! | |
! /* What BCLK do we need? */ | |
! wm8994->fs = params_rate(params); | |
! wm8994->bclk = 2 * wm8994->fs; | |
switch (params_format(params)) { | |
! case SNDRV_PCM_FORMAT_S16_LE: | |
! wm8994->bclk *= 16; | |
! break; | |
! case SNDRV_PCM_FORMAT_S20_3LE: | |
! wm8994->bclk *= 20; | |
! aif1 |= (0x01<< WM8994_AIF1_WL_SHIFT); | |
break; | |
! case SNDRV_PCM_FORMAT_S24_LE: | |
! wm8994->bclk *= 24; | |
! aif1 |= (0x10 << WM8994_AIF1_WL_SHIFT); | |
! break; | |
! case SNDRV_PCM_FORMAT_S32_LE: | |
! wm8994->bclk *= 32; | |
! aif1 |= (0x11 << WM8994_AIF1_WL_SHIFT); | |
! break; | |
! | |
! default: | |
! return -EINVAL; | |
! } | |
! | |
! ret = configure_clock(codec); | |
! if (ret != 0) | |
! return ret; | |
! | |
! dev_dbg(codec->dev, "Target BCLK is %dHz\n", wm8994->bclk); | |
! | |
! /* Select nearest CLK_SYS_RATE */ | |
! if(wm8994->fs == 8000) // Force to select clck_sys_rate 192 on using 8KHz. | |
! best = 3; | |
! else | |
! { | |
! best = 0; | |
! best_val = abs((wm8994->sysclk_rate / clk_sys_rates[0].ratio) - wm8994->fs); | |
! | |
! for (i = 1; i < ARRAY_SIZE(clk_sys_rates); i++) { | |
! cur_val = abs((wm8994->sysclk_rate /clk_sys_rates[i].ratio) - wm8994->fs); | |
! | |
! if (cur_val < best_val) { | |
! best = i; | |
! best_val = cur_val; | |
! } | |
! } | |
! dev_dbg(codec->dev, "Selected CLK_SYS_RATIO of %d\n", clk_sys_rates[best].ratio); | |
} | |
! clocking3 |= (clk_sys_rates[best].clk_sys_rate << WM8994_AIF1CLK_RATE_SHIFT); | |
! | |
! /* SAMPLE_RATE */ | |
best = 0; | |
! best_val = abs(wm8994->fs - sample_rates[0].rate); | |
! for (i = 1; i < ARRAY_SIZE(sample_rates); i++) { | |
! /* Closest match */ | |
! cur_val = abs(wm8994->fs - sample_rates[i].rate); | |
! if (cur_val < best_val) { | |
! best = i; | |
! best_val = cur_val; | |
! } | |
! } | |
! dev_dbg(codec->dev, "Selected SAMPLE_RATE of %dHz\n", | |
! sample_rates[best].rate); | |
! | |
! clocking3 |= (sample_rates[best].sample_rate << WM8994_AIF1_SR_SHIFT); | |
! | |
! /* BCLK_DIV */ | |
best = 0; | |
+ best_val = INT_MAX; | |
for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) { | |
! cur_val = ((wm8994->sysclk_rate ) / bclk_divs[i].div) | |
! - wm8994->bclk; | |
! if (cur_val < 0) /* Table is sorted */ | |
break; | |
+ if (cur_val < best_val) { | |
+ best = i; | |
+ best_val = cur_val; | |
} | |
} | |
+ wm8994->bclk = (wm8994->sysclk_rate ) / bclk_divs[best].div; | |
+ dev_dbg(codec->dev, "Selected BCLK_DIV of %d for %dHz BCLK\n", | |
+ bclk_divs[best].div, wm8994->bclk); | |
+ | |
+ clocking1 |= bclk_divs[best].bclk_div << WM8994_AIF1_BCLK_DIV_SHIFT; | |
+ | |
+ /* LRCLK is a simple fraction of BCLK */ | |
+ dev_dbg(codec->dev, "LRCLK_RATE is %d\n", wm8994->bclk / wm8994->fs); | |
+ | |
+ aif4 |= wm8994->bclk / wm8994->fs; | |
+ aif5 |= wm8994->bclk / wm8994->fs; | |
+ #ifdef HDMI_USE_AUDIO | |
+ if(wm8994->fs == 44100) | |
+ wm8994_write(codec,WM8994_AIF1_BCLK,0x70); //set bclk to 32fs for 44.1kHz 16 bit playback. | |
+ #endif | |
+ | |
+ //TODO...we need to set proper BCLK & LRCLK to support different frequency songs..In modifying | |
+ //BCLK & LRCLK , its giving noisy and improper frequency sound..this has to be checked | |
+ #ifndef CONFIG_SND_S5P_WM8994_MASTER | |
+ //wm8994_write(codec,WM8994_AIF1_BCLK, clocking1); | |
+ //wm8994_write(codec,WM8994_AIF1ADC_LRCLK, aif4); | |
+ //wm8994_write(codec,WM8994_AIF1DAC_LRCLK, aif5); | |
+ #endif | |
+ wm8994_write(codec,WM8994_AIF1_RATE, clocking3); | |
+ wm8994_write(codec, WM8994_AIF1_CONTROL_1, aif1); | |
+ | |
return 0; | |
} | |
! | |
! | |
! static int wm8994_digital_mute(struct snd_soc_dai *codec_dai, int mute) | |
{ | |
+ //Implementation has to be tested properly. | |
+ #if 0 | |
+ unsigned int reg; | |
struct snd_soc_codec *codec = codec_dai->codec; | |
! reg = wm8994_read(codec, WM8994_DAC_SOFTMUTE); | |
! reg &= ~WM8994_DAC_SOFTMUTEMODE_MASK; | |
if (mute) | |
! reg |= WM8994_DAC_SOFTMUTEMODE; | |
else | |
! reg &= ~WM8994_DAC_SOFTMUTEMODE; | |
! | |
! wm8994_write(codec, WM8994_DAC_SOFTMUTEMODE_MASK, reg); | |
! #endif | |
! #if 0 | |
! struct snd_soc_codec *codec = codec_dai->codec; | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! | |
! DEBUG_LOG("Mute =[%d], current Path = [%d]", mute, wm8994->cur_path); | |
! #endif | |
return 0; | |
} | |
! static int wm8994_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *codec_dai) | |
{ | |
struct snd_soc_codec *codec = codec_dai->codec; | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! | |
! if(substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
! wm8994->stream_state |= PCM_STREAM_PLAYBACK; | |
! else | |
! wm8994->stream_state |= PCM_STREAM_CAPTURE; | |
! | |
! if(wm8994->power_state == CODEC_OFF) | |
! { | |
! if(!get_audio_power_status()) | |
! { | |
! DEBUG_LOG("Power on codec"); | |
! audio_power(1); | |
! } | |
! wm8994->power_state = CODEC_ON; | |
! | |
! DEBUG_LOG("Turn on codec"); | |
! wm8994_write(codec, WM8994_POWER_MANAGEMENT_1, 0x3 << WM8994_VMID_SEL_SHIFT | WM8994_BIAS_ENA); | |
! msleep(50); // 20msec -> 50msec delay is recommended by wolfson | |
! wm8994_write(codec, WM8994_POWER_MANAGEMENT_1, WM8994_VMID_SEL_NORMAL | WM8994_BIAS_ENA); | |
! | |
! wm8994_write(codec,WM8994_OVERSAMPLING, 0x0000); | |
! } | |
else | |
! { | |
! DEBUG_LOG("Already turned on codec!!"); | |
! } | |
! return 0; | |
} | |
! void wm8994_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *codec_dai) | |
! { | |
! struct snd_soc_codec *codec = codec_dai->codec; | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! if(wm8994->testmode_config_flag == SEC_TEST_HWCODEC) | |
! { | |
! DEBUG_LOG_ERR("SEC_TEST_HWCODEC is activated!! Don't shutdown(reset) sequence!!"); | |
! return; | |
! } | |
! DEBUG_LOG("Stream_type = %d, Stream_state = [0x%X], Codec State = [0x%X]" | |
! , substream->stream | |
! , wm8994->stream_state | |
! , wm8994->codec_state); | |
! if(substream->stream == SNDRV_PCM_STREAM_CAPTURE) | |
{ | |
! wm8994->stream_state &= ~(PCM_STREAM_CAPTURE); | |
! wm8994->codec_state &= ~(CAPTURE_ACTIVE); | |
! } | |
! else | |
{ | |
! #ifdef CONFIG_SND_S5P_RP | |
! if(!s5p_rp_is_running) | |
! #endif /* CONFIG_SND_S5P_RP */ | |
! { | |
! wm8994->codec_state &= ~(PLAYBACK_ACTIVE); | |
! wm8994->stream_state &= ~(PCM_STREAM_PLAYBACK); | |
! } | |
} | |
! #ifdef CONFIG_SND_S5P_RP | |
! if(!s5p_rp_is_running) | |
! #endif /* CONFIG_SND_S5P_RP */ | |
! { | |
! if((wm8994->codec_state == DEACTIVE) && (wm8994->stream_state == PCM_STREAM_DEACTIVE)) | |
! { | |
! DEBUG_LOG("Turn off Codec!!"); | |
! | |
! audio_ctrl_mic_bias_gpio(0); | |
! | |
! wm8994->power_state = CODEC_OFF; | |
! wm8994->cur_path = PLAYBACK_OFF; | |
! wm8994->rec_path = MIC_OFF; | |
! wm8994->fmradio_path = FMR_OFF; | |
! wm8994->fmr_mix_path = FMR_MIX_OFF; | |
! wm8994->ringtone_active = OFF; | |
! wm8994->call_record_path = CALL_RECORDING_OFF; | |
! wm8994->call_record_ch = CH_OFF; | |
! wm8994_write(codec, WM8994_SOFTWARE_RESET, 0x0000); | |
! #if defined ATTACH_ADDITINAL_PCM_DRIVER | |
! vtCallActive = 0; | |
! #endif | |
! return; | |
} | |
+ } | |
! DEBUG_LOG("Preserve Stream_type = %d, Codec state = [0x%X], Stream State = [0x%X]" | |
! , substream->stream | |
! , wm8994->codec_state | |
! , wm8994->stream_state); | |
! if(substream->stream == SNDRV_PCM_STREAM_CAPTURE) | |
! { | |
! wm8994_disable_rec_path(codec, wm8994->rec_path); | |
! wm8994->codec_state &= ~(CAPTURE_ACTIVE); | |
} | |
+ else // Playback | |
+ { | |
+ if(wm8994->codec_state & CALL_ACTIVE) | |
+ { | |
+ // Call deactive | |
+ // Normal path is set after call end. | |
+ int val; | |
+ | |
+ val = wm8994_read(codec, WM8994_AIF1_DAC1_FILTERS_1); | |
+ val &= ~(WM8994_AIF1DAC1_MUTE_MASK); | |
+ val |= (WM8994_AIF1DAC1_MUTE); | |
+ wm8994_write(codec, WM8994_AIF1_DAC1_FILTERS_1, val); | |
+ } | |
+ else if(wm8994->codec_state & CAPTURE_ACTIVE) | |
+ { | |
+ #ifdef CONFIG_SND_S5P_RP | |
+ if(!s5p_rp_is_running) | |
+ #endif /* CONFIG_SND_S5P_RP */ | |
+ { | |
+ wm8994_disable_playback_path(codec, wm8994->cur_path); | |
+ } | |
+ } | |
+ else if(wm8994->codec_state & FMRADIO_ACTIVE) | |
+ { | |
+ // FM radio deactive | |
+ int val; | |
+ | |
+ val = wm8994_read(codec, WM8994_AIF1_DAC1_FILTERS_1); | |
+ val &= ~(WM8994_AIF1DAC1_MUTE_MASK); | |
+ val |= (WM8994_AIF1DAC1_MUTE); | |
+ wm8994_write(codec, WM8994_AIF1_DAC1_FILTERS_1, val); | |
+ // wm8994_disable_fmradio_path(codec, wm8994->fmradio_path); | |
+ } | |
+ else | |
+ { | |
+ // Playback deactive | |
+ } | |
+ } | |
+ } | |
! #if defined ATTACH_ADDITINAL_PCM_DRIVER | |
! static int wm8994_pcm_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *codec_dai) | |
! { | |
! struct snd_soc_codec *codec = codec_dai->codec; | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! | |
! int reg; | |
! | |
! if(vtCallActive == 0) | |
! { | |
! if(!get_audio_power_status()) | |
! { | |
! DEBUG_LOG("Power on codec"); | |
! audio_power(1); | |
! } | |
! vtCallActive = 1; | |
! wm8994->stream_state = PCM_STREAM_DEACTIVE; | |
! wm8994->codec_state = DEACTIVE; | |
! wm8994->cur_path = PLAYBACK_OFF; | |
! wm8994->rec_path = MIC_OFF; | |
! wm8994->call_record_path = CALL_RECORDING_OFF; | |
! wm8994->call_record_ch = CH_OFF; | |
! wm8994->fmradio_path = FMR_OFF; | |
! wm8994->fmr_mix_path = FMR_MIX_OFF; | |
! wm8994->testmode_config_flag = SEC_NORMAL; | |
! wm8994->power_state = CODEC_OFF; | |
! wm8994->recognition_active = REC_OFF; | |
! #ifdef FEATURE_VSUITE_RECOGNITION | |
! wm8994->vsuite_recognition_active = REC_OFF; | |
! #endif | |
! wm8994->ringtone_active = OFF; | |
! | |
! DEBUG_LOG("Turn on codec!!"); | |
! // For initialize codec. | |
! wm8994_write(codec, WM8994_POWER_MANAGEMENT_1, 0x3 << WM8994_VMID_SEL_SHIFT | WM8994_BIAS_ENA); | |
! msleep(50); | |
! wm8994_write(codec, WM8994_POWER_MANAGEMENT_1, WM8994_VMID_SEL_NORMAL | WM8994_BIAS_ENA); | |
! | |
! wm8994_write(codec,WM8994_OVERSAMPLING, 0x0000); | |
! | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_2, 0x0700 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_3, 0x86C2 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_5, 0x0C88 ); | |
! wm8994_write( codec,WM8994_FLL1_CONTROL_4, 0x00E0 ); | |
! wm8994_write(codec, WM8994_FLL1_CONTROL_1, WM8994_FLL1_FRACN_ENA |WM8994_FLL1_ENA); | |
! | |
! reg = wm8994_read(codec,WM8994_AIF1_CLOCKING_1); | |
! reg |= (WM8994_AIF1CLK_SRC_FLL1 | WM8994_AIF1CLK_ENA); //enable the clocks | |
! wm8994_write(codec, WM8994_AIF1_CLOCKING_1, reg); | |
! | |
! //Enable clocks to the Audio core and sysclk of wm8994 | |
! reg = wm8994_read(codec, WM8994_CLOCKING_1 ); | |
! reg &= ~(WM8994_SYSCLK_SRC_MASK | WM8994_DSP_FSINTCLK_ENA_MASK|WM8994_DSP_FS1CLK_ENA_MASK); | |
! reg |= (WM8994_DSP_FS1CLK_ENA | WM8994_DSP_FSINTCLK_ENA); | |
! wm8994_write(codec,WM8994_CLOCKING_1 ,reg); | |
! } | |
! else | |
! { | |
! DEBUG_LOG("Already turned on codec!!"); | |
} | |
return 0; | |
} | |
#endif | |
! static struct snd_soc_device *wm8994_socdev; | |
! static struct snd_soc_codec *wm8994_codec; | |
! #define WM8994_RATES SNDRV_PCM_RATE_8000_96000 | |
! #define WM8994_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | |
! SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) | |
! static struct snd_soc_dai_ops wm8994_ops = { | |
! .startup = wm8994_startup, | |
! .shutdown = wm8994_shutdown, | |
! .set_sysclk = wm8994_set_sysclk, | |
! .set_fmt = wm8994_set_dai_fmt, | |
! .hw_params = wm8994_hw_params, | |
! .digital_mute = wm8994_digital_mute, | |
! }; | |
! struct snd_soc_dai wm8994_dai = { | |
! | |
! .name = "WM8994 PAIFRX", | |
! .playback = { | |
! .stream_name = "Playback", | |
! .channels_min = 1, | |
! .channels_max = 6, | |
! .rates = WM8994_RATES, | |
! .formats = WM8994_FORMATS, | |
! }, | |
! .capture = { | |
! .stream_name = "Capture", | |
! .channels_min = 1, | |
! .channels_max = 2, | |
! .rates = WM8994_RATES, | |
! .formats = WM8994_FORMATS, | |
! }, | |
! .ops = &wm8994_ops, | |
! }; | |
! EXPORT_SYMBOL_GPL(wm8994_dai); | |
! #if defined ATTACH_ADDITINAL_PCM_DRIVER | |
! static struct snd_soc_dai_ops wm8994_pcm_ops = { | |
! .startup = wm8994_pcm_startup, | |
! }; | |
! | |
! struct snd_soc_dai wm8994_pcm_dai = { | |
! | |
! .name = "WM8994 PCM", | |
! .playback = { | |
! .stream_name = "Playback", | |
! .channels_min = 1, | |
! .channels_max = 6, | |
! .rates = WM8994_RATES, | |
! .formats = WM8994_FORMATS, | |
! }, | |
! .capture = { | |
! .stream_name = "Capture", | |
! .channels_min = 1, | |
! .channels_max = 2, | |
! .rates = WM8994_RATES, | |
! .formats = WM8994_FORMATS, | |
! }, | |
! .ops = &wm8994_pcm_ops, | |
! }; | |
! EXPORT_SYMBOL_GPL(wm8994_pcm_dai); | |
! #endif | |
! /* | |
! * initialise the WM8994 driver | |
! * register the mixer and dsp interfaces with the kernel | |
! */ | |
! //static int wm8994_init(struct snd_soc_device *socdev) | |
! static int wm8994_init(struct wm8994_priv *wm8994_private) | |
{ | |
! struct snd_soc_codec *codec = &wm8994_private->codec; | |
! struct wm8994_priv *wm8994 ; | |
! int ret = 0; | |
! DEBUG_LOG(""); | |
! codec->drvdata = kzalloc(sizeof(struct wm8994_priv), GFP_KERNEL); | |
! if (codec->drvdata == NULL) | |
! return -ENOMEM; | |
! wm8994 = codec->drvdata; | |
! mutex_init(&codec->mutex); | |
! INIT_LIST_HEAD(&codec->dapm_widgets); | |
! INIT_LIST_HEAD(&codec->dapm_paths); | |
! codec->name = "WM8994"; | |
! codec->owner = THIS_MODULE; | |
! codec->read = wm8994_read; | |
! codec->write = wm8994_write; | |
! //codec->set_bias_level = wm8994_set_bias_level; | |
! codec->dai = &wm8994_dai; | |
! codec->num_dai = 1;//ARRAY_SIZE(wm8994_dai); | |
! wm8994->universal_playback_path = universal_wm8994_playback_paths; | |
! wm8994->universal_voicecall_path = universal_wm8994_voicecall_paths; | |
! #ifdef CONFIG_TARGET_LOCALE_KOR | |
! wm8994->universal_voipcall_path = universal_wm8994_voipcall_paths; | |
! #endif | |
! wm8994->universal_mic_path = universal_wm8994_mic_paths; | |
! wm8994->stream_state = PCM_STREAM_DEACTIVE; | |
! wm8994->codec_state = DEACTIVE; | |
! wm8994->cur_path = PLAYBACK_OFF; | |
! wm8994->rec_path = MIC_OFF; | |
! wm8994->call_record_path = CALL_RECORDING_OFF; | |
! wm8994->call_record_ch = CH_OFF; | |
! wm8994->fmradio_path = FMR_OFF; | |
! wm8994->fmr_mix_path = FMR_MIX_OFF; | |
! wm8994->testmode_config_flag = SEC_NORMAL; | |
! wm8994->power_state = CODEC_OFF; | |
! wm8994->recognition_active = REC_OFF; | |
! #ifdef FEATURE_VSUITE_RECOGNITION | |
! wm8994->vsuite_recognition_active = REC_OFF; | |
! #endif | |
! wm8994->ringtone_active = OFF; | |
! wm8994_write(codec,WM8994_SOFTWARE_RESET, 0x0000); | |
! wm8994_write(codec, WM8994_POWER_MANAGEMENT_1, 0x3 << WM8994_VMID_SEL_SHIFT | WM8994_BIAS_ENA); | |
! msleep(50); | |
! wm8994_write(codec, WM8994_POWER_MANAGEMENT_1, WM8994_VMID_SEL_NORMAL | WM8994_BIAS_ENA); | |
! | |
! wm8994_socdev->card->codec = codec; | |
! wm8994_codec = codec; | |
! /* register pcms */ | |
! ret = snd_soc_new_pcms(wm8994_socdev, SNDRV_DEFAULT_IDX1, | |
! SNDRV_DEFAULT_STR1); | |
! if (ret < 0) { | |
! DEBUG_LOG_ERR("failed to create pcms"); | |
! goto pcm_err; | |
} | |
! wm8994_add_controls(codec); | |
! wm8994_add_widgets(codec); | |
! return ret; | |
! | |
! pcm_err: | |
! //kfree(codec->reg_cache); | |
! return ret; | |
} | |
! #if defined ATTACH_ADDITINAL_PCM_DRIVER | |
! static struct snd_soc_device *wm8994_pcm_socdev; | |
! static struct snd_soc_codec *wm8994_pcm_codec; | |
! | |
! static int wm8994_pcm_init(struct wm8994_priv *wm8994_private) | |
{ | |
! struct snd_soc_codec *codec = &wm8994_private->codec; | |
! struct wm8994_priv *wm8994; | |
! int ret = 0, val; | |
! DEBUG_LOG(""); | |
! codec->drvdata = kzalloc(sizeof(struct wm8994_priv), GFP_KERNEL); | |
! if (codec->drvdata == NULL) | |
! return -ENOMEM; | |
! wm8994 = codec->drvdata; | |
! mutex_init(&codec->mutex); | |
! INIT_LIST_HEAD(&codec->dapm_widgets); | |
! INIT_LIST_HEAD(&codec->dapm_paths); | |
! codec->name = "WM8994"; | |
! codec->owner = THIS_MODULE; | |
! codec->read = wm8994_read; | |
! codec->write = wm8994_write; | |
! //codec->set_bias_level = wm8994_set_bias_level; | |
! codec->dai = &wm8994_pcm_dai; | |
! codec->num_dai = 1;//ARRAY_SIZE(wm8994_pcm_dai); | |
! wm8994->universal_playback_path = universal_wm8994_playback_paths; | |
! wm8994->universal_voicecall_path = universal_wm8994_voicecall_paths; | |
! #ifdef CONFIG_TARGET_LOCALE_KOR | |
! wm8994->universal_voipcall_path = universal_wm8994_voipcall_paths; | |
! #endif | |
! wm8994->universal_mic_path = universal_wm8994_mic_paths; | |
! wm8994->stream_state = PCM_STREAM_DEACTIVE; | |
! wm8994->codec_state = DEACTIVE; | |
! wm8994->cur_path = PLAYBACK_OFF; | |
! wm8994->rec_path = MIC_OFF; | |
! wm8994->call_record_path = CALL_RECORDING_OFF; | |
! wm8994->call_record_ch = CH_OFF; | |
! wm8994->fmradio_path = FMR_OFF; | |
! wm8994->fmr_mix_path = FMR_MIX_OFF; | |
! wm8994->testmode_config_flag = SEC_NORMAL; | |
! wm8994->power_state = CODEC_OFF; | |
! wm8994->recognition_active = REC_OFF; | |
! #ifdef FEATURE_VSUITE_RECOGNITION | |
! wm8994->vsuite_recognition_active = REC_OFF; | |
! #endif | |
! wm8994->ringtone_active = OFF; | |
! | |
! | |
! val = wm8994_read(codec,WM8994_POWER_MANAGEMENT_1 ); | |
! val &= ~(WM8994_BIAS_ENA_MASK | WM8994_VMID_SEL_MASK); | |
! val |= (WM8994_BIAS_ENA | WM8994_VMID_SEL_NORMAL); | |
! ret = wm8994_write(codec,WM8994_POWER_MANAGEMENT_1,val); | |
! | |
! if(ret) | |
! printk("first wm8994_write failed in %s..\n",__func__); | |
! | |
! wm8994_pcm_socdev->card->codec = codec; | |
! wm8994_pcm_codec = codec; | |
! | |
! ret = snd_soc_new_pcms(wm8994_pcm_socdev, 1,"wm8994-pcm"); | |
if (ret < 0) { | |
! printk(KERN_ERR "wm8994: failed to create pcms\n"); | |
! goto pcm_err; | |
} | |
! wm8994_add_controls(codec); | |
! // wm8994_add_widgets(codec); | |
! pcm_err: | |
! kfree(codec->reg_cache); | |
! return ret; | |
} | |
+ #endif | |
! /* If the i2c layer weren't so broken, we could pass this kind of data | |
! around */ | |
! | |
! #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
! | |
! /* | |
! * WM8994 2 wire address is determined by GPIO5 | |
! * state during powerup. | |
! * low = 0x1a | |
! * high = 0x1b | |
! */ | |
! static void * control_data1; | |
! | |
! static int wm8994_i2c_probe(struct i2c_client *i2c, | |
! const struct i2c_device_id *id) | |
{ | |
! struct snd_soc_codec *codec ; | |
! struct wm8994_priv* wm8994_priv; | |
! int ret; | |
! DEBUG_LOG(""); | |
! #if 1 | |
! wm8994_priv = kzalloc(sizeof(struct wm8994_priv), GFP_KERNEL); | |
! if (wm8994_priv == NULL) | |
! return -ENOMEM; | |
! #endif | |
! codec = &wm8994_priv->codec; | |
! #ifdef PM_DEBUG | |
! pm_codec = codec; | |
! #endif | |
! | |
! codec->hw_write = (hw_write_t)i2c_master_send; | |
! i2c_set_clientdata(i2c, wm8994_priv); | |
! codec->control_data = i2c; | |
! codec->dev = &i2c->dev; | |
! control_data1 = i2c; | |
! ret = wm8994_init(wm8994_priv); | |
! if (ret < 0) | |
! dev_err(&i2c->dev, "failed to initialize WM8994\n"); | |
! return ret; | |
! } | |
+ static int wm8994_i2c_remove(struct i2c_client *client) | |
+ { | |
+ struct wm8994_priv* wm8994_priv = i2c_get_clientdata(client); | |
+ kfree(wm8994_priv); | |
return 0; | |
} | |
! static const struct i2c_device_id wm8994_i2c_id[] = { | |
! { "wm8994", 0 }, | |
! { } | |
}; | |
! MODULE_DEVICE_TABLE(i2c, wm8994_i2c_id); | |
! static struct i2c_driver wm8994_i2c_driver = { | |
! .driver = { | |
! .name = "WM8994 I2C Codec", | |
! .owner = THIS_MODULE, | |
! }, | |
! .probe = wm8994_i2c_probe, | |
! .remove = wm8994_i2c_remove, | |
! .id_table = wm8994_i2c_id, | |
! }; | |
! struct i2c_board_info info; | |
! struct i2c_adapter *adapter; | |
! struct i2c_client *client; | |
! static int wm8994_add_i2c_device(struct platform_device *pdev, | |
! const struct wm8994_setup_data *setup) | |
! { | |
! int ret; | |
+ ret = i2c_add_driver(&wm8994_i2c_driver); | |
+ if (ret != 0) { | |
+ dev_err(&pdev->dev, "can't add i2c driver\n"); | |
+ return ret; | |
+ } | |
+ | |
return 0; | |
+ | |
+ #if 0 | |
+ err_driver: | |
+ i2c_del_driver(&wm8994_i2c_driver); | |
+ return -ENODEV; | |
+ #endif | |
} | |
! #endif | |
! static int wm8994_probe(struct platform_device *pdev) | |
{ | |
! struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
! struct wm8994_setup_data *setup; | |
! //struct snd_soc_codec *codec; | |
! //struct wm8994_priv *wm8994; | |
! int ret = 0; | |
! | |
! DEBUG_LOG("wm8994_probe"); | |
! /* Board Specific Function */ | |
! audio_init(); | |
! audio_power(1); | |
! msleep(10); | |
! | |
! setup = socdev->codec_data; | |
! wm8994_socdev = socdev; | |
! #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
! if (setup->i2c_address) { | |
! ret = wm8994_add_i2c_device(pdev, setup); | |
} | |
+ #else | |
+ /* Add other interfaces here */ | |
+ #endif | |
+ return ret; | |
+ } | |
! /* power down chip */ | |
! static int wm8994_remove(struct platform_device *pdev) | |
! { | |
! struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
! struct snd_soc_codec *codec = wm8994_codec; | |
! snd_soc_free_pcms(socdev); | |
! snd_soc_dapm_free(socdev); | |
! | |
! #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
! i2c_unregister_device(codec->control_data); | |
! i2c_del_driver(&wm8994_i2c_driver); | |
! #endif | |
! kfree(codec->drvdata); | |
! //kfree(codec); | |
! return 0; | |
} | |
! #if defined ATTACH_ADDITINAL_PCM_DRIVER | |
! static int wm8994_pcm_probe(struct platform_device *pdev) | |
{ | |
! struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
! struct wm8994_setup_data *setup; | |
struct snd_soc_codec *codec; | |
! struct wm8994_priv *wm8994; | |
! int ret = 0; | |
! DEBUG_LOG("wm8994_pcm_probe"); | |
+ #if 1 | |
wm8994 = kzalloc(sizeof(struct wm8994_priv), GFP_KERNEL); | |
! if (wm8994 == NULL) | |
return -ENOMEM; | |
! #endif | |
! //codec = &wm8994_priv->codec; | |
codec = &wm8994->codec; | |
! setup = socdev->codec_data; | |
! wm8994_pcm_socdev = socdev; | |
! #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
! if (setup->i2c_address) { | |
! codec->hw_write = (hw_write_t)i2c_master_send; | |
! codec->control_data = control_data1; | |
! wm8994_pcm_init(wm8994); | |
! //ret = wm8994_add_i2c_device(pdev, setup); | |
} | |
! #if 1 //fixed 212535 (RESOURCE_LEAK) prevent defect | |
! else | |
! { | |
! DEBUG_LOG("Invalid i2c_address"); | |
! kfree(wm8994); | |
! return -1; | |
} | |
+ #endif | |
+ #else | |
+ /* Add other interfaces here */ | |
+ #endif | |
! return ret; | |
! } | |
! /* power down chip */ | |
! static int wm8994_pcm_remove(struct platform_device *pdev) | |
! { | |
! struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
! struct snd_soc_codec *codec = wm8994_pcm_codec; | |
! snd_soc_free_pcms(socdev); | |
! snd_soc_dapm_free(socdev); | |
! #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) // It's executed by I2S | |
! // i2c_unregister_device(codec->control_data); | |
! // i2c_del_driver(&wm8994_i2c_driver); | |
! #endif | |
! kfree(codec->drvdata); | |
! kfree(codec); | |
! return 0; | |
! } | |
! #endif | |
! #ifdef CONFIG_PM | |
! static int wm8994_suspend(struct platform_device *pdev,pm_message_t msg ) | |
! { | |
! //struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
! struct snd_soc_codec *codec = wm8994_codec; | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! DEBUG_LOG("wm8994_suspend : Codec State = [0x%X], Stream State = [0x%X]", wm8994->codec_state, wm8994->stream_state); | |
! | |
! if(wm8994->testmode_config_flag == SEC_TEST_HWCODEC) | |
! { | |
! DEBUG_LOG_ERR("SEC_TEST_HWCODEC is activated!! Skip suspend sequence!!"); | |
! return 0; | |
! } | |
! if(wm8994->codec_state == DEACTIVE && wm8994->stream_state == PCM_STREAM_DEACTIVE) | |
! { | |
! wm8994->power_state = CODEC_OFF; | |
! wm8994_write(codec, WM8994_SOFTWARE_RESET, 0x0000); | |
! audio_power(0); | |
! } | |
! | |
! return 0; | |
! } | |
! static int wm8994_resume(struct platform_device *pdev) | |
! { | |
! //struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
! struct snd_soc_codec *codec = wm8994_codec; | |
! struct wm8994_priv *wm8994 = codec->drvdata; | |
! DEBUG_LOG_ERR("wm8994_resume : codec power_state %d", wm8994->power_state); | |
! if(wm8994->testmode_config_flag == SEC_TEST_HWCODEC) | |
! { | |
! DEBUG_LOG_ERR("SEC_TEST_HWCODEC is activated!! Skip resume sequence!!"); | |
! return 0; | |
} | |
! if(wm8994->power_state == CODEC_OFF) | |
! { | |
! // Turn on sequence by recommend Wolfson. | |
! audio_power(1); | |
! | |
! wm8994->power_state = CODEC_ON; | |
! | |
! wm8994_write(codec, WM8994_POWER_MANAGEMENT_1, 0x3 << WM8994_VMID_SEL_SHIFT | WM8994_BIAS_ENA); | |
! msleep(50); // Wait to setup PLL. | |
! wm8994_write(codec, WM8994_POWER_MANAGEMENT_1, WM8994_VMID_SEL_NORMAL | WM8994_BIAS_ENA); | |
+ wm8994_write(codec,WM8994_OVERSAMPLING, 0x0000); | |
+ } | |
+ else | |
+ { | |
+ DEBUG_LOG("Already turned on codec!!"); | |
+ } | |
+ | |
return 0; | |
} | |
+ #endif | |
! struct snd_soc_codec_device soc_codec_dev_wm8994 = { | |
! .probe = wm8994_probe, | |
! .remove = wm8994_remove, | |
! #ifdef CONFIG_PM | |
! .suspend= wm8994_suspend, | |
! .resume= wm8994_resume, | |
! #endif | |
! }; | |
! EXPORT_SYMBOL_GPL(soc_codec_dev_wm8994); | |
! #if defined ATTACH_ADDITINAL_PCM_DRIVER | |
! struct snd_soc_codec_device soc_codec_dev_pcm_wm8994 = { | |
! .probe = wm8994_pcm_probe, | |
! .remove = wm8994_pcm_remove, | |
! #ifdef CONFIG_PM | |
! // .suspend= wm8994_pcm_suspend, | |
! // .resume= wm8994_pcm_resume, | |
! #endif | |
}; | |
! EXPORT_SYMBOL_GPL(soc_codec_dev_pcm_wm8994); | |
! #endif | |
! | |
! static int __init wm8994_modinit(void) | |
{ | |
! int ret; | |
! ret = snd_soc_register_dai(&wm8994_dai); | |
! if(ret) | |
! printk(KERN_ERR "..dai registration failed..\n"); | |
! | |
! #if defined ATTACH_ADDITINAL_PCM_DRIVER | |
! ret = snd_soc_register_dai(&wm8994_pcm_dai); | |
! if(ret) | |
! printk(KERN_ERR "..pcm_dai registration failed..\n"); | |
! #endif | |
! | |
! return ret; | |
} | |
! module_init(wm8994_modinit); | |
! static void __exit wm8994_exit(void) | |
{ | |
! snd_soc_unregister_dai(&wm8994_dai); | |
! #if defined ATTACH_ADDITINAL_PCM_DRIVER | |
! snd_soc_unregister_dai(&wm8994_pcm_dai); | |
! #endif | |
} | |
module_exit(wm8994_exit); | |
*************** | |
*** 4073,4080 **** | |
} | |
module_exit(wm8994_exit); | |
- | |
MODULE_DESCRIPTION("ASoC WM8994 driver"); | |
! MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); | |
MODULE_LICENSE("GPL"); | |
- MODULE_ALIAS("platform:wm8994-codec"); | |
--- 2404,2409 ---- | |
} | |
module_exit(wm8994_exit); | |
MODULE_DESCRIPTION("ASoC WM8994 driver"); | |
! MODULE_AUTHOR("Shaju Abraham shaju.abraham@samsung.com"); | |
MODULE_LICENSE("GPL"); | |
Only in 1/sound/soc/codecs: wm8994_def.h | |
diff -crB 2/sound/soc/codecs/wm8994.h 1/sound/soc/codecs/wm8994.h | |
*** 2/sound/soc/codecs/wm8994.h 2012-09-24 11:44:03.134793710 +0530 | |
--- 1/sound/soc/codecs/wm8994.h 2011-05-18 12:35:37.000000000 +0530 | |
*************** | |
*** 1,34 **** | |
! /* | |
! * wm8994.h -- WM8994 Soc Audio driver | |
! * | |
! * This program is free software; you can redistribute it and/or modify | |
! * it under the terms of the GNU General Public License version 2 as | |
! * published by the Free Software Foundation. | |
! */ | |
! | |
! #ifndef _WM8994_H | |
! #define _WM8994_H | |
! | |
! #include <sound/soc.h> | |
! | |
! extern struct snd_soc_codec_device soc_codec_dev_wm8994; | |
! extern struct snd_soc_dai wm8994_dai[]; | |
! | |
! /* Sources for AIF1/2 SYSCLK - use with set_dai_sysclk() */ | |
! #define WM8994_SYSCLK_MCLK1 1 | |
! #define WM8994_SYSCLK_MCLK2 2 | |
! #define WM8994_SYSCLK_FLL1 3 | |
! #define WM8994_SYSCLK_FLL2 4 | |
! | |
! #define WM8994_FLL1 1 | |
! #define WM8994_FLL2 2 | |
! | |
! #define WM8994_FLL_SRC_MCLK1 1 | |
! #define WM8994_FLL_SRC_MCLK2 2 | |
! #define WM8994_FLL_SRC_LRCLK 3 | |
! #define WM8994_FLL_SRC_BCLK 4 | |
! | |
! int wm8994_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack, | |
! int micbias, int det, int shrt); | |
! | |
! #endif | |
--- 1,195 ---- | |
! /* | |
! * wm8994.h -- WM8994 Soc Audio driver | |
! * | |
! * This program is free software; you can redistribute it and/or modify | |
! * it under the terms of the GNU General Public License version 2 as | |
! * published by the Free Software Foundation. | |
! */ | |
! | |
! #ifndef _WM8994_H | |
! #define _WM8994_H | |
! | |
! #include <sound/soc.h> | |
! | |
! extern struct snd_soc_codec_device soc_codec_dev_wm8994; | |
! // We don't use array - DW Shim. | |
! //extern struct snd_soc_dai wm8994_dai[]; | |
! | |
! /* Sources for AIF1/2 SYSCLK - use with set_dai_sysclk() */ | |
! #define WM8994_SYSCLK_MCLK1 1 | |
! #define WM8994_SYSCLK_MCLK2 2 | |
! #define WM8994_SYSCLK_FLL1 3 | |
! #define WM8994_SYSCLK_FLL2 4 | |
! | |
! #define WM8994_FLL1 1 | |
! #define WM8994_FLL2 2 | |
! | |
! //----------------------------------------------------------- | |
! // Added belows codes by Samsung Electronics. | |
! | |
! #include "wm8994_def.h" | |
! | |
! extern struct snd_soc_dai wm8994_dai; | |
! | |
! #define FEATURE_VSUITE_RECOGNITION //GNUX@2010.10.01 : Add for VSuite | |
! | |
! #define WM8994_SYSCLK_MCLK 1 | |
! #define WM8994_SYSCLK_FLL 2 | |
! | |
! #define AUDIO_COMMON_DEBUG 1 | |
! //#define WM8994_REGISTER_DUMP | |
! #if defined CONFIG_SND_C110_PCM | |
! #define ATTACH_ADDITINAL_PCM_DRIVER // for VT call. | |
! #endif | |
! //------------------------------------------------ | |
! // Definitions of enum type | |
! //------------------------------------------------ | |
! enum playback_path { PLAYBACK_OFF, RCV, SPK, HP, HP_NO_MIC, BT, SPK_HP, RING_SPK, RING_HP, RING_NO_MIC, RING_SPK_HP, EXTRA_DOCK_SPEAKER, TV_OUT, HDMI_TV_OUT, HDMI_SPK, HDMI_DUAL }; | |
! enum mic_path { MAIN, SUB, BT_REC, MIC_OFF }; | |
! enum fmradio_path { FMR_OFF, FMR_SPK, FMR_HP, FMR_SPK_MIX, FMR_HP_MIX, FMR_DUAL_MIX }; | |
! enum fmradio_mix_path { FMR_MIX_OFF, FMR_MIX_HP, FMR_MIX_SPK, FMR_MIX_DUAL }; | |
! enum power_state { CODEC_OFF, CODEC_ON }; | |
! enum recognition { REC_OFF, REC_ON }; | |
! enum state { OFF, ON }; | |
! enum voice_record_path { CALL_RECORDING_OFF, CALL_RECORDING_MAIN, CALL_RECORDING_SUB}; | |
! | |
! enum factory_test { SEC_NORMAL, SEC_TEST_HWCODEC , SEC_TEST_15MODE, SEC_TEST_PBA_LOOPBACK, SEC_TEST_PBA_DUAL_SPK, SEC_TEST_HQRL_LOOPBACK}; | |
! enum call_recording_channel {CH_OFF, CH_UPLINK, CH_DOWNLINK, CH_UDLINK}; | |
! | |
! #define DEACTIVE 0x00 | |
! #define PLAYBACK_ACTIVE 0x01 | |
! #define CAPTURE_ACTIVE 0x02 | |
! #define CALL_ACTIVE 0x04 | |
! #define FMRADIO_ACTIVE 0x08 | |
! | |
! #define PCM_STREAM_DEACTIVE 0x00 | |
! #define PCM_STREAM_PLAYBACK 0x01 | |
! #define PCM_STREAM_CAPTURE 0x02 | |
! | |
! #define CMD_FMR_INPUT_DEACTIVE 0 // Codec Input PGA off for reducing white noise. | |
! #define CMD_FMR_INPUT_ACTIVE 1 // Codec Input PGA on | |
! #define CMD_FMR_FLAG_CLEAR 2 // Radio flag clear for shutdown - to reduce pop up noise. | |
! #define CMD_FMR_END 3 // Codec off in FM radio mode - to reduce pop up noise. | |
! #define CMD_RECOGNITION_DEACTIVE 4 // Distingush recognition gain. To use default MIC gain. | |
! #define CMD_RECOGNITION_ACTIVE 5 // Distingush recognition gain. To use MIC gain for recognition. | |
! #define CMD_CALL_FLAG_CLEAR 6 // Call flag clear for shutdown - to reduce pop up noise. | |
! #define CMD_CALL_END 7 // Codec off in call mode - to reduce pop up noise. | |
! #ifdef FEATURE_VSUITE_RECOGNITION | |
! #define CMD_VSUITE_RECOGNITION_DEACTIVE 8 // Distingush vsuite recognition gain. To use default MIC gain. | |
! #define CMD_VSUITE_RECOGNITION_ACTIVE 9 // Distingush vsuite recognition gain. To use MIC gain for recognition. | |
! #endif | |
! | |
! #define HPAMP_OFF 0x00 | |
! #define HPAMP_PLAYBACK 0x01 | |
! #define HPAMP_CALL 0x02 | |
! #define HPAMP_FMR 0x04 | |
! #define HPAMP_CH_NORMAL 0x08 | |
! | |
! #define CODEC_TURN_OFF 0x01 | |
! | |
! typedef void (*select_route)(struct snd_soc_codec *); | |
! typedef void (*select_mic_route)(struct snd_soc_codec *); | |
! | |
! struct wm8994_setup_data { | |
! int i2c_bus; | |
! unsigned short i2c_address; | |
! }; | |
! | |
! struct wm8994_priv { | |
! //u16 reg_cache[WM8994_REGISTER_COUNT]; | |
! struct snd_soc_codec codec; | |
! int master; | |
! int sysclk_source; | |
! unsigned int mclk_rate; | |
! unsigned int sysclk_rate; | |
! unsigned int fs; | |
! unsigned int bclk; | |
! unsigned int codec_state; | |
! unsigned int stream_state; | |
! enum playback_path cur_path; | |
! enum mic_path rec_path; | |
! enum fmradio_path fmradio_path; | |
! enum fmradio_mix_path fmr_mix_path; | |
! enum power_state power_state; | |
! enum state recognition_active; // for control gain to voice recognition. | |
! #ifdef FEATURE_VSUITE_RECOGNITION | |
! enum state vsuite_recognition_active; // for control gain to vsuite voice recognition. | |
! #endif | |
! enum state ringtone_active; | |
! enum voice_record_path call_record_path; | |
! enum call_recording_channel call_record_ch; | |
! select_route *universal_playback_path; | |
! select_route *universal_voicecall_path; | |
! #ifdef CONFIG_TARGET_LOCALE_KOR | |
! select_route *universal_voipcall_path; | |
! #endif | |
! select_mic_route *universal_mic_path; | |
! int testmode_config_flag; // for testmode. | |
! }; | |
! | |
! #if AUDIO_COMMON_DEBUG | |
! #define DEBUG_LOG(format,...)\ | |
! printk ("[ "SUBJECT " (%s,%d) ] " format "\n", __func__, __LINE__, ## __VA_ARGS__); | |
! #else | |
! #define DEBUG_LOG(format,...) | |
! #endif | |
! | |
! #define DEBUG_LOG_ERR(format,...)\ | |
! printk (KERN_ERR "[ "SUBJECT " (%s,%d) ] " format "\n", __func__, __LINE__, ## __VA_ARGS__); | |
! | |
! // Definitions of function prototype. | |
! inline unsigned int wm8994_read(struct snd_soc_codec *codec,unsigned int reg); | |
! int wm8994_write(struct snd_soc_codec *codec, unsigned int reg, unsigned int value); | |
! void wm8994_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *codec_dai); | |
! int audio_init(void); | |
! int audio_power(int en); | |
! | |
! void wm8994_set_off(struct snd_soc_codec *codec); | |
! void wm8994_disable_playback_path(struct snd_soc_codec *codec, enum playback_path path); | |
! void wm8994_disable_fmradio_path(struct snd_soc_codec *codec, enum fmradio_path path); | |
! void wm8994_disable_rec_path(struct snd_soc_codec *codec,enum mic_path rec_path); | |
! void wm8994_record_main_mic( struct snd_soc_codec *codec); | |
! void wm8994_record_headset_mic( struct snd_soc_codec *codec); | |
! void wm8994_record_bluetooth(struct snd_soc_codec *codec); | |
! void wm8994_set_playback_receiver(struct snd_soc_codec *codec); | |
! void wm8994_set_playback_headset(struct snd_soc_codec *codec); | |
! void wm8994_set_playback_speaker(struct snd_soc_codec *codec); | |
! void wm8994_set_playback_speaker_headset(struct snd_soc_codec *codec); | |
! void wm8994_set_playback_bluetooth(struct snd_soc_codec *codec); | |
! void wm8994_set_playback_extra_dock_speaker(struct snd_soc_codec *codec); | |
! void wm8994_set_playback_hdmi_tvout(struct snd_soc_codec *codec); | |
! void wm8994_set_playback_speaker_hdmitvout(struct snd_soc_codec *codec); | |
! void wm8994_set_playback_speakerheadset_hdmitvout(struct snd_soc_codec *codec); | |
! void wm8994_set_voicecall_common_setting(struct snd_soc_codec *codec); | |
! void wm8994_set_voicecall_receiver(struct snd_soc_codec *codec); | |
! void wm8994_set_voicecall_headphone(struct snd_soc_codec *codec); | |
! void wm8994_set_voicecall_headset(struct snd_soc_codec *codec); | |
! void wm8994_set_voicecall_speaker(struct snd_soc_codec *codec); | |
! void wm8994_set_voicecall_bluetooth(struct snd_soc_codec *codec); | |
! void wm8994_set_voicecall_record(struct snd_soc_codec *codec, int path_num); | |
! void wm8994_call_recording_change_path(struct snd_soc_codec *codec); | |
! void wm8994_set_voicecall_record_off(struct snd_soc_codec *codec); | |
! void wm8994_set_fmradio_common(struct snd_soc_codec *codec, int onoff); | |
! void wm8994_set_fmradio_headset(struct snd_soc_codec *codec); | |
! void wm8994_set_fmradio_speaker(struct snd_soc_codec *codec); | |
! void wm8994_set_fmradio_headset_mix(struct snd_soc_codec *codec); | |
! void wm8994_set_fmradio_speaker_mix(struct snd_soc_codec *codec); | |
! void wm8994_set_fmradio_speaker_headset_mix(struct snd_soc_codec *codec); | |
! #ifdef CONFIG_TARGET_LOCALE_KOR | |
! void wm8994_set_voipcall_receiver(struct snd_soc_codec *codec); | |
! void wm8994_set_voipcall_headphone(struct snd_soc_codec *codec); | |
! void wm8994_set_voipcall_headset(struct snd_soc_codec *codec); | |
! void wm8994_set_voipcall_speaker(struct snd_soc_codec *codec); | |
! void wm8994_set_voipcall_bluetooth(struct snd_soc_codec *codec); | |
! #endif | |
! #if defined WM8994_REGISTER_DUMP | |
! void wm8994_register_dump(struct snd_soc_codec *codec); | |
! #endif | |
! #endif | |
! | |
! | |
! void audio_ctrl_earmic_bias_gpio(int enable); | |
! void audio_ctrl_mic_bias_gpio(int enable); | |
! | |
! int get_audio_power_status(void); | |
! | |
Only in 1/sound/soc/codecs: wm8994_p1.c | |
diff -crB 2/sound/soc/s3c24xx/Kconfig 1/sound/soc/s3c24xx/Kconfig | |
*** 2/sound/soc/s3c24xx/Kconfig 2012-09-24 11:44:03.130793787 +0530 | |
--- 1/sound/soc/s3c24xx/Kconfig 2011-05-18 12:35:38.000000000 +0530 | |
*************** | |
*** 1,6 **** | |
config SND_S3C24XX_SOC | |
! tristate "SoC Audio for the Samsung S3CXXXX chips" | |
! depends on ARCH_S3C2410 || ARCH_S3C64XX | |
select S3C64XX_DMA if ARCH_S3C64XX | |
help | |
Say Y or M if you want to add support for codecs attached to | |
--- 1,8 ---- | |
config SND_S3C24XX_SOC | |
! tristate "Samsung S5P Audio Drivers" | |
! depends on ARCH_S5PV210 | |
! #tristate "SoC Audio for the Samsung S3CXXXX chips" | |
! #depends on ARCH_S3C2410 || ARCH_S3C64XX | |
select S3C64XX_DMA if ARCH_S3C64XX | |
help | |
Say Y or M if you want to add support for codecs attached to | |
*************** | |
*** 14,19 **** | |
--- 16,24 ---- | |
config SND_S3C_I2SV2_SOC | |
tristate | |
+ config SND_S3C_SOC_PCM | |
+ tristate | |
+ | |
config SND_S3C2412_SOC_I2S | |
tristate | |
select SND_S3C_I2SV2_SOC | |
*************** | |
*** 24,41 **** | |
select SND_S3C_I2SV2_SOC | |
select S3C64XX_DMA | |
! config SND_S3C64XX_SOC_I2S_V4 | |
tristate | |
select SND_S3C_I2SV2_SOC | |
! select S3C64XX_DMA | |
! config SND_S3C_SOC_PCM | |
tristate | |
config SND_S3C_SOC_AC97 | |
tristate | |
select SND_SOC_AC97_BUS | |
config SND_S3C24XX_SOC_NEO1973_WM8753 | |
tristate "SoC I2S Audio support for NEO1973 - WM8753" | |
depends on SND_S3C24XX_SOC && MACH_NEO1973_GTA01 | |
--- 29,51 ---- | |
select SND_S3C_I2SV2_SOC | |
select S3C64XX_DMA | |
! config SND_S5PC1XX_SOC_I2S | |
tristate | |
select SND_S3C_I2SV2_SOC | |
! select S5PC1XX_DMA | |
! config SND_S3C64XX_SOC_I2S_V4 | |
tristate | |
+ select SND_S3C_I2SV2_SOC | |
+ select S3C64XX_DMA | |
config SND_S3C_SOC_AC97 | |
tristate | |
select SND_SOC_AC97_BUS | |
+ config SND_S5P_SOC_WM8994 | |
+ tristate | |
+ | |
config SND_S3C24XX_SOC_NEO1973_WM8753 | |
tristate "SoC I2S Audio support for NEO1973 - WM8753" | |
depends on SND_S3C24XX_SOC && MACH_NEO1973_GTA01 | |
*************** | |
*** 70,75 **** | |
--- 80,112 ---- | |
help | |
Say Y if you want to add support for SoC audio on the SMDK6410. | |
+ config SND_S5P_WM8994 | |
+ tristate "SoC I2S Audio support for WM8994-I2S on UNIVERSAL" | |
+ depends on SND_S3C24XX_SOC | |
+ select SND_S5P_SOC_WM8994 | |
+ select SND_SOC_WM8994 | |
+ select SND_S5PC1XX_SOC_I2S | |
+ | |
+ config SND_S5P_WM8994_MASTER | |
+ bool "WM8994 master" | |
+ depends on SND_S5P_SOC_WM8994 | |
+ default y | |
+ help | |
+ Say Y if you want to run SoC as I2S-Slave and CODEC as I2S-Master. | |
+ | |
+ config S5P_INTERNAL_DMA | |
+ bool "IIS operate with Internal DMA" | |
+ depends on SND_S5P_SOC_WM8994 | |
+ default y | |
+ help | |
+ Say Y for IIS to operate with Internal DMA(IIS's own DMA) | |
+ | |
+ config SND_C110_PCM | |
+ tristate "PCM-wm8994 device" | |
+ depends on SND_S5P_WM8994 | |
+ select SND_S3C_SOC_PCM | |
+ select SND_SOC_WM8994_PCM | |
+ | |
config SND_S3C24XX_SOC_SMDK2443_WM9710 | |
tristate "SoC AC97 Audio support for SMDK2443 - WM9710" | |
depends on SND_S3C24XX_SOC && MACH_SMDK2443 | |
diff -crB 2/sound/soc/s3c24xx/Makefile 1/sound/soc/s3c24xx/Makefile | |
*** 2/sound/soc/s3c24xx/Makefile 2012-09-24 11:44:03.130793787 +0530 | |
--- 1/sound/soc/s3c24xx/Makefile 2011-05-18 12:35:38.000000000 +0530 | |
*************** | |
*** 1,21 **** | |
# S3c24XX Platform Support | |
snd-soc-s3c24xx-objs := s3c-dma.o | |
snd-soc-s3c24xx-i2s-objs := s3c24xx-i2s.o | |
snd-soc-s3c2412-i2s-objs := s3c2412-i2s.o | |
snd-soc-s3c64xx-i2s-objs := s3c64xx-i2s.o | |
snd-soc-s3c-ac97-objs := s3c-ac97.o | |
snd-soc-s3c64xx-i2s-v4-objs := s3c64xx-i2s-v4.o | |
snd-soc-s3c-i2s-v2-objs := s3c-i2s-v2.o | |
! snd-soc-s3c-pcm-objs := s3c-pcm.o | |
obj-$(CONFIG_SND_S3C24XX_SOC) += snd-soc-s3c24xx.o | |
obj-$(CONFIG_SND_S3C24XX_SOC_I2S) += snd-soc-s3c24xx-i2s.o | |
obj-$(CONFIG_SND_S3C_SOC_AC97) += snd-soc-s3c-ac97.o | |
obj-$(CONFIG_SND_S3C2412_SOC_I2S) += snd-soc-s3c2412-i2s.o | |
obj-$(CONFIG_SND_S3C64XX_SOC_I2S) += snd-soc-s3c64xx-i2s.o | |
obj-$(CONFIG_SND_S3C64XX_SOC_I2S_V4) += snd-soc-s3c64xx-i2s-v4.o | |
obj-$(CONFIG_SND_S3C_I2SV2_SOC) += snd-soc-s3c-i2s-v2.o | |
! obj-$(CONFIG_SND_S3C_SOC_PCM) += snd-soc-s3c-pcm.o | |
# S3C24XX Machine Support | |
snd-soc-jive-wm8750-objs := jive_wm8750.o | |
--- 1,31 ---- | |
# S3c24XX Platform Support | |
snd-soc-s3c24xx-objs := s3c-dma.o | |
+ snd-soc-s3c-idma-objs := s3c-idma.o | |
+ snd-soc-s3c-dma-wrapper-objs := s3c-dma-wrapper.o | |
snd-soc-s3c24xx-i2s-objs := s3c24xx-i2s.o | |
snd-soc-s3c2412-i2s-objs := s3c2412-i2s.o | |
snd-soc-s3c64xx-i2s-objs := s3c64xx-i2s.o | |
+ snd-soc-s5pc1xx-i2s-objs := s5pc1xx-i2s.o | |
+ snd-soc-s5p-i2s_sec-objs := s5p-i2s_sec.o | |
snd-soc-s3c-ac97-objs := s3c-ac97.o | |
snd-soc-s3c64xx-i2s-v4-objs := s3c64xx-i2s-v4.o | |
snd-soc-s3c-i2s-v2-objs := s3c-i2s-v2.o | |
! snd-soc-s3c-pcmdev-objs := s3c-pcmdev.o | |
! snd-soc-s3c-dma-pcm-objs := s3c-dma-pcm.o | |
obj-$(CONFIG_SND_S3C24XX_SOC) += snd-soc-s3c24xx.o | |
+ obj-$(CONFIG_SND_S5PC1XX_SOC_I2S) += snd-soc-s3c-idma.o | |
+ obj-$(CONFIG_SND_S5PC1XX_SOC_I2S) += snd-soc-s3c-dma-wrapper.o | |
obj-$(CONFIG_SND_S3C24XX_SOC_I2S) += snd-soc-s3c24xx-i2s.o | |
obj-$(CONFIG_SND_S3C_SOC_AC97) += snd-soc-s3c-ac97.o | |
obj-$(CONFIG_SND_S3C2412_SOC_I2S) += snd-soc-s3c2412-i2s.o | |
obj-$(CONFIG_SND_S3C64XX_SOC_I2S) += snd-soc-s3c64xx-i2s.o | |
+ obj-$(CONFIG_SND_S5PC1XX_SOC_I2S) += snd-soc-s5pc1xx-i2s.o | |
+ obj-$(CONFIG_SND_S5PC1XX_SOC_I2S) += snd-soc-s5p-i2s_sec.o | |
obj-$(CONFIG_SND_S3C64XX_SOC_I2S_V4) += snd-soc-s3c64xx-i2s-v4.o | |
obj-$(CONFIG_SND_S3C_I2SV2_SOC) += snd-soc-s3c-i2s-v2.o | |
! obj-$(CONFIG_SND_S3C_SOC_PCM) += snd-soc-s3c-pcmdev.o | |
! obj-$(CONFIG_SND_S3C_SOC_PCM) += snd-soc-s3c-dma-pcm.o | |
# S3C24XX Machine Support | |
snd-soc-jive-wm8750-objs := jive_wm8750.o | |
*************** | |
*** 30,35 **** | |
--- 40,48 ---- | |
snd-soc-smdk64xx-wm8580-objs := smdk64xx_wm8580.o | |
snd-soc-smdk-wm9713-objs := smdk_wm9713.o | |
+ snd-soc-s5pc1xx-wm8994-objs := s5pc1xx-wm8994.o | |
+ snd-soc-s5pc1xx-pcm-wm8994-objs := s5pc1xx-pcm-wm8994.o | |
+ | |
obj-$(CONFIG_SND_S3C24XX_SOC_JIVE_WM8750) += snd-soc-jive-wm8750.o | |
obj-$(CONFIG_SND_S3C24XX_SOC_NEO1973_WM8753) += snd-soc-neo1973-wm8753.o | |
obj-$(CONFIG_SND_S3C24XX_SOC_NEO1973_GTA02_WM8753) += snd-soc-neo1973-gta02-wm8753.o | |
*************** | |
*** 40,43 **** | |
--- 53,58 ---- | |
obj-$(CONFIG_SND_S3C24XX_SOC_SIMTEC_HERMES) += snd-soc-s3c24xx-simtec-hermes.o | |
obj-$(CONFIG_SND_S3C24XX_SOC_SIMTEC_TLV320AIC23) += snd-soc-s3c24xx-simtec-tlv320aic23.o | |
obj-$(CONFIG_SND_S3C64XX_SOC_WM8580) += snd-soc-smdk64xx-wm8580.o | |
+ obj-$(CONFIG_SND_S5P_WM8994) += snd-soc-s5pc1xx-wm8994.o | |
obj-$(CONFIG_SND_SOC_SMDK_WM9713) += snd-soc-smdk-wm9713.o | |
+ obj-$(CONFIG_SND_C110_PCM) += snd-soc-s5pc1xx-pcm-wm8994.o | |
diff -crB 2/sound/soc/s3c24xx/s3c-dma.c 1/sound/soc/s3c24xx/s3c-dma.c | |
*** 2/sound/soc/s3c24xx/s3c-dma.c 2012-09-24 11:44:03.130793787 +0530 | |
--- 1/sound/soc/s3c24xx/s3c-dma.c 2011-05-18 12:35:38.000000000 +0530 | |
*************** | |
*** 1,4 **** | |
! /* | |
* s3c-dma.c -- ALSA Soc Audio Layer | |
* | |
* (c) 2006 Wolfson Microelectronics PLC. | |
--- 1,4 ---- | |
! /* | |
* s3c-dma.c -- ALSA Soc Audio Layer | |
* | |
* (c) 2006 Wolfson Microelectronics PLC. | |
*************** | |
*** 32,37 **** | |
--- 32,39 ---- | |
#include "s3c-dma.h" | |
+ #define NEW_DMA | |
+ | |
static const struct snd_pcm_hardware s3c_dma_hardware = { | |
.info = SNDRV_PCM_INFO_INTERLEAVED | | |
SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
*************** | |
*** 45,53 **** | |
SNDRV_PCM_FMTBIT_S8, | |
.channels_min = 2, | |
.channels_max = 2, | |
! .buffer_bytes_max = 128*1024, | |
! .period_bytes_min = PAGE_SIZE, | |
! .period_bytes_max = PAGE_SIZE*2, | |
.periods_min = 2, | |
.periods_max = 128, | |
.fifo_size = 32, | |
--- 47,55 ---- | |
SNDRV_PCM_FMTBIT_S8, | |
.channels_min = 2, | |
.channels_max = 2, | |
! .buffer_bytes_max = 128 * 1024, | |
! .period_bytes_min = 128, | |
! .period_bytes_max = 32 * 1024, | |
.periods_min = 2, | |
.periods_max = 128, | |
.fifo_size = 32, | |
*************** | |
*** 87,92 **** | |
--- 89,103 ---- | |
pr_debug("%s: loaded %d, limit %d\n", | |
__func__, prtd->dma_loaded, limit); | |
+ | |
+ #ifdef NEW_DMA | |
+ ret = s3c2410_dma_enqueue_autoload (prtd->params->channel, | |
+ substream, pos, prtd->dma_period, limit); | |
+ if (ret == 0) { | |
+ prtd->dma_loaded += limit; | |
+ pos += prtd->dma_period; | |
+ } | |
+ #else | |
while (prtd->dma_loaded < limit) { | |
unsigned long len = prtd->dma_period; | |
*************** | |
*** 109,115 **** | |
} else | |
break; | |
} | |
! | |
prtd->dma_pos = pos; | |
} | |
--- 120,126 ---- | |
} else | |
break; | |
} | |
! #endif | |
prtd->dma_pos = pos; | |
} | |
*************** | |
*** 133,139 **** | |
--- 144,152 ---- | |
spin_lock(&prtd->lock); | |
if (prtd->state & ST_RUNNING && !s3c_dma_has_circular()) { | |
prtd->dma_loaded--; | |
+ #ifndef NEW_DMA | |
s3c_dma_enqueue(substream); | |
+ #endif | |
} | |
spin_unlock(&prtd->lock); | |
*************** | |
*** 195,200 **** | |
--- 208,218 ---- | |
prtd->dma_start = runtime->dma_addr; | |
prtd->dma_pos = prtd->dma_start; | |
prtd->dma_end = prtd->dma_start + totbytes; | |
+ | |
+ pr_debug("DmaAddr=@%x Total=%lubytes PrdSz=%u #Prds=%u dma_area=0x%x\n", | |
+ prtd->dma_start, totbytes, params_period_bytes(params), | |
+ params_periods(params), (unsigned int)runtime->dma_area); | |
+ | |
spin_unlock_irq(&prtd->lock); | |
return 0; | |
*************** | |
*** 412,418 **** | |
--- 429,439 ---- | |
pr_debug("Entered %s\n", __func__); | |
+ #ifdef CONFIG_S5P_INTERNAL_DMA | |
+ for (stream = 1; stream < 2; stream++) { | |
+ #else | |
for (stream = 0; stream < 2; stream++) { | |
+ #endif | |
substream = pcm->streams[stream].substream; | |
if (!substream) | |
continue; | |
*************** | |
*** 440,453 **** | |
card->dev->dma_mask = &s3c_dma_mask; | |
if (!card->dev->coherent_dma_mask) | |
card->dev->coherent_dma_mask = 0xffffffff; | |
! | |
if (dai->playback.channels_min) { | |
ret = s3c_preallocate_dma_buffer(pcm, | |
SNDRV_PCM_STREAM_PLAYBACK); | |
if (ret) | |
goto out; | |
} | |
! | |
if (dai->capture.channels_min) { | |
ret = s3c_preallocate_dma_buffer(pcm, | |
SNDRV_PCM_STREAM_CAPTURE); | |
--- 461,474 ---- | |
card->dev->dma_mask = &s3c_dma_mask; | |
if (!card->dev->coherent_dma_mask) | |
card->dev->coherent_dma_mask = 0xffffffff; | |
! #if !defined(CONFIG_S5P_INTERNAL_DMA) || defined(CONFIG_SND_S5P_RP) | |
if (dai->playback.channels_min) { | |
ret = s3c_preallocate_dma_buffer(pcm, | |
SNDRV_PCM_STREAM_PLAYBACK); | |
if (ret) | |
goto out; | |
} | |
! #endif | |
if (dai->capture.channels_min) { | |
ret = s3c_preallocate_dma_buffer(pcm, | |
SNDRV_PCM_STREAM_CAPTURE); | |
*************** | |
*** 460,483 **** | |
struct snd_soc_platform s3c24xx_soc_platform = { | |
.name = "s3c24xx-audio", | |
! .pcm_ops = &s3c_dma_ops, | |
.pcm_new = s3c_dma_new, | |
.pcm_free = s3c_dma_free_dma_buffers, | |
}; | |
EXPORT_SYMBOL_GPL(s3c24xx_soc_platform); | |
- static int __init s3c24xx_soc_platform_init(void) | |
- { | |
- return snd_soc_register_platform(&s3c24xx_soc_platform); | |
- } | |
- module_init(s3c24xx_soc_platform_init); | |
- | |
- static void __exit s3c24xx_soc_platform_exit(void) | |
- { | |
- snd_soc_unregister_platform(&s3c24xx_soc_platform); | |
- } | |
- module_exit(s3c24xx_soc_platform_exit); | |
- | |
MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); | |
MODULE_DESCRIPTION("Samsung S3C Audio DMA module"); | |
MODULE_LICENSE("GPL"); | |
--- 481,492 ---- | |
struct snd_soc_platform s3c24xx_soc_platform = { | |
.name = "s3c24xx-audio", | |
! .pcm_ops = &s3c_dma_ops, | |
.pcm_new = s3c_dma_new, | |
.pcm_free = s3c_dma_free_dma_buffers, | |
}; | |
EXPORT_SYMBOL_GPL(s3c24xx_soc_platform); | |
MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); | |
MODULE_DESCRIPTION("Samsung S3C Audio DMA module"); | |
MODULE_LICENSE("GPL"); | |
diff -crB 2/sound/soc/s3c24xx/s3c-dma.h 1/sound/soc/s3c24xx/s3c-dma.h | |
*** 2/sound/soc/s3c24xx/s3c-dma.h 2012-09-24 11:44:03.130793787 +0530 | |
--- 1/sound/soc/s3c24xx/s3c-dma.h 2011-05-18 12:35:38.000000000 +0530 | |
*************** | |
*** 24,31 **** | |
--- 24,33 ---- | |
#define S3C24XX_DAI_I2S 0 | |
+ //#define pr_debug(fmt...) printk(fmt) | |
/* platform data */ | |
extern struct snd_soc_platform s3c24xx_soc_platform; | |
+ extern struct snd_soc_platform s3c24xx_pcm_soc_platform; | |
extern struct snd_ac97_bus_ops s3c24xx_ac97_ops; | |
#endif | |
Only in 1/sound/soc/s3c24xx: s3c-dma-pcm.c | |
Only in 1/sound/soc/s3c24xx: s3c-dma-wrapper.c | |
diff -crB 2/sound/soc/s3c24xx/s3c-i2s-v2.c 1/sound/soc/s3c24xx/s3c-i2s-v2.c | |
*** 2/sound/soc/s3c24xx/s3c-i2s-v2.c 2012-09-24 11:44:03.130793787 +0530 | |
--- 1/sound/soc/s3c24xx/s3c-i2s-v2.c 2011-05-18 12:35:38.000000000 +0530 | |
*************** | |
*** 16,32 **** | |
* option) any later version. | |
*/ | |
#include <linux/delay.h> | |
#include <linux/clk.h> | |
#include <linux/io.h> | |
#include <sound/pcm.h> | |
#include <sound/pcm_params.h> | |
#include <sound/soc.h> | |
#include <mach/dma.h> | |
- #include "regs-i2s-v2.h" | |
#include "s3c-i2s-v2.h" | |
#include "s3c-dma.h" | |
--- 16,40 ---- | |
* option) any later version. | |
*/ | |
+ #include <linux/init.h> | |
+ #include <linux/module.h> | |
+ #include <linux/device.h> | |
#include <linux/delay.h> | |
#include <linux/clk.h> | |
+ #include <linux/kernel.h> | |
#include <linux/io.h> | |
+ #include <sound/core.h> | |
#include <sound/pcm.h> | |
#include <sound/pcm_params.h> | |
+ #include <sound/initval.h> | |
#include <sound/soc.h> | |
+ #include <plat/regs-iis.h> | |
+ #include <mach/map.h> | |
+ #include <mach/regs-audss.h> | |
#include <mach/dma.h> | |
#include "s3c-i2s-v2.h" | |
#include "s3c-dma.h" | |
*************** | |
*** 36,42 **** | |
#define S3C_IIS_V2_SUPPORTED | |
#endif | |
! #ifdef CONFIG_PLAT_S3C64XX | |
#define S3C_IIS_V2_SUPPORTED | |
#endif | |
--- 44,50 ---- | |
#define S3C_IIS_V2_SUPPORTED | |
#endif | |
! #if defined(CONFIG_PLAT_S3C64XX) || defined(CONFIG_PLAT_S5P) | |
#define S3C_IIS_V2_SUPPORTED | |
#endif | |
*************** | |
*** 46,51 **** | |
--- 54,64 ---- | |
#define S3C2412_I2S_DEBUG_CON 0 | |
+ #ifdef CONFIG_SND_S5P_RP | |
+ /* s5p_rp_is_running is from s5p_rp driver */ | |
+ extern volatile int s5p_rp_is_running; | |
+ #endif | |
+ | |
static inline struct s3c_i2sv2_info *to_info(struct snd_soc_dai *cpu_dai) | |
{ | |
return cpu_dai->private_data; | |
*************** | |
*** 56,62 **** | |
#if S3C2412_I2S_DEBUG_CON | |
static void dbg_showcon(const char *fn, u32 con) | |
{ | |
! printk(KERN_DEBUG "%s: LRI=%d, TXFEMPT=%d, RXFEMPT=%d, TXFFULL=%d, RXFFULL=%d\n", fn, | |
bit_set(con, S3C2412_IISCON_LRINDEX), | |
bit_set(con, S3C2412_IISCON_TXFIFO_EMPTY), | |
bit_set(con, S3C2412_IISCON_RXFIFO_EMPTY), | |
--- 69,76 ---- | |
#if S3C2412_I2S_DEBUG_CON | |
static void dbg_showcon(const char *fn, u32 con) | |
{ | |
! printk(KERN_DEBUG "%s: LRI=%d, TXFEMPT=%d, RXFEMPT=%d, TXFFULL=%d,\ | |
! RXFFULL=%d\n", fn, | |
bit_set(con, S3C2412_IISCON_LRINDEX), | |
bit_set(con, S3C2412_IISCON_TXFIFO_EMPTY), | |
bit_set(con, S3C2412_IISCON_RXFIFO_EMPTY), | |
*************** | |
*** 126,143 **** | |
*/ | |
con |= S3C2412_IISCON_TXDMA_PAUSE; | |
- con |= S3C2412_IISCON_TXCH_PAUSE; | |
con &= ~S3C2412_IISCON_TXDMA_ACTIVE; | |
switch (mod & S3C2412_IISMOD_MODE_MASK) { | |
case S3C2412_IISMOD_MODE_TXRX: | |
mod &= ~S3C2412_IISMOD_MODE_MASK; | |
mod |= S3C2412_IISMOD_MODE_RXONLY; | |
break; | |
case S3C2412_IISMOD_MODE_TXONLY: | |
mod &= ~S3C2412_IISMOD_MODE_MASK; | |
con &= ~S3C2412_IISCON_IIS_ACTIVE; | |
break; | |
default: | |
--- 140,180 ---- | |
*/ | |
con |= S3C2412_IISCON_TXDMA_PAUSE; | |
con &= ~S3C2412_IISCON_TXDMA_ACTIVE; | |
+ if (con & S5P_IISCON_TXSDMACTIVE) { /* If sec is active */ | |
+ writel(con, regs + S3C2412_IISCON); | |
+ return; | |
+ } | |
+ #ifdef CONFIG_SND_S5P_RP | |
+ if (!s5p_rp_is_running) /* Check RP is running */ | |
+ con |= S3C2412_IISCON_TXCH_PAUSE; | |
+ #else | |
+ con |= S3C2412_IISCON_TXCH_PAUSE; | |
+ #endif | |
switch (mod & S3C2412_IISMOD_MODE_MASK) { | |
case S3C2412_IISMOD_MODE_TXRX: | |
+ #ifdef CONFIG_SND_S5P_RP | |
+ if (!s5p_rp_is_running) { /* Check RP is running */ | |
+ mod &= ~S3C2412_IISMOD_MODE_MASK; | |
+ mod |= S3C2412_IISMOD_MODE_RXONLY; | |
+ } | |
+ #else | |
mod &= ~S3C2412_IISMOD_MODE_MASK; | |
mod |= S3C2412_IISMOD_MODE_RXONLY; | |
+ #endif | |
break; | |
case S3C2412_IISMOD_MODE_TXONLY: | |
+ #ifdef CONFIG_SND_S5P_RP | |
+ if (!s5p_rp_is_running) { /* Check RP is running */ | |
+ mod &= ~S3C2412_IISMOD_MODE_MASK; | |
+ con &= ~S3C2412_IISCON_IIS_ACTIVE; | |
+ } | |
+ #else | |
mod &= ~S3C2412_IISMOD_MODE_MASK; | |
con &= ~S3C2412_IISCON_IIS_ACTIVE; | |
+ #endif | |
break; | |
default: | |
*************** | |
*** 263,278 **** | |
pr_debug("Entered %s\n", __func__); | |
iismod = readl(i2s->regs + S3C2412_IISMOD); | |
! pr_debug("hw_params r: IISMOD: %x \n", iismod); | |
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
case SND_SOC_DAIFMT_CBM_CFM: | |
i2s->master = 0; | |
! iismod |= S3C2412_IISMOD_SLAVE; | |
break; | |
case SND_SOC_DAIFMT_CBS_CFS: | |
i2s->master = 1; | |
! iismod &= ~S3C2412_IISMOD_SLAVE; | |
break; | |
default: | |
pr_err("unknwon master/slave format\n"); | |
--- 300,336 ---- | |
pr_debug("Entered %s\n", __func__); | |
iismod = readl(i2s->regs + S3C2412_IISMOD); | |
! pr_debug("hw_params r: IISMOD: %x\n", iismod); | |
! | |
! #if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413) | |
! #define IISMOD_MASTER_MASK S3C2412_IISMOD_MASTER_MASK | |
! #define IISMOD_SLAVE S3C2412_IISMOD_SLAVE | |
! #define IISMOD_MASTER S3C2412_IISMOD_MASTER_INTERNAL | |
! #endif | |
! | |
! #if defined(CONFIG_PLAT_S3C64XX) || defined(CONFIG_PLAT_S5P) | |
! /* From Rev1.1 datasheet, we have two master and two slave modes: | |
! * IMS[11:10]: | |
! * 00 = master mode, fed from PCLK | |
! * 01 = master mode, fed from CLKAUDIO | |
! * 10 = slave mode, using PCLK | |
! * 11 = slave mode, using I2SCLK | |
! */ | |
! #define IISMOD_MASTER_MASK (1 << 11) | |
! #define IISMOD_SLAVE (1 << 11) | |
! #define IISMOD_MASTER (0 << 11) | |
! #endif | |
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
case SND_SOC_DAIFMT_CBM_CFM: | |
i2s->master = 0; | |
! iismod &= ~IISMOD_MASTER_MASK; | |
! iismod |= IISMOD_SLAVE; | |
break; | |
case SND_SOC_DAIFMT_CBS_CFS: | |
i2s->master = 1; | |
! iismod &= ~IISMOD_MASTER_MASK; | |
! iismod |= IISMOD_MASTER; | |
break; | |
default: | |
pr_err("unknwon master/slave format\n"); | |
*************** | |
*** 300,317 **** | |
} | |
writel(iismod, i2s->regs + S3C2412_IISMOD); | |
! pr_debug("hw_params w: IISMOD: %x \n", iismod); | |
return 0; | |
} | |
! static int s3c_i2sv2_hw_params(struct snd_pcm_substream *substream, | |
struct snd_pcm_hw_params *params, | |
struct snd_soc_dai *socdai) | |
{ | |
struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
struct snd_soc_dai_link *dai = rtd->dai; | |
struct s3c_i2sv2_info *i2s = to_info(dai->cpu_dai); | |
- struct s3c_dma_params *dma_data; | |
u32 iismod; | |
pr_debug("Entered %s\n", __func__); | |
--- 358,374 ---- | |
} | |
writel(iismod, i2s->regs + S3C2412_IISMOD); | |
! pr_debug("hw_params w: IISMOD: %x\n", iismod); | |
return 0; | |
} | |
! int s3c2412_i2s_hw_params(struct snd_pcm_substream *substream, | |
struct snd_pcm_hw_params *params, | |
struct snd_soc_dai *socdai) | |
{ | |
struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
struct snd_soc_dai_link *dai = rtd->dai; | |
struct s3c_i2sv2_info *i2s = to_info(dai->cpu_dai); | |
u32 iismod; | |
pr_debug("Entered %s\n", __func__); | |
*************** | |
*** 316,397 **** | |
pr_debug("Entered %s\n", __func__); | |
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
! dma_data = i2s->dma_playback; | |
else | |
! dma_data = i2s->dma_capture; | |
! | |
! snd_soc_dai_set_dma_data(dai->cpu_dai, substream, dma_data); | |
/* Working copies of register */ | |
iismod = readl(i2s->regs + S3C2412_IISMOD); | |
pr_debug("%s: r: IISMOD: %x\n", __func__, iismod); | |
! iismod &= ~S3C64XX_IISMOD_BLC_MASK; | |
! /* Sample size */ | |
switch (params_format(params)) { | |
case SNDRV_PCM_FORMAT_S8: | |
! iismod |= S3C64XX_IISMOD_BLC_8BIT; | |
break; | |
case SNDRV_PCM_FORMAT_S16_LE: | |
! break; | |
! case SNDRV_PCM_FORMAT_S24_LE: | |
! iismod |= S3C64XX_IISMOD_BLC_24BIT; | |
break; | |
} | |
! writel(iismod, i2s->regs + S3C2412_IISMOD); | |
! pr_debug("%s: w: IISMOD: %x\n", __func__, iismod); | |
! | |
! return 0; | |
! } | |
! | |
! static int s3c_i2sv2_set_sysclk(struct snd_soc_dai *cpu_dai, | |
! int clk_id, unsigned int freq, int dir) | |
! { | |
! struct s3c_i2sv2_info *i2s = to_info(cpu_dai); | |
! u32 iismod = readl(i2s->regs + S3C2412_IISMOD); | |
! | |
! pr_debug("Entered %s\n", __func__); | |
! pr_debug("%s r: IISMOD: %x\n", __func__, iismod); | |
! | |
! switch (clk_id) { | |
! case S3C_I2SV2_CLKSRC_PCLK: | |
! iismod &= ~S3C2412_IISMOD_IMS_SYSMUX; | |
break; | |
! | |
! case S3C_I2SV2_CLKSRC_AUDIOBUS: | |
! iismod |= S3C2412_IISMOD_IMS_SYSMUX; | |
break; | |
! | |
! case S3C_I2SV2_CLKSRC_CDCLK: | |
! /* Error if controller doesn't have the CDCLKCON bit */ | |
! if (!(i2s->feature & S3C_FEATURE_CDCLKCON)) | |
! return -EINVAL; | |
! | |
! switch (dir) { | |
! case SND_SOC_CLOCK_IN: | |
! iismod |= S3C64XX_IISMOD_CDCLKCON; | |
! break; | |
! case SND_SOC_CLOCK_OUT: | |
! iismod &= ~S3C64XX_IISMOD_CDCLKCON; | |
! break; | |
! default: | |
! return -EINVAL; | |
! } | |
break; | |
- | |
- default: | |
- return -EINVAL; | |
} | |
! writel(iismod, i2s->regs + S3C2412_IISMOD); | |
! pr_debug("%s w: IISMOD: %x\n", __func__, iismod); | |
return 0; | |
} | |
! static int s3c2412_i2s_trigger(struct snd_pcm_substream *substream, int cmd, | |
struct snd_soc_dai *dai) | |
{ | |
struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
--- 373,449 ---- | |
pr_debug("Entered %s\n", __func__); | |
+ | |
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
! snd_soc_dai_set_dma_data(rtd->dai->cpu_dai, substream, | |
! i2s->dma_playback); | |
else | |
! snd_soc_dai_set_dma_data(rtd->dai->cpu_dai, substream, | |
! i2s->dma_capture); | |
/* Working copies of register */ | |
iismod = readl(i2s->regs + S3C2412_IISMOD); | |
pr_debug("%s: r: IISMOD: %x\n", __func__, iismod); | |
! switch (params_channels(params)) { | |
! case 1: | |
! if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
! i2s->dma_playback->dma_size = 2; | |
! else | |
! i2s->dma_capture->dma_size = 2; | |
! break; | |
! case 2: | |
! break; | |
! default: | |
! break; | |
! } | |
! #if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413) | |
switch (params_format(params)) { | |
case SNDRV_PCM_FORMAT_S8: | |
! iismod |= S3C2412_IISMOD_8BIT; | |
break; | |
case SNDRV_PCM_FORMAT_S16_LE: | |
! iismod &= ~S3C2412_IISMOD_8BIT; | |
break; | |
} | |
+ #endif | |
! #if defined(CONFIG_PLAT_S3C64XX) || defined(CONFIG_PLAT_S5P) | |
! iismod &= ~(S3C64XX_IISMOD_BLC_MASK | S3C2412_IISMOD_BCLK_MASK); | |
! /* Sample size */ | |
! switch (params_format(params)) { | |
! case SNDRV_PCM_FORMAT_S8: | |
! /* 8 bit sample, 16fs BCLK */ | |
! iismod |= (S3C64XX_IISMOD_BLC_8BIT | S3C2412_IISMOD_BCLK_16FS); | |
break; | |
! case SNDRV_PCM_FORMAT_S16_LE: | |
! /* 16 bit sample, 32fs BCLK */ | |
break; | |
! case SNDRV_PCM_FORMAT_S24_LE: | |
! /* 24 bit sample, 48fs BCLK */ | |
! iismod |= (S3C64XX_IISMOD_BLC_24BIT | S3C2412_IISMOD_BCLK_48FS); | |
break; | |
} | |
! /* Set the IISMOD[25:24](BLC_P) to same value */ | |
! iismod &= ~(S5P_IISMOD_BLCPMASK); | |
! iismod |= ((iismod & S3C64XX_IISMOD_BLC_MASK) << 11); | |
! | |
! #ifdef CONFIG_SND_S5P_RP | |
! /* ULP Audio use secondary port */ | |
! /* Set the IISMOD[27:26](BLC_S) to same value */ | |
! iismod &= ~(S5P_IISMOD_BLCSMASK); | |
! iismod |= ((iismod & S3C64XX_IISMOD_BLC_MASK) << 13); | |
! #endif | |
! #endif | |
+ writel(iismod, i2s->regs + S3C2412_IISMOD); | |
+ pr_debug("%s: w: IISMOD: %x\n", __func__, iismod); | |
return 0; | |
} | |
+ EXPORT_SYMBOL_GPL(s3c2412_i2s_hw_params); | |
! int s3c2412_i2s_trigger(struct snd_pcm_substream *substream, int cmd, | |
struct snd_soc_dai *dai) | |
{ | |
struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
*************** | |
*** 399,419 **** | |
int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); | |
unsigned long irqs; | |
int ret = 0; | |
- struct s3c_dma_params *dma_data = | |
- snd_soc_dai_get_dma_data(rtd->dai->cpu_dai, substream); | |
pr_debug("Entered %s\n", __func__); | |
switch (cmd) { | |
case SNDRV_PCM_TRIGGER_START: | |
- /* On start, ensure that the FIFOs are cleared and reset. */ | |
- | |
- writel(capture ? S3C2412_IISFIC_RXFLUSH : S3C2412_IISFIC_TXFLUSH, | |
- i2s->regs + S3C2412_IISFIC); | |
- | |
- /* clear again, just in case */ | |
- writel(0x0, i2s->regs + S3C2412_IISFIC); | |
- | |
case SNDRV_PCM_TRIGGER_RESUME: | |
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
if (!i2s->master) { | |
--- 451,461 ---- | |
*************** | |
*** 430,443 **** | |
s3c2412_snd_txctrl(i2s, 1); | |
local_irq_restore(irqs); | |
- | |
- /* | |
- * Load the next buffer to DMA to meet the reqirement | |
- * of the auto reload mechanism of S3C24XX. | |
- * This call won't bother S3C64XX. | |
- */ | |
- s3c2410_dma_ctrl(dma_data->channel, S3C2410_DMAOP_STARTED); | |
- | |
break; | |
case SNDRV_PCM_TRIGGER_STOP: | |
--- 472,477 ---- | |
*************** | |
*** 460,465 **** | |
--- 494,500 ---- | |
exit_err: | |
return ret; | |
} | |
+ EXPORT_SYMBOL_GPL(s3c2412_i2s_trigger); | |
/* | |
* Set S3C2412 Clock dividers | |
*************** | |
*** 474,533 **** | |
switch (div_id) { | |
case S3C_I2SV2_DIV_BCLK: | |
! switch (div) { | |
! case 16: | |
! div = S3C2412_IISMOD_BCLK_16FS; | |
! break; | |
! | |
! case 32: | |
! div = S3C2412_IISMOD_BCLK_32FS; | |
! break; | |
! | |
! case 24: | |
! div = S3C2412_IISMOD_BCLK_24FS; | |
! break; | |
! case 48: | |
! div = S3C2412_IISMOD_BCLK_48FS; | |
! break; | |
! | |
! default: | |
! return -EINVAL; | |
} | |
reg = readl(i2s->regs + S3C2412_IISMOD); | |
reg &= ~S3C2412_IISMOD_BCLK_MASK; | |
writel(reg | div, i2s->regs + S3C2412_IISMOD); | |
! pr_debug("%s: MOD=%08x\n", __func__, readl(i2s->regs + S3C2412_IISMOD)); | |
break; | |
case S3C_I2SV2_DIV_RCLK: | |
! switch (div) { | |
! case 256: | |
! div = S3C2412_IISMOD_RCLK_256FS; | |
! break; | |
! case 384: | |
! div = S3C2412_IISMOD_RCLK_384FS; | |
! break; | |
! | |
! case 512: | |
! div = S3C2412_IISMOD_RCLK_512FS; | |
! break; | |
! | |
! case 768: | |
! div = S3C2412_IISMOD_RCLK_768FS; | |
! break; | |
! | |
! default: | |
! return -EINVAL; | |
} | |
reg = readl(i2s->regs + S3C2412_IISMOD); | |
reg &= ~S3C2412_IISMOD_RCLK_MASK; | |
writel(reg | div, i2s->regs + S3C2412_IISMOD); | |
! pr_debug("%s: MOD=%08x\n", __func__, readl(i2s->regs + S3C2412_IISMOD)); | |
break; | |
case S3C_I2SV2_DIV_PRESCALER: | |
--- 509,578 ---- | |
switch (div_id) { | |
case S3C_I2SV2_DIV_BCLK: | |
! if (div > 3) { | |
! /* convert value to bit field */ | |
! switch (div) { | |
! case 16: | |
! div = S3C2412_IISMOD_BCLK_16FS; | |
! break; | |
! | |
! case 32: | |
! div = S3C2412_IISMOD_BCLK_32FS; | |
! break; | |
! | |
! case 24: | |
! div = S3C2412_IISMOD_BCLK_24FS; | |
! break; | |
! | |
! case 48: | |
! div = S3C2412_IISMOD_BCLK_48FS; | |
! break; | |
! | |
! default: | |
! return -EINVAL; | |
! } | |
} | |
reg = readl(i2s->regs + S3C2412_IISMOD); | |
reg &= ~S3C2412_IISMOD_BCLK_MASK; | |
writel(reg | div, i2s->regs + S3C2412_IISMOD); | |
! pr_debug("%s: MOD=%08x\n", __func__, | |
! readl(i2s->regs + S3C2412_IISMOD)); | |
break; | |
case S3C_I2SV2_DIV_RCLK: | |
! if (div > 3) { | |
! /* convert value to bit field */ | |
! switch (div) { | |
! case 256: | |
! div = S3C2412_IISMOD_RCLK_256FS; | |
! break; | |
! | |
! case 384: | |
! div = S3C2412_IISMOD_RCLK_384FS; | |
! break; | |
! | |
! case 512: | |
! div = S3C2412_IISMOD_RCLK_512FS; | |
! break; | |
! | |
! case 768: | |
! div = S3C2412_IISMOD_RCLK_768FS; | |
! break; | |
! | |
! default: | |
! return -EINVAL; | |
! } | |
} | |
reg = readl(i2s->regs + S3C2412_IISMOD); | |
reg &= ~S3C2412_IISMOD_RCLK_MASK; | |
writel(reg | div, i2s->regs + S3C2412_IISMOD); | |
! pr_debug("%s: MOD=%08x\n", __func__, | |
! readl(i2s->regs + S3C2412_IISMOD)); | |
break; | |
case S3C_I2SV2_DIV_PRESCALER: | |
*************** | |
*** 537,543 **** | |
} else { | |
writel(0x0, i2s->regs + S3C2412_IISPSR); | |
} | |
! pr_debug("%s: PSR=%08x\n", __func__, readl(i2s->regs + S3C2412_IISPSR)); | |
break; | |
default: | |
--- 582,589 ---- | |
} else { | |
writel(0x0, i2s->regs + S3C2412_IISPSR); | |
} | |
! pr_debug("%s: PSR=%08x\n", __func__, | |
! readl(i2s->regs + S3C2412_IISPSR)); | |
break; | |
default: | |
*************** | |
*** 547,579 **** | |
return 0; | |
} | |
- static snd_pcm_sframes_t s3c2412_i2s_delay(struct snd_pcm_substream *substream, | |
- struct snd_soc_dai *dai) | |
- { | |
- struct s3c_i2sv2_info *i2s = to_info(dai); | |
- u32 reg = readl(i2s->regs + S3C2412_IISFIC); | |
- snd_pcm_sframes_t delay; | |
- | |
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
- delay = S3C2412_IISFIC_TXCOUNT(reg); | |
- else | |
- delay = S3C2412_IISFIC_RXCOUNT(reg); | |
- | |
- return delay; | |
- } | |
- | |
- struct clk *s3c_i2sv2_get_clock(struct snd_soc_dai *cpu_dai) | |
- { | |
- struct s3c_i2sv2_info *i2s = to_info(cpu_dai); | |
- u32 iismod = readl(i2s->regs + S3C2412_IISMOD); | |
- | |
- if (iismod & S3C2412_IISMOD_IMS_SYSMUX) | |
- return i2s->iis_cclk; | |
- else | |
- return i2s->iis_pclk; | |
- } | |
- EXPORT_SYMBOL_GPL(s3c_i2sv2_get_clock); | |
- | |
/* default table of all avaialable root fs divisors */ | |
static unsigned int iis_fs_tab[] = { 256, 512, 384, 768 }; | |
--- 593,598 ---- | |
*************** | |
*** 652,689 **** | |
/* record our i2s structure for later use in the callbacks */ | |
dai->private_data = i2s; | |
- if (!base) { | |
- struct resource *res = platform_get_resource(pdev, | |
- IORESOURCE_MEM, | |
- 0); | |
- if (!res) { | |
- dev_err(dev, "Unable to get register resource\n"); | |
- return -ENXIO; | |
- } | |
- | |
- if (!request_mem_region(res->start, resource_size(res), | |
- "s3c64xx-i2s-v4")) { | |
- dev_err(dev, "Unable to request register region\n"); | |
- return -EBUSY; | |
- } | |
- | |
- base = res->start; | |
- } | |
- | |
i2s->regs = ioremap(base, 0x100); | |
if (i2s->regs == NULL) { | |
dev_err(dev, "cannot ioremap registers\n"); | |
return -ENXIO; | |
} | |
- i2s->iis_pclk = clk_get(dev, "iis"); | |
- if (IS_ERR(i2s->iis_pclk)) { | |
- dev_err(dev, "failed to get iis_clock\n"); | |
- iounmap(i2s->regs); | |
- return -ENOENT; | |
- } | |
! clk_enable(i2s->iis_pclk); | |
/* Mark ourselves as in TXRX mode so we can run through our cleanup | |
* process without warnings. */ | |
--- 671,686 ---- | |
/* record our i2s structure for later use in the callbacks */ | |
dai->private_data = i2s; | |
i2s->regs = ioremap(base, 0x100); | |
if (i2s->regs == NULL) { | |
dev_err(dev, "cannot ioremap registers\n"); | |
return -ENXIO; | |
} | |
! #if defined(CONFIG_PLAT_S5P) | |
! writel(((1<<0)|(1<<31)), i2s->regs + S3C2412_IISCON); | |
! #endif | |
/* Mark ourselves as in TXRX mode so we can run through our cleanup | |
* process without warnings. */ | |
*************** | |
*** 703,726 **** | |
struct s3c_i2sv2_info *i2s = to_info(dai); | |
u32 iismod; | |
! if (dai->active) { | |
! i2s->suspend_iismod = readl(i2s->regs + S3C2412_IISMOD); | |
! i2s->suspend_iiscon = readl(i2s->regs + S3C2412_IISCON); | |
! i2s->suspend_iispsr = readl(i2s->regs + S3C2412_IISPSR); | |
! /* some basic suspend checks */ | |
! iismod = readl(i2s->regs + S3C2412_IISMOD); | |
! if (iismod & S3C2412_IISCON_RXDMA_ACTIVE) | |
! pr_warning("%s: RXDMA active?\n", __func__); | |
! if (iismod & S3C2412_IISCON_TXDMA_ACTIVE) | |
! pr_warning("%s: TXDMA active?\n", __func__); | |
! if (iismod & S3C2412_IISCON_IIS_ACTIVE) | |
! pr_warning("%s: IIS active\n", __func__); | |
! } | |
return 0; | |
} | |
--- 701,726 ---- | |
struct s3c_i2sv2_info *i2s = to_info(dai); | |
u32 iismod; | |
! i2s->suspend_iismod = readl(i2s->regs + S3C2412_IISMOD); | |
! i2s->suspend_iiscon = readl(i2s->regs + S3C2412_IISCON); | |
! i2s->suspend_iispsr = readl(i2s->regs + S3C2412_IISPSR); | |
! | |
! /* Is this dai for I2Sv5? */ | |
! if (dai->id == 0) | |
! i2s->suspend_audss_clksrc = readl(S5P_CLKSRC_AUDSS); | |
! /* some basic suspend checks */ | |
! iismod = readl(i2s->regs + S3C2412_IISMOD); | |
! if (iismod & S3C2412_IISCON_RXDMA_ACTIVE) | |
! pr_warning("%s: RXDMA active?\n", __func__); | |
! if (iismod & S3C2412_IISCON_TXDMA_ACTIVE) | |
! pr_warning("%s: TXDMA active?\n", __func__); | |
! if (iismod & S3C2412_IISCON_IIS_ACTIVE) | |
! pr_warning("%s: IIS active\n", __func__); | |
return 0; | |
} | |
*************** | |
*** 732,748 **** | |
pr_info("dai_active %d, IISMOD %08x, IISCON %08x\n", | |
dai->active, i2s->suspend_iismod, i2s->suspend_iiscon); | |
! if (dai->active) { | |
! writel(i2s->suspend_iiscon, i2s->regs + S3C2412_IISCON); | |
! writel(i2s->suspend_iismod, i2s->regs + S3C2412_IISMOD); | |
! writel(i2s->suspend_iispsr, i2s->regs + S3C2412_IISPSR); | |
! writel(S3C2412_IISFIC_RXFLUSH | S3C2412_IISFIC_TXFLUSH, | |
! i2s->regs + S3C2412_IISFIC); | |
! ndelay(250); | |
! writel(0x0, i2s->regs + S3C2412_IISFIC); | |
! } | |
return 0; | |
} | |
--- 732,750 ---- | |
pr_info("dai_active %d, IISMOD %08x, IISCON %08x\n", | |
dai->active, i2s->suspend_iismod, i2s->suspend_iiscon); | |
! writel(i2s->suspend_iiscon, i2s->regs + S3C2412_IISCON); | |
! writel(i2s->suspend_iismod, i2s->regs + S3C2412_IISMOD); | |
! writel(i2s->suspend_iispsr, i2s->regs + S3C2412_IISPSR); | |
! | |
! /* Is this dai for I2Sv5? */ | |
! if (dai->id == 0) | |
! writel(i2s->suspend_audss_clksrc, S5P_CLKSRC_AUDSS); | |
! writel(S3C2412_IISFIC_RXFLUSH | S3C2412_IISFIC_TXFLUSH, | |
! i2s->regs + S3C2412_IISFIC); | |
! ndelay(250); | |
! writel(0x0, i2s->regs + S3C2412_IISFIC); | |
return 0; | |
} | |
*************** | |
*** 756,770 **** | |
struct snd_soc_dai_ops *ops = dai->ops; | |
ops->trigger = s3c2412_i2s_trigger; | |
! if (!ops->hw_params) | |
! ops->hw_params = s3c_i2sv2_hw_params; | |
ops->set_fmt = s3c2412_i2s_set_fmt; | |
ops->set_clkdiv = s3c2412_i2s_set_clkdiv; | |
- ops->set_sysclk = s3c_i2sv2_set_sysclk; | |
- | |
- /* Allow overriding by (for example) IISv4 */ | |
- if (!ops->delay) | |
- ops->delay = s3c2412_i2s_delay; | |
dai->suspend = s3c2412_i2s_suspend; | |
dai->resume = s3c2412_i2s_resume; | |
--- 758,766 ---- | |
struct snd_soc_dai_ops *ops = dai->ops; | |
ops->trigger = s3c2412_i2s_trigger; | |
! ops->hw_params = s3c2412_i2s_hw_params; | |
ops->set_fmt = s3c2412_i2s_set_fmt; | |
ops->set_clkdiv = s3c2412_i2s_set_clkdiv; | |
dai->suspend = s3c2412_i2s_suspend; | |
dai->resume = s3c2412_i2s_resume; | |
diff -crB 2/sound/soc/s3c24xx/s3c-i2s-v2.h 1/sound/soc/s3c24xx/s3c-i2s-v2.h | |
*** 2/sound/soc/s3c24xx/s3c-i2s-v2.h 2012-09-24 11:44:03.130793787 +0530 | |
--- 1/sound/soc/s3c24xx/s3c-i2s-v2.h 2011-05-18 12:35:38.000000000 +0530 | |
*************** | |
*** 25,44 **** | |
#define S3C_I2SV2_DIV_RCLK (2) | |
#define S3C_I2SV2_DIV_PRESCALER (3) | |
- #define S3C_I2SV2_CLKSRC_PCLK 0 | |
- #define S3C_I2SV2_CLKSRC_AUDIOBUS 1 | |
- #define S3C_I2SV2_CLKSRC_CDCLK 2 | |
- | |
- /* Set this flag for I2S controllers that have the bit IISMOD[12] | |
- * bridge/break RCLK signal and external Xi2sCDCLK pin. | |
- */ | |
- #define S3C_FEATURE_CDCLKCON (1 << 0) | |
- | |
/** | |
* struct s3c_i2sv2_info - S3C I2S-V2 information | |
* @dev: The parent device passed to use from the probe. | |
* @regs: The pointer to the device registe block. | |
- * @feature: Set of bit-flags indicating features of the controller. | |
* @master: True if the I2S core is the I2S bit clock master. | |
* @dma_playback: DMA information for playback channel. | |
* @dma_capture: DMA information for capture channel. | |
--- 25,34 ---- | |
*************** | |
*** 53,62 **** | |
struct device *dev; | |
void __iomem *regs; | |
! u32 feature; | |
! | |
! struct clk *iis_pclk; | |
struct clk *iis_cclk; | |
unsigned char master; | |
--- 43,54 ---- | |
struct device *dev; | |
void __iomem *regs; | |
! struct clk *sclk_audio; | |
! struct clk *iis_ipclk; | |
struct clk *iis_cclk; | |
+ struct clk *iis_clk; | |
+ struct clk *iis_busclk; | |
+ struct regulator *regulator; | |
unsigned char master; | |
*************** | |
*** 66,75 **** | |
u32 suspend_iismod; | |
u32 suspend_iiscon; | |
u32 suspend_iispsr; | |
}; | |
- extern struct clk *s3c_i2sv2_get_clock(struct snd_soc_dai *cpu_dai); | |
- | |
struct s3c_i2sv2_rate_calc { | |
unsigned int clk_div; /* for prescaler */ | |
unsigned int fs_div; /* for root frame clock */ | |
--- 58,69 ---- | |
u32 suspend_iismod; | |
u32 suspend_iiscon; | |
u32 suspend_iispsr; | |
+ u32 suspend_iisahb; | |
+ u32 suspend_audss_clksrc; | |
+ u32 suspend_audss_clkdiv; | |
+ u32 suspend_audss_clkgate; | |
}; | |
struct s3c_i2sv2_rate_calc { | |
unsigned int clk_div; /* for prescaler */ | |
unsigned int fs_div; /* for root frame clock */ | |
*************** | |
*** 99,103 **** | |
* soc core. | |
*/ | |
extern int s3c_i2sv2_register_dai(struct snd_soc_dai *dai); | |
! | |
#endif /* __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H */ | |
--- 93,97 ---- | |
* soc core. | |
*/ | |
extern int s3c_i2sv2_register_dai(struct snd_soc_dai *dai); | |
! extern void s5p_idma_init(void *); | |
#endif /* __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H */ | |
Only in 1/sound/soc/s3c24xx: s3c-idma.c | |
Only in 1/sound/soc/s3c24xx: s3c-idma.h | |
Only in 1/sound/soc/s3c24xx: s3c-pcmdev.c | |
Only in 1/sound/soc/s3c24xx: s3c-pcmdev.h | |
Only in 1/sound/soc/s3c24xx: s5pc1xx-i2s.c | |
Only in 1/sound/soc/s3c24xx: s5pc1xx-i2s.h | |
Only in 1/sound/soc/s3c24xx: s5pc1xx-pcm-wm8994.c | |
Only in 1/sound/soc/s3c24xx: s5pc1xx-wm8994.c | |
Only in 1/sound/soc/s3c24xx: s5p-i2s_sec.c | |
Only in 1/sound/soc/s3c24xx: s5p-i2s_sec.h | |
diff -crB 2/sound/soc/soc-dapm.c 1/sound/soc/soc-dapm.c | |
*** 2/sound/soc/soc-dapm.c 2012-09-24 11:44:03.130793787 +0530 | |
--- 1/sound/soc/soc-dapm.c 2011-05-18 12:35:38.000000000 +0530 | |
*************** | |
*** 882,887 **** | |
--- 882,891 ---- | |
dapm_seq_run_coalesced(codec, &pending); | |
} | |
+ #ifdef CONFIG_SND_S5P_RP | |
+ extern volatile int s5p_rp_is_running; | |
+ #endif | |
+ | |
/* | |
* Scan each dapm widget for complete audio path. | |
* A complete path is a route that has valid endpoints i.e.:- | |
*************** | |
*** 982,987 **** | |
--- 986,994 ---- | |
} | |
/* Power down widgets first; try to avoid amplifying pops. */ | |
+ #ifdef CONFIG_SND_S5P_RP | |
+ if (!s5p_rp_is_running) | |
+ #endif | |
dapm_seq_run(codec, &down_list, event, dapm_down_seq); | |
/* Now power up. */ | |
Only in 2/tools/perf: .gitignore | |
Only in 2/usr: .gitignore |
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