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@cleverca22
Created December 2, 2019 03:30
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k LD
ILLEGAL LOAD/STORE EXCEPTION PC:
EPC:
Dram Timing
STUB_SHMOO mode. Bypassing core functionality
DPFE FW hph1_lpddr4
2.19.0.0
SEGMENT
LPDDR4
LPDDR4X
MCB rev=
Ref ID=
Sub Bld=
Single Rank
Dual Rank
DQ VIH Training
CA PD_STREN =
Initial DAC setting =
(VOH/2)
Rank
tuning
CHA converged at DAC=
. Sensed val=
CHB converged at DAC=
legend: 11:6=CHB 5:0=CHA. Add
to col-0
Setting all DACs to .75 VOH meas
PLL ref clk (0x
) exeeds limit (0x
PLL Ref(Hz)=
UI STEPS=
DDR CLK(MHz)=?
DDR CLK(MHz)=
WL CLK dly(ps)=
(user set)
bitT(ps)=
VDLsize(fs)=
CLK_VDL=
LPDDR4 SHMOO 28nm
PHY REG BASE=
MEM_ADDX=
BYTES=
OPTION=
Shmoo completed with errors
Shmoo completed OK
PHY ZQ Calibration Start
nom drive Res =
nom Finger Res =
Sink Res =
0 to 1 transition found at DAC
ndrive_res=
nom_drive_res=
ext_zq_cal_res=
dac=
Final NTERM/NSTREN=
Final NTERM=
desired_phy_odt_ohm=
desired_resistance_ohm=
AR.k
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