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undefined4 isp_plat_write_tiles(uint param_1,uint param_2,int param_3) | |
{ | |
uint uVar1; | |
uVar1 = read_volatile_4(ISP_TILECTRL); | |
if (param_3 != 0) { | |
write_volatile_4(ISP_TILEADDR,param_1 & 0x3fffffff | 0x40000000); | |
} | |
write_volatile_4(ISP_TILECTRL,uVar1 & 0xfffff000 | param_2 & 0xfff); | |
return 0; | |
} | |
int isp_init(void) | |
{ | |
int iVar1; | |
gp_area *gp; | |
undefined auStack24 [4]; | |
*(undefined4 *)&gp->field_0x14ec = 1; | |
*(undefined4 *)&gp->field_0x1fb8 = 0; | |
memset(&gp->field_0x1fbc,0,8); | |
_tx_event_flags_create(&gp->isp_task,"ISPTASKEVENT"); | |
vcos_threadx_map_error(); | |
vcos_thread_create_classic | |
(&gp->field_0x1a22cc,"ISPTASK",isp_task,0,&gp->field_0x1a12cc,0x1000,0x201); | |
_tx_event_flags_get(&gp->isp_task,0x40000,1,auStack24,0xffffffff); | |
iVar1 = *(int *)&gp->field_0x1fc8; | |
if (iVar1 == 0) { | |
iVar1 = 0; | |
} | |
return iVar1; | |
} | |
undefined4 isp_plat_init(void) | |
{ | |
uint uVar1; | |
int iVar2; | |
undefined4 *puVar3; | |
undefined4 uVar4; | |
gp_area *gp; | |
short sStack22; | |
puVar3 = (undefined4 *)&gp->field_0x2330; | |
sysman_register_user_ext(&gp->field_0x2330,&S,0xd3); | |
sysman_set_user_request(*puVar3,0xc,1,1); | |
clockman_setup_clock(0x2a,250000000,0,0); | |
uVar1 = read_volatile_4(ISP_ID); | |
sStack22 = (short)(uVar1 >> 0x10); | |
if (sStack22 == 0x4953) { | |
iVar2 = intctrl_get_func_table(); | |
*(int *)&gp->field_0x1fa4 = iVar2; | |
uVar4 = 0; | |
(**(code **)(iVar2 + 0xc))(0,&gp->field_0x1fa8); | |
iVar2 = systimer_get_func_table(); | |
*(int *)&gp->field_0x2344 = iVar2; | |
(**(code **)(iVar2 + 0xc))(0,&gp->field_0x2348,*(code **)(iVar2 + 0xc)); | |
rtos_register_lisr(72,isp_int_handler,0); | |
(**(code **)(*(int *)&gp->field_0x1fa4 + 0x14))(*(undefined4 *)&gp->field_0x1fa8,72,1); | |
_tx_event_flags_create(&gp->field_0x403a48,&S); | |
vcos_threadx_map_error(); | |
write_volatile_4(ISP_CTRL,0); | |
} | |
else { | |
clockman_setup_clock(0x2a,0,0,0); | |
sysman_set_user_request(*puVar3,0xc,0,1); | |
uVar4 = 0xffffffff; | |
sysman_deregister_user(*puVar3); | |
} | |
return uVar4; | |
} | |
void isp_signal_task(uint param_1) | |
{ | |
gp_area *gp; | |
if (((param_1 & 0xffff) == 0) || (*(int *)&gp->field_0x1fbc != 0)) { | |
_tx_event_flags_set(&gp->isp_task,param_1,0); | |
} | |
return; | |
} | |
undefined4 isp_exit(void) | |
{ | |
gp_area *gp; | |
undefined4 local_8; | |
*(undefined4 *)&gp->field_0x14ec = 0; | |
isp_signal_task(0x20000); | |
vcos_thread_join(&gp->field_0x1a22cc,&local_8); | |
_tx_event_flags_delete(&gp->isp_task); | |
return local_8; | |
} | |
void isp_task(void) | |
{ | |
int iVar1; | |
int iVar2; | |
int iVar3; | |
uint uVar4; | |
int *piVar5; | |
int iVar6; | |
undefined1 *isp_task; | |
int *piVar7; | |
gp_area *gp; | |
undefined4 local_38; | |
uint local_34; | |
iVar2 = isp_plat_init(); | |
*(int *)&gp->field_0x1fc8 = iVar2; | |
if (iVar2 == 0) { | |
isp_plat_read_properties(&gp->field_0x1fc4); | |
} | |
isp_task = &gp->isp_task; | |
_tx_event_flags_set(isp_task,0x40000,0); | |
if (*(int *)&gp->field_0x1fc8 == 0) { | |
piVar5 = (int *)&gp->field_0x1fbc; | |
do { | |
iVar2 = _tx_event_flags_get(isp_task,0xfffbffff,1,&local_34,0xffffffff); | |
if ((iVar2 == 7) || (iVar2 != 0)) { | |
local_34 = 0; | |
} | |
if (((local_34 & 0x40) != 0) && (*(int *)(*piVar5 + 0x118) != 0)) { | |
isp_sw_stage_handler(); | |
} | |
if ((local_34 & 0x8030) != 0) { | |
isp_end_of_tile_handler(); | |
} | |
if ((local_34 & 0x180000) != 0) { | |
piVar7 = (int *)&gp->field_0x1fc0; | |
rtos_latch_get_real(&gp->field_0x1fb8); | |
iVar2 = 0; | |
iVar1 = *(int *)&gp->field_0x1fc0; | |
while (iVar1 != 0) { | |
uVar4 = *(uint *)(iVar1 + 0xe8); | |
iVar6 = *(int *)(iVar1 + 0x11a9c); | |
if ((uVar4 & 0x180000) == 0) { | |
piVar7 = (int *)(iVar1 + 0x11a9c); | |
iVar2 = iVar1; | |
iVar1 = iVar6; | |
} | |
else { | |
if (*piVar5 == iVar1) { | |
*piVar5 = 0; | |
if (*(int *)(iVar1 + 0x82a8) != *(int *)(iVar1 + 0x82a4)) { | |
isp_plat_abort(); | |
} | |
iVar3 = _tx_event_flags_get(isp_task,0xffff,1,&local_38,0); | |
if ((iVar3 == 7) || (iVar3 != 0)) { | |
local_38 = 0; | |
} | |
local_34 = local_34 | 0x10000; | |
uVar4 = *(uint *)(iVar1 + 0xe8); | |
} | |
if ((uVar4 & 0x80000) == 0) { | |
*(undefined4 *)(iVar1 + 0x8294) = 0; | |
*(undefined4 *)(iVar1 + 0xe4) = 0; | |
*(undefined *)(iVar1 + 0x8218) = 0; | |
*(undefined2 *)(iVar1 + 0x150) = 0; | |
} | |
else { | |
if (iVar6 != 0) { | |
*(int *)(iVar6 + 0x11a98) = iVar2; | |
} | |
*piVar7 = iVar6; | |
} | |
vcos_spinlock_sem_post(iVar1 + 0xec); | |
iVar1 = iVar6; | |
} | |
} | |
rtos_latch_put_real(&gp->field_0x1fb8); | |
} | |
if ((local_34 & 0x10000) != 0) { | |
isp_schedule(); | |
} | |
if ((local_34 & 8) != 0) { | |
isp_plat_read_error_flags(&local_38); | |
isp_error_handler(local_38); | |
} | |
} while ((local_34 & 0x20000) == 0); | |
isp_plat_exit(); | |
} | |
return; | |
} | |
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int power_enable_domain(undefined4 param_1,uint param_2) | |
{ | |
int iVar1; | |
int iVar2; | |
int *piVar3; | |
undefined4 uVar4; | |
uint *puVar5; | |
uint uVar6; | |
int iVar7; | |
int iVar8; | |
undefined4 uVar9; | |
uint uVar10; | |
int iVar11; | |
gp_area *gp; | |
uint local_30; | |
uint local_2c; | |
uint local_28; | |
uint local_24; | |
undefined4 local_20; | |
iVar11 = -1; | |
iVar1 = intctrl_get_func_table(); | |
iVar2 = arbiter_get_func_table(); | |
iVar7 = bitcount(param_2); | |
if (iVar7 != 1) { | |
return -1; | |
} | |
iVar7 = &gp->field_0x3fd738; | |
rtos_latch_get_real(iVar7); | |
if (gp->field_0xf24 != 0) { | |
piVar3 = (int *)&gp->field_0xff0; | |
if (param_2 == 0x40000) { | |
iVar8 = 1; | |
*piVar3 = 1; | |
} | |
else { | |
iVar8 = *piVar3; | |
} | |
uVar6 = param_2 & 0x180; | |
if (((iVar8 != 0) && (uVar6 == 0)) || ((iVar8 == 3 && (uVar6 != 0)))) { | |
rtos_latch_put_real(iVar7); | |
return 0; | |
} | |
if (uVar6 != 0) { | |
*piVar3 = iVar8 + 1; | |
} | |
} | |
if (gp->field_0x3fd744 == 0) { | |
power_write_is_enabled(param_2,1); | |
} | |
if (param_2 == 0x100) { | |
uVar9 = 0x2d; | |
clockman_get_clock(1); | |
iVar1 = 0x20; | |
uVar4 = clockman_get_clock(0x2d); | |
/* main crystal frequency */ | |
power_setup_clock(0x2d,19200000,0,0); | |
uVar6 = read_volatile_4(ARM_CONTROL1); | |
write_volatile_4(ARM_CONTROL1,uVar6 & 0xfffffdff); | |
do { | |
iVar1 = iVar1 + -1; | |
} while (0 < iVar1); | |
power_setup_clock(0x2d,0,0,0); | |
do { | |
iVar1 = iVar1 + -1; | |
} while (0 < iVar1); | |
uVar6 = read_volatile_4(PM_PROC); | |
write_volatile_4(PM_PROC,uVar6 | 0x5a000040); | |
goto LAB_0ededd8a; | |
} | |
if ((int)param_2 < 0x101) { | |
if (param_2 == 0x80) { | |
uVar9 = 0x2d; | |
uVar4 = clockman_get_clock(0x2d); | |
power_setup_clock(0x2d,5000000,0,0); | |
puVar5 = &PM_PROC; | |
LAB_0edede52: | |
power_up_domain(puVar5,0xffffffbf); | |
} | |
else { | |
if (param_2 != 0x40) { | |
if (param_2 != 0x20) { | |
switch(param_2) { | |
case 1: | |
break; | |
case 2: | |
uVar9 = clockman_get_clock(0x1c); | |
uVar4 = clockman_get_clock(0x2a); | |
write_volatile_4(CM_PERIICTL,0x5a000000); | |
power_setup_clock(0x1c,0,0,0); | |
power_setup_clock(0x2a,0,0,0); | |
power_up_domain(&PM_IMAGE,0xfffffe3f); | |
power_setup_clock(0x1c,uVar9,0,0); | |
power_setup_clock(0x2a,uVar4,0,0); | |
uVar6 = read_volatile_4(CM_PERIICTL); | |
iVar1 = 0x20; | |
write_volatile_4(CM_PERIICTL,uVar6 | 0x5a000040); | |
do { | |
iVar1 = iVar1 + -1; | |
} while (0 < iVar1); | |
uVar6 = read_volatile_4(CM_PERIICTL); | |
write_volatile_4(CM_PERIICTL,uVar6 & 0xffffffbf | 0x5a000000); | |
do { | |
iVar1 = iVar1 + -1; | |
} while (0 < iVar1); | |
uVar6 = read_volatile_4(PM_IMAGE); | |
write_volatile_4(PM_IMAGE,uVar6 | 0x5a000040); | |
do { | |
iVar1 = iVar1 + -1; | |
} while (0 < iVar1); | |
uVar6 = read_volatile_4(CM_PERIICTL); | |
write_volatile_4(CM_PERIICTL,uVar6 | 0x5a000040); | |
local_24 = read_volatile_4(CM_PERIICTL); | |
write_volatile_4(VEC_DAC_MISC,0x7e); | |
clockman_setup_clock(10,19200000,0,0); | |
clockman_setup_clock(10,0,0,0); | |
uVar6 = read_volatile_4(CM_PERIICTL); | |
write_volatile_4(CM_PERIICTL,uVar6 & 0xffffffbf | 0x5a000000); | |
break; | |
default: | |
goto switchD_0ededa9a_caseD_3; | |
case 4: | |
clockman_get_clock(1); | |
uVar4 = clockman_get_clock(0x1c); | |
power_setup_clock(0x1c,19200000,0,0); | |
uVar6 = read_volatile_4(ASB_H264_S_CTRL); | |
write_volatile_4(ASB_H264_S_CTRL,uVar6 & 0xfffffffe); | |
do { | |
uVar6 = read_volatile_4(ASB_H264_S_CTRL); | |
} while ((uVar6 & 2) != 0); | |
uVar6 = read_volatile_4(ASB_H264_M_CTRL); | |
write_volatile_4(ASB_H264_M_CTRL,uVar6 & 0xfffffffe); | |
do { | |
uVar6 = read_volatile_4(ASB_H264_M_CTRL); | |
} while ((uVar6 & 2) != 0); | |
iVar1 = 0x20; | |
do { | |
iVar1 = iVar1 + -1; | |
} while (0 < iVar1); | |
power_setup_clock(0x1c,0,0,0); | |
do { | |
iVar1 = iVar1 + -1; | |
} while (0 < iVar1); | |
uVar6 = read_volatile_4(PM_IMAGE); | |
write_volatile_4(PM_IMAGE,uVar6 | 0x5a000080); | |
do { | |
iVar1 = iVar1 + -1; | |
} while (0 < iVar1); | |
uVar9 = 0x1c; | |
goto LAB_0ededd92; | |
case 8: | |
uVar9 = 0x2a; | |
clockman_get_clock(1); | |
uVar4 = clockman_get_clock(0x2a); | |
power_setup_clock(0x2a,19200000,0,0); | |
uVar6 = read_volatile_4(ASB_ISP_S_CTRL); | |
write_volatile_4(ASB_ISP_S_CTRL,uVar6 & 0xfffffffe); | |
do { | |
uVar6 = read_volatile_4(ASB_ISP_S_CTRL); | |
} while ((uVar6 & 2) != 0); | |
uVar6 = read_volatile_4(ASB_ISP_M_CTRL); | |
write_volatile_4(ASB_ISP_M_CTRL,uVar6 & 0xfffffffe); | |
do { | |
uVar6 = read_volatile_4(ASB_ISP_M_CTRL); | |
} while ((uVar6 & 2) != 0); | |
iVar1 = 0x20; | |
do { | |
iVar1 = iVar1 + -1; | |
} while (0 < iVar1); | |
power_setup_clock(0x2a,0,0,0); | |
do { | |
iVar1 = iVar1 + -1; | |
} while (0 < iVar1); | |
uVar6 = read_volatile_4(PM_IMAGE); | |
write_volatile_4(PM_IMAGE,uVar6 | 0x5a000100); | |
goto LAB_0ededd8a; | |
case 0x10: | |
uVar6 = read_volatile_4(CM_PERIICTL); | |
write_volatile_4(CM_PERIICTL,uVar6 | 0x5a000040); | |
if (gp->field_0x3fd744 == 0) { | |
(**(code **)(iVar2 + 0xc))(0,&local_20,0,*(code **)(iVar2 + 0xc)); | |
(**(code **)(iVar2 + 0x14))(local_20,8); | |
(**(code **)(iVar2 + 0x10))(local_20); | |
} | |
} | |
goto switchD_0ededa9a_caseD_1; | |
} | |
uVar9 = 0x2b; | |
uVar4 = clockman_get_clock(0x2b); | |
power_setup_clock(0x2b,0,0,0); | |
puVar5 = &PM_GRAFX; | |
goto LAB_0edede52; | |
} | |
uVar9 = 0x2b; | |
clockman_get_clock(1); | |
uVar4 = clockman_get_clock(0x2b); | |
power_setup_clock(0x2b,19200000,0,0); | |
uVar6 = read_volatile_4(ASB_V3D_S_CTRL); | |
write_volatile_4(ASB_V3D_S_CTRL,uVar6 & 0xfffffffe); | |
do { | |
uVar6 = read_volatile_4(ASB_V3D_S_CTRL); | |
} while ((uVar6 & 2) != 0); | |
uVar6 = read_volatile_4(ASB_V3D_M_CTRL); | |
write_volatile_4(ASB_V3D_M_CTRL,uVar6 & 0xfffffffe); | |
do { | |
uVar6 = read_volatile_4(ASB_V3D_M_CTRL); | |
} while ((uVar6 & 2) != 0); | |
iVar1 = 0x20; | |
do { | |
iVar1 = iVar1 + -1; | |
} while (0 < iVar1); | |
power_setup_clock(0x2b,0,0,0); | |
do { | |
iVar1 = iVar1 + -1; | |
} while (0 < iVar1); | |
uVar6 = read_volatile_4(PM_GRAFX); | |
write_volatile_4(PM_GRAFX,uVar6 | 0x5a000040); | |
LAB_0ededd8a: | |
do { | |
iVar1 = iVar1 + -1; | |
} while (0 < iVar1); | |
} | |
LAB_0ededd92: | |
power_setup_clock(uVar9,uVar4,0,0); | |
} | |
else { | |
if (param_2 == 0x2000) { | |
uVar6 = read_volatile_4(PM_CCP2TX); | |
write_volatile_4(PM_CCP2TX,uVar6 | 0x5a000001); | |
uVar6 = read_volatile_4(PM_CCP2TX); | |
write_volatile_4(PM_CCP2TX,uVar6 | 0x5a000002); | |
LAB_0ededf0c: | |
power_delay(10); | |
} | |
else { | |
if (0x2000 < (int)param_2) { | |
if (param_2 == 0x8000) { | |
uVar6 = read_volatile_4(PM_DSI1); | |
write_volatile_4(PM_DSI1,uVar6 | 0x5a000001); | |
uVar6 = read_volatile_4(PM_DSI1); | |
write_volatile_4(PM_DSI1,uVar6 | 0x5a000004); | |
} | |
else { | |
if (0x8000 < (int)param_2) { | |
if (param_2 == 0x10000) { | |
uVar6 = read_volatile_4(PM_USB); | |
write_volatile_4(PM_USB,uVar6 | 0x5a000001); | |
} | |
else { | |
if (param_2 != 0x20000) goto switchD_0ededa9a_caseD_3; | |
if (*(int *)&gp->field_0x3fd73c == 0) { | |
rtos_reset_sleep_time(1); | |
(**(code **)(iVar1 + 0xc))(0,&local_20); | |
(**(code **)(iVar1 + 0x1c))(local_20,_start); | |
(**(code **)(iVar1 + 0x10))(local_20,*(code **)(iVar1 + 0x10)); | |
do { | |
iVar1 = rtos_get_sleep_time(1); | |
} while (iVar1 == 0); | |
*(undefined4 *)&gp->field_0x3fd73c = 1; | |
} | |
} | |
goto switchD_0ededa9a_caseD_1; | |
} | |
if (param_2 != 0x4000) goto switchD_0ededa9a_caseD_3; | |
uVar6 = read_volatile_4(PM_DSI0); | |
write_volatile_4(PM_DSI0,uVar6 | 0x5a000001); | |
uVar6 = read_volatile_4(PM_DSI0); | |
write_volatile_4(PM_DSI0,uVar6 | 0x5a000004); | |
} | |
goto LAB_0ededf0c; | |
} | |
iVar1 = 0; | |
if (param_2 == 0x400) { | |
uVar6 = read_volatile_4(PM_HDMI); | |
write_volatile_4(PM_HDMI,uVar6 | 0x5a080000); | |
uVar6 = read_volatile_4(PM_HDMI); | |
write_volatile_4(PM_HDMI,uVar6 | 0x5a000001); | |
uVar6 = read_volatile_4(PM_HDMI); | |
write_volatile_4(PM_HDMI,uVar6 & 0xfffffffd | 0x5a000000); | |
power_delay(100); | |
uVar6 = read_volatile_4(PM_HDMI); | |
write_volatile_4(PM_HDMI,uVar6 & 0xfff7ffff | 0x5a000000); | |
memcpy(&local_30,L87.L0001TMP,0x10); | |
puVar5 = (uint *)ldconfig_get_config("config_hdmi_boost"); | |
uVar6 = *puVar5; | |
piVar3 = (int *)ldconfig_get_config("config_hdmi_preemphasis"); | |
if (4 < uVar6) { | |
iVar1 = 2; | |
} | |
uVar6 = uVar6 + 4; | |
uVar10 = (*piVar3 + iVar1) * 0x20; | |
update_hdmi_swing(uVar10 | uVar6,0,&local_30); | |
update_hdmi_swing(uVar10 | uVar6,1,&local_30); | |
update_hdmi_swing(uVar10 | uVar6,2,&local_30); | |
update_hdmi_swing(uVar10 | uVar6,3,&local_30); | |
write_volatile_4(A2W_HDMI_CTL3,local_24); | |
write_volatile_4(A2W_HDMI_CTL2,local_28); | |
write_volatile_4(A2W_HDMI_CTL1,local_2c); | |
write_volatile_4(A2W_HDMI_CTL0,local_30); | |
} | |
else { | |
if (0x400 < (int)param_2) { | |
if (param_2 == 0x800) { | |
uVar6 = read_volatile_4(PM_CAM0); | |
write_volatile_4(PM_CAM0,uVar6 | 0x5a000001); | |
uVar6 = read_volatile_4(PM_CAM0); | |
write_volatile_4(PM_CAM0,uVar6 | 0x5a000004); | |
} | |
else { | |
if (param_2 != 0x1000) goto switchD_0ededa9a_caseD_3; | |
uVar6 = read_volatile_4(PM_CAM1); | |
write_volatile_4(PM_CAM1,uVar6 | 0x5a000001); | |
uVar6 = read_volatile_4(PM_CAM1); | |
write_volatile_4(PM_CAM1,uVar6 | 0x5a000004); | |
} | |
goto LAB_0ededf0c; | |
} | |
if (param_2 != 0x200) goto switchD_0ededa9a_caseD_3; | |
} | |
} | |
} | |
switchD_0ededa9a_caseD_1: | |
iVar11 = 0; | |
switchD_0ededa9a_caseD_3: | |
rtos_latch_put_real(iVar7); | |
return iVar11; | |
} | |
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