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@corecode corecode/counter.v
Created Jun 8, 2019

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`default_nettype none
module top
output [7:0] out,
output nenable,
inout irq,
input spi_cs,
input spi_clk,
input spi_di,
inout spi_do,
inout i2c_scl,
inout i2c_sda,
output [2:0] led_rgb
wire clk;
SB_HFOSC #(.CLKHF_DIV("0b01"))
reg [7:0] reset_counter;
wire reset;
initial reset_counter = 0;
initial reset = 1;
always @(posedge clk)
if (reset) begin
reset_counter <= reset_counter + 1;
reset <= ~&reset_counter;
reg [25:0] counter;
always @(posedge clk)
if (reset)
counter <= 0;
counter <= counter + 1;
assign out = counter[17:10];
assign led_rgb = 3'b111;//counter[25:22];
assign nenable = reset;
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