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@cr1901
cr1901 / merge-migen+misoc.sh
Created May 17, 2018 04:10 — forked from mithro/merge-migen+misoc.sh
Prepare an upstream migen/misoc for merging into litex
#! /bin/bash
set -x
set -e
function git_commit {
git commit -a -m"litex import: $1"
}
mkdir -p repos
N0=t(n0, n6, n17)
N1=t(n1, n0, n2)
N2=t(n2, n4, n5)
N3=t(n2, n11, n31)
N4=t(n3, n9, n32)
N5=t(n3, n9, n10)
N6=t(n51, n7, n23)
N7=t(n33, n18, n15)
N8=t(n34, n19, n15)
N9=t(n35, n20, n15)
@cr1901
cr1901 / lcdmain.c
Created February 21, 2018 16:11
2013 MSP430 LCD Demo
#include <msp430g2231.h>
//const char * lcd_string = "Hello World!";
#define DB7 BIT7
#define DB6 BIT6
#define DB5 BIT5
#define DB4 BIT4
#define ADDR(_x) _x << 4
#define RS BIT0
#define EN BIT1
@cr1901
cr1901 / at2xt-feb2.good.ll
Last active February 20, 2018 22:08
AT2XT LLVM IR compare
; ModuleID = 'at2xt0-872cc07d68305d39bbff84ac3dfd15da.rs'
source_filename = "at2xt0-872cc07d68305d39bbff84ac3dfd15da.rs"
target datalayout = "e-m:e-p:16:16-i32:16-i64:16-f32:16-f64:16-a:8-n8:16-S16"
target triple = "msp430-none--elf"
@_ZN5at2xt6keyfsm6keymap11KEYCODE_LUT17hf5fa35200b3b8ae2E = internal unnamed_addr constant [132 x i8] c"\00C\00?=;<X\00DB@>\0F)\00\008*\00\1D\10\02\00\00\00,\1F\1E\11\03\00\00.- \12\05\04\00\009/!\14\13\06\00\0010#\22\15\07\00\00\002$\16\08\09\00\003%\17\18\0B\0A\00\0045&'\19\0C\00\00\00(\00\1A\0D\00\00:6\1C\1B\00+\00\00\00\00\00\00\00\00\0E\00\00O\00KG\00\00\00RSPLMH\01EWNQJ7IF\00\00\00\00A", align 1
@_ZN5at2xt7TIMEOUT17hba6367fa895c65ebE = internal global i8 0, align 1
@_ZN5at2xt9HOST_MODE17he40a9ca556e9d16aE = internal global i8 0, align 1
@_ZN5at2xt10DEVICE_ACK17hab6a8e2159c05eb1E = internal global i8 0, align 1
@_ZN5at2xt9IN_BUFFER17hec6921f8a5936870E = internal unnamed_addr global { [0 x i8], { [0 x i8], { [0 x i8], [16 x i16], [0 x i8], i8, [0 x i8], i8, [0 x i8] }, [0 x
@cr1901
cr1901 / at2xt.ll
Created January 29, 2018 00:57
AT2XT Bad LLVM
; ModuleID = 'at2xt0-77d68ea1ad8be81bc97a6e8a934656bf.rs'
source_filename = "at2xt0-77d68ea1ad8be81bc97a6e8a934656bf.rs"
target datalayout = "e-m:e-p:16:16-i32:16-i64:16-f32:16-f64:16-a:8-n8:16-S16"
target triple = "msp430-none--elf"
@_ZN5at2xt6keyfsm6keymap11KEYCODE_LUT17h83274ebdf4727c78E = internal unnamed_addr constant [132 x i8] c"\00C\00?=;<X\00DB@>\0F)\00\008*\00\1D\10\02\00\00\00,\1F\1E\11\03\00\00.- \12\05\04\00\009/!\14\13\06\00\0010#\22\15\07\00\00\002$\16\08\09\00\003%\17\18\0B\0A\00\0045&'\19\0C\00\00\00(\00\1A\0D\00\00:6\1C\1B\00+\00\00\00\00\00\00\00\00\0E\00\00O\00KG\00\00\00RSPLMH\01EWNQJ7IF\00\00\00\00A", align 1
@_ZN5at2xt9HOST_MODE17h91cc6a6dea55319fE = internal global i8 0, align 1
@_ZN5at2xt10DEVICE_ACK17hf51f838bcce74d5dE = internal global i8 0, align 1
@str.0 = internal constant [43 x i8] c"called `Option::unwrap()` on a `None` value"
@str.1 = internal constant [108 x i8] c"C:\5CUsers\5CWilliam\5C.rustup\5Ctoolchains\5Cnightly-x86_64-pc-windows-gnu\5Clib\5Crustlib\5Csrc\5Crust\5Csrc\5
@cr1901
cr1901 / write_firm.sh
Created December 13, 2017 14:36
HDMI2USB XMODEM Helper Script
#!/bin/sh
if [ "$#" -lt 3 ]; then
echo "Usage: $0 bin-file address interface" >&2
exit 1
fi
LEN_CRC=`~/bin/getcrc32.py $1 | cut -d' ' -f2-`
PROG_CMD="write spi xmodem $2 $LEN_CRC"
@cr1901
cr1901 / supported.md
Last active November 22, 2017 03:41
Proposed Supported Windows Environments for Migen

Migen Supported Environments on Windows

Goal: Least amount of changes/Windows-environment specific code in Migen/MiSoC

Cygwin

  • Migen/MiSoC installed using Cygwin python (3.6- requires patch).
  • ~ provided by Cygwin is home directory.
  • GNU make, chmod provided by Cygwin.
  • gcc provided/compiled using Cygwin.
  • Other command-line programs provided via compilation under Cygwin or Cygwin packages.
  • flterm uses /dev/ttyS* (currently broken).
@cr1901
cr1901 / arm_const.py
Created November 16, 2017 15:05
Get Unique ARM Constants
import itertools
valid = itertools.product(range(0,256), [4**i for i in range(0,16)])
const = []
for k, j in valid:
const.append(k*j)
a = list(set(const))
print(len(a))
b = []
@cr1901
cr1901 / icestorm.py
Last active November 9, 2017 10:20
Synthesis Template IceStorm
# This file is Copyright (c) 2016-2017 William D. Jones <thor0505@comcast.net>
# License: BSD
import os
import sys
import subprocess
from migen.fhdl.structure import _Fragment
from migen.build.generic_platform import *
@cr1901
cr1901 / rot.py
Created November 7, 2017 02:35
IceStorm Improvements Test File
#!/usr/bin/env python3
from migen import *
from migen.build.platforms import icestick
from migen.build.generic_platform import *
from migen.genlib.io import DifferentialOutput
from migen.genlib.resetsync import AsyncResetSynchronizer
class Rot(Module):
def __init__(self):