dump.txt

/home/shreeya/Desktop/workspace/qemu/xtensa-softmmu/qemu-system-xtensa -cpu baytrail -M adsp_byt -d mmu,in_asm -nographic -S > 
bridge-io: qemu-bridge-iram-mem fd 9 region 1 at 0x7fb7fe192000 allocated 81920 bytes
bridge-io: qemu-bridge-dram-mem fd 10 region 2 at 0x7fb7fdfdb000 allocated 163840 bytes
bridge-io: qemu-bridge-dmac0-io fd 11 region 3 at 0x7fb7fe191000 allocated 4096 bytes
bridge-io: qemu-bridge-dmac1-io fd 12 region 4 at 0x7fb7fe190000 allocated 4096 bytes
bridge-io: qemu-bridge-ssp0-io fd 13 region 5 at 0x7fb7fe18f000 allocated 4096 bytes
bridge-io: qemu-bridge-ssp1-io fd 14 region 6 at 0x7fb7fe18e000 allocated 4096 bytes
bridge-io: qemu-bridge-ssp2-io fd 15 region 7 at 0x7fb7fe18d000 allocated 4096 bytes
bridge-io: qemu-bridge-shim-io fd 16 region 8 at 0x7fb7fe18c000 allocated 4096 bytes
bridge-io: qemu-bridge-mbox-io fd 17 region 9 at 0x7fb7fe18b000 allocated 4096 bytes
bridge-io-mq: added /qemu-io-parent-byt
bridge-io-mq: added /qemu-io-child-byt
 ** Baytrail Xtensa HiFi2 EP DSP initialised.
 ** Waiting for host to load firmware...
QEMU 4.2.0 monitor - type 'help' for more information
(qemu) bridge-io: 0 messages are currently on child queue.
bridge-io: msg recv 0 type 1 size 20 msg 32
msg: id 0 msg 32 size 20 type 1
cpu: reset
bridge-io: msg recv 1 type 1 size 20 msg 32
msg: id 1 msg 32 size 20 type 1
bridge-io: msg recv 2 type 1 size 20 msg 32
msg: id 2 msg 32 size 20 type 1
cpu: running
xtensa_cpu_tlb_fill(ff2c0000, 2, 0) -> ff2c0000, ret = 0
----------------
IN: 
0xff2c0000:  j	0xff2c0044

----------------
IN: 
0xff2c0044:  movi.n	a0, 0
0xff2c0046:  wsr.intenable	a0

----------------
IN: 
0xff2c0049:  l32r	a2, 0xff2c0004
0xff2c004c:  rsr.prid	a3
0xff2c004f:  extui	a3, a3, 0, 8
0xff2c0052:  beqz.n	a2, 0xff2c0059

----------------
IN: 
0xff2c0059:  l32r	a2, 0xff2c0008
0xff2c005c:  wsr.vecbase	a2
0xff2c005f:  movi.n	a3, 21
0xff2c0061:  wsr.atomctl	a3
0xff2c0064:  rsil	a2, 1

----------------
IN: 
0xff2c0067:  l32r	a2, 0xff2c000c
0xff2c006a:  movi.n	a3, 0
0xff2c006c:  iiu	a3, 0
0xff2c006f:  iiu	a3, 128
0xff2c0072:  addmi	a3, a3, 256
0xff2c0075:  bltu	a3, a2, 0xff2c006c

----------------
IN: 
0xff2c006c:  iiu	a3, 0
0xff2c006f:  iiu	a3, 128
0xff2c0072:  addmi	a3, a3, 256
0xff2c0075:  bltu	a3, a2, 0xff2c006c

----------------
IN: 
0xff2c0078:  isync
0xff2c007b:  l32r	a2, 0xff2c0010
0xff2c007e:  movi.n	a3, 0
0xff2c0080:  iii	a3, 0
0xff2c0083:  iii	a3, 128
0xff2c0086:  iii	a3, 256
0xff2c0089:  iii	a3, 384
0xff2c008c:  addmi	a3, a3, 512
0xff2c008f:  bltu	a3, a2, 0xff2c0080

----------------
IN: 
0xff2c0080:  iii	a3, 0
0xff2c0083:  iii	a3, 128
0xff2c0086:  iii	a3, 256
0xff2c0089:  iii	a3, 384
0xff2c008c:  addmi	a3, a3, 512
0xff2c008f:  bltu	a3, a2, 0xff2c0080

----------------
IN: 
0xff2c0092:  isync
0xff2c0095:  l32r	a2, 0xff2c0014
0xff2c0098:  movi.n	a3, 0
0xff2c009a:  diu	a3, 0
0xff2c009d:  diu	a3, 128
0xff2c00a0:  addmi	a3, a3, 256
0xff2c00a3:  bltu	a3, a2, 0xff2c009a

----------------
IN: 
0xff2c009a:  diu	a3, 0
0xff2c009d:  diu	a3, 128
0xff2c00a0:  addmi	a3, a3, 256
0xff2c00a3:  bltu	a3, a2, 0xff2c009a

----------------
IN: 
0xff2c00a6:  l32r	a2, 0xff2c0018
0xff2c00a9:  movi.n	a3, 0
0xff2c00ab:  dii	a3, 0
0xff2c00ae:  dii	a3, 128
0xff2c00b1:  dii	a3, 256
0xff2c00b4:  dii	a3, 384
0xff2c00b7:  addmi	a3, a3, 512
0xff2c00ba:  bltu	a3, a2, 0xff2c00ab

----------------
IN: 
0xff2c00ab:  dii	a3, 0
0xff2c00ae:  dii	a3, 128
0xff2c00b1:  dii	a3, 256
0xff2c00b4:  dii	a3, 384
0xff2c00b7:  addmi	a3, a3, 512
0xff2c00ba:  bltu	a3, a2, 0xff2c00ab

----------------
IN: 
0xff2c00bd:  movi.n	a2, 68
0xff2c00bf:  wsr.prefctl	a2
0xff2c00c2:  l32r	a2, 0xff2c001c
0xff2c00c5:  l32r	a5, 0xff2c0020
0xff2c00c8:  l32r	a6, 0xff2c0024
0xff2c00cb:  movi.n	a3, 0
0xff2c00cd:  mov.n	a7, a2
0xff2c00cf:  and	a6, a6, a5
0xff2c00d2:  j	0xff2c00f4

----------------
IN: 
0xff2c00f4:  ritlb1	a8, a3
0xff2c00f7:  extui	a4, a7, 0, 4
0xff2c00fa:  srli	a8, a8, 4
0xff2c00fd:  slli	a8, a8, 4
0xff2c0100:  add.n	a4, a4, a8
0xff2c0102:  beq	a3, a6, 0xff2c00e0

----------------
IN: 
0xff2c0105:  witlb	a4, a3

----------------
IN: 
0xff2c0108:  sub	a3, a3, a5
0xff2c010b:  bgeui	a3, 16, 0xff2c00f1

----------------
IN: 
0xff2c00f1:  srli	a7, a7, 4
0xff2c00f4:  ritlb1	a8, a3
0xff2c00f7:  extui	a4, a7, 0, 4
0xff2c00fa:  srli	a8, a8, 4
0xff2c00fd:  slli	a8, a8, 4
0xff2c0100:  add.n	a4, a4, a8
0xff2c0102:  beq	a3, a6, 0xff2c00e0

----------------
IN: 
0xff2c00e0:  witlb	a4, a3

xtensa_cpu_tlb_fill(ff2c00e3, 2, 0) -> ff2c00e3, ret = 0
----------------
IN: 
0xff2c00e3:  isync
0xff2c00e6:  nop.n
0xff2c00e8:  nop
0xff2c00eb:  sub	a3, a3, a5
0xff2c00ee:  bltui	a3, 16, 0xff2c0111

----------------
IN: 
0xff2c0111:  l32r	a5, 0xff2c0020
0xff2c0114:  movi.n	a3, 0
0xff2c0116:  mov.n	a7, a2
0xff2c0118:  rdtlb1	a8, a3
0xff2c011b:  extui	a4, a7, 0, 4
0xff2c011e:  srli	a8, a8, 4
0xff2c0121:  slli	a8, a8, 4
0xff2c0124:  add.n	a4, a4, a8
0xff2c0126:  wdtlb	a4, a3

----------------
IN: 
0xff2c0129:  sub	a3, a3, a5
0xff2c012c:  srli	a7, a7, 4
0xff2c012f:  bgeui	a3, 16, 0xff2c0118

----------------
IN: 
0xff2c0118:  rdtlb1	a8, a3
0xff2c011b:  extui	a4, a7, 0, 4
0xff2c011e:  srli	a8, a8, 4
0xff2c0121:  slli	a8, a8, 4
0xff2c0124:  add.n	a4, a4, a8
0xff2c0126:  wdtlb	a4, a3

xtensa_cpu_tlb_fill(ff2c0132, 2, 0) -> ff2c0132, ret = 0
----------------
IN: 
0xff2c0132:  dsync
0xff2c0135:  l32r	a2, 0xff2c0028
0xff2c0138:  beqz.n	a2, 0xff2c0142

----------------
IN: 
0xff2c0142:  movi.n	a1, 1
0xff2c0144:  wsr.windowstart	a1

----------------
IN: 
0xff2c0147:  wsr.windowbase	a0

----------------
IN: 
0xff2c014a:  rsync
0xff2c014d:  movi.n	a0, 0
0xff2c014f:  l32r	a4, 0xff2c002c
0xff2c0152:  wsr.excsave2	a4
0xff2c0155:  l32r	a4, 0xff2c0030
0xff2c0158:  wsr.excsave3	a4
0xff2c015b:  l32r	a4, 0xff2c0034
0xff2c015e:  wsr.excsave4	a4
0xff2c0161:  l32r	a4, 0xff2c0038
0xff2c0164:  wsr.excsave5	a4
0xff2c0167:  call0	0xff2c0be8

----------------
IN: 
0xff2c0be8:  movi.n	a0, 0
0xff2c0bea:  l32r	a2, 0xff2c0b7c
0xff2c0bed:  l32r	a3, 0xff2c0b80
0xff2c0bf0:  s32i.n	a2, a3, 0
0xff2c0bf2:  l32r	a1, 0xff2c0b84
0xff2c0bf5:  l32r	a3, 0xff2c0b88
0xff2c0bf8:  wsr.ps	a3

xtensa_cpu_tlb_fill(ff303fe8, 1, 0) -> ff303fe8, ret = 0
----------------
IN: 
0xff2c0bfb:  rsync
0xff2c0bfe:  l32r	a4, 0xff2c0b8c
0xff2c0c01:  beqz.n	a4, 0xff2c0c06

----------------
IN: 
0xff2c0c06:  movi.n	a0, 0
0xff2c0c08:  l32r	a6, 0xff2c0b90
0xff2c0c0b:  l32r	a7, 0xff2c0b94
0xff2c0c0e:  bgeu	a6, a7, 0xff2c0c40

----------------
IN: 
0xff2c0c11:  l32i.n	a8, a6, 0
0xff2c0c13:  l32i.n	a9, a6, 4
0xff2c0c15:  addi.n	a6, a6, 8
0xff2c0c17:  sub	a10, a9, a8
0xff2c0c1a:  bbci	a10, 2, 0xff2c0c21

xtensa_cpu_tlb_fill(ff30221c, 0, 0) -> ff30221c, ret = 0
----------------
IN: 
0xff2c0c21:  bbci	a10, 3, 0xff2c0c2c

----------------
IN: 
0xff2c0c24:  s32i.n	a0, a8, 0
0xff2c0c26:  s32i	a0, a8, 4
0xff2c0c29:  addi	a8, a8, 8
0xff2c0c2c:  srli	a10, a10, 4
0xff2c0c2f:  loopnez	a10, 0xff2c0c3d

----------------
IN: 
0xff2c0c32:  s32i.n	a0, a8, 0
0xff2c0c34:  s32i.n	a0, a8, 4
0xff2c0c36:  s32i.n	a0, a8, 8
0xff2c0c38:  s32i.n	a0, a8, 12
0xff2c0c3a:  addi	a8, a8, 16

xtensa_cpu_tlb_fill(ff304000, 1, 0) -> ff304000, ret = 0
xtensa_cpu_tlb_fill(ff305000, 1, 0) -> ff305000, ret = 0
xtensa_cpu_tlb_fill(ff306000, 1, 0) -> ff306000, ret = 0
xtensa_cpu_tlb_fill(ff307000, 1, 0) -> ff307000, ret = 0
----------------
IN: 
0xff2c0c3d:  bltu	a6, a7, 0xff2c0c11

----------------
IN: 
0xff2c0c40:  call4	0xff2cb318

xtensa_cpu_tlb_fill(ff2cb318, 2, 0) -> ff2cb318, ret = 0
----------------
IN: 
0xff2cb318:  entry	a1, 32

----------------
IN: 
0xff2cb31b:  or	a10, a2, a2
0xff2cb31e:  or	a11, a3, a3
0xff2cb321:  rsr.prid	a8
0xff2cb324:  bnez	a8, 0xff2cb32d

----------------
IN: 
0xff2cb327:  l32r	a12, 0xff2cb2a8
0xff2cb32a:  call8	0xff2cb2c0

----------------
IN: 
0xff2cb2c0:  entry	a1, 32

----------------
IN: 
0xff2cb2c3:  s32i	a2, a4, 0
0xff2cb2c6:  s32i	a3, a4, 4
0xff2cb2c9:  call8	0xff2c0c6c

----------------
IN: 
0xff2c0c6c:  entry	a1, 32

----------------
IN: 
0xff2c0c6f:  l32r	a9, 0xff2c0c60
0xff2c0c72:  rsr.prid	a2
0xff2c0c75:  l32r	a8, 0xff2c0b80
0xff2c0c78:  bnez	a2, 0xff2c0c8b

----------------
IN: 
0xff2c0c7b:  l32r	a10, 0xff2c0b7c
0xff2c0c7e:  l32r	a11, 0xff2c0c5c
0xff2c0c81:  addmi	a12, a10, 12288

----------------
IN: 
0xff2c0400:  s32e	a0, a5, -16
0xff2c0403:  s32e	a1, a5, -12
0xff2c0406:  s32e	a2, a5, -8
0xff2c0409:  s32e	a3, a5, -4
0xff2c040c:  rfwo

xtensa_cpu_tlb_fill(ff327fd0, 1, 0) -> ff327fd0, ret = 0
----------------
IN: 
0xff2c0c81:  addmi	a12, a10, 12288
0xff2c0c84:  s32i	a11, a12, 20
0xff2c0c87:  s32i.n	a11, a9, 0
0xff2c0c89:  s32i.n	a10, a8, 0
0xff2c0c8b:  slli	a2, a2, 2
0xff2c0c8e:  add.n	a9, a9, a2
0xff2c0c90:  l32i.n	a9, a9, 0
0xff2c0c92:  wur.threadptr	a9
0xff2c0c95:  add.n	a2, a8, a2
0xff2c0c97:  l32i.n	a2, a2, 0
0xff2c0c99:  movi.n	a10, 0
0xff2c0c9b:  addmi	a9, a2, 12288
0xff2c0c9e:  l32i.n	a8, a9, 20
0xff2c0ca0:  s32i.n	a9, a8, 36
0xff2c0ca2:  l32r	a9, 0xff2c0c64
0xff2c0ca5:  s32i.n	a2, a8, 16
0xff2c0ca7:  add.n	a9, a2, a9
0xff2c0ca9:  s32i.n	a9, a8, 44
0xff2c0cab:  addmi	a9, a2, 4096
0xff2c0cae:  addmi	a2, a2, 8192
0xff2c0cb1:  s32i.n	a2, a8, 32
0xff2c0cb3:  l32r	a2, 0xff2c0c68
0xff2c0cb6:  s32i.n	a9, a8, 28
0xff2c0cb8:  mov.n	a11, a2
0xff2c0cba:  call8	0xff2ccb1c

xtensa_cpu_tlb_fill(ff2ccb1c, 2, 0) -> ff2ccb1c, ret = 0
----------------
IN: 
0xff2ccb1c:  entry	a1, 32

----------------
IN: 
0xff2ccb1f:  movi.n	a8, 63

----------------
IN: 
0xff2c0480:  s32e	a0, a9, -16
0xff2c0483:  l32e	a0, a1, -12
0xff2c0486:  s32e	a1, a9, -12
0xff2c0489:  s32e	a2, a9, -8
0xff2c048c:  s32e	a3, a9, -4
0xff2c048f:  s32e	a4, a0, -32
0xff2c0492:  s32e	a5, a0, -28
0xff2c0495:  s32e	a6, a0, -24
0xff2c0498:  s32e	a7, a0, -20
0xff2c049b:  rfwo

----------------
IN: 
0xff2ccb1f:  movi.n	a8, 63
0xff2ccb21:  bge	a8, a2, 0xff2ccb29

----------------
IN: 
0xff2ccb29:  l32r	a10, 0xff2ccb0c
0xff2ccb2c:  bnez.n	a3, 0xff2ccb31

----------------
IN: 
0xff2ccb31:  l32r	a9, 0xff2c0ba4
0xff2ccb34:  slli	a8, a2, 2
0xff2ccb37:  add.n	a2, a9, a8
0xff2ccb39:  l32i.n	a2, a2, 0
0xff2ccb3b:  l32r	a12, 0xff2ccb10
0xff2ccb3e:  beq	a3, a10, 0xff2ccb44

----------------
IN: 
0xff2ccb41:  l32r	a12, 0xff2ccb14
0xff2ccb44:  l32r	a11, 0xff2ccb18
0xff2ccb47:  add.n	a11, a11, a8
0xff2ccb49:  add.n	a8, a9, a8
0xff2ccb4b:  s32i.n	a12, a11, 0
0xff2ccb4d:  s32i.n	a3, a8, 0
0xff2ccb4f:  beq	a2, a10, 0xff2ccb24

----------------
IN: 
0xff2ccb24:  movi.n	a2, 0
0xff2ccb26:  j	0xff2ccb52

----------------
IN: 
0xff2ccb52:  retw.n

----------------
IN: 
0xff2c0cbd:  mov.n	a11, a2
0xff2c0cbf:  movi.n	a10, 1
0xff2c0cc1:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0cc4:  mov.n	a11, a2
0xff2c0cc6:  movi.n	a10, 2
0xff2c0cc8:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0ccb:  mov.n	a11, a2
0xff2c0ccd:  movi.n	a10, 3
0xff2c0ccf:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0cd2:  mov.n	a11, a2
0xff2c0cd4:  movi.n	a10, 5
0xff2c0cd6:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0cd9:  mov.n	a11, a2
0xff2c0cdb:  movi.n	a10, 6
0xff2c0cdd:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0ce0:  mov.n	a11, a2
0xff2c0ce2:  movi.n	a10, 7
0xff2c0ce4:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0ce7:  mov.n	a11, a2
0xff2c0ce9:  movi.n	a10, 8
0xff2c0ceb:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0cee:  mov.n	a11, a2
0xff2c0cf0:  movi.n	a10, 9
0xff2c0cf2:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0cf5:  mov.n	a11, a2
0xff2c0cf7:  movi.n	a10, 12
0xff2c0cf9:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0cfc:  mov.n	a11, a2
0xff2c0cfe:  movi.n	a10, 13
0xff2c0d00:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d03:  mov.n	a11, a2
0xff2c0d05:  movi.n	a10, 14
0xff2c0d07:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d0a:  mov.n	a11, a2
0xff2c0d0c:  movi.n	a10, 15
0xff2c0d0e:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d11:  mov.n	a11, a2
0xff2c0d13:  movi.n	a10, 16
0xff2c0d15:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d18:  mov.n	a11, a2
0xff2c0d1a:  movi.n	a10, 17
0xff2c0d1c:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d1f:  mov.n	a11, a2
0xff2c0d21:  movi.n	a10, 18
0xff2c0d23:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d26:  mov.n	a11, a2
0xff2c0d28:  movi.n	a10, 20
0xff2c0d2a:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d2d:  mov.n	a11, a2
0xff2c0d2f:  movi.n	a10, 24
0xff2c0d31:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d34:  mov.n	a11, a2
0xff2c0d36:  movi.n	a10, 25
0xff2c0d38:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d3b:  mov.n	a11, a2
0xff2c0d3d:  movi.n	a10, 26
0xff2c0d3f:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d42:  mov.n	a11, a2
0xff2c0d44:  movi.n	a10, 28
0xff2c0d46:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d49:  mov.n	a11, a2
0xff2c0d4b:  movi.n	a10, 29
0xff2c0d4d:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d50:  mov.n	a11, a2
0xff2c0d52:  movi.n	a10, 32
0xff2c0d54:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d57:  mov.n	a11, a2
0xff2c0d59:  movi.n	a10, 33
0xff2c0d5b:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d5e:  mov.n	a11, a2
0xff2c0d60:  movi.n	a10, 34
0xff2c0d62:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d65:  mov.n	a11, a2
0xff2c0d67:  movi.n	a10, 35
0xff2c0d69:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d6c:  mov.n	a11, a2
0xff2c0d6e:  movi.n	a10, 36
0xff2c0d70:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d73:  mov.n	a11, a2
0xff2c0d75:  movi.n	a10, 37
0xff2c0d77:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d7a:  mov.n	a11, a2
0xff2c0d7c:  movi.n	a10, 38
0xff2c0d7e:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d81:  mov.n	a11, a2
0xff2c0d83:  movi.n	a10, 39
0xff2c0d85:  call8	0xff2ccb1c

----------------
IN: 
0xff2c0d88:  movi.n	a2, 0
0xff2c0d8a:  retw.n

----------------
IN: 
0xff2cb2cc:  bgez	a10, 0xff2cb2dc

----------------
IN: 
0xff2cb2dc:  mov.n	a10, a4
0xff2cb2de:  call8	0xff2c0780

----------------
IN: 
0xff2c0780:  entry	a1, 32

----------------
IN: 
0xff2c0783:  l32r	a8, 0xff2c077c
0xff2c0786:  s32i.n	a8, a2, 44
0xff2c0788:  retw.n

----------------
IN: 
0xff2cb2e1:  mov.n	a10, a4
0xff2cb2e3:  call8	0xff2c891c

xtensa_cpu_tlb_fill(ff2c891c, 2, 0) -> ff2c891c, ret = 0
----------------
IN: 
0xff2c891c:  entry	a1, 32

----------------
IN: 
0xff2c891f:  l32i.n	a2, a2, 44
0xff2c8921:  l32r	a8, 0xff2c8918
0xff2c8924:  l32i.n	a9, a2, 8
0xff2c8926:  beq	a9, a8, 0xff2c8935

----------------
IN: 
0xff2c8935:  addi	a10, a2, 28
0xff2c8938:  call8	0xff2c83a8

----------------
IN: 
0xff2c83a8:  entry	a1, 32

----------------
IN: 
0xff2c83ab:  l32i.n	a8, a2, 4
0xff2c83ad:  l32i.n	a9, a2, 8
0xff2c83af:  l32i.n	a11, a2, 0
0xff2c83b1:  s32i.n	a9, a8, 12
0xff2c83b3:  movi.n	a10, 1
0xff2c83b5:  bgeu	a10, a11, 0xff2c83d0

----------------
IN: 
0xff2c83b8:  l16ui	a2, a8, 2
0xff2c83bb:  l16ui	a9, a8, 0
0xff2c83be:  addi.n	a10, a10, 1
0xff2c83c0:  mul16u	a9, a9, a2
0xff2c83c3:  l32i.n	a2, a8, 12
0xff2c83c5:  addi	a8, a8, 16
0xff2c83c8:  add.n	a9, a9, a2
0xff2c83ca:  s32i.n	a9, a8, 12
0xff2c83cc:  j	0xff2c83b5

----------------
IN: 
0xff2c83b5:  bgeu	a10, a11, 0xff2c83d0

----------------
IN: 
0xff2c83d0:  retw.n

----------------
IN: 
0xff2c893b:  addi	a10, a2, 56
0xff2c893e:  call8	0xff2c83a8

----------------
IN: 
0xff2c8941:  addi	a10, a2, 84
0xff2c8944:  call8	0xff2c83a8

----------------
IN: 
0xff2c8947:  movi.n	a8, 0
0xff2c8949:  memw
0xff2c894c:  s32i	a8, a2, 124
0xff2c894f:  retw.n

----------------
IN: 
0xff2cb2e6:  mov.n	a10, a4
0xff2cb2e8:  call8	0xff2cb114

----------------
IN: 
0xff2cb114:  entry	a1, 32

----------------
IN: 
0xff2cb117:  l32r	a8, 0xff2cb110
0xff2cb11a:  movi.n	a9, 21
0xff2cb11c:  s32i.n	a9, a8, 8
0xff2cb11e:  movi.n	a9, 0
0xff2cb120:  s32i	a8, a2, 64
0xff2cb123:  memw
0xff2cb126:  s32i.n	a9, a8, 0
0xff2cb128:  retw.n

----------------
IN: 
0xff2cb2eb:  mov.n	a10, a4
0xff2cb2ed:  call8	0xff2c8af8

----------------
IN: 
0xff2c8af8:  entry	a1, 32

----------------
IN: 
0xff2c8afb:  call8	0xff2cdef4

xtensa_cpu_tlb_fill(ff2cdef4, 2, 0) -> ff2cdef4, ret = 0
----------------
IN: 
0xff2cdef4:  entry	a1, 32

----------------
IN: 
0xff2cdef7:  rur.threadptr	a2
0xff2cdefa:  addi	a2, a2, 60
0xff2cdefd:  retw.n

----------------
IN: 
0xff2c8afe:  movi	a11, 0
0xff2c8b01:  or	a3, a10, a10
0xff2c8b04:  movi.n	a13, 88
0xff2c8b06:  movi.n	a12, 1
0xff2c8b08:  mov.n	a10, a11
0xff2c8b0a:  call8	0xff2c87b0

----------------
IN: 
0xff2c87b0:  entry	a1, 32

----------------
IN: 
0xff2c87b3:  or	a10, a2, a2
0xff2c87b6:  or	a13, a5, a5
0xff2c87b9:  or	a12, a4, a4
0xff2c87bc:  mov.n	a11, a3
0xff2c87be:  call8	0xff2c870c

----------------
IN: 
0xff2c870c:  entry	a1, 32

----------------
IN: 
0xff2c870f:  call8	0xff2c81c0

----------------
IN: 
0xff2c870f:  call8	0xff2c81c0

----------------
IN: 
0xff2c81c0:  entry	a1, 32

----------------
IN: 
0xff2c81c3:  call8	0xff2cb2ac

----------------
IN: 
0xff2c81c3:  call8	0xff2cb2ac

----------------
IN: 
0xff2cb2ac:  entry	a1, 32

----------------
IN: 
0xff2cb2af:  l32r	a2, 0xff2cb2a8
0xff2cb2b2:  retw.n

----------------
IN: 
0xff2c81c6:  l32i.n	a2, a10, 44
0xff2c81c8:  retw.n

----------------
IN: 
0xff2c8712:  addi	a3, a10, 124
0xff2c8715:  or	a10, a3, a3
0xff2c8718:  call8	0xff2ce00c

xtensa_cpu_tlb_fill(ff2ce00c, 2, 0) -> ff2ce00c, ret = 0
----------------
IN: 
0xff2ce00c:  entry	a1, 32

----------------
IN: 
0xff2ce00f:  rsil	a8, 5

----------------
IN: 
0xff2ce012:  movi	a9, 0
0xff2ce015:  wsr.scompare1	a9
0xff2ce018:  movi.n	a9, 1
0xff2ce01a:  s32c1i	a9, a2, 0
0xff2ce01d:  bnez	a9, 0xff2ce018

----------------
IN: 
0xff2ce020:  mov.n	a2, a8
0xff2ce022:  retw.n

----------------
IN: 
0xff2c871b:  or	a6, a10, a10
0xff2c871e:  call8	0xff2c81c0

----------------
IN: 
0xff2c8721:  or	a7, a10, a10
0xff2c8724:  beqi	a2, 1, 0xff2c8741

----------------
IN: 
0xff2c8727:  beqz.n	a2, 0xff2c8732

----------------
IN: 
0xff2c8732:  mov.n	a12, a5
0xff2c8734:  mov.n	a10, a4
0xff2c8736:  rsr.prid	a11
0xff2c8739:  call8	0xff2c81d4

----------------
IN: 
0xff2c81d4:  entry	a1, 32

----------------
IN: 
0xff2c81d7:  call8	0xff2c81c0

----------------
IN: 
0xff2c81da:  slli	a8, a3, 3
0xff2c81dd:  sub	a8, a8, a3
0xff2c81e0:  slli	a8, a8, 2
0xff2c81e3:  add.n	a10, a10, a8
0xff2c81e5:  l32i.n	a8, a10, 16
0xff2c81e7:  movi	a12, 166
0xff2c81ea:  and	a8, a2, a8
0xff2c81ed:  bne	a2, a8, 0xff2c820c

----------------
IN: 
0xff2c81f0:  l32i	a8, a10, 20
0xff2c81f3:  movi	a2, 0
0xff2c81f6:  extui	a9, a8, 0, 2
0xff2c81f9:  beq	a9, a2, 0xff2c8202

----------------
IN: 
0xff2c8202:  l32i.n	a9, a10, 24
0xff2c8204:  add.n	a11, a2, a4
0xff2c8206:  bgeu	a9, a11, 0xff2c8215

----------------
IN: 
0xff2c8215:  add	a8, a8, a2
0xff2c8218:  l32i	a2, a10, 8
0xff2c821b:  add	a4, a4, a8
0xff2c821e:  sub	a9, a9, a11
0xff2c8221:  s32i.n	a4, a10, 20
0xff2c8223:  s32i.n	a9, a10, 24
0xff2c8225:  add.n	a2, a8, a2
0xff2c8227:  retw.n

----------------
IN: 
0xff2c873c:  j	0xff2c8765

----------------
IN: 
0xff2c8765:  mov.n	a2, a10
0xff2c8767:  j	0xff2c879d

----------------
IN: 
0xff2c879d:  movi	a4, 1
0xff2c87a0:  s32i	a4, a7, 120
0xff2c87a3:  movi	a12, 713
0xff2c87a6:  or	a11, a6, a6
0xff2c87a9:  mov.n	a10, a3
0xff2c87ab:  call8	0xff2ce024

----------------
IN: 
0xff2ce024:  entry	a1, 32

----------------
IN: 
0xff2ce027:  movi.n	a4, 0
0xff2ce029:  s32ri	a4, a2, 0
0xff2ce02c:  wsr.ps	a3

----------------
IN: 
0xff2ce02f:  rsync
0xff2ce032:  retw.n

----------------
IN: 
0xff2c87ae:  retw.n

----------------
IN: 
0xff2c04c0:  l32e	a0, a9, -16
0xff2c04c3:  l32e	a1, a9, -12
0xff2c04c6:  l32e	a2, a9, -8
0xff2c04c9:  l32e	a7, a1, -12
0xff2c04cc:  l32e	a3, a9, -4
0xff2c04cf:  l32e	a4, a7, -32
0xff2c04d2:  l32e	a5, a7, -28
0xff2c04d5:  l32e	a6, a7, -24
0xff2c04d8:  l32e	a7, a7, -20
0xff2c04db:  rfwu

----------------
IN: 
0xff2c87c1:  mov.n	a2, a10
0xff2c87c3:  beqz.n	a10, 0xff2c87cc

----------------
IN: 
0xff2c87c5:  mov.n	a12, a5
0xff2c87c7:  movi.n	a11, 0
0xff2c87c9:  call8	0xff2c80f4

----------------
IN: 
0xff2c80f4:  entry	a1, 32

----------------
IN: 
0xff2c80f7:  extui	a3, a3, 0, 8
0xff2c80fa:  movi.n	a8, 0
0xff2c80fc:  j	0xff2c8107

----------------
IN: 
0xff2c8107:  bne	a8, a4, 0xff2c8100

----------------
IN: 
0xff2c8100:  add.n	a9, a2, a8
0xff2c8102:  s8i	a3, a9, 0
0xff2c8105:  addi.n	a8, a8, 1
0xff2c8107:  bne	a8, a4, 0xff2c8100

xtensa_cpu_tlb_fill(ff309800, 1, 0) -> ff309800, ret = 0
----------------
IN: 
0xff2c810a:  retw.n

----------------
IN: 
0xff2c87cc:  retw.n

----------------
IN: 
0xff2c8b0d:  s32i.n	a10, a3, 0
0xff2c8b0f:  movi.n	a8, 11
0xff2c8b11:  loop	a8, 0xff2c8b1a

----------------
IN: 
0xff2c8b14:  s32i.n	a10, a10, 0
0xff2c8b16:  s32i.n	a10, a10, 4
0xff2c8b18:  addi.n	a10, a10, 8

----------------
IN: 
0xff2c8b1a:  rsr.prid	a8
0xff2c8b1d:  bnez.n	a8, 0xff2c8b24

----------------
IN: 
0xff2c8b1f:  l32r	a8, 0xff2c8af4
0xff2c8b22:  s32i.n	a8, a2, 52
0xff2c8b24:  retw.n

----------------
IN: 
0xff2c8b24:  retw.n

----------------
IN: 
0xff2cb2f0:  mov.n	a10, a4
0xff2cb2f2:  call8	0xff2c8b30

----------------
IN: 
0xff2c8b30:  entry	a1, 32

----------------
IN: 
0xff2c8b33:  movi	a12, 1
0xff2c8b36:  movi	a13, 8
0xff2c8b39:  or	a11, a12, a12
0xff2c8b3c:  movi.n	a10, 0
0xff2c8b3e:  call8	0xff2c87b0

----------------
IN: 
0xff2c87b0:  entry	a1, 32

----------------
IN: 
0xff2c87b3:  or	a10, a2, a2
0xff2c87b6:  or	a13, a5, a5
0xff2c87b9:  or	a12, a4, a4
0xff2c87bc:  mov.n	a11, a3
0xff2c87be:  call8	0xff2c870c

----------------
IN: 
0xff2c870c:  entry	a1, 32

----------------
IN: 
0xff2c870f:  call8	0xff2c81c0

----------------
IN: 
0xff2c870f:  call8	0xff2c81c0

----------------
IN: 
0xff2c81c0:  entry	a1, 32

----------------
IN: 
0xff2c81c3:  call8	0xff2cb2ac

----------------
IN: 
0xff2c81c3:  call8	0xff2cb2ac

----------------
IN: 
0xff2c81c6:  l32i.n	a2, a10, 44
0xff2c81c8:  retw.n

----------------
IN: 
0xff2c8712:  addi	a3, a10, 124
0xff2c8715:  or	a10, a3, a3
0xff2c8718:  call8	0xff2ce00c

----------------
IN: 
0xff2c871b:  or	a6, a10, a10
0xff2c871e:  call8	0xff2c81c0

----------------
IN: 
0xff2c8721:  or	a7, a10, a10
0xff2c8724:  beqi	a2, 1, 0xff2c8741

----------------
IN: 
0xff2c8727:  beqz.n	a2, 0xff2c8732

----------------
IN: 
0xff2c8732:  mov.n	a12, a5
0xff2c8734:  mov.n	a10, a4
0xff2c8736:  rsr.prid	a11
0xff2c8739:  call8	0xff2c81d4

----------------
IN: 
0xff2c81d4:  entry	a1, 32

----------------
IN: 
0xff2c81d7:  call8	0xff2c81c0

----------------
IN: 
0xff2c81da:  slli	a8, a3, 3
0xff2c81dd:  sub	a8, a8, a3
0xff2c81e0:  slli	a8, a8, 2
0xff2c81e3:  add.n	a10, a10, a8
0xff2c81e5:  l32i.n	a8, a10, 16
0xff2c81e7:  movi	a12, 166
0xff2c81ea:  and	a8, a2, a8
0xff2c81ed:  bne	a2, a8, 0xff2c820c

----------------
IN: 
0xff2c81f0:  l32i	a8, a10, 20
0xff2c81f3:  movi	a2, 0
0xff2c81f6:  extui	a9, a8, 0, 2
0xff2c81f9:  beq	a9, a2, 0xff2c8202

----------------
IN: 
0xff2c8202:  l32i.n	a9, a10, 24
0xff2c8204:  add.n	a11, a2, a4
0xff2c8206:  bgeu	a9, a11, 0xff2c8215

----------------
IN: 
0xff2c8215:  add	a8, a8, a2
0xff2c8218:  l32i	a2, a10, 8
0xff2c821b:  add	a4, a4, a8
0xff2c821e:  sub	a9, a9, a11
0xff2c8221:  s32i.n	a4, a10, 20
0xff2c8223:  s32i.n	a9, a10, 24
0xff2c8225:  add.n	a2, a8, a2
0xff2c8227:  retw.n

----------------
IN: 
0xff2c873c:  j	0xff2c8765

----------------
IN: 
0xff2c8765:  mov.n	a2, a10
0xff2c8767:  j	0xff2c879d

----------------
IN: 
0xff2c879d:  movi	a4, 1
0xff2c87a0:  s32i	a4, a7, 120
0xff2c87a3:  movi	a12, 713
0xff2c87a6:  or	a11, a6, a6
0xff2c87a9:  mov.n	a10, a3
0xff2c87ab:  call8	0xff2ce024

----------------
IN: 
0xff2c87ae:  retw.n

----------------
IN: 
0xff2c87c1:  mov.n	a2, a10
0xff2c87c3:  beqz.n	a10, 0xff2c87cc

----------------
IN: 
0xff2c87c5:  mov.n	a12, a5
0xff2c87c7:  movi.n	a11, 0
0xff2c87c9:  call8	0xff2c80f4

----------------
IN: 
0xff2c80f4:  entry	a1, 32

----------------
IN: 
0xff2c80f7:  extui	a3, a3, 0, 8
0xff2c80fa:  movi.n	a8, 0
0xff2c80fc:  j	0xff2c8107

----------------
IN: 
0xff2c8107:  bne	a8, a4, 0xff2c8100

----------------
IN: 
0xff2c8100:  add.n	a9, a2, a8
0xff2c8102:  s8i	a3, a9, 0
0xff2c8105:  addi.n	a8, a8, 1
0xff2c8107:  bne	a8, a4, 0xff2c8100

----------------
IN: 
0xff2c810a:  retw.n

----------------
IN: 
0xff2c87cc:  retw.n

----------------
IN: 
0xff2c8b41:  s32i.n	a10, a2, 48
0xff2c8b43:  movi.n	a8, 0
0xff2c8b45:  memw
0xff2c8b48:  s32i.n	a8, a10, 0
0xff2c8b4a:  retw.n

----------------
IN: 
0xff2c8b4a:  retw.n

----------------
IN: 
0xff2cb2f5:  mov.n	a10, a4
0xff2cb2f7:  call8	0xff2c08dc

----------------
IN: 
0xff2c08dc:  entry	a1, 32

----------------
IN: 
0xff2c08df:  l32r	a8, 0xff2c08a0
0xff2c08e2:  l32r	a12, 0xff2c08a4
0xff2c08e5:  l32r	a10, 0xff2c078c
0xff2c08e8:  movi	a11, 0
0xff2c08eb:  s32i	a8, a2, 28
0xff2c08ee:  s32i.n	a8, a2, 32
0xff2c08f0:  call8	0xff2c80f4

xtensa_cpu_tlb_fill(ff344000, 1, 0) -> ff344000, ret = 0
----------------
IN: 
0xff2c08f3:  l32r	a9, 0xff2c08a8
0xff2c08f6:  movi.n	a10, 14
0xff2c08f8:  memw
0xff2c08fb:  l32i.n	a8, a9, 0
0xff2c08fd:  or	a8, a8, a10
0xff2c0900:  memw
0xff2c0903:  s32i.n	a8, a9, 0
0xff2c0905:  call8	0xff2c92ec

xtensa_cpu_tlb_fill(ff340088, 0, 0) -> ff340088, ret = 0
xtensa_cpu_tlb_fill(ff2c92ec, 2, 0) -> ff2c92ec, ret = 0
----------------
IN: 
0xff2c92ec:  entry	a1, 32

----------------
IN: 
0xff2c92ef:  movi.n	a11, 0
0xff2c92f1:  movi.n	a13, 12
0xff2c92f3:  movi.n	a12, 1
0xff2c92f5:  mov.n	a10, a11
0xff2c92f7:  call8	0xff2c870c

----------------
IN: 
0xff2c92fa:  l32r	a2, 0xff2c91d4
0xff2c92fd:  l32r	a11, 0xff2c92e8
0xff2c9300:  mov.n	a12, a10
0xff2c9302:  s32i.n	a10, a2, 0
0xff2c9304:  movi.n	a10, 11
0xff2c9306:  call8	0xff2cb12c

----------------
IN: 
0xff2cb12c:  entry	a1, 32

----------------
IN: 
0xff2cb12f:  movi.n	a13, 0
0xff2cb131:  mov.n	a12, a4
0xff2cb133:  mov.n	a11, a3
0xff2cb135:  mov.n	a10, a2
0xff2cb137:  call8	0xff2caf84

xtensa_cpu_tlb_fill(ff2caf84, 2, 0) -> ff2caf84, ret = 0
----------------
IN: 
0xff2caf84:  entry	a1, 64

----------------
IN: 
0xff2caf87:  or	a10, a2, a2
0xff2caf8a:  call8	0xff2caf54

----------------
IN: 
0xff2caf54:  entry	a1, 32

----------------
IN: 
0xff2caf57:  call8	0xff2cb2ac

----------------
IN: 
0xff2caf57:  call8	0xff2cb2ac

----------------
IN: 
0xff2caf5a:  movi	a8, 21
0xff2caf5d:  bgeu	a8, a2, 0xff2caf80

----------------
IN: 
0xff2caf80:  movi.n	a2, 0
0xff2caf82:  retw.n

----------------
IN: 
0xff2caf8d:  or	a6, a10, a10
0xff2caf90:  bnez.n	a10, 0xff2cafad

----------------
IN: 
0xff2caf92:  movi.n	a10, 1
0xff2caf94:  ssl	a2
0xff2caf97:  sll	a10, a10
0xff2caf9a:  call8	0xff2ce0dc

----------------
IN: 
0xff2ce0dc:  entry	a1, 16

----------------
IN: 
0xff2ce0df:  wsr.intclear	a2

----------------
IN: 
0xff2ce0e2:  retw.n

----------------
IN: 
0xff2caf9d:  mov.n	a12, a4
0xff2caf9f:  mov.n	a11, a3
0xff2cafa1:  mov.n	a10, a2
0xff2cafa3:  call8	0xff2ccb5c

----------------
IN: 
0xff2ccb5c:  entry	a1, 32

----------------
IN: 
0xff2ccb5f:  movi.n	a8, 21
0xff2ccb61:  mov.n	a9, a2
0xff2ccb63:  bgeu	a8, a2, 0xff2ccb6c

----------------
IN: 
0xff2ccb6c:  l32r	a2, 0xff2ccb54
0xff2ccb6f:  add.n	a2, a2, a9
0xff2ccb71:  l8ui	a2, a2, 0
0xff2ccb74:  bgeui	a2, 7, 0xff2ccb66

xtensa_cpu_tlb_fill(ff301fdf, 0, 0) -> ff301fdf, ret = 0
----------------
IN: 
0xff2ccb77:  l32r	a2, 0xff2c0bb0
0xff2ccb7a:  sub	a8, a8, a9
0xff2ccb7d:  slli	a8, a8, 3
0xff2ccb80:  add.n	a8, a8, a2
0xff2ccb82:  l32i.n	a2, a8, 0
0xff2ccb84:  l32r	a10, 0xff2ccb58
0xff2ccb87:  beqz.n	a3, 0xff2ccb90

----------------
IN: 
0xff2ccb89:  s32i.n	a3, a8, 0
0xff2ccb8b:  s32i.n	a4, a8, 4
0xff2ccb8d:  j	0xff2ccb94

----------------
IN: 
0xff2ccb94:  beq	a2, a10, 0xff2ccb66

----------------
IN: 
0xff2ccb66:  movi.n	a2, 0
0xff2ccb68:  j	0xff2ccb97

----------------
IN: 
0xff2ccb97:  retw.n

----------------
IN: 
0xff2cafa6:  mov.n	a13, a6
0xff2cafa8:  j	0xff2cb076

----------------
IN: 
0xff2cb076:  mov.n	a2, a13
0xff2cb078:  retw.n

----------------
IN: 
0xff2cb13a:  mov.n	a2, a10
0xff2cb13c:  retw.n

----------------
IN: 
0xff2cb13c:  retw.n

----------------
IN: 
0xff2c9309:  l32i.n	a11, a2, 0
0xff2c930b:  movi.n	a10, 11
0xff2c930d:  call8	0xff2cb150

----------------
IN: 
0xff2cb150:  entry	a1, 48

----------------
IN: 
0xff2cb153:  mov.n	a10, a2
0xff2cb155:  call8	0xff2caf54

----------------
IN: 
0xff2cb158:  mov.n	a4, a10
0xff2cb15a:  beqz	a10, 0xff2cb1ea

----------------
IN: 
0xff2cb1ea:  movi	a10, 1
0xff2cb1ed:  ssl	a2
0xff2cb1f0:  sll	a10, a10
0xff2cb1f3:  call8	0xff2ccbd4

----------------
IN: 
0xff2ccbd4:  entry	a1, 16

----------------
IN: 
0xff2ccbd7:  l32r	a4, 0xff2c0b98
0xff2ccbda:  rsil	a7, 6

----------------
IN: 
0xff2ccbdd:  l32i.n	a3, a4, 0
0xff2ccbdf:  l32i.n	a6, a4, 4
0xff2ccbe1:  or	a5, a3, a2
0xff2ccbe4:  s32i.n	a5, a4, 0
0xff2ccbe6:  and	a5, a5, a6
0xff2ccbe9:  wsr.intenable	a5

----------------
IN: 
0xff2ccbec:  wsr.ps	a7

----------------
IN: 
0xff2ccbef:  rsync
0xff2ccbf2:  mov.n	a2, a3
0xff2ccbf4:  retw.n

----------------
IN: 
0xff2cb1f6:  or	a2, a10, a10
0xff2cb1f9:  retw

----------------
IN: 
0xff2c9310:  l32r	a9, 0xff2c91c8
0xff2c9313:  movi.n	a2, -4
0xff2c9315:  memw
0xff2c9318:  l32i.n	a8, a9, 0
0xff2c931a:  and	a8, a8, a2
0xff2c931d:  memw
0xff2c9320:  s32i.n	a8, a9, 0
0xff2c9322:  movi.n	a2, 0
0xff2c9324:  retw.n

xtensa_cpu_tlb_fill(ff340060, 0, 0) -> ff340060, ret = 0
irq: SHIM_IMRLPESC masking 0 mask 0 active 0
----------------
IN: 
0xff2c9324:  retw.n

----------------
IN: 
0xff2c0908:  l32i.n	a10, a2, 28
0xff2c090a:  call8	0xff2c9dd0

----------------
IN: 
0xff2c9dd0:  entry	a1, 32

----------------
IN: 
0xff2c9dd3:  l32r	a8, 0xff2c9d80
0xff2c9dd6:  l32r	a9, 0xff2c07e8
0xff2c9dd9:  memw
0xff2c9ddc:  s32i.n	a9, a8, 0
0xff2c9dde:  l32r	a8, 0xff2c9d7c
0xff2c9de1:  movi.n	a9, 1
0xff2c9de3:  memw
0xff2c9de6:  s32i.n	a9, a8, 0
0xff2c9de8:  retw.n

xtensa_cpu_tlb_fill(ff3400c4, 1, 0) -> ff3400c4, ret = 0
----------------
IN: 
0xff2c090d:  mov.n	a10, a2
0xff2c090f:  call8	0xff2c0714

----------------
IN: 
0xff2c0714:  entry	a1, 32

----------------
IN: 
0xff2c0717:  l32r	a8, 0xff2c0710
0xff2c071a:  movi.n	a9, 0
0xff2c071c:  s32i.n	a8, a2, 24
0xff2c071e:  memw
0xff2c0721:  s32i.n	a9, a8, 24
0xff2c0723:  memw
0xff2c0726:  s32i.n	a9, a8, 56
0xff2c0728:  retw.n

----------------
IN: 
0xff2c0912:  call8	0xff2cc104

----------------
IN: 
0xff2cc104:  entry	a1, 32

----------------
IN: 
0xff2cc107:  movi	a11, 0
0xff2cc10a:  movi	a13, 16
0xff2cc10d:  movi.n	a12, 1
0xff2cc10f:  mov.n	a10, a11
0xff2cc111:  call8	0xff2c87b0

----------------
IN: 
0xff2cc114:  mov.n	a3, a10
0xff2cc116:  movi.n	a8, 1
0xff2cc118:  s32i.n	a10, a3, 0
0xff2cc11a:  s32i.n	a10, a3, 4
0xff2cc11c:  l32r	a11, 0xff2cc0fc
0xff2cc11f:  s32i.n	a8, a10, 8
0xff2cc121:  mov.n	a12, a10
0xff2cc123:  movi.n	a10, 0
0xff2cc125:  call8	0xff2cc814

----------------
IN: 
0xff2cc814:  entry	a1, 32

----------------
IN: 
0xff2cc817:  movi	a11, 0
0xff2cc81a:  movi.n	a13, 20
0xff2cc81c:  movi.n	a12, 1
0xff2cc81e:  or	a10, a11, a11
0xff2cc821:  call8	0xff2c87b0

----------------
IN: 
0xff2cc824:  mov.n	a5, a10
0xff2cc826:  s32i.n	a10, a5, 0
0xff2cc828:  s32i.n	a10, a5, 4
0xff2cc82a:  s32i.n	a2, a10, 8
0xff2cc82c:  s32i.n	a3, a10, 12
0xff2cc82e:  s32i.n	a4, a10, 16
0xff2cc830:  call8	0xff2cdf00

----------------
IN: 
0xff2cdf00:  entry	a1, 32

----------------
IN: 
0xff2cdf03:  rur.threadptr	a2
0xff2cdf06:  addi	a2, a2, 56
0xff2cdf09:  retw.n

----------------
IN: 
0xff2cc833:  mov.n	a2, a10
0xff2cc835:  l32i.n	a10, a10, 0
0xff2cc837:  bnez.n	a10, 0xff2cc848

----------------
IN: 
0xff2cc839:  movi.n	a13, 8
0xff2cc83b:  movi.n	a12, 1
0xff2cc83d:  mov.n	a11, a10
0xff2cc83f:  call8	0xff2c87b0

----------------
IN: 
0xff2cc842:  s32i.n	a10, a2, 0
0xff2cc844:  s32i.n	a10, a10, 0
0xff2cc846:  s32i.n	a10, a10, 4
0xff2cc848:  l32i.n	a8, a2, 0
0xff2cc84a:  l32i.n	a2, a8, 4
0xff2cc84c:  s32i.n	a5, a2, 0
0xff2cc84e:  s32i.n	a8, a5, 0
0xff2cc850:  s32i.n	a2, a5, 4
0xff2cc852:  s32i.n	a5, a8, 4
0xff2cc854:  retw.n

----------------
IN: 
0xff2cc854:  retw.n

----------------
IN: 
0xff2cc128:  call8	0xff2cc8ac

----------------
IN: 
0xff2cc8ac:  entry	a1, 48

----------------
IN: 
0xff2cc8af:  call8	0xff2c0ac0

----------------
IN: 
0xff2c0ac0:  entry	a1, 32

----------------
IN: 
0xff2c0ac3:  rur.threadptr	a2
0xff2c0ac6:  addi	a2, a2, 52
0xff2c0ac9:  retw.n

----------------
IN: 
0xff2cc8b2:  mov.n	a4, a10
0xff2cc8b4:  rsr.prid	a3
0xff2cc8b7:  l32r	a8, 0xff2cc89c
0xff2cc8ba:  beqz.n	a3, 0xff2cc8bf

----------------
IN: 
0xff2cc8bf:  movi.n	a2, 0
0xff2cc8c1:  s32i.n	a8, a1, 0
0xff2cc8c3:  l32r	a8, 0xff2cc8a4
0xff2cc8c6:  movi.n	a13, 56
0xff2cc8c8:  movi.n	a12, 1
0xff2cc8ca:  mov.n	a11, a2
0xff2cc8cc:  mov.n	a10, a2
0xff2cc8ce:  s32i.n	a2, a1, 4
0xff2cc8d0:  s32i	a8, a1, 8
0xff2cc8d3:  call8	0xff2c87b0

----------------
IN: 
0xff2cc8d6:  l32r	a11, 0xff2cc8a8
0xff2cc8d9:  s32i.n	a10, a4, 0
0xff2cc8db:  mov.n	a15, a2
0xff2cc8dd:  extui	a14, a3, 0, 16
0xff2cc8e0:  mov.n	a13, a2
0xff2cc8e2:  mov.n	a12, a1
0xff2cc8e4:  call8	0xff2cc050

----------------
IN: 
0xff2cc050:  entry	a1, 48

----------------
IN: 
0xff2cc053:  mov.n	a8, a7
0xff2cc055:  extui	a6, a6, 0, 16
0xff2cc058:  s32i.n	a8, a1, 4
0xff2cc05a:  s32i.n	a6, a1, 0
0xff2cc05c:  movi.n	a13, 0
0xff2cc05e:  l32i.n	a14, a4, 0
0xff2cc060:  mov.n	a10, a2
0xff2cc062:  mov.n	a15, a5
0xff2cc064:  mov.n	a12, a13
0xff2cc066:  mov.n	a11, a3
0xff2cc068:  call8	0xff2cc7e4

----------------
IN: 
0xff2cc7e4:  entry	a1, 32

----------------
IN: 
0xff2cc7e7:  extui	a4, a4, 0, 16
0xff2cc7ea:  mov.n	a8, a2
0xff2cc7ec:  extui	a5, a5, 0, 16
0xff2cc7ef:  l16ui	a9, a1, 32
0xff2cc7f2:  movi.n	a2, -22
0xff2cc7f4:  bgeui	a4, 3, 0xff2cc810

----------------
IN: 
0xff2cc7f7:  l32i.n	a2, a1, 36
0xff2cc7f9:  s32i.n	a3, a8, 8
0xff2cc7fb:  s16i	a2, a8, 18
0xff2cc7fe:  movi.n	a2, 0
0xff2cc800:  s16i	a4, a8, 12
0xff2cc803:  s16i	a5, a8, 14
0xff2cc806:  s16i	a9, a8, 16
0xff2cc809:  s32i.n	a2, a8, 20
0xff2cc80b:  s32i.n	a6, a8, 40
0xff2cc80d:  s32i	a7, a8, 24
0xff2cc810:  retw.n

----------------
IN: 
0xff2cc06b:  mov.n	a7, a2
0xff2cc06d:  mov.n	a2, a10
0xff2cc06f:  bltz	a10, 0xff2cc0f8

----------------
IN: 
0xff2cc072:  l32i.n	a5, a7, 36
0xff2cc074:  movi.n	a2, -17
0xff2cc076:  bnez	a5, 0xff2cc0f8

----------------
IN: 
0xff2cc079:  movi.n	a12, 1
0xff2cc07b:  movi.n	a13, 4
0xff2cc07d:  mov.n	a11, a5
0xff2cc07f:  mov.n	a10, a12
0xff2cc081:  call8	0xff2c87b0

----------------
IN: 
0xff2c8741:  call8	0xff2c81c0

----------------
IN: 
0xff2c8744:  rsr.prid	a2
0xff2c8747:  slli	a8, a2, 3
0xff2c874a:  sub	a8, a8, a2
0xff2c874d:  addi	a10, a10, 28
0xff2c8750:  slli	a8, a8, 2
0xff2c8753:  add.n	a10, a10, a8
0xff2c8755:  l32i.n	a2, a10, 16
0xff2c8757:  movi	a12, 630
0xff2c875a:  and	a2, a4, a2
0xff2c875d:  bne	a4, a2, 0xff2c8794

----------------
IN: 
0xff2c8760:  mov.n	a11, a5
0xff2c8762:  call8	0xff2c86c4

----------------
IN: 
0xff2c86c4:  entry	a1, 32

----------------
IN: 
0xff2c86c7:  mov.n	a10, a2
0xff2c86c9:  l32i.n	a13, a2, 0
0xff2c86cb:  movi.n	a11, 0
0xff2c86cd:  addi.n	a14, a3, 4
0xff2c86cf:  j	0xff2c8702

----------------
IN: 
0xff2c8702:  bne	a13, a11, 0xff2c86d2

----------------
IN: 
0xff2c86d2:  l32i.n	a8, a10, 4
0xff2c86d4:  slli	a9, a11, 4
0xff2c86d7:  add.n	a9, a8, a9
0xff2c86d9:  l16ui	a15, a9, 0
0xff2c86dc:  l16ui	a8, a9, 6
0xff2c86df:  l32i.n	a12, a9, 12
0xff2c86e1:  mul16u	a8, a8, a15
0xff2c86e4:  add.n	a8, a8, a12
0xff2c86e6:  extui	a8, a8, 0, 2
0xff2c86e9:  mov.n	a12, a3
0xff2c86eb:  movnez	a12, a14, a8
0xff2c86ee:  blt	a15, a12, 0xff2c8700

----------------
IN: 
0xff2c86f1:  l16ui	a8, a9, 4
0xff2c86f4:  beqz.n	a8, 0xff2c8700

----------------
IN: 
0xff2c86f6:  movi	a12, 4
0xff2c86f9:  call8	0xff2c83d4

----------------
IN: 
0xff2c83d4:  entry	a1, 48

----------------
IN: 
0xff2c83d7:  or	a9, a4, a4

----------------
IN: 
0xff2c83d7:  or	a9, a4, a4
0xff2c83da:  l32i	a4, a2, 4
0xff2c83dd:  slli	a3, a3, 4
0xff2c83e0:  add	a3, a4, a3
0xff2c83e3:  l16ui	a6, a3, 4
0xff2c83e6:  l16ui	a7, a3, 6
0xff2c83e9:  l16ui	a8, a3, 0
0xff2c83ec:  addi.n	a6, a6, -1
0xff2c83ee:  s16i	a6, a3, 4
0xff2c83f1:  mull	a10, a7, a8
0xff2c83f4:  l32i.n	a6, a3, 12
0xff2c83f6:  l32i.n	a4, a3, 8
0xff2c83f8:  add.n	a6, a10, a6
0xff2c83fa:  slli	a5, a7, 3
0xff2c83fd:  add.n	a5, a4, a5
0xff2c83ff:  extui	a10, a6, 8, 8
0xff2c8402:  s8i	a10, a5, 5
0xff2c8405:  extui	a10, a6, 16, 8
0xff2c8408:  s8i	a10, a5, 6
0xff2c840b:  extui	a10, a6, 24, 8
0xff2c840e:  s8i	a6, a5, 4
0xff2c8411:  s8i	a10, a5, 7
0xff2c8414:  movi.n	a12, 0
0xff2c8416:  beq	a9, a12, 0xff2c8431

----------------
IN: 
0xff2c8419:  mov.n	a11, a9
0xff2c841b:  mov.n	a10, a6
0xff2c841d:  s32i.n	a8, a1, 0
0xff2c841f:  s32i.n	a9, a1, 8
0xff2c8421:  s32i.n	a12, a1, 4
0xff2c8423:  call8	0xff2ce2e8

----------------
IN: 
0xff2ce2e8:  entry	a1, 16

----------------
IN: 
0xff2ce2eb:  bltui	a3, 2, 0xff2ce318

----------------
IN: 
0xff2ce2ee:  nsau	a5, a2
0xff2ce2f1:  nsau	a4, a3
0xff2ce2f4:  bgeu	a5, a4, 0xff2ce30e

----------------
IN: 
0xff2ce2f7:  sub	a4, a4, a5
0xff2ce2fa:  ssl	a4
0xff2ce2fd:  sll	a3, a3
0xff2ce300:  nop.n
0xff2ce302:  loopnez	a4, 0xff2ce30e

----------------
IN: 
0xff2ce305:  bltu	a2, a3, 0xff2ce30b

----------------
IN: 
0xff2ce308:  sub	a2, a2, a3
0xff2ce30b:  srli	a3, a3, 1

----------------
IN: 
0xff2ce30b:  srli	a3, a3, 1

----------------
IN: 
0xff2ce30e:  bltu	a2, a3, 0xff2ce314

----------------
IN: 
0xff2ce314:  retw.n

----------------
IN: 
0xff2c8426:  l32i.n	a8, a1, 0
0xff2c8428:  l32i.n	a9, a1, 8
0xff2c842a:  l32i.n	a12, a1, 4
0xff2c842c:  beqz.n	a10, 0xff2c8431

----------------
IN: 
0xff2c8431:  movi.n	a10, 1
0xff2c8433:  movi.n	a9, 0
0xff2c8435:  s8i	a10, a5, 0
0xff2c8438:  s8i	a9, a5, 1
0xff2c843b:  s8i	a10, a5, 2
0xff2c843e:  s8i	a9, a5, 3
0xff2c8441:  l32i.n	a5, a2, 20
0xff2c8443:  add.n	a6, a6, a12
0xff2c8445:  add.n	a5, a5, a8
0xff2c8447:  s32i.n	a5, a2, 20
0xff2c8449:  l32i.n	a5, a2, 24
0xff2c844b:  sub	a5, a5, a8
0xff2c844e:  s32i.n	a5, a2, 24
0xff2c8450:  l16ui	a8, a3, 2
0xff2c8453:  j	0xff2c8473

----------------
IN: 
0xff2c8473:  blt	a7, a8, 0xff2c8458

----------------
IN: 
0xff2c8458:  slli	a2, a7, 3
0xff2c845b:  add.n	a2, a4, a2
0xff2c845d:  l8ui	a5, a2, 3
0xff2c8460:  l8ui	a9, a2, 2
0xff2c8463:  slli	a5, a5, 8
0xff2c8466:  or	a5, a5, a9
0xff2c8469:  bnez.n	a5, 0xff2c8471

----------------
IN: 
0xff2c8471:  addi.n	a7, a7, 1
0xff2c8473:  blt	a7, a8, 0xff2c8458

----------------
IN: 
0xff2c846b:  s16i	a7, a3, 6
0xff2c846e:  j	0xff2c8476

----------------
IN: 
0xff2c8476:  mov.n	a2, a6
0xff2c8478:  retw.n

----------------
IN: 
0xff2c86fc:  j	0xff2c8707

----------------
IN: 
0xff2c8707:  mov.n	a2, a10
0xff2c8709:  retw.n

----------------
IN: 
0xff2ce024:  entry	a1, 32

----------------
IN: 
0xff2ce027:  movi.n	a4, 0
0xff2ce029:  s32ri	a4, a2, 0
0xff2ce02c:  wsr.ps	a3

----------------
IN: 
0xff2ce02f:  rsync
0xff2ce032:  retw.n

xtensa_cpu_tlb_fill(ff314000, 1, 0) -> ff314000, ret = 0
----------------
IN: 
0xff2cc084:  mov.n	a3, a10
0xff2cc086:  movi.n	a2, -12
0xff2cc088:  beqz	a10, 0xff2cc0f8

----------------
IN: 
0xff2cc08b:  l32i.n	a2, a4, 4
0xff2cc08d:  s32i.n	a10, a7, 36
0xff2cc08f:  s32i.n	a2, a7, 44
0xff2cc091:  l32i.n	a2, a4, 8
0xff2cc093:  s32i.n	a2, a7, 48
0xff2cc095:  call8	0xff2c0ae4

----------------
IN: 
0xff2c0ae4:  entry	a1, 32

----------------
IN: 
0xff2c0ae7:  movi	a12, 1
0xff2c0aea:  movi	a13, 16
0xff2c0aed:  movi	a11, 0
0xff2c0af0:  mov.n	a10, a12
0xff2c0af2:  call8	0xff2c87b0

----------------
IN: 
0xff2ce00c:  entry	a1, 32

----------------
IN: 
0xff2ce00f:  rsil	a8, 5

----------------
IN: 
0xff2ce012:  movi	a9, 0
0xff2ce015:  wsr.scompare1	a9
0xff2ce018:  movi.n	a9, 1
0xff2ce01a:  s32c1i	a9, a2, 0
0xff2ce01d:  bnez	a9, 0xff2ce018

----------------
IN: 
0xff2ce020:  mov.n	a2, a8
0xff2ce022:  retw.n

----------------
IN: 
0xff2c8741:  call8	0xff2c81c0

----------------
IN: 
0xff2c8744:  rsr.prid	a2
0xff2c8747:  slli	a8, a2, 3
0xff2c874a:  sub	a8, a8, a2
0xff2c874d:  addi	a10, a10, 28
0xff2c8750:  slli	a8, a8, 2
0xff2c8753:  add.n	a10, a10, a8
0xff2c8755:  l32i.n	a2, a10, 16
0xff2c8757:  movi	a12, 630
0xff2c875a:  and	a2, a4, a2
0xff2c875d:  bne	a4, a2, 0xff2c8794

----------------
IN: 
0xff2c8760:  mov.n	a11, a5
0xff2c8762:  call8	0xff2c86c4

----------------
IN: 
0xff2c86c4:  entry	a1, 32

----------------
IN: 
0xff2c86c7:  mov.n	a10, a2
0xff2c86c9:  l32i.n	a13, a2, 0
0xff2c86cb:  movi.n	a11, 0
0xff2c86cd:  addi.n	a14, a3, 4
0xff2c86cf:  j	0xff2c8702

----------------
IN: 
0xff2c8702:  bne	a13, a11, 0xff2c86d2

----------------
IN: 
0xff2c86d2:  l32i.n	a8, a10, 4
0xff2c86d4:  slli	a9, a11, 4
0xff2c86d7:  add.n	a9, a8, a9
0xff2c86d9:  l16ui	a15, a9, 0
0xff2c86dc:  l16ui	a8, a9, 6
0xff2c86df:  l32i.n	a12, a9, 12
0xff2c86e1:  mul16u	a8, a8, a15
0xff2c86e4:  add.n	a8, a8, a12
0xff2c86e6:  extui	a8, a8, 0, 2
0xff2c86e9:  mov.n	a12, a3
0xff2c86eb:  movnez	a12, a14, a8
0xff2c86ee:  blt	a15, a12, 0xff2c8700

----------------
IN: 
0xff2c86f1:  l16ui	a8, a9, 4
0xff2c86f4:  beqz.n	a8, 0xff2c8700

----------------
IN: 
0xff2c86f6:  movi	a12, 4
0xff2c86f9:  call8	0xff2c83d4

----------------
IN: 
0xff2c83d4:  entry	a1, 48

----------------
IN: 
0xff2c83d7:  or	a9, a4, a4

----------------
IN: 
0xff2c83d7:  or	a9, a4, a4
0xff2c83da:  l32i	a4, a2, 4
0xff2c83dd:  slli	a3, a3, 4
0xff2c83e0:  add	a3, a4, a3
0xff2c83e3:  l16ui	a6, a3, 4
0xff2c83e6:  l16ui	a7, a3, 6
0xff2c83e9:  l16ui	a8, a3, 0
0xff2c83ec:  addi.n	a6, a6, -1
0xff2c83ee:  s16i	a6, a3, 4
0xff2c83f1:  mull	a10, a7, a8
0xff2c83f4:  l32i.n	a6, a3, 12
0xff2c83f6:  l32i.n	a4, a3, 8
0xff2c83f8:  add.n	a6, a10, a6
0xff2c83fa:  slli	a5, a7, 3
0xff2c83fd:  add.n	a5, a4, a5
0xff2c83ff:  extui	a10, a6, 8, 8
0xff2c8402:  s8i	a10, a5, 5
0xff2c8405:  extui	a10, a6, 16, 8
0xff2c8408:  s8i	a10, a5, 6
0xff2c840b:  extui	a10, a6, 24, 8
0xff2c840e:  s8i	a6, a5, 4
0xff2c8411:  s8i	a10, a5, 7
0xff2c8414:  movi.n	a12, 0
0xff2c8416:  beq	a9, a12, 0xff2c8431

----------------
IN: 
0xff2c8419:  mov.n	a11, a9
0xff2c841b:  mov.n	a10, a6
0xff2c841d:  s32i.n	a8, a1, 0
0xff2c841f:  s32i.n	a9, a1, 8
0xff2c8421:  s32i.n	a12, a1, 4
0xff2c8423:  call8	0xff2ce2e8

----------------
IN: 
0xff2ce2e8:  entry	a1, 16

----------------
IN: 
0xff2ce2eb:  bltui	a3, 2, 0xff2ce318

----------------
IN: 
0xff2ce2ee:  nsau	a5, a2
0xff2ce2f1:  nsau	a4, a3
0xff2ce2f4:  bgeu	a5, a4, 0xff2ce30e

----------------
IN: 
0xff2ce2f7:  sub	a4, a4, a5
0xff2ce2fa:  ssl	a4
0xff2ce2fd:  sll	a3, a3
0xff2ce300:  nop.n
0xff2ce302:  loopnez	a4, 0xff2ce30e

----------------
IN: 
0xff2c0af5:  s32i.n	a10, a2, 0
0xff2c0af7:  movi.n	a8, 0
0xff2c0af9:  movi.n	a2, -12
0xff2c0afb:  movnez	a2, a8, a10
0xff2c0afe:  retw.n

----------------
IN: 
0xff2c0afe:  retw.n

----------------
IN: 
0xff2cc098:  bltz	a10, 0xff2cc0e0

----------------
IN: 
0xff2cc09b:  l32i.n	a6, a3, 0
0xff2cc09d:  call8	0xff2cdf00

----------------
IN: 
0xff2cc0a0:  l32i.n	a4, a10, 0
0xff2cc0a2:  l32i.n	a2, a4, 0
0xff2cc0a4:  j	0xff2cc0b3

----------------
IN: 
0xff2cc0b3:  bne	a2, a4, 0xff2cc0a8

----------------
IN: 
0xff2cc0a8:  l32i.n	a8, a2, 8
0xff2cc0aa:  bnez.n	a8, 0xff2cc0b1

----------------
IN: 
0xff2cc0ac:  l32i.n	a5, a2, 16
0xff2cc0ae:  j	0xff2cc0b6

----------------
IN: 
0xff2cc0b6:  movi.n	a2, 0
0xff2cc0b8:  l16ui	a14, a7, 16
0xff2cc0bb:  l32r	a11, 0xff2cc04c
0xff2cc0be:  s32i.n	a2, a1, 0
0xff2cc0c0:  mov.n	a15, a2
0xff2cc0c2:  mov.n	a13, a5
0xff2cc0c4:  mov.n	a12, a7
0xff2cc0c6:  or	a10, a6, a6
0xff2cc0c9:  call8	0xff2c0b08

----------------
IN: 
0xff2c0b08:  entry	a1, 32

----------------
IN: 
0xff2c0b0b:  mov.n	a10, a7
0xff2c0b0d:  beqz.n	a7, 0xff2c0b19

----------------
IN: 
0xff2c0b19:  l32r	a6, 0xff2c0b00
0xff2c0b1c:  movi	a13, 4
0xff2c0b1f:  or	a12, a6, a6
0xff2c0b22:  movi	a11, 1
0xff2c0b25:  call8	0xff2c8804

----------------
IN: 
0xff2c8804:  entry	a1, 32

----------------
IN: 
0xff2c8807:  call8	0xff2c81c0

----------------
IN: 
0xff2c880a:  addi	a6, a10, 124
0xff2c880d:  or	a10, a6, a6
0xff2c8810:  call8	0xff2ce00c

----------------
IN: 
0xff2c8813:  or	a7, a10, a10
0xff2c8816:  or	a12, a5, a5
0xff2c8819:  mov.n	a11, a4
0xff2c881b:  mov.n	a10, a3
0xff2c881d:  call8	0xff2c8480

----------------
IN: 
0xff2c8480:  entry	a1, 80

----------------
IN: 
0xff2c8483:  s32i	a2, a1, 8
0xff2c8486:  s32i	a3, a1, 12
0xff2c8489:  call8	0xff2c81c0

----------------
IN: 
0xff2c848c:  addi	a10, a10, 84
0xff2c848f:  addi.n	a5, a4, -1
0xff2c8491:  s32i.n	a10, a1, 4
0xff2c8493:  mov.n	a2, a10
0xff2c8495:  movi.n	a3, 1
0xff2c8497:  s32i.n	a5, a1, 16
0xff2c8499:  movi.n	a6, 0
0xff2c849b:  j	0xff2c84b2

----------------
IN: 
0xff2c84b2:  blt	a6, a3, 0xff2c849e

----------------
IN: 
0xff2c849e:  mov.n	a5, a2
0xff2c84a0:  l32i.n	a7, a5, 16
0xff2c84a2:  l32i.n	a8, a1, 8
0xff2c84a4:  addi	a2, a2, 28
0xff2c84a7:  and	a7, a8, a7
0xff2c84aa:  bne	a8, a7, 0xff2c84b0

----------------
IN: 
0xff2c84ad:  j	0xff2c86ac

----------------
IN: 
0xff2c86ac:  l32i.n	a6, a1, 16
0xff2c86ae:  and	a3, a6, a4
0xff2c86b1:  bnez	a3, 0xff2c84b9

----------------
IN: 
0xff2c86b4:  l32i.n	a8, a1, 12
0xff2c86b6:  l32i.n	a9, a5, 0
0xff2c86b8:  add.n	a2, a8, a4
0xff2c86ba:  j	0xff2c8504

----------------
IN: 
0xff2c8504:  bne	a3, a9, 0xff2c84c5

----------------
IN: 
0xff2c84c5:  l32i.n	a7, a5, 4
0xff2c84c7:  slli	a6, a3, 4
0xff2c84ca:  add.n	a6, a7, a6
0xff2c84cc:  l16ui	a8, a6, 0
0xff2c84cf:  l16ui	a7, a6, 6
0xff2c84d2:  l32i.n	a10, a6, 12
0xff2c84d4:  mul16u	a7, a7, a8
0xff2c84d7:  mov.n	a11, a4
0xff2c84d9:  add.n	a10, a7, a10
0xff2c84db:  s32i.n	a8, a1, 32
0xff2c84dd:  s32i.n	a9, a1, 40
0xff2c84df:  call8	0xff2ce2e8

----------------
IN: 
0xff2ce2eb:  bltui	a3, 2, 0xff2ce318

----------------
IN: 
0xff2ce2ee:  nsau	a5, a2
0xff2ce2f1:  nsau	a4, a3
0xff2ce2f4:  bgeu	a5, a4, 0xff2ce30e

----------------
IN: 
0xff2ce2f7:  sub	a4, a4, a5
0xff2ce2fa:  ssl	a4
0xff2ce2fd:  sll	a3, a3
0xff2ce300:  nop.n
0xff2ce302:  loopnez	a4, 0xff2ce30e

----------------
IN: 
0xff2ce305:  bltu	a2, a3, 0xff2ce30b

----------------
IN: 
0xff2ce308:  sub	a2, a2, a3
0xff2ce30b:  srli	a3, a3, 1

----------------
IN: 
0xff2ce30b:  srli	a3, a3, 1

----------------
IN: 
0xff2ce30e:  bltu	a2, a3, 0xff2ce314

----------------
IN: 
0xff2ce314:  retw.n

----------------
IN: 
0xff2c84e2:  l32i.n	a13, a1, 12
0xff2c84e4:  l32i.n	a8, a1, 32
0xff2c84e6:  movnez	a13, a2, a10
0xff2c84e9:  l32i.n	a9, a1, 40
0xff2c84eb:  blt	a8, a13, 0xff2c8502

----------------
IN: 
0xff2c8502:  addi.n	a3, a3, 1
0xff2c8504:  bne	a3, a9, 0xff2c84c5

----------------
IN: 
0xff2c8507:  l32i.n	a3, a5, 0
0xff2c8509:  addi.n	a14, a3, -1
0xff2c850b:  j	0xff2c8679

----------------
IN: 
0xff2c8679:  bgez	a14, 0xff2c850e

----------------
IN: 
0xff2c850e:  l32i.n	a3, a5, 12
0xff2c8510:  bgeu	a3, a2, 0xff2c8518

----------------
IN: 
0xff2c8518:  l32i	a3, a5, 4
0xff2c851b:  slli	a6, a14, 4
0xff2c851e:  add	a6, a3, a6
0xff2c8521:  l16ui	a9, a6, 0
0xff2c8524:  bgeu	a9, a2, 0xff2c8513

----------------
IN: 
0xff2c8527:  l16ui	a3, a6, 6
0xff2c852a:  mov.n	a11, a9
0xff2c852c:  mov.n	a10, a2
0xff2c852e:  s32i.n	a14, a1, 36
0xff2c8530:  s32i.n	a9, a1, 40
0xff2c8532:  s32i.n	a3, a1, 0
0xff2c8534:  call8	0xff2ce298

----------------
IN: 
0xff2ce298:  entry	a1, 16

----------------
IN: 
0xff2ce29b:  bltui	a3, 2, 0xff2ce2ce

----------------
IN: 
0xff2ce29e:  mov.n	a6, a2
0xff2ce2a0:  nsau	a5, a6
0xff2ce2a3:  nsau	a4, a3
0xff2ce2a6:  bgeu	a5, a4, 0xff2ce2d4

----------------
IN: 
0xff2ce2a9:  sub	a4, a4, a5
0xff2ce2ac:  ssl	a4
0xff2ce2af:  sll	a3, a3
0xff2ce2b2:  movi	a2, 0
0xff2ce2b5:  loopnez	a4, 0xff2ce2c6

----------------
IN: 
0xff2ce2b8:  bltu	a6, a3, 0xff2ce2c0

----------------
IN: 
0xff2ce2bb:  sub	a6, a6, a3
0xff2ce2be:  addi.n	a2, a2, 1
0xff2ce2c0:  slli	a2, a2, 1
0xff2ce2c3:  srli	a3, a3, 1

----------------
IN: 
0xff2ce2c0:  slli	a2, a2, 1
0xff2ce2c3:  srli	a3, a3, 1

----------------
IN: 
0xff2ce2c6:  bltu	a6, a3, 0xff2ce2cc

----------------
IN: 
0xff2ce2cc:  retw.n

----------------
IN: 
0xff2c8537:  l32i.n	a9, a1, 40
0xff2c8539:  mov.n	a8, a10
0xff2c853b:  mov.n	a11, a9
0xff2c853d:  mov.n	a10, a2
0xff2c853f:  s32i.n	a8, a1, 32
0xff2c8541:  call8	0xff2ce2e8

----------------
IN: 
0xff2ce2e8:  entry	a1, 16

----------------
IN: 
0xff2ce2eb:  bltui	a3, 2, 0xff2ce318

----------------
IN: 
0xff2ce2ee:  nsau	a5, a2
0xff2ce2f1:  nsau	a4, a3
0xff2ce2f4:  bgeu	a5, a4, 0xff2ce30e

----------------
IN: 
0xff2ce2f7:  sub	a4, a4, a5
0xff2ce2fa:  ssl	a4
0xff2ce2fd:  sll	a3, a3
0xff2ce300:  nop.n
0xff2ce302:  loopnez	a4, 0xff2ce30e

----------------
IN: 
0xff2c8544:  l32i.n	a8, a1, 32
0xff2c8546:  l32i.n	a9, a1, 40
0xff2c8548:  l32i.n	a14, a1, 36
0xff2c854a:  beqz.n	a10, 0xff2c854e

----------------
IN: 
0xff2c854c:  addi.n	a8, a8, 1
0xff2c854e:  l32i.n	a10, a1, 0
0xff2c8550:  l16ui	a13, a6, 2
0xff2c8553:  mov.n	a7, a10
0xff2c8555:  movi.n	a3, 0
0xff2c8557:  j	0xff2c8582

----------------
IN: 
0xff2c8582:  bgeu	a10, a13, 0xff2c858d

----------------
IN: 
0xff2c8585:  bltu	a3, a8, 0xff2c855a

----------------
IN: 
0xff2c855a:  l32i.n	a12, a6, 8
0xff2c855c:  slli	a11, a10, 3
0xff2c855f:  add.n	a11, a12, a11
0xff2c8561:  l8ui	a12, a11, 2
0xff2c8564:  l8ui	a11, a11, 3
0xff2c8567:  slli	a11, a11, 8
0xff2c856a:  or	a11, a11, a12
0xff2c856d:  bnez.n	a11, 0xff2c8576

----------------
IN: 
0xff2c856f:  beqz.n	a3, 0xff2c857c

----------------
IN: 
0xff2c857c:  mov.n	a7, a10
0xff2c857e:  movi.n	a3, 1
0xff2c8580:  addi.n	a10, a10, 1
0xff2c8582:  bgeu	a10, a13, 0xff2c858d

----------------
IN: 
0xff2c8571:  addi.n	a3, a3, 1
0xff2c8573:  j	0xff2c8580

----------------
IN: 
0xff2c8580:  addi.n	a10, a10, 1
0xff2c8582:  bgeu	a10, a13, 0xff2c858d

----------------
IN: 
0xff2c8588:  j	0xff2c86a3

----------------
IN: 
0xff2c86a3:  bltu	a13, a8, 0xff2c86a9

----------------
IN: 
0xff2c86a6:  j	0xff2c8599

----------------
IN: 
0xff2c8599:  l16ui	a3, a6, 4
0xff2c859c:  extui	a12, a8, 0, 16
0xff2c859f:  sub	a3, a3, a12
0xff2c85a2:  l32i.n	a10, a6, 12
0xff2c85a4:  s16i	a3, a6, 4
0xff2c85a7:  mull	a3, a9, a7
0xff2c85aa:  l32i.n	a15, a6, 8
0xff2c85ac:  add.n	a3, a3, a10
0xff2c85ae:  slli	a10, a7, 3
0xff2c85b1:  add.n	a10, a15, a10
0xff2c85b3:  srli	a11, a12, 8
0xff2c85b6:  s8i	a11, a10, 1
0xff2c85b9:  extui	a11, a3, 8, 8
0xff2c85bc:  s8i	a11, a10, 5
0xff2c85bf:  extui	a11, a3, 16, 8
0xff2c85c2:  s8i	a11, a10, 6
0xff2c85c5:  extui	a11, a3, 24, 8
0xff2c85c8:  s8i	a11, a10, 7
0xff2c85cb:  s8i	a12, a10, 0
0xff2c85ce:  s8i	a3, a10, 4
0xff2c85d1:  movi.n	a11, 0
0xff2c85d3:  beq	a4, a11, 0xff2c85fd

----------------
IN: 
0xff2c85d6:  mov.n	a11, a4
0xff2c85d8:  mov.n	a10, a3
0xff2c85da:  s32i.n	a8, a1, 32
0xff2c85dc:  s32i.n	a9, a1, 40
0xff2c85de:  s32i.n	a12, a1, 24
0xff2c85e0:  s32i.n	a13, a1, 20
0xff2c85e2:  s32i.n	a14, a1, 36
0xff2c85e4:  s32i.n	a15, a1, 28
0xff2c85e6:  call8	0xff2ce2e8

----------------
IN: 
0xff2c85e9:  movi.n	a11, 0
0xff2c85eb:  l32i.n	a8, a1, 32
0xff2c85ed:  l32i.n	a9, a1, 40
0xff2c85ef:  l32i.n	a12, a1, 24
0xff2c85f1:  l32i.n	a13, a1, 20
0xff2c85f3:  l32i.n	a14, a1, 36
0xff2c85f5:  l32i.n	a15, a1, 28
0xff2c85f7:  beq	a10, a11, 0xff2c85fd

----------------
IN: 
0xff2c85fd:  mull	a9, a9, a8
0xff2c8600:  add.n	a10, a3, a11
0xff2c8602:  l32i.n	a11, a5, 20
0xff2c8604:  add.n	a11, a11, a9
0xff2c8606:  s32i.n	a11, a5, 20
0xff2c8608:  l32i.n	a11, a5, 24
0xff2c860a:  sub	a9, a11, a9
0xff2c860d:  s32i.n	a9, a5, 24
0xff2c860f:  l32i.n	a9, a1, 0
0xff2c8611:  beq	a9, a7, 0xff2c8622

----------------
IN: 
0xff2c8622:  add.n	a12, a7, a12
0xff2c8624:  s16i	a12, a6, 6
0xff2c8627:  j	0xff2c8645

----------------
IN: 
0xff2c8645:  l16ui	a9, a6, 6
0xff2c8648:  bltu	a9, a13, 0xff2c862c

----------------
IN: 
0xff2c862c:  slli	a11, a9, 3
0xff2c862f:  add.n	a11, a15, a11
0xff2c8631:  l8ui	a12, a11, 2
0xff2c8634:  l8ui	a11, a11, 3
0xff2c8637:  slli	a11, a11, 8
0xff2c863a:  or	a11, a11, a12
0xff2c863d:  beqz	a11, 0xff2c8614

----------------
IN: 
0xff2c8614:  add.n	a8, a8, a7
0xff2c8616:  extui	a9, a3, 0, 8
0xff2c8619:  extui	a11, a3, 8, 8
0xff2c861c:  extui	a12, a3, 16, 8
0xff2c861f:  j	0xff2c8670

----------------
IN: 
0xff2c8670:  bltu	a7, a8, 0xff2c8650

----------------
IN: 
0xff2c8650:  slli	a6, a7, 3
0xff2c8653:  add.n	a6, a15, a6
0xff2c8655:  movi.n	a13, 1
0xff2c8657:  s8i	a13, a6, 2
0xff2c865a:  movi.n	a13, 0
0xff2c865c:  s8i	a13, a6, 3
0xff2c865f:  extui	a13, a3, 24, 8
0xff2c8662:  s8i	a9, a6, 4
0xff2c8665:  s8i	a11, a6, 5
0xff2c8668:  s8i	a12, a6, 6
0xff2c866b:  s8i	a13, a6, 7
0xff2c866e:  addi.n	a7, a7, 1
0xff2c8670:  bltu	a7, a8, 0xff2c8650

----------------
IN: 
0xff2c8673:  beqz	a10, 0xff2c8513

----------------
IN: 
0xff2c8676:  j	0xff2c86bd

----------------
IN: 
0xff2c86bd:  mov.n	a2, a10
0xff2c86bf:  retw.n

----------------
IN: 
0xff2c8820:  mov.n	a2, a10
0xff2c8822:  movi	a12, 868
0xff2c8825:  mov.n	a11, a7
0xff2c8827:  mov.n	a10, a6
0xff2c8829:  call8	0xff2ce024

----------------
IN: 
0xff2c882c:  retw.n

----------------
IN: 
0xff2c0b28:  s32i.n	a10, a2, 4
0xff2c0b2a:  movi.n	a8, -12
0xff2c0b2c:  beqz.n	a10, 0xff2c0b5c

----------------
IN: 
0xff2c0b2e:  l32i.n	a8, a2, 12
0xff2c0b30:  s32i.n	a6, a2, 8
0xff2c0b32:  movi.n	a6, 1
0xff2c0b34:  or	a8, a8, a6
0xff2c0b37:  s32i.n	a8, a2, 12
0xff2c0b39:  l32i.n	a12, a2, 8
0xff2c0b3b:  l32i.n	a10, a2, 4
0xff2c0b3d:  movi.n	a11, 0
0xff2c0b3f:  call8	0xff2c80f4

xtensa_cpu_tlb_fill(ff31b600, 1, 0) -> ff31b600, ret = 0
----------------
IN: 
0xff2c0b42:  l32i.n	a8, a2, 8
0xff2c0b44:  addmi	a9, a8, -256
0xff2c0b47:  l32i.n	a8, a2, 4
0xff2c0b49:  add.n	a8, a8, a9
0xff2c0b4b:  s32i.n	a3, a8, 0
0xff2c0b4d:  l32r	a3, 0xff2c0b04
0xff2c0b50:  s32i.n	a8, a8, 20
0xff2c0b52:  s32i.n	a3, a8, 4
0xff2c0b54:  s32i.n	a4, a8, 40
0xff2c0b56:  s32i.n	a5, a8, 44
0xff2c0b58:  s32i.n	a8, a2, 0
0xff2c0b5a:  movi.n	a8, 0
0xff2c0b5c:  mov.n	a2, a8
0xff2c0b5e:  retw.n

----------------
IN: 
0xff2c0b5e:  retw.n

----------------
IN: 
0xff2cc0cc:  blt	a10, a2, 0xff2cc0e0

----------------
IN: 
0xff2cc0cf:  l16ui	a4, a7, 16
0xff2cc0d2:  beq	a4, a2, 0xff2cc0f8

----------------
IN: 
0xff2cc0f8:  retw.n

----------------
IN: 
0xff2cc8e7:  beq	a10, a2, 0xff2cc8f5

----------------
IN: 
0xff2cc8f5:  retw.n

----------------
IN: 
0xff2cc12b:  movi.n	a11, 0
0xff2cc12d:  movi.n	a10, 3
0xff2cc12f:  call8	0xff2caf3c

----------------
IN: 
0xff2caf3c:  entry	a1, 32

----------------
IN: 
0xff2caf3f:  call8	0xff2cb2ac

----------------
IN: 
0xff2cb2af:  l32r	a2, 0xff2cb2a8
0xff2cb2b2:  retw.n

----------------
IN: 
0xff2caf42:  beqz	a3, 0xff2caf4e

----------------
IN: 
0xff2caf4e:  mov.n	a8, a2
0xff2caf50:  mov.n	a2, a8
0xff2caf52:  retw.n

----------------
IN: 
0xff2cc132:  s32i.n	a10, a3, 12
0xff2cc134:  bltz	a10, 0xff2cc148

----------------
IN: 
0xff2cc137:  l32r	a11, 0xff2cc100
0xff2cc13a:  mov.n	a12, a3
0xff2cc13c:  call8	0xff2cb12c

----------------
IN: 
0xff2ce0dc:  entry	a1, 16

----------------
IN: 
0xff2ce0df:  wsr.intclear	a2

----------------
IN: 
0xff2ce0e2:  retw.n

----------------
IN: 
0xff2cc13f:  l32i.n	a10, a3, 12
0xff2cc141:  mov.n	a11, a3
0xff2cc143:  call8	0xff2cb150

----------------
IN: 
0xff2cc146:  movi.n	a10, 0
0xff2cc148:  mov.n	a2, a10
0xff2cc14a:  retw.n

----------------
IN: 
0xff2cc14a:  retw.n

----------------
IN: 
0xff2c0915:  l32r	a12, 0xff2c08ac
0xff2c0918:  l32r	a13, 0xff2c08b0
0xff2c091b:  l32i.n	a10, a2, 28
0xff2c091d:  movi.n	a11, 1
0xff2c091f:  call8	0xff2ccab8

----------------
IN: 
0xff2ccab8:  entry	a1, 32

----------------
IN: 
0xff2ccabb:  movi	a12, 1
0xff2ccabe:  mov.n	a11, a12
0xff2ccac0:  movi.n	a13, 48
0xff2ccac2:  movi.n	a10, 0
0xff2ccac4:  call8	0xff2c87b0

----------------
IN: 
0xff2ccac7:  movi.n	a6, 1
0xff2ccac9:  movi.n	a8, 0
0xff2ccacb:  l32r	a12, 0xff2c8fdc
0xff2ccace:  l32r	a13, 0xff2c08b0
0xff2ccad1:  s8i	a8, a10, 32
0xff2ccad4:  mov.n	a7, a2
0xff2ccad6:  s32i.n	a6, a10, 24
0xff2ccad8:  mov.n	a2, a10
0xff2ccada:  s32i.n	a3, a10, 28
0xff2ccadc:  mov.n	a10, a3
0xff2ccade:  call8	0xff2c8c48

----------------
IN: 
0xff2c8c48:  entry	a1, 32

----------------
IN: 
0xff2c8c4b:  call8	0xff2cb2ac

----------------
IN: 
0xff2c8c4e:  l32i	a8, a10, 24
0xff2c8c51:  slli	a2, a2, 5
0xff2c8c54:  add	a8, a8, a2
0xff2c8c57:  l32i	a9, a8, 12
0xff2c8c5a:  l32i.n	a8, a8, 4
0xff2c8c5c:  slli	a9, a9, 3
0xff2c8c5f:  add.n	a8, a8, a9
0xff2c8c61:  l32i.n	a2, a8, 4
0xff2c8c63:  mull	a5, a5, a2
0xff2c8c66:  muluh	a3, a2, a4
0xff2c8c69:  mull	a2, a2, a4
0xff2c8c6c:  add.n	a3, a5, a3
0xff2c8c6e:  retw.n

xtensa_cpu_tlb_fill(ff30001c, 0, 0) -> ff30001c, ret = 0
----------------
IN: 
0xff2ccae1:  s32i.n	a10, a2, 20
0xff2ccae3:  movi.n	a10, 0
0xff2ccae5:  memw
0xff2ccae8:  s32i.n	a10, a2, 8
0xff2ccaea:  l32r	a3, 0xff2ccab4
0xff2ccaed:  memw
0xff2ccaf0:  s32i.n	a10, a2, 12
0xff2ccaf2:  s32i.n	a3, a2, 44
0xff2ccaf4:  memw
0xff2ccaf7:  s32i.n	a10, a2, 16
0xff2ccaf9:  movi.n	a13, 24
0xff2ccafb:  mov.n	a12, a6
0xff2ccafd:  mov.n	a11, a6
0xff2ccaff:  call8	0xff2c87b0

----------------
IN: 
0xff2ccb02:  s32i.n	a7, a10, 0
0xff2ccb04:  s32i.n	a4, a10, 8
0xff2ccb06:  s32i.n	a5, a10, 12
0xff2ccb08:  s32i.n	a10, a2, 36
0xff2ccb0a:  retw.n

----------------
IN: 
0xff2ccb0a:  retw.n

----------------
IN: 
0xff2c0922:  s32i.n	a10, a2, 36
0xff2c0924:  call8	0xff2cc7a0

----------------
IN: 
0xff2cc7a0:  entry	a1, 32

----------------
IN: 
0xff2cc7a3:  movi	a11, 0
0xff2cc7a6:  movi.n	a13, 16
0xff2cc7a8:  movi.n	a12, 1
0xff2cc7aa:  mov.n	a10, a11
0xff2cc7ac:  call8	0xff2c87b0

----------------
IN: 
0xff2cc7af:  mov.n	a4, a2
0xff2cc7b1:  l32i.n	a12, a4, 28
0xff2cc7b3:  movi.n	a2, 0
0xff2cc7b5:  mov.n	a3, a10
0xff2cc7b7:  addi.n	a12, a12, -1
0xff2cc7b9:  movi.n	a8, 1
0xff2cc7bb:  s32i.n	a10, a3, 0
0xff2cc7bd:  s32i.n	a10, a3, 4
0xff2cc7bf:  movnez	a8, a2, a12
0xff2cc7c2:  l32r	a13, 0xff2cc798
0xff2cc7c5:  mov.n	a12, a8
0xff2cc7c7:  mov.n	a11, a2
0xff2cc7c9:  memw
0xff2cc7cc:  s32i	a2, a10, 8
0xff2cc7cf:  s32i.n	a4, a10, 12
0xff2cc7d1:  or	a14, a2, a2
0xff2cc7d4:  call8	0xff2c89a0

----------------
IN: 
0xff2c89a0:  entry	a1, 48

----------------
IN: 
0xff2c89a3:  s32i.n	a6, a1, 0
0xff2c89a5:  call8	0xff2cdef4

----------------
IN: 
0xff2c89a8:  movi.n	a6, 10
0xff2c89aa:  l32i.n	a7, a10, 0
0xff2c89ac:  l32i.n	a8, a1, 0
0xff2c89ae:  bgeu	a6, a4, 0xff2c89bc

----------------
IN: 
0xff2c89bc:  rsil	a6, 5

----------------
IN: 
0xff2c89bf:  bbci	a8, 0, 0xff2c89d6

----------------
IN: 
0xff2c89d6:  movi	a12, 1
0xff2c89d9:  movi	a13, 24
0xff2c89dc:  movi	a11, 0
0xff2c89df:  mov.n	a10, a12
0xff2c89e1:  call8	0xff2c87b0

----------------
IN: 
0xff2c89e4:  movi.n	a8, -12
0xff2c89e6:  beqz.n	a10, 0xff2c8a05

----------------
IN: 
0xff2c89e8:  slli	a4, a4, 3
0xff2c89eb:  s32i.n	a2, a10, 0
0xff2c89ed:  s32i.n	a3, a10, 4
0xff2c89ef:  add.n	a4, a7, a4
0xff2c89f1:  l32i.n	a3, a4, 0
0xff2c89f3:  movi.n	a2, 1
0xff2c89f5:  s32i.n	a2, a10, 20
0xff2c89f7:  s32i.n	a5, a10, 8
0xff2c89f9:  addi.n	a2, a10, 12
0xff2c89fb:  s32i.n	a2, a3, 4
0xff2c89fd:  s32i.n	a3, a10, 12
0xff2c89ff:  s32i.n	a4, a10, 16
0xff2c8a01:  s32i.n	a2, a4, 0
0xff2c8a03:  movi.n	a8, 0
0xff2c8a05:  wsr.ps	a6

----------------
IN: 
0xff2c8a08:  rsync
0xff2c8a0b:  mov.n	a2, a8
0xff2c8a0d:  retw.n

----------------
IN: 
0xff2c8a0d:  retw.n

----------------
IN: 
0xff2cc7d7:  l32r	a11, 0xff2cc79c
0xff2cc7da:  l32i.n	a10, a4, 24
0xff2cc7dc:  mov.n	a12, a3
0xff2cc7de:  call8	0xff2cc814

----------------
IN: 
0xff2cc848:  l32i.n	a8, a2, 0
0xff2cc84a:  l32i.n	a2, a8, 4
0xff2cc84c:  s32i.n	a5, a2, 0
0xff2cc84e:  s32i.n	a8, a5, 0
0xff2cc850:  s32i.n	a2, a5, 4
0xff2cc852:  s32i.n	a5, a8, 4
0xff2cc854:  retw.n

----------------
IN: 
0xff2cc7e1:  retw.n

----------------
IN: 
0xff2c0927:  l32r	a11, 0xff2c08b4
0xff2c092a:  rsr.prid	a10
0xff2c092d:  call8	0xff2c8ba8

----------------
IN: 
0xff2c8ba8:  entry	a1, 48

----------------
IN: 
0xff2c8bab:  s32i	a3, a1, 0
0xff2c8bae:  call8	0xff2cb2ac

----------------
IN: 
0xff2c8bb1:  l32i	a4, a10, 24
0xff2c8bb4:  slli	a3, a2, 5
0xff2c8bb7:  add	a4, a4, a3
0xff2c8bba:  l32i.n	a5, a4, 12
0xff2c8bbc:  addi	a7, a4, 24
0xff2c8bbf:  slli	a6, a5, 3
0xff2c8bc2:  l32i.n	a5, a4, 4
0xff2c8bc4:  mov.n	a10, a7
0xff2c8bc6:  add.n	a5, a5, a6
0xff2c8bc8:  l32i.n	a3, a5, 0
0xff2c8bca:  l32r	a6, 0xff2c8ba4
0xff2c8bcd:  s32i.n	a3, a6, 0
0xff2c8bcf:  l32i.n	a3, a5, 4
0xff2c8bd1:  movi.n	a5, 0
0xff2c8bd3:  s32i.n	a3, a6, 4
0xff2c8bd5:  call8	0xff2ce00c

----------------
IN: 
0xff2c8bd8:  mov.n	a3, a10
0xff2c8bda:  l32i.n	a8, a4, 4
0xff2c8bdc:  l32i.n	a10, a4, 0
0xff2c8bde:  l32i.n	a11, a1, 0
0xff2c8be0:  j	0xff2c8bf3

----------------
IN: 
0xff2c8bf3:  bne	a10, a5, 0xff2c8be4

----------------
IN: 
0xff2c8be4:  slli	a9, a5, 3
0xff2c8be7:  add	a9, a8, a9
0xff2c8bea:  l32i	a9, a9, 0
0xff2c8bed:  bgeu	a9, a11, 0xff2c8bf8

----------------
IN: 
0xff2c8bf0:  addi	a5, a5, 1
0xff2c8bf3:  bne	a10, a5, 0xff2c8be4

----------------
IN: 
0xff2c8bf8:  slli	a9, a5, 3
0xff2c8bfb:  add.n	a8, a8, a9
0xff2c8bfd:  l32i.n	a8, a8, 0
0xff2c8bff:  l32i.n	a12, a4, 20
0xff2c8c01:  l32i.n	a11, a4, 16
0xff2c8c03:  s32i.n	a8, a6, 8
0xff2c8c05:  movi.n	a14, 20
0xff2c8c07:  movi.n	a8, 0
0xff2c8c09:  mov.n	a13, a6
0xff2c8c0b:  mov.n	a10, a4
0xff2c8c0d:  s32i.n	a8, a6, 16
0xff2c8c0f:  call8	0xff2c8ac4

----------------
IN: 
0xff2c8ac4:  entry	a1, 32

----------------
IN: 
0xff2c8ac7:  bbci	a4, 0, 0xff2c8af2

----------------
IN: 
0xff2c8aca:  rsr.prid	a8
0xff2c8acd:  bnez.n	a8, 0xff2c8adc

----------------
IN: 
0xff2c8acf:  mov.n	a12, a5
0xff2c8ad1:  mov.n	a11, a3
0xff2c8ad3:  mov.n	a10, a2
0xff2c8ad5:  call8	0xff2c8954

----------------
IN: 
0xff2c8954:  entry	a1, 32

----------------
IN: 
0xff2c8957:  call8	0xff2cdef4

----------------
IN: 
0xff2c8957:  call8	0xff2cdef4

----------------
IN: 
0xff2cdef7:  rur.threadptr	a2
0xff2cdefa:  addi	a2, a2, 60
0xff2cdefd:  retw.n

----------------
IN: 
0xff2c895a:  l32i	a6, a10, 0
0xff2c895d:  slli	a5, a3, 3
0xff2c8960:  add	a5, a6, a5
0xff2c8963:  l32i	a8, a5, 0
0xff2c8966:  movi.n	a7, 1
0xff2c8968:  l32i.n	a6, a8, 0
0xff2c896a:  j	0xff2c8995

----------------
IN: 
0xff2c8995:  bne	a5, a8, 0xff2c896d

----------------
IN: 
0xff2c8998:  retw.n

----------------
IN: 
0xff2c8ad8:  j	0xff2c8af2

----------------
IN: 
0xff2c8af2:  retw.n

----------------
IN: 
0xff2c8c12:  l32i.n	a8, a4, 28
0xff2c8c14:  bnez.n	a8, 0xff2c8c1e

----------------
IN: 
0xff2c8c1e:  or	a11, a5, a5
0xff2c8c21:  or	a10, a2, a2
0xff2c8c24:  callx8	a8

----------------
IN: 
0xff2c06e0:  entry	a1, 32

----------------
IN: 
0xff2c06e3:  l32r	a9, 0xff2c06dc
0xff2c06e6:  l32r	a10, 0xff2c06d8
0xff2c06e9:  slli	a3, a3, 2
0xff2c06ec:  add	a9, a9, a3
0xff2c06ef:  memw
0xff2c06f2:  l32i	a11, a10, 0
0xff2c06f5:  l32i	a8, a9, 0
0xff2c06f8:  xor	a8, a11, a8
0xff2c06fb:  extui	a8, a8, 0, 3
0xff2c06fe:  xor	a8, a8, a11
0xff2c0701:  memw
0xff2c0704:  s32i.n	a8, a10, 0
0xff2c0706:  movi	a10, 194
0xff2c0709:  call8	0xff2c92ac

xtensa_cpu_tlb_fill(ff340080, 0, 0) -> ff340080, ret = 0
xtensa_cpu_tlb_fill(ff340080, 1, 0) -> ff340080, ret = 0
----------------
IN: 
0xff2c92ac:  entry	a1, 32

----------------
IN: 
0xff2c92af:  l32r	a10, 0xff2c91cc
0xff2c92b2:  movi.n	a12, -11
0xff2c92b4:  memw
0xff2c92b7:  l32i.n	a3, a10, 0
0xff2c92b9:  bltz	a3, 0xff2c92e1

----------------
IN: 
0xff2c92bc:  l32r	a8, 0xff2c92a4
0xff2c92bf:  l32r	a11, 0xff2c07e8
0xff2c92c2:  movi.n	a3, 0
0xff2c92c4:  memw
0xff2c92c7:  s32i.n	a3, a8, 0
0xff2c92c9:  or	a2, a2, a11
0xff2c92cc:  l32r	a14, 0xff2c92a8
0xff2c92cf:  l32r	a15, 0xff2c08b0
0xff2c92d2:  mov.n	a12, a3
0xff2c92d4:  memw
0xff2c92d7:  s32i.n	a2, a10, 0
0xff2c92d9:  call8	0xff2c8fe8

xtensa_cpu_tlb_fill(ff340070, 1, 0) -> ff340070, ret = 0
xtensa_cpu_tlb_fill(ff340074, 1, 0) -> ff340074, ret = 0
----------------
IN: 
0xff2c8fe8:  entry	a1, 32

----------------
IN: 
0xff2c8feb:  l32r	a12, 0xff2c8fdc

----------------
IN: 
0xff2c8feb:  l32r	a12, 0xff2c8fdc
0xff2c8fee:  l32r	a13, 0xff2c08b0
0xff2c8ff1:  movi	a10, 1
0xff2c8ff4:  call8	0xff2c8c48

irq: SC send busy interrupt 0xc2
----------------
IN: 
0xff2c8c4b:  call8	0xff2cb2ac

----------------
IN: 
0xff2c8ff7:  or	a8, a10, a10
0xff2c8ffa:  mull	a10, a7, a8
0xff2c8ffd:  mull	a11, a11, a6

----------------
IN: 
0xff2c9000:  add	a11, a11, a10
0xff2c9003:  mull	a10, a8, a6
0xff2c9006:  muluh	a8, a8, a6
0xff2c9009:  add.n	a11, a11, a8
0xff2c900b:  bnez.n	a11, 0xff2c9028

----------------
IN: 
0xff2c900d:  l32r	a5, 0xff2c8fe0
0xff2c9010:  bltu	a5, a10, 0xff2c9028

----------------
IN: 
0xff2c9028:  l32r	a12, 0xff2c8fe4
0xff2c902b:  l32r	a13, 0xff2c08b0
0xff2c902e:  movi	a5, 8
0xff2c9031:  call8	0xff2cdbd8

----------------
IN: 
0xff2cdbd8:  entry	a1, 48

----------------
IN: 
0xff2cdbdb:  or	a6, a3, a3
0xff2cdbde:  or	a9, a4, a4
0xff2cdbe1:  mov.n	a7, a4
0xff2cdbe3:  mov.n	a3, a5
0xff2cdbe5:  mov.n	a4, a2
0xff2cdbe7:  or	a8, a6, a6
0xff2cdbea:  bnez	a5, 0xff2cddea

----------------
IN: 
0xff2cdbed:  bltu	a6, a9, 0xff2cdbf3

----------------
IN: 
0xff2cdbf3:  nsau	a2, a9
0xff2cdbf6:  beqz	a2, 0xff2cdc17

----------------
IN: 
0xff2cdbf9:  neg	a5, a2
0xff2cdbfc:  ssr	a5
0xff2cdbff:  srl	a5, a4
0xff2cdc02:  ssl	a2
0xff2cdc05:  sll	a8, a6
0xff2cdc08:  ssl	a2
0xff2cdc0b:  sll	a7, a9
0xff2cdc0e:  or	a8, a5, a8
0xff2cdc11:  ssl	a2
0xff2cdc14:  sll	a4, a4
0xff2cdc17:  extui	a2, a7, 16, 16
0xff2cdc1a:  mov.n	a11, a2
0xff2cdc1c:  mov.n	a10, a8
0xff2cdc1e:  s32i.n	a8, a1, 8
0xff2cdc20:  call8	0xff2ce2e8

----------------
IN: 
0xff2cdc23:  l32i.n	a8, a1, 8
0xff2cdc25:  mov.n	a9, a10
0xff2cdc27:  mov.n	a11, a2
0xff2cdc29:  mov.n	a10, a8
0xff2cdc2b:  s32i.n	a9, a1, 4
0xff2cdc2d:  call8	0xff2ce298

----------------
IN: 
0xff2ce29b:  bltui	a3, 2, 0xff2ce2ce

----------------
IN: 
0xff2ce29e:  mov.n	a6, a2
0xff2ce2a0:  nsau	a5, a6
0xff2ce2a3:  nsau	a4, a3
0xff2ce2a6:  bgeu	a5, a4, 0xff2ce2d4

----------------
IN: 
0xff2ce2d4:  bltu	a6, a3, 0xff2ce2e4

----------------
IN: 
0xff2ce2e4:  movi.n	a2, 0
0xff2ce2e6:  retw.n

----------------
IN: 
0xff2cdc30:  l32i.n	a9, a1, 4
0xff2cdc32:  extui	a5, a7, 0, 16
0xff2cdc35:  mov.n	a6, a10
0xff2cdc37:  mull	a8, a5, a10
0xff2cdc3a:  slli	a9, a9, 16
0xff2cdc3d:  extui	a10, a4, 16, 16
0xff2cdc40:  or	a10, a9, a10
0xff2cdc43:  bgeu	a10, a8, 0xff2cdc59

----------------
IN: 
0xff2cdc59:  sub	a8, a10, a8
0xff2cdc5c:  or	a11, a2, a2
0xff2cdc5f:  or	a10, a8, a8
0xff2cdc62:  s32i.n	a8, a1, 8
0xff2cdc64:  call8	0xff2ce2e8

----------------
IN: 
0xff2cdc67:  l32i.n	a8, a1, 8
0xff2cdc69:  mov.n	a9, a10
0xff2cdc6b:  mov.n	a11, a2
0xff2cdc6d:  mov.n	a10, a8
0xff2cdc6f:  s32i.n	a9, a1, 4
0xff2cdc71:  call8	0xff2ce298

----------------
IN: 
0xff2ce2a9:  sub	a4, a4, a5
0xff2ce2ac:  ssl	a4
0xff2ce2af:  sll	a3, a3
0xff2ce2b2:  movi	a2, 0
0xff2ce2b5:  loopnez	a4, 0xff2ce2c6

----------------
IN: 
0xff2ce2b8:  bltu	a6, a3, 0xff2ce2c0

----------------
IN: 
0xff2ce2c0:  slli	a2, a2, 1
0xff2ce2c3:  srli	a3, a3, 1

----------------
IN: 
0xff2ce2bb:  sub	a6, a6, a3
0xff2ce2be:  addi.n	a2, a2, 1
0xff2ce2c0:  slli	a2, a2, 1
0xff2ce2c3:  srli	a3, a3, 1

----------------
IN: 
0xff2ce2c6:  bltu	a6, a3, 0xff2ce2cc

----------------
IN: 
0xff2ce2cc:  retw.n

----------------
IN: 
0xff2cdc74:  l32i.n	a9, a1, 4
0xff2cdc76:  extui	a4, a4, 0, 16
0xff2cdc79:  slli	a9, a9, 16
0xff2cdc7c:  mull	a5, a5, a10
0xff2cdc7f:  or	a4, a9, a4
0xff2cdc82:  bltu	a4, a5, 0xff2cdc88

----------------
IN: 
0xff2cdc85:  j	0xff2cdde0

----------------
IN: 
0xff2cdde0:  slli	a6, a6, 16
0xff2cdde3:  or	a10, a6, a10
0xff2cdde6:  j	0xff2cdef0

----------------
IN: 
0xff2cdef0:  mov.n	a2, a10
0xff2cdef2:  retw.n

----------------
IN: 
0xff2c9034:  or	a6, a10, a10
0xff2c9037:  or	a7, a11, a11
0xff2c903a:  j	0xff2c9040

----------------
IN: 
0xff2c9040:  memw
0xff2c9043:  l32i.n	a8, a2, 0
0xff2c9045:  and	a8, a3, a8
0xff2c9048:  bne	a8, a4, 0xff2c9016

xtensa_cpu_tlb_fill(ff340074, 0, 0) -> ff340074, ret = 0
----------------
IN: 
0xff2c904b:  movi.n	a2, 0
0xff2c904d:  j	0xff2c9052

----------------
IN: 
0xff2c9052:  retw.n

----------------
IN: 
0xff2c92dc:  movi.n	a12, -22
0xff2c92de:  movgez	a12, a3, a10
0xff2c92e1:  mov.n	a2, a12
0xff2c92e3:  retw.n

----------------
IN: 
0xff2c92e3:  retw.n

----------------
IN: 
0xff2c070c:  mov.n	a2, a10
0xff2c070e:  retw.n

----------------
IN: 
0xff2c070e:  retw.n

----------------
IN: 
0xff2c8c27:  beqz	a10, 0xff2c8c16

----------------
IN: 
0xff2c8c16:  s32i.n	a5, a4, 12
0xff2c8c18:  j	0xff2c8c2a

----------------
IN: 
0xff2c8c2a:  l32i.n	a12, a4, 20
0xff2c8c2c:  l32i.n	a11, a4, 16
0xff2c8c2e:  mov.n	a10, a4
0xff2c8c30:  movi.n	a2, 1
0xff2c8c32:  movi.n	a14, 20
0xff2c8c34:  mov.n	a13, a6
0xff2c8c36:  s32i.n	a2, a6, 16
0xff2c8c38:  call8	0xff2c8ac4

xtensa_cpu_tlb_fill(ff309800, 0, 0) -> ff309800, ret = 0
----------------
IN: 
0xff2c8c3b:  movi.n	a12, 85
0xff2c8c3d:  mov.n	a11, a3
0xff2c8c3f:  mov.n	a10, a7
0xff2c8c41:  call8	0xff2ce024

----------------
IN: 
0xff2ce024:  entry	a1, 32

----------------
IN: 
0xff2ce027:  movi.n	a4, 0
0xff2ce029:  s32ri	a4, a2, 0
0xff2ce02c:  wsr.ps	a3

----------------
IN: 
0xff2c05bc:  xsr.excsave4	a2
0xff2c05bf:  jx	a2

----------------
IN: 
0xff2cd468:  xsr.excsave4	a2
0xff2cd46b:  addmi	a1, a1, -512
0xff2cd46e:  s32i.n	a2, a1, 24
0xff2cd470:  l32r	a2, 0xff2c0b9c
0xff2cd473:  s32i.n	a4, a1, 32
0xff2cd475:  s32i.n	a5, a1, 36
0xff2cd477:  wsr.ps	a2

----------------
IN: 
0xff2cd47a:  rsync
0xff2cd47d:  rsr.eps4	a2
0xff2cd480:  s32i.n	a2, a1, 4
0xff2cd482:  rsr.epc4	a2
0xff2cd485:  s32i.n	a2, a1, 0
0xff2cd487:  s32i.n	a0, a1, 16
0xff2cd489:  s32i.n	a3, a1, 28
0xff2cd48b:  s32i.n	a6, a1, 40
0xff2cd48d:  s32i.n	a7, a1, 44
0xff2cd48f:  s32i.n	a8, a1, 48
0xff2cd491:  s32i.n	a9, a1, 52
0xff2cd493:  s32i.n	a10, a1, 56
0xff2cd495:  s32i.n	a11, a1, 60
0xff2cd497:  s32i	a12, a1, 64
0xff2cd49a:  s32i	a13, a1, 68
0xff2cd49d:  s32i	a14, a1, 72
0xff2cd4a0:  s32i	a15, a1, 76
0xff2cd4a3:  rur.threadptr	a2
0xff2cd4a6:  l32i.n	a2, a2, 44
0xff2cd4a8:  s32i.n	a1, a2, 0
0xff2cd4aa:  rur.threadptr	a2
0xff2cd4ad:  l32i.n	a2, a2, 48
0xff2cd4af:  beqz	a2, 0xff2cd4b5

----------------
IN: 
0xff2cd4b5:  l32i	a2, a1, 492
0xff2cd4b8:  addmi	a1, a1, 512
0xff2cd4bb:  rsr.epc4	a4
0xff2cd4be:  l32r	a5, 0xff2c0ba0
0xff2cd4c1:  or	a4, a5, a4
0xff2cd4c4:  addx2	a4, a5, a4
0xff2cd4c7:  entry	a1, 512

----------------
IN: 
0xff2cd4ca:  rsil	a15, 6

----------------
IN: 
0xff2cd4cd:  rsr.interrupt	a15

----------------
IN: 
0xff2cd4d0:  rsr.intenable	a12
0xff2cd4d3:  l32r	a13, 0xff2c0bcc
0xff2cd4d6:  and	a15, a15, a12
0xff2cd4d9:  and	a15, a15, a13
0xff2cd4dc:  rsr.sar	a14
0xff2cd4df:  s32i.n	a14, a1, 8
0xff2cd4e1:  rsr.lcount	a13
0xff2cd4e4:  rsr.lbeg	a14
0xff2cd4e7:  s32i	a13, a1, 88
0xff2cd4ea:  rsr.lend	a13
0xff2cd4ed:  s32i	a14, a1, 92
0xff2cd4f0:  s32i	a13, a1, 96
0xff2cd4f3:  rsr.acclo	a13
0xff2cd4f6:  rsr.acchi	a14
0xff2cd4f9:  s32i	a13, a1, 104
0xff2cd4fc:  s32i	a14, a1, 108
0xff2cd4ff:  rur.threadptr	a13
0xff2cd502:  l32i.n	a13, a13, 28
0xff2cd504:  s32i.n	a1, a13, 0
0xff2cd506:  addmi	a1, a13, 4096
0xff2cd509:  beqz	a15, 0xff2cd599

----------------
IN: 
0xff2cd50c:  rur.threadptr	a11
0xff2cd50f:  l32i.n	a11, a11, 36
0xff2cd511:  s32i.n	a13, a11, 4
0xff2cd513:  l32r	a13, 0xff2c08a4
0xff2cd516:  s32i.n	a13, a11, 8
0xff2cd518:  rur.threadptr	a13
0xff2cd51b:  l32i.n	a13, a13, 48
0xff2cd51d:  rur.threadptr	a14
0xff2cd520:  s32i	a13, a14, 40
0xff2cd523:  rur.threadptr	a14
0xff2cd526:  s32i	a11, a14, 48
0xff2cd529:  neg	a12, a15
0xff2cd52c:  and	a12, a12, a15
0xff2cd52f:  wsr.intclear	a12

----------------
IN: 
0xff2cd532:  l32r	a13, 0xff2c0bb0
0xff2cd535:  movi.n	a14, 31
0xff2cd537:  nsau	a12, a12
0xff2cd53a:  sub	a15, a14, a12
0xff2cd53d:  neg	a15, a15
0xff2cd540:  addi	a15, a15, 21
0xff2cd543:  addx8	a12, a15, a13
0xff2cd546:  l32i.n	a13, a12, 0
0xff2cd548:  l32i.n	a14, a12, 4
0xff2cd54a:  or	a15, a1, a1
0xff2cd54d:  callx12	a13

----------------
IN: 
0xff2c91e0:  entry	a1, 32

----------------
IN: 
0xff2c91e3:  l32r	a2, 0xff2c91c4
0xff2c91e6:  memw
0xff2c91e9:  l32i	a3, a2, 0
0xff2c91ec:  bbci	a3, 0, 0xff2c9229

xtensa_cpu_tlb_fill(ff340050, 0, 0) -> ff340050, ret = 0
----------------
IN: 
0xff2c91ef:  l32r	a2, 0xff2c91c8
0xff2c91f2:  movi	a11, 1

----------------
IN: 
0xff2c0480:  s32e	a0, a9, -16
0xff2c0483:  l32e	a0, a1, -12
0xff2c0486:  s32e	a1, a9, -12
0xff2c0489:  s32e	a2, a9, -8
0xff2c048c:  s32e	a3, a9, -4
0xff2c048f:  s32e	a4, a0, -32
0xff2c0492:  s32e	a5, a0, -28
0xff2c0495:  s32e	a6, a0, -24
0xff2c0498:  s32e	a7, a0, -20
0xff2c049b:  rfwo

----------------
IN: 
0xff2c91f2:  movi	a11, 1
0xff2c91f5:  memw
0xff2c91f8:  l32i.n	a8, a2, 0
0xff2c91fa:  movi.n	a10, 11
0xff2c91fc:  or	a8, a8, a11
0xff2c91ff:  memw
0xff2c9202:  s32i.n	a8, a2, 0
0xff2c9204:  call8	0xff2c9350

xtensa_cpu_tlb_fill(ff340060, 0, 0) -> ff340060, ret = 0
irq: SHIM_IMRLPESC masking 1 mask 1 active 0
----------------
IN: 
0xff2c9350:  entry	a1, 32

----------------
IN: 
0xff2c9353:  addi	a8, a2, -3

----------------
IN: 
0xff2c0400:  s32e	a0, a5, -16
0xff2c0403:  s32e	a1, a5, -12
0xff2c0406:  s32e	a2, a5, -8
0xff2c0409:  s32e	a3, a5, -4
0xff2c040c:  rfwo

----------------
IN: 
0xff2c9353:  addi	a8, a2, -3
0xff2c9356:  movi.n	a9, 15
0xff2c9358:  bltu	a9, a8, 0xff2c93c9

----------------
IN: 
0xff2c935b:  l32r	a9, 0xff2c9340
0xff2c935e:  slli	a8, a8, 2
0xff2c9361:  add.n	a8, a9, a8
0xff2c9363:  l32i.n	a8, a8, 0
0xff2c9365:  jx	a8

----------------
IN: 
0xff2c9369:  movi.n	a10, 1
0xff2c936b:  ssl	a2
0xff2c936e:  sll	a10, a10
0xff2c9371:  j	0xff2c93c6

----------------
IN: 
0xff2c93c6:  call8	0xff2ce0dc

----------------
IN: 
0xff2ce0dc:  entry	a1, 16

----------------
IN: 
0xff2ce0df:  wsr.intclear	a2

----------------
IN: 
0xff2ce0e2:  retw.n

----------------
IN: 
0xff2c93c9:  retw.n

----------------
IN: 
0xff2c9207:  l32r	a9, 0xff2c91cc
0xff2c920a:  l32r	a10, 0xff2c91d0
0xff2c920d:  memw
0xff2c9210:  l32i.n	a8, a9, 0
0xff2c9212:  and	a8, a8, a10
0xff2c9215:  memw
0xff2c9218:  s32i.n	a8, a9, 0
0xff2c921a:  memw
0xff2c921d:  l32i.n	a8, a2, 0
0xff2c921f:  movi.n	a9, -2
0xff2c9221:  and	a8, a8, a9
0xff2c9224:  memw
0xff2c9227:  s32i.n	a8, a2, 0
0xff2c9229:  movi.n	a9, 2
0xff2c922b:  bnone	a3, a9, 0xff2c9262

xtensa_cpu_tlb_fill(ff340074, 0, 0) -> ff340074, ret = 0
irq: SHIM_IMRLPESC masking 0 mask 0 active 0
----------------
IN: 
0xff2c9262:  retw.n

----------------
IN: 
0xff2cd550:  rsr.interrupt	a15

----------------
IN: 
0xff2cd553:  rsr.intenable	a12
0xff2cd556:  l32r	a13, 0xff2c0bcc
0xff2cd559:  and	a15, a15, a12
0xff2cd55c:  and	a15, a15, a13
0xff2cd55f:  bnez	a15, 0xff2cd529

----------------
IN: 
0xff2cd562:  rur.threadptr	a11
0xff2cd565:  l32i.n	a11, a11, 48
0xff2cd567:  rur.threadptr	a12
0xff2cd56a:  l32i.n	a12, a12, 36
0xff2cd56c:  bne	a11, a12, 0xff2cd579

----------------
IN: 
0xff2cd56f:  rur.threadptr	a12
0xff2cd572:  l32i.n	a12, a12, 40
0xff2cd574:  rur.threadptr	a11
0xff2cd577:  s32i.n	a12, a11, 48
0xff2cd579:  l32i	a13, a1, 88
0xff2cd57c:  l32i	a14, a1, 92
0xff2cd57f:  l32i	a15, a1, 96
0xff2cd582:  wsr.lcount	a13
0xff2cd585:  wsr.lbeg	a14

----------------
IN: 
0xff2cd588:  wsr.lend	a15

----------------
IN: 
0xff2cd58b:  l32i	a13, a1, 104
0xff2cd58e:  l32i	a14, a1, 108
0xff2cd591:  wsr.acclo	a13
0xff2cd594:  wsr.acchi	a14
0xff2cd597:  l32i.n	a14, a1, 8
0xff2cd599:  l32r	a0, 0xff2c0bd0
0xff2cd59c:  l32r	a13, 0xff2c0ba0
0xff2cd59f:  wsr.sar	a14
0xff2cd5a2:  or	a0, a0, a13
0xff2cd5a5:  addx2	a0, a13, a0
0xff2cd5a8:  rsil	a14, 5

----------------
IN: 
0xff2cd5ab:  retw.n

----------------
IN: 
0xff2c0440:  l32e	a0, a5, -16
0xff2c0443:  l32e	a1, a5, -12
0xff2c0446:  l32e	a2, a5, -8
0xff2c0449:  l32e	a3, a5, -4
0xff2c044c:  rfwu

----------------
IN: 
0xff2cd5ad:  addmi	a5, a5, -4096
0xff2cd5b0:  l32i.n	a5, a5, 0
0xff2cd5b2:  s32i	a2, a5, 492
0xff2cd5b5:  s32i.n	a1, a5, 20
0xff2cd5b7:  l32i.n	a4, a5, 32
0xff2cd5b9:  l32i.n	a6, a5, 40
0xff2cd5bb:  l32i.n	a7, a5, 44
0xff2cd5bd:  l32i.n	a8, a5, 48
0xff2cd5bf:  l32i.n	a9, a5, 52
0xff2cd5c1:  l32i.n	a10, a5, 56
0xff2cd5c3:  l32i.n	a11, a5, 60
0xff2cd5c5:  l32i	a12, a5, 64
0xff2cd5c8:  l32i	a13, a5, 68
0xff2cd5cb:  l32i	a14, a5, 72
0xff2cd5ce:  rur.threadptr	a2
0xff2cd5d1:  l32i.n	a2, a2, 44
0xff2cd5d3:  rur.threadptr	a1
0xff2cd5d6:  l32i.n	a1, a1, 48
0xff2cd5d8:  beqz.n	a1, 0xff2cd60a

----------------
IN: 
0xff2cd60a:  l32i.n	a0, a5, 4
0xff2cd60c:  wsr.eps4	a0
0xff2cd60f:  rsync
0xff2cd612:  l32i.n	a0, a5, 0
0xff2cd614:  wsr.epc4	a0
0xff2cd617:  l32i.n	a0, a5, 8
0xff2cd619:  wsr.sar	a0
0xff2cd61c:  l32i	a0, a5, 88
0xff2cd61f:  l32i	a1, a5, 92
0xff2cd622:  l32i	a2, a5, 96
0xff2cd625:  wsr.lcount	a0
0xff2cd628:  wsr.lbeg	a1

----------------
IN: 
0xff2cd62b:  wsr.lend	a2

----------------
IN: 
0xff2cd62e:  l32i	a0, a5, 104
0xff2cd631:  l32i	a1, a5, 108
0xff2cd634:  wsr.acclo	a0
0xff2cd637:  wsr.acchi	a1
0xff2cd63a:  l32i.n	a0, a5, 16
0xff2cd63c:  l32i.n	a1, a5, 20
0xff2cd63e:  l32i.n	a2, a5, 24
0xff2cd640:  l32i.n	a3, a5, 28
0xff2cd642:  l32i	a15, a5, 76
0xff2cd645:  l32i.n	a5, a5, 36
0xff2cd647:  rfi	4

----------------
IN: 
0xff2ce02f:  rsync
0xff2ce032:  retw.n

----------------
IN: 
0xff2ce032:  retw.n

----------------
IN: 
0xff2c8c44:  retw.n

----------------
IN: 
0xff2c0930:  l32r	a11, 0xff2c08b8
0xff2c0933:  movi.n	a10, 1
0xff2c0935:  call8	0xff2c8ba8

----------------
IN: 
0xff2ce00c:  entry	a1, 32

----------------
IN: 
0xff2ce00f:  rsil	a8, 5

----------------
IN: 
0xff2ce012:  movi	a9, 0
0xff2ce015:  wsr.scompare1	a9
0xff2ce018:  movi.n	a9, 1
0xff2ce01a:  s32c1i	a9, a2, 0
0xff2ce01d:  bnez	a9, 0xff2ce018

----------------
IN: 
0xff2ce020:  mov.n	a2, a8
0xff2ce022:  retw.n

----------------
IN: 
0xff2c896d:  addi	a8, a8, -12
0xff2c8970:  beqz.n	a2, 0xff2c8986

----------------
IN: 
0xff2c8972:  l32i.n	a9, a8, 4
0xff2c8974:  movi.n	a10, 0
0xff2c8976:  moveqz	a10, a7, a9
0xff2c8979:  extui	a10, a10, 0, 8
0xff2c897c:  bnez.n	a10, 0xff2c8986

----------------
IN: 
0xff2c8986:  l32i.n	a9, a8, 8
0xff2c8988:  l32i.n	a10, a8, 0
0xff2c898a:  mov.n	a12, a4
0xff2c898c:  mov.n	a11, a3
0xff2c898e:  callx8	a9

----------------
IN: 
0xff2cc1e0:  entry	a1, 48

----------------
IN: 
0xff2cc1e3:  rsil	a6, 5

----------------
IN: 
0xff2cc1e6:  l32i.n	a3, a4, 16
0xff2cc1e8:  beqi	a3, 1, 0xff2cc1f4

----------------
IN: 
0xff2cc1eb:  wsr.ps	a6

----------------
IN: 
0xff2cc1ee:  rsync
0xff2cc1f1:  retw.n

----------------
IN: 
0xff2c8991:  mov.n	a8, a6
0xff2c8993:  l32i.n	a6, a6, 0
0xff2c8995:  bne	a5, a8, 0xff2c896d

----------------
IN: 
0xff2c06c4:  entry	a1, 32

----------------
IN: 
0xff2c06c7:  l32r	a8, 0xff2c06c0
0xff2c06ca:  slli	a3, a3, 2
0xff2c06cd:  add.n	a8, a8, a3
0xff2c06cf:  l32i.n	a10, a8, 0
0xff2c06d1:  call8	0xff2c92ac

xtensa_cpu_tlb_fill(ff340074, 0, 0) -> ff340074, ret = 0
xtensa_cpu_tlb_fill(ff2c07e8, 0, 0) -> ff2c07e8, ret = 0
xtensa_cpu_tlb_fill(ff340070, 1, 0) -> ff340070, ret = 0
xtensa_cpu_tlb_fill(ff340074, 1, 0) -> ff340074, ret = 0
----------------
IN: 
0xff2ce2eb:  bltui	a3, 2, 0xff2ce318

----------------
IN: 
0xff2ce2ee:  nsau	a5, a2
0xff2ce2f1:  nsau	a4, a3
0xff2ce2f4:  bgeu	a5, a4, 0xff2ce30e

----------------
IN: 
0xff2ce30e:  bltu	a2, a3, 0xff2ce314

irq: SC send busy interrupt 0xc5
----------------
IN: 
0xff2ce314:  retw.n

----------------
IN: 
0xff2ce298:  entry	a1, 16

----------------
IN: 
0xff2ce29b:  bltui	a3, 2, 0xff2ce2ce

----------------
IN: 
0xff2ce29e:  mov.n	a6, a2
0xff2ce2a0:  nsau	a5, a6
0xff2ce2a3:  nsau	a4, a3
0xff2ce2a6:  bgeu	a5, a4, 0xff2ce2d4

----------------
IN: 
0xff2ce2d4:  bltu	a6, a3, 0xff2ce2e4

----------------
IN: 
0xff2ce2e4:  movi.n	a2, 0
0xff2ce2e6:  retw.n

----------------
IN: 
0xff2ce2f7:  sub	a4, a4, a5
0xff2ce2fa:  ssl	a4
0xff2ce2fd:  sll	a3, a3
0xff2ce300:  nop.n
0xff2ce302:  loopnez	a4, 0xff2ce30e

xtensa_cpu_tlb_fill(ff340074, 0, 0) -> ff340074, ret = 0
----------------
IN: 
0xff2c06d4:  mov.n	a2, a10
0xff2c06d6:  retw.n

----------------
IN: 
0xff2c06d6:  retw.n

xtensa_cpu_tlb_fill(ff309808, 0, 0) -> ff309808, ret = 0
----------------
IN: 
0xff2cc1f4:  l32i	a5, a2, 12
0xff2cc1f7:  l32r	a12, 0xff2c8fdc

----------------
IN: 
0xff2cc1f7:  l32r	a12, 0xff2c8fdc
0xff2cc1fa:  l32r	a13, 0xff2c08b0
0xff2cc1fd:  l32i.n	a10, a5, 28
0xff2cc1ff:  call8	0xff2c8c48

----------------
IN: 
0xff2cc202:  l32i.n	a5, a2, 12
0xff2cc204:  s32i.n	a10, a5, 20
0xff2cc206:  call8	0xff2cb2ac

----------------
IN: 
0xff2cc209:  l32i.n	a10, a10, 28
0xff2cc20b:  movi.n	a5, 0
0xff2cc20d:  call8	0xff2c9e70

----------------
IN: 
0xff2c9e70:  entry	a1, 32

----------------
IN: 
0xff2c9e73:  or	a3, a2, a2
0xff2c9e76:  rsil	a4, 5

----------------
IN: 
0xff2c9e79:  l32r	a2, 0xff2c9e6c
0xff2c9e7c:  memw
0xff2c9e7f:  l32i	a2, a2, 0
0xff2c9e82:  call8	0xff2ce0cc

xtensa_cpu_tlb_fill(ff3400c8, 0, 0) -> ff3400c8, ret = 0
----------------
IN: 
0xff2ce0cc:  entry	a1, 16

----------------
IN: 
0xff2ce0cf:  rsr.interrupt	a2

----------------
IN: 
0xff2ce0d2:  retw.n

----------------
IN: 
0xff2c9e85:  l32i	a3, a3, 24
0xff2c9e88:  bbci	a10, 15, 0xff2c9e98

----------------
IN: 
0xff2c9e98:  wsr.ps	a4

----------------
IN: 
0xff2c9e9b:  rsync
0xff2c9e9e:  retw.n

----------------
IN: 
0xff2cc210:  mov.n	a9, a10
0xff2cc212:  mov.n	a14, a11
0xff2cc214:  l32i.n	a7, a2, 0
0xff2cc216:  j	0xff2cc285

----------------
IN: 
0xff2cc285:  bne	a7, a2, 0xff2cc219

----------------
IN: 
0xff2cc288:  j	0xff2cc1eb

----------------
IN: 
0xff2cc1eb:  wsr.ps	a6

----------------
IN: 
0xff2cc1ee:  rsync
0xff2cc1f1:  retw.n

xtensa_cpu_tlb_fill(ff340050, 0, 0) -> ff340050, ret = 0
xtensa_cpu_tlb_fill(ff340060, 0, 0) -> ff340060, ret = 0
irq: SHIM_IMRLPESC masking 1 mask 1 active 0
irq: SHIM_IMRLPESC masking 0 mask 0 active 0
----------------
IN: 
0xff2c0938:  mov.n	a10, a2
0xff2c093a:  call8	0xff2c0760

----------------
IN: 
0xff2c0760:  entry	a1, 32

----------------
IN: 
0xff2c0763:  l32r	a9, 0xff2c0758
0xff2c0766:  movi.n	a8, 0
0xff2c0768:  memw
0xff2c076b:  s32i.n	a8, a9, 40
0xff2c076d:  memw
0xff2c0770:  s32i	a8, a9, 104
0xff2c0773:  l32r	a9, 0xff2c075c
0xff2c0776:  s32i.n	a9, a2, 60
0xff2c0778:  mov.n	a2, a8
0xff2c077a:  retw.n

----------------
IN: 
0xff2c093d:  bgez	a10, 0xff2c0945

----------------
IN: 
0xff2c0945:  l32i.n	a8, a2, 60
0xff2c0947:  movi.n	a13, 1
0xff2c0949:  l32i.n	a10, a8, 0
0xff2c094b:  mov.n	a12, a13
0xff2c094d:  movi.n	a11, 2
0xff2c094f:  call8	0xff2cb96c

----------------
IN: 
0xff2cb96c:  entry	a1, 48

----------------
IN: 
0xff2cb96f:  movi	a12, 1
0xff2cb972:  mov.n	a11, a12
0xff2cb974:  movi.n	a13, 48
0xff2cb976:  movi	a10, 0
0xff2cb979:  call8	0xff2c87b0

----------------
IN: 
0xff2cb97c:  movi.n	a7, 2
0xff2cb97e:  s32i.n	a7, a10, 24
0xff2cb980:  l32r	a12, 0xff2c8fdc
0xff2cb983:  movi.n	a7, 1
0xff2cb985:  l32r	a13, 0xff2c08b0
0xff2cb988:  mov.n	a6, a10
0xff2cb98a:  s32i.n	a4, a10, 28
0xff2cb98c:  s8i	a7, a10, 32
0xff2cb98f:  mov.n	a10, a4
0xff2cb991:  call8	0xff2c8c48

----------------
IN: 
0xff2cb994:  l32r	a4, 0xff2cb968
0xff2cb997:  movi.n	a12, 1
0xff2cb999:  s32i.n	a4, a6, 44
0xff2cb99b:  movi.n	a4, 0
0xff2cb99d:  memw
0xff2cb9a0:  s32i.n	a4, a6, 8
0xff2cb9a2:  memw
0xff2cb9a5:  s32i.n	a4, a6, 12
0xff2cb9a7:  s32i.n	a10, a6, 20
0xff2cb9a9:  memw
0xff2cb9ac:  s32i.n	a4, a6, 16
0xff2cb9ae:  movi	a13, 284
0xff2cb9b1:  mov.n	a11, a12
0xff2cb9b3:  mov.n	a10, a4
0xff2cb9b5:  call8	0xff2c87b0

----------------
IN: 
0xff2cb9b8:  extui	a5, a5, 0, 8
0xff2cb9bb:  s32i.n	a2, a10, 0
0xff2cb9bd:  mov.n	a7, a10
0xff2cb9bf:  s32i.n	a3, a10, 4
0xff2cb9c1:  s8i	a5, a10, 8
0xff2cb9c4:  addi	a2, a2, 20
0xff2cb9c7:  j	0xff2cb9f5

----------------
IN: 
0xff2cb9f5:  bne	a4, a3, 0xff2cb9cc

----------------
IN: 
0xff2cb9cc:  slli	a5, a4, 7
0xff2cb9cf:  add.n	a5, a7, a5
0xff2cb9d1:  movi.n	a8, 0
0xff2cb9d3:  j	0xff2cb9e8

----------------
IN: 
0xff2cb9e8:  l32i.n	a9, a2, 0
0xff2cb9ea:  addi	a5, a5, 16
0xff2cb9ed:  bltu	a8, a9, 0xff2cb9d6

----------------
IN: 
0xff2cb9d6:  l32i	a11, a2, 8
0xff2cb9d9:  l32i	a10, a2, 4
0xff2cb9dc:  s32i	a8, a1, 0
0xff2cb9df:  call8	0xff2caf3c

----------------
IN: 
0xff2cb9e2:  l32i.n	a8, a1, 0
0xff2cb9e4:  s32i.n	a10, a5, 12
0xff2cb9e6:  addi.n	a8, a8, 1
0xff2cb9e8:  l32i.n	a9, a2, 0
0xff2cb9ea:  addi	a5, a5, 16
0xff2cb9ed:  bltu	a8, a9, 0xff2cb9d6

----------------
IN: 
0xff2cb9f0:  addi.n	a4, a4, 1
0xff2cb9f2:  addi	a2, a2, 64
0xff2cb9f5:  bne	a4, a3, 0xff2cb9cc

----------------
IN: 
0xff2cb9f8:  s32i.n	a7, a6, 36
0xff2cb9fa:  mov.n	a2, a6
0xff2cb9fc:  retw.n

----------------
IN: 
0xff2cb9fc:  retw.n

----------------
IN: 
0xff2c0952:  s32i.n	a10, a2, 40
0xff2c0954:  call8	0xff2cc7a0

----------------
IN: 
0xff2c0957:  mov.n	a10, a2
0xff2c0959:  call8	0xff2c14bc

xtensa_cpu_tlb_fill(ff2c14bc, 2, 0) -> ff2c14bc, ret = 0
----------------
IN: 
0xff2c14bc:  entry	a1, 32

----------------
IN: 
0xff2c14bf:  movi	a12, 1
0xff2c14c2:  mov.n	a11, a12
0xff2c14c4:  movi	a13, 96
0xff2c14c7:  movi.n	a10, 0
0xff2c14c9:  call8	0xff2c87b0

----------------
IN: 
0xff2c14cc:  movi.n	a12, 1
0xff2c14ce:  mov.n	a3, a10
0xff2c14d0:  s32i.n	a10, a2, 8
0xff2c14d2:  movi	a13, 384
0xff2c14d5:  mov.n	a11, a12
0xff2c14d7:  movi	a10, 0
0xff2c14da:  call8	0xff2c87b0

----------------
IN: 
0xff2c14dd:  s32i.n	a10, a3, 4
0xff2c14df:  l32i.n	a10, a2, 8
0xff2c14e1:  movi.n	a2, 0
0xff2c14e3:  addi.n	a8, a10, 12
0xff2c14e5:  s32i.n	a8, a10, 12
0xff2c14e7:  s32i.n	a8, a10, 16
0xff2c14e9:  addi	a8, a10, 24
0xff2c14ec:  memw
0xff2c14ef:  s32i.n	a2, a10, 0
0xff2c14f1:  s32i.n	a8, a10, 24
0xff2c14f3:  s32i.n	a8, a10, 28
0xff2c14f5:  call8	0xff2c9d08

----------------
IN: 
0xff2c9d08:  entry	a1, 32

----------------
IN: 
0xff2c9d0b:  movi.n	a11, 0
0xff2c9d0d:  movi.n	a13, 8
0xff2c9d0f:  movi.n	a12, 1
0xff2c9d11:  mov.n	a10, a11
0xff2c9d13:  call8	0xff2c87b0

----------------
IN: 
0xff2c9d16:  movi.n	a15, 0
0xff2c9d18:  l32r	a12, 0xff2c9cfc
0xff2c9d1b:  l32r	a11, 0xff2c9d00
0xff2c9d1e:  mov.n	a3, a10
0xff2c9d20:  s32i	a10, a2, 88
0xff2c9d23:  mov.n	a14, a15
0xff2c9d25:  mov.n	a13, a2
0xff2c9d27:  addi	a10, a2, 32
0xff2c9d2a:  call8	0xff2cc050

xtensa_cpu_tlb_fill(ff31c000, 1, 0) -> ff31c000, ret = 0
----------------
IN: 
0xff2c9d2d:  movi.n	a11, 0
0xff2c9d2f:  movi	a13, 256
0xff2c9d32:  movi.n	a12, 1
0xff2c9d34:  mov.n	a10, a11
0xff2c9d36:  call8	0xff2c87b0

----------------
IN: 
0xff2c9d39:  s32i.n	a10, a3, 4
0xff2c9d3b:  beqz.n	a10, 0xff2c9d46

----------------
IN: 
0xff2c9d3d:  movi	a12, 256
0xff2c9d40:  movi	a11, 0
0xff2c9d43:  call8	0xff2c80f4

----------------
IN: 
0xff2c9d46:  movi.n	a13, 0
0xff2c9d48:  mov.n	a11, a13
0xff2c9d4a:  movi.n	a12, 1
0xff2c9d4c:  movi.n	a10, 2
0xff2c9d4e:  call8	0xff2c8d08

----------------
IN: 
0xff2c8d08:  entry	a1, 32

----------------
IN: 
0xff2c8d0b:  call8	0xff2cb2ac

----------------
IN: 
0xff2c8d0e:  or	a6, a2, a2
0xff2c8d11:  l32i	a2, a10, 60
0xff2c8d14:  l32i	a9, a2, 4
0xff2c8d17:  beqz	a9, 0xff2c8db0

----------------
IN: 
0xff2c8d1a:  l32i.n	a11, a2, 0
0xff2c8d1c:  slli	a9, a9, 6
0xff2c8d1f:  add.n	a9, a11, a9
0xff2c8d21:  mov.n	a8, a11
0xff2c8d23:  movi.n	a2, 0
0xff2c8d25:  l32r	a12, 0xff2c473c
0xff2c8d28:  extui	a5, a5, 0, 1
0xff2c8d2b:  j	0xff2c8d5f

xtensa_cpu_tlb_fill(ff2c473c, 0, 0) -> ff2c473c, ret = 0
----------------
IN: 
0xff2c8d5f:  bltu	a8, a9, 0xff2c8d2e

----------------
IN: 
0xff2c8d2e:  beqz.n	a6, 0xff2c8d36

----------------
IN: 
0xff2c8d30:  l32i	a10, a8, 4
0xff2c8d33:  bnone	a6, a10, 0xff2c8d5c

----------------
IN: 
0xff2c8d36:  beqz.n	a3, 0xff2c8d3d

----------------
IN: 
0xff2c8d3d:  beqz.n	a4, 0xff2c8d44

----------------
IN: 
0xff2c8d3f:  l32i.n	a10, a8, 12
0xff2c8d41:  bnone	a4, a10, 0xff2c8d5c

----------------
IN: 
0xff2c8d44:  l32i.n	a10, a8, 44
0xff2c8d46:  l32i.n	a13, a8, 20
0xff2c8d48:  bgeu	a10, a13, 0xff2c8d5c

----------------
IN: 
0xff2c8d4b:  beqz.n	a5, 0xff2c8d55

----------------
IN: 
0xff2c8d55:  bge	a10, a12, 0xff2c8d5c

----------------
IN: 
0xff2c8d58:  mov.n	a2, a8
0xff2c8d5a:  mov.n	a12, a10
0xff2c8d5c:  addi	a8, a8, 64
0xff2c8d5f:  bltu	a8, a9, 0xff2c8d2e

----------------
IN: 
0xff2c8d5c:  addi	a8, a8, 64
0xff2c8d5f:  bltu	a8, a9, 0xff2c8d2e

----------------
IN: 
0xff2c8d62:  bnez.n	a2, 0xff2c8d78

----------------
IN: 
0xff2c8d78:  addi	a5, a2, 40
0xff2c8d7b:  movi.n	a3, 0
0xff2c8d7d:  wsr.scompare1	a3
0xff2c8d80:  movi.n	a3, 1
0xff2c8d82:  s32c1i	a3, a5, 0
0xff2c8d85:  bnez	a3, 0xff2c8d80

----------------
IN: 
0xff2c8d88:  l32i.n	a3, a2, 44
0xff2c8d8a:  beqz.n	a3, 0xff2c8d98

----------------
IN: 
0xff2c8d98:  l32i.n	a3, a2, 48
0xff2c8d9a:  mov.n	a10, a2
0xff2c8d9c:  l32i.n	a3, a3, 44
0xff2c8d9e:  callx8	a3

----------------
IN: 
0xff2ca65c:  entry	a1, 32

----------------
IN: 
0xff2ca65f:  l32i	a5, a2, 56
0xff2ca662:  movi	a8, -17
0xff2ca665:  bnez	a5, 0xff2ca7ac

----------------
IN: 
0xff2ca668:  l32i.n	a11, a2, 0
0xff2ca66a:  movi.n	a10, 5
0xff2ca66c:  call8	0xff2c8b54

----------------
IN: 
0xff2c8b54:  entry	a1, 32

----------------
IN: 
0xff2c8b57:  retw.n

----------------
IN: 
0xff2ca66f:  l32i.n	a3, a2, 20
0xff2ca671:  movi.n	a12, 1
0xff2ca673:  slli	a13, a3, 2
0xff2ca676:  add.n	a13, a13, a3
0xff2ca678:  slli	a13, a13, 3
0xff2ca67b:  mov.n	a11, a12
0xff2ca67d:  mov.n	a10, a12
0xff2ca67f:  call8	0xff2c87b0

----------------
IN: 
0xff2c87b3:  or	a10, a2, a2

----------------
IN: 
0xff2c8700:  addi.n	a11, a11, 1
0xff2c8702:  bne	a13, a11, 0xff2c86d2

xtensa_cpu_tlb_fill(ff315000, 1, 0) -> ff315000, ret = 0
----------------
IN: 
0xff2ca682:  s32i.n	a10, a2, 56
0xff2ca684:  mov.n	a3, a10
0xff2ca686:  movi.n	a8, -12
0xff2ca688:  beqz	a10, 0xff2ca7ac

----------------
IN: 
0xff2ca68b:  l32i.n	a4, a2, 16
0xff2ca68d:  movi	a8, 920
0xff2ca690:  add.n	a4, a8, a4
0xff2ca692:  memw
0xff2ca695:  l32i.n	a9, a4, 0
0xff2ca697:  beqz.n	a9, 0xff2ca69e

xtensa_cpu_tlb_fill(ff298398, 0, 0) -> ff298398, ret = 0
----------------
IN: 
0xff2ca69e:  l32i.n	a4, a2, 16
0xff2ca6a0:  l32r	a5, 0xff2ca64c
0xff2ca6a3:  add.n	a8, a4, a8
0xff2ca6a5:  memw
0xff2ca6a8:  l32i.n	a9, a8, 0
0xff2ca6aa:  bnez.n	a9, 0xff2ca6b6

----------------
IN: 
0xff2ca6ac:  movi	a10, 928
0xff2ca6af:  l32i.n	a5, a2, 20
0xff2ca6b1:  add.n	a4, a4, a10
0xff2ca6b3:  j	0xff2ca6c7

----------------
IN: 
0xff2ca6c7:  bne	a9, a5, 0xff2ca6c0

----------------
IN: 
0xff2ca6c0:  memw
0xff2ca6c3:  l32i.n	a10, a4, 0
0xff2ca6c5:  addi.n	a9, a9, 1
0xff2ca6c7:  bne	a9, a5, 0xff2ca6c0

----------------
IN: 
0xff2ca6ca:  movi.n	a4, 1
0xff2ca6cc:  memw
0xff2ca6cf:  s32i.n	a4, a8, 0
0xff2ca6d1:  l32i.n	a4, a2, 16
0xff2ca6d3:  movi	a5, 784
0xff2ca6d6:  add.n	a5, a5, a4
0xff2ca6d8:  l32r	a4, 0xff2ca650
0xff2ca6db:  memw
0xff2ca6de:  s32i.n	a4, a5, 0
0xff2ca6e0:  l32i.n	a8, a2, 16
0xff2ca6e2:  movi	a5, 792
0xff2ca6e5:  add.n	a5, a5, a8
0xff2ca6e7:  memw
0xff2ca6ea:  s32i.n	a4, a5, 0
0xff2ca6ec:  l32i.n	a8, a2, 16
0xff2ca6ee:  movi	a5, 800
0xff2ca6f1:  add.n	a5, a5, a8
0xff2ca6f3:  memw
0xff2ca6f6:  s32i.n	a4, a5, 0
0xff2ca6f8:  l32i.n	a8, a2, 16
0xff2ca6fa:  movi	a5, 808
0xff2ca6fd:  add.n	a5, a5, a8
0xff2ca6ff:  memw
0xff2ca702:  s32i.n	a4, a5, 0
0xff2ca704:  l32i.n	a8, a2, 16
0xff2ca706:  movi	a5, 816
0xff2ca709:  add.n	a5, a5, a8
0xff2ca70b:  memw
0xff2ca70e:  s32i.n	a4, a5, 0
0xff2ca710:  l32i.n	a5, a2, 16
0xff2ca712:  movi	a4, 1036
0xff2ca715:  add.n	a4, a4, a5
0xff2ca717:  l32r	a5, 0xff2ca654
0xff2ca71a:  memw
0xff2ca71d:  s32i.n	a5, a4, 0
0xff2ca71f:  l32i.n	a8, a2, 16
0xff2ca721:  movi	a4, 1032
0xff2ca724:  add.n	a4, a4, a8
0xff2ca726:  memw
0xff2ca729:  s32i.n	a5, a4, 0
0xff2ca72b:  l32i.n	a8, a2, 16
0xff2ca72d:  movi	a4, 1028
0xff2ca730:  add.n	a4, a4, a8
0xff2ca732:  memw
0xff2ca735:  s32i.n	a5, a4, 0
0xff2ca737:  l32i.n	a4, a2, 16
0xff2ca739:  l32r	a5, 0xff2ca658
0xff2ca73c:  addmi	a4, a4, 1024
0xff2ca73f:  memw
0xff2ca742:  s32i.n	a5, a4, 0
0xff2ca744:  movi.n	a4, 0
0xff2ca746:  mov.n	a5, a4
0xff2ca748:  j	0xff2ca76d

IRQ: from DMAC 0 status 0 block 0 tfr 0
IRQ: from DMAC 0 status 0 block 0 tfr 0
----------------
IN: 
0xff2ca76d:  l32i.n	a8, a2, 20
0xff2ca76f:  bltu	a4, a8, 0xff2ca74c

----------------
IN: 
0xff2ca74c:  movi	a8, -1
0xff2ca74f:  movi	a12, 1
0xff2ca752:  s32i	a5, a3, 4
0xff2ca755:  s32i.n	a2, a3, 0
0xff2ca757:  s32i.n	a4, a3, 16
0xff2ca759:  s32i.n	a8, a3, 20
0xff2ca75b:  movi.n	a13, 32
0xff2ca75d:  mov.n	a11, a5
0xff2ca75f:  mov.n	a10, a12
0xff2ca761:  call8	0xff2c87b0

----------------
IN: 
0xff2ca764:  beqz.n	a10, 0xff2ca77c

----------------
IN: 
0xff2ca766:  s32i.n	a10, a3, 36
0xff2ca768:  addi.n	a4, a4, 1
0xff2ca76a:  addi	a3, a3, 40
0xff2ca76d:  l32i.n	a8, a2, 20
0xff2ca76f:  bltu	a4, a8, 0xff2ca74c

----------------
IN: 
0xff2ca772:  memw
0xff2ca775:  s32i.n	a5, a2, 52
0xff2ca777:  movi.n	a8, 0
0xff2ca779:  j	0xff2ca7ac

----------------
IN: 
0xff2ca7ac:  mov.n	a2, a8
0xff2ca7ae:  retw.n

----------------
IN: 
0xff2ca7ae:  retw.n

----------------
IN: 
0xff2c8da1:  beqz	a10, 0xff2c8d8c

----------------
IN: 
0xff2c8d8c:  l32i.n	a8, a2, 44
0xff2c8d8e:  movi.n	a10, 0
0xff2c8d90:  addi.n	a8, a8, 1
0xff2c8d92:  s32i.n	a8, a2, 44
0xff2c8d94:  j	0xff2c8da4

----------------
IN: 
0xff2c8da4:  memw
0xff2c8da7:  l32i.n	a3, a2, 52
0xff2c8da9:  movi.n	a3, 0
0xff2c8dab:  s32ri	a3, a5, 0
0xff2c8dae:  beqz.n	a10, 0xff2c8db2

----------------
IN: 
0xff2c8db2:  retw.n

----------------
IN: 
0xff2c9d51:  l32r	a11, 0xff2c9d04
0xff2c9d54:  mov.n	a12, a2
0xff2c9d56:  s32i.n	a10, a3, 0
0xff2c9d58:  movi.n	a10, 10
0xff2c9d5a:  call8	0xff2cb12c

----------------
IN: 
0xff2c9d5d:  mov.n	a11, a2
0xff2c9d5f:  movi.n	a10, 10
0xff2c9d61:  call8	0xff2cb150

----------------
IN: 
0xff2c9d64:  l32r	a3, 0xff2c9bc0
0xff2c9d67:  movi.n	a8, -4
0xff2c9d69:  memw
0xff2c9d6c:  l32i.n	a2, a3, 0
0xff2c9d6e:  and	a2, a2, a8
0xff2c9d71:  memw
0xff2c9d74:  s32i.n	a2, a3, 0
0xff2c9d76:  movi.n	a2, 0
0xff2c9d78:  retw.n

xtensa_cpu_tlb_fill(ff340030, 0, 0) -> ff340030, ret = 0
irq: IMRD masking 0 mask 0 active 0
----------------
IN: 
0xff2c9d78:  retw.n

----------------
IN: 
0xff2c14f8:  mov.n	a2, a10
0xff2c14fa:  retw.n

----------------
IN: 
0xff2c14fa:  retw.n

----------------
IN: 
0xff2c095c:  mov.n	a10, a2
0xff2c095e:  call8	0xff2c0734

----------------
IN: 
0xff2c0734:  entry	a1, 32

----------------
IN: 
0xff2c0737:  l32r	a9, 0xff2c072c
0xff2c073a:  movi.n	a8, 0
0xff2c073c:  memw
0xff2c073f:  s32i.n	a8, a9, 4
0xff2c0741:  memw
0xff2c0744:  s32i	a8, a9, 80
0xff2c0747:  memw
0xff2c074a:  s32i	a8, a9, 156
0xff2c074d:  l32r	a9, 0xff2c0730
0xff2c0750:  s32i.n	a9, a2, 56
0xff2c0752:  mov.n	a2, a8
0xff2c0754:  retw.n

----------------
IN: 
0xff2c0961:  bltz	a10, 0xff2c0940

----------------
IN: 
0xff2c0964:  l32r	a8, 0xff2c08bc
0xff2c0967:  movi.n	a9, 56
0xff2c0969:  memw
0xff2c096c:  l32i.n	a2, a8, 0
0xff2c096e:  movi.n	a11, 0
0xff2c0970:  or	a2, a2, a9
0xff2c0973:  memw
0xff2c0976:  s32i.n	a2, a8, 0
0xff2c0978:  l32r	a8, 0xff2c08c0
0xff2c097b:  movi.n	a2, 1
0xff2c097d:  memw
0xff2c0980:  s32i.n	a2, a8, 0
0xff2c0982:  l32r	a9, 0xff2c08c4
0xff2c0985:  l32r	a8, 0xff2c08c8
0xff2c0988:  mov.n	a12, a2
0xff2c098a:  memw
0xff2c098d:  s32i.n	a8, a9, 0
0xff2c098f:  l32r	a9, 0xff2c08cc
0xff2c0992:  mov.n	a10, a2
0xff2c0994:  memw
0xff2c0997:  s32i.n	a2, a9, 0
0xff2c0999:  l32r	a9, 0xff2c08d0
0xff2c099c:  memw
0xff2c099f:  s32i.n	a8, a9, 0
0xff2c09a1:  l32r	a9, 0xff2c08d4
0xff2c09a4:  memw
0xff2c09a7:  s32i.n	a2, a9, 0
0xff2c09a9:  l32r	a9, 0xff2c08d8
0xff2c09ac:  memw
0xff2c09af:  s32i.n	a8, a9, 0
0xff2c09b1:  call8	0xff2c8ed4

xtensa_cpu_tlb_fill(ff340010, 0, 0) -> ff340010, ret = 0
irq: PIMR masking 0 mask 38 active 0
xtensa_cpu_tlb_fill(ff3400e8, 1, 0) -> ff3400e8, ret = 0
xtensa_cpu_tlb_fill(ff3400ec, 1, 0) -> ff3400ec, ret = 0
xtensa_cpu_tlb_fill(ff3400f0, 1, 0) -> ff3400f0, ret = 0
xtensa_cpu_tlb_fill(ff3400f4, 1, 0) -> ff3400f4, ret = 0
xtensa_cpu_tlb_fill(ff3400f8, 1, 0) -> ff3400f8, ret = 0
xtensa_cpu_tlb_fill(ff3400fc, 1, 0) -> ff3400fc, ret = 0
----------------
IN: 
0xff2c8ed4:  entry	a1, 32

----------------
IN: 
0xff2c8ed7:  call8	0xff2cb2ac

----------------
IN: 
0xff2c8eda:  l32i	a5, a10, 56
0xff2c8edd:  l32i	a8, a5, 0
0xff2c8ee0:  l32i	a5, a5, 4
0xff2c8ee3:  slli	a9, a5, 1
0xff2c8ee6:  add.n	a9, a9, a5
0xff2c8ee8:  slli	a9, a9, 2
0xff2c8eeb:  add.n	a9, a8, a9
0xff2c8eed:  j	0xff2c8ef7

xtensa_cpu_tlb_fill(ff300080, 0, 0) -> ff300080, ret = 0
----------------
IN: 
0xff2c8ef7:  bltu	a8, a9, 0xff2c8ef0

----------------
IN: 
0xff2c8ef0:  l32i.n	a5, a8, 0
0xff2c8ef2:  beq	a2, a5, 0xff2c8f50

----------------
IN: 
0xff2c8f50:  l32i.n	a9, a8, 8
0xff2c8f52:  l32i.n	a2, a8, 4
0xff2c8f54:  slli	a8, a9, 3
0xff2c8f57:  add.n	a8, a8, a9
0xff2c8f59:  slli	a8, a8, 1
0xff2c8f5c:  add.n	a8, a8, a9
0xff2c8f5e:  slli	a8, a8, 2
0xff2c8f61:  add.n	a8, a2, a8
0xff2c8f63:  j	0xff2c8f4a

----------------
IN: 
0xff2c8f4a:  bltu	a2, a8, 0xff2c8f00

----------------
IN: 
0xff2c8f00:  l32i.n	a5, a2, 0
0xff2c8f02:  beq	a5, a3, 0xff2c8f0d

----------------
IN: 
0xff2c8f0d:  addi.n	a5, a2, 4
0xff2c8f0f:  movi.n	a3, 0
0xff2c8f11:  wsr.scompare1	a3
0xff2c8f14:  movi.n	a3, 1
0xff2c8f16:  s32c1i	a3, a5, 0
0xff2c8f19:  bnez	a3, 0xff2c8f14

----------------
IN: 
0xff2c8f1c:  l32i.n	a3, a2, 8
0xff2c8f1e:  beqz.n	a3, 0xff2c8f2e

----------------
IN: 
0xff2c8f2e:  movi.n	a10, -19
0xff2c8f30:  bbci	a4, 0, 0xff2c8f40

----------------
IN: 
0xff2c8f33:  l32i	a3, a2, 68
0xff2c8f36:  mov.n	a10, a2
0xff2c8f38:  l32i.n	a3, a3, 48
0xff2c8f3a:  callx8	a3

xtensa_cpu_tlb_fill(ff3016a4, 0, 0) -> ff3016a4, ret = 0
----------------
IN: 
0xff2c9aa0:  entry	a1, 32

----------------
IN: 
0xff2c9aa3:  movi.n	a12, 1
0xff2c9aa5:  movi	a13, 296
0xff2c9aa8:  mov.n	a11, a12
0xff2c9aaa:  movi	a10, 0
0xff2c9aad:  call8	0xff2c87b0

xtensa_cpu_tlb_fill(ff309d94, 1, 0) -> ff309d94, ret = 0
----------------
IN: 
0xff2c9ab0:  s32i	a10, a2, 72
0xff2c9ab3:  movi.n	a8, 1
0xff2c9ab5:  s32i.n	a8, a10, 12
0xff2c9ab7:  s32i.n	a8, a10, 16
0xff2c9ab9:  mov.n	a10, a2
0xff2c9abb:  call8	0xff2c9a6c

----------------
IN: 
0xff2c9a6c:  entry	a1, 32

----------------
IN: 
0xff2c9a6f:  l32i	a9, a2, 12
0xff2c9a72:  memw
0xff2c9a75:  l32i.n	a8, a9, 8
0xff2c9a77:  bbci	a8, 7, 0xff2c9a80

xtensa_cpu_tlb_fill(ff2a0008, 0, 0) -> ff2a0008, ret = 0
----------------
IN: 
0xff2c9a80:  bbci	a8, 3, 0xff2c9a9d

----------------
IN: 
0xff2c9a9d:  retw.n

----------------
IN: 
0xff2c9abe:  movi.n	a2, 0
0xff2c9ac0:  retw.n

----------------
IN: 
0xff2c9ac0:  retw.n

----------------
IN: 
0xff2c8f3d:  beqz	a10, 0xff2c8f20

----------------
IN: 
0xff2c8f20:  l32i.n	a3, a2, 8
0xff2c8f22:  movi.n	a10, 0
0xff2c8f24:  addi.n	a3, a3, 1
0xff2c8f26:  s32i.n	a3, a2, 8
0xff2c8f28:  j	0xff2c8f40

----------------
IN: 
0xff2c8f40:  movi.n	a3, 0
0xff2c8f42:  s32ri	a3, a5, 0
0xff2c8f45:  beqz.n	a10, 0xff2c8f66

----------------
IN: 
0xff2c8f66:  retw.n

----------------
IN: 
0xff2c09b4:  beqz	a10, 0xff2c0940

----------------
IN: 
0xff2c09b7:  mov.n	a12, a2
0xff2c09b9:  mov.n	a11, a2
0xff2c09bb:  mov.n	a10, a2
0xff2c09bd:  call8	0xff2c8ed4

----------------
IN: 
0xff2c8f05:  addi	a2, a2, 76
0xff2c8f08:  j	0xff2c8f4a

xtensa_cpu_tlb_fill(ff2a1008, 0, 0) -> ff2a1008, ret = 0
----------------
IN: 
0xff2c09c0:  beqz	a10, 0xff2c0940

----------------
IN: 
0xff2c09c3:  mov.n	a12, a2
0xff2c09c5:  movi.n	a11, 2
0xff2c09c7:  mov.n	a10, a2
0xff2c09c9:  call8	0xff2c8ed4

xtensa_cpu_tlb_fill(ff30a000, 1, 0) -> ff30a000, ret = 0
xtensa_cpu_tlb_fill(ff2a2008, 0, 0) -> ff2a2008, ret = 0
----------------
IN: 
0xff2c09cc:  beqz	a10, 0xff2c0940

----------------
IN: 
0xff2c09cf:  mov.n	a10, a2
0xff2c09d1:  call8	0xff2c8908

----------------
IN: 
0xff2c8908:  entry	a1, 32

----------------
IN: 
0xff2c890b:  retw.n

----------------
IN: 
0xff2c09d4:  movi.n	a2, 0
0xff2c09d6:  retw.n

----------------
IN: 
0xff2c09d6:  retw.n

----------------
IN: 
0xff2cb2fa:  bgez	a10, 0xff2cb309

----------------
IN: 
0xff2cb309:  mov.n	a10, a4
0xff2cb30b:  call8	0xff2cc934

----------------
IN: 
0xff2cc934:  entry	a1, 32

----------------
IN: 
0xff2cc937:  mov.n	a10, a2
0xff2cc939:  call8	0xff2c40b8

xtensa_cpu_tlb_fill(ff2c40b8, 2, 0) -> ff2c40b8, ret = 0
----------------
IN: 
0xff2c40b8:  entry	a1, 32

----------------
IN: 
0xff2c40bb:  l32r	a8, 0xff2c40b4
0xff2c40be:  s32i	a8, a2, 68
0xff2c40c1:  s32i.n	a8, a8, 0
0xff2c40c3:  s32i.n	a8, a8, 4
0xff2c40c5:  retw.n

----------------
IN: 
0xff2cc93c:  l32r	a3, 0xff2cc92c
0xff2cc93f:  j	0xff2cc949

----------------
IN: 
0xff2cc949:  l32r	a4, 0xff2cc930
0xff2cc94c:  bltu	a3, a4, 0xff2cc942

----------------
IN: 
0xff2cc942:  l32i.n	a8, a3, 0
0xff2cc944:  addi.n	a3, a3, 4
0xff2cc946:  callx8	a8

xtensa_cpu_tlb_fill(ff2c2790, 2, 0) -> ff2c2790, ret = 0
----------------
IN: 
0xff2c2790:  entry	a1, 32

----------------
IN: 
0xff2c2793:  l32r	a10, 0xff2c278c
0xff2c2796:  call8	0xff2c3ff8

xtensa_cpu_tlb_fill(ff2c3ff8, 2, 0) -> ff2c3ff8, ret = 0
----------------
IN: 
0xff2c3ff8:  entry	a1, 32

----------------
IN: 
0xff2c3ffb:  call8	0xff2cb2ac

----------------
IN: 
0xff2c3ffb:  call8	0xff2cb2ac

----------------
IN: 
0xff2c3ffe:  l32i	a8, a10, 68

----------------
IN: 
0xff2c4001:  rsil	a11, 5

----------------
IN: 
0xff2c4004:  l32i	a10, a8, 0
0xff2c4007:  addi	a9, a2, 4
0xff2c400a:  s32i	a9, a10, 4
0xff2c400d:  s32i.n	a10, a2, 4
0xff2c400f:  s32i.n	a8, a2, 8
0xff2c4011:  s32i.n	a9, a8, 0
0xff2c4013:  wsr.ps	a11

----------------
IN: 
0xff2c4016:  rsync
0xff2c4019:  movi.n	a2, 0
0xff2c401b:  retw.n

----------------
IN: 
0xff2c2799:  retw.n

----------------
IN: 
0xff2c494c:  entry	a1, 32

----------------
IN: 
0xff2c494f:  l32r	a10, 0xff2c4948
0xff2c4952:  call8	0xff2c3ff8

----------------
IN: 
0xff2c4955:  retw.n

xtensa_cpu_tlb_fill(ff2c5948, 2, 0) -> ff2c5948, ret = 0
----------------
IN: 
0xff2c5948:  entry	a1, 32

----------------
IN: 
0xff2c594b:  l32r	a10, 0xff2c5944
0xff2c594e:  call8	0xff2c3ff8

----------------
IN: 
0xff2c5951:  retw.n

xtensa_cpu_tlb_fill(ff2c6228, 2, 0) -> ff2c6228, ret = 0
----------------
IN: 
0xff2c6228:  entry	a1, 32

----------------
IN: 
0xff2c622b:  l32r	a10, 0xff2c6224
0xff2c622e:  call8	0xff2c3ff8

----------------
IN: 
0xff2c6231:  retw.n

----------------
IN: 
0xff2c6aa0:  entry	a1, 32

----------------
IN: 
0xff2c6aa3:  l32r	a10, 0xff2c6a9c
0xff2c6aa6:  call8	0xff2c3ff8

----------------
IN: 
0xff2c6aa9:  retw.n

----------------
IN: 
0xff2c6ff0:  entry	a1, 32

----------------
IN: 
0xff2c6ff3:  l32r	a10, 0xff2c6fec
0xff2c6ff6:  call8	0xff2c3ff8

----------------
IN: 
0xff2c6ff9:  retw.n

xtensa_cpu_tlb_fill(ff2c71a0, 2, 0) -> ff2c71a0, ret = 0
----------------
IN: 
0xff2c71a0:  entry	a1, 32

----------------
IN: 
0xff2c71a3:  l32r	a10, 0xff2c719c
0xff2c71a6:  call8	0xff2c3ff8

----------------
IN: 
0xff2c71a9:  retw.n

----------------
IN: 
0xff2cc94f:  or	a10, a2, a2
0xff2cc952:  call8	0xff2c3724

----------------
IN: 
0xff2c3724:  entry	a1, 32

----------------
IN: 
0xff2c3727:  l32r	a8, 0xff2c3720
0xff2c372a:  movi.n	a9, 0
0xff2c372c:  s32i	a8, a2, 80
0xff2c372f:  memw
0xff2c3732:  s32i.n	a9, a8, 8
0xff2c3734:  retw.n

----------------
IN: 
0xff2cc955:  movi.n	a10, 0
0xff2cc957:  call8	0xff2c07ec

----------------
IN: 
0xff2c07ec:  entry	a1, 32

----------------
IN: 
0xff2c07ef:  l32r	a11, 0xff2c07c8
0xff2c07f2:  movi	a12, 108
0xff2c07f5:  movi.n	a10, 0
0xff2c07f7:  call8	0xff2c0798

----------------
IN: 
0xff2c0798:  entry	a1, 32

----------------
IN: 
0xff2c079b:  l32r	a5, 0xff2c078c
0xff2c079e:  movi	a11, 1024
0xff2c07a1:  add	a5, a2, a5
0xff2c07a4:  mov.n	a13, a4
0xff2c07a6:  mov.n	a12, a3
0xff2c07a8:  sub	a11, a11, a2
0xff2c07ab:  mov.n	a10, a5
0xff2c07ad:  call8	0xff2c810c

----------------
IN: 
0xff2c810c:  entry	a1, 32

----------------
IN: 
0xff2c810f:  mov.n	a10, a2

----------------
IN: 
0xff2c810f:  mov.n	a10, a2
0xff2c8111:  movi.n	a8, 0
0xff2c8113:  movi.n	a2, 1
0xff2c8115:  moveqz	a8, a2, a10
0xff2c8118:  extui	a8, a8, 0, 8
0xff2c811b:  mov.n	a11, a4
0xff2c811d:  or	a12, a5, a5
0xff2c8120:  bnez.n	a8, 0xff2c814a

----------------
IN: 
0xff2c8122:  moveqz	a8, a2, a4
0xff2c8125:  bnez.n	a8, 0xff2c814a

----------------
IN: 
0xff2c8127:  bltu	a10, a4, 0xff2c8136

----------------
IN: 
0xff2c812a:  add	a8, a4, a5
0xff2c812d:  movi	a2, -22
0xff2c8130:  bltu	a10, a8, 0xff2c814c

----------------
IN: 
0xff2c8133:  bne	a10, a4, 0xff2c813d

----------------
IN: 
0xff2c813d:  movi.n	a2, -22
0xff2c813f:  bltu	a3, a12, 0xff2c814c

----------------
IN: 
0xff2c8142:  call8	0xff2ce108

----------------
IN: 
0xff2ce108:  entry	a1, 32

----------------
IN: 
0xff2ce10b:  mov.n	a5, a2
0xff2ce10d:  bltui	a4, 4, 0xff2ce173

----------------
IN: 
0xff2ce110:  extui	a6, a2, 0, 2
0xff2ce113:  bnez	a6, 0xff2ce0f0

----------------
IN: 
0xff2ce116:  srli	a7, a4, 4
0xff2ce119:  extui	a11, a3, 0, 2

----------------
IN: 
0xff2ce119:  extui	a11, a3, 0, 2
0xff2ce11c:  bnez	a11, 0xff2ce1bc

----------------
IN: 
0xff2ce11f:  loopnez	a7, 0xff2ce138

----------------
IN: 
0xff2ce122:  l32i.n	a6, a3, 0
0xff2ce124:  l32i.n	a7, a3, 4
0xff2ce126:  s32i.n	a6, a5, 0
0xff2ce128:  l32i.n	a6, a3, 8
0xff2ce12a:  s32i.n	a7, a5, 4
0xff2ce12c:  l32i.n	a7, a3, 12
0xff2ce12e:  s32i.n	a6, a5, 8
0xff2ce130:  addi	a3, a3, 16
0xff2ce133:  s32i.n	a7, a5, 12
0xff2ce135:  addi	a5, a5, 16

xtensa_cpu_tlb_fill(ff344000, 1, 0) -> ff344000, ret = 0
----------------
IN: 
0xff2ce138:  bbci	a4, 3, 0xff2ce149

----------------
IN: 
0xff2ce13b:  l32i.n	a6, a3, 0
0xff2ce13d:  l32i.n	a7, a3, 4
0xff2ce13f:  addi.n	a3, a3, 8
0xff2ce141:  s32i.n	a6, a5, 0
0xff2ce143:  s32i	a7, a5, 4
0xff2ce146:  addi	a5, a5, 8
0xff2ce149:  bbci	a4, 2, 0xff2ce154

----------------
IN: 
0xff2ce14c:  l32i.n	a6, a3, 0
0xff2ce14e:  addi.n	a3, a3, 4
0xff2ce150:  s32i.n	a6, a5, 0
0xff2ce152:  addi.n	a5, a5, 4
0xff2ce154:  extui	a4, a4, 0, 2
0xff2ce157:  beqz.n	a4, 0xff2ce16e

----------------
IN: 
0xff2ce16e:  retw.n

----------------
IN: 
0xff2c8145:  movi.n	a2, 0
0xff2c8147:  j	0xff2c814c

----------------
IN: 
0xff2c814c:  retw.n

----------------
IN: 
0xff2c07b0:  beqz.n	a10, 0xff2c07bd

----------------
IN: 
0xff2c07bd:  mov.n	a11, a4
0xff2c07bf:  mov.n	a10, a5
0xff2c07c1:  call8	0xff2cd190

----------------
IN: 
0xff2cd190:  entry	a1, 16

----------------
IN: 
0xff2cd193:  extui	a4, a2, 0, 7
0xff2cd196:  add.n	a3, a3, a4
0xff2cd198:  addi	a3, a3, 127
0xff2cd19b:  srli	a3, a3, 7
0xff2cd19e:  loopnez	a3, 0xff2cd1aa

----------------
IN: 
0xff2cd1a1:  dhwb	a2, 0
0xff2cd1a4:  addmi	a2, a2, 256
0xff2cd1a7:  addi	a2, a2, -128

----------------
IN: 
0xff2cd1aa:  retw.n

----------------
IN: 
0xff2c07c4:  retw.n

----------------
IN: 
0xff2c07fa:  l32r	a11, 0xff2c07cc
0xff2c07fd:  movi	a12, 160
0xff2c0800:  movi	a10, 108
0xff2c0803:  call8	0xff2c0798

----------------
IN: 
0xff2ce108:  entry	a1, 32

----------------
IN: 
0xff2ce10b:  mov.n	a5, a2
0xff2ce10d:  bltui	a4, 4, 0xff2ce173

----------------
IN: 
0xff2ce110:  extui	a6, a2, 0, 2
0xff2ce113:  bnez	a6, 0xff2ce0f0

----------------
IN: 
0xff2ce116:  srli	a7, a4, 4
0xff2ce119:  extui	a11, a3, 0, 2

----------------
IN: 
0xff2ce119:  extui	a11, a3, 0, 2
0xff2ce11c:  bnez	a11, 0xff2ce1bc

----------------
IN: 
0xff2ce11f:  loopnez	a7, 0xff2ce138

----------------
IN: 
0xff2ce149:  bbci	a4, 2, 0xff2ce154

----------------
IN: 
0xff2ce154:  extui	a4, a4, 0, 2
0xff2ce157:  beqz.n	a4, 0xff2ce16e

----------------
IN: 
0xff2c0806:  l32r	a11, 0xff2c07d0
0xff2c0809:  movi	a10, 268
0xff2c080c:  l8ui	a3, a11, 1
0xff2c080f:  l8ui	a2, a11, 0
0xff2c0812:  slli	a3, a3, 8
0xff2c0815:  or	a3, a3, a2
0xff2c0818:  l8ui	a2, a11, 2
0xff2c081b:  slli	a2, a2, 16
0xff2c081e:  or	a3, a2, a3
0xff2c0821:  l8ui	a2, a11, 3
0xff2c0824:  slli	a2, a2, 24
0xff2c0827:  or	a2, a2, a3
0xff2c082a:  or	a12, a2, a2
0xff2c082d:  call8	0xff2c0798

----------------
IN: 
0xff2c0830:  l32r	a11, 0xff2c07d4
0xff2c0833:  movi	a3, 268
0xff2c0836:  l8ui	a8, a11, 1
0xff2c0839:  add.n	a2, a2, a3
0xff2c083b:  l8ui	a3, a11, 0
0xff2c083e:  slli	a8, a8, 8
0xff2c0841:  or	a8, a8, a3
0xff2c0844:  l8ui	a3, a11, 2
0xff2c0847:  mov.n	a10, a2
0xff2c0849:  slli	a3, a3, 16
0xff2c084c:  or	a8, a3, a8
0xff2c084f:  l8ui	a3, a11, 3
0xff2c0852:  slli	a3, a3, 24
0xff2c0855:  or	a3, a3, a8
0xff2c0858:  mov.n	a12, a3
0xff2c085a:  call8	0xff2c0798

----------------
IN: 
0xff2c085d:  l32r	a11, 0xff2c07d8
0xff2c0860:  add	a10, a3, a2
0xff2c0863:  l8ui	a12, a11, 1
0xff2c0866:  l8ui	a8, a11, 0
0xff2c0869:  slli	a12, a12, 8
0xff2c086c:  or	a12, a12, a8
0xff2c086f:  l8ui	a8, a11, 2
0xff2c0872:  slli	a8, a8, 16
0xff2c0875:  or	a8, a8, a12
0xff2c0878:  l8ui	a12, a11, 3
0xff2c087b:  slli	a12, a12, 24
0xff2c087e:  or	a12, a12, a8
0xff2c0881:  call8	0xff2c0798

----------------
IN: 
0xff2c0884:  l32r	a2, 0xff2c07dc
0xff2c0887:  l32r	a3, 0xff2c07e0
0xff2c088a:  memw
0xff2c088d:  s32i.n	a3, a2, 0
0xff2c088f:  l32r	a2, 0xff2c07e4
0xff2c0892:  l32r	a3, 0xff2c07e8
0xff2c0895:  memw
0xff2c0898:  s32i.n	a3, a2, 0
0xff2c089a:  movi.n	a2, 0
0xff2c089c:  retw.n

xtensa_cpu_tlb_fill(ff340040, 1, 0) -> ff340040, ret = 0
xtensa_cpu_tlb_fill(ff340044, 1, 0) -> ff340044, ret = 0
irq: send busy interrupt 0x80000000
bridge-io: msg send: 0 type 2 msg 64 size 16 ret 0
----------------
IN: 
0xff2c089c:  retw.n

----------------
IN: 
0xff2cc95a:  bltz	a10, 0xff2cc998

----------------
IN: 
0xff2cc95d:  call8	0xff2c0ac0

----------------
IN: 
0xff2cc960:  l32i.n	a2, a10, 0
0xff2cc962:  call8	0xff2cdf00

----------------
IN: 
0xff2cdf00:  entry	a1, 32

----------------
IN: 
0xff2cdf03:  rur.threadptr	a2
0xff2cdf06:  addi	a2, a2, 56
0xff2cdf09:  retw.n

----------------
IN: 
0xff2cc965:  l32i.n	a3, a10, 0
0xff2cc967:  l32i.n	a8, a3, 0
0xff2cc969:  j	0xff2cc993

----------------
IN: 
0xff2cc993:  bne	a8, a3, 0xff2cc96c

----------------
IN: 
0xff2cc96c:  l16ui	a10, a2, 12
0xff2cc96f:  l32i.n	a9, a8, 8
0xff2cc971:  bne	a10, a9, 0xff2cc991

----------------
IN: 
0xff2cc974:  l32i.n	a9, a8, 12
0xff2cc976:  l32i.n	a9, a9, 0
0xff2cc978:  beqz.n	a9, 0xff2cc991

----------------
IN: 
0xff2cc97a:  l32r	a14, 0xff2cc858
0xff2cc97d:  l32r	a15, 0xff2cc858
0xff2cc980:  l32r	a12, 0xff2c08b0
0xff2cc983:  l32r	a13, 0xff2c08b0
0xff2cc986:  l32i.n	a10, a8, 16
0xff2cc988:  mov.n	a11, a2
0xff2cc98a:  callx8	a9

----------------
IN: 
0xff2cbeb4:  entry	a1, 48

----------------
IN: 
0xff2cbeb7:  mov.n	a8, a4
0xff2cbeb9:  rsil	a4, 5

----------------
IN: 
0xff2cbebc:  l32i.n	a7, a3, 20
0xff2cbebe:  movi.n	a6, -3
0xff2cbec0:  and	a6, a6, a7
0xff2cbec3:  bnei	a6, 1, 0xff2cbed2

----------------
IN: 
0xff2cbed2:  s32i.n	a8, a1, 0
0xff2cbed4:  call8	0xff2cb2ac

----------------
IN: 
0xff2cbed7:  l32i.n	a10, a10, 28
0xff2cbed9:  call8	0xff2c9e70

xtensa_cpu_tlb_fill(ff2c9e70, 2, 0) -> ff2c9e70, ret = 0
xtensa_cpu_tlb_fill(ff3400c8, 0, 0) -> ff3400c8, ret = 0
----------------
IN: 
0xff2ce0cc:  entry	a1, 16

----------------
IN: 
0xff2ce0cf:  rsr.interrupt	a2

----------------
IN: 
0xff2ce0d2:  retw.n

----------------
IN: 
0xff2cbedc:  mov.n	a6, a10
0xff2cbede:  l32r	a12, 0xff2c8fdc
0xff2cbee1:  l32r	a13, 0xff2c08b0
0xff2cbee4:  l32i.n	a10, a2, 8
0xff2cbee6:  or	a7, a11, a11
0xff2cbee9:  call8	0xff2c8c48

xtensa_cpu_tlb_fill(ff300014, 0, 0) -> ff300014, ret = 0
----------------
IN: 
0xff2cbeec:  l32i.n	a8, a1, 0
0xff2cbeee:  or	a9, a8, a5
0xff2cbef1:  beqz.n	a9, 0xff2cbf1d

----------------
IN: 
0xff2cbf1d:  s32i.n	a6, a3, 0
0xff2cbf1f:  l32i.n	a6, a2, 4
0xff2cbf21:  addi	a5, a3, 28
0xff2cbf24:  s32i.n	a7, a3, 4
0xff2cbf26:  s32i.n	a5, a6, 0
0xff2cbf28:  s32i.n	a2, a3, 28
0xff2cbf2a:  s32i.n	a6, a3, 32
0xff2cbf2c:  s32i.n	a5, a2, 4
0xff2cbf2e:  movi.n	a5, 1
0xff2cbf30:  s32i.n	a5, a3, 20
0xff2cbf32:  wsr.ps	a4

----------------
IN: 
0xff2cbf35:  rsync
0xff2cbf38:  mov.n	a10, a2
0xff2cbf3a:  call8	0xff2cbe30

----------------
IN: 
0xff2cbe30:  entry	a1, 32

----------------
IN: 
0xff2cbe33:  l32i.n	a10, a2, 12
0xff2cbe35:  call8	0xff2c9330

----------------
IN: 
0xff2c9330:  entry	a1, 32

----------------
IN: 
0xff2c9333:  movi.n	a10, 1

----------------
IN: 
0xff2c9333:  movi.n	a10, 1
0xff2c9335:  ssl	a2
0xff2c9338:  sll	a10, a10
0xff2c933b:  call8	0xff2ce0d4

----------------
IN: 
0xff2ce0d4:  entry	a1, 16

----------------
IN: 
0xff2ce0d7:  wsr.intset	a2

----------------
IN: 
0xff2c065c:  addmi	a1, a1, -512
0xff2c065f:  s32i.n	a2, a1, 24
0xff2c0661:  s32i.n	a3, a1, 28
0xff2c0663:  l32r	a3, 0xff2c0658
0xff2c0666:  rsr.exccause	a2
0xff2c0669:  addx4	a3, a2, a3
0xff2c066c:  l32i.n	a3, a3, 0
0xff2c066e:  s32i.n	a4, a1, 32
0xff2c0670:  jx	a3

xtensa_cpu_tlb_fill(ff303040, 0, 0) -> ff303040, ret = 0
----------------
IN: 
0xff2ccd28:  s32i.n	a5, a1, 36
0xff2ccd2a:  l32r	a2, 0xff2c0b9c
0xff2ccd2d:  xsr.ps	a2

----------------
IN: 
0xff2ccd30:  s32i.n	a2, a1, 4
0xff2ccd32:  rsync
0xff2ccd35:  rsr.epc1	a2
0xff2ccd38:  s32i.n	a2, a1, 0
0xff2ccd3a:  s32i.n	a0, a1, 16
0xff2ccd3c:  s32i.n	a6, a1, 40
0xff2ccd3e:  s32i.n	a7, a1, 44
0xff2ccd40:  s32i.n	a8, a1, 48

----------------
IN: 
0xff2ccd40:  s32i.n	a8, a1, 48
0xff2ccd42:  s32i.n	a9, a1, 52
0xff2ccd44:  s32i.n	a10, a1, 56
0xff2ccd46:  s32i.n	a11, a1, 60
0xff2ccd48:  s32i	a12, a1, 64
0xff2ccd4b:  s32i	a13, a1, 68
0xff2ccd4e:  s32i	a14, a1, 72
0xff2ccd51:  s32i	a15, a1, 76
0xff2ccd54:  rur.threadptr	a2
0xff2ccd57:  l32i.n	a2, a2, 44
0xff2ccd59:  s32i.n	a1, a2, 0
0xff2ccd5b:  rur.threadptr	a2
0xff2ccd5e:  l32i.n	a2, a2, 48
0xff2ccd60:  beqz.n	a2, 0xff2ccd64

----------------
IN: 
0xff2ccd64:  l32i	a2, a1, 492
0xff2ccd67:  addmi	a1, a1, 512
0xff2ccd6a:  rsr.epc1	a4
0xff2ccd6d:  l32r	a5, 0xff2c0ba0
0xff2ccd70:  or	a4, a5, a4
0xff2ccd73:  addx2	a4, a5, a4
0xff2ccd76:  entry	a1, 512

----------------
IN: 
0xff2ccd79:  rsil	a15, 6

----------------
IN: 
0xff2ccd79:  rsil	a15, 6

----------------
IN: 
0xff2ccd7c:  rsr.interrupt	a15

----------------
IN: 
0xff2ccd7f:  rsr.intenable	a12
0xff2ccd82:  movi.n	a13, 15
0xff2ccd84:  and	a15, a15, a12
0xff2ccd87:  and	a15, a15, a13
0xff2ccd8a:  rsr.sar	a14
0xff2ccd8d:  s32i.n	a14, a1, 8
0xff2ccd8f:  rsr.lcount	a13
0xff2ccd92:  rsr.lbeg	a14
0xff2ccd95:  s32i	a13, a1, 88
0xff2ccd98:  rsr.lend	a13
0xff2ccd9b:  s32i	a14, a1, 92
0xff2ccd9e:  s32i	a13, a1, 96
0xff2ccda1:  rsr.acclo	a13
0xff2ccda4:  rsr.acchi	a14
0xff2ccda7:  s32i	a13, a1, 104
0xff2ccdaa:  s32i	a14, a1, 108
0xff2ccdad:  rur.threadptr	a13
0xff2ccdb0:  l32i.n	a13, a13, 16
0xff2ccdb2:  s32i.n	a1, a13, 0
0xff2ccdb4:  addmi	a1, a13, 4096
0xff2ccdb7:  beqz	a15, 0xff2cce44

----------------
IN: 
0xff2ccdba:  rur.threadptr	a11
0xff2ccdbd:  l32i.n	a11, a11, 36
0xff2ccdbf:  s32i.n	a13, a11, 4
0xff2ccdc1:  l32r	a13, 0xff2c08a4
0xff2ccdc4:  s32i.n	a13, a11, 8
0xff2ccdc6:  rur.threadptr	a13
0xff2ccdc9:  l32i.n	a13, a13, 48
0xff2ccdcb:  rur.threadptr	a14
0xff2ccdce:  s32i.n	a13, a14, 40
0xff2ccdd0:  rur.threadptr	a14
0xff2ccdd3:  s32i.n	a11, a14, 48
0xff2ccdd5:  neg	a12, a15
0xff2ccdd8:  and	a12, a12, a15
0xff2ccddb:  wsr.intclear	a12

----------------
IN: 
0xff2ccdde:  l32r	a13, 0xff2c0bb0
0xff2ccde1:  movi.n	a14, 31
0xff2ccde3:  nsau	a12, a12
0xff2ccde6:  sub	a15, a14, a12
0xff2ccde9:  neg	a15, a15
0xff2ccdec:  addi	a15, a15, 21
0xff2ccdef:  addx8	a12, a15, a13
0xff2ccdf2:  l32i.n	a13, a12, 0
0xff2ccdf4:  l32i.n	a14, a12, 4
0xff2ccdf6:  or	a15, a1, a1
0xff2ccdf9:  callx12	a13

----------------
IN: 
0xff2cbf48:  entry	a1, 48

----------------
IN: 
0xff2cbf4b:  rsil	a9, 5

----------------
IN: 
0xff2cbf4b:  rsil	a9, 5

----------------
IN: 
0xff2cbf4e:  movi.n	a7, -1
0xff2cbf50:  l32i.n	a4, a2, 0
0xff2cbf52:  movi.n	a8, 0
0xff2cbf54:  mov.n	a5, a7
0xff2cbf56:  movi.n	a12, -3
0xff2cbf58:  j	0xff2cbf9d

----------------
IN: 
0xff2cbf9d:  bne	a2, a4, 0xff2cbf5c

----------------
IN: 
0xff2cbf5c:  addi	a3, a4, -28
0xff2cbf5f:  l32i.n	a6, a3, 20
0xff2cbf61:  and	a6, a12, a6
0xff2cbf64:  bnei	a6, 1, 0xff2cbf9a

----------------
IN: 
0xff2cbf67:  l32i.n	a11, a3, 48
0xff2cbf69:  bnez.n	a11, 0xff2cbf71

----------------
IN: 
0xff2cbf71:  l32i.n	a10, a3, 24
0xff2cbf73:  s32i.n	a8, a1, 0
0xff2cbf75:  s32i.n	a9, a1, 4
0xff2cbf77:  s32i.n	a12, a1, 8
0xff2cbf79:  callx8	a11

xtensa_cpu_tlb_fill(ff305090, 1, 0) -> ff305090, ret = 0
----------------
IN: 
0xff2cc85c:  entry	a1, 32

----------------
IN: 
0xff2cc85f:  l32r	a2, 0xff2cc858
0xff2cc862:  l32r	a3, 0xff2cc858
0xff2cc865:  retw.n

----------------
IN: 
0xff2cbf7c:  or	a13, a10, a11
0xff2cbf7f:  mov.n	a6, a3
0xff2cbf81:  l32i.n	a8, a1, 0
0xff2cbf83:  l32i.n	a9, a1, 4
0xff2cbf85:  l32i.n	a12, a1, 8
0xff2cbf87:  beqz.n	a13, 0xff2cbfa3

----------------
IN: 
0xff2cbf89:  bltu	a5, a11, 0xff2cbf9a

----------------
IN: 
0xff2cbf8c:  bne	a11, a5, 0xff2cbf92

----------------
IN: 
0xff2cbf8f:  bltu	a7, a10, 0xff2cbf9a

----------------
IN: 
0xff2cbf92:  mov.n	a8, a3
0xff2cbf94:  or	a7, a10, a10
0xff2cbf97:  or	a5, a11, a11
0xff2cbf9a:  l32i	a4, a4, 0
0xff2cbf9d:  bne	a2, a4, 0xff2cbf5c

----------------
IN: 
0xff2cbfa0:  or	a6, a8, a8
0xff2cbfa3:  wsr.ps	a9

----------------
IN: 
0xff2cbfa6:  rsync
0xff2cbfa9:  bnez	a6, 0xff2cbfb8

----------------
IN: 
0xff2cbfb8:  or	a11, a6, a6
0xff2cbfbb:  mov.n	a10, a2
0xff2cbfbd:  call8	0xff2cbe94

----------------
IN: 
0xff2cbe94:  entry	a1, 32

----------------
IN: 
0xff2cbe97:  l32i	a8, a3, 36

----------------
IN: 
0xff2cbe97:  l32i	a8, a3, 36
0xff2cbe9a:  rsil	a2, 5

----------------
IN: 
0xff2cbe9d:  l32i	a10, a8, 0
0xff2cbea0:  call8	0xff2c0ad8

----------------
IN: 
0xff2c0ad8:  entry	a1, 32

----------------
IN: 
0xff2c0adb:  rur.threadptr	a8

----------------
IN: 
0xff2c0500:  s32e	a0, a13, -16
0xff2c0503:  l32e	a0, a1, -12
0xff2c0506:  s32e	a1, a13, -12
0xff2c0509:  s32e	a2, a13, -8
0xff2c050c:  s32e	a3, a13, -4
0xff2c050f:  s32e	a4, a0, -48
0xff2c0512:  s32e	a5, a0, -44
0xff2c0515:  s32e	a6, a0, -40
0xff2c0518:  s32e	a7, a0, -36
0xff2c051b:  s32e	a8, a0, -32
0xff2c051e:  s32e	a9, a0, -28
0xff2c0521:  s32e	a10, a0, -24
0xff2c0524:  s32e	a11, a0, -20
0xff2c0527:  rfwo

----------------
IN: 
0xff2c0adb:  rur.threadptr	a8
0xff2c0ade:  s32i.n	a2, a8, 48
0xff2c0ae0:  retw.n

----------------
IN: 
0xff2cbea3:  movi	a8, 3
0xff2cbea6:  s32i.n	a8, a3, 20
0xff2cbea8:  wsr.ps	a2

----------------
IN: 
0xff2cbeab:  rsync
0xff2cbeae:  movi.n	a2, 0
0xff2cbeb0:  retw.n

----------------
IN: 
0xff2cbfc0:  retw.n

----------------
IN: 
0xff2c0540:  l32e	a0, a13, -16
0xff2c0543:  l32e	a1, a13, -12
0xff2c0546:  l32e	a2, a13, -8
0xff2c0549:  l32e	a11, a1, -12
0xff2c054c:  l32e	a3, a13, -4
0xff2c054f:  l32e	a4, a11, -48
0xff2c0552:  l32e	a5, a11, -44
0xff2c0555:  l32e	a6, a11, -40
0xff2c0558:  l32e	a7, a11, -36
0xff2c055b:  l32e	a8, a11, -32
0xff2c055e:  l32e	a9, a11, -28
0xff2c0561:  l32e	a10, a11, -24
0xff2c0564:  l32e	a11, a11, -20
0xff2c0567:  rfwu

----------------
IN: 
0xff2ccdfc:  rsr.interrupt	a15

----------------
IN: 
0xff2ccdff:  rsr.intenable	a12
0xff2cce02:  movi.n	a13, 15
0xff2cce04:  and	a15, a15, a12
0xff2cce07:  and	a15, a15, a13
0xff2cce0a:  bnez	a15, 0xff2ccdd5

----------------
IN: 
0xff2cce0d:  rur.threadptr	a11
0xff2cce10:  l32i.n	a11, a11, 48
0xff2cce12:  rur.threadptr	a12
0xff2cce15:  l32i.n	a12, a12, 36
0xff2cce17:  bne	a11, a12, 0xff2cce24

----------------
IN: 
0xff2cce24:  l32i	a13, a1, 88
0xff2cce27:  l32i	a14, a1, 92
0xff2cce2a:  l32i	a15, a1, 96
0xff2cce2d:  wsr.lcount	a13
0xff2cce30:  wsr.lbeg	a14

----------------
IN: 
0xff2cce33:  wsr.lend	a15

----------------
IN: 
0xff2cce36:  l32i	a13, a1, 104
0xff2cce39:  l32i	a14, a1, 108
0xff2cce3c:  wsr.acclo	a13
0xff2cce3f:  wsr.acchi	a14
0xff2cce42:  l32i.n	a14, a1, 8
0xff2cce44:  l32r	a0, 0xff2c0bb4
0xff2cce47:  l32r	a13, 0xff2c0ba0
0xff2cce4a:  wsr.sar	a14
0xff2cce4d:  or	a0, a0, a13
0xff2cce50:  addx2	a0, a13, a0
0xff2cce53:  rsil	a14, 5

----------------
IN: 
0xff2cce56:  retw.n

----------------
IN: 
0xff2cce58:  addmi	a5, a5, -4096
0xff2cce5b:  l32i.n	a5, a5, 0
0xff2cce5d:  s32i	a2, a5, 492
0xff2cce60:  s32i.n	a1, a5, 20
0xff2cce62:  l32i.n	a4, a5, 32
0xff2cce64:  l32i.n	a6, a5, 40
0xff2cce66:  l32i.n	a7, a5, 44
0xff2cce68:  l32i.n	a8, a5, 48
0xff2cce6a:  l32i.n	a9, a5, 52
0xff2cce6c:  l32i.n	a10, a5, 56
0xff2cce6e:  l32i.n	a11, a5, 60
0xff2cce70:  l32i	a12, a5, 64
0xff2cce73:  l32i	a13, a5, 68
0xff2cce76:  l32i	a14, a5, 72
0xff2cce79:  rur.threadptr	a2
0xff2cce7c:  l32i.n	a2, a2, 44
0xff2cce7e:  rur.threadptr	a1
0xff2cce81:  l32i.n	a1, a1, 48
0xff2cce83:  beqz.n	a1, 0xff2cceb6

----------------
IN: 
0xff2cce85:  l32i.n	a1, a1, 0
0xff2cce87:  l32i.n	a0, a2, 0
0xff2cce89:  beq	a0, a1, 0xff2cceb6

----------------
IN: 
0xff2cce8c:  s32i.n	a1, a2, 0
0xff2cce8e:  l32i	a1, a5, 20
0xff2cce91:  rsr.ps	a2
0xff2cce94:  l32r	a3, 0xff2c0bb8
0xff2cce97:  xor	a2, a2, a3
0xff2cce9a:  wsr.ps	a2

----------------
IN: 
0xff2cce9d:  call0	0xff2cd330

----------------
IN: 
0xff2cd330:  rsr.windowbase	a2
0xff2cd333:  addi.n	a2, a2, 1
0xff2cd335:  ssr	a2
0xff2cd338:  rsr.windowstart	a3
0xff2cd33b:  srl	a2, a3
0xff2cd33e:  sll	a3, a3
0xff2cd341:  bgez	a3, 0xff2cd404

----------------
IN: 
0xff2cd344:  extui	a3, a3, 24, 8
0xff2cd347:  or	a2, a2, a3
0xff2cd34a:  neg	a3, a2
0xff2cd34d:  and	a3, a3, a2
0xff2cd350:  nsau	a3, a3
0xff2cd353:  ssl	a3
0xff2cd356:  srl	a2, a2
0xff2cd359:  wsr.windowstart	a2

----------------
IN: 
0xff2cd35c:  rsr.windowbase	a2
0xff2cd35f:  addi	a2, a2, 31
0xff2cd362:  sub	a3, a2, a3
0xff2cd365:  wsr.windowbase	a3

----------------
IN: 
0xff2cd368:  rsync
0xff2cd36b:  rsr.windowstart	a2
0xff2cd36e:  beqz	a2, 0xff2cd3ec

----------------
IN: 
0xff2cd3ec:  rotw	1

----------------
IN: 
0xff2cd3ef:  rsr.windowbase	a2
0xff2cd3f2:  ssl	a2
0xff2cd3f5:  movi.n	a2, 1
0xff2cd3f7:  sll	a2, a2
0xff2cd3fa:  wsr.windowstart	a2

----------------
IN: 
0xff2cd3fd:  rsync
0xff2cd400:  movi.n	a2, 0
0xff2cd402:  ret.n

----------------
IN: 
0xff2ccea0:  rsr.ps	a2
0xff2ccea3:  l32r	a3, 0xff2c0bb8
0xff2ccea6:  or	a2, a2, a3
0xff2ccea9:  wsr.ps	a2

----------------
IN: 
0xff2cceac:  rur.threadptr	a5
0xff2cceaf:  l32i.n	a5, a5, 44
0xff2cceb1:  l32i.n	a5, a5, 0
0xff2cceb3:  j	0xff2cce62

----------------
IN: 
0xff2cce62:  l32i.n	a4, a5, 32
0xff2cce64:  l32i.n	a6, a5, 40
0xff2cce66:  l32i.n	a7, a5, 44
0xff2cce68:  l32i.n	a8, a5, 48
0xff2cce6a:  l32i.n	a9, a5, 52
0xff2cce6c:  l32i.n	a10, a5, 56
0xff2cce6e:  l32i.n	a11, a5, 60
0xff2cce70:  l32i	a12, a5, 64
0xff2cce73:  l32i	a13, a5, 68
0xff2cce76:  l32i	a14, a5, 72
0xff2cce79:  rur.threadptr	a2
0xff2cce7c:  l32i.n	a2, a2, 44
0xff2cce7e:  rur.threadptr	a1
0xff2cce81:  l32i.n	a1, a1, 48
0xff2cce83:  beqz.n	a1, 0xff2cceb6

----------------
IN: 
0xff2cceb6:  l32i.n	a0, a5, 4
0xff2cceb8:  wsr.ps	a0

----------------
IN: 
0xff2ccebb:  rsync
0xff2ccebe:  l32i.n	a0, a5, 0
0xff2ccec0:  wsr.epc1	a0
0xff2ccec3:  l32i.n	a0, a5, 8
0xff2ccec5:  wsr.sar	a0
0xff2ccec8:  l32i	a0, a5, 88
0xff2ccecb:  l32i	a1, a5, 92
0xff2ccece:  l32i	a2, a5, 96
0xff2cced1:  wsr.lcount	a0
0xff2cced4:  wsr.lbeg	a1

----------------
IN: 
0xff2cced7:  wsr.lend	a2

----------------
IN: 
0xff2cceda:  l32i	a0, a5, 104
0xff2ccedd:  l32i	a1, a5, 108
0xff2ccee0:  wsr.acclo	a0
0xff2ccee3:  wsr.acchi	a1
0xff2ccee6:  l32i.n	a0, a5, 16
0xff2ccee8:  l32i.n	a1, a5, 20
0xff2cceea:  l32i.n	a2, a5, 24
0xff2cceec:  l32i.n	a3, a5, 28
0xff2cceee:  l32i	a15, a5, 76
0xff2ccef1:  l32i.n	a5, a5, 36
0xff2ccef3:  rfe

----------------
IN: 
0xff2cbff4:  entry	a1, 32

----------------
IN: 
0xff2cbff7:  l32i	a8, a2, 40
0xff2cbffa:  bnez	a8, 0xff2cc009

----------------
IN: 
0xff2cc009:  l32i.n	a10, a2, 24
0xff2cc00b:  callx8	a8

----------------
IN: 
0xff2cc870:  entry	a1, 32

----------------
IN: 
0xff2cc873:  call8	0xff2cb2ac

----------------
IN: 
0xff2cb2af:  l32r	a2, 0xff2cb2a8
0xff2cb2b2:  retw.n

----------------
IN: 
0xff2cc876:  l32i.n	a2, a10, 8
0xff2cc878:  rsr.ps	a8
0xff2cc87b:  extui	a8, a8, 0, 4
0xff2cc87e:  beqz	a8, 0xff2cc88c

----------------
IN: 
0xff2cc88c:  waiti	0


(qemu) 
(qemu)