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Created March 18, 2024 17:44
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EPYC 9274F
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gistfile1.txt
AMD EPYC 9274F 24-Core Processor
@cyring
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cyring commented Mar 18, 2024 •
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Processor                                     [AMD EPYC 9274F 24-Core Processor]
|- PPIN#                                                      [ 2b6a56a45d98031]
|- Architecture                                                     [EPYC/Genoa]
|- Vendor ID                                                      [AuthenticAMD]
|- Firmware                                                        [ 71.121.0-5]
|- Microcode                                                        [0x0a101144]
|- Signature                                                           [  AF_11]
|- Stepping                                                            [      1]
|- Online CPU                                                          [ 48/ 48]
|- Base Clock                                                          [101.099]
|- Frequency            (MHz)                      Ratio
                 Min   1516.49                    <  15 >
                 Max   4043.97                    <  40 >
|- Factory                                                             [100.000]
                       4000                       [  40 ]
|- Performance
   |- P-State
                 TGT   4043.97                    <  40 >
   |- CPPC
                 Min   4347.27                    <  43 >
                 Max    404.40                    <   4 >
                 TGT   4347.27                    <  43 >
|- Turbo Boost                                                         [   LOCK]
                 XFR   4347.27                    [  43 ]
                 CPB   4347.27                    [  43 ]
                  1C   2729.68                    <  27 >
                  2C   1516.49                    <  15 >
|- Uncore                                                              [   LOCK]
                 CLK   2426.38                    [  24 ]
                 MEM   2426.38                    [  24 ]

Instruction Set Extensions
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y]
|- AVX512-F     [Y]    AVX512-DQ [Y]  AVX512-IFMA [Y]   AVX512-PF [N]
|- AVX512-ER    [N]    AVX512-CD [Y]    AVX512-BW [Y]   AVX512-VL [Y]
|- AVX512-VBMI  [Y] AVX512-VBMI2 [Y]  AVX512-VNNI [Y]  AVX512-ALG [Y]
|- AVX512-VPOP  [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N]
|- AVX512-BF16  [Y] AVX-VNNI-VEX [N]    AVX-FP128 [N]   AVX-FP256 [Y]
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y]
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y]
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y]
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y]
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y]
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y]
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y]
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [Y]        UMIP [Y]
|- VAES         [Y]   VPCLMULQDQ [Y]   PREFETCH/W [Y]       LZCNT [Y]

Features
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Advanced Virtual Interrupt Controller                        AVIC   [Capable]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- LOCK prefix to read CR8                                    AltMov   [Capable]
|- Clear Zero Instruction                                     CLZERO   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Capable]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast Short REP MOVSB                                         FSRM   [Capable]
|- Fast-String Operation                                        ERMS   [Capable]
|- Fused Multiply Add                                           FMA4   [Missing]
|- Fused Multiply Add                                            FMA   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Hyper-Threading Technology                                    HTT   [Capable]
|- Hardware P-state control                                      HwP   [Capable]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Capable]
|- Instruction INVPCID                                       INVPCID   [Capable]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Missing]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- OS Visible Work-around                                       OSVW   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Capable]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Capable]
|- Resource Director Technology/PQM                            RDT-M   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Trailing Bit Manipulation                                     TBM   [Missing]
|- Translation Cache Extension                                   TCE   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Capable]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Write Back & Do Not Invalidate Cache                     WBNOINVD   [Capable]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- AVIC controller for x2APIC                                 x2AVIC   [Capable]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
|- Extended Operation Support                                    XOP   [Missing]
Mitigation mechanisms
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
   |- IBRS Always-On preferred by processor                            [ Unable]
   |- IBRS preferred over software solution                            [Capable]
   |- IBRS provides same speculation limits                            [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Single Thread Indirect Branch Predictor                     STIBP   [ Enable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
   |- SSBD use VIRT_SPEC_CTRL register                                 [ Unable]
   |- SSBD not needed on this processor                                [ Unable]
|- No Branch Type Confusion                                   BTC_NO   [Capable]
|- BTC on Non-Branch instruction                            BTC-NOBR   [Capable]
|- Limited Early Redirect Window                            AGENPICK   [ Unable]
|- Arch - No Fast Predictive Store Forwarding                   PSFD   [Capable]
|- Arch - Enhanced Predictive Store Forwarding                  EPSF   [Capable]
|- Arch - Cross Processor Information Leak                XPROC_LEAK   [ Unable]
Security Features
|- CET Shadow Stack features                                  CET-SS   [Capable]
|- Secure Init and Jump with Attestation                      SKINIT   [Capable]
|- Secure Encrypted Virtualization                               SEV   [Capable]
|- SEV - Encrypted State                                      SEV-ES   [Capable]
|- SEV - Secure Nested Paging                                SEV-SNP   [Capable]
|- Guest Mode Execute Trap                                      GMET   [Capable]
|- Supervisor Shadow Stack                                       SSS   [Capable]
|- VM Permission Levels                                         VMPL   [Capable]
|- VMPL Supervisor Shadow Stack                             VMPL-SSS   [Capable]
|- Secure Memory Encryption                                      SME   [Capable]
|- Transparent SME                                              TSME   [ Enable]
|- Secure Multi-Key Memory Encryption                         SME-MK   [Capable]
|- DRAM Data Scrambling                                    Scrambler   [ Enable]

Technologies
|- Instruction Cache Unit
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
|- Data Cache Unit
   |- L1 Prefetcher                                                L1 HW   < ON>
|- Cache Prefetchers
   |- L2 Prefetcher                                                L2 HW   < ON>
   |- L1 Stride Prefetcher                                     L1 Stride   < ON>
   |- L1 Region Prefetcher                                     L1 Region   < ON>
   |- L1 Burst Prefetch Mode                                    L1 Burst   < ON>
   |- L2 Stream HW Prefetcher                                  L2 Stream   < ON>
   |- L2 Up/Down Prefetcher                                   L2 Up/Down   < ON>
|- System Management Mode                                       SMM-Lock   [OFF]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [OFF]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   <OFF>
|- Virtualization                                                    SVM   [OFF]
   |- I/O MMU                                                      AMD-V   [OFF]
   |- Version                                                     [         N/A]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]

Performance Monitoring
|- Version                                                        PM       [  2]
|- Counters:          General                   Fixed
|           {  6,  6, 16 } x 48 bits            3 x 64 bits
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       < ON>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       <OFF>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Core C-States
   |- C-States Base Address                                      BAR   [ 0x413 ]
|- ACPI Processor C-States                                      _CST   [      2]
|- MONITOR/MWAIT
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7
   |- Sub C-State:     1     1     0     0     0     0     0     0
   |- Monitor-Mwait Extensions                                   EMX   [Capable]
   |- Interrupt Break-Event                                      IBE   [Capable]
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- Global Time Stamp Counter                                           [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]
|- Processor Performance Control                                _PCT   [Missing]
|- Performance Supported States                                 _PSS   [Missing]
|- Performance Present Capabilities                             _PPC   [Missing]
|- Continuous Performance Control                               _CPC   [Missing]

Power, Current & Thermal
|- Temperature Offset:Junction                                 TjMax [ 49:  0 C]
|- CPPC Energy Preference                                        EPP   <      0>
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [ Enable]
|- Thermal Monitor 2                                             HTC   [ Enable]
|- Thermal Design Power                                          TDP   [Missing]
   |- Minimum Power                                              Min   [Missing]
   |- Maximum Power                                              Max   [Missing]
|- Thermal Design Power                                      Package   < Enable>
   |- Power Limit                                                PL1   <  400 W>
   |- Time Window                                                TW1   <   0 ns>
   |- Power Limit                                                PL2   <  400 W>
   |- Time Window                                                TW2   <   0 ns>
|- Thermal Design Power                                         Core   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                       Uncore   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                         DRAM   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                     Platform   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Package Power Tracking                                        PPT   [Missing]
|- Electrical Design Current                                     EDC   [Missing]
|- Thermal Design Current                                        TDC   [Missing]
|- Core Thermal Point
|- Package Thermal Point
   |- Thermal Monitor Trip                                     Limit   [  115 C]
   |- HTC Temperature Limit                                    Limit   [    0 C]
   |- HTC Temperature Hysteresis                           Threshold   [    0 C]
|- Units
   |- Power                                               watt   [      Missing]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]
|- Collaborative Processor Performance Control                  CPPC       < ON>
   |- Capabilities     Lowest      Efficient     Guaranteed        Highest
   |- CPU #0     404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #1     404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #2     404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #3     404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #4     404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #5     404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #6     404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #7     404.37 (  4)  2729.50 ( 27)  4043.71 ( 40)  4346.98 ( 43)
   |- CPU #8     404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #9     404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #10    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #11    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #12    404.40 (  4)  2729.68 ( 27)  4043.96 ( 40)  4347.26 ( 43)
   |- CPU #13    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #14    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #15    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #16    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #17    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.26 ( 43)
   |- CPU #18    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #19    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #20    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #21    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.26 ( 43)
   |- CPU #22    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #23    404.40 (  4)  2729.67 ( 27)  4043.95 ( 40)  4347.25 ( 43)
   |- CPU #24    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #25    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #26    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #27    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #28    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #29    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #30    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #31    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #32    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #33    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #34    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #35    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #36    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.26 ( 43)
   |- CPU #37    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #38    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #39    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #40    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #41    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #42    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #43    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #44    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #45    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #46    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)
   |- CPU #47    404.40 (  4)  2729.68 ( 27)  4043.97 ( 40)  4347.27 ( 43)

CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive
 #   ID   ID CCD CCX ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way
000:BSP    0   0  0   0  0      32  8        32  8      1024  8 i  262144 16w
001:  0    2   0  0   1  0      32  8        32  8      1024  8 i  262144 16w
002:  0    4   0  0   2  0      32  8        32  8      1024  8 i  262144 16w
003:  0   32   4  4  16  0      32  8        32  8      1024  8 i  262144 16w
004:  0   34   4  4  17  0      32  8        32  8      1024  8 i  262144 16w
005:  0   36   4  4  18  0      32  8        32  8      1024  8 i  262144 16w
006:  0   16   2  2   8  0      32  8        32  8      1024  8 i  262144 16w
007:  0   18   2  2   9  0      32  8        32  8      1024  8 i  262144 16w
008:  0   20   2  2  10  0      32  8        32  8      1024  8 i  262144 16w
009:  0   48   6  6  24  0      32  8        32  8      1024  8 i  262144 16w
010:  0   50   6  6  25  0      32  8        32  8      1024  8 i  262144 16w
011:  0   52   6  6  26  0      32  8        32  8      1024  8 i  262144 16w
012:  0   24   2  3  12  0      32  8        32  8      1024  8 i  262144 16w
013:  0   26   2  3  13  0      32  8        32  8      1024  8 i  262144 16w
014:  0   28   2  3  14  0      32  8        32  8      1024  8 i  262144 16w
015:  0   56   6  7  28  0      32  8        32  8      1024  8 i  262144 16w
016:  0   58   6  7  29  0      32  8        32  8      1024  8 i  262144 16w
017:  0   60   6  7  30  0      32  8        32  8      1024  8 i  262144 16w
018:  0    8   0  1   4  0      32  8        32  8      1024  8 i  262144 16w
019:  0   10   0  1   5  0      32  8        32  8      1024  8 i  262144 16w
020:  0   12   0  1   6  0      32  8        32  8      1024  8 i  262144 16w
021:  0   40   4  5  20  0      32  8        32  8      1024  8 i  262144 16w
022:  0   42   4  5  21  0      32  8        32  8      1024  8 i  262144 16w
023:  0   44   4  5  22  0      32  8        32  8      1024  8 i  262144 16w
024:  0    1   0  0   0  1      32  8        32  8      1024  8 i  262144 16w
025:  0    3   0  0   1  1      32  8        32  8      1024  8 i  262144 16w
026:  0    5   0  0   2  1      32  8        32  8      1024  8 i  262144 16w
027:  0   33   4  4  16  1      32  8        32  8      1024  8 i  262144 16w
028:  0   35   4  4  17  1      32  8        32  8      1024  8 i  262144 16w
029:  0   37   4  4  18  1      32  8        32  8      1024  8 i  262144 16w
030:  0   17   2  2   8  1      32  8        32  8      1024  8 i  262144 16w
031:  0   19   2  2   9  1      32  8        32  8      1024  8 i  262144 16w
032:  0   21   2  2  10  1      32  8        32  8      1024  8 i  262144 16w
033:  0   49   6  6  24  1      32  8        32  8      1024  8 i  262144 16w
034:  0   51   6  6  25  1      32  8        32  8      1024  8 i  262144 16w
035:  0   53   6  6  26  1      32  8        32  8      1024  8 i  262144 16w
036:  0   25   2  3  12  1      32  8        32  8      1024  8 i  262144 16w
037:  0   27   2  3  13  1      32  8        32  8      1024  8 i  262144 16w
038:  0   29   2  3  14  1      32  8        32  8      1024  8 i  262144 16w
039:  0   57   6  7  28  1      32  8        32  8      1024  8 i  262144 16w
040:  0   59   6  7  29  1      32  8        32  8      1024  8 i  262144 16w
041:  0   61   6  7  30  1      32  8        32  8      1024  8 i  262144 16w
042:  0    9   0  1   4  1      32  8        32  8      1024  8 i  262144 16w
043:  0   11   0  1   5  1      32  8        32  8      1024  8 i  262144 16w
044:  0   13   0  1   6  1      32  8        32  8      1024  8 i  262144 16w
045:  0   41   4  5  20  1      32  8        32  8      1024  8 i  262144 16w
046:  0   43   4  5  21  1      32  8        32  8      1024  8 i  262144 16w
047:  0   45   4  5  22  1      32  8        32  8      1024  8 i  262144 16w

[ 0] HPE
[ 1] 1.58
[ 2] 01/04/2024
[ 3] HPE
[ 4] ProLiant DL345 Gen11
[ 5]
[ 6] M---3---W-
[ 7] P58792-B21
[ 8] ProLiant
[ 9] HPE
[10] ProLiant DL345 Gen11
[11]
[12] P---C---G---A-
[13] Number Of Devices:12\Maximum Capacity:6597069766656 kilobytes
[14] PROC 1 DIMM 1\PROC 1 DIMM 1
[15] PROC 1 DIMM 2\PROC 1 DIMM 2
[16] PROC 1 DIMM 3\PROC 1 DIMM 3
[17] PROC 1 DIMM 4\PROC 1 DIMM 4
[18] Samsung
[19] Samsung
[20] Samsung
[21] Samsung
[22] M321RYGA0BB0-CQKZJ
[23] M321RYGA0BB0-CQKZJ
[24] M321RYGA0BB0-CQKZJ
[25] M321RYGA0BB0-CQKZJ

                              Zen UMC  [14AD]
Controller #0                                                    Disabled
 Bus Rate  2400 MHz       Bus Speed 2426 MHz       REG DDR5 Speed 4852 MT/s

 Cha   CL  RCDr RCDw  RP  RAS   RC  RRDs RRDl FAW  WTRs WTRl  WR  clRR clWW
  #0   40   39   39   39   77  116    8   12   32    6   24   72    5   41
  #1   40   39   39   39   77  116    8   12   32    6   24   72    5   41
  #2   40   39   39   39   77  116    8   12   32    6   24   72    5   41
  #3   40   39   39   39   77  116    8   12   32    6   24   72    5   41
  #4   40   39   39   39   77  116    8   12   32    6   24   72    5   41
  #5   40   39   39   39   77  116    8   12   32    6   24   72    5   41
  #6   40   39   39   39   77  116    8   12   32    6   24   72    5   41
  #7   40   39   39   39   77  116    8   12   32    6   24   72    5   41
  #8   40   39   39   39   77  116    8   12   32    6   24   72    5   41
  #9   40   39   39   39   77  116    8   12   32    6   24   72    5   41
  #10  40   39   39   39   77  116    8   12   32    6   24   72    5   41
  #11  40   39   39   39   77  116    8   12   32    6   24   72    5   41
      CWL  RTP RdWr WrRd scWW sdWW ddWW scRR sdRR ddRR drRR drWW drWR drRRD
  #0   38   18   20    5    1    9    9    1    8    8    0    0    0    0
  #1   38   18   20    5    1    9    9    1    8    8    0    0    0    0
  #2   38   18   20    5    1    9    9    1    8    8    0    0    0    0
  #3   38   18   19    5    1    9    9    1    8    8    0    0    0    0
  #4   38   18   20    5    1    9    9    1    8    8    0    0    0    0
  #5   38   18   20    5    1    9    9    1    8    8    0    0    0    0
  #6   38   18   20    5    1    9    9    1    8    8    0    0    0    0
  #7   38   18   20    5    1    9    9    1    8    8    0    0    0    0
  #8   38   18   20    5    1    9    9    1    8    8    0    0    0    0
  #9   38   18   19    5    1    9    9    1    8    8    0    0    0    0
  #10  38   18   20    5    1    9    9    1    8    8    0    0    0    0
  #11  38   18   20    5    1    9    9    1    8    8    0    0    0    0
      REFI RFC1 RFC2 RFCsb RCPB RPPB BGS:Alt  Ban  Page  CKE  CMD  GDM  ECC
  #0  9347  983  528  456   0    0    ON OFF  R0W0   0    0   1T   OFF   1
  #1  9347  983  528  456   0    0    ON OFF  R0W0   0    0   1T   OFF   1
  #2  9347  983  528  456   0    0    ON OFF  R0W0   0    0   1T   OFF   1
  #3  9347  983  528  456   0    0    ON OFF  R0W0   0    0   1T   OFF   1
  #4  9347  983  528  456   0    0    ON OFF  R0W0   0    0   1T   OFF   1
  #5  9347  983  528  456   0    0    ON OFF  R0W0   0    0   1T   OFF   1
  #6  9347  983  528  456   0    0    ON OFF  R0W0   0    0   1T   OFF   1
  #7  9347  983  528  456   0    0    ON OFF  R0W0   0    0   1T   OFF   1
  #8  9347  983  528  456   0    0    ON OFF  R0W0   0    0   1T   OFF   1
  #9  9347  983  528  456   0    0    ON OFF  R0W0   0    0   1T   OFF   1
  #10 9347  983  528  456   0    0    ON OFF  R0W0   0    0   1T   OFF   1
  #11 9347  983  528  456   0    0    ON OFF  R0W0   0    0   1T   OFF   1
      MRD:PDA   MOD:PDA  WRMPR STAG PDM RDDATA WRD  WRL  RDL  XS   XP CPDED
  #0   32  32    32  32    24   36 0:P:0   31   6   29   36 1007   18   12
  #1   32  32    32  32    24   36 0:P:0   31   6   29   36 1007   18   12
  #2   32  32    32  32    24   36 0:P:0   31   6   29   36 1007   18   12
  #3   32  32    32  32    24   36 0:P:0   31   6   29   34 1007   18   12
  #4   32  32    32  32    24   36 0:P:0   31   6   29   36 1007   18   12
  #5   32  32    32  32    24   36 0:P:0   31   6   29   36 1007   18   12
  #6   32  32    32  32    24   36 0:P:0   31   6   29   36 1007   18   12
  #7   32  32    32  32    24   36 0:P:0   31   6   29   36 1007   18   12
  #8   32  32    32  32    24   36 0:P:0   31   6   29   36 1007   18   12
  #9   32  32    32  32    24   36 0:P:0   31   6   29   34 1007   18   12
  #10  32  32    32  32    24   36 0:P:0   31   6   29   34 1007   18   12
  #11  32  32    32  32    24   36 0:P:0   31   6   29   36 1007   18   12

 DIMM Geometry for channel #0
      Slot Bank Rank     Rows   Columns    Memory Size (MB)
       #0    32    1    131072      2048          65536  M321RYGA0BB0-CQKZJ
       #1
 DIMM Geometry for channel #1
      Slot Bank Rank     Rows   Columns    Memory Size (MB)
       #0    32    1    131072      2048          65536  M321RYGA0BB0-CQKZJ
       #1
 DIMM Geometry for channel #2
      Slot Bank Rank     Rows   Columns    Memory Size (MB)
       #0    32    1    131072      2048          65536  M321RYGA0BB0-CQKZJ
       #1
 DIMM Geometry for channel #3
      Slot Bank Rank     Rows   Columns    Memory Size (MB)
       #0    32    1    131072      2048          65536  M321RYGA0BB0-CQKZJ
       #1
 DIMM Geometry for channel #4
      Slot Bank Rank     Rows   Columns    Memory Size (MB)
       #0    32    1    131072      2048          65536  M321RYGA0BB0-CQKZJ
       #1
 DIMM Geometry for channel #5
      Slot Bank Rank     Rows   Columns    Memory Size (MB)
       #0    32    1    131072      2048          65536  M321RYGA0BB0-CQKZJ
       #1
 DIMM Geometry for channel #6
      Slot Bank Rank     Rows   Columns    Memory Size (MB)
       #0    32    1    131072      2048          65536  M321RYGA0BB0-CQKZJ
       #1
 DIMM Geometry for channel #7
      Slot Bank Rank     Rows   Columns    Memory Size (MB)
       #0    32    1    131072      2048          65536  M321RYGA0BB0-CQKZJ
       #1
 DIMM Geometry for channel #8
      Slot Bank Rank     Rows   Columns    Memory Size (MB)
       #0    32    1    131072      2048          65536  M321RYGA0BB0-CQKZJ
       #1
 DIMM Geometry for channel #9
      Slot Bank Rank     Rows   Columns    Memory Size (MB)
       #0    32    1    131072      2048          65536  M321RYGA0BB0-CQKZJ
       #1
 DIMM Geometry for channel #10
      Slot Bank Rank     Rows   Columns    Memory Size (MB)
       #0    32    1    131072      2048          65536  M321RYGA0BB0-CQKZJ
       #1
 DIMM Geometry for channel #11
      Slot Bank Rank     Rows   Columns    Memory Size (MB)
       #0    32    1    131072      2048          65536  M321RYGA0BB0-CQKZJ
       #1

Linux:
|- Release                                                      [6.5.0-1018-oem]
|- Version         [#19-Ubuntu SMP PREEMPT_DYNAMIC Thu Mar 14 21:40:46 UTC 2024]
|- Machine                                                              [x86_64]
Memory:
|- Total RAM                                                       1188654896 KB
|- Shared RAM                                                       859928224 KB
|- Free RAM                                                          49593740 KB
|- Buffer RAM                                                          757016 KB
|- Total High                                                               0 KB
|- Free High                                                                0 KB
Clock Source                                                  <             tsc>
CPU-Freq driver                                               [      amd-pstate]
Governor                                                      [     performance]
CPU-Idle driver                                               [       acpi_idle]
|- Idle Limit                                                 [              C2]
   |- State        POLL      C1      C2
   |-           CPUIDLE ACPI FF ACPI IO
   |- Power          -1       0       0
   |- Latency         0       1      18
   |- Residency       0       2      36

CPU Freq(MHz) VID  Vcore  TMP(C)    Accumulator       Energy(J)     Power(W)
000 4154.88   183  1.1438   47  000000000000299498    4.569976807   4.569976807
001 1912.14   183  1.1438   46  000000000000233454    3.562225342   3.562225342
002 1937.81   183  1.1438   46  000000000000247121    3.770767212   3.770767212
003 1860.08   183  1.1438   45  000000000000225962    3.447906494   3.447906494
004 1913.62   183  1.1438   46  000000000000235448    3.592651367   3.592651367
005 2100.28   183  1.1438   46  000000000000251572    3.838684082   3.838684082
006 1932.31   184  1.1500   45  000000000000216682    3.306304932   3.306304932
007 3559.21   184  1.1500   44  000000000000265083    4.044845581   4.044845581
008 1726.96   184  1.1500   44  000000000000214621    3.274856567   3.274856567
009 1982.01   184  1.1500   42  000000000000269450    4.111480713   4.111480713
010 1934.85   184  1.1500   42  000000000000235321    3.590713501   3.590713501
011 1936.73   184  1.1500   42  000000000000243263    3.711898804   3.711898804
012 2247.38   183  1.1438   44  000000000000237227    3.619796753   3.619796753
013 2081.39   183  1.1438   44  000000000000234486    3.577972412   3.577972412
014 3618.75   183  1.1438   44  000000000000349899    5.339035034   5.339035034
015 2326.15   183  1.1438   42  000000000000247739    3.780197144   3.780197144
016 2513.36   183  1.1438   42  000000000000270469    4.127029419   4.127029419
017 2133.88   183  1.1438   42  000000000000237484    3.623718262   3.623718262
018 1631.22   184  1.1500   46  000000000000212608    3.244140625   3.244140625
019 1525.88   184  1.1500   46  000000000000191242    2.918121338   2.918121338
020 1537.82   184  1.1500   46  000000000000207364    3.164123535   3.164123535
021 1658.47   184  1.1500   46  000000000000218501    3.334060669   3.334060669
022 1698.20   184  1.1500   46  000000000000236623    3.610580444   3.610580444
023 1823.60   184  1.1500   46  000000000000230500    3.517150879   3.517150879
024 1791.82   183  1.1438   46  000000000000000000    0.000000000   0.000000000
025 1728.60   183  1.1438   46  000000000000000000    0.000000000   0.000000000
026 1868.98   183  1.1438   46  000000000000000000    0.000000000   0.000000000
027 1841.32   183  1.1438   46  000000000000000000    0.000000000   0.000000000
028 1948.04   183  1.1438   46  000000000000000000    0.000000000   0.000000000
029 2032.12   183  1.1438   46  000000000000000000    0.000000000   0.000000000
030 1538.26   184  1.1500   44  000000000000000000    0.000000000   0.000000000
031 2336.78   184  1.1500   44  000000000000000000    0.000000000   0.000000000
032 1714.61   184  1.1500   44  000000000000000000    0.000000000   0.000000000
033 4153.87   184  1.1500   42  000000000000000000    0.000000000   0.000000000
034 1914.31   184  1.1500   42  000000000000000000    0.000000000   0.000000000
035 1886.97   184  1.1500   42  000000000000000000    0.000000000   0.000000000
036 2181.18   183  1.1438   44  000000000000000000    0.000000000   0.000000000
037 2323.41   183  1.1438   44  000000000000000000    0.000000000   0.000000000
038 2255.56   183  1.1438   44  000000000000000000    0.000000000   0.000000000
039 2153.99   183  1.1438   42  000000000000000000    0.000000000   0.000000000
040 2381.70   183  1.1438   42  000000000000000000    0.000000000   0.000000000
041 2181.16   183  1.1438   42  000000000000000000    0.000000000   0.000000000
042 1702.48   184  1.1500   46  000000000000000000    0.000000000   0.000000000
043 1366.00   184  1.1500   46  000000000000000000    0.000000000   0.000000000
044 1601.79   184  1.1500   46  000000000000000000    0.000000000   0.000000000
045 1754.73   184  1.1500   46  000000000000000000    0.000000000   0.000000000
046 4154.88   184  1.1500   46  000000000000000000    0.000000000   0.000000000
047 1915.94   184  1.1500   46  000000000000000000    0.000000000   0.000000000

             Package[0]    Cores         Uncore        Memory        Platform
Energy(J): 156.348937988  88.678237915  29.650711060   0.000000000   0.000000000
Power(W) : 156.348937988  88.678237915  29.650711060   0.000000000   0.000000000

CPU     IPS            IPC            CPI
000     1.264158/s     1.264157/c     0.791041/i
001     0.357006/s     2.006611/c     0.498353/i
002     0.454265/s     1.959536/c     0.510325/i
003     0.476303/s     2.281499/c     0.438308/i
004     0.692764/s     2.097233/c     0.476819/i
005     0.880800/s     2.534534/c     0.394550/i
006     0.519501/s     2.063373/c     0.484643/i
007     0.360482/s     1.651127/c     0.605647/i
008     0.260595/s     1.616141/c     0.618758/i
009     0.470489/s     1.736760/c     0.575785/i
010     0.225451/s     1.669842/c     0.598859/i
011     0.154493/s     1.194131/c     0.837429/i
012     0.431097/s     1.354858/c     0.738085/i
013     0.507504/s     1.742507/c     0.573886/i
014     2.094940/s     2.094940/c     0.477341/i
015     0.215139/s     0.907528/c     1.101894/i
016     0.364123/s     1.251673/c     0.798931/i
017     0.360520/s     1.173886/c     0.851872/i
018     0.231032/s     1.454735/c     0.687410/i
019     0.174986/s     1.235650/c     0.809291/i
020     0.181693/s     1.364428/c     0.732908/i
021     0.172682/s     1.231783/c     0.811831/i
022     0.113896/s     0.879999/c     1.136365/i
023     0.111229/s     1.217100/c     0.821625/i
024     0.187730/s     1.366183/c     0.731967/i
025     0.192444/s     1.525635/c     0.655465/i
026     0.407544/s     1.874414/c     0.533500/i
027     0.525290/s     2.284043/c     0.437820/i
028     0.542800/s     1.851640/c     0.540062/i
029     0.237531/s     1.764825/c     0.566628/i
030     0.307411/s     1.624485/c     0.615580/i
031     0.924647/s     0.924647/c     1.081493/i
032     0.102146/s     0.842534/c     1.186895/i
033     0.823147/s     0.823146/c     1.214851/i
034     0.271408/s     1.495621/c     0.668619/i
035     0.197269/s     1.703865/c     0.586901/i
036     0.556279/s     1.660119/c     0.602367/i
037     0.356926/s     0.885227/c     1.129653/i
038     0.302332/s     1.244475/c     0.803552/i
039     0.471297/s     1.690849/c     0.591419/i
040     0.307201/s     1.130677/c     0.884426/i
041     0.272712/s     1.174556/c     0.851386/i
042     0.374068/s     1.640322/c     0.609636/i
043     0.157723/s     1.382155/c     0.723508/i
044     0.157465/s     1.174947/c     0.851102/i
045     0.199416/s     1.129669/c     0.885215/i
046     0.648318/s     0.648318/c     1.542454/i
047     0.142824/s     1.139500/c     0.877578/i

CPU Freq(MHz) VID  Min     Vcore   Max
000 4162.43   181  1.1188  1.1313  1.1500
001 1061.69   181  1.1188  1.1313  1.1500
002  988.31   180  1.1188  1.1250  1.1500
003 1188.09   181  1.1188  1.1313  1.1500
004 1267.98   180  1.1188  1.1250  1.1500
005 1286.57   181  1.1188  1.1313  1.1500
006 1078.33   182  1.1313  1.1375  1.1562
007 1361.68   182  1.1313  1.1375  1.1562
008 1260.71   182  1.1313  1.1375  1.1625
009 1229.99   182  1.1313  1.1375  1.1625
010  990.50   182  1.1313  1.1375  1.1562
011 1059.32   182  1.1313  1.1375  1.1562
012 1616.26   181  1.1188  1.1313  1.1500
013 1325.86   181  1.1188  1.1313  1.1500
014 4162.42   180  1.1188  1.1250  1.1500
015 1676.97   181  1.1188  1.1313  1.1500
016 1577.43   180  1.1188  1.1250  1.1500
017 1650.61   180  1.1188  1.1250  1.1500
018 1011.82   182  1.1313  1.1375  1.1625
019  979.31   182  1.1313  1.1375  1.1625
020 1030.34   182  1.1313  1.1375  1.1625
021 1001.07   182  1.1313  1.1375  1.1625
022 1143.51   182  1.1313  1.1375  1.1625
023 1043.40   182  1.1313  1.1375  1.1625
024 1034.64   180  1.1188  1.1250  1.1500
025  986.54   180  1.1188  1.1250  1.1500
026 1136.09   180  1.1188  1.1250  1.1500
027 1342.80   180  1.1188  1.1250  1.1500
028 1370.17   180  1.1188  1.1250  1.1500
029 1375.28   180  1.1188  1.1250  1.1500
030 1096.73   182  1.1313  1.1375  1.1625
031 4109.00   182  1.1313  1.1375  1.1625
032 1202.32   182  1.1313  1.1375  1.1625
033 4154.58   182  1.1313  1.1375  1.1625
034 1098.64   182  1.1313  1.1375  1.1625
035 1096.52   182  1.1313  1.1375  1.1625
036 1700.27   180  1.1188  1.1250  1.1500
037 1483.17   180  1.1188  1.1250  1.1500
038 1500.85   180  1.1188  1.1250  1.1500
039 1559.35   180  1.1188  1.1250  1.1500
040 1504.55   180  1.1188  1.1250  1.1500
041 1446.35   180  1.1188  1.1250  1.1500
042 1064.70   182  1.1313  1.1375  1.1625
043 1004.79   182  1.1313  1.1375  1.1625
044 1112.90   182  1.1313  1.1375  1.1625
045 1023.77   182  1.1313  1.1375  1.1625
046 4162.39   182  1.1313  1.1375  1.1625
047 1077.47   182  1.1313  1.1375  1.1625

CPU FLAG CF  ZF  SF  TF  IF  DF  OF IOPL NT  RF  VM  AC  VIF VIP ID
#0        1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#1        1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#2        1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#3        1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#4        1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#5        1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#6        1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#7        1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#8        1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#9        1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#10       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#11       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#12       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#13       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#14       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#15       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#16       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#17       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#18       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#19       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#20       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#21       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#22       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#23       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#24       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#25       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#26       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#27       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#28       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#29       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#30       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#31       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#32       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#33       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#34       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#35       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#36       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#37       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#38       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#39       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#40       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#41       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#42       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#43       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#44       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#45       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#46       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
#47       1   1   1   0   1   1   1   0   0   0   0   0   0   0   0
CR0: PE  MP  EM  TS  ET  NE  WP  AM  NW  CD  PG CR3: PWT PCD U57 U48
#0    1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#1    1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#2    1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#3    1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#4    1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#5    1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#6    1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#7    1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#8    1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#9    1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#10   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#11   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#12   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#13   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#14   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#15   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#16   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#17   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#18   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#19   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#20   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#21   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#22   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#23   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#24   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#25   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#26   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#27   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#28   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#29   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#30   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#31   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#32   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#33   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#34   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#35   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#36   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#37   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#38   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#39   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#40   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#41   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#42   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#43   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#44   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#45   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#46   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
#47   1   1   0   0   1   1   1   1   0   0   1       0   0   0   0
CR4: VME PVI TSD DE  PSE PAE MCE PGE PCE FX XMM UMIP 5LP VMX SMX FS
#0    0   0   0   0   1   1   1   1   0   1   1   1   1   0   0   1
#1    0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#2    0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#3    0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#4    0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#5    0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#6    0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#7    0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#8    0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#9    0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#10   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#11   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#12   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#13   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#14   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#15   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#16   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#17   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#18   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#19   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#20   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#21   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#22   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#23   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#24   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#25   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#26   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#27   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#28   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#29   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#30   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#31   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#32   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#33   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#34   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#35   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#36   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#37   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#38   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#39   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#40   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#41   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#42   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#43   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#44   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#45   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#46   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
#47   0   0   0   0   0   1   1   1   0   1   1   1   1   0   0   1
CR4:PCID SAV  KL SME SMA PKE CET PKS U-I LAM FRD            CR8: TPL
#0    1   1   0   1   1   1   0   0   0   0   0                   0
#1    1   1   0   1   1   1   0   0   0   0   0                   0
#2    1   1   0   1   1   1   0   0   0   0   0                   0
#3    1   1   0   1   1   1   0   0   0   0   0                   0
#4    1   1   0   1   1   1   0   0   0   0   0                   0
#5    1   1   0   1   1   1   0   0   0   0   0                   0
#6    1   1   0   1   1   1   0   0   0   0   0                   0
#7    1   1   0   1   1   1   0   0   0   0   0                   0
#8    1   1   0   1   1   1   0   0   0   0   0                   0
#9    1   1   0   1   1   1   0   0   0   0   0                   0
#10   1   1   0   1   1   1   0   0   0   0   0                   0
#11   1   1   0   1   1   1   0   0   0   0   0                   0
#12   1   1   0   1   1   1   0   0   0   0   0                   0
#13   1   1   0   1   1   1   0   0   0   0   0                   0
#14   1   1   0   1   1   1   0   0   0   0   0                   0
#15   1   1   0   1   1   1   0   0   0   0   0                   0
#16   1   1   0   1   1   1   0   0   0   0   0                   0
#17   1   1   0   1   1   1   0   0   0   0   0                   0
#18   1   1   0   1   1   1   0   0   0   0   0                   0
#19   1   1   0   1   1   1   0   0   0   0   0                   0
#20   1   1   0   1   1   1   0   0   0   0   0                   0
#21   1   1   0   1   1   1   0   0   0   0   0                   0
#22   1   1   0   1   1   1   0   0   0   0   0                   0
#23   1   1   0   1   1   1   0   0   0   0   0                   0
#24   1   1   0   1   1   1   0   0   0   0   0                   0
#25   1   1   0   1   1   1   0   0   0   0   0                   0
#26   1   1   0   1   1   1   0   0   0   0   0                   0
#27   1   1   0   1   1   1   0   0   0   0   0                   0
#28   1   1   0   1   1   1   0   0   0   0   0                   0
#29   1   1   0   1   1   1   0   0   0   0   0                   0
#30   1   1   0   1   1   1   0   0   0   0   0                   0
#31   1   1   0   1   1   1   0   0   0   0   0                   0
#32   1   1   0   1   1   1   0   0   0   0   0                   0
#33   1   1   0   1   1   1   0   0   0   0   0                   0
#34   1   1   0   1   1   1   0   0   0   0   0                   0
#35   1   1   0   1   1   1   0   0   0   0   0                   0
#36   1   1   0   1   1   1   0   0   0   0   0                   0
#37   1   1   0   1   1   1   0   0   0   0   0                   0
#38   1   1   0   1   1   1   0   0   0   0   0                   0
#39   1   1   0   1   1   1   0   0   0   0   0                   0
#40   1   1   0   1   1   1   0   0   0   0   0                   0
#41   1   1   0   1   1   1   0   0   0   0   0                   0
#42   1   1   0   1   1   1   0   0   0   0   0                   0
#43   1   1   0   1   1   1   0   0   0   0   0                   0
#44   1   1   0   1   1   1   0   0   0   0   0                   0
#45   1   1   0   1   1   1   0   0   0   0   0                   0
#46   1   1   0   1   1   1   0   0   0   0   0                   0
#47   1   1   0   1   1   1   0   0   0   0   0                   0
EFCR    LCK VMX^SGX [SENTER] [ SGX ] LMC
#0        -   -   -   -   -   -   -   -
#1        -   -   -   -   -   -   -   -
#2        -   -   -   -   -   -   -   -
#3        -   -   -   -   -   -   -   -
#4        -   -   -   -   -   -   -   -
#5        -   -   -   -   -   -   -   -
#6        -   -   -   -   -   -   -   -
#7        -   -   -   -   -   -   -   -
#8        -   -   -   -   -   -   -   -
#9        -   -   -   -   -   -   -   -
#10       -   -   -   -   -   -   -   -
#11       -   -   -   -   -   -   -   -
#12       -   -   -   -   -   -   -   -
#13       -   -   -   -   -   -   -   -
#14       -   -   -   -   -   -   -   -
#15       -   -   -   -   -   -   -   -
#16       -   -   -   -   -   -   -   -
#17       -   -   -   -   -   -   -   -
#18       -   -   -   -   -   -   -   -
#19       -   -   -   -   -   -   -   -
#20       -   -   -   -   -   -   -   -
#21       -   -   -   -   -   -   -   -
#22       -   -   -   -   -   -   -   -
#23       -   -   -   -   -   -   -   -
#24       -   -   -   -   -   -   -   -
#25       -   -   -   -   -   -   -   -
#26       -   -   -   -   -   -   -   -
#27       -   -   -   -   -   -   -   -
#28       -   -   -   -   -   -   -   -
#29       -   -   -   -   -   -   -   -
#30       -   -   -   -   -   -   -   -
#31       -   -   -   -   -   -   -   -
#32       -   -   -   -   -   -   -   -
#33       -   -   -   -   -   -   -   -
#34       -   -   -   -   -   -   -   -
#35       -   -   -   -   -   -   -   -
#36       -   -   -   -   -   -   -   -
#37       -   -   -   -   -   -   -   -
#38       -   -   -   -   -   -   -   -
#39       -   -   -   -   -   -   -   -
#40       -   -   -   -   -   -   -   -
#41       -   -   -   -   -   -   -   -
#42       -   -   -   -   -   -   -   -
#43       -   -   -   -   -   -   -   -
#44       -   -   -   -   -   -   -   -
#45       -   -   -   -   -   -   -   -
#46       -   -   -   -   -   -   -   -
#47       -   -   -   -   -   -   -   -
EFER     SCE LME LMA NX SVM LMS FFX TCE MCM WBI UAI IBRS
#0        1   1   1   1   0   0   0   0   0   0   0   1
#1        1   1   1   1   0   0   0   0   0   0   0   1
#2        1   1   1   1   0   0   0   0   0   0   0   1
#3        1   1   1   1   0   0   0   0   0   0   0   1
#4        1   1   1   1   0   0   0   0   0   0   0   1
#5        1   1   1   1   0   0   0   0   0   0   0   1
#6        1   1   1   1   0   0   0   0   0   0   0   1
#7        1   1   1   1   0   0   0   0   0   0   0   1
#8        1   1   1   1   0   0   0   0   0   0   0   1
#9        1   1   1   1   0   0   0   0   0   0   0   1
#10       1   1   1   1   0   0   0   0   0   0   0   1
#11       1   1   1   1   0   0   0   0   0   0   0   1
#12       1   1   1   1   0   0   0   0   0   0   0   1
#13       1   1   1   1   0   0   0   0   0   0   0   1
#14       1   1   1   1   0   0   0   0   0   0   0   1
#15       1   1   1   1   0   0   0   0   0   0   0   1
#16       1   1   1   1   0   0   0   0   0   0   0   1
#17       1   1   1   1   0   0   0   0   0   0   0   1
#18       1   1   1   1   0   0   0   0   0   0   0   1
#19       1   1   1   1   0   0   0   0   0   0   0   1
#20       1   1   1   1   0   0   0   0   0   0   0   1
#21       1   1   1   1   0   0   0   0   0   0   0   1
#22       1   1   1   1   0   0   0   0   0   0   0   1
#23       1   1   1   1   0   0   0   0   0   0   0   1
#24       1   1   1   1   0   0   0   0   0   0   0   1
#25       1   1   1   1   0   0   0   0   0   0   0   1
#26       1   1   1   1   0   0   0   0   0   0   0   1
#27       1   1   1   1   0   0   0   0   0   0   0   1
#28       1   1   1   1   0   0   0   0   0   0   0   1
#29       1   1   1   1   0   0   0   0   0   0   0   1
#30       1   1   1   1   0   0   0   0   0   0   0   1
#31       1   1   1   1   0   0   0   0   0   0   0   1
#32       1   1   1   1   0   0   0   0   0   0   0   1
#33       1   1   1   1   0   0   0   0   0   0   0   1
#34       1   1   1   1   0   0   0   0   0   0   0   1
#35       1   1   1   1   0   0   0   0   0   0   0   1
#36       1   1   1   1   0   0   0   0   0   0   0   1
#37       1   1   1   1   0   0   0   0   0   0   0   1
#38       1   1   1   1   0   0   0   0   0   0   0   1
#39       1   1   1   1   0   0   0   0   0   0   0   1
#40       1   1   1   1   0   0   0   0   0   0   0   1
#41       1   1   1   1   0   0   0   0   0   0   0   1
#42       1   1   1   1   0   0   0   0   0   0   0   1
#43       1   1   1   1   0   0   0   0   0   0   0   1
#44       1   1   1   1   0   0   0   0   0   0   0   1
#45       1   1   1   1   0   0   0   0   0   0   0   1
#46       1   1   1   1   0   0   0   0   0   0   0   1
#47       1   1   1   1   0   0   0   0   0   0   0   1
XCR0     FPU SSE AVX MPX 512 MPK CEU CES AMX APX LWP
#0        1   1   1   0   7   1   0   0   0   0   0
#1        1   1   1   0   7   1   0   0   0   0   0
#2        1   1   1   0   7   1   0   0   0   0   0
#3        1   1   1   0   7   1   0   0   0   0   0
#4        1   1   1   0   7   1   0   0   0   0   0
#5        1   1   1   0   7   1   0   0   0   0   0
#6        1   1   1   0   7   1   0   0   0   0   0
#7        1   1   1   0   7   1   0   0   0   0   0
#8        1   1   1   0   7   1   0   0   0   0   0
#9        1   1   1   0   7   1   0   0   0   0   0
#10       1   1   1   0   7   1   0   0   0   0   0
#11       1   1   1   0   7   1   0   0   0   0   0
#12       1   1   1   0   7   1   0   0   0   0   0
#13       1   1   1   0   7   1   0   0   0   0   0
#14       1   1   1   0   7   1   0   0   0   0   0
#15       1   1   1   0   7   1   0   0   0   0   0
#16       1   1   1   0   7   1   0   0   0   0   0
#17       1   1   1   0   7   1   0   0   0   0   0
#18       1   1   1   0   7   1   0   0   0   0   0
#19       1   1   1   0   7   1   0   0   0   0   0
#20       1   1   1   0   7   1   0   0   0   0   0
#21       1   1   1   0   7   1   0   0   0   0   0
#22       1   1   1   0   7   1   0   0   0   0   0
#23       1   1   1   0   7   1   0   0   0   0   0
#24       1   1   1   0   7   1   0   0   0   0   0
#25       1   1   1   0   7   1   0   0   0   0   0
#26       1   1   1   0   7   1   0   0   0   0   0
#27       1   1   1   0   7   1   0   0   0   0   0
#28       1   1   1   0   7   1   0   0   0   0   0
#29       1   1   1   0   7   1   0   0   0   0   0
#30       1   1   1   0   7   1   0   0   0   0   0
#31       1   1   1   0   7   1   0   0   0   0   0
#32       1   1   1   0   7   1   0   0   0   0   0
#33       1   1   1   0   7   1   0   0   0   0   0
#34       1   1   1   0   7   1   0   0   0   0   0
#35       1   1   1   0   7   1   0   0   0   0   0
#36       1   1   1   0   7   1   0   0   0   0   0
#37       1   1   1   0   7   1   0   0   0   0   0
#38       1   1   1   0   7   1   0   0   0   0   0
#39       1   1   1   0   7   1   0   0   0   0   0
#40       1   1   1   0   7   1   0   0   0   0   0
#41       1   1   1   0   7   1   0   0   0   0   0
#42       1   1   1   0   7   1   0   0   0   0   0
#43       1   1   1   0   7   1   0   0   0   0   0
#44       1   1   1   0   7   1   0   0   0   0   0
#45       1   1   1   0   7   1   0   0   0   0   0
#46       1   1   1   0   7   1   0   0   0   0   0
#47       1   1   1   0   7   1   0   0   0   0   0
CFG:     MFD MDM MVD TOM FWB MEM SNP PL  HMK
#0        1   0   1   1   1   0   0   0   0
#1        1   0   1   1   1   0   0   0   0
#2        1   0   1   1   1   0   0   0   0
#3        1   0   1   1   1   0   0   0   0
#4        1   0   1   1   1   0   0   0   0
#5        1   0   1   1   1   0   0   0   0
#6        1   0   1   1   1   0   0   0   0
#7        1   0   1   1   1   0   0   0   0
#8        1   0   1   1   1   0   0   0   0
#9        1   0   1   1   1   0   0   0   0
#10       1   0   1   1   1   0   0   0   0
#11       1   0   1   1   1   0   0   0   0
#12       1   0   1   1   1   0   0   0   0
#13       1   0   1   1   1   0   0   0   0
#14       1   0   1   1   1   0   0   0   0
#15       1   0   1   1   1   0   0   0   0
#16       1   0   1   1   1   0   0   0   0
#17       1   0   1   1   1   0   0   0   0
#18       1   0   1   1   1   0   0   0   0
#19       1   0   1   1   1   0   0   0   0
#20       1   0   1   1   1   0   0   0   0
#21       1   0   1   1   1   0   0   0   0
#22       1   0   1   1   1   0   0   0   0
#23       1   0   1   1   1   0   0   0   0
#24       1   0   1   1   1   0   0   0   0
#25       1   0   1   1   1   0   0   0   0
#26       1   0   1   1   1   0   0   0   0
#27       1   0   1   1   1   0   0   0   0
#28       1   0   1   1   1   0   0   0   0
#29       1   0   1   1   1   0   0   0   0
#30       1   0   1   1   1   0   0   0   0
#31       1   0   1   1   1   0   0   0   0
#32       1   0   1   1   1   0   0   0   0
#33       1   0   1   1   1   0   0   0   0
#34       1   0   1   1   1   0   0   0   0
#35       1   0   1   1   1   0   0   0   0
#36       1   0   1   1   1   0   0   0   0
#37       1   0   1   1   1   0   0   0   0
#38       1   0   1   1   1   0   0   0   0
#39       1   0   1   1   1   0   0   0   0
#40       1   0   1   1   1   0   0   0   0
#41       1   0   1   1   1   0   0   0   0
#42       1   0   1   1   1   0   0   0   0
#43       1   0   1   1   1   0   0   0   0
#44       1   0   1   1   1   0   0   0   0
#45       1   0   1   1   1   0   0   0   0
#46       1   0   1   1   1   0   0   0   0
#47       1   0   1   1   1   0   0   0   0
HWCR SMM SLW TLB WBI FF FERR IG  MW U-MW HLT SMI RSM SSE WRP MC  IO
#0    1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#1    1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#2    1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#3    1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#4    1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#5    1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#6    1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#7    1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#8    1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#9    1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#10   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#11   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#12   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#13   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#14   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#15   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#16   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#17   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#18   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#19   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#20   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#21   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#22   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#23   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#24   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#25   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#26   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#27   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#28   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#29   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#30   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#31   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#32   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#33   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#34   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#35   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#36   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#37   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#38   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#39   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#40   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#41   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#42   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#43   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#44   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#45   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#46   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
#47   1   0   0   1   0   0   0   0   0   0   1   1   0   0   0   0
HWCR P0  PRB INC CPB HCF ROC SMU CSE IR SMMB TPR PG U-ID
#0    0   0   1   0   0   1   0   0   1   1   1   0   0
#1    0   0   1   0   0   1   0   0   1   1   1   0   0
#2    0   0   1   0   0   1   0   0   1   1   1   0   0
#3    0   0   1   0   0   1   0   0   1   1   1   0   0
#4    0   0   1   0   0   1   0   0   1   1   1   0   0
#5    0   0   1   0   0   1   0   0   1   1   1   0   0
#6    0   0   1   0   0   1   0   0   1   1   1   0   0
#7    0   0   1   0   0   1   0   0   1   1   1   0   0
#8    0   0   1   0   0   1   0   0   1   1   1   0   0
#9    0   0   1   0   0   1   0   0   1   1   1   0   0
#10   0   0   1   0   0   1   0   0   1   1   1   0   0
#11   0   0   1   0   0   1   0   0   1   1   1   0   0
#12   0   0   1   0   0   1   0   0   1   1   1   0   0
#13   0   0   1   0   0   1   0   0   1   1   1   0   0
#14   0   0   1   0   0   1   0   0   1   1   1   0   0
#15   0   0   1   0   0   1   0   0   1   1   1   0   0
#16   0   0   1   0   0   1   0   0   1   1   1   0   0
#17   0   0   1   0   0   1   0   0   1   1   1   0   0
#18   0   0   1   0   0   1   0   0   1   1   1   0   0
#19   0   0   1   0   0   1   0   0   1   1   1   0   0
#20   0   0   1   0   0   1   0   0   1   1   1   0   0
#21   0   0   1   0   0   1   0   0   1   1   1   0   0
#22   0   0   1   0   0   1   0   0   1   1   1   0   0
#23   0   0   1   0   0   1   0   0   1   1   1   0   0
#24   0   0   1   0   0   1   0   0   1   1   1   0   0
#25   0   0   1   0   0   1   0   0   1   1   1   0   0
#26   0   0   1   0   0   1   0   0   1   1   1   0   0
#27   0   0   1   0   0   1   0   0   1   1   1   0   0
#28   0   0   1   0   0   1   0   0   1   1   1   0   0
#29   0   0   1   0   0   1   0   0   1   1   1   0   0
#30   0   0   1   0   0   1   0   0   1   1   1   0   0
#31   0   0   1   0   0   1   0   0   1   1   1   0   0
#32   0   0   1   0   0   1   0   0   1   1   1   0   0
#33   0   0   1   0   0   1   0   0   1   1   1   0   0
#34   0   0   1   0   0   1   0   0   1   1   1   0   0
#35   0   0   1   0   0   1   0   0   1   1   1   0   0
#36   0   0   1   0   0   1   0   0   1   1   1   0   0
#37   0   0   1   0   0   1   0   0   1   1   1   0   0
#38   0   0   1   0   0   1   0   0   1   1   1   0   0
#39   0   0   1   0   0   1   0   0   1   1   1   0   0
#40   0   0   1   0   0   1   0   0   1   1   1   0   0
#41   0   0   1   0   0   1   0   0   1   1   1   0   0
#42   0   0   1   0   0   1   0   0   1   1   1   0   0
#43   0   0   1   0   0   1   0   0   1   1   1   0   0
#44   0   0   1   0   0   1   0   0   1   1   1   0   0
#45   0   0   1   0   0   1   0   0   1   1   1   0   0
#46   0   0   1   0   0   1   0   0   1   1   1   0   0
#47   0   0   1   0   0   1   0   0   1   1   1   0   0

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cyring commented Mar 18, 2024 

CPU Freq(MHz) VID  Vcore  TMP(C)    Accumulator       Energy(J)     Power(W)
000 4159.38   184  1.1500   43  000000000000252986    3.860260010   3.860260010
001 1371.84   184  1.1500   43  000000000000158831    2.423568726   2.423568726
002 1302.43   184  1.1500   43  000000000000160514    2.449249268   2.449249268
003 1352.02   184  1.1500   35  000000000000157950    2.410125732   2.410125732
004 1094.31   184  1.1500   35  000000000000148768    2.270019531   2.270019531
005 1012.31   184  1.1500   35  000000000000148466    2.265411377   2.265411377
006 1228.04   185  1.1562   40  000000000000151674    2.314361572   2.314361572
007 1330.04   185  1.1562   40  000000000000158830    2.423553467   2.423553467
008 4159.38   185  1.1562   40  000000000000214311    3.270126343   3.270126343
009 1018.03   185  1.1562   40  000000000000148107    2.259933472   2.259933472
010 4039.60   185  1.1562   40  000000000000232981    3.555007935   3.555007935
011 1187.72   185  1.1562   40  000000000000224193    3.420913696   3.420913696
012 1702.28   184  1.1500   40  000000000000198067    3.022262573   3.022262573
013 1474.48   184  1.1500   40  000000000000186885    2.851638794   2.851638794
014 1551.32   184  1.1500   40  000000000000171789    2.621292114   2.621292114
015 1456.89   184  1.1500   40  000000000000203325    3.102493286   3.102493286
016 1613.04   184  1.1500   40  000000000000198737    3.032485962   3.032485962
017 1548.25   184  1.1500   40  000000000000198828    3.033874512   3.033874512
018 1356.85   185  1.1562   43  000000000000172008    2.624633789   2.624633789
019 1339.20   185  1.1562   42  000000000000168542    2.571746826   2.571746826
020 1210.02   185  1.1562   42  000000000000161760    2.468261719   2.468261719
021 1181.02   185  1.1562   35  000000000000162737    2.483169556   2.483169556
022  998.53   185  1.1562   35  000000000000145875    2.225875854   2.225875854
023 1073.87   185  1.1562   35  000000000000151475    2.311325073   2.311325073
024 1047.18   184  1.1500   43  000000000000000000    0.000000000   0.000000000
025 1073.72   184  1.1500   42  000000000000000000    0.000000000   0.000000000
026 1192.16   184  1.1500   43  000000000000000000    0.000000000   0.000000000
027 1188.41   184  1.1500   35  000000000000000000    0.000000000   0.000000000
028 1170.94   184  1.1500   35  000000000000000000    0.000000000   0.000000000
029 1150.00   184  1.1500   35  000000000000000000    0.000000000   0.000000000
030 1126.98   185  1.1562   41  000000000000000000    0.000000000   0.000000000
031 1257.28   185  1.1562   40  000000000000000000    0.000000000   0.000000000
032 1071.24   185  1.1562   40  000000000000000000    0.000000000   0.000000000
033 1222.84   185  1.1562   40  000000000000000000    0.000000000   0.000000000
034 1250.47   185  1.1562   40  000000000000000000    0.000000000   0.000000000
035 2972.37   185  1.1562   40  000000000000000000    0.000000000   0.000000000
036 1534.49   184  1.1500   40  000000000000000000    0.000000000   0.000000000
037 1657.07   184  1.1500   40  000000000000000000    0.000000000   0.000000000
038 1203.28   183  1.1438   41  000000000000000000    0.000000000   0.000000000
039 1762.15   184  1.1500   40  000000000000000000    0.000000000   0.000000000
040 1507.91   184  1.1500   40  000000000000000000    0.000000000   0.000000000
041 1589.42   184  1.1500   40  000000000000000000    0.000000000   0.000000000
042 1338.86   185  1.1562   43  000000000000000000    0.000000000   0.000000000
043 1182.49   185  1.1562   43  000000000000000000    0.000000000   0.000000000
044 1150.73   185  1.1562   43  000000000000000000    0.000000000   0.000000000
045 1158.26   185  1.1562   35  000000000000000000    0.000000000   0.000000000
046 1095.99   185  1.1562   35  000000000000000000    0.000000000   0.000000000
047 1069.95   185  1.1562   35  000000000000000000    0.000000000   0.000000000

             Package[0]    Cores         Uncore        Memory        Platform
Energy(J): 159.120910645  63.405090332  29.650711060   0.000000000   0.000000000
Power(W) : 159.120910645  63.405090332  29.650711060   0.000000000   0.000000000


CPU Freq(MHz) Ratio  Turbo  C0(%)  C1(%)  C3(%)  C6(%)  C7(%)  Min TMP:TS  Max
000 4159.38 (41.14) 102.85 100.00   0.00   0.00   0.00   0.00  43 / 43:736/ 51
001 1371.84 (13.57)  33.92  32.97  67.03   0.00   0.00   0.00  43 / 43:736/ 52
002 1302.43 (12.88)  32.21  31.32  68.68   0.00   0.00   0.00  43 / 43:736/ 51
003 1352.02 (13.37)  33.43  32.50  67.50   0.00   0.00   0.00  35 / 35:679/ 48
004 1094.31 (10.82)  27.06  26.30  73.70   0.00   0.00   0.00  35 / 35:679/ 48
005 1012.31 (10.01)  25.03  24.33  75.67   0.00   0.00   0.00  35 / 35:679/ 48
006 1228.04 (12.15)  30.37  29.53  70.47   0.00   0.00   0.00  36 / 40:719/ 51
007 1330.04 (13.16)  32.89  31.97  68.03   0.00   0.00   0.00  36 / 40:719/ 51
008 4159.38 (41.14) 102.85 100.00   0.00   0.00   0.00   0.00  36 / 40:719/ 51
009 1018.03 (10.07)  25.17  24.48  75.52   0.00   0.00   0.00  36 / 40:713/ 47
010 4039.60 (39.96)  99.89  97.12   2.88   0.00   0.00   0.00  36 / 40:713/ 47
011 1187.72 (11.75)  29.37  28.55  71.45   0.00   0.00   0.00  36 / 40:713/ 47
012 1702.28 (16.84)  42.09  40.93  59.07   0.00   0.00   0.00  36 / 40:719/ 51
013 1474.48 (14.58)  36.46  35.44  64.56   0.00   0.00   0.00  36 / 40:719/ 51
014 1551.32 (15.34)  38.36  37.30  62.70   0.00   0.00   0.00  36 / 40:719/ 51
015 1456.89 (14.41)  36.03  35.03  64.97   0.00   0.00   0.00  36 / 40:713/ 47
016 1613.04 (15.96)  39.89  38.78  61.22   0.00   0.00   0.00  36 / 40:713/ 47
017 1548.25 (15.31)  38.29  37.23  62.77   0.00   0.00   0.00  36 / 40:713/ 47
018 1356.85 (13.42)  33.55  32.63  67.37   0.00   0.00   0.00  43 / 43:736/ 51
019 1339.20 (13.25)  33.12  32.20  67.80   0.00   0.00   0.00  42 / 42:732/ 52
020 1210.02 (11.97)  29.92  29.08  70.92   0.00   0.00   0.00  42 / 42:732/ 52
021 1181.02 (11.68)  29.20  28.39  71.61   0.00   0.00   0.00  35 / 35:679/ 48
022  998.53 ( 9.88)  24.69  24.00  76.00   0.00   0.00   0.00  35 / 35:679/ 48
023 1073.87 (10.62)  26.55  25.81  74.19   0.00   0.00   0.00  35 / 35:679/ 48
024 1047.18 (10.36)  25.89  25.17  74.83   0.00   0.00   0.00  42 / 43:736/ 52
025 1073.72 (10.62)  26.55  25.81  74.19   0.00   0.00   0.00  42 / 42:732/ 52
026 1192.16 (11.79)  29.48  28.67  71.33   0.00   0.00   0.00  43 / 43:736/ 51
027 1188.41 (11.75)  29.39  28.56  71.44   0.00   0.00   0.00  35 / 35:679/ 48
028 1170.94 (11.58)  28.96  28.15  71.85   0.00   0.00   0.00  35 / 35:679/ 48
029 1150.00 (11.37)  28.44  27.64  72.36   0.00   0.00   0.00  35 / 35:679/ 48
030 1126.98 (11.15)  27.87  27.09  72.91   0.00   0.00   0.00  36 / 41:722/ 51
031 1257.28 (12.44)  31.09  30.23  69.77   0.00   0.00   0.00  36 / 40:719/ 51
032 1071.24 (10.60)  26.49  25.76  74.24   0.00   0.00   0.00  36 / 40:719/ 51
033 1222.84 (12.10)  30.24  29.40  70.60   0.00   0.00   0.00  36 / 40:713/ 47
034 1250.47 (12.37)  30.92  30.06  69.94   0.00   0.00   0.00  36 / 40:713/ 47
035 2972.37 (29.40)  73.50  71.44  28.56   0.00   0.00   0.00  36 / 40:713/ 47
036 1534.49 (15.18)  37.95  36.88  63.12   0.00   0.00   0.00  36 / 40:719/ 51
037 1657.07 (16.39)  40.98  39.82  60.18   0.00   0.00   0.00  36 / 40:719/ 51
038 1303.54 (12.89)  32.23  31.34  68.66   0.00   0.00   0.00  36 / 40:719/ 51
039 1762.15 (17.43)  43.57  42.36  57.64   0.00   0.00   0.00  36 / 40:713/ 47
040 1507.91 (14.92)  37.29  36.25  63.75   0.00   0.00   0.00  36 / 40:713/ 47
041 1589.42 (15.72)  39.30  38.22  61.78   0.00   0.00   0.00  36 / 40:713/ 47
042 1338.86 (13.24)  33.11  32.17  67.83   0.00   0.00   0.00  42 / 43:736/ 52
043 1182.49 (11.70)  29.24  28.42  71.58   0.00   0.00   0.00  43 / 43:736/ 51
044 1150.73 (11.38)  28.46  27.66  72.34   0.00   0.00   0.00  42 / 43:736/ 52
045 1158.26 (11.46)  28.64  27.85  72.15   0.00   0.00   0.00  35 / 35:679/ 48
046 1095.99 (10.84)  27.10  26.35  73.65   0.00   0.00   0.00  35 / 35:679/ 48
047 1069.95 (10.58)  26.46  25.72  74.28   0.00   0.00   0.00  35 / 35:679/ 48

    Averages:        Turbo  C0(%)  C1(%)  C3(%)  C6(%)  C7(%)    TjMax:    Pkg:
                     37.01  35.98  64.02   0.00   0.00   0.00       0 C    45 C

@cyring
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cyring commented Apr 5, 2024 

CPU Freq(MHz)    Accumulator      Min  Energy(J) Max    Min  Power(W)  Max
000 4158.46  000000000000287548    3.96   4.39   4.58    3.96   4.39   4.58
001  815.78  000000000000140811    0.99   2.15   3.20    0.99   2.15   3.20
002 1242.39  000000000000168693    0.99   2.57   3.03    0.99   2.57   3.03
003  822.40  000000000000134472    1.45   2.05   3.48    1.45   2.05   3.48
004  867.54  000000000000128800    1.06   1.97   3.56    1.06   1.97   3.56
005 4158.45  000000000000213139    1.61   3.25   3.49    1.61   3.25   3.49
006 1218.80  000000000000175362    1.39   2.68   3.88    1.39   2.68   3.88
007 1174.40  000000000000183114    1.41   2.79   3.61    1.41   2.79   3.61
008 1059.32  000000000000163275    1.34   2.49   3.43    1.34   2.49   3.43
009 1020.70  000000000000156604    1.77   2.39   4.36    1.77   2.39   4.36
010 1076.38  000000000000163866    1.43   2.50   3.77    1.43   2.50   3.77
011 1161.18  000000000000166150    1.35   2.54   3.44    1.35   2.54   3.44
012 1554.54  000000000000208391    1.59   3.18   3.88    1.59   3.18   3.88
013 1557.12  000000000000193716    1.50   2.96   3.97    1.50   2.96   3.97
014 1593.36  000000000000219877    1.92   3.36   4.09    1.92   3.36   4.09
015 2129.36  000000000000213482    2.09   3.26   3.95    2.09   3.26   3.95
016 1363.04  000000000000194069    2.33   2.96   3.79    2.33   2.96   3.79
017 2811.99  000000000000261894    2.65   4.00   4.36    2.65   4.00   4.36
018 1393.42  000000000000195983    1.56   2.99   3.38    1.56   2.99   3.38
019 1330.79  000000000000188547    2.06   2.88   3.46    2.06   2.88   3.46
020 1442.29  000000000000199629    1.42   3.05   3.31    1.42   3.05   3.31
021 1127.02  000000000000171821    1.02   2.62   4.11    1.02   2.62   4.11
022 1405.24  000000000000200195    0.55   3.05   3.93    0.55   3.05   3.93
023 2114.84  000000000000269604    2.28   4.11   5.29    2.28   4.11   5.29
024  987.82  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
025  881.87  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
026  998.60  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
027  923.60  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
028  898.90  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
029 1102.39  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
030 1150.28  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
031 1320.70  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
032 1094.68  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
033 1050.02  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
034 1147.96  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
035 1094.74  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
036 1929.81  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
037 1689.75  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
038 1725.64  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
039 1429.20  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
040 1668.44  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
041 2993.88  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
042 1368.23  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
043 1432.18  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
044 1646.60  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
045 1360.20  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
046 1654.89  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
047 3433.35  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00

Energy(J)  Package[0]         Cores               Uncore              Memory
137.49 166.2 178.57  12.81  70.2  83.26   0.46  29.7  88.04   0.00   0.0   0.00
Power(W)
137.49 166.2 178.57  12.81  70.2  83.26   0.46  29.7  88.04   0.00   0.0   0.00

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