cyring/gist:5b2b3b8596187e0736746509563763a0

Created October 22, 2021 17:13

Star () You must be signed in to star a gist
Fork () You must be signed in to fork a gist

Learn more about clone URLs
Clone this repository at <script src="https://gist.github.com/cyring/5b2b3b8596187e0736746509563763a0.js"></script>
Save cyring/5b2b3b8596187e0736746509563763a0 to your computer and use it in GitHub Desktop.

Download ZIP

AMD EPYC 7502P 32-Core Processor

Raw

gistfile1.txt

Courtesy to fleers

Author

cyring commented Oct 22, 2021 •

edited

Loading

Processor

Topology & Features

# ./corefreq-cli -n -m -n -s

CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive
 #   ID   ID CCD CCX ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way
000:BSP    0   0  0   0  0      32  8        32  8       512  8 i  131072 16w
001:  0    2   0  0   1  0      32  8        32  8       512  8 i  131072 16w
002:  0    4   0  0   2  0      32  8        32  8       512  8 i  131072 16w
003:  0    6   0  0   3  0      32  8        32  8       512  8 i  131072 16w
004:  0    8   0  1   4  0      32  8        32  8       512  8 i  131072 16w
005:  0   10   0  1   5  0      32  8        32  8       512  8 i  131072 16w
006:  0   12   0  1   6  0      32  8        32  8       512  8 i  131072 16w
007:  0   14   0  1   7  0      32  8        32  8       512  8 i  131072 16w
008:  0   16   2  2   8  0      32  8        32  8       512  8 i  131072 16w
009:  0   18   2  2   9  0      32  8        32  8       512  8 i  131072 16w
010:  0   20   2  2  10  0      32  8        32  8       512  8 i  131072 16w
011:  0   22   2  2  11  0      32  8        32  8       512  8 i  131072 16w
012:  0   24   2  3  12  0      32  8        32  8       512  8 i  131072 16w
013:  0   26   2  3  13  0      32  8        32  8       512  8 i  131072 16w
014:  0   28   2  3  14  0      32  8        32  8       512  8 i  131072 16w
015:  0   30   2  3  15  0      32  8        32  8       512  8 i  131072 16w
016:  0   32   4  4  16  0      32  8        32  8       512  8 i  131072 16w
017:  0   34   4  4  17  0      32  8        32  8       512  8 i  131072 16w
018:  0   36   4  4  18  0      32  8        32  8       512  8 i  131072 16w
019:  0   38   4  4  19  0      32  8        32  8       512  8 i  131072 16w
020:  0   40   4  5  20  0      32  8        32  8       512  8 i  131072 16w
021:  0   42   4  5  21  0      32  8        32  8       512  8 i  131072 16w
022:  0   44   4  5  22  0      32  8        32  8       512  8 i  131072 16w
023:  0   46   4  5  23  0      32  8        32  8       512  8 i  131072 16w
024:  0   48   6  6  24  0      32  8        32  8       512  8 i  131072 16w
025:  0   50   6  6  25  0      32  8        32  8       512  8 i  131072 16w
026:  0   52   6  6  26  0      32  8        32  8       512  8 i  131072 16w
027:  0   54   6  6  27  0      32  8        32  8       512  8 i  131072 16w
028:  0   56   6  7  28  0      32  8        32  8       512  8 i  131072 16w
029:  0   58   6  7  29  0      32  8        32  8       512  8 i  131072 16w
030:  0   60   6  7  30  0      32  8        32  8       512  8 i  131072 16w
031:  0   62   6  7  31  0      32  8        32  8       512  8 i  131072 16w
032:  0    1   0  0   0  1      32  8        32  8       512  8 i  131072 16w
033:  0    3   0  0   1  1      32  8        32  8       512  8 i  131072 16w
034:  0    5   0  0   2  1      32  8        32  8       512  8 i  131072 16w
035:  0    7   0  0   3  1      32  8        32  8       512  8 i  131072 16w
036:  0    9   0  1   4  1      32  8        32  8       512  8 i  131072 16w
037:  0   11   0  1   5  1      32  8        32  8       512  8 i  131072 16w
038:  0   13   0  1   6  1      32  8        32  8       512  8 i  131072 16w
039:  0   15   0  1   7  1      32  8        32  8       512  8 i  131072 16w
040:  0   17   2  2   8  1      32  8        32  8       512  8 i  131072 16w
041:  0   19   2  2   9  1      32  8        32  8       512  8 i  131072 16w
042:  0   21   2  2  10  1      32  8        32  8       512  8 i  131072 16w
043:  0   23   2  2  11  1      32  8        32  8       512  8 i  131072 16w
044:  0   25   2  3  12  1      32  8        32  8       512  8 i  131072 16w
045:  0   27   2  3  13  1      32  8        32  8       512  8 i  131072 16w
046:  0   29   2  3  14  1      32  8        32  8       512  8 i  131072 16w
047:  0   31   2  3  15  1      32  8        32  8       512  8 i  131072 16w
048:  0   33   4  4  16  1      32  8        32  8       512  8 i  131072 16w
049:  0   35   4  4  17  1      32  8        32  8       512  8 i  131072 16w
050:  0   37   4  4  18  1      32  8        32  8       512  8 i  131072 16w
051:  0   39   4  4  19  1      32  8        32  8       512  8 i  131072 16w
052:  0   41   4  5  20  1      32  8        32  8       512  8 i  131072 16w
053:  0   43   4  5  21  1      32  8        32  8       512  8 i  131072 16w
054:  0   45   4  5  22  1      32  8        32  8       512  8 i  131072 16w
055:  0   47   4  5  23  1      32  8        32  8       512  8 i  131072 16w
056:  0   49   6  6  24  1      32  8        32  8       512  8 i  131072 16w
057:  0   51   6  6  25  1      32  8        32  8       512  8 i  131072 16w
058:  0   53   6  6  26  1      32  8        32  8       512  8 i  131072 16w
059:  0   55   6  6  27  1      32  8        32  8       512  8 i  131072 16w
060:  0   57   6  7  28  1      32  8        32  8       512  8 i  131072 16w
061:  0   59   6  7  29  1      32  8        32  8       512  8 i  131072 16w
062:  0   61   6  7  30  1      32  8        32  8       512  8 i  131072 16w
063:  0   63   6  7  31  1      32  8        32  8       512  8 i  131072 16w

Processor                                     [AMD EPYC 7502P 32-Core Processor]
|- Architecture                                                 [Zen2/EPYC/Rome]
|- Vendor ID                                                      [AuthenticAMD]
|- Firmware                                                        [36.106.0-2]
|- Microcode                                                        [0x0830104d]
|- Signature                                                           [  8F_31]
|- Stepping                                                            [      0]
|- Online CPU                                                          [ 64/ 64]
|- Base Clock                                                          [ 99.798]
|- Frequency            (MHz)                      Ratio
                 Min   1496.98                    <  15 >
                 Max   2494.96                    <  25 >
|- Factory                                                             [100.000]
                       2500                       [  25 ]
|- Performance
   |- P-State
                 TGT   2494.96                    <  25 >
|- Turbo Boost                                                         [   LOCK]
                 XFR   3393.14                    [  34 ]
                 CPB   3293.35                    [  33 ]
                  1C   2195.56                    <  22 >
                  2C   1496.98                    <  15 >
|- Uncore                                                              [   LOCK]
                 Min   1596.77                    [  16 ]
                 Max   1596.77                    [  16 ]
|- TDP                                                           Level [  0:0  ]
   |- Programmable                                                     [ UNLOCK]

Instruction Set Extensions
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y]
|- AVX512-F     [N]    AVX512-DQ [N]  AVX512-IFMA [N]   AVX512-PF [N]
|- AVX512-ER    [N]    AVX512-CD [N]    AVX512-BW [N]   AVX512-VL [N]
|- AVX512-VBMI  [N] AVX512-VBMI2 [N]  AVX512-VNMI [N]  AVX512-ALG [N]
|- AVX512-VPOP  [N] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N]
|- AVX512-BF16  [N]  BMI1/BMI2 [Y/Y]         CLWB [Y] CLFLUSH/O [Y/Y]
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y]
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y]
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y]
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y]
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y]
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y]
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [N]        UMIP [N]

Features
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Missing]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast-String Operation                                Fast-Strings   [Missing]
|- Fused Multiply Add                                     FMA | FMA4   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Capable]
|- Memory Protection Extensions                                  MPX   [Missing]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Capable]
|- Resource Director Technology/PQM                            RDT-M   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Missing]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
Mitigation mechanisms
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Single Thread Indirect Branch Predictor                     STIBP   [Capable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
|- Architectural - Predictive Store Forwarding                  PSFD   [Missing]

Technologies
|- Data Cache Unit
   |- L1 Prefetcher                                                L1 HW   <OFF>
   |- L2 Prefetcher                                                L2 HW   <OFF>
|- System Management Mode                                       SMM-Lock   [ ON]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [OFF]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   < ON>
|- Virtualization                                                    SVM   [ ON]
   |- I/O MMU                                                      AMD-V   [ ON]
   |- Version                                                     [         0.1]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]

Performance Monitoring
|- Version                                                        PM       [N/A]
|- Counters:          General                   Fixed
|                     6 x 64 bits             3 x 64 bits
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       <OFF>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       <OFF>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Hardware-Controlled Performance States                        HWP       [ ON]
|- Core C-States
   |- C-States Base Address                                      BAR   [ 0x813 ]
|- MONITOR/MWAIT
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7
   |- Sub C-State:     1     1     0     0     0     0     0     0
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- Performance Time Stamp Counter                                      [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]

Power, Current & Thermal
|- Junction Temperature                                        TjMax   [49: 12C]
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [Capable]
|- Thermal Monitor 2                                             HTC   [Capable]
|- Thermal Design Power                                          TDP   [  480 W]
   |- Minimum Power                                              Min   [  104 W]
   |- Maximum Power                                              Max   [  410 W]
|- Thermal Design Power                                      Package   < Enable>
   |- Power Limit (0 sec)                                        PL1   <  180 W>
   |- Power Limit (0 sec)                                        PL2   <  200 W>
|- Thermal Design Power                                         Core   <Disable>
   |- Power Limit                                                PL1   [Missing]
|- Thermal Design Power                                       Uncore   <Disable>
   |- Power Limit                                                PL1   [Missing]
|- Thermal Design Power                                         DRAM   <Disable>
   |- Power Limit                                                PL1   [Missing]
|- Thermal Design Power                                     Platform   <Disable>
   |- Power Limit                                                PL1   [Missing]
   |- Power Limit                                                PL2   [Missing]
|- Package Power Tracking                                        PPT   [    4 W]
|- Electrical Design Current                                     EDC   [  456 A]
|- Thermal Design Current                                        TDC   <  368 A>
|- Units
   |- Power                                               watt   [  0.125000000]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]

Technologies

Enabling L1 L2 Prefetchers

Sensors

Temperature

Voltage

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment