cyring/gist:88a3e7863850836f5dc68f1718aeeff1

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Ryzen 3 5300U

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gistfile1.txt

AMD Ryzen 3 5300U with Radeon Graphics

Author

cyring commented Aug 16, 2021 •

edited

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Processor

Single Core

All Cores

Idle frequencies

IPC

TSC

Vcore, Power & Thermal

System Information

Processor                               [AMD Ryzen 3 5300U with Radeon Graphics]
|- Architecture                                                  [Zen2/Lucienne]
|- Vendor ID                                                      [AuthenticAMD]
|- Microcode                                                        [0x08608103]
|- Signature                                                           [  8F_68]
|- Stepping                                                            [      1]
|- Online CPU                                                          [  8/  8]
|- Base Clock                                                          [ 99.812]
|- Frequency            (MHz)                      Ratio                        
                 Min   1397.37                    <  14 >                       
                 Max   2595.12                    <  26 >                       
|- Factory                                                             [100.000]
                       2600                       [  26 ]                       
|- Performance                                                                  
   |- P-State                                                                   
                 TGT   2595.12                    <  26 >                       
   |- CPPC                                                                      
                 Min   3593.24                    <  36 >                       
                 Max   3792.87                    <  38 >                       
                 TGT      AUTO                    <   0 >                       
|- Turbo Boost                                                         [   LOCK]
                 XFR   3892.68                    [  39 ]                       
                 CPB   3792.87                    [  38 ]                       
                  1C   1696.81                    <  17 >                       
                  2C   1397.37                    <  14 >                       
|- Uncore                                                              [   LOCK]
                 CLK   1597.00                    [  16 ]                       
                 MEM   4790.99                    [  48 ]                       
|- TDP                                                           Level [  0:0  ]
   |- Programmable                                                     [   LOCK]
                                                                                
Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [N]    AVX512-DQ [N]  AVX512-IFMA [N]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [N]    AVX512-BW [N]   AVX512-VL [N] 
|- AVX512-VBMI  [N] AVX512-VBMI2 [N]  AVX512-VNNI [N]  AVX512-ALG [N] 
|- AVX512-VPOP  [N] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [N] AVX-VNNI-VEX [N]    AVX-FP128 [N]   AVX-FP256 [Y] 
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y] 
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y] 
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y] 
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [N]        UMIP [N] 
                                                                                
Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Capable]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast Short REP MOVSB                                         FSRM   [Missing]
|- Fast-String Operation                                        ERMS   [Missing]
|- Fused Multiply Add                                     FMA | FMA4   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Hardware P-state control                                      HwP   [Capable]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Instruction INVPCID                                       INVPCID   [Missing]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Capable]
|- Memory Protection Extensions                                  MPX   [Missing]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Capable]
|- Resource Director Technology/PQM                            RDT-M   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Missing]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
   |- IBRS Always-On preferred by processor                            [Missing]
   |- IBRS preferred over software solution                            [Capable]
   |- IBRS provides same speculation limits                            [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Single Thread Indirect Branch Predictor                     STIBP   [Capable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
   |- SSBD use VIRT SPEC_CTRL register                                 [Missing]
   |- SSBD not needed on this processor                                [Missing]
|- Architectural - Predictive Store Forwarding                  PSFD   [Missing]
Security Features                                                               
|- Secure Init and Jump with Attestation                      SKINIT   [Capable]
|- Secure Encrypted Virtualization                               SEV   [Capable]
|- SEV - Encrypted State                                      SEV-ES   [Capable]
|- SEV - Secure Nested Paging                                SEV-SNP   [Missing]
|- Guest Mode Execute Trap                                      GMET   [Capable]
                                                                                
Technologies                                                                    
|- Instruction Cache Unit                                                       
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
   |- L2 Prefetcher                                                L2 HW   < ON>
|- System Management Mode                                       SMM-Lock   [ ON]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [OFF]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   < ON>
|- Virtualization                                                    SVM   [ ON]
   |- I/O MMU                                                      AMD-V   [ ON]
   |- Version                                                     [         0.1]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]
                                                                                
Performance Monitoring                                                          
|- Version                                                        PM       [N/A]
|- Counters:          General                   Fixed                           
|           {  6,  6,  4 } x 48 bits            3 x 64 bits                     
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       <OFF>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       < ON>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Collaborative Processor Performance Control                  CPPC       <FMW>
   |- Capabilities      (MHz)                      Ratio                        
              Lowest    399.25                    [   4 ]                       
           Efficient   1097.93                    [  11 ]                       
          Guaranteed   2495.30                    [  25 ]                       
             Highest   3792.86                    [  38 ]                       
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x413 ]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     1     1     0     0     0     0     0     0              
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- Global Time Stamp Counter                                           [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]
                                                                                
Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [ 49: 41 C]
|- CPPC Energy Preference                                       CPPC   <      0>
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [ Enable]
|- Thermal Monitor 2                                             HTC   [ Enable]
|- Thermal Design Power                                          TDP   [  306 W]
   |- Minimum Power                                              Min   [  129 W]
   |- Maximum Power                                              Max   [  225 W]
|- Thermal Design Power                                      Package   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Thermal Design Power                                         Core   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                       Uncore   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                         DRAM   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                     Platform   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Package Power Tracking                                        PPT   [   66 W]
|- Electrical Design Current                                     EDC   [   76 A]
|- Thermal Design Current                                        TDC   [   36 A]
|- Core Thermal Point                                                           
|- Package Thermal Point                                                        
   |- Thermal Monitor Trip                                     Limit   [  125 C]
   |- HTC Temperature Limit                                    Limit   [  127 C]
   |- HTC Temperature Hysteresis                           Threshold   [    2 C]
|- Units                                                                        
   |- Power                                               watt   [  0.125000000]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]

Author

cyring commented Aug 1, 2022 •

edited

Loading

Version `1.91.5`

UMC

make ARCH_PMC=UMC DELAY_TSC=1

SMBIOS

[ 0] LENOVO                                                                     
[ 1] GLCN46WW                                                                   
[ 2] 04/29/2022                                                                 
[ 3] LENOVO                                                                     
[ 4] 82KU                                                                       
[ 5] IdeaPad 3 15ALC6                                                           
[ 6] P---S---                                                                   
[ 7] LENOVO_MT_82KU_BU_idea_FM_IdeaPad 3 15ALC6                                 
[ 8] IdeaPad 3 15ALC6                                                           
[ 9] LENOVO                                                                     
[10] LNVNB161216                                                                
[11] SDK0J40700WIN                                                              
[12] P---S---                                                                   
[13] Number Of Devices:2\Maximum Capacity:16777216 bytes                        
[14] DIMM 0\P0 CHANNEL A                                                        
[15] DIMM 0\P0 CHANNEL B                                                        
[16]                                                                            
[17]                                                                            
[18] Ramaxel Technology                                                         
[19] Micron Technology                                                          
[20]                                                                            
[21]                                                                            
[22] RMSA3310MJ86H9F-3200                                                       
[23] 4ATF51264HZ-3G2J1                                                          
[24]                                                                            
[25]

CPPC

OFF

ON

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