cyring/gist:9b63442eb48810b35be895b9028ef8dd

Created February 18, 2022 21:03

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i5-12600K

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gistfile1.txt

CoreFreq 1.89.4

Author

cyring commented Aug 15, 2022

corefreq-cli -s -n -m -n -M -n -B -n -k -n -C 1 -c 1

Processor                                 [12th Gen Intel(R) Core(TM) i5-12600K]
|- Architecture                                                     [Alder Lake]
|- Vendor ID                                                      [GenuineIntel]
|- Microcode                                                        [0x0000001f]
|- Signature                                                           [  06_97]
|- Stepping                                                            [      2]
|- Online CPU                                                          [ 16/ 16]
|- Base Clock                                                          [ 99.631]
|- Frequency            (MHz)                      Ratio                        
                 Min    797.05                    <   8 >                       
                 Max   3686.36                    <  37 >                       
|- Factory                                                             [100.000]
                       3700                       [  37 ]                       
|- Performance                                                                  
   |- P-State                                                                   
                 TGT   6276.77                    <  63 >                       
   |- HWP                                                                       
                 Min   6276.77                    <  63 >                       
                 Max   6276.77                    <  63 >                       
                 TGT      AUTO                    <   0 >                       
|- Turbo Boost                                                         [ UNLOCK]
                  1C   4881.93                    <  49 >                       
                  2C   4881.93                    <  49 >                       
                  3C   4682.67                    <  47 >                       
                  4C   4682.67                    <  47 >                       
                  5C   4483.41                    <  45 >                       
                  6C   4483.41                    <  45 >                       
                  7C   4483.41                    <  45 >                       
                  8C   4483.41                    <  45 >                       
|- Hybrid                                                              [ UNLOCK]
                  1C   3586.73                    <  36 >                       
                  2C   3586.73                    <  36 >                       
                  3C   3387.46                    <  34 >                       
                  4C   3387.46                    <  34 >                       
                  5C   3387.46                    <  34 >                       
                  6C   3387.46                    <  34 >                       
                  7C   3387.46                    <  34 >                       
                  8C   3387.46                    <  34 >                       
|- Uncore                                                              [ UNLOCK]
                 Min    797.05                    <   8 >                       
                 Max   4881.93                    <  49 >                       
|- TDP                                                           Level [  0:3  ]
   |- Programmable                                                     [ UNLOCK]
   |- Configuration                                                    [   LOCK]
   |- Turbo Activation                                                 [ UNLOCK]
             Nominal   3686.36                    [  37 ]                       
               Turbo      AUTO                    <   0 >                       
                                                                                
Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [N]    AVX512-DQ [N]  AVX512-IFMA [N]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [N]    AVX512-BW [N]   AVX512-VL [N] 
|- AVX512-VBMI  [N] AVX512-VBMI2 [N]  AVX512-VNNI [N]  AVX512-ALG [N] 
|- AVX512-VPOP  [N] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [N] AVX-VNNI-VEX [Y]      MOVDIRI [Y]   MOVDIR64B [Y] 
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y] 
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- MMX/Ext    [Y/N] MON/MWAITX [Y/N]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y] 
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/N]      SSE4.2 [Y] 
|- SERIALIZE    [Y]      SYSCALL [Y]          SGX [N]       RDPID [Y] 
                                                                                
Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Missing]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Capable]
|- CPL Qualified Debug Store                                  DS-CPL   [Capable]
|- 64-Bit Debug Store                                         DTES64   [Capable]
|- Fast Short REP CMPSB                                         FSRC   [Missing]
|- Fast Short REP MOVSB                                         FSRM   [Capable]
|- Fast Short REP STOSB                                         FSRS   [Capable]
|- Fast Zero-length REP MOVSB                                   FZRM   [Missing]
|- Fast-String Operation                                        ERMS   [Capable]
|- Fused Multiply Add                                     FMA | FMA4   [Capable]
|- Hardware Feedback Interface                                   HFI   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- History Reset                                              HRESET   [Capable]
|- Hybrid part processor                                      HYBRID   [Capable]
|- Instruction Based Sampling                                    IBS   [Missing]
|- Instruction INVPCID                                       INVPCID   [Capable]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Memory Protection Extensions                                  MPX   [Missing]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Capable]
|- Platform Configuration                                    PCONFIG   [Capable]
|- Process Context Identifiers                                  PCID   [Capable]
|- Perfmon and Debug Capability                                 PDCM   [Capable]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Missing]
|- Resource Director Technology/PQM                            RDT-M   [Missing]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Capable]
|- Self-Snoop                                                     SS   [Capable]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Thread Director                                                TD   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Capable]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Capable]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Capable]
|- Extended xAPIC Support                                     x2APIC   [ x2APIC]
|- Execution Disable Bit Support                              XD-Bit   [Capable]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Capable]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [ Enable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Single Thread Indirect Branch Predictor                     STIBP   [Capable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
|- Writeback & invalidate the L1 data cache                L1D-FLUSH   [Capable]
|- Hypervisor - No flush L1D on VM entry            L1DFL_VMENTRY_NO   [ Enable]
|- Architectural - Buffer Overwriting                       MD-CLEAR   [Capable]
|- Architectural - Rogue Data Cache Load                     RDCL_NO   [ Enable]
|- Architectural - Enhanced IBRS                            IBRS_ALL   [ Enable]
|- Architectural - Return Stack Buffer Alternate                RSBA   [Capable]
|- Architectural - Speculative Store Bypass                   SSB_NO   [Capable]
|- Architectural - Microarchitectural Data Sampling           MDS_NO   [ Enable]
|- Architectural - TSX Asynchronous Abort                     TAA_NO   [ Enable]
|- Architectural - Page Size Change MCE               PSCHANGE_MC_NO   [ Enable]
|- Architectural - STLB QoS                                     STLB   [Capable]
|- Architectural - Functional Safety Island                     FuSa   [Capable]
|- Architectural - RSM in CPL0 only                              RSM   [Capable]
|- Architectural - Split Locked Access Exception                SPLA   [Capable]
|- Architectural - Snoop Filter QoS Mask                SNOOP_FILTER   [Capable]
                                                                                
Technologies                                                                    
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
   |- L2 Prefetcher                                                L2 HW   < ON>
   |- L2 Line Prefetcher                                        L2 HW CL   < ON>
|- System Management Mode                                       SMM-Dual   [ ON]
|- Hyper-Threading                                                   HTT   [ ON]
|- SpeedStep                                                        EIST   < ON>
|- Dynamic Acceleration                                              IDA   [ ON]
|- Turbo Boost                                                     TURBO   < ON>
|- Energy Efficiency Optimization                                    EEO   <OFF>
|- Race To Halt Optimization                                         R2H   <OFF>
|- Watchdog Timer                                                    TCO   <OFF>
|- Virtualization                                                    VMX   [OFF]
   |- I/O MMU                                                       VT-d   [ ON]
   |- Version                                                     [         4.0]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]
                                                                                
Performance Monitoring                                                          
|- Version                                                        PM       [  5]
|- Counters:          General                   Fixed                           
|           {  6,  0,  0 } x 48 bits            3 x 48 bits                     
|- Enhanced Halt State                                           C1E       <OFF>
|- C1 Auto Demotion                                              C1A       < ON>
|- C3 Auto Demotion                                              C3A       <OFF>
|- C1 UnDemotion                                                 C1U       < ON>
|- C3 UnDemotion                                                 C3U       <OFF>
|- C6 Core Demotion                                              CC6       <OFF>
|- C6 Module Demotion                                            MC6       <OFF>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Hardware-Controlled Performance States                        HWP       < ON>
   |- Capabilities      (MHz)                      Ratio                        
              Lowest     99.63                    [   1 ]                       
           Efficient   1295.21                    [  13 ]                       
          Guaranteed   4682.67                    [  47 ]                       
             Highest   6276.77                    [  63 ]                       
|- Hardware Duty Cycling                                         HDC       [OFF]
|- Package C-States                                                             
   |- Configuration Control                                   CONFIG   [   LOCK]
   |- Lowest C-State                                           LIMIT   <     C0>
   |- I/O MWAIT Redirection                                  IOMWAIT   <Disable>
   |- Max C-State Inclusion                                    RANGE   <     C1>
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x1814]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     0     2     0     2     0     1     0     1              
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- Last Level Cache Misses                                             [Capable]
|- Branch Instructions Retired                                         [Capable]
|- Branch Mispredicts Retired                                          [Capable]
|- Top-down slots Counter                                              [Capable]
                                                                                
Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [  0:100 C]
|- Clock Modulation                                             ODCM   <Disable>
   |- DutyCycle                                                        [  0.00%]
|- Power Management                                         PWR MGMT   [   LOCK]
   |- Energy Policy                                        Bias Hint   [      0]
   |- Energy Policy                                          HWP EPP   <      0>
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Capable]
|- Package Thermal Management                                    PTM   [Capable]
|- Thermal Monitor 1                                             TM1   [ Enable]
|- Thermal Monitor 2                                             TM2   [Capable]
|- Thermal Design Power                                          TDP   [  125 W]
   |- Minimum Power                                              Min   [Missing]
   |- Maximum Power                                              Max   [Missing]
|- Thermal Design Power                                      Package   < Enable>
   |- Power Limit                                                PL1   < 4095 W>
   |- Time Window                                                TW1   <   56 s>
   |- Power Limit                                                PL2   < 4095 W>
   |- Time Window                                                TW2   <   2 ms>
|- Thermal Design Power                                         Core   <Disable>
   |- Power Limit                                                PL1   <    0 W>
   |- Time Window                                                TW1   < 976 us>
|- Thermal Design Power                                       Uncore   <Disable>
   |- Power Limit                                                PL1   <    0 W>
   |- Time Window                                                TW1   < 976 us>
|- Thermal Design Power                                         DRAM   <Disable>
   |- Power Limit                                                PL1   <    0 W>
   |- Time Window                                                TW1   < 976 us>
|- Thermal Design Power                                     Platform   <Disable>
   |- Power Limit                                                PL1   <    0 W>
   |- Time Window                                                TW1   <   28 s>
   |- Power Limit                                                PL2   <    0 W>
   |- Time Window                                                TW2   < 976 us>
|- Electrical Design Current                                     EDC   [Missing]
|- Thermal Design Current                                        TDC   [Missing]
|- Core Thermal Point                                                           
   |- DTS Threshold #1                                     Threshold   [Missing]
   |- DTS Threshold #2                                     Threshold   [Missing]
|- Package Thermal Point                                                        
   |- DTS Threshold #1                                     Threshold   [Missing]
   |- DTS Threshold #2                                     Threshold   [Missing]
|- Units                                                                        
   |- Power                                               watt   [  0.125000000]
   |- Energy                                             joule   [  0.000061035]
   |- Window                                            second   [  0.000976562]

CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive              
 #   ID   ID  Hybrid ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way 
000:BSP    0  P   1   0  0   32768  8     49152 12   1310720 10  20971520 10  
001:  0    1  P   1   0  1   32768  8     49152 12   1310720 10  20971520 10  
002:  0    8  P   1   4  0   32768  8     49152 12   1310720 10  20971520 10  
003:  0    9  P   1   4  1   32768  8     49152 12   1310720 10  20971520 10  
004:  0   16  P   1   8  0   32768  8     49152 12   1310720 10  20971520 10  
005:  0   17  P   1   8  1   32768  8     49152 12   1310720 10  20971520 10  
006:  0   24  P   1  12  0   32768  8     49152 12   1310720 10  20971520 10  
007:  0   25  P   1  12  1   32768  8     49152 12   1310720 10  20971520 10  
008:  0   32  P   1  16  0   32768  8     49152 12   1310720 10  20971520 10  
009:  0   33  P   1  16  1   32768  8     49152 12   1310720 10  20971520 10  
010:  0   40  P   1  20  0   32768  8     49152 12   1310720 10  20971520 10  
011:  0   41  P   1  20  1   32768  8     49152 12   1310720 10  20971520 10  
012:  0   56  E   1  28  0   65536  8     32768  8   2097152 16  20971520 10  
013:  0   58  E   1  29  0   65536  8     32768  8   2097152 16  20971520 10  
014:  0   60  E   1  30  0   65536  8     32768  8   2097152 16  20971520 10  
015:  0   62  E   1  31  0   65536  8     32768  8   2097152 16  20971520 10  

                             Intel Z690  [7A84]                            
Controller #0                                                Dual Channel  
 Bus Rate  3600 MHz       Bus Speed 3586 MHz           DDR5 Speed 2391 MHz 
                                                                           
 Cha    CL  RCD   RP  RAS RRDs RRDl  FAW   WR RTPr WTPr  CWL CKE  CMD  GEAR
  #0    38   38   38   70    8   12   32   76   17  116   36  18   2T     2
  #1    38   38   38   70    8   12   32   76   17  116   36  18   2T     2
      sgRR dgRR drRR ddRR      sgRW dgRW drRW ddRW      sgWR dgWR drWR ddWR
  #0    12    8   14   14        18   18   20   22        70   52   12   12
  #1    12    8   14   14        18   18   20   22        70   52   12   12
      sgWW dgWW drWW ddWW                     REFI  RFC  XS   XP CPDED  ECC
  #0    26    8   14   14                     4680  383  706   18   12    0
  #1    26    8   14   14                     4680  383  706   18   12    0
                                                                           
 DIMM Geometry for channel #0                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1     8    1    131072      1024           8192         KF548C38-16
 DIMM Geometry for channel #1                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1     8    1    131072      1024           8192         KF548C38-16
                                                                           
Controller #1                                                Dual Channel  
 Bus Rate  3600 MHz       Bus Speed 3586 MHz           DDR5 Speed 2391 MHz 
                                                                           
 Cha    CL  RCD   RP  RAS RRDs RRDl  FAW   WR RTPr WTPr  CWL CKE  CMD  GEAR
  #0    38   38   38   70    8   12   32   76   17  116   36  18   2T     2
  #1    38   38   38   70    8   12   32   76   17  116   36  18   2T     2
      sgRR dgRR drRR ddRR      sgRW dgRW drRW ddRW      sgWR dgWR drWR ddWR
  #0    12    8   14   14        18   18   20   22        70   52   12   12
  #1    12    8   14   14        18   18   20   22        70   52   12   12
      sgWW dgWW drWW ddWW                     REFI  RFC  XS   XP CPDED  ECC
  #0    26    8   14   14                     4680  383  706   18   12    0
  #1    26    8   14   14                     4680  383  706   18   12    0
                                                                           
 DIMM Geometry for channel #0                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1     8    1    131072      1024           8192         KF548C38-16
 DIMM Geometry for channel #1                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1     8    1    131072      1024           8192         KF548C38-16

[ 0] American Megatrends International, LLC.                                    
[ 1] A.40                                                                       
[ 2] 05/17/2022                                                                 
[ 3] Micro-Star International Co., Ltd.                                         
[ 4] MS-7D25                                                                    
[ 5] 2.0                                                                        
[ 6] D---u---s---n-                                                             
[ 7] Default string                                                             
[ 8] Default string                                                             
[ 9] Micro-Star International Co., Ltd.                                         
[10] PRO Z690-A (MS-7D25)                                                       
[11] 2.0                                                                        
[12] 0---5---L---7---5-                                                         
[13] Number Of Devices:4\Maximum Capacity:268435456 bytes                       
[14]                                                                            
[15] Controller0-DIMMA2\BANK 0                                                  
[16]                                                                            
[17] Controller1-DIMMB2\BANK 0                                                  
[18]                                                                            
[19] Kingston                                                                   
[20]                                                                            
[21] Kingston                                                                   
[22]                                                                            
[23] KF548C38-16                                                                
[24]                                                                            
[25] KF548C38-16                                                                

Linux:                                                                          
|- Release                                                      [5.18.17-Unraid]
|- Version                 [#1 SMP PREEMPT_DYNAMIC Thu Aug 11 10:52:41 PDT 2022]
|- Machine                                                              [x86_64]
Memory:                                                                         
|- Total RAM                                                         32672076 KB
|- Shared RAM                                                         2360564 KB
|- Free RAM                                                          25208584 KB
|- Buffer RAM                                                           11948 KB
|- Total High                                                               0 KB
|- Free High                                                                0 KB
Clock Source                                                  <             tsc>
CPU-Freq driver                                               [    intel_pstate]
Governor                                                      [         Missing]
CPU-Idle driver                                               [      intel_idle]
|- Idle Limit                                                 [         C2_ACPI]
   |- State        POLL C1_ACPI C2_ACPI                                         
   |-           CPUIDLE ACPI FF ACPI FF                                         
   |- Power          -1       0       0                                         
   |- Latency         0       1     127                                         
   |- Residency       0       1     381                                         

CPU Freq(MHz) VID  Vcore  TMP(C)    Accumulator       Energy(J)     Power(W)
000  114.81 10709  1.3073   35  000000000000000000    0.000000000   0.000000000
001   13.63     0  0.0000   35  000000000000000000    0.000000000   0.000000000
002    0.76 10258  1.2522   33  000000000000000000    0.000000000   0.000000000
003    0.60     0  0.0000   33  000000000000000000    0.000000000   0.000000000
004    0.63 10381  1.2672   33  000000000000000000    0.000000000   0.000000000
005    0.63     0  0.0000   33  000000000000000000    0.000000000   0.000000000
006    0.52 10258  1.2522   34  000000000000000000    0.000000000   0.000000000
007    0.91     0  0.0000   34  000000000000000000    0.000000000   0.000000000
008    0.63 10750  1.3123   36  000000000000000000    0.000000000   0.000000000
009    0.65     0  0.0000   36  000000000000000000    0.000000000   0.000000000
010   30.65 10750  1.3123   37  000000000000000000    0.000000000   0.000000000
011   31.81     0  0.0000   37  000000000000000000    0.000000000   0.000000000
012   86.67 10258  1.2522   36  000000000000000000    0.000000000   0.000000000
013   21.97 10750  1.3123   36  000000000000000000    0.000000000   0.000000000
014    9.43 10668  1.3022   36  000000000000000000    0.000000000   0.000000000
015   10.27 10668  1.3022   36  000000000000000000    0.000000000   0.000000000

             Package       Cores         Uncore        Memory        Platform
Energy(J):  12.684509277  11.267333984   0.000000000   0.000000000   0.000000000
Power(W) :  12.684509277  11.267333984   0.000000000   0.000000000   0.000000000

CPU Freq(MHz) Ratio  Turbo  C0(%)  C1(%)  C3(%)  C6(%)  C7(%)  Min TMP:TS  Max
000   62.03 ( 0.62)   1.68   1.27  26.52   0.00  71.63   0.00  33 / 34:66 / 49
001   32.45 ( 0.33)   0.88   0.67  26.52   0.00  71.63   0.00  33 / 34:66 / 49
002    0.45 ( 0.00)   0.01   0.01   0.00   0.00  99.97   0.00  32 / 33:67 / 35
003    1.06 ( 0.01)   0.03   0.02   0.00   0.00  99.97   0.00  32 / 33:67 / 35
004    0.59 ( 0.01)   0.02   0.01   0.00   0.00  99.98   0.00  32 / 33:67 / 37
005    0.58 ( 0.01)   0.02   0.01   0.00   0.00  99.98   0.00  32 / 33:67 / 37
006    0.55 ( 0.01)   0.02   0.01   0.00   0.00  99.98   0.00  33 / 33:67 / 47
007    0.93 ( 0.01)   0.03   0.02   0.00   0.00  99.98   0.00  33 / 33:67 / 47
008    0.65 ( 0.01)   0.02   0.01   0.00   0.00  99.98   0.00  35 / 35:65 / 39
009    0.83 ( 0.01)   0.02   0.02   0.00   0.00  99.98   0.00  35 / 35:65 / 39
010   31.47 ( 0.32)   0.85   0.65  32.78   0.00  66.31   0.00  34 / 35:65 / 66
011   17.25 ( 0.17)   0.47   0.35  32.78   0.00  66.31   0.00  34 / 35:65 / 66
012   93.73 ( 0.94)   2.54   2.63  77.43   0.00  19.83   0.00  35 / 37:63 / 40
013   16.35 ( 0.16)   0.44   0.47   4.05   0.00  95.36   0.00  35 / 37:63 / 40
014   11.76 ( 0.12)   0.32   0.34   2.91   0.00  96.60   0.00  35 / 37:63 / 40
015   11.69 ( 0.12)   0.32   0.33   5.57   0.00  93.84   0.00  35 / 37:63 / 40

    Averages:        Turbo  C0(%)  C1(%)  C3(%)  C6(%)  C7(%)    TjMax:    Pkg:
                      0.48   0.43  13.04   0.00  86.33   0.00     100 C    37 C

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