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ROG CROSSHAIR VIII HERO (WI-FI)
@cyring
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cyring commented Oct 24, 2020

BIOS 4201

EDC Tweak

  • EDC @ 10A

BIOS_4201_EDC_10

  • Core Voltage Offset is stable @ 1.44 V during peak frequency

BIOS_4201_Volt_Offset

CoreFreq

  • Best Core @ ~ 4775 MHz with 4800 MHz absolute frequency peak

CoreFreq_EDC_10

  • Tools > Conic Compute > Hyperboloid of two sheets
  • EDC @ 10A

CoreFreq_Conic_EDC_10A

  • Tools > Conic Compute > Hyperboloid of two sheets
  • PBO Auto

CoreFreq_Conic_PBO_Auto

  • Fmax enabled ; PBO Auto

    Single Core

CoreFreq_Single_FMAX_ON

Conic Compute

CoreFreq_Conic_FMAX_ON

BIOS 3801

2021-10-18-042538_964x550_scrot

kernel: Linux version 5.14.12-arch1-1 (linux@archlinux) (gcc (GCC) 11.1.0, GNU ld (GNU Binutils) 2.36.1)
...
kernel: ACPI: [Firmware Bug]: BIOS _OSI(Linux) query ignored
...
kernel: acpi PNP0C14:02: duplicate WMI GUID 05901221-D566-11D1-B2F0-00A0C9062910 (first instance was on PNP0C14:01)
kernel: acpi PNP0C14:03: duplicate WMI GUID 05901221-D566-11D1-B2F0-00A0C9062910 (first instance was on PNP0C14:01)
kernel: acpi PNP0C14:04: duplicate WMI GUID 05901221-D566-11D1-B2F0-00A0C9062910 (first instance was on PNP0C14:01)
kernel: acpi PNP0C14:05: duplicate WMI GUID 05901221-D566-11D1-B2F0-00A0C9062910 (first instance was on PNP0C14:01)

BIOS 3703

C8HW_3703

  • Above FCLK=1600MHz
kernel: mce: [Hardware Error]: Machine check events logged
kernel: [Hardware Error]: Corrected error, no action required.
kernel: [Hardware Error]: CPU:0 (17:71:0) MC25_STATUS[-|CE|MiscV|-|-|-|-|CECC|-|-|-]: 0x98004000003e0000
kernel: [Hardware Error]: IPID: 0x000100ff03830400
kernel: [Hardware Error]: Platform Security Processor Ext. Error Code: 62
kernel: [Hardware Error]: cache level: RESV, tx: INSN

BIOS 3101

This version comes with the same MCE errors as below.

BIOS 2311

Single Core [ "PBO Fmax Enhancer" enabled ]

201024171156

CoreFreq_CH8_2311_Single_Core

All Cores

CoreFreq_CH8_2311_Conic_Hyperboloid_2Sheets_FMAX

16 x Cores

CoreFreq_CH8_2311_16xCores

14 x Cores

CoreFreq_CH8_2311_14xCores

First CCD

CoreFreq_CH8_2311_CCD0

All Cores [ "PBO Fmax Enhancer" disabled ]

CoreFreq_CH8_2311_Conic_Hyperboloid_2Sheets

[Hardware Error]: Corrected error, no action required.
[Hardware Error]: CPU:0 (17:71:0) MC25_STATUS[-|CE|MiscV|-|-|-|-|CECC|-|-|-]: 0x98004000003e0000
[Hardware Error]: IPID: 0x000100ff03830400
[Hardware Error]: Platform Security Processor Ext. Error Code: 62
[Hardware Error]: cache level: RESV, tx: INSN

BIOS 2206

Single Core

CoreFreq_CH8_2206_Single_Core

All Cores

CoreFreq_CH8_2206_Conic_Hyperboloid_2Sheets

...
smp: Bringing up secondary CPUs ...
x86: Booting SMP configuration:
.... node  #0, CPUs:        #1
__common_interrupt: 1.55 No irq handler for vector
  #2
__common_interrupt: 2.55 No irq handler for vector
  #3
__common_interrupt: 3.55 No irq handler for vector
  #4
__common_interrupt: 4.55 No irq handler for vector
  #5
__common_interrupt: 5.55 No irq handler for vector
  #6
__common_interrupt: 6.55 No irq handler for vector
  #7
__common_interrupt: 7.55 No irq handler for vector
  #8
__common_interrupt: 8.55 No irq handler for vector
  #9
__common_interrupt: 9.55 No irq handler for vector
 #10
__common_interrupt: 10.55 No irq handler for vector
 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #3>
smp: Brought up 1 node, 32 CPUs
...

Quoting irqinit.c

/*
 * The IO-APIC gives us many more interrupt sources. Most of these
 * are unused but an SMP system is supposed to have enough memory ...
 * sometimes (mostly wrt. hw bugs) we get corrupted vectors all
 * across the spectrum, so we really want to be prepared to get all
 * of these. Plus, more powerful systems might have more than 64
 * IO-APIC registers.
 *
 * (these are usually mapped into the 0x30-0xff vector range)
 */

@cyring
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cyring commented Jan 3, 2021

BIOS 2206 Profile

[2021/01/03 08:16:58]
Ai Overclock Tuner [Manual]
BCLK Frequency [100.0000]
Performance Enhancer [Auto]
Memory Frequency [DDR4-3733MHz]
FCLK Frequency [1866MHz]
Core Performance Boost [Auto]
CPU Core Ratio [Auto]
Core VID [Auto]
CCX0 Ratio [Auto]
CCX1 Ratio [Auto]
CCX0 Ratio [Auto]
CCX1 Ratio [Auto]
TPU [Keep Current Settings]
Performance Bias [None]
Precision Boost Overdrive [Auto]
Precision Boost Overdrive Scalar [Auto]
Max CPU Boost Clock Override [Auto]
Platform Thermal Throttle Limit [Auto]
DRAM CAS# Latency [16]
Trcdrd [16]
Trcdwr [16]
DRAM RAS# PRE Time [16]
DRAM RAS# ACT Time [36]
Trc [52]
TrrdS [4]
TrrdL [9]
Tfaw [44]
TwtrS [Auto]
TwtrL [Auto]
Twr [Auto]
Trcpage [Auto]
TrdrdScl [Auto]
TwrwrScl [Auto]
Trfc [Auto]
Trfc2 [Auto]
Trfc4 [Auto]
Tcwl [Auto]
Trtp [Auto]
Trdwr [Auto]
Twrrd [Auto]
TwrwrSc [Auto]
TwrwrSd [Auto]
TwrwrDd [Auto]
TrdrdSc [Auto]
TrdrdSd [Auto]
TrdrdDd [Auto]
Tcke [Auto]
ProcODT [Auto]
Cmd2T [Auto]
Gear Down Mode [Auto]
Power Down Enable [Auto]
RttNom [Auto]
RttWr [Auto]
RttPark [Auto]
MemAddrCmdSetup [Auto]
MemCsOdtSetup [Auto]
MemCkeSetup [Auto]
MemCadBusClkDrvStren [Auto]
MemCadBusAddrCmdDrvStren [Auto]
MemCadBusCsOdtDrvStren [Auto]
MemCadBusCkeDrvStren [Auto]
Mem Over Clock Fail Count [Auto]
Voltage Monitor [Die Sense]
CPU Load-line Calibration [Auto]
CPU Current Capability [Auto]
CPU VRM Switching Frequency [Auto]
VRM Spread Spectrum [Disabled]
Active Frequency Mode [Disabled]
CPU Power Duty Control [T.Probe]
CPU Power Phase Control [Auto]
CPU Power Thermal Control [120]
VDDSOC Load-line Calibration [Auto]
VDDSOC Current Capability [Auto]
VDDSOC Switching Frequency [Auto]
VDDSOC Phase Control [Auto]
DRAM Current Capability [100%]
DRAM Power Phase Control [Extreme]
DRAM Switching Frequency [Auto]
CPU Core Current Telemetry [Auto]
CPU SOC Current Telemetry [Auto]
Force OC Mode Disable [Disabled]
SB Clock Spread Spectrum [Disabled]
VTTDDR Voltage [Auto]
VPP_MEM Voltage [Auto]
DRAM CTRL REF Voltage on CHA [Auto]
DRAM CTRL REF Voltage on CHB [Auto]
VDDP Voltage [Auto]
1.8V Standby Voltage [Auto]
CPU 3.3v AUX [Auto]
1.2V SB Voltage [Auto]
DRAM R1 Tune [Auto]
DRAM R2 Tune [Auto]
DRAM R3 Tune [Auto]
DRAM R4 Tune [Auto]
PCIE Tune R1 [Auto]
PCIE Tune R2 [Auto]
PCIE Tune R3 [Auto]
PLL Tune R1 [Auto]
PLL reference voltage [Auto]
T Offset [Auto]
Sense MI Skew [Auto]
Sense MI Offset [Auto]
Promontory presence [Auto]
Clock Amplitude [Auto]
CPU Core Voltage [Auto]
CPU SOC Voltage [Auto]
DRAM Voltage [1.35000]
VDDG CCD Voltage Control [Auto]
VDDG IOD Voltage Control [Auto]
CLDO VDDP voltage [Auto]
1.00V SB Voltage [Auto]
1.8V PLL Voltage [Auto]
Security Device Support [Enable]
SHA-1 PCR Bank [Enabled]
SHA256 PCR Bank [Enabled]
Pending operation [None]
Platform Hierarchy [Enabled]
Storage Hierarchy [Enabled]
Endorsement Hierarchy [Enabled]
TPM 2.0 UEFI Spec Version [TCG_2]
Physical Presence Spec Version [1.3]
Disable Block Sid [Disabled]
TPM Device Selection [Firmware TPM]
Erase fTPM NV for factory reset [Disabled]
PSS Support [Enabled]
PPC Adjustment [PState 0]
NX Mode [Enabled]
SVM Mode [Enabled]
SMT Mode [Auto]
Core Leveling Mode [Automatic mode]
CCD Control [Auto]
SATA Port Enable [Disabled]
NVMe RAID mode [Disabled]
HD Audio Controller [Enabled]
PCIEX16_1 Bandwidth [Auto Mode]
PCIEX16_2 Bandwidth [Auto Mode]
When system is in working state [All On]
Q-Code LED Function [Auto]
When system is in sleep, hibernate or soft off states [Aura Off]
Realtek 2.5G LAN Controller [Enabled]
Realtek PXE OPROM [Disabled]
Intel LAN Controller [Enabled]
Intel LAN OPROM [Disabled]
ASM1074 Controller [Enabled]
Wi-Fi 6 (802.11ax) Controller [Disabled]
Bluetooth Controller [Enabled]
USB power delivery in Soft Off state (S5) [Disabled]
PCIEX16_1 Mode [Auto]
PCIEX16_2 Mode [Auto]
PCIEX1 Mode [Auto]
PCIEX16_3 Mode [Auto]
M.2_1 Link Mode [Auto]
M.2_2 Link Mode [Auto]
SB Link Mode [Auto]
ErP Ready [Enable(S4+S5)]
Restore AC Power Loss [Power Off]
Power On By PCI-E [Disabled]
Power On By RTC [Disabled]
SR-IOV Support [Enabled]
Legacy USB Support [Enabled]
XHCI Hand-off [Enabled]
Corsair VoyagerGT 1100 [Auto]
USB Device Enable [Enabled]
U32G2_2 [Enabled]
U32G2_3 [Enabled]
U32G2_4 [Enabled]
U32G1_10 [Enabled]
U32G1_11 [Enabled]
USB12 [Enabled]
USB13 [Enabled]
U32G2_7 [Enabled]
U32G2_8 [Enabled]
U32G2_C9 [Enabled]
Network Stack [Disabled]
Device [N\A]
CPU Temperature [Monitor]
CPU Package Temperature [Monitor]
MotherBoard Temperature [Monitor]
VRM Temperature [Monitor]
T_Sensor Temperature [Monitor]
Water In T Sensor Temperature [Monitor]
Water Out T Sensor Temperature [Monitor]
CPU Fan Speed [Monitor]
CPU Optional Fan Speed [Monitor]
Chassis Fan 1 Speed [Monitor]
Chassis Fan 2 Speed [Monitor]
Chassis Fan 3 Speed [Monitor]
High Amp Fan Speed [Monitor]
W_PUMP+ Speed [Monitor]
AIO PUMP Speed [Monitor]
PCH Fan Speed [Monitor]
Flow Rate [Monitor]
CPU Core Voltage [Monitor]
3.3V Voltage [Monitor]
5V Voltage [Monitor]
12V Voltage [Monitor]
CPU Q-Fan Control [Auto]
CPU Fan Step Up [0 sec]
CPU Fan Step Down [0 sec]
CPU Fan Speed Lower Limit [600 RPM]
CPU Fan Profile [Manual]
CPU Upper Temperature [70]
CPU Fan Max. Duty Cycle (%) [100]
CPU Middle Temperature [43]
CPU Fan Middle Duty Cycle (%) [57]
CPU Lower Temperature [27]
CPU Fan Min. Duty Cycle (%) [20]
Chassis Fan 1 Q-Fan Control [Auto]
Chassis Fan 1 Q-Fan Source [CPU]
Chassis Fan 1 Step Up [0 sec]
Chassis Fan 1 Step Down [0 sec]
Chassis Fan 1 Speed Low Limit [600 RPM]
Chassis Fan 1 Profile [Standard]
Chassis Fan 2 Q-Fan Control [Auto]
Chassis Fan 2 Q-Fan Source [CPU]
Chassis Fan 2 Step Up [0 sec]
Chassis Fan 2 Step Down [0 sec]
Chassis Fan 2 Speed Low Limit [600 RPM]
Chassis Fan 2 Profile [Standard]
Chassis Fan 3 Q-Fan Control [Auto]
Chassis Fan 3 Q-Fan Source [CPU]
Chassis Fan 3 Step Up [0 sec]
Chassis Fan 3 Step Down [0 sec]
Chassis Fan 3 Speed Low Limit [600 RPM]
Chassis Fan 3 Profile [Standard]
High Amp Fan Q-Fan Control [Auto]
High Amp Fan Q-Fan Source [CPU]
High Amp Fan Step Up [0 sec]
High Amp Fan Step Down [0 sec]
High Amp Fan Speed Low Limit [600 RPM]
High Amp Fan Profile [Standard]
WATER PUMP+ Control [Disabled]
AIO PUMP Control [Auto]
AIO PUMP Fan Q-Fan Source [CPU]
AIO PUMP Upper Temperature [70]
AIO PUMP Max. Duty Cycle (%) [100]
AIO PUMP Middle Temperature [45]
AIO PUMP Middle Duty Cycle(%) [100]
AIO PUMP Lower Temperature [40]
AIO PUMP Min. Duty Cycle (%) [100]
Fast Boot [Disabled]
Boot Logo Display [Disabled]
Bootup NumLock State [On]
POST Report [5 sec]
Wait For 'F1' If Error [Enabled]
Option ROM Messages [Keep Current]
Interrupt 19 Capture [Disabled]
Setup Mode [Advanced Mode]
Launch CSM [Enabled]
Boot Device Control [UEFI only]
Boot from Network Devices [Ignore]
Boot from Storage Devices [Ignore]
Boot from PCI-E/PCI Expansion Devices [Ignore]
OS Type [Other OS]
AMI Native NVMe Driver Support [Enabled]
Flexkey [Reset]
Setup Animator [Disabled]
Load from Profile [1]
Profile Name [BCLK100DDR3733]
Save to Profile [2]
DIMM Slot Number [DIMM_A2]
Bus Interface [PCIEX16_1]
Download & Install ARMOURY CRATE app [Disabled]
CPU Frequency [0]
CPU Voltage [0]
CCD Control [Auto]
Core control [Auto]
SMT Control [Auto]
Overclock [Auto]
Power Down Enable [Auto]
Cmd2T [Auto]
Gear Down Mode [Auto]
CAD Bus Timing User Controls [Auto]
CAD Bus Drive Strength User Controls [Auto]
Data Bus Configuration User Controls [Auto]
Infinity Fabric Frequency and Dividers [Auto]
Precision Boost Overdrive [Auto]
LN2 Mode [Auto]
SoC Voltage [0]
SoC/Uncore OC Mode [Disabled]
VDDP Voltage Control [Auto]
VDDG Voltage Control [Auto]
NUMA nodes per socket [Auto]
Custom Pstate0 [Auto]
L1 Stream HW Prefetcher [Auto]
L2 Stream HW Prefetcher [Auto]
Core Performance Boost [Auto]
Global C-state Control [Auto]
DRAM ECC Enable [Auto]
Indirect Branch Prediction Speculation [Auto]
DRAM scrub time [Auto]
Poison scrubber control [Auto]
Redirect scrubber control [Auto]
Redirect scrubber limit [Auto]
NUMA nodes per socket [Auto]
Memory interleaving [Auto]
Memory interleaving size [Auto]
1TB remap [Auto]
DRAM map inversion [Auto]
ACPI SRAT L3 Cache As NUMA Domain [Auto]
ACPI SLIT Distance Control [Auto]
ACPI SLIT remote relative distance [Auto]
GMI encryption control [Auto]
xGMI encryption control [Auto]
CAKE CRC perf bounds Control [Auto]
4-link xGMI max speed [Auto]
3-link xGMI max speed [Auto]
xGMI TXEQ Mode [Auto]
Disable DF to external downstream IP SyncFloodPropagation [Auto]
Disable DF sync flood propagation [Auto]
CC6 memory region encryption [Auto]
Memory Clear [Auto]
Overclock [Auto]
Power Down Enable [Auto]
Cmd2T [Auto]
Gear Down Mode [Auto]
CAD Bus Timing User Controls [Auto]
CAD Bus Drive Strength User Controls [Auto]
Data Bus Configuration User Controls [Auto]
Data Poisoning [Auto]
DRAM Post Package Repair [Default]
RCD Parity [Auto]
DRAM Address Command Parity Retry [Auto]
Write CRC Enable [Auto]
DRAM Write CRC Enable and Retry Limit [Auto]
Disable Memory Error Injection [True]
DRAM ECC Symbol Size [Auto]
DRAM UECC Retry [Auto]
TSME [Auto]
Data Scramble [Auto]
DFE Read Training [Auto]
FFE Write Training [Auto]
PMU Pattern Bits Control [Auto]
MR6VrefDQ Control [Auto]
CPU Vref Training Seed Control [Auto]
Chipselect Interleaving [Auto]
BankGroupSwap [Auto]
BankGroupSwapAlt [Auto]
Address Hash Bank [Auto]
Address Hash CS [Auto]
Address Hash Rm [Auto]
SPD Read Optimization [Enabled]
MBIST Enable [Disabled]
Pattern Select [PRBS]
Pattern Length [3]
Aggressor Channel [1 Aggressor Channel]
Aggressor Static Lane Control [Disabled]
Target Static Lane Control [Disabled]
Worst Case Margin Granularity [Per Chip Select]
Read Voltage Sweep Step Size [1]
Read Timing Sweep Step Size [1]
Write Voltage Sweep Step Size [1]
Write Timing Sweep Step Size [1]
IOMMU [Auto]
Precision Boost Overdrive [Auto]
Precision Boost Overdrive Scalar [Auto]
FCLK Frequency [Auto]
SOC OVERCLOCK VID [0]
UCLK DIV1 MODE [Auto]
VDDP Voltage Control [Auto]
VDDG Voltage Control [Auto]
SoC/Uncore OC Mode [Auto]
LN2 Mode [Auto]
ACS Enable [Auto]
PCIe ARI Support [Auto]
PCIe ARI Enumeration [Auto]
PCIe Ten Bit Tag Support [Auto]
Max Voltage Offset [Auto]
cTDP Control [Auto]
EfficiencyModeEn [Auto]
Package Power Limit Control [Auto]
APBDIS [Auto]
DF Cstates [Enabled]
CPPC [Enabled]
CPPC Preferred Cores [Enabled]
NBIO DPM Control [Auto]
Early Link Speed [Auto]
Preferred IO [Auto]
CV test [Auto]
Loopback Mode [Auto]
Data Link Feature Exchange [Disabled]

@cyring
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cyring commented Mar 20, 2021

BIOS 3302

Hardware Error

mce: [Hardware Error]: Machine check events logged
[Hardware Error]: Corrected error, no action required.
[Hardware Error]: CPU:0 (17:71:0) MC25_STATUS[-|CE|MiscV|-|-|-|-|CECC|-|-|-]: 0>
[Hardware Error]: IPID: 0x000100ff03830400
[Hardware Error]: Platform Security Processor Ext. Error Code: 62
[Hardware Error]: cache level: RESV, tx: INSN
...
mce: [Hardware Error]: Machine check events logged
[Hardware Error]: Corrected error, no action required.
[Hardware Error]: CPU:0 (17:71:0) MC25_STATUS[-|CE|MiscV|-|-|-|-|CECC|-|-|-]: 0>
[Hardware Error]: IPID: 0x000100ff03830400
[Hardware Error]: Platform Security Processor Ext. Error Code: 62
[Hardware Error]: cache level: RESV, tx: INSN
...
[Hardware Error]: Corrected error, no action required.
[Hardware Error]: CPU:0 (17:71:0) MC25_STATUS[-|CE|MiscV|-|-|-|-|CECC|-|-|-]: 0>
[Hardware Error]: IPID: 0x000100ff03830400
[Hardware Error]: Platform Security Processor Ext. Error Code: 62
[Hardware Error]: cache level: RESV, tx: INSN

Kernel v5.11.7

Error breakdown

CPU# Family Model Stepping Bank #
0 0x17 0x71 0x0 25
OVER UC or DEFERRED* MISCV ADDRV PCC
FALSE FALSE TRUE FALSE FALSE
----- function           EAX          EBX          ECX          EDX ------
  80000007:00000000    00000000     0000001b     00000000     00006799
rdmsr -p 0 -x 0xc0002194
0x2300000079
MCAX and TCC[55] SYNDV[53]
FALSE FALSE
ECC DEFERRED* POISON SCRUB
C FALSE FALSE FALSE

IPID

XEC = (0x98004000003e0000 >> 16) & 0x3f
XEC = 0x3e (62)

Decode status error code of 0x98004000003e0000 & 0xffff = 0

INTERNAL Cache:RESV Cache:L1 Cache:L2 Cache:L3/GEN
FALSE TRUE FALSE FALSE FALSE
BUS INSN DATA RESV
FALSE TRUE FALSE FALSE
MEM GEN RD WR DRD DWR IRD PRF EV SNP
FALSE FALSE FALSE FALSE FALSE FALSE FALSE FALSE FALSE FALSE

Source

drivers/edac/mce_amd.c

static int
amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
{
	struct mce *m = (struct mce *)data;
	unsigned int fam = x86_family(m->cpuid);
	int ecc;

	if (m->kflags & MCE_HANDLED_CEC)
		return NOTIFY_DONE;

	pr_emerg(HW_ERR "%s\n", decode_error_status(m));

	pr_emerg(HW_ERR "CPU:%d (%x:%x:%x) MC%d_STATUS[%s|%s|%s|%s|%s",
		m->extcpu,
		fam, x86_model(m->cpuid), x86_stepping(m->cpuid),
		m->bank,
		((m->status & MCI_STATUS_OVER)	? "Over"  : "-"),
		((m->status & MCI_STATUS_UC)	? "UE"	  :
		 (m->status & MCI_STATUS_DEFERRED) ? "-"  : "CE"),
		((m->status & MCI_STATUS_MISCV)	? "MiscV" : "-"),
		((m->status & MCI_STATUS_ADDRV)	? "AddrV" : "-"),
		((m->status & MCI_STATUS_PCC)	? "PCC"	  : "-"));

	if (boot_cpu_has(X86_FEATURE_SMCA)) {
		u32 low, high;
		u32 addr = MSR_AMD64_SMCA_MCx_CONFIG(m->bank);

		if (!rdmsr_safe(addr, &low, &high) &&
		    (low & MCI_CONFIG_MCAX))
			pr_cont("|%s", ((m->status & MCI_STATUS_TCC) ? "TCC" : "-"));

		pr_cont("|%s", ((m->status & MCI_STATUS_SYNDV) ? "SyndV" : "-"));
	}

	/* do the two bits[14:13] together */
	ecc = (m->status >> 45) & 0x3;
	if (ecc)
		pr_cont("|%sECC", ((ecc == 2) ? "C" : "U"));

	if (fam >= 0x15) {
		pr_cont("|%s", (m->status & MCI_STATUS_DEFERRED ? "Deferred" : "-"));

		/* F15h, bank4, bit 43 is part of McaStatSubCache. */
		if (fam != 0x15 || m->bank != 4)
			pr_cont("|%s", (m->status & MCI_STATUS_POISON ? "Poison" : "-"));
	}

	if (fam >= 0x17)
		pr_cont("|%s", (m->status & MCI_STATUS_SCRUB ? "Scrub" : "-"));

	pr_cont("]: 0x%016llx\n", m->status);

	if (m->status & MCI_STATUS_ADDRV)
		pr_emerg(HW_ERR "Error Addr: 0x%016llx\n", m->addr);

	if (m->ppin)
		pr_emerg(HW_ERR "PPIN: 0x%016llx\n", m->ppin);

	if (boot_cpu_has(X86_FEATURE_SMCA)) {
		pr_emerg(HW_ERR "IPID: 0x%016llx", m->ipid);

		if (m->status & MCI_STATUS_SYNDV)
			pr_cont(", Syndrome: 0x%016llx", m->synd);

		pr_cont("\n");

		decode_smca_error(m);
		goto err_code;
	}

	if (m->tsc)
		pr_emerg(HW_ERR "TSC: %llu\n", m->tsc);

	/* Doesn't matter which member to test. */
	if (!fam_ops.mc0_mce)
		goto err_code;

	switch (m->bank) {
	case 0:
		decode_mc0_mce(m);
		break;

	case 1:
		decode_mc1_mce(m);
		break;

	case 2:
		decode_mc2_mce(m);
		break;

	case 3:
		decode_mc3_mce(m);
		break;

	case 4:
		decode_mc4_mce(m);
		break;

	case 5:
		decode_mc5_mce(m);
		break;

	case 6:
		decode_mc6_mce(m);
		break;

	default:
		break;
	}

 err_code:
	amd_decode_err_code(m->status & 0xffff);

	m->kflags |= MCE_HANDLED_EDAC;
	return NOTIFY_OK;
}

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