Created
October 5, 2023 09:45
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| /dts-v1/; | |
| / { | |
| compatible = "econet,en7523"; | |
| interrupt-parent = <0x01>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| chosen { | |
| bootargs = "root=/dev/mtdblock3 ro console=ttyS0,115200n8 earlycon init=/sbin/init"; | |
| stdout-path = "/serial@1fbf0000"; | |
| }; | |
| reserved-memory { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| ranges; | |
| atf-reserved-memory@80000000 { | |
| compatible = "econet,en7523-atf-reserved-memory"; | |
| no-map; | |
| reg = <0x80000000 0x40000>; | |
| }; | |
| npu_binary@84000000 { | |
| no-map; | |
| reg = <0x84000000 0x100000>; | |
| phandle = <0x05>; | |
| }; | |
| }; | |
| psci { | |
| compatible = "arm,psci-0.2"; | |
| method = "smc"; | |
| }; | |
| cpus { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| cpu-map { | |
| cluster0 { | |
| core0 { | |
| cpu = <0x02>; | |
| }; | |
| core1 { | |
| cpu = <0x03>; | |
| }; | |
| }; | |
| }; | |
| cpu@0 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x00>; | |
| enable-method = "psci"; | |
| clock-frequency = <0x4c4b400>; | |
| next-level-cache = <0x04>; | |
| phandle = <0x02>; | |
| }; | |
| cpu@1 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x01>; | |
| enable-method = "psci"; | |
| clock-frequency = <0x4c4b400>; | |
| next-level-cache = <0x04>; | |
| phandle = <0x03>; | |
| }; | |
| l2-cache0 { | |
| compatible = "cache"; | |
| phandle = <0x04>; | |
| }; | |
| }; | |
| interrupt-controller@09000000 { | |
| compatible = "arm,gic-v3"; | |
| interrupt-controller; | |
| #interrupt-cells = <0x03>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| reg = <0x9000000 0x20000 0x9080000 0x80000>; | |
| interrupts = <0x01 0x09 0x08>; | |
| phandle = <0x01>; | |
| gic-its@09020000 { | |
| compatible = "arm,gic-v3-its"; | |
| msi-controller; | |
| #msi-cell = <0x01>; | |
| reg = <0x90200000 0x20000>; | |
| }; | |
| }; | |
| timer { | |
| compatible = "arm,armv8-timer"; | |
| interrupt-parent = <0x01>; | |
| interrupts = <0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08>; | |
| clock-frequency = <0x17d7840>; | |
| }; | |
| pmu { | |
| compatible = "arm,cortex-a15-pmu"; | |
| interrupts = <0x01 0x07 0x04>; | |
| }; | |
| npu@1e800000 { | |
| compatible = "econet,ecnt-npu"; | |
| reg = <0x1e800000 0x60000 0x1e900000 0x313000>; | |
| memory-region = <0x05>; | |
| interrupts = <0x00 0x76 0x04 0x00 0x77 0x04 0x00 0x78 0x04 0x00 0x79 0x04 0x00 0x7a 0x04 0x00 0x7b 0x04 0x00 0x7d 0x04>; | |
| }; | |
| apb_timer1@1fbf0100 { | |
| compatible = "econet,ecnt-timer"; | |
| reg = <0x1fbf0100 0x40>; | |
| interrupts = <0x00 0x14 0x04 0x00 0x15 0x04 0x00 0x16 0x04 0x00 0x19 0x04>; | |
| }; | |
| memory@80000000 { | |
| device_type = "memory"; | |
| reg = <0x80000000 0x40000000>; | |
| }; | |
| rbus@1fa00000 { | |
| compatible = "econet,ecnt-rbus"; | |
| reg = <0x1fa00000 0x1000>; | |
| }; | |
| sram@1fa40000 { | |
| compatible = "econet,ecnt-sram"; | |
| reg = <0x1fa40000 0x8000 0x8000000 0x40000 0x1efc0000 0x40000 0x1e880000 0x40000 0x1fbe3000 0x200>; | |
| }; | |
| scu@1fb00000 { | |
| compatible = "econet,ecnt-scu"; | |
| reg = <0x1fb00000 0x960 0x1fa20000 0x360 0x1fa2ff30 0x10>; | |
| interrupts = <0x00 0x2f 0x04>; | |
| }; | |
| pcie@0x1fa91000 { | |
| compatible = "ecnt,pcie-en7523"; | |
| device_type = "pci"; | |
| reg = <0x1fa91000 0x1000 0x1fa92000 0x1000 0x1fa90000 0x1000 0x1a100000 0x1000 0x1a148000 0x1000 0x1a14a000 0x1000>; | |
| interrupts = <0x00 0x27 0x04 0x00 0x28 0x04>; | |
| bus-range = <0x00 0xff>; | |
| #address-cells = <0x03>; | |
| #size-cells = <0x02>; | |
| ranges = <0x82000000 0x00 0x20000000 0x20000000 0x00 0x10000000>; | |
| pcie@0,0 { | |
| device_type = "pci"; | |
| reg = <0x00 0x00 0x00 0x00 0x00>; | |
| #address-cells = <0x03>; | |
| #size-cells = <0x02>; | |
| #interrupt-cells = <0x01>; | |
| ranges; | |
| interrupt-map-mask = <0x00 0x00 0x00 0x07>; | |
| interrupt-map = <0x00 0x00 0x00 0x01 0x06 0x01 0x00 0x00 0x00 0x02 0x06 0x02 0x00 0x00 0x00 0x03 0x06 0x03 0x00 0x00 0x00 0x04 0x06 0x04>; | |
| pcie-port = <0x00>; | |
| num-lanes = <0x01>; | |
| status = "okay"; | |
| interrupt-controller { | |
| interrupt-controller; | |
| #address-cells = <0x00>; | |
| #interrupt-cells = <0x01>; | |
| phandle = <0x06>; | |
| }; | |
| }; | |
| pcie@1,0 { | |
| device_type = "pci"; | |
| reg = <0x800 0x00 0x00 0x00 0x00>; | |
| #address-cells = <0x03>; | |
| #size-cells = <0x02>; | |
| #interrupt-cells = <0x01>; | |
| ranges; | |
| interrupt-map-mask = <0x00 0x00 0x00 0x07>; | |
| interrupt-map = <0x00 0x00 0x00 0x01 0x07 0x01 0x00 0x00 0x00 0x02 0x07 0x02 0x00 0x00 0x00 0x03 0x07 0x03 0x00 0x00 0x00 0x04 0x07 0x04>; | |
| pcie-port = <0x01>; | |
| num-lanes = <0x01>; | |
| status = "okay"; | |
| interrupt-controller { | |
| interrupt-controller; | |
| #address-cells = <0x00>; | |
| #interrupt-cells = <0x01>; | |
| phandle = <0x07>; | |
| }; | |
| }; | |
| }; | |
| wdma { | |
| compatible = "en751221,wdma"; | |
| reg = <0x1fa06000 0x400 0x1fa06400 0x400>; | |
| interrupts = <0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04 0x00 0x48 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>; | |
| }; | |
| wed { | |
| compatible = "en751221,wed"; | |
| wed_num = <0x02>; | |
| pci_slot_map = <0x00 0x01>; | |
| reg = <0x1fa02000 0xb00 0x1fa03000 0xb00>; | |
| interrupts = <0x00 0x43 0x04 0x00 0x44 0x04>; | |
| }; | |
| wed2 { | |
| compatible = "en751221,wed2"; | |
| wed_num = <0x02>; | |
| pci_slot_map = <0x00 0x01>; | |
| reg = <0x1fa02000 0xb00 0x1fa03000 0xb00>; | |
| interrupts = <0x00 0x43 0x04 0x00 0x44 0x04>; | |
| }; | |
| wed_test { | |
| compatible = "en751221,wed_test"; | |
| wed_num = <0x02>; | |
| reg = <0x1fa02b00 0x100 0x1fa03b00 0x100>; | |
| }; | |
| i2c@1fbf8000 { | |
| compatible = "econet,ecnt-i2c"; | |
| reg = <0x1fbf8000 0x65>; | |
| }; | |
| gdump@1fbf9000 { | |
| compatible = "econet,ecnt-gdump"; | |
| reg = <0x1fbf9000 0x84>; | |
| }; | |
| crypto_k@1fb70000 { | |
| compatible = "econet,ecnt-crypto_k"; | |
| reg = <0x1fb70000 0x804>; | |
| interrupts = <0x00 0x2c 0x04>; | |
| }; | |
| trng@1faa1000 { | |
| compatible = "econet,ecnt-trng"; | |
| reg = <0x1faa1000 0xc04>; | |
| interrupts = <0x00 0x23 0x04>; | |
| }; | |
| gdma@1fb30000 { | |
| compatible = "econet,ecnt-gdma"; | |
| reg = <0x1fb30000 0x2b0>; | |
| }; | |
| xsi@1fa60000 { | |
| compatible = "econet,ecnt-xsi"; | |
| reg = <0x1fa60000 0x300 0x1fa70000 0x300 0x1fa71000 0x300 0x1fa80000 0x300>; | |
| }; | |
| i2c_slave@1fbe3300 { | |
| compatible = "econet,ecnt-i2c_slave"; | |
| reg = <0x1fbe3300 0x10>; | |
| dev0_addr = <0x60>; | |
| dev1_addr = <0x62>; | |
| interrupts = <0x00 0x1c 0x04>; | |
| }; | |
| serial@1fbf0000 { | |
| compatible = "econet,ecnt-uart1"; | |
| reg = <0x1fbf0000 0x30>; | |
| interrupts = <0x00 0x12 0x04>; | |
| }; | |
| serial@1fbf0300 { | |
| compatible = "econet,ecnt-uart2"; | |
| reg = <0x1fbf0300 0x30>; | |
| interrupts = <0x00 0x20 0x04>; | |
| }; | |
| gpio@1fbf0200 { | |
| compatible = "econet,ecnt-gpio"; | |
| reg = <0x1fbf0200 0x80>; | |
| }; | |
| spi_controller@1fa10000 { | |
| compatible = "econet,ecnt-spi_ctrl"; | |
| reg = <0x1fa10000 0x140 0x00 0x1000>; | |
| interrupts = <0x00 0x33 0x04>; | |
| phandle = <0x08>; | |
| }; | |
| spi_spi2nfi@1fa11000 { | |
| compatible = "econet,ecnt-spi2nfi"; | |
| reg = <0x1fa11000 0x160>; | |
| phandle = <0x09>; | |
| }; | |
| spi_ecc@1fa12000 { | |
| compatible = "econet,ecnt-spi_ecc"; | |
| reg = <0x1fa12000 0x150>; | |
| phandle = <0x0a>; | |
| }; | |
| frame_engine@1fb50000 { | |
| compatible = "econet,ecnt-frame_engine"; | |
| reg = <0x1fb50000 0x2600 0x1fb54000 0x4000 0x1fb58000 0x8000>; | |
| interrupts = <0x00 0x25 0x04 0x00 0x37 0x04 0x00 0x38 0x04 0x00 0x39 0x04 0x00 0x26 0x04 0x00 0x3a 0x04 0x00 0x3b 0x04 0x00 0x3c 0x04 0x00 0x31 0x04 0x00 0x40 0x04>; | |
| }; | |
| snor { | |
| compatible = "econet,ecnt-snor"; | |
| spi-controller = <0x08>; | |
| }; | |
| nand@1fa10000 { | |
| compatible = "econet,ecnt-nand"; | |
| spi-controller = <0x08>; | |
| spi2nfi = <0x09>; | |
| spi-ecc = <0x0a>; | |
| }; | |
| dma-controller@1fa01800 { | |
| compatible = "econet,en7523-hsdma"; | |
| reg = <0x1fa01800 0x300>; | |
| interrupts = <0x00 0x3f 0x04>; | |
| #dma-cells = <0x01>; | |
| dma-channels = <0x02>; | |
| dma-requests = <0x02>; | |
| }; | |
| cpu_top@1efb0000 { | |
| compatible = "econet,ecnt-cpu_top"; | |
| reg = <0x1efbc800 0x10>; | |
| }; | |
| xpon@1fb64000 { | |
| compatible = "econet,ecnt-xpon"; | |
| reg = <0x1fb64000 0x3e8 0x1fb66000 0x23c>; | |
| interrupts = <0x00 0x2a 0x04 0x00 0x22 0x04>; | |
| }; | |
| xhci@1fab0000 { | |
| compatible = "econet,ecnt-xhci"; | |
| reg = <0x1fab0000 0x3e00 0x1fab3e00 0x100>; | |
| interrupts = <0x00 0x21 0x04>; | |
| }; | |
| pon_phy@1faf0000 { | |
| compatible = "econet,ecnt-pon_phy"; | |
| reg = <0x1faf0000 0x800 0x1fa2ff24 0x04 0x1faf3000 0xfff 0x1faf4000 0xfff>; | |
| interrupts = <0x00 0x2b 0x04>; | |
| }; | |
| pcm@bfbd0000 { | |
| compatible = "econet,ecnt-pcm"; | |
| reg = <0x1fbd0000 0x4fff>; | |
| interrupts = <0x00 0x1b 0x04>; | |
| }; | |
| pcie_phy@1fa93700 { | |
| compatible = "econet,en7523-pcie_phy"; | |
| reg = <0x1fa93700 0x568 0x1fa95700 0x568>; | |
| }; | |
| pon_hsgmii@1fa65000 { | |
| compatible = "econet,ecnt-pon_hsgmii"; | |
| reg = <0x1fa65100 0x4a0 0x1fa65a00 0x1ac 0x1fa65e00 0x64 0x1fa66000 0xdc>; | |
| interrupts = <0x00 0x42 0x04>; | |
| }; | |
| sgmii_p0@1fa72000 { | |
| compatible = "econet,ecnt-sgmii"; | |
| reg = <0x1fa72100 0x4a0 0x1fa72a00 0x160 0x1fa72000 0x64 0x1fa72600 0xdc 0x1fa72c00 0x3b0>; | |
| interrupts = <0x00 0x97 0x04>; | |
| int_name = "sgmii_pcie0"; | |
| int_id = <0x00>; | |
| }; | |
| sgmii_p1@1fa77000 { | |
| compatible = "econet,ecnt-sgmii"; | |
| reg = <0x1fa77100 0x4a0 0x1fa77a00 0x160 0x1fa77000 0x64 0x1fa77600 0xdc 0x1fa77c00 0x3b0>; | |
| interrupts = <0x00 0x98 0x04>; | |
| int_name = "sgmii_pcie1"; | |
| int_id = <0x01>; | |
| }; | |
| sgmii_u0@1fa81000 { | |
| compatible = "econet,ecnt-sgmii"; | |
| reg = <0x1fa81100 0x4a0 0x1fa81a00 0x160 0x1fa81000 0x64 0x1fa81600 0xdc 0x1fa81c00 0x3b0>; | |
| interrupts = <0x00 0x99 0x04>; | |
| int_name = "sgmii_usb0"; | |
| int_id = <0x02>; | |
| }; | |
| usb_phy@1fad0000 { | |
| compatible = "econet,ecnt-usb_phy"; | |
| reg = <0x1fad0000 0x1fff>; | |
| }; | |
| thermal_phy@1efbd000 { | |
| compatible = "econet,ecnt-thermal_phy"; | |
| reg = <0x1efbd000 0xfff>; | |
| interrupts = <0x00 0x17 0x04>; | |
| int_name = "ptp_therm"; | |
| }; | |
| i2s@1fbe2200 { | |
| compatible = "econet,ecnt-i2s"; | |
| reg = <0x1fbe2200 0xfc 0x1fbe2e00 0x114>; | |
| interrupts = <0x00 0x30 0x04>; | |
| }; | |
| }; |
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