Created
October 8, 2020 06:09
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/ { | |
model = "cavium,ubnt_e300"; | |
compatible = "cavium,ubnt_e300"; | |
#address-cells = <0x00000002>; | |
#size-cells = <0x00000002>; | |
interrupt-parent = <0x00000001>; | |
memory { | |
reg = <0x00000000 0x00000000 0x00000000 0x10000000 0x00000000 0x20000000 0x00000000 0x30000000>; | |
device_type = "memory"; | |
}; | |
soc@0 { | |
compatible = "simple-bus"; | |
#address-cells = <0x00000002>; | |
#size-cells = <0x00000002>; | |
ranges; | |
bootbus@1180000000000 { | |
compatible = "cavium,octeon-3860-bootbus"; | |
reg = <0x00011800 0x00000000 0x00000000 0x00000200>; | |
#address-cells = <0x00000002>; | |
#size-cells = <0x00000001>; | |
ranges = * 0x000801dc [0x000000a0]; | |
}; | |
interrupt-controller@1070000000000 { | |
compatible = "cavium,octeon-3860-ciu"; | |
interrupt-controller; | |
#interrupt-cells = <0x00000002>; | |
reg = <0x00010700 0x00000000 0x00000000 0x00007000>; | |
linux,phandle = <0x00000001>; | |
phandle = <0x00000001>; | |
}; | |
interrupt-controller@107000000e000 { | |
compatible = "cavium,octeon-7130-cib"; | |
reg = <0x00010700 0x0000e000 0x00000000 0x00000008 0x00010700 0x0000e100 0x00000000 0x00000008>; | |
cavium,max-bits = <0x00000017>; | |
interrupt-controller; | |
interrupt-parent = <0x00000001>; | |
interrupts = <0x00000001 0x00000018>; | |
#interrupt-cells = <0x00000002>; | |
}; | |
interrupt-controller@107000000e200 { | |
compatible = "cavium,octeon-7130-cib"; | |
reg = <0x00010700 0x0000e200 0x00000000 0x00000008 0x00010700 0x0000e300 0x00000000 0x00000008>; | |
cavium,max-bits = <0x0000000c>; | |
interrupt-controller; | |
interrupt-parent = <0x00000001>; | |
interrupts = <0x00000001 0x00000034>; | |
#interrupt-cells = <0x00000002>; | |
}; | |
interrupt-controller@107000000e400 { | |
compatible = "cavium,octeon-7130-cib"; | |
reg = <0x00010700 0x0000e400 0x00000000 0x00000008 0x00010700 0x0000e500 0x00000000 0x00000008>; | |
cavium,max-bits = <0x00000006>; | |
interrupt-controller; | |
interrupt-parent = <0x00000001>; | |
interrupts = <0x00000001 0x0000003f>; | |
#interrupt-cells = <0x00000002>; | |
}; | |
interrupt-controller@107000000ec00 { | |
compatible = "cavium,octeon-7130-cib"; | |
reg = <0x00010700 0x0000ec00 0x00000000 0x00000008 0x00010700 0x0000ee00 0x00000000 0x00000008>; | |
cavium,max-bits = <0x0000000f>; | |
interrupt-controller; | |
interrupt-parent = <0x00000001>; | |
interrupts = <0x00000002 0x00000011>; | |
#interrupt-cells = <0x00000002>; | |
linux,phandle = <0x0000000a>; | |
phandle = <0x0000000a>; | |
}; | |
interrupt-controller@107000000e600 { | |
compatible = "cavium,octeon-7130-cib"; | |
reg = <0x00010700 0x0000e600 0x00000000 0x00000008 0x00010700 0x0000e700 0x00000000 0x00000008>; | |
cavium,max-bits = <0x00000004>; | |
interrupt-controller; | |
interrupt-parent = <0x00000001>; | |
interrupts = <0x00000002 0x00000010>; | |
#interrupt-cells = <0x00000002>; | |
linux,phandle = <0x00000007>; | |
phandle = <0x00000007>; | |
}; | |
interrupt-controller@107000000e800 { | |
compatible = "cavium,octeon-7130-cib"; | |
reg = <0x00010700 0x0000e800 0x00000000 0x00000008 0x00010700 0x0000ea00 0x00000000 0x00000008>; | |
cavium,max-bits = <0x0000000b>; | |
interrupt-controller; | |
interrupt-parent = <0x00000001>; | |
interrupts = <0x00000001 0x00000021>; | |
#interrupt-cells = <0x00000002>; | |
linux,phandle = <0x00000008>; | |
phandle = <0x00000008>; | |
}; | |
interrupt-controller@107000000e900 { | |
compatible = "cavium,octeon-7130-cib"; | |
reg = <0x00010700 0x0000e900 0x00000000 0x00000008 0x00010700 0x0000eb00 0x00000000 0x00000008>; | |
cavium,max-bits = <0x0000000b>; | |
interrupt-controller; | |
interrupt-parent = <0x00000001>; | |
interrupts = <0x00000001 0x00000011>; | |
#interrupt-cells = <0x00000002>; | |
linux,phandle = <0x00000009>; | |
phandle = <0x00000009>; | |
}; | |
gpio-controller@1070000000800 { | |
#gpio-cells = <0x00000002>; | |
compatible = "cavium,octeon-3860-gpio"; | |
reg = <0x00010700 0x00000800 0x00000000 0x00000100>; | |
gpio-controller; | |
interrupt-controller; | |
#interrupt-cells = <0x00000002>; | |
interrupts = * 0x000809e4 [0x00000080]; | |
linux,phandle = <0x00000002>; | |
phandle = <0x00000002>; | |
}; | |
mdio@1180000001800 { | |
compatible = "cavium,octeon-3860-mdio"; | |
#address-cells = <0x00000001>; | |
#size-cells = <0x00000000>; | |
reg = <0x00011800 0x00001800 0x00000000 0x00000040>; | |
ethernet-phy@4 { | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22"; | |
reg = <0x00000004>; | |
interrupt-parent = <0x00000002>; | |
interrupts = <0x00000011 0x00000008>; | |
optical-media-type = "1000bx"; | |
vitesse,reg-init = <0x0000001f 0x00000000 0x00000003 0x00000010 0x0000ff7f 0x00000080 0x0000001f 0x00000000 0x00000000 0x00000017 0x0000f8ff 0x | |
00000200 0x00000000 0x00007fff 0x00008000>; | |
linux,phandle = <0x00000003>; | |
phandle = <0x00000003>; | |
}; | |
ethernet-phy@5 { | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22"; | |
reg = <0x00000005>; | |
interrupt-parent = <0x00000002>; | |
interrupts = <0x00000011 0x00000008>; | |
vitesse,reg-init = <0x0000001f 0x00000000 0x00000003 0x00000010 0x0000ff7f 0x00000080 0x0000001f 0x00000000 0x00000000>; | |
linux,phandle = <0x00000004>; | |
phandle = <0x00000004>; | |
}; | |
ethernet-phy@6 { | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22"; | |
reg = <0x00000006>; | |
interrupt-parent = <0x00000002>; | |
interrupts = <0x00000011 0x00000008>; | |
vitesse,reg-init = <0x0000001f 0x00000000 0x00000003 0x00000010 0x0000ff7f 0x00000080 0x0000001f 0x00000000 0x00000000>; | |
linux,phandle = <0x00000005>; | |
phandle = <0x00000005>; | |
}; | |
ethernet-phy@7 { | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22"; | |
reg = <0x00000007>; | |
interrupt-parent = <0x00000002>; | |
interrupts = <0x00000011 0x00000008>; | |
vitesse,reg-init = <0x0000001f 0x00000000 0x00000003 0x00000010 0x0000ff7f 0x00000080 0x0000001f 0x00000000 0x00000000>; | |
linux,phandle = <0x00000006>; | |
phandle = <0x00000006>; | |
}; | |
}; | |
mdio@1180000001900 { | |
compatible = "cavium,octeon-3860-mdio"; | |
#address-cells = <0x00000001>; | |
#size-cells = <0x00000000>; | |
reg = <0x00011800 0x00001900 0x00000000 0x00000040>; | |
}; | |
pip@11800a0000000 { | |
compatible = "cavium,octeon-3860-pip"; | |
#address-cells = <0x00000001>; | |
#size-cells = <0x00000000>; | |
reg = <0x00011800 0xa0000000 0x00000000 0x00002000>; | |
interface@0 { | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
compatible = "cavium,octeon-3860-pip-interface"; | |
#address-cells = <0x00000001>; | |
#size-cells = <0x00000000>; | |
reg = <0x00000000>; | |
ethernet@0 { | |
compatible = "cavium,octeon-3860-pip-port"; | |
reg = <0x00000000>; | |
local-mac-address = [fc ec da 03 bf 17]; | |
phy-handle = <0x00000003>; | |
}; | |
ethernet@1 { | |
compatible = "cavium,octeon-3860-pip-port"; | |
reg = <0x00000001>; | |
local-mac-address = [fc ec da 03 bf 18]; | |
phy-handle = <0x00000004>; | |
}; | |
ethernet@2 { | |
compatible = "cavium,octeon-3860-pip-port"; | |
reg = <0x00000002>; | |
local-mac-address = [fc ec da 03 bf 19]; | |
phy-handle = <0x00000005>; | |
}; | |
ethernet@3 { | |
compatible = "cavium,octeon-3860-pip-port"; | |
reg = <0x00000003>; | |
local-mac-address = [fc ec da 03 bf 1a]; | |
phy-handle = <0x00000006>; | |
}; | |
}; | |
}; | |
uctl@118006c000000 { | |
compatible = "cavium,octeon-7130-sata-uctl"; | |
reg = <0x00011800 0x6c000000 0x00000000 0x00000100>; | |
ranges; | |
#address-cells = <0x00000002>; | |
#size-cells = <0x00000002>; | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
}; | |
uctl@1180068000000 { | |
compatible = "cavium,octeon-7130-usb-uctl"; | |
reg = <0x00011800 0x68000000 0x00000000 0x00000100>; | |
ranges; | |
#address-cells = <0x00000002>; | |
#size-cells = <0x00000002>; | |
refclk-frequency = <0x05f5e100>; | |
refclk-type-ss = "dlmc_ref_clk1"; | |
refclk-type-hs = "pll_ref_clk"; | |
power = <0x00000002 0x00000001 0x00000000>; | |
xhci@1680000000000 { | |
compatible = "cavium,octeon-7130-xhci", "synopsys,dwc3"; | |
reg = <0x00016800 0x00000000 0x00000010 0x00000000>; | |
interrupt-parent = <0x00000008>; | |
interrupts = <0x00000009 0x00000004>; | |
}; | |
}; | |
uctl@1180069000000 { | |
compatible = "cavium,octeon-7130-usb-uctl"; | |
reg = <0x00011800 0x69000000 0x00000000 0x00000100>; | |
ranges; | |
#address-cells = <0x00000002>; | |
#size-cells = <0x00000002>; | |
refclk-frequency = <0x05f5e100>; | |
refclk-type-ss = "dlmc_ref_clk1"; | |
refclk-type-hs = "pll_ref_clk"; | |
power = <0x00000002 0x00000002 0x00000001>; | |
xhci@1690000000000 { | |
compatible = "cavium,octeon-7130-xhci", "synopsys,dwc3"; | |
reg = <0x00016900 0x00000000 0x00000010 0x00000000>; | |
interrupt-parent = <0x00000009>; | |
interrupts = <0x00000009 0x00000004>; | |
}; | |
}; | |
i2c@1180000001000 { | |
#address-cells = <0x00000001>; | |
#size-cells = <0x00000000>; | |
compatible = "cavium,octeon-3860-twsi"; | |
reg = <0x00011800 0x00001000 0x00000000 0x00000200>; | |
interrupts = <0x00000000 0x0000002d>; | |
clock-frequency = <0x000186a0>; | |
sfp_eeprom@50 { | |
compatible = "at,24c04"; | |
reg = <0x00000050>; | |
label = "port0"; | |
}; | |
sfp_eeprom@51 { | |
compatible = "at,24c04"; | |
reg = <0x00000051>; | |
label = "port1"; | |
}; | |
}; | |
i2c@1180000001200 { | |
#address-cells = <0x00000001>; | |
#size-cells = <0x00000000>; | |
compatible = "cavium,octeon-3860-twsi"; | |
reg = <0x00011800 0x00001200 0x00000000 0x00000200>; | |
interrupts = <0x00000000 0x0000003b>; | |
clock-frequency = <0x000186a0>; | |
}; | |
serial@1180000000800 { | |
compatible = "cavium,octeon-3860-uart", "ns16550"; | |
reg = <0x00011800 0x00000800 0x00000000 0x00000400>; | |
clock-frequency = <0x17d78400>; | |
current-speed = <0x0001c200>; | |
reg-shift = <0x00000003>; | |
interrupts = <0x00000000 0x00000022>; | |
}; | |
serial@1180000000c00 { | |
compatible = "cavium,octeon-3860-uart", "ns16550"; | |
reg = <0x00011800 0x00000c00 0x00000000 0x00000400>; | |
clock-frequency = <0x17d78400>; | |
current-speed = <0x0001c200>; | |
reg-shift = <0x00000003>; | |
interrupts = <0x00000000 0x00000023>; | |
}; | |
mmc@1180000002000 { | |
compatible = "cavium,octeon-6130-mmc"; | |
reg = <0x00011800 0x00002000 0x00000000 0x00000100 0x00011800 0x00000168 0x00000000 0x00000020>; | |
#address-cells = <0x00000001>; | |
#size-cells = <0x00000000>; | |
interrupts = <0x00000001 0x00000013 0x00000000 0x0000003f>; | |
mmc-slot@0 { | |
compatible = "cavium,octeon-6130-mmc-slot"; | |
reg = <0x00000000>; | |
voltage-ranges = <0x00000ce4 0x00000ce4>; | |
spi-max-frequency = <0x018cba80>; | |
non-removable; | |
bus-width = <0x00000008>; | |
cavium,bus-max-width = <0x00000008>; | |
}; | |
}; | |
spi@1070000001000 { | |
compatible = "cavium,octeon-3010-spi"; | |
reg = <0x00010700 0x00001000 0x00000000 0x00000100>; | |
interrupts = <0x00000000 0x0000003a>; | |
#address-cells = <0x00000001>; | |
#size-cells = <0x00000000>; | |
spi-max-frequency = <0x05f5e100>; | |
flash@0 { | |
compatible = "Macronix,mx25l6405d", "spi-flash"; | |
reg = <0x00000000>; | |
spi-max-frequency = <0x017d7840>; | |
mode = <0x00000000>; | |
#size-cells = <0x00000001>; | |
#address-cells = <0x00000001>; | |
pagesize = <0x00010000>; | |
size = <0x00200000>; | |
address-width = <0x00000018>; | |
partition@0 { | |
reg = <0x00000000 0x00300000>; | |
label = "boot0"; | |
read-only; | |
}; | |
partition@300000 { | |
reg = <0x00300000 0x00100000>; | |
label = "dummy"; | |
read-only; | |
}; | |
partition@400000 { | |
reg = <0x00400000 0x00010000>; | |
label = "eeprom"; | |
}; | |
}; | |
}; | |
ocla0@11800A8000000 { | |
compatible = "cavium,octeon-7130-ocla"; | |
reg = <0x00011800 0xa8000000 0x00000000 0x00500000>; | |
interrupt-parent = <0x0000000a>; | |
interrupts = <0x00000008 0x00000001 0x00000009 0x00000001 0x0000000b 0x00000001>; | |
}; | |
dma-engine@1180000000100 { | |
compatible = "cavium,octeon-5750-bootbus-dma"; | |
reg = <0x00011800 0x00000100 0x00000000 0x00000008>; | |
interrupts = <0x00000000 0x0000003f>; | |
}; | |
dma-engine@1180000000108 { | |
compatible = "cavium,octeon-5750-bootbus-dma"; | |
reg = <0x00011800 0x00000108 0x00000000 0x00000008>; | |
interrupts = <0x00000000 0x0000003f>; | |
}; | |
}; | |
gpio-leds { | |
compatible = "gpio-leds"; | |
d1 { | |
label = "Yellow"; | |
gpios = <0x00000002 0x0000000b 0x00000000>; | |
default-state = "keep"; | |
}; | |
}; | |
aliases { | |
pip = "/soc@0/pip@11800a0000000"; | |
smi0 = "/soc@0/mdio@1180000001800"; | |
twsi0 = "/soc@0/i2c@1180000001000"; | |
twsi1 = "/soc@0/i2c@1180000001200"; | |
uart0 = "/soc@0/serial@1180000000800"; | |
uart1 = "/soc@0/serial@1180000000c00"; | |
emmc = "/soc@0/mmc@1180000002000"; | |
spi = "/soc@0/spi@1070000001000"; | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
/* NOP */ | |
}; | |
}; |
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