TRAKR SPI Sniffing #Hardware #Hacking #Reverse-Engineering

trakr-remote-startup.txt

# TRAKR Remote Startup Radio SPI Traffic #

This is about 1.5 seconds of SPI traffic starting at the moment
the remote is powered up. It is hoped that this information will
be useful for reverse engineering the radio protocol being used.

The following was logged by Robert Quattlebaum.
He does interesting stuff at <http://www.deepdarc.com/>.

## Timeline Summary ##

0000-0040: Radio Setup
	EN_AA = 0 // Disable Auto-Ack
	SETUP_AW = 02 // 4-byte addresses
	EN_RXADDR = 01 // enable data-pipe 0
	SETUP_RETR = 2F // max 15 auto retransmits, 750µS between
	RF_CH = 2458MHz
	RF_SETUP = 0E // 2Mbps TX: 0dB
	RX_PW_P0 = 20 // data-pipe 0 rx payload has 32 bytes
	CONFIG = 0E // EN_CRC|CRCO|PWR_UP // Two-byte crc, power-on, TX mode
	STATUS = 70 // Clear RX_DR,TX_DR,MAX_RT

0041-0078: Botched Discovery
	TX_ADDR = 00 00 00 00
	RX_ADDR_P0 = 00 00 00 00
	RF_CH = 2460MHz
	.. Listen for payload ...
	RX: 0000FFFF0000205F000000000000000B00000000000000000000000000000000 
	CONFIG = 0E // Enter TX mode
	TX: 0000FEFF0000205F00039CAE0000000B00000010000013880000000000000000 
	TX: 0000FEFF0000205F00039CAE0000000B00000010000013880000000000000000 
	TX: 0000FEFF0000205F00039CAE0000000B00000010000013880000000000000000 
	TX: 0000FEFF0000205F00039CAE0000000B00000010000013880000000000000000 
	TX: 0000FEFF0000205F00039CAE0000000B00000010000013880000000000000000 
	TX: 0000FEFF0000205F00039CAE0000000B00000010000013880000000000000000 
	TX: 0000FEFF0000205F00039CAE0000000B00000010000013880000000000000000 
	TX: 0000FEFF0000205F00039CAE0000000B00000010000013880000000000000000 
	TX_ADDR = AE 9C 03 00 
	RX_ADDR_P0 = AE 9C 03 00 
	.. Listen for response for 62ms ...
	.. Give up ...

0079-1556: Successful Discovery
	TX_ADDR = 00 00 00 00
	RX_ADDR_P0 = 00 00 00 00
	RF_CH = 2450MHz
	.. Listen for payload for 24ms ...
	RF_CH = 2425MHz
	.. Listen for payload for 24ms ...
	RF_CH = 2455MHz
	.. Listen for payload for 12.7ms ...
	RX: 0000FFFF0000208B000000000000000A00000000000000000000000000000000
	TX: 0000FEFF0000208B00039CB40000000A00000010000013880000000000000000
	 ^-- repeat 11 more times
	TX_ADDR = B4 9C 03 00 
	RX_ADDR_P0 = B4 9C 03 00 
	.. listen for payload for 8.6ms ...
	RX: 000000FF0000208B000000000000000A000000000000000000010001061907DA 
		The last 8 bytes of this packet is the version and compile
		date for the firmware on the vehicle in BIG ENDIAN order. It
		breaks down like this:
		00010001061907DA
		VVVVSSSSMMDDYYYY
		V = Major Version (1)
		S = Minor Version (1)
		M = Month (6)
		D = Day (25)
		Y = Year (2011)
	TX: 000000FF0000208B000000000000000A000000000000000000010001061907DA 
	RX: 000000FF0000208B000000000000000A000100010000000000010001061907DA
	TX: 000000FF0000208B000000000000000A000100010000000000010001061907DA 
	RX: 000000FF0000208B000000000000000A000200020000000000010001061907DA 
	TX: 000000FF0000208B000000000000000A000200020000000000010001061907DA
	...
	RX: 000000FF0000208B000000000000000A006400640000000000010001061907DA 
	TX: 000000FF0000208B000000000000000A006400640000000000010001061907DA 
	RX: 000000FF0000208B000000000000000A006500650000000000010001061907DA 
	TX: 000000FF0000208B000000000000000A006500650000000000010001061907DA 

1557-1697: Unknown transaction
	TX: 0000FEFF0000208B00039CB40000000A000000100000138800010001061907DA 
	 ^-- Repeat every 3.5ms until we get a response...
	RX: 000102FF0000000C000001000060000300000000000000000000000000000002
	TX: 000180FF0000000C000100000000000000000000000000000000000000000000 

1697-1833: Data Transfer from vehicle to remote
	RX: FC120081F3FF0000184772BFAAB99182030180BFA038AA3021904671AFBBACB0
	RX: 3310000149CC1310894382989DBBDB22103523AD0B98AB14E13B33300EBAACE9
	RX: 13420002AA8B81150D832201C9AB8EB01453222C888C8AA1F28B83340C9B999C
	RX: 36020181129D01118C91173180D9A8B82882793B52010994ABC8C03810818DA8
	RX: 92160101403B9922BFA18117A338AB889810A27911173A81980FF09133A12089
	RX: 083A01024131C07A90CF21994283189A110043881882287199C92AF918271130
	RX: 31130281A915051ABA0BACC0A533924015061813EC9AC2200881A999632831B0
	RX: 54130201A89F8419990099B902299887102152259CCACBA8031231B152152CB5
	  -- 421.1us pass --
	RX: 000108FF0000000C000001000060000300000000000000000000000000000002
	TX: 000110FFF0000002000100000000000000000000000000000000000000000000
	  -- 368.2us pass --
	RX: 31130281A915051ABA0BACC0A533924015061813EC9AC2200881A999632831B0
	RX: 54130201A89F8419990099B902299887102152259CCACBA8031231B152152CB5
	RX: 381102020BFAAEA9883290883817883300001115000000000000000000000000
	RX: 000108FF0000000C000001000060000300000000000000000000000000000002
	TX: 000180FF0000000C000100000000000000000000000000000000000000000000
	  -- 368.9us pass --
	  -- 797.1us pass --
	RX: 000102FF0000000D000000080060000100000000000000000000000000000002
	TX: 000180FF0000000D000100000000000000000000000000000000000000000000
	  -- 3.1ms pass --
	RX: 5542008100005953000000000000000000000000000000000000000000000000
	RX: 0000000100000000000000000000000000000000000000000000000000000000
	RX: 0000000200000000000000000000000000000000000000000000000000000000
	RX: 000108FF0000000D000000080060000100000000000000000000000000000002
	TX: 000180FF0000000D000100000000000000000000000000000000000000000000
	  -- 369.0us pass --

## Actual Transactions ##

0000: W_REGISTER: CONFIG = 0C 
0001: R_REGISTER: CONFIG is 0C 
0002: W_REGISTER: EN_AA = 00 
0003: W_REGISTER: SETUP_AW = 02 
0004: W_REGISTER: EN_RXADDR = 01 
0005: W_REGISTER: SETUP_RETR = 2F 
0006: W_REGISTER: RF_CH = 2420MHz (14)
0007: R_REGISTER: RF_CH is 2420MHz (14)
0008: W_REGISTER: RF_CH = 2458MHz (3A)
0009: R_REGISTER: RF_CH is 2458MHz (3A)
0010: W_REGISTER: RF_SETUP = 0E 
0011: R_REGISTER: RF_SETUP is 0E 
0012: W_REGISTER: RX_PW_P0 = 20 
0013: R_REGISTER: RX_PW_P0 is 20 
0014: W_REGISTER: STATUS = 70 
0015: W_REGISTER: CONFIG = 0E 
0016: FLUSH_TX
0017: FLUSH_RX
0018: W_REGISTER: CONFIG = 0F 
0019: FLUSH_TX
0020: FLUSH_RX
0021: W_REGISTER: STATUS = 70 
  -- 551.2ms pass --
0022: W_REGISTER: RF_CH = 2405MHz (05)
  -- 7.1ms pass --
0023: W_REGISTER: CONFIG = 0C 
0024: R_REGISTER: CONFIG is 0C 
  -- 123.8us pass --
0025: W_REGISTER: EN_AA = 00 
0026: W_REGISTER: SETUP_AW = 02 
0027: W_REGISTER: EN_RXADDR = 01 
0028: W_REGISTER: SETUP_RETR = 2F 
0029: W_REGISTER: RF_CH = 2420MHz (14)
0030: R_REGISTER: RF_CH is 2420MHz (14)
  -- 0.9ms pass --
0031: W_REGISTER: RF_CH = 2458MHz (3A)
0032: R_REGISTER: RF_CH is 2458MHz (3A)
0033: W_REGISTER: RF_SETUP = 0E 
0034: R_REGISTER: RF_SETUP is 0E 
0035: W_REGISTER: RX_PW_P0 = 20 
0036: R_REGISTER: RX_PW_P0 is 20 
0037: W_REGISTER: STATUS = 70 
0038: W_REGISTER: CONFIG = 0E 
0039: FLUSH_TX
0040: FLUSH_RX
  -- 380.2us pass --
0041: W_REGISTER: TX_ADDR = 00 00 00 00 
  -- 409.3us pass --
0042: W_REGISTER: RX_ADDR_P0 = 00 00 00 00 
  -- 316.9us pass --
0043: W_REGISTER: RF_CH = 2460MHz (3C)
  -- 105.6us pass --
0044: W_REGISTER: CONFIG = 0F 
0045: FLUSH_TX
0046: FLUSH_RX
0047: W_REGISTER: STATUS = 70 
  -- 12.1ms pass --
0048: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
  -- 135.6us pass --
0049: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 FF FF 00 00 20 5F 00 00 00 00 00 00 00 0B 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 237.6us pass --
0050: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0051: [RX_DR] W_REGISTER: STATUS = 70 
  -- 198.5us pass --
0052: W_REGISTER: CONFIG = 0E 
0053: FLUSH_TX
0054: FLUSH_RX
0055: W_REGISTER: STATUS = 70 
  -- 154.7us pass --
0056: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 5F 00 03 9C AE 00 00 00 0B 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 706.4us pass --
0057: [TX_DS] W_REGISTER: STATUS = 70 
0058: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 5F 00 03 9C AE 00 00 00 0B 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 469.8us pass --
0059: [TX_DS] W_REGISTER: STATUS = 70 
0060: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 5F 00 03 9C AE 00 00 00 0B 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 449.4us pass --
0061: [TX_DS] W_REGISTER: STATUS = 70 
0062: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 5F 00 03 9C AE 00 00 00 0B 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 469.0us pass --
0063: [TX_DS] W_REGISTER: STATUS = 70 
0064: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 5F 00 03 9C AE 00 00 00 0B 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 481.1us pass --
0065: [TX_DS] W_REGISTER: STATUS = 70 
0066: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 5F 00 03 9C AE 00 00 00 0B 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 439.8us pass --
0067: [TX_DS] W_REGISTER: STATUS = 70 
0068: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 5F 00 03 9C AE 00 00 00 0B 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 366.3us pass --
0069: [TX_DS] W_REGISTER: STATUS = 70 
0070: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 5F 00 03 9C AE 00 00 00 0B 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 366.9us pass --
0071: [TX_DS] W_REGISTER: STATUS = 70 
0072: W_REGISTER: TX_ADDR = AE 9C 03 00 
0073: W_REGISTER: RX_ADDR_P0 = AE 9C 03 00 
0074: W_REGISTER: CONFIG = 0F 
0075: FLUSH_TX
0076: FLUSH_RX
0077: W_REGISTER: STATUS = 70 
  -- 62.7ms pass --
0078: W_REGISTER: TX_ADDR = 00 00 00 00 
0079: W_REGISTER: RX_ADDR_P0 = 00 00 00 00 
0080: W_REGISTER: RF_CH = 2450MHz (32)
0081: W_REGISTER: CONFIG = 0F 
0082: FLUSH_TX
0083: FLUSH_RX
0084: W_REGISTER: STATUS = 70 
  -- 24.1ms pass --
0085: W_REGISTER: RF_CH = 2425MHz (19)
0086: W_REGISTER: CONFIG = 0F 
0087: FLUSH_TX
0088: FLUSH_RX
0089: W_REGISTER: STATUS = 70 
  -- 24.1ms pass --
0090: W_REGISTER: RF_CH = 2455MHz (37)
0091: W_REGISTER: CONFIG = 0F 
0092: FLUSH_TX
0093: FLUSH_RX
0094: W_REGISTER: STATUS = 70 
  -- 12.7ms pass --
0095: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0096: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 FF FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
0097: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0098: [RX_DR] W_REGISTER: STATUS = 70 
0099: W_REGISTER: CONFIG = 0E 
0100: FLUSH_TX
0101: FLUSH_RX
0102: W_REGISTER: STATUS = 70 
0103: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 368.6us pass --
0104: [TX_DS] W_REGISTER: STATUS = 70 
0105: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 366.9us pass --
0106: [TX_DS] W_REGISTER: STATUS = 70 
0107: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 366.3us pass --
0108: [TX_DS] W_REGISTER: STATUS = 70 
0109: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 366.2us pass --
0110: [TX_DS] W_REGISTER: STATUS = 70 
0111: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 366.3us pass --
0112: [TX_DS] W_REGISTER: STATUS = 70 
0113: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 366.0us pass --
0114: [TX_DS] W_REGISTER: STATUS = 70 
0115: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 366.3us pass --
0116: [TX_DS] W_REGISTER: STATUS = 70 
0117: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 366.3us pass --
0118: [TX_DS] W_REGISTER: STATUS = 70 
0119: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 366.2us pass --
0120: [TX_DS] W_REGISTER: STATUS = 70 
0121: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 366.3us pass --
0122: [TX_DS] W_REGISTER: STATUS = 70 
0123: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 367.1us pass --
0124: [TX_DS] W_REGISTER: STATUS = 70 
0125: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 00 00 00 00 00 00 00 
  -- 366.2us pass --
0126: [TX_DS] W_REGISTER: STATUS = 70 
0127: W_REGISTER: TX_ADDR = B4 9C 03 00 
0128: W_REGISTER: RX_ADDR_P0 = B4 9C 03 00 
0129: W_REGISTER: CONFIG = 0F 
0130: FLUSH_TX
0131: FLUSH_RX
0132: W_REGISTER: STATUS = 70 
  -- 8.6ms pass --
0133: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0134: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 01 06 19 07 DA 
0135: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0136: [RX_DR] W_REGISTER: STATUS = 70 
0137: W_REGISTER: CONFIG = 0E 
0138: FLUSH_TX
0139: FLUSH_RX
0140: W_REGISTER: STATUS = 70 
0141: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 367.7us pass --
0142: [TX_DS] W_REGISTER: STATUS = 70 
0143: W_REGISTER: CONFIG = 0F 
0144: FLUSH_TX
0145: FLUSH_RX
0146: W_REGISTER: STATUS = 70 
  -- 678.8us pass --
0147: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0148: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 01 00 01 00 00 00 00 00 01 00 01 06 19 07 DA 
0149: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0150: [RX_DR] W_REGISTER: STATUS = 70 
0151: W_REGISTER: CONFIG = 0E 
0152: FLUSH_TX
0153: FLUSH_RX
0154: W_REGISTER: STATUS = 70 
0155: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 01 00 01 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 367.1us pass --
0156: [TX_DS] W_REGISTER: STATUS = 70 
0157: W_REGISTER: CONFIG = 0F 
0158: FLUSH_TX
0159: FLUSH_RX
0160: W_REGISTER: STATUS = 70 
  -- 678.3us pass --
0161: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0162: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 02 00 02 00 00 00 00 00 01 00 01 06 19 07 DA 
0163: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0164: [RX_DR] W_REGISTER: STATUS = 70 
0165: W_REGISTER: CONFIG = 0E 
0166: FLUSH_TX
0167: FLUSH_RX
0168: W_REGISTER: STATUS = 70 
0169: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 02 00 02 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
0170: [TX_DS] W_REGISTER: STATUS = 70 
0171: W_REGISTER: CONFIG = 0F 
0172: FLUSH_TX
0173: FLUSH_RX
0174: W_REGISTER: STATUS = 70 
  -- 682.9us pass --
0175: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0176: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 03 00 03 00 00 00 00 00 01 00 01 06 19 07 DA 
0177: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0178: [RX_DR] W_REGISTER: STATUS = 70 
0179: W_REGISTER: CONFIG = 0E 
0180: FLUSH_TX
0181: FLUSH_RX
0182: W_REGISTER: STATUS = 70 
0183: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 03 00 03 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.4us pass --
0184: [TX_DS] W_REGISTER: STATUS = 70 
0185: W_REGISTER: CONFIG = 0F 
0186: FLUSH_TX
0187: FLUSH_RX
0188: W_REGISTER: STATUS = 70 
  -- 685.6us pass --
0189: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0190: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 04 00 04 00 00 00 00 00 01 00 01 06 19 07 DA 
0191: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0192: [RX_DR] W_REGISTER: STATUS = 70 
0193: W_REGISTER: CONFIG = 0E 
0194: FLUSH_TX
0195: FLUSH_RX
0196: W_REGISTER: STATUS = 70 
0197: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 04 00 04 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.0us pass --
0198: [TX_DS] W_REGISTER: STATUS = 70 
0199: W_REGISTER: CONFIG = 0F 
0200: FLUSH_TX
0201: FLUSH_RX
0202: W_REGISTER: STATUS = 70 
  -- 698.0us pass --
0203: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0204: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 05 00 05 00 00 00 00 00 01 00 01 06 19 07 DA 
0205: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0206: [RX_DR] W_REGISTER: STATUS = 70 
0207: W_REGISTER: CONFIG = 0E 
0208: FLUSH_TX
0209: FLUSH_RX
0210: W_REGISTER: STATUS = 70 
0211: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 05 00 05 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.4us pass --
0212: [TX_DS] W_REGISTER: STATUS = 70 
0213: W_REGISTER: CONFIG = 0F 
0214: FLUSH_TX
0215: FLUSH_RX
0216: W_REGISTER: STATUS = 70 
  -- 678.9us pass --
0217: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0218: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 06 00 06 00 00 00 00 00 01 00 01 06 19 07 DA 
0219: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0220: [RX_DR] W_REGISTER: STATUS = 70 
0221: W_REGISTER: CONFIG = 0E 
0222: FLUSH_TX
0223: FLUSH_RX
0224: W_REGISTER: STATUS = 70 
0225: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 06 00 06 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0226: [TX_DS] W_REGISTER: STATUS = 70 
0227: W_REGISTER: CONFIG = 0F 
0228: FLUSH_TX
0229: FLUSH_RX
0230: W_REGISTER: STATUS = 70 
  -- 680.8us pass --
0231: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0232: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 07 00 07 00 00 00 00 00 01 00 01 06 19 07 DA 
0233: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0234: [RX_DR] W_REGISTER: STATUS = 70 
0235: W_REGISTER: CONFIG = 0E 
0236: FLUSH_TX
0237: FLUSH_RX
0238: W_REGISTER: STATUS = 70 
0239: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 07 00 07 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0240: [TX_DS] W_REGISTER: STATUS = 70 
0241: W_REGISTER: CONFIG = 0F 
0242: FLUSH_TX
0243: FLUSH_RX
0244: W_REGISTER: STATUS = 70 
  -- 686.7us pass --
0245: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0246: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 08 00 08 00 00 00 00 00 01 00 01 06 19 07 DA 
0247: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0248: [RX_DR] W_REGISTER: STATUS = 70 
0249: W_REGISTER: CONFIG = 0E 
0250: FLUSH_TX
0251: FLUSH_RX
0252: W_REGISTER: STATUS = 70 
0253: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 08 00 08 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
0254: [TX_DS] W_REGISTER: STATUS = 70 
0255: W_REGISTER: CONFIG = 0F 
0256: FLUSH_TX
0257: FLUSH_RX
0258: W_REGISTER: STATUS = 70 
  -- 684.8us pass --
0259: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0260: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 09 00 09 00 00 00 00 00 01 00 01 06 19 07 DA 
0261: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0262: [RX_DR] W_REGISTER: STATUS = 70 
0263: W_REGISTER: CONFIG = 0E 
0264: FLUSH_TX
0265: FLUSH_RX
0266: W_REGISTER: STATUS = 70 
0267: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 09 00 09 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.9us pass --
0268: [TX_DS] W_REGISTER: STATUS = 70 
0269: W_REGISTER: CONFIG = 0F 
0270: FLUSH_TX
0271: FLUSH_RX
0272: W_REGISTER: STATUS = 70 
  -- 691.0us pass --
0273: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0274: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 0A 00 0A 00 00 00 00 00 01 00 01 06 19 07 DA 
0275: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0276: [RX_DR] W_REGISTER: STATUS = 70 
0277: W_REGISTER: CONFIG = 0E 
0278: FLUSH_TX
0279: FLUSH_RX
0280: W_REGISTER: STATUS = 70 
0281: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 0A 00 0A 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.7us pass --
0282: [TX_DS] W_REGISTER: STATUS = 70 
0283: W_REGISTER: CONFIG = 0F 
0284: FLUSH_TX
0285: FLUSH_RX
0286: W_REGISTER: STATUS = 70 
  -- 682.4us pass --
0287: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0288: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 0B 00 0B 00 00 00 00 00 01 00 01 06 19 07 DA 
0289: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0290: [RX_DR] W_REGISTER: STATUS = 70 
0291: W_REGISTER: CONFIG = 0E 
0292: FLUSH_TX
0293: FLUSH_RX
0294: W_REGISTER: STATUS = 70 
0295: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 0B 00 0B 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.9us pass --
0296: [TX_DS] W_REGISTER: STATUS = 70 
0297: W_REGISTER: CONFIG = 0F 
0298: FLUSH_TX
0299: FLUSH_RX
0300: W_REGISTER: STATUS = 70 
  -- 683.9us pass --
0301: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0302: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 0C 00 0C 00 00 00 00 00 01 00 01 06 19 07 DA 
0303: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0304: [RX_DR] W_REGISTER: STATUS = 70 
0305: W_REGISTER: CONFIG = 0E 
0306: FLUSH_TX
0307: FLUSH_RX
0308: W_REGISTER: STATUS = 70 
0309: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 0C 00 0C 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0310: [TX_DS] W_REGISTER: STATUS = 70 
0311: W_REGISTER: CONFIG = 0F 
0312: FLUSH_TX
0313: FLUSH_RX
0314: W_REGISTER: STATUS = 70 
  -- 686.0us pass --
0315: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0316: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 0D 00 0D 00 00 00 00 00 01 00 01 06 19 07 DA 
0317: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0318: [RX_DR] W_REGISTER: STATUS = 70 
0319: W_REGISTER: CONFIG = 0E 
0320: FLUSH_TX
0321: FLUSH_RX
0322: W_REGISTER: STATUS = 70 
0323: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 0D 00 0D 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.7us pass --
0324: [TX_DS] W_REGISTER: STATUS = 70 
0325: W_REGISTER: CONFIG = 0F 
0326: FLUSH_TX
0327: FLUSH_RX
0328: W_REGISTER: STATUS = 70 
  -- 687.2us pass --
0329: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0330: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 0E 00 0E 00 00 00 00 00 01 00 01 06 19 07 DA 
0331: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0332: [RX_DR] W_REGISTER: STATUS = 70 
0333: W_REGISTER: CONFIG = 0E 
0334: FLUSH_TX
0335: FLUSH_RX
0336: W_REGISTER: STATUS = 70 
0337: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 0E 00 0E 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
0338: [TX_DS] W_REGISTER: STATUS = 70 
0339: W_REGISTER: CONFIG = 0F 
0340: FLUSH_TX
0341: FLUSH_RX
0342: W_REGISTER: STATUS = 70 
  -- 698.5us pass --
0343: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0344: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 0F 00 0F 00 00 00 00 00 01 00 01 06 19 07 DA 
0345: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0346: [RX_DR] W_REGISTER: STATUS = 70 
0347: W_REGISTER: CONFIG = 0E 
0348: FLUSH_TX
0349: FLUSH_RX
0350: W_REGISTER: STATUS = 70 
0351: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 0F 00 0F 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.6us pass --
0352: [TX_DS] W_REGISTER: STATUS = 70 
0353: W_REGISTER: CONFIG = 0F 
0354: FLUSH_TX
0355: FLUSH_RX
0356: W_REGISTER: STATUS = 70 
  -- 679.4us pass --
0357: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0358: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 10 00 10 00 00 00 00 00 01 00 01 06 19 07 DA 
0359: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0360: [RX_DR] W_REGISTER: STATUS = 70 
0361: W_REGISTER: CONFIG = 0E 
0362: FLUSH_TX
0363: FLUSH_RX
0364: W_REGISTER: STATUS = 70 
0365: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 10 00 10 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.9us pass --
0366: [TX_DS] W_REGISTER: STATUS = 70 
0367: W_REGISTER: CONFIG = 0F 
0368: FLUSH_TX
0369: FLUSH_RX
0370: W_REGISTER: STATUS = 70 
  -- 679.1us pass --
0371: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0372: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 11 00 11 00 00 00 00 00 01 00 01 06 19 07 DA 
0373: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0374: [RX_DR] W_REGISTER: STATUS = 70 
0375: W_REGISTER: CONFIG = 0E 
0376: FLUSH_TX
0377: FLUSH_RX
0378: W_REGISTER: STATUS = 70 
0379: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 11 00 11 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0380: [TX_DS] W_REGISTER: STATUS = 70 
0381: W_REGISTER: CONFIG = 0F 
0382: FLUSH_TX
0383: FLUSH_RX
0384: W_REGISTER: STATUS = 70 
  -- 686.4us pass --
0385: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0386: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 12 00 12 00 00 00 00 00 01 00 01 06 19 07 DA 
0387: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0388: [RX_DR] W_REGISTER: STATUS = 70 
0389: W_REGISTER: CONFIG = 0E 
0390: FLUSH_TX
0391: FLUSH_RX
0392: W_REGISTER: STATUS = 70 
0393: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 12 00 12 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.4us pass --
0394: [TX_DS] W_REGISTER: STATUS = 70 
0395: W_REGISTER: CONFIG = 0F 
0396: FLUSH_TX
0397: FLUSH_RX
0398: W_REGISTER: STATUS = 70 
  -- 685.1us pass --
0399: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0400: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 13 00 13 00 00 00 00 00 01 00 01 06 19 07 DA 
0401: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0402: [RX_DR] W_REGISTER: STATUS = 70 
0403: W_REGISTER: CONFIG = 0E 
0404: FLUSH_TX
0405: FLUSH_RX
0406: W_REGISTER: STATUS = 70 
0407: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 13 00 13 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.4us pass --
0408: [TX_DS] W_REGISTER: STATUS = 70 
0409: W_REGISTER: CONFIG = 0F 
0410: FLUSH_TX
0411: FLUSH_RX
0412: W_REGISTER: STATUS = 70 
  -- 698.3us pass --
0413: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0414: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 14 00 14 00 00 00 00 00 01 00 01 06 19 07 DA 
0415: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0416: [RX_DR] W_REGISTER: STATUS = 70 
0417: W_REGISTER: CONFIG = 0E 
0418: FLUSH_TX
0419: FLUSH_RX
0420: W_REGISTER: STATUS = 70 
0421: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 14 00 14 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.7us pass --
0422: [TX_DS] W_REGISTER: STATUS = 70 
0423: W_REGISTER: CONFIG = 0F 
0424: FLUSH_TX
0425: FLUSH_RX
0426: W_REGISTER: STATUS = 70 
  -- 678.6us pass --
0427: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0428: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 15 00 15 00 00 00 00 00 01 00 01 06 19 07 DA 
0429: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0430: [RX_DR] W_REGISTER: STATUS = 70 
0431: W_REGISTER: CONFIG = 0E 
0432: FLUSH_TX
0433: FLUSH_RX
0434: W_REGISTER: STATUS = 70 
0435: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 15 00 15 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
0436: [TX_DS] W_REGISTER: STATUS = 70 
0437: W_REGISTER: CONFIG = 0F 
0438: FLUSH_TX
0439: FLUSH_RX
0440: W_REGISTER: STATUS = 70 
  -- 681.4us pass --
0441: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0442: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 16 00 16 00 00 00 00 00 01 00 01 06 19 07 DA 
0443: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0444: [RX_DR] W_REGISTER: STATUS = 70 
0445: W_REGISTER: CONFIG = 0E 
0446: FLUSH_TX
0447: FLUSH_RX
0448: W_REGISTER: STATUS = 70 
0449: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 16 00 16 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0450: [TX_DS] W_REGISTER: STATUS = 70 
0451: W_REGISTER: CONFIG = 0F 
0452: FLUSH_TX
0453: FLUSH_RX
0454: W_REGISTER: STATUS = 70 
  -- 686.4us pass --
0455: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0456: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 17 00 17 00 00 00 00 00 01 00 01 06 19 07 DA 
0457: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0458: [RX_DR] W_REGISTER: STATUS = 70 
0459: W_REGISTER: CONFIG = 0E 
0460: FLUSH_TX
0461: FLUSH_RX
0462: W_REGISTER: STATUS = 70 
0463: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 17 00 17 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
0464: [TX_DS] W_REGISTER: STATUS = 70 
0465: W_REGISTER: CONFIG = 0F 
0466: FLUSH_TX
0467: FLUSH_RX
0468: W_REGISTER: STATUS = 70 
  -- 687.2us pass --
0469: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0470: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 18 00 18 00 00 00 00 00 01 00 01 06 19 07 DA 
0471: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0472: [RX_DR] W_REGISTER: STATUS = 70 
0473: W_REGISTER: CONFIG = 0E 
0474: FLUSH_TX
0475: FLUSH_RX
0476: W_REGISTER: STATUS = 70 
0477: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 18 00 18 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.7us pass --
0478: [TX_DS] W_REGISTER: STATUS = 70 
0479: W_REGISTER: CONFIG = 0F 
0480: FLUSH_TX
0481: FLUSH_RX
0482: W_REGISTER: STATUS = 70 
  -- 696.8us pass --
0483: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0484: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 19 00 19 00 00 00 00 00 01 00 01 06 19 07 DA 
0485: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0486: [RX_DR] W_REGISTER: STATUS = 70 
0487: W_REGISTER: CONFIG = 0E 
0488: FLUSH_TX
0489: FLUSH_RX
0490: W_REGISTER: STATUS = 70 
0491: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 19 00 19 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
0492: [TX_DS] W_REGISTER: STATUS = 70 
0493: W_REGISTER: CONFIG = 0F 
0494: FLUSH_TX
0495: FLUSH_RX
0496: W_REGISTER: STATUS = 70 
  -- 678.1us pass --
0497: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0498: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 1A 00 1A 00 00 00 00 00 01 00 01 06 19 07 DA 
0499: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0500: [RX_DR] W_REGISTER: STATUS = 70 
0501: W_REGISTER: CONFIG = 0E 
0502: FLUSH_TX
0503: FLUSH_RX
0504: W_REGISTER: STATUS = 70 
0505: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 1A 00 1A 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 367.0us pass --
0506: [TX_DS] W_REGISTER: STATUS = 70 
0507: W_REGISTER: CONFIG = 0F 
0508: FLUSH_TX
0509: FLUSH_RX
0510: W_REGISTER: STATUS = 70 
  -- 681.2us pass --
0511: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0512: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 1B 00 1B 00 00 00 00 00 01 00 01 06 19 07 DA 
0513: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0514: [RX_DR] W_REGISTER: STATUS = 70 
0515: W_REGISTER: CONFIG = 0E 
0516: FLUSH_TX
0517: FLUSH_RX
0518: W_REGISTER: STATUS = 70 
0519: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 1B 00 1B 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0520: [TX_DS] W_REGISTER: STATUS = 70 
0521: W_REGISTER: CONFIG = 0F 
0522: FLUSH_TX
0523: FLUSH_RX
0524: W_REGISTER: STATUS = 70 
  -- 678.1us pass --
0525: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0526: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 1C 00 1C 00 00 00 00 00 01 00 01 06 19 07 DA 
0527: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0528: [RX_DR] W_REGISTER: STATUS = 70 
0529: W_REGISTER: CONFIG = 0E 
0530: FLUSH_TX
0531: FLUSH_RX
0532: W_REGISTER: STATUS = 70 
0533: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 1C 00 1C 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0534: [TX_DS] W_REGISTER: STATUS = 70 
0535: W_REGISTER: CONFIG = 0F 
0536: FLUSH_TX
0537: FLUSH_RX
0538: W_REGISTER: STATUS = 70 
  -- 678.8us pass --
0539: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0540: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 1D 00 1D 00 00 00 00 00 01 00 01 06 19 07 DA 
0541: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0542: [RX_DR] W_REGISTER: STATUS = 70 
0543: W_REGISTER: CONFIG = 0E 
0544: FLUSH_TX
0545: FLUSH_RX
0546: W_REGISTER: STATUS = 70 
0547: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 1D 00 1D 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.4us pass --
0548: [TX_DS] W_REGISTER: STATUS = 70 
0549: W_REGISTER: CONFIG = 0F 
0550: FLUSH_TX
0551: FLUSH_RX
0552: W_REGISTER: STATUS = 70 
  -- 685.1us pass --
0553: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0554: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 1E 00 1E 00 00 00 00 00 01 00 01 06 19 07 DA 
0555: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0556: [RX_DR] W_REGISTER: STATUS = 70 
0557: W_REGISTER: CONFIG = 0E 
0558: FLUSH_TX
0559: FLUSH_RX
0560: W_REGISTER: STATUS = 70 
0561: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 1E 00 1E 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
0562: [TX_DS] W_REGISTER: STATUS = 70 
0563: W_REGISTER: CONFIG = 0F 
0564: FLUSH_TX
0565: FLUSH_RX
0566: W_REGISTER: STATUS = 70 
  -- 679.4us pass --
0567: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0568: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 1F 00 1F 00 00 00 00 00 01 00 01 06 19 07 DA 
0569: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0570: [RX_DR] W_REGISTER: STATUS = 70 
0571: W_REGISTER: CONFIG = 0E 
0572: FLUSH_TX
0573: FLUSH_RX
0574: W_REGISTER: STATUS = 70 
0575: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 1F 00 1F 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0576: [TX_DS] W_REGISTER: STATUS = 70 
0577: W_REGISTER: CONFIG = 0F 
0578: FLUSH_TX
0579: FLUSH_RX
0580: W_REGISTER: STATUS = 70 
  -- 690.8us pass --
0581: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0582: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 20 00 20 00 00 00 00 00 01 00 01 06 19 07 DA 
0583: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0584: [RX_DR] W_REGISTER: STATUS = 70 
0585: W_REGISTER: CONFIG = 0E 
0586: FLUSH_TX
0587: FLUSH_RX
0588: W_REGISTER: STATUS = 70 
0589: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 20 00 20 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0590: [TX_DS] W_REGISTER: STATUS = 70 
0591: W_REGISTER: CONFIG = 0F 
0592: FLUSH_TX
0593: FLUSH_RX
0594: W_REGISTER: STATUS = 70 
  -- 679.3us pass --
0595: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0596: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 21 00 21 00 00 00 00 00 01 00 01 06 19 07 DA 
0597: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0598: [RX_DR] W_REGISTER: STATUS = 70 
0599: W_REGISTER: CONFIG = 0E 
0600: FLUSH_TX
0601: FLUSH_RX
0602: W_REGISTER: STATUS = 70 
0603: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 21 00 21 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.7us pass --
0604: [TX_DS] W_REGISTER: STATUS = 70 
0605: W_REGISTER: CONFIG = 0F 
0606: FLUSH_TX
0607: FLUSH_RX
0608: W_REGISTER: STATUS = 70 
  -- 681.2us pass --
0609: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0610: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 22 00 22 00 00 00 00 00 01 00 01 06 19 07 DA 
0611: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0612: [RX_DR] W_REGISTER: STATUS = 70 
0613: W_REGISTER: CONFIG = 0E 
0614: FLUSH_TX
0615: FLUSH_RX
0616: W_REGISTER: STATUS = 70 
0617: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 22 00 22 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.6us pass --
0618: [TX_DS] W_REGISTER: STATUS = 70 
0619: W_REGISTER: CONFIG = 0F 
0620: FLUSH_TX
0621: FLUSH_RX
0622: W_REGISTER: STATUS = 70 
  -- 685.0us pass --
0623: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0624: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 23 00 23 00 00 00 00 00 01 00 01 06 19 07 DA 
0625: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0626: [RX_DR] W_REGISTER: STATUS = 70 
0627: W_REGISTER: CONFIG = 0E 
0628: FLUSH_TX
0629: FLUSH_RX
0630: W_REGISTER: STATUS = 70 
0631: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 23 00 23 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
0632: [TX_DS] W_REGISTER: STATUS = 70 
0633: W_REGISTER: CONFIG = 0F 
0634: FLUSH_TX
0635: FLUSH_RX
0636: W_REGISTER: STATUS = 70 
  -- 688.4us pass --
0637: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0638: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 24 00 24 00 00 00 00 00 01 00 01 06 19 07 DA 
0639: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0640: [RX_DR] W_REGISTER: STATUS = 70 
0641: W_REGISTER: CONFIG = 0E 
0642: FLUSH_TX
0643: FLUSH_RX
0644: W_REGISTER: STATUS = 70 
0645: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 24 00 24 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
0646: [TX_DS] W_REGISTER: STATUS = 70 
0647: W_REGISTER: CONFIG = 0F 
0648: FLUSH_TX
0649: FLUSH_RX
0650: W_REGISTER: STATUS = 70 
  -- 695.6us pass --
0651: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0652: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 25 00 25 00 00 00 00 00 01 00 01 06 19 07 DA 
0653: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0654: [RX_DR] W_REGISTER: STATUS = 70 
0655: W_REGISTER: CONFIG = 0E 
0656: FLUSH_TX
0657: FLUSH_RX
0658: W_REGISTER: STATUS = 70 
0659: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 25 00 25 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0660: [TX_DS] W_REGISTER: STATUS = 70 
0661: W_REGISTER: CONFIG = 0F 
0662: FLUSH_TX
0663: FLUSH_RX
0664: W_REGISTER: STATUS = 70 
  -- 679.2us pass --
0665: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0666: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 26 00 26 00 00 00 00 00 01 00 01 06 19 07 DA 
0667: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0668: [RX_DR] W_REGISTER: STATUS = 70 
0669: W_REGISTER: CONFIG = 0E 
0670: FLUSH_TX
0671: FLUSH_RX
0672: W_REGISTER: STATUS = 70 
0673: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 26 00 26 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.7us pass --
0674: [TX_DS] W_REGISTER: STATUS = 70 
0675: W_REGISTER: CONFIG = 0F 
0676: FLUSH_TX
0677: FLUSH_RX
0678: W_REGISTER: STATUS = 70 
  -- 680.5us pass --
0679: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0680: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 27 00 27 00 00 00 00 00 01 00 01 06 19 07 DA 
0681: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0682: [RX_DR] W_REGISTER: STATUS = 70 
0683: W_REGISTER: CONFIG = 0E 
0684: FLUSH_TX
0685: FLUSH_RX
0686: W_REGISTER: STATUS = 70 
0687: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 27 00 27 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
0688: [TX_DS] W_REGISTER: STATUS = 70 
0689: W_REGISTER: CONFIG = 0F 
0690: FLUSH_TX
0691: FLUSH_RX
0692: W_REGISTER: STATUS = 70 
  -- 686.5us pass --
0693: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0694: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 28 00 28 00 00 00 00 00 01 00 01 06 19 07 DA 
0695: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0696: [RX_DR] W_REGISTER: STATUS = 70 
0697: W_REGISTER: CONFIG = 0E 
0698: FLUSH_TX
0699: FLUSH_RX
0700: W_REGISTER: STATUS = 70 
0701: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 28 00 28 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0702: [TX_DS] W_REGISTER: STATUS = 70 
0703: W_REGISTER: CONFIG = 0F 
0704: FLUSH_TX
0705: FLUSH_RX
0706: W_REGISTER: STATUS = 70 
  -- 685.9us pass --
0707: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0708: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 29 00 29 00 00 00 00 00 01 00 01 06 19 07 DA 
0709: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0710: [RX_DR] W_REGISTER: STATUS = 70 
0711: W_REGISTER: CONFIG = 0E 
0712: FLUSH_TX
0713: FLUSH_RX
0714: W_REGISTER: STATUS = 70 
0715: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 29 00 29 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.8us pass --
0716: [TX_DS] W_REGISTER: STATUS = 70 
0717: W_REGISTER: CONFIG = 0F 
0718: FLUSH_TX
0719: FLUSH_RX
0720: W_REGISTER: STATUS = 70 
  -- 698.3us pass --
0721: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0722: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 2A 00 2A 00 00 00 00 00 01 00 01 06 19 07 DA 
0723: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0724: [RX_DR] W_REGISTER: STATUS = 70 
0725: W_REGISTER: CONFIG = 0E 
0726: FLUSH_TX
0727: FLUSH_RX
0728: W_REGISTER: STATUS = 70 
0729: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 2A 00 2A 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0730: [TX_DS] W_REGISTER: STATUS = 70 
0731: W_REGISTER: CONFIG = 0F 
0732: FLUSH_TX
0733: FLUSH_RX
0734: W_REGISTER: STATUS = 70 
  -- 679.1us pass --
0735: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0736: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 2B 00 2B 00 00 00 00 00 01 00 01 06 19 07 DA 
0737: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0738: [RX_DR] W_REGISTER: STATUS = 70 
0739: W_REGISTER: CONFIG = 0E 
0740: FLUSH_TX
0741: FLUSH_RX
0742: W_REGISTER: STATUS = 70 
0743: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 2B 00 2B 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
0744: [TX_DS] W_REGISTER: STATUS = 70 
0745: W_REGISTER: CONFIG = 0F 
0746: FLUSH_TX
0747: FLUSH_RX
0748: W_REGISTER: STATUS = 70 
  -- 680.0us pass --
0749: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0750: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 2C 00 2C 00 00 00 00 00 01 00 01 06 19 07 DA 
0751: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0752: [RX_DR] W_REGISTER: STATUS = 70 
0753: W_REGISTER: CONFIG = 0E 
0754: FLUSH_TX
0755: FLUSH_RX
0756: W_REGISTER: STATUS = 70 
0757: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 2C 00 2C 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.4us pass --
0758: [TX_DS] W_REGISTER: STATUS = 70 
0759: W_REGISTER: CONFIG = 0F 
0760: FLUSH_TX
0761: FLUSH_RX
0762: W_REGISTER: STATUS = 70 
  -- 686.3us pass --
0763: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0764: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 2D 00 2D 00 00 00 00 00 01 00 01 06 19 07 DA 
0765: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0766: [RX_DR] W_REGISTER: STATUS = 70 
0767: W_REGISTER: CONFIG = 0E 
0768: FLUSH_TX
0769: FLUSH_RX
0770: W_REGISTER: STATUS = 70 
0771: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 2D 00 2D 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
0772: [TX_DS] W_REGISTER: STATUS = 70 
0773: W_REGISTER: CONFIG = 0F 
0774: FLUSH_TX
0775: FLUSH_RX
0776: W_REGISTER: STATUS = 70 
  -- 685.9us pass --
0777: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0778: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 2E 00 2E 00 00 00 00 00 01 00 01 06 19 07 DA 
0779: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0780: [RX_DR] W_REGISTER: STATUS = 70 
0781: W_REGISTER: CONFIG = 0E 
0782: FLUSH_TX
0783: FLUSH_RX
0784: W_REGISTER: STATUS = 70 
0785: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 2E 00 2E 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0786: [TX_DS] W_REGISTER: STATUS = 70 
0787: W_REGISTER: CONFIG = 0F 
0788: FLUSH_TX
0789: FLUSH_RX
0790: W_REGISTER: STATUS = 70 
  -- 698.3us pass --
0791: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0792: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 2F 00 2F 00 00 00 00 00 01 00 01 06 19 07 DA 
0793: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0794: [RX_DR] W_REGISTER: STATUS = 70 
0795: W_REGISTER: CONFIG = 0E 
0796: FLUSH_TX
0797: FLUSH_RX
0798: W_REGISTER: STATUS = 70 
0799: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 2F 00 2F 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0800: [TX_DS] W_REGISTER: STATUS = 70 
0801: W_REGISTER: CONFIG = 0F 
0802: FLUSH_TX
0803: FLUSH_RX
0804: W_REGISTER: STATUS = 70 
  -- 678.1us pass --
0805: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0806: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 30 00 30 00 00 00 00 00 01 00 01 06 19 07 DA 
0807: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0808: [RX_DR] W_REGISTER: STATUS = 70 
0809: W_REGISTER: CONFIG = 0E 
0810: FLUSH_TX
0811: FLUSH_RX
0812: W_REGISTER: STATUS = 70 
0813: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 30 00 30 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0814: [TX_DS] W_REGISTER: STATUS = 70 
0815: W_REGISTER: CONFIG = 0F 
0816: FLUSH_TX
0817: FLUSH_RX
0818: W_REGISTER: STATUS = 70 
  -- 682.7us pass --
0819: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0820: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 31 00 31 00 00 00 00 00 01 00 01 06 19 07 DA 
0821: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0822: [RX_DR] W_REGISTER: STATUS = 70 
0823: W_REGISTER: CONFIG = 0E 
0824: FLUSH_TX
0825: FLUSH_RX
0826: W_REGISTER: STATUS = 70 
0827: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 31 00 31 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.1us pass --
0828: [TX_DS] W_REGISTER: STATUS = 70 
0829: W_REGISTER: CONFIG = 0F 
0830: FLUSH_TX
0831: FLUSH_RX
0832: W_REGISTER: STATUS = 70 
  -- 677.9us pass --
0833: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0834: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 32 00 32 00 00 00 00 00 01 00 01 06 19 07 DA 
0835: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0836: [RX_DR] W_REGISTER: STATUS = 70 
0837: W_REGISTER: CONFIG = 0E 
0838: FLUSH_TX
0839: FLUSH_RX
0840: W_REGISTER: STATUS = 70 
0841: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 32 00 32 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.7us pass --
0842: [TX_DS] W_REGISTER: STATUS = 70 
0843: W_REGISTER: CONFIG = 0F 
0844: FLUSH_TX
0845: FLUSH_RX
0846: W_REGISTER: STATUS = 70 
  -- 678.0us pass --
0847: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0848: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 33 00 33 00 00 00 00 00 01 00 01 06 19 07 DA 
0849: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0850: [RX_DR] W_REGISTER: STATUS = 70 
0851: W_REGISTER: CONFIG = 0E 
0852: FLUSH_TX
0853: FLUSH_RX
0854: W_REGISTER: STATUS = 70 
0855: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 33 00 33 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0856: [TX_DS] W_REGISTER: STATUS = 70 
0857: W_REGISTER: CONFIG = 0F 
0858: FLUSH_TX
0859: FLUSH_RX
0860: W_REGISTER: STATUS = 70 
  -- 698.0us pass --
0861: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0862: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 34 00 34 00 00 00 00 00 01 00 01 06 19 07 DA 
0863: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0864: [RX_DR] W_REGISTER: STATUS = 70 
0865: W_REGISTER: CONFIG = 0E 
0866: FLUSH_TX
0867: FLUSH_RX
0868: W_REGISTER: STATUS = 70 
0869: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 34 00 34 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.2us pass --
0870: [TX_DS] W_REGISTER: STATUS = 70 
0871: W_REGISTER: CONFIG = 0F 
0872: FLUSH_TX
0873: FLUSH_RX
0874: W_REGISTER: STATUS = 70 
  -- 679.2us pass --
0875: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0876: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 35 00 35 00 00 00 00 00 01 00 01 06 19 07 DA 
0877: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0878: [RX_DR] W_REGISTER: STATUS = 70 
0879: W_REGISTER: CONFIG = 0E 
0880: FLUSH_TX
0881: FLUSH_RX
0882: W_REGISTER: STATUS = 70 
0883: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 35 00 35 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
0884: [TX_DS] W_REGISTER: STATUS = 70 
0885: W_REGISTER: CONFIG = 0F 
0886: FLUSH_TX
0887: FLUSH_RX
0888: W_REGISTER: STATUS = 70 
  -- 680.3us pass --
0889: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0890: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 36 00 36 00 00 00 00 00 01 00 01 06 19 07 DA 
0891: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0892: [RX_DR] W_REGISTER: STATUS = 70 
0893: W_REGISTER: CONFIG = 0E 
0894: FLUSH_TX
0895: FLUSH_RX
0896: W_REGISTER: STATUS = 70 
0897: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 36 00 36 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 372.1us pass --
0898: [TX_DS] W_REGISTER: STATUS = 70 
0899: W_REGISTER: CONFIG = 0F 
0900: FLUSH_TX
0901: FLUSH_RX
0902: W_REGISTER: STATUS = 70 
  -- 681.4us pass --
0903: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0904: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 37 00 37 00 00 00 00 00 01 00 01 06 19 07 DA 
0905: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0906: [RX_DR] W_REGISTER: STATUS = 70 
0907: W_REGISTER: CONFIG = 0E 
0908: FLUSH_TX
0909: FLUSH_RX
0910: W_REGISTER: STATUS = 70 
0911: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 37 00 37 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
0912: [TX_DS] W_REGISTER: STATUS = 70 
0913: W_REGISTER: CONFIG = 0F 
0914: FLUSH_TX
0915: FLUSH_RX
0916: W_REGISTER: STATUS = 70 
  -- 685.2us pass --
0917: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0918: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 38 00 38 00 00 00 00 00 01 00 01 06 19 07 DA 
0919: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0920: [RX_DR] W_REGISTER: STATUS = 70 
0921: W_REGISTER: CONFIG = 0E 
0922: FLUSH_TX
0923: FLUSH_RX
0924: W_REGISTER: STATUS = 70 
0925: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 38 00 38 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
0926: [TX_DS] W_REGISTER: STATUS = 70 
0927: W_REGISTER: CONFIG = 0F 
0928: FLUSH_TX
0929: FLUSH_RX
0930: W_REGISTER: STATUS = 70 
  -- 691.0us pass --
0931: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0932: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 39 00 39 00 00 00 00 00 01 00 01 06 19 07 DA 
0933: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0934: [RX_DR] W_REGISTER: STATUS = 70 
0935: W_REGISTER: CONFIG = 0E 
0936: FLUSH_TX
0937: FLUSH_RX
0938: W_REGISTER: STATUS = 70 
0939: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 39 00 39 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0940: [TX_DS] W_REGISTER: STATUS = 70 
0941: W_REGISTER: CONFIG = 0F 
0942: FLUSH_TX
0943: FLUSH_RX
0944: W_REGISTER: STATUS = 70 
  -- 679.3us pass --
0945: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0946: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 3A 00 3A 00 00 00 00 00 01 00 01 06 19 07 DA 
0947: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0948: [RX_DR] W_REGISTER: STATUS = 70 
0949: W_REGISTER: CONFIG = 0E 
0950: FLUSH_TX
0951: FLUSH_RX
0952: W_REGISTER: STATUS = 70 
0953: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 3A 00 3A 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.7us pass --
0954: [TX_DS] W_REGISTER: STATUS = 70 
0955: W_REGISTER: CONFIG = 0F 
0956: FLUSH_TX
0957: FLUSH_RX
0958: W_REGISTER: STATUS = 70 
  -- 681.2us pass --
0959: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0960: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 3B 00 3B 00 00 00 00 00 01 00 01 06 19 07 DA 
0961: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0962: [RX_DR] W_REGISTER: STATUS = 70 
0963: W_REGISTER: CONFIG = 0E 
0964: FLUSH_TX
0965: FLUSH_RX
0966: W_REGISTER: STATUS = 70 
0967: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 3B 00 3B 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0968: [TX_DS] W_REGISTER: STATUS = 70 
0969: W_REGISTER: CONFIG = 0F 
0970: FLUSH_TX
0971: FLUSH_RX
0972: W_REGISTER: STATUS = 70 
  -- 678.8us pass --
0973: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0974: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 3C 00 3C 00 00 00 00 00 01 00 01 06 19 07 DA 
0975: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0976: [RX_DR] W_REGISTER: STATUS = 70 
0977: W_REGISTER: CONFIG = 0E 
0978: FLUSH_TX
0979: FLUSH_RX
0980: W_REGISTER: STATUS = 70 
0981: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 3C 00 3C 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
0982: [TX_DS] W_REGISTER: STATUS = 70 
0983: W_REGISTER: CONFIG = 0F 
0984: FLUSH_TX
0985: FLUSH_RX
0986: W_REGISTER: STATUS = 70 
  -- 686.2us pass --
0987: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
0988: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 3D 00 3D 00 00 00 00 00 01 00 01 06 19 07 DA 
0989: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
0990: [RX_DR] W_REGISTER: STATUS = 70 
0991: W_REGISTER: CONFIG = 0E 
0992: FLUSH_TX
0993: FLUSH_RX
0994: W_REGISTER: STATUS = 70 
0995: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 3D 00 3D 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
0996: [TX_DS] W_REGISTER: STATUS = 70 
0997: W_REGISTER: CONFIG = 0F 
0998: FLUSH_TX
0999: FLUSH_RX
1000: W_REGISTER: STATUS = 70 
  -- 690.8us pass --
1001: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1002: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 3E 00 3E 00 00 00 00 00 01 00 01 06 19 07 DA 
1003: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1004: [RX_DR] W_REGISTER: STATUS = 70 
1005: W_REGISTER: CONFIG = 0E 
1006: FLUSH_TX
1007: FLUSH_RX
1008: W_REGISTER: STATUS = 70 
1009: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 3E 00 3E 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
1010: [TX_DS] W_REGISTER: STATUS = 70 
1011: W_REGISTER: CONFIG = 0F 
1012: FLUSH_TX
1013: FLUSH_RX
1014: W_REGISTER: STATUS = 70 
  -- 679.3us pass --
1015: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1016: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 3F 00 3F 00 00 00 00 00 01 00 01 06 19 07 DA 
1017: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1018: [RX_DR] W_REGISTER: STATUS = 70 
1019: W_REGISTER: CONFIG = 0E 
1020: FLUSH_TX
1021: FLUSH_RX
1022: W_REGISTER: STATUS = 70 
1023: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 3F 00 3F 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
1024: [TX_DS] W_REGISTER: STATUS = 70 
1025: W_REGISTER: CONFIG = 0F 
1026: FLUSH_TX
1027: FLUSH_RX
1028: W_REGISTER: STATUS = 70 
  -- 681.2us pass --
1029: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1030: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 40 00 40 00 00 00 00 00 01 00 01 06 19 07 DA 
1031: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1032: [RX_DR] W_REGISTER: STATUS = 70 
1033: W_REGISTER: CONFIG = 0E 
1034: FLUSH_TX
1035: FLUSH_RX
1036: W_REGISTER: STATUS = 70 
1037: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 40 00 40 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
1038: [TX_DS] W_REGISTER: STATUS = 70 
1039: W_REGISTER: CONFIG = 0F 
1040: FLUSH_TX
1041: FLUSH_RX
1042: W_REGISTER: STATUS = 70 
  -- 686.7us pass --
1043: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1044: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 41 00 41 00 00 00 00 00 01 00 01 06 19 07 DA 
1045: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1046: [RX_DR] W_REGISTER: STATUS = 70 
1047: W_REGISTER: CONFIG = 0E 
1048: FLUSH_TX
1049: FLUSH_RX
1050: W_REGISTER: STATUS = 70 
1051: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 41 00 41 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
1052: [TX_DS] W_REGISTER: STATUS = 70 
1053: W_REGISTER: CONFIG = 0F 
1054: FLUSH_TX
1055: FLUSH_RX
1056: W_REGISTER: STATUS = 70 
  -- 684.8us pass --
1057: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1058: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 42 00 42 00 00 00 00 00 01 00 01 06 19 07 DA 
1059: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1060: [RX_DR] W_REGISTER: STATUS = 70 
1061: W_REGISTER: CONFIG = 0E 
1062: FLUSH_TX
1063: FLUSH_RX
1064: W_REGISTER: STATUS = 70 
1065: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 42 00 42 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.8us pass --
1066: [TX_DS] W_REGISTER: STATUS = 70 
1067: W_REGISTER: CONFIG = 0F 
1068: FLUSH_TX
1069: FLUSH_RX
1070: W_REGISTER: STATUS = 70 
  -- 698.0us pass --
1071: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1072: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 43 00 43 00 00 00 00 00 01 00 01 06 19 07 DA 
1073: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1074: [RX_DR] W_REGISTER: STATUS = 70 
1075: W_REGISTER: CONFIG = 0E 
1076: FLUSH_TX
1077: FLUSH_RX
1078: W_REGISTER: STATUS = 70 
1079: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 43 00 43 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1080: [TX_DS] W_REGISTER: STATUS = 70 
1081: W_REGISTER: CONFIG = 0F 
1082: FLUSH_TX
1083: FLUSH_RX
1084: W_REGISTER: STATUS = 70 
  -- 679.2us pass --
1085: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1086: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 44 00 44 00 00 00 00 00 01 00 01 06 19 07 DA 
1087: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1088: [RX_DR] W_REGISTER: STATUS = 70 
1089: W_REGISTER: CONFIG = 0E 
1090: FLUSH_TX
1091: FLUSH_RX
1092: W_REGISTER: STATUS = 70 
1093: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 44 00 44 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1094: [TX_DS] W_REGISTER: STATUS = 70 
1095: W_REGISTER: CONFIG = 0F 
1096: FLUSH_TX
1097: FLUSH_RX
1098: W_REGISTER: STATUS = 70 
  -- 681.2us pass --
1099: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1100: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 45 00 45 00 00 00 00 00 01 00 01 06 19 07 DA 
1101: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1102: [RX_DR] W_REGISTER: STATUS = 70 
1103: W_REGISTER: CONFIG = 0E 
1104: FLUSH_TX
1105: FLUSH_RX
1106: W_REGISTER: STATUS = 70 
1107: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 45 00 45 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1108: [TX_DS] W_REGISTER: STATUS = 70 
1109: W_REGISTER: CONFIG = 0F 
1110: FLUSH_TX
1111: FLUSH_RX
1112: W_REGISTER: STATUS = 70 
  -- 678.3us pass --
1113: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1114: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 46 00 46 00 00 00 00 00 01 00 01 06 19 07 DA 
1115: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1116: [RX_DR] W_REGISTER: STATUS = 70 
1117: W_REGISTER: CONFIG = 0E 
1118: FLUSH_TX
1119: FLUSH_RX
1120: W_REGISTER: STATUS = 70 
1121: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 46 00 46 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1122: [TX_DS] W_REGISTER: STATUS = 70 
1123: W_REGISTER: CONFIG = 0F 
1124: FLUSH_TX
1125: FLUSH_RX
1126: W_REGISTER: STATUS = 70 
  -- 677.9us pass --
1127: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1128: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 47 00 47 00 00 00 00 00 01 00 01 06 19 07 DA 
1129: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1130: [RX_DR] W_REGISTER: STATUS = 70 
1131: W_REGISTER: CONFIG = 0E 
1132: FLUSH_TX
1133: FLUSH_RX
1134: W_REGISTER: STATUS = 70 
1135: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 47 00 47 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
1136: [TX_DS] W_REGISTER: STATUS = 70 
1137: W_REGISTER: CONFIG = 0F 
1138: FLUSH_TX
1139: FLUSH_RX
1140: W_REGISTER: STATUS = 70 
  -- 698.0us pass --
1141: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1142: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 48 00 48 00 00 00 00 00 01 00 01 06 19 07 DA 
1143: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1144: [RX_DR] W_REGISTER: STATUS = 70 
1145: W_REGISTER: CONFIG = 0E 
1146: FLUSH_TX
1147: FLUSH_RX
1148: W_REGISTER: STATUS = 70 
1149: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 48 00 48 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.4us pass --
1150: [TX_DS] W_REGISTER: STATUS = 70 
1151: W_REGISTER: CONFIG = 0F 
1152: FLUSH_TX
1153: FLUSH_RX
1154: W_REGISTER: STATUS = 70 
  -- 679.1us pass --
1155: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1156: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 49 00 49 00 00 00 00 00 01 00 01 06 19 07 DA 
1157: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1158: [RX_DR] W_REGISTER: STATUS = 70 
1159: W_REGISTER: CONFIG = 0E 
1160: FLUSH_TX
1161: FLUSH_RX
1162: W_REGISTER: STATUS = 70 
1163: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 49 00 49 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.2us pass --
1164: [TX_DS] W_REGISTER: STATUS = 70 
1165: W_REGISTER: CONFIG = 0F 
1166: FLUSH_TX
1167: FLUSH_RX
1168: W_REGISTER: STATUS = 70 
  -- 681.2us pass --
1169: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1170: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 4A 00 4A 00 00 00 00 00 01 00 01 06 19 07 DA 
1171: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1172: [RX_DR] W_REGISTER: STATUS = 70 
1173: W_REGISTER: CONFIG = 0E 
1174: FLUSH_TX
1175: FLUSH_RX
1176: W_REGISTER: STATUS = 70 
1177: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 4A 00 4A 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1178: [TX_DS] W_REGISTER: STATUS = 70 
1179: W_REGISTER: CONFIG = 0F 
1180: FLUSH_TX
1181: FLUSH_RX
1182: W_REGISTER: STATUS = 70 
  -- 687.5us pass --
1183: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1184: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 4B 00 4B 00 00 00 00 00 01 00 01 06 19 07 DA 
1185: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1186: [RX_DR] W_REGISTER: STATUS = 70 
1187: W_REGISTER: CONFIG = 0E 
1188: FLUSH_TX
1189: FLUSH_RX
1190: W_REGISTER: STATUS = 70 
1191: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 4B 00 4B 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1192: [TX_DS] W_REGISTER: STATUS = 70 
1193: W_REGISTER: CONFIG = 0F 
1194: FLUSH_TX
1195: FLUSH_RX
1196: W_REGISTER: STATUS = 70 
  -- 683.9us pass --
1197: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1198: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 4C 00 4C 00 00 00 00 00 01 00 01 06 19 07 DA 
1199: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1200: [RX_DR] W_REGISTER: STATUS = 70 
1201: W_REGISTER: CONFIG = 0E 
1202: FLUSH_TX
1203: FLUSH_RX
1204: W_REGISTER: STATUS = 70 
1205: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 4C 00 4C 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 367.8us pass --
1206: [TX_DS] W_REGISTER: STATUS = 70 
1207: W_REGISTER: CONFIG = 0F 
1208: FLUSH_TX
1209: FLUSH_RX
1210: W_REGISTER: STATUS = 70 
  -- 697.1us pass --
1211: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1212: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 4D 00 4D 00 00 00 00 00 01 00 01 06 19 07 DA 
1213: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1214: [RX_DR] W_REGISTER: STATUS = 70 
1215: W_REGISTER: CONFIG = 0E 
1216: FLUSH_TX
1217: FLUSH_RX
1218: W_REGISTER: STATUS = 70 
1219: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 4D 00 4D 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1220: [TX_DS] W_REGISTER: STATUS = 70 
1221: W_REGISTER: CONFIG = 0F 
1222: FLUSH_TX
1223: FLUSH_RX
1224: W_REGISTER: STATUS = 70 
  -- 679.6us pass --
1225: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1226: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 4E 00 4E 00 00 00 00 00 01 00 01 06 19 07 DA 
1227: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1228: [RX_DR] W_REGISTER: STATUS = 70 
1229: W_REGISTER: CONFIG = 0E 
1230: FLUSH_TX
1231: FLUSH_RX
1232: W_REGISTER: STATUS = 70 
1233: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 4E 00 4E 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.4us pass --
1234: [TX_DS] W_REGISTER: STATUS = 70 
1235: W_REGISTER: CONFIG = 0F 
1236: FLUSH_TX
1237: FLUSH_RX
1238: W_REGISTER: STATUS = 70 
  -- 681.2us pass --
1239: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1240: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 4F 00 4F 00 00 00 00 00 01 00 01 06 19 07 DA 
1241: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1242: [RX_DR] W_REGISTER: STATUS = 70 
1243: W_REGISTER: CONFIG = 0E 
1244: FLUSH_TX
1245: FLUSH_RX
1246: W_REGISTER: STATUS = 70 
1247: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 4F 00 4F 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1248: [TX_DS] W_REGISTER: STATUS = 70 
1249: W_REGISTER: CONFIG = 0F 
1250: FLUSH_TX
1251: FLUSH_RX
1252: W_REGISTER: STATUS = 70 
  -- 686.4us pass --
1253: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1254: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 50 00 50 00 00 00 00 00 01 00 01 06 19 07 DA 
1255: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1256: [RX_DR] W_REGISTER: STATUS = 70 
1257: W_REGISTER: CONFIG = 0E 
1258: FLUSH_TX
1259: FLUSH_RX
1260: W_REGISTER: STATUS = 70 
1261: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 50 00 50 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.9us pass --
1262: [TX_DS] W_REGISTER: STATUS = 70 
1263: W_REGISTER: CONFIG = 0F 
1264: FLUSH_TX
1265: FLUSH_RX
1266: W_REGISTER: STATUS = 70 
  -- 686.0us pass --
1267: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1268: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 51 00 51 00 00 00 00 00 01 00 01 06 19 07 DA 
1269: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1270: [RX_DR] W_REGISTER: STATUS = 70 
1271: W_REGISTER: CONFIG = 0E 
1272: FLUSH_TX
1273: FLUSH_RX
1274: W_REGISTER: STATUS = 70 
1275: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 51 00 51 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.6us pass --
1276: [TX_DS] W_REGISTER: STATUS = 70 
1277: W_REGISTER: CONFIG = 0F 
1278: FLUSH_TX
1279: FLUSH_RX
1280: W_REGISTER: STATUS = 70 
  -- 699.2us pass --
1281: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1282: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 52 00 52 00 00 00 00 00 01 00 01 06 19 07 DA 
1283: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1284: [RX_DR] W_REGISTER: STATUS = 70 
1285: W_REGISTER: CONFIG = 0E 
1286: FLUSH_TX
1287: FLUSH_RX
1288: W_REGISTER: STATUS = 70 
1289: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 52 00 52 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
1290: [TX_DS] W_REGISTER: STATUS = 70 
1291: W_REGISTER: CONFIG = 0F 
1292: FLUSH_TX
1293: FLUSH_RX
1294: W_REGISTER: STATUS = 70 
  -- 679.3us pass --
1295: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1296: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 53 00 53 00 00 00 00 00 01 00 01 06 19 07 DA 
1297: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1298: [RX_DR] W_REGISTER: STATUS = 70 
1299: W_REGISTER: CONFIG = 0E 
1300: FLUSH_TX
1301: FLUSH_RX
1302: W_REGISTER: STATUS = 70 
1303: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 53 00 53 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.4us pass --
1304: [TX_DS] W_REGISTER: STATUS = 70 
1305: W_REGISTER: CONFIG = 0F 
1306: FLUSH_TX
1307: FLUSH_RX
1308: W_REGISTER: STATUS = 70 
  -- 680.0us pass --
1309: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1310: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 54 00 54 00 00 00 00 00 01 00 01 06 19 07 DA 
1311: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1312: [RX_DR] W_REGISTER: STATUS = 70 
1313: W_REGISTER: CONFIG = 0E 
1314: FLUSH_TX
1315: FLUSH_RX
1316: W_REGISTER: STATUS = 70 
1317: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 54 00 54 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1318: [TX_DS] W_REGISTER: STATUS = 70 
1319: W_REGISTER: CONFIG = 0F 
1320: FLUSH_TX
1321: FLUSH_RX
1322: W_REGISTER: STATUS = 70 
  -- 678.8us pass --
1323: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1324: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 55 00 55 00 00 00 00 00 01 00 01 06 19 07 DA 
1325: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1326: [RX_DR] W_REGISTER: STATUS = 70 
1327: W_REGISTER: CONFIG = 0E 
1328: FLUSH_TX
1329: FLUSH_RX
1330: W_REGISTER: STATUS = 70 
1331: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 55 00 55 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.4us pass --
1332: [TX_DS] W_REGISTER: STATUS = 70 
1333: W_REGISTER: CONFIG = 0F 
1334: FLUSH_TX
1335: FLUSH_RX
1336: W_REGISTER: STATUS = 70 
  -- 679.1us pass --
1337: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1338: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 56 00 56 00 00 00 00 00 01 00 01 06 19 07 DA 
1339: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1340: [RX_DR] W_REGISTER: STATUS = 70 
1341: W_REGISTER: CONFIG = 0E 
1342: FLUSH_TX
1343: FLUSH_RX
1344: W_REGISTER: STATUS = 70 
1345: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 56 00 56 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1346: [TX_DS] W_REGISTER: STATUS = 70 
1347: W_REGISTER: CONFIG = 0F 
1348: FLUSH_TX
1349: FLUSH_RX
1350: W_REGISTER: STATUS = 70 
  -- 695.6us pass --
1351: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1352: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 57 00 57 00 00 00 00 00 01 00 01 06 19 07 DA 
1353: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1354: [RX_DR] W_REGISTER: STATUS = 70 
1355: W_REGISTER: CONFIG = 0E 
1356: FLUSH_TX
1357: FLUSH_RX
1358: W_REGISTER: STATUS = 70 
1359: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 57 00 57 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.9us pass --
1360: [TX_DS] W_REGISTER: STATUS = 70 
1361: W_REGISTER: CONFIG = 0F 
1362: FLUSH_TX
1363: FLUSH_RX
1364: W_REGISTER: STATUS = 70 
  -- 679.3us pass --
1365: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1366: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 58 00 58 00 00 00 00 00 01 00 01 06 19 07 DA 
1367: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1368: [RX_DR] W_REGISTER: STATUS = 70 
1369: W_REGISTER: CONFIG = 0E 
1370: FLUSH_TX
1371: FLUSH_RX
1372: W_REGISTER: STATUS = 70 
1373: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 58 00 58 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.8us pass --
1374: [TX_DS] W_REGISTER: STATUS = 70 
1375: W_REGISTER: CONFIG = 0F 
1376: FLUSH_TX
1377: FLUSH_RX
1378: W_REGISTER: STATUS = 70 
  -- 679.0us pass --
1379: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1380: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 59 00 59 00 00 00 00 00 01 00 01 06 19 07 DA 
1381: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1382: [RX_DR] W_REGISTER: STATUS = 70 
1383: W_REGISTER: CONFIG = 0E 
1384: FLUSH_TX
1385: FLUSH_RX
1386: W_REGISTER: STATUS = 70 
1387: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 59 00 59 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1388: [TX_DS] W_REGISTER: STATUS = 70 
1389: W_REGISTER: CONFIG = 0F 
1390: FLUSH_TX
1391: FLUSH_RX
1392: W_REGISTER: STATUS = 70 
  -- 686.5us pass --
1393: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1394: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 5A 00 5A 00 00 00 00 00 01 00 01 06 19 07 DA 
1395: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1396: [RX_DR] W_REGISTER: STATUS = 70 
1397: W_REGISTER: CONFIG = 0E 
1398: FLUSH_TX
1399: FLUSH_RX
1400: W_REGISTER: STATUS = 70 
1401: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 5A 00 5A 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.7us pass --
1402: [TX_DS] W_REGISTER: STATUS = 70 
1403: W_REGISTER: CONFIG = 0F 
1404: FLUSH_TX
1405: FLUSH_RX
1406: W_REGISTER: STATUS = 70 
  -- 685.1us pass --
1407: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1408: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 5B 00 5B 00 00 00 00 00 01 00 01 06 19 07 DA 
1409: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1410: [RX_DR] W_REGISTER: STATUS = 70 
1411: W_REGISTER: CONFIG = 0E 
1412: FLUSH_TX
1413: FLUSH_RX
1414: W_REGISTER: STATUS = 70 
1415: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 5B 00 5B 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 367.0us pass --
1416: [TX_DS] W_REGISTER: STATUS = 70 
1417: W_REGISTER: CONFIG = 0F 
1418: FLUSH_TX
1419: FLUSH_RX
1420: W_REGISTER: STATUS = 70 
  -- 689.6us pass --
1421: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1422: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 5C 00 5C 00 00 00 00 00 01 00 01 06 19 07 DA 
1423: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1424: [RX_DR] W_REGISTER: STATUS = 70 
1425: W_REGISTER: CONFIG = 0E 
1426: FLUSH_TX
1427: FLUSH_RX
1428: W_REGISTER: STATUS = 70 
1429: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 5C 00 5C 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1430: [TX_DS] W_REGISTER: STATUS = 70 
1431: W_REGISTER: CONFIG = 0F 
1432: FLUSH_TX
1433: FLUSH_RX
1434: W_REGISTER: STATUS = 70 
  -- 684.1us pass --
1435: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1436: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 5D 00 5D 00 00 00 00 00 01 00 01 06 19 07 DA 
1437: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1438: [RX_DR] W_REGISTER: STATUS = 70 
1439: W_REGISTER: CONFIG = 0E 
1440: FLUSH_TX
1441: FLUSH_RX
1442: W_REGISTER: STATUS = 70 
1443: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 5D 00 5D 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.2us pass --
1444: [TX_DS] W_REGISTER: STATUS = 70 
1445: W_REGISTER: CONFIG = 0F 
1446: FLUSH_TX
1447: FLUSH_RX
1448: W_REGISTER: STATUS = 70 
  -- 686.0us pass --
1449: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1450: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 5E 00 5E 00 00 00 00 00 01 00 01 06 19 07 DA 
1451: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1452: [RX_DR] W_REGISTER: STATUS = 70 
1453: W_REGISTER: CONFIG = 0E 
1454: FLUSH_TX
1455: FLUSH_RX
1456: W_REGISTER: STATUS = 70 
1457: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 5E 00 5E 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1458: [TX_DS] W_REGISTER: STATUS = 70 
1459: W_REGISTER: CONFIG = 0F 
1460: FLUSH_TX
1461: FLUSH_RX
1462: W_REGISTER: STATUS = 70 
  -- 686.1us pass --
1463: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1464: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 5F 00 5F 00 00 00 00 00 01 00 01 06 19 07 DA 
1465: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1466: [RX_DR] W_REGISTER: STATUS = 70 
1467: W_REGISTER: CONFIG = 0E 
1468: FLUSH_TX
1469: FLUSH_RX
1470: W_REGISTER: STATUS = 70 
1471: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 5F 00 5F 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.9us pass --
1472: [TX_DS] W_REGISTER: STATUS = 70 
1473: W_REGISTER: CONFIG = 0F 
1474: FLUSH_TX
1475: FLUSH_RX
1476: W_REGISTER: STATUS = 70 
  -- 684.8us pass --
1477: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1478: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 60 00 60 00 00 00 00 00 01 00 01 06 19 07 DA 
1479: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1480: [RX_DR] W_REGISTER: STATUS = 70 
1481: W_REGISTER: CONFIG = 0E 
1482: FLUSH_TX
1483: FLUSH_RX
1484: W_REGISTER: STATUS = 70 
1485: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 60 00 60 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1486: [TX_DS] W_REGISTER: STATUS = 70 
1487: W_REGISTER: CONFIG = 0F 
1488: FLUSH_TX
1489: FLUSH_RX
1490: W_REGISTER: STATUS = 70 
  -- 691.0us pass --
1491: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1492: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 61 00 61 00 00 00 00 00 01 00 01 06 19 07 DA 
1493: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1494: [RX_DR] W_REGISTER: STATUS = 70 
1495: W_REGISTER: CONFIG = 0E 
1496: FLUSH_TX
1497: FLUSH_RX
1498: W_REGISTER: STATUS = 70 
1499: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 61 00 61 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
1500: [TX_DS] W_REGISTER: STATUS = 70 
1501: W_REGISTER: CONFIG = 0F 
1502: FLUSH_TX
1503: FLUSH_RX
1504: W_REGISTER: STATUS = 70 
  -- 682.2us pass --
1505: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1506: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 62 00 62 00 00 00 00 00 01 00 01 06 19 07 DA 
1507: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1508: [RX_DR] W_REGISTER: STATUS = 70 
1509: W_REGISTER: CONFIG = 0E 
1510: FLUSH_TX
1511: FLUSH_RX
1512: W_REGISTER: STATUS = 70 
1513: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 62 00 62 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
1514: [TX_DS] W_REGISTER: STATUS = 70 
1515: W_REGISTER: CONFIG = 0F 
1516: FLUSH_TX
1517: FLUSH_RX
1518: W_REGISTER: STATUS = 70 
  -- 686.2us pass --
1519: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1520: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 63 00 63 00 00 00 00 00 01 00 01 06 19 07 DA 
1521: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1522: [RX_DR] W_REGISTER: STATUS = 70 
1523: W_REGISTER: CONFIG = 0E 
1524: FLUSH_TX
1525: FLUSH_RX
1526: W_REGISTER: STATUS = 70 
1527: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 63 00 63 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1528: [TX_DS] W_REGISTER: STATUS = 70 
1529: W_REGISTER: CONFIG = 0F 
1530: FLUSH_TX
1531: FLUSH_RX
1532: W_REGISTER: STATUS = 70 
  -- 686.7us pass --
1533: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1534: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 64 00 64 00 00 00 00 00 01 00 01 06 19 07 DA 
1535: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1536: [RX_DR] W_REGISTER: STATUS = 70 
1537: W_REGISTER: CONFIG = 0E 
1538: FLUSH_TX
1539: FLUSH_RX
1540: W_REGISTER: STATUS = 70 
1541: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 64 00 64 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
1542: [TX_DS] W_REGISTER: STATUS = 70 
1543: W_REGISTER: CONFIG = 0F 
1544: FLUSH_TX
1545: FLUSH_RX
1546: W_REGISTER: STATUS = 70 
  -- 686.0us pass --
1547: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1548: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 65 00 65 00 00 00 00 00 01 00 01 06 19 07 DA 
1549: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1550: [RX_DR] W_REGISTER: STATUS = 70 
1551: W_REGISTER: CONFIG = 0E 
1552: FLUSH_TX
1553: FLUSH_RX
1554: W_REGISTER: STATUS = 70 
1555: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 00 FF 00 00 20 8B 00 00 00 00 00 00 00 0A 00 65 00 65 00 00 00 00 00 01 00 01 06 19 07 DA 
  -- 367.0us pass --
1556: [TX_DS] W_REGISTER: STATUS = 70 
1557: W_REGISTER: CONFIG = 0F 
1558: FLUSH_TX
1559: FLUSH_RX
1560: W_REGISTER: STATUS = 70 
1561: W_REGISTER: CONFIG = 0E 
1562: FLUSH_TX
1563: FLUSH_RX
1564: W_REGISTER: STATUS = 70 
1565: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1566: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.4ms pass --
1567: W_REGISTER: CONFIG = 0E 
1568: FLUSH_TX
1569: FLUSH_RX
1570: W_REGISTER: STATUS = 70 
1571: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
1572: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1573: W_REGISTER: CONFIG = 0E 
1574: FLUSH_TX
1575: FLUSH_RX
1576: W_REGISTER: STATUS = 70 
1577: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.5us pass --
1578: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1579: W_REGISTER: CONFIG = 0E 
1580: FLUSH_TX
1581: FLUSH_RX
1582: W_REGISTER: STATUS = 70 
1583: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1584: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1585: W_REGISTER: CONFIG = 0E 
1586: FLUSH_TX
1587: FLUSH_RX
1588: W_REGISTER: STATUS = 70 
1589: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1590: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1591: W_REGISTER: CONFIG = 0E 
1592: FLUSH_TX
1593: FLUSH_RX
1594: W_REGISTER: STATUS = 70 
1595: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1596: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1597: W_REGISTER: CONFIG = 0E 
1598: FLUSH_TX
1599: FLUSH_RX
1600: W_REGISTER: STATUS = 70 
1601: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1602: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1603: W_REGISTER: CONFIG = 0E 
1604: FLUSH_TX
1605: FLUSH_RX
1606: W_REGISTER: STATUS = 70 
1607: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1608: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1609: W_REGISTER: CONFIG = 0E 
1610: FLUSH_TX
1611: FLUSH_RX
1612: W_REGISTER: STATUS = 70 
1613: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1614: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1615: W_REGISTER: CONFIG = 0E 
1616: FLUSH_TX
1617: FLUSH_RX
1618: W_REGISTER: STATUS = 70 
1619: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1620: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1621: W_REGISTER: CONFIG = 0E 
1622: FLUSH_TX
1623: FLUSH_RX
1624: W_REGISTER: STATUS = 70 
1625: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1626: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1627: W_REGISTER: CONFIG = 0E 
1628: FLUSH_TX
1629: FLUSH_RX
1630: W_REGISTER: STATUS = 70 
1631: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1632: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1633: W_REGISTER: CONFIG = 0E 
1634: FLUSH_TX
1635: FLUSH_RX
1636: W_REGISTER: STATUS = 70 
1637: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1638: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1639: W_REGISTER: CONFIG = 0E 
1640: FLUSH_TX
1641: FLUSH_RX
1642: W_REGISTER: STATUS = 70 
1643: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1644: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1645: W_REGISTER: CONFIG = 0E 
1646: FLUSH_TX
1647: FLUSH_RX
1648: W_REGISTER: STATUS = 70 
1649: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1650: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1651: W_REGISTER: CONFIG = 0E 
1652: FLUSH_TX
1653: FLUSH_RX
1654: W_REGISTER: STATUS = 70 
1655: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1656: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1657: W_REGISTER: CONFIG = 0E 
1658: FLUSH_TX
1659: FLUSH_RX
1660: W_REGISTER: STATUS = 70 
1661: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1662: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1663: W_REGISTER: CONFIG = 0E 
1664: FLUSH_TX
1665: FLUSH_RX
1666: W_REGISTER: STATUS = 70 
1667: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1668: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1669: W_REGISTER: CONFIG = 0E 
1670: FLUSH_TX
1671: FLUSH_RX
1672: W_REGISTER: STATUS = 70 
1673: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1674: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1675: W_REGISTER: CONFIG = 0E 
1676: FLUSH_TX
1677: FLUSH_RX
1678: W_REGISTER: STATUS = 70 
1679: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 FE FF 00 00 20 8B 00 03 9C B4 00 00 00 0A 00 00 00 10 00 00 13 88 00 01 00 01 06 19 07 DA 
  -- 366.3us pass --
1680: [TX_DS] W_REGISTER: STATUS = 70 
  -- 3.6ms pass --
1681: W_REGISTER: CONFIG = 0E 
1682: FLUSH_TX
1683: FLUSH_RX
1684: W_REGISTER: STATUS = 70 
1685: W_REGISTER: CONFIG = 0F 
1686: FLUSH_TX
1687: FLUSH_RX
1688: W_REGISTER: STATUS = 70 
  -- 3.0ms pass --
1689: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1690: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 02 FF 00 00 00 0C 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
1691: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1692: [RX_DR] W_REGISTER: CONFIG = 0E 
1693: [RX_DR] FLUSH_TX
1694: [RX_DR] FLUSH_RX
1695: [RX_DR] W_REGISTER: STATUS = 70 
1696: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 0C 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.7us pass --
1697: [TX_DS] W_REGISTER: STATUS = 70 
1698: W_REGISTER: CONFIG = 0F 
1699: FLUSH_TX
1700: FLUSH_RX
1701: W_REGISTER: STATUS = 70 
1702: R_REGISTER: FIFO_STATUS is 11 
1703: W_REGISTER: STATUS = 70 
  -- 741.6us pass --
1704: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1705: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: FC 12 00 81 F3 FF 00 00 18 47 72 BF AA B9 91 82 03 01 80 BF A0 38 AA 30 21 90 46 71 AF BB AC B0 
1706: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1707: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1708: [RX_DR] W_REGISTER: STATUS = 70 
1709: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1710: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 33 10 00 01 49 CC 13 10 89 43 82 98 9D BB DB 22 10 35 23 AD 0B 98 AB 14 E1 3B 33 30 0E BA AC E9 
1711: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1712: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1713: [RX_DR] W_REGISTER: STATUS = 70 
1714: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1715: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 13 42 00 02 AA 8B 81 15 0D 83 22 01 C9 AB 8E B0 14 53 22 2C 88 8C 8A A1 F2 8B 83 34 0C 9B 99 9C 
1716: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1717: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1718: [RX_DR] W_REGISTER: STATUS = 70 
1719: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1720: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 36 02 01 81 12 9D 01 11 8C 91 17 31 80 D9 A8 B8 28 82 79 3B 52 01 09 94 AB C8 C0 38 10 81 8D A8 
1721: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1722: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1723: [RX_DR] W_REGISTER: STATUS = 70 
1724: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1725: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 92 16 01 01 40 3B 99 22 BF A1 81 17 A3 38 AB 88 98 10 A2 79 11 17 3A 81 98 0F F0 91 33 A1 20 89 
1726: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1727: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1728: [RX_DR] W_REGISTER: STATUS = 70 
1729: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1730: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 08 3A 01 02 41 31 C0 7A 90 CF 21 99 42 83 18 9A 11 00 43 88 18 82 28 71 99 C9 2A F9 18 27 11 30 
1731: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1732: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1733: [RX_DR] W_REGISTER: STATUS = 70 
1734: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1735: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 31 13 02 81 A9 15 05 1A BA 0B AC C0 A5 33 92 40 15 06 18 13 EC 9A C2 20 08 81 A9 99 63 28 31 B0 
1736: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1737: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1738: [RX_DR] W_REGISTER: STATUS = 70 
1739: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1740: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 54 13 02 01 A8 9F 84 19 99 00 99 B9 02 29 98 87 10 21 52 25 9C CA CB A8 03 12 31 B1 52 15 2C B5 
1741: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1742: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1743: [RX_DR] W_REGISTER: STATUS = 70 
  -- 421.1us pass --
1744: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1745: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 08 FF 00 00 00 0C 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
1746: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1747: [RX_DR] W_REGISTER: CONFIG = 0E 
1748: [RX_DR] FLUSH_TX
1749: [RX_DR] FLUSH_RX
1750: [RX_DR] W_REGISTER: STATUS = 70 
1751: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 10 FF F0 00 00 02 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 368.2us pass --
1752: [TX_DS] W_REGISTER: STATUS = 70 
1753: W_REGISTER: CONFIG = 0F 
1754: FLUSH_TX
1755: FLUSH_RX
1756: W_REGISTER: STATUS = 70 
1757: R_REGISTER: FIFO_STATUS is 11 
1758: W_REGISTER: STATUS = 70 
  -- 2.7ms pass --
1759: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1760: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 31 13 02 81 A9 15 05 1A BA 0B AC C0 A5 33 92 40 15 06 18 13 EC 9A C2 20 08 81 A9 99 63 28 31 B0 
1761: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1762: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1763: [RX_DR] W_REGISTER: STATUS = 70 
  -- 359.3us pass --
1764: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1765: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 54 13 02 01 A8 9F 84 19 99 00 99 B9 02 29 98 87 10 21 52 25 9C CA CB A8 03 12 31 B1 52 15 2C B5 
1766: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1767: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1768: [RX_DR] W_REGISTER: STATUS = 70 
  -- 337.5us pass --
1769: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1770: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 38 11 02 02 0B FA AE A9 88 32 90 88 38 17 88 33 00 00 11 15 00 00 00 00 00 00 00 00 00 00 00 00 
1771: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1772: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1773: [RX_DR] W_REGISTER: STATUS = 70 
  -- 399.6us pass --
1774: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1775: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 08 FF 00 00 00 0C 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
1776: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1777: [RX_DR] W_REGISTER: CONFIG = 0E 
1778: [RX_DR] FLUSH_TX
1779: [RX_DR] FLUSH_RX
1780: [RX_DR] W_REGISTER: STATUS = 70 
1781: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 0C 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 368.9us pass --
1782: [TX_DS] W_REGISTER: STATUS = 70 
1783: W_REGISTER: CONFIG = 0F 
1784: FLUSH_TX
1785: FLUSH_RX
1786: W_REGISTER: STATUS = 70 
1787: R_REGISTER: FIFO_STATUS is 11 
1788: W_REGISTER: STATUS = 70 
  -- 797.1us pass --
1789: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1790: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 02 FF 00 00 00 0D 00 00 00 08 00 60 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
1791: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1792: [RX_DR] W_REGISTER: CONFIG = 0E 
1793: [RX_DR] FLUSH_TX
1794: [RX_DR] FLUSH_RX
1795: [RX_DR] W_REGISTER: STATUS = 70 
1796: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 0D 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 368.0us pass --
1797: [TX_DS] W_REGISTER: STATUS = 70 
1798: W_REGISTER: CONFIG = 0F 
1799: FLUSH_TX
1800: FLUSH_RX
1801: W_REGISTER: STATUS = 70 
1802: R_REGISTER: FIFO_STATUS is 11 
1803: W_REGISTER: STATUS = 70 
  -- 2.7ms pass --
1804: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1805: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 55 42 00 81 00 00 59 53 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
1806: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1807: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1808: [RX_DR] W_REGISTER: STATUS = 70 
  -- 324.7us pass --
1809: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1810: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
1811: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1812: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1813: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.6us pass --
1814: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1815: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
1816: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1817: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1818: [RX_DR] W_REGISTER: STATUS = 70 
  -- 394.9us pass --
1819: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1820: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 08 FF 00 00 00 0D 00 00 00 08 00 60 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
1821: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1822: [RX_DR] W_REGISTER: CONFIG = 0E 
1823: [RX_DR] FLUSH_TX
1824: [RX_DR] FLUSH_RX
1825: [RX_DR] W_REGISTER: STATUS = 70 
1826: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 0D 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.0us pass --
1827: [TX_DS] W_REGISTER: STATUS = 70 
1828: W_REGISTER: CONFIG = 0F 
1829: FLUSH_TX
1830: FLUSH_RX
1831: W_REGISTER: STATUS = 70 
1832: R_REGISTER: FIFO_STATUS is 11 
1833: W_REGISTER: STATUS = 70 
  -- 0.8ms pass --
1834: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1835: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 02 FF 00 00 00 0E 00 00 03 FF 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
1836: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1837: [RX_DR] W_REGISTER: CONFIG = 0E 
1838: [RX_DR] FLUSH_TX
1839: [RX_DR] FLUSH_RX
1840: [RX_DR] W_REGISTER: STATUS = 70 
1841: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 0E 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.2us pass --
1842: [TX_DS] W_REGISTER: STATUS = 70 
1843: W_REGISTER: CONFIG = 0F 
1844: FLUSH_TX
1845: FLUSH_RX
1846: W_REGISTER: STATUS = 70 
1847: R_REGISTER: FIFO_STATUS is 11 
1848: W_REGISTER: STATUS = 70 
  -- 2.7ms pass --
1849: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1850: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: D8 FF 00 80 10 00 E0 FF 46 49 46 4A 00 01 01 00 01 00 01 00 DB FF 00 00 09 00 43 00 07 0D 07 06 
1851: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1852: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1853: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.2us pass --
1854: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1855: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 07 06 00 01 1C 0F 0C 09 06 09 0C 15 1E 0C 09 06 22 30 2B 1C 0A 0C 19 21 19 0C 07 09 31 1C 24 1F 
1856: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1857: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1858: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.3us pass --
1859: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1860: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 39 3D 00 02 1E 2E 1C 34 1C 13 15 12 33 34 28 27 21 37 34 3C 1F 28 22 19 2B 27 33 2E FF 31 34 39 
1861: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1862: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1863: [RX_DR] W_REGISTER: STATUS = 70 
  -- 308.7us pass --
1864: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1865: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 DB 01 80 09 09 01 43 09 18 31 0D 31 31 31 0C 21 31 31 31 31 1C 0C 0A 31 31 31 31 31 31 31 31 
1866: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1867: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1868: [RX_DR] W_REGISTER: STATUS = 70 
  -- 339.4us pass --
1869: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1870: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 21 01 01 31 31 31 0D 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 
1871: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1872: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1873: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.4us pass --
1874: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1875: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 31 31 01 02 31 31 31 31 C4 FF 31 31 00 00 1F 00 01 01 05 01 01 01 01 01 00 00 00 00 00 00 00 00 
1876: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1877: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1878: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.4us pass --
1879: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1880: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 02 01 02 80 06 05 04 03 0A 09 08 07 00 C4 FF 0B 02 00 10 B5 02 03 03 01 05 05 03 04 00 00 04 04 
1881: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1882: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1883: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.6us pass --
1884: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1885: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 7D 01 02 01 00 03 02 01 12 05 11 04 06 41 31 21 07 61 51 13 32 14 71 22 08 A1 91 81 C1 B1 42 23 
1886: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1887: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1888: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.2us pass --
1889: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1890: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 52 15 02 02 33 24 F0 D1 09 82 72 62 18 17 16 0A 26 25 1A 19 2A 29 28 27 37 36 35 34 43 3A 39 38 
1891: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1892: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1893: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.2ms pass --
1894: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1895: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 44 03 80 49 48 47 46 55 54 53 4A 59 58 57 56 65 64 63 5A 69 68 67 66 75 74 73 6A 79 78 77 76 
1896: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1897: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1898: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.1us pass --
1899: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1900: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 83 7A 03 01 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 A9 A8 A7 A6 B4 B3 B2 AA 
1901: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1902: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1903: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.3us pass --
1904: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1905: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: B6 B5 03 02 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 E2 E1 DA D9 E6 E5 E4 E3 
1906: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1907: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1908: [RX_DR] W_REGISTER: STATUS = 70 
  -- 300.0us pass --
1909: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1910: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: E8 E7 04 80 F2 F1 EA E9 F6 F5 F4 F3 FA F9 F8 F7 1F 00 C4 FF 01 03 00 01 01 01 01 01 01 01 01 01 
1911: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1912: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1913: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.9us pass --
1914: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1915: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 04 01 00 00 00 00 04 03 02 01 08 07 06 05 FF 0B 0A 09 11 B5 00 C4 02 01 02 00 04 03 04 04 
1916: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1917: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1918: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.3us pass --
1919: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1920: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 07 04 02 01 00 04 04 01 00 77 02 04 11 03 02 06 31 21 05 07 51 41 12 22 13 71 61 14 08 81 32 
1921: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1922: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1923: [RX_DR] W_REGISTER: STATUS = 70 
  -- 315.7us pass --
1924: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1925: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 91 42 05 80 09 C1 B1 A1 F0 52 33 23 D1 72 62 15 34 24 16 0A 17 F1 25 E1 26 1A 19 18 2A 29 28 27 
1926: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1927: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1928: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.0us pass --
1929: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1930: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 36 35 05 01 3A 39 38 37 46 45 44 43 4A 49 48 47 56 55 54 53 5A 59 58 57 66 65 64 63 6A 69 68 67 
1931: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1932: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1933: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.3us pass --
1934: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1935: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 74 73 05 02 78 77 76 75 83 82 7A 79 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 
1936: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1937: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1938: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
1939: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1940: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A7 A6 06 80 B2 AA A9 A8 B6 B5 B4 B3 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 
1941: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1942: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1943: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.5us pass --
1944: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1945: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: DA D9 06 01 E5 E4 E3 E2 E9 E8 E7 E6 F4 F3 F2 EA F8 F7 F6 F5 C0 FF FA F9 00 08 11 00 03 A0 00 78 
1946: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1947: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1948: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.6us pass --
1949: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1950: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 21 01 06 02 01 11 02 00 FF 01 11 03 03 0C 00 DA 11 02 00 01 3F 00 11 03 28 7A F2 00 09 40 51 18 
1951: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1952: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1953: [RX_DR] W_REGISTER: STATUS = 70 
  -- 312.6us pass --
1954: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1955: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 40 4B 07 80 51 00 14 05 0C 14 05 40 A2 20 A6 28 C0 14 05 90 8A 02 A0 28 01 A4 28 00 28 0A 30 45 
1956: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1957: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1958: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.4us pass --
1959: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1960: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A2 00 07 01 18 28 0A 80 8A 82 40 51 02 A0 28 00 A0 28 00 8A 28 00 8A 02 01 8A 02 A0 51 00 14 05 
1961: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1962: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1963: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.6us pass --
1964: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1965: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 40 07 02 40 51 00 14 28 08 14 05 98 A2 30 A4 40 07 14 05 28 0A 80 A2 C2 40 51 10 50 14 40 8A 
1966: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1967: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1968: [RX_DR] W_REGISTER: STATUS = 70 
  -- 319.4us pass --
1969: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1970: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 01 08 80 00 28 0A 30 0A 74 90 A2 9D A2 00 28 01 A4 28 80 28 0A 30 45 0A 80 A2 00 4C 51 00 29 
1971: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1972: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1973: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.3us pass --
1974: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1975: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A 02 08 01 01 A4 28 00 28 0A 30 45 0A 80 A2 00 80 A2 00 28 51 00 29 0A C0 14 05 40 45 01 A4 28 
1976: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1977: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1978: [RX_DR] W_REGISTER: STATUS = 70 
  -- 320.9us pass --
1979: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1980: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 0A 30 08 02 52 14 00 0D 0A 80 A2 00 98 A2 00 28 10 28 0A 75 8A C2 40 51 01 A4 28 00 53 14 00 45 
1981: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1982: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1983: [RX_DR] W_REGISTER: STATUS = 70 
  -- 314.5us pass --
1984: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1985: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A2 00 09 80 C1 14 05 90 05 98 14 05 40 51 00 14 28 C0 14 05 00 8A 02 A0 8A 02 A0 28 01 A4 28 00 
1986: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1987: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1988: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.1ms pass --
1989: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1990: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 45 09 01 45 01 50 14 01 50 14 00 53 14 00 45 0A 80 A2 00 4C 51 00 29 0A 43 8A 02 A0 28 88 29 
1991: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1992: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1993: [RX_DR] W_REGISTER: STATUS = 70 
  -- 326.8us pass --
1994: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
1995: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A 02 09 02 01 A4 28 00 29 0A 30 45 05 40 51 00 51 00 FA 14 61 8A 02 48 1D A4 28 D0 14 60 8A 02 
1996: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1997: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
1998: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.7us pass --
1999: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2000: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 52 0A 80 8A 82 40 51 01 50 14 60 28 0A 20 45 00 53 14 06 29 0A 80 A2 05 40 51 00 A0 28 C0 14 
2001: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2002: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2003: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.9us pass --
2004: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2005: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A 02 0A 01 00 14 05 18 8A 02 48 51 01 50 14 60 50 14 00 45 14 00 45 01 8A 02 D4 51 1A 53 14 40 
2006: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2007: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2008: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.7us pass --
2009: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2010: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 28 0A 0A 02 00 28 0A 12 28 0A 80 A2 05 90 A2 00 A1 28 C0 14 05 40 51 80 A0 28 80 14 14 60 8A 02 
2011: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2012: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2013: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.7us pass --
2014: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2015: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 01 50 0B 80 50 14 00 45 14 00 45 01 20 45 01 50 51 80 29 0A B4 94 10 48 01 A4 28 C0 28 0A 30 45 
2016: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2017: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2018: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.3us pass --
2019: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2020: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: FF 03 0B 01 00 00 00 D9 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
2021: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2022: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2023: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.1us pass --
2024: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2025: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 0B 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
2026: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2027: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2028: [RX_DR] W_REGISTER: STATUS = 70 
  -- 407.9us pass --
2029: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2030: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 0E 00 00 03 FF 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2031: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2032: [RX_DR] W_REGISTER: CONFIG = 0E 
2033: [RX_DR] FLUSH_TX
2034: [RX_DR] FLUSH_RX
2035: [RX_DR] W_REGISTER: STATUS = 70 
2036: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 0E 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 368.9us pass --
2037: [TX_DS] W_REGISTER: STATUS = 70 
2038: W_REGISTER: CONFIG = 0F 
2039: FLUSH_TX
2040: FLUSH_RX
2041: W_REGISTER: STATUS = 70 
2042: R_REGISTER: FIFO_STATUS is 11 
2043: W_REGISTER: STATUS = 70 
  -- 3.3ms pass --
2044: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2045: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 0E 00 00 03 FF 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2046: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2047: [RX_DR] W_REGISTER: CONFIG = 0E 
2048: [RX_DR] FLUSH_TX
2049: [RX_DR] FLUSH_RX
2050: [RX_DR] W_REGISTER: STATUS = 70 
2051: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 0E 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.1us pass --
2052: [TX_DS] W_REGISTER: STATUS = 70 
2053: W_REGISTER: CONFIG = 0F 
2054: FLUSH_TX
2055: FLUSH_RX
2056: W_REGISTER: STATUS = 70 
2057: R_REGISTER: FIFO_STATUS is 11 
2058: W_REGISTER: STATUS = 70 
  -- 1.7ms pass --
2059: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2060: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 02 FF 00 00 00 0F 00 00 03 FF 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2061: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2062: [RX_DR] W_REGISTER: CONFIG = 0E 
2063: [RX_DR] FLUSH_TX
2064: [RX_DR] FLUSH_RX
2065: [RX_DR] W_REGISTER: STATUS = 70 
2066: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 0F 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.6us pass --
2067: [TX_DS] W_REGISTER: STATUS = 70 
2068: W_REGISTER: CONFIG = 0F 
2069: FLUSH_TX
2070: FLUSH_RX
2071: W_REGISTER: STATUS = 70 
2072: R_REGISTER: FIFO_STATUS is 11 
2073: W_REGISTER: STATUS = 70 
  -- 2.1ms pass --
2074: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2075: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: D8 FF 00 80 10 00 E0 FF 46 49 46 4A 00 01 01 00 01 00 01 00 DB FF 00 00 09 00 43 00 07 0D 07 06 
2076: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2077: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2078: [RX_DR] W_REGISTER: STATUS = 70 
  -- 327.5us pass --
2079: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2080: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 07 06 00 01 1C 0F 0C 09 06 09 0C 15 1E 0C 09 06 22 30 2B 1C 0A 0C 19 21 19 0C 07 09 31 1C 24 1F 
2081: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2082: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2083: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.4us pass --
2084: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2085: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 39 3D 00 02 1E 2E 1C 34 1C 13 15 12 33 34 28 27 21 37 34 3C 1F 28 22 19 2B 27 33 2E FF 31 34 39 
2086: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2087: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2088: [RX_DR] W_REGISTER: STATUS = 70 
  -- 309.3us pass --
2089: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2090: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 DB 01 80 09 09 01 43 09 18 31 0D 31 31 31 0C 21 31 31 31 31 1C 0C 0A 31 31 31 31 31 31 31 31 
2091: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2092: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2093: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.1us pass --
2094: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2095: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 21 01 01 31 31 31 0D 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 
2096: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2097: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2098: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.1us pass --
2099: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2100: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 31 31 01 02 31 31 31 31 C4 FF 31 31 00 00 1F 00 01 01 05 01 01 01 01 01 00 00 00 00 00 00 00 00 
2101: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2102: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2103: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.9us pass --
2104: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2105: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 02 01 02 80 06 05 04 03 0A 09 08 07 00 C4 FF 0B 02 00 10 B5 02 03 03 01 05 05 03 04 00 00 04 04 
2106: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2107: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2108: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.5us pass --
2109: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2110: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 7D 01 02 01 00 03 02 01 12 05 11 04 06 41 31 21 07 61 51 13 32 14 71 22 08 A1 91 81 C1 B1 42 23 
2111: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2112: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2113: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.5us pass --
2114: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2115: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 52 15 02 02 33 24 F0 D1 09 82 72 62 18 17 16 0A 26 25 1A 19 2A 29 28 27 37 36 35 34 43 3A 39 38 
2116: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2117: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2118: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.1ms pass --
2119: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2120: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 44 03 80 49 48 47 46 55 54 53 4A 59 58 57 56 65 64 63 5A 69 68 67 66 75 74 73 6A 79 78 77 76 
2121: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2122: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2123: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.0us pass --
2124: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2125: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 83 7A 03 01 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 A9 A8 A7 A6 B4 B3 B2 AA 
2126: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2127: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2128: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.3us pass --
2129: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2130: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: B6 B5 03 02 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 E2 E1 DA D9 E6 E5 E4 E3 
2131: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2132: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2133: [RX_DR] W_REGISTER: STATUS = 70 
  -- 312.1us pass --
2134: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2135: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: E8 E7 04 80 F2 F1 EA E9 F6 F5 F4 F3 FA F9 F8 F7 1F 00 C4 FF 01 03 00 01 01 01 01 01 01 01 01 01 
2136: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2137: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2138: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.2us pass --
2139: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2140: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 04 01 00 00 00 00 04 03 02 01 08 07 06 05 FF 0B 0A 09 11 B5 00 C4 02 01 02 00 04 03 04 04 
2141: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2142: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2143: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.1us pass --
2144: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2145: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 07 04 02 01 00 04 04 01 00 77 02 04 11 03 02 06 31 21 05 07 51 41 12 22 13 71 61 14 08 81 32 
2146: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2147: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2148: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.7us pass --
2149: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2150: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 91 42 05 80 09 C1 B1 A1 F0 52 33 23 D1 72 62 15 34 24 16 0A 17 F1 25 E1 26 1A 19 18 2A 29 28 27 
2151: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2152: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2153: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.7us pass --
2154: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2155: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 36 35 05 01 3A 39 38 37 46 45 44 43 4A 49 48 47 56 55 54 53 5A 59 58 57 66 65 64 63 6A 69 68 67 
2156: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2157: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2158: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.6us pass --
2159: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2160: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 74 73 05 02 78 77 76 75 83 82 7A 79 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 
2161: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2162: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2163: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
2164: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2165: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A7 A6 06 80 B2 AA A9 A8 B6 B5 B4 B3 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 
2166: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2167: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2168: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.8us pass --
2169: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2170: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: DA D9 06 01 E5 E4 E3 E2 E9 E8 E7 E6 F4 F3 F2 EA F8 F7 F6 F5 C0 FF FA F9 00 08 11 00 03 A0 00 78 
2171: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2172: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2173: [RX_DR] W_REGISTER: STATUS = 70 
  -- 327.4us pass --
2174: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2175: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 21 01 06 02 01 11 02 00 FF 01 11 03 03 0C 00 DA 11 02 00 01 3F 00 11 03 28 7A F2 00 09 40 51 18 
2176: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2177: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2178: [RX_DR] W_REGISTER: STATUS = 70 
  -- 318.4us pass --
2179: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2180: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 40 4B 07 80 51 00 14 05 0C 14 05 40 A2 20 A6 28 C0 14 05 90 8A 02 A0 28 01 A4 28 00 28 0A 30 45 
2181: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2182: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2183: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.4us pass --
2184: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2185: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A2 00 07 01 18 28 0A 80 8A 82 40 51 02 A0 28 00 A0 28 00 8A 28 00 8A 02 01 8A 02 A0 51 00 14 05 
2186: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2187: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2188: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.2us pass --
2189: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2190: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 40 07 02 40 51 00 14 28 08 14 05 98 A2 30 A4 40 07 14 05 28 0A 80 A2 C2 40 51 10 50 14 40 8A 
2191: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2192: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2193: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.7us pass --
2194: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2195: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 01 08 80 00 28 0A 30 0A 74 90 A2 9D A2 00 28 01 A4 28 80 28 0A 30 45 0A 80 A2 00 4C 51 00 29 
2196: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2197: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2198: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.3us pass --
2199: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2200: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A 02 08 01 01 A4 28 00 28 0A 30 45 0A 80 A2 00 80 A2 00 28 51 00 29 0A C0 14 05 40 45 01 A4 28 
2201: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2202: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2203: [RX_DR] W_REGISTER: STATUS = 70 
  -- 323.5us pass --
2204: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2205: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 0A 30 08 02 52 14 00 0D 0A 80 A2 00 98 A2 00 28 10 28 0A 75 8A C2 40 51 01 A4 28 00 53 14 00 45 
2206: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2207: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2208: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.9us pass --
2209: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2210: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A2 00 09 80 C1 14 05 90 05 98 14 05 40 51 00 14 28 C0 14 05 00 8A 02 A0 8A 02 A0 28 01 A4 28 00 
2211: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2212: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2213: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.1ms pass --
2214: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2215: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 45 09 01 45 01 50 14 01 50 14 00 53 14 00 45 0A 80 A2 00 4C 51 00 29 0A 43 8A 02 A0 28 88 29 
2216: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2217: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2218: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.7us pass --
2219: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2220: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A 02 09 02 01 A4 28 00 29 0A 30 45 05 40 51 00 51 00 FA 14 61 8A 02 48 1D A4 28 D0 14 60 8A 02 
2221: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2222: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2223: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.6us pass --
2224: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2225: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 52 0A 80 8A 82 40 51 01 50 14 60 28 0A 20 45 00 53 14 06 29 0A 80 A2 05 40 51 00 A0 28 C0 14 
2226: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2227: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2228: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.2us pass --
2229: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2230: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A 02 0A 01 00 14 05 18 8A 02 48 51 01 50 14 60 50 14 00 45 14 00 45 01 8A 02 D4 51 1A 53 14 40 
2231: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2232: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2233: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.3us pass --
2234: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2235: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 28 0A 0A 02 00 28 0A 12 28 0A 80 A2 05 90 A2 00 A1 28 C0 14 05 40 51 80 A0 28 80 14 14 60 8A 02 
2236: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2237: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2238: [RX_DR] W_REGISTER: STATUS = 70 
  -- 319.7us pass --
2239: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2240: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 01 50 0B 80 50 14 00 45 14 00 45 01 20 45 01 50 51 80 29 0A B4 94 10 48 01 A4 28 C0 28 0A 30 45 
2241: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2242: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2243: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.4us pass --
2244: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2245: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: FF 03 0B 01 00 00 00 D9 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
2246: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2247: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2248: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.4us pass --
2249: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2250: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 0B 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
2251: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2252: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2253: [RX_DR] W_REGISTER: STATUS = 70 
  -- 405.5us pass --
2254: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2255: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 0F 00 00 03 FF 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2256: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2257: [RX_DR] W_REGISTER: CONFIG = 0E 
2258: [RX_DR] FLUSH_TX
2259: [RX_DR] FLUSH_RX
2260: [RX_DR] W_REGISTER: STATUS = 70 
2261: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 0F 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 368.8us pass --
2262: [TX_DS] W_REGISTER: STATUS = 70 
2263: W_REGISTER: CONFIG = 0F 
2264: FLUSH_TX
2265: FLUSH_RX
2266: W_REGISTER: STATUS = 70 
2267: R_REGISTER: FIFO_STATUS is 11 
2268: W_REGISTER: STATUS = 70 
  -- 3.4ms pass --
2269: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2270: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 0F 00 00 03 FF 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2271: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2272: [RX_DR] W_REGISTER: CONFIG = 0E 
2273: [RX_DR] FLUSH_TX
2274: [RX_DR] FLUSH_RX
2275: [RX_DR] W_REGISTER: STATUS = 70 
2276: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 0F 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.6us pass --
2277: [TX_DS] W_REGISTER: STATUS = 70 
2278: W_REGISTER: CONFIG = 0F 
2279: FLUSH_TX
2280: FLUSH_RX
2281: W_REGISTER: STATUS = 70 
2282: R_REGISTER: FIFO_STATUS is 11 
2283: W_REGISTER: STATUS = 70 
  -- 1.7ms pass --
2284: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2285: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 02 FF 00 00 00 10 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2286: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2287: [RX_DR] W_REGISTER: CONFIG = 0E 
2288: [RX_DR] FLUSH_TX
2289: [RX_DR] FLUSH_RX
2290: [RX_DR] W_REGISTER: STATUS = 70 
2291: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 10 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.4us pass --
2292: [TX_DS] W_REGISTER: STATUS = 70 
2293: W_REGISTER: CONFIG = 0F 
2294: FLUSH_TX
2295: FLUSH_RX
2296: W_REGISTER: STATUS = 70 
2297: R_REGISTER: FIFO_STATUS is 11 
2298: W_REGISTER: STATUS = 70 
  -- 2.0ms pass --
2299: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2300: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 D6 00 81 9C D9 00 2C B8 89 98 EB 24 48 98 AA 19 13 32 37 D9 9B FB BB B8 8A BB 19 32 14 51 72 
2301: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2302: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2303: [RX_DR] W_REGISTER: STATUS = 70 
  -- 323.1us pass --
2304: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2305: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 80 91 00 01 B9 89 E8 AA 1A 81 E9 98 22 11 62 16 9C 8C B8 88 8B B9 89 C8 27 32 54 B1 AA 88 02 20 
2306: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2307: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2308: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.5us pass --
2309: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2310: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A DB 00 02 00 CC 8A AB 11 71 25 4A BB A9 80 11 B9 C9 AC BC 41 71 90 8B 92 81 33 23 B9 9A E9 AC 
2311: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2312: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2313: [RX_DR] W_REGISTER: STATUS = 70 
  -- 306.8us pass --
2314: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2315: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: DA 8B 01 81 33 27 11 11 CA 10 04 34 9D A9 BD AA 63 C1 0A B9 01 43 34 21 AD BA 9A 81 80 BB 89 D0 
2316: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2317: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2318: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.1us pass --
2319: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2320: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 06 4A 01 01 19 32 12 53 9C CC BC B8 89 0A AA AB 32 26 42 44 DA 99 01 21 D8 9B CA CA 61 33 09 10 
2321: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2322: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2323: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.8us pass --
2324: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2325: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 13 33 01 02 CC D8 98 03 2B B8 BB BC 35 34 52 12 81 11 22 53 9C CB CC B8 32 10 10 A9 22 25 33 73 
2326: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2327: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2328: [RX_DR] W_REGISTER: STATUS = 70 
  -- 313.9us pass --
2329: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2330: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 80 80 02 81 BA AF AB D9 34 22 18 99 31 33 42 53 AD FA BB 21 08 A8 9C AB 44 25 31 80 F8 B8 11 12 
2331: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2332: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2333: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.0us pass --
2334: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2335: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: CB 99 02 01 29 98 BA 89 61 34 35 43 A9 98 01 81 A9 99 DB 9D 13 39 98 8A 01 52 32 56 20 C9 9A 98 
2336: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2337: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2338: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.6us pass --
2339: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2340: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 1A 02 02 39 00 F9 80 99 A2 30 47 81 AB 89 FB 00 00 B0 0A 00 00 00 00 00 00 00 00 00 00 00 00 
2341: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2342: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2343: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.1ms pass --
2344: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2345: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 08 FF 00 00 00 10 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2346: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2347: [RX_DR] W_REGISTER: CONFIG = 0E 
2348: [RX_DR] FLUSH_TX
2349: [RX_DR] FLUSH_RX
2350: [RX_DR] W_REGISTER: STATUS = 70 
2351: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 10 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.5us pass --
2352: [TX_DS] W_REGISTER: STATUS = 70 
2353: W_REGISTER: CONFIG = 0F 
2354: FLUSH_TX
2355: FLUSH_RX
2356: W_REGISTER: STATUS = 70 
2357: R_REGISTER: FIFO_STATUS is 11 
2358: W_REGISTER: STATUS = 70 
  -- 0.8ms pass --
2359: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2360: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 02 FF 00 00 00 11 00 00 04 2F 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2361: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2362: [RX_DR] W_REGISTER: CONFIG = 0E 
2363: [RX_DR] FLUSH_TX
2364: [RX_DR] FLUSH_RX
2365: [RX_DR] W_REGISTER: STATUS = 70 
2366: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 11 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 368.9us pass --
2367: [TX_DS] W_REGISTER: STATUS = 70 
2368: W_REGISTER: CONFIG = 0F 
2369: FLUSH_TX
2370: FLUSH_RX
2371: W_REGISTER: STATUS = 70 
2372: R_REGISTER: FIFO_STATUS is 11 
2373: W_REGISTER: STATUS = 70 
  -- 752.8us pass --
2374: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2375: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: D8 FF 00 80 10 00 E0 FF 46 49 46 4A 00 01 01 00 01 00 01 00 DB FF 00 00 09 00 43 00 07 0D 07 06 
2376: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2377: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2378: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.6us pass --
2379: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2380: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 07 06 00 01 1C 0F 0C 09 06 09 0C 15 1E 0C 09 06 22 30 2B 1C 0A 0C 19 21 19 0C 07 09 31 1C 24 1F 
2381: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2382: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2383: [RX_DR] W_REGISTER: STATUS = 70 
  -- 326.7us pass --
2384: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2385: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 39 3D 00 02 1E 2E 1C 34 1C 13 15 12 33 34 28 27 21 37 34 3C 1F 28 22 19 2B 27 33 2E FF 31 34 39 
2386: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2387: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2388: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
2389: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2390: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 DB 01 80 09 09 01 43 09 18 31 0D 31 31 31 0C 21 31 31 31 31 1C 0C 0A 31 31 31 31 31 31 31 31 
2391: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2392: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2393: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.5us pass --
2394: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2395: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 21 01 01 31 31 31 0D 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 
2396: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2397: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2398: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.6us pass --
2399: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2400: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 31 31 01 02 31 31 31 31 C4 FF 31 31 00 00 1F 00 01 01 05 01 01 01 01 01 00 00 00 00 00 00 00 00 
2401: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2402: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2403: [RX_DR] W_REGISTER: STATUS = 70 
  -- 310.1us pass --
2404: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2405: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 02 01 02 80 06 05 04 03 0A 09 08 07 00 C4 FF 0B 02 00 10 B5 02 03 03 01 05 05 03 04 00 00 04 04 
2406: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2407: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2408: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.7us pass --
2409: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2410: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 7D 01 02 01 00 03 02 01 12 05 11 04 06 41 31 21 07 61 51 13 32 14 71 22 08 A1 91 81 C1 B1 42 23 
2411: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2412: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2413: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.5us pass --
2414: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2415: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 52 15 02 02 33 24 F0 D1 09 82 72 62 18 17 16 0A 26 25 1A 19 2A 29 28 27 37 36 35 34 43 3A 39 38 
2416: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2417: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2418: [RX_DR] W_REGISTER: STATUS = 70 
  -- 315.7us pass --
2419: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2420: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 44 03 80 49 48 47 46 55 54 53 4A 59 58 57 56 65 64 63 5A 69 68 67 66 75 74 73 6A 79 78 77 76 
2421: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2422: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2423: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.9us pass --
2424: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2425: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 83 7A 03 01 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 A9 A8 A7 A6 B4 B3 B2 AA 
2426: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2427: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2428: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.5us pass --
2429: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2430: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: B6 B5 03 02 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 E2 E1 DA D9 E6 E5 E4 E3 
2431: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2432: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2433: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
2434: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2435: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: E8 E7 04 80 F2 F1 EA E9 F6 F5 F4 F3 FA F9 F8 F7 1F 00 C4 FF 01 03 00 01 01 01 01 01 01 01 01 01 
2436: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2437: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2438: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.5us pass --
2439: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2440: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 04 01 00 00 00 00 04 03 02 01 08 07 06 05 FF 0B 0A 09 11 B5 00 C4 02 01 02 00 04 03 04 04 
2441: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2442: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2443: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.2us pass --
2444: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2445: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 07 04 02 01 00 04 04 01 00 77 02 04 11 03 02 06 31 21 05 07 51 41 12 22 13 71 61 14 08 81 32 
2446: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2447: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2448: [RX_DR] W_REGISTER: STATUS = 70 
  -- 315.2us pass --
2449: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2450: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 91 42 05 80 09 C1 B1 A1 F0 52 33 23 D1 72 62 15 34 24 16 0A 17 F1 25 E1 26 1A 19 18 2A 29 28 27 
2451: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2452: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2453: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.1us pass --
2454: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2455: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 36 35 05 01 3A 39 38 37 46 45 44 43 4A 49 48 47 56 55 54 53 5A 59 58 57 66 65 64 63 6A 69 68 67 
2456: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2457: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2458: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.2us pass --
2459: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2460: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 74 73 05 02 78 77 76 75 83 82 7A 79 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 
2461: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2462: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2463: [RX_DR] W_REGISTER: STATUS = 70 
  -- 313.6us pass --
2464: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2465: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A7 A6 06 80 B2 AA A9 A8 B6 B5 B4 B3 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 
2466: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2467: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2468: [RX_DR] W_REGISTER: STATUS = 70 
  -- 336.2us pass --
2469: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2470: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: DA D9 06 01 E5 E4 E3 E2 E9 E8 E7 E6 F4 F3 F2 EA F8 F7 F6 F5 C0 FF FA F9 00 08 11 00 03 A0 00 78 
2471: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2472: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2473: [RX_DR] W_REGISTER: STATUS = 70 
  -- 320.4us pass --
2474: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2475: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 21 01 06 02 01 11 02 00 FF 01 11 03 03 0C 00 DA 11 02 00 01 3F 00 11 03 28 BA F1 00 2E 50 14 60 
2476: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2477: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2478: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.9us pass --
2479: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2480: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 81 07 80 14 05 5B 03 02 A0 28 08 53 14 06 8A 0C 29 0A 62 0A 56 A0 28 14 05 8D 29 C0 50 14 84 
2481: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2482: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2483: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.1ms pass --
2484: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2485: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A0 28 07 01 0A 43 8A 02 A4 28 88 29 F4 31 45 01 A2 00 28 0A 02 45 01 84 41 1B 28 0A 8A 82 00 45 
2486: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2487: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2488: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.3us pass --
2489: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2490: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: B0 42 07 02 02 7D 4C 51 0A 02 3A 8A A6 28 08 29 0A 03 45 01 80 A2 00 28 68 0B 28 0A 41 D0 51 14 
2491: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2492: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2493: [RX_DR] W_REGISTER: STATUS = 70 
  -- 314.6us pass --
2494: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2495: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 45 08 80 A2 30 50 14 00 14 05 81 C2 B8 4F 51 14 44 5D 8A 29 0A 60 51 C3 A6 28 0C 02 8A 82 FC 
2496: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2497: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2498: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.7us pass --
2499: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2500: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 FA 08 01 A0 28 08 14 05 14 05 3A D0 10 8A 82 14 05 40 51 80 A2 00 75 51 10 28 0A 00 14 05 40 
2501: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2502: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2503: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.6us pass --
2504: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2505: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 51 08 02 01 A6 28 C0 14 80 2E 45 03 45 01 50 15 16 45 41 80 3A 8A 82 DA A0 4F 51 A0 0B 29 0A 
2506: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2507: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2508: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.9us pass --
2509: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2510: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 48 51 09 80 14 60 8A 02 80 A2 30 50 51 10 28 0A 14 05 FA 40 61 A0 28 08 50 14 00 45 41 02 45 01 
2511: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2512: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2513: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.4us pass --
2514: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2515: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 03 45 09 01 28 08 29 0A 29 0A 43 AA 82 40 51 00 14 05 10 8A C2 40 51 00 14 85 01 8A 8A C2 C4 2D 
2516: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2517: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2518: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.4us pass --
2519: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2520: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 28 00 09 02 61 8A 02 A0 34 A4 28 D4 82 24 50 14 01 E4 7F 8A 45 01 24 45 00 45 61 03 A2 20 50 14 
2521: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2522: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2523: [RX_DR] W_REGISTER: STATUS = 70 
  -- 314.5us pass --
2524: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2525: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 85 81 0A 80 40 5B 31 14 A2 30 84 A2 84 A2 30 81 61 80 A2 30 50 14 00 45 02 0C 45 01 45 61 42 8A 
2526: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2527: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2528: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
2529: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2530: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 83 3E 0A 01 0B 50 14 E8 0A 80 A2 60 41 82 B6 28 B0 81 1D 45 14 05 98 A2 61 A0 28 80 50 14 00 45 
2531: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2532: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2533: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.6us pass --
2534: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2535: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 01 0A 02 20 50 14 00 28 0A 80 A2 08 86 A2 00 A2 30 A4 28 00 14 05 98 14 05 40 51 20 A4 28 C0 
2536: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2537: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2538: [RX_DR] W_REGISTER: STATUS = 70 
  -- 312.7us pass --
2539: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2540: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 80 A2 0B 80 51 18 28 0A 06 8A 82 40 A2 00 53 14 40 51 98 90 14 04 8A C2 80 A2 30 50 A2 20 00 FF 
2541: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2542: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2543: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.4us pass --
2544: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2545: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 81 0B 01 45 E1 0E 14 1F 28 0A 02 A0 8E A2 40 45 01 50 14 1A 28 0A 02 14 60 28 0A 14 E8 2B 50 
2546: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2547: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2548: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.9us pass --
2549: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2550: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 01 50 0B 02 51 14 00 45 00 45 61 D0 45 01 50 14 08 50 14 00 00 D9 FF 00 00 00 00 00 00 00 00 00 
2551: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2552: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2553: [RX_DR] W_REGISTER: STATUS = 70 
  -- 407.8us pass --
2554: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2555: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 11 00 00 04 2F 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2556: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2557: [RX_DR] W_REGISTER: CONFIG = 0E 
2558: [RX_DR] FLUSH_TX
2559: [RX_DR] FLUSH_RX
2560: [RX_DR] W_REGISTER: STATUS = 70 
2561: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 11 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.3us pass --
2562: [TX_DS] W_REGISTER: STATUS = 70 
2563: W_REGISTER: CONFIG = 0F 
2564: FLUSH_TX
2565: FLUSH_RX
2566: W_REGISTER: STATUS = 70 
2567: R_REGISTER: FIFO_STATUS is 11 
2568: W_REGISTER: STATUS = 70 
  -- 21.6ms pass --
2569: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2570: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 02 FF 00 00 00 12 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2571: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2572: [RX_DR] W_REGISTER: CONFIG = 0E 
2573: [RX_DR] FLUSH_TX
2574: [RX_DR] FLUSH_RX
2575: [RX_DR] W_REGISTER: STATUS = 70 
2576: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 12 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.9us pass --
2577: [TX_DS] W_REGISTER: STATUS = 70 
2578: W_REGISTER: CONFIG = 0F 
2579: FLUSH_TX
2580: FLUSH_RX
2581: W_REGISTER: STATUS = 70 
2582: R_REGISTER: FIFO_STATUS is 11 
2583: W_REGISTER: STATUS = 70 
  -- 754.8us pass --
2584: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2585: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: F9 3E 00 81 53 27 00 26 CB B9 90 00 09 86 19 81 45 10 30 92 CA A9 06 08 8A 09 CB 9D 36 98 A1 01 
2586: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2587: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2588: [RX_DR] W_REGISTER: STATUS = 70 
  -- 335.6us pass --
2589: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2590: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 26 33 00 01 CA 98 88 41 19 8B 9C AB 14 60 10 89 82 14 33 53 A8 9A FC 99 A9 90 88 08 43 35 32 06 
2591: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2592: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2593: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.7us pass --
2594: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2595: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 90 11 00 02 88 EC 9B AC 93 89 92 88 81 47 08 1A 9B DA DB 82 13 01 2A D0 34 45 12 21 9B 9D 13 22 
2596: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2597: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2598: [RX_DR] W_REGISTER: STATUS = 70 
  -- 308.0us pass --
2599: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2600: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 89 9A 01 81 00 1E A1 0C 22 41 32 41 8B D0 9D 95 21 4A 98 A9 33 42 44 22 8C B1 38 85 A8 9C 99 CF 
2601: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2602: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2603: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.0us pass --
2604: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2605: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 90 09 01 01 24 33 91 38 B0 28 11 26 0B A8 E9 8A 18 04 58 09 28 12 21 16 09 DD 8C D1 90 9C 08 9C 
2606: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2607: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2608: [RX_DR] W_REGISTER: STATUS = 70 
  -- 326.9us pass --
2609: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2610: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 92 28 01 02 32 25 92 51 01 98 88 00 2E 82 34 92 48 A1 29 E2 90 EF 32 9A B9 1A C8 0A 13 06 A9 31 
2611: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2612: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2613: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.2ms pass --
2614: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2615: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 30 02 81 08 53 88 12 19 88 CF 81 09 C8 40 A2 9B E9 32 C0 10 02 8E 39 10 50 45 38 02 34 10 02 
2616: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2617: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2618: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.3us pass --
2619: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2620: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: D9 80 02 01 37 82 20 BB 11 50 02 21 01 32 31 44 03 AD B1 C9 8D 85 13 23 30 13 18 31 08 09 71 AD 
2621: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2622: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2623: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.4us pass --
2624: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2625: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 79 29 02 02 59 10 88 14 BA EB 83 23 9A 04 08 0B 00 00 89 E9 00 00 00 00 00 00 00 00 00 00 00 00 
2626: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2627: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2628: [RX_DR] W_REGISTER: STATUS = 70 
  -- 396.9us pass --
2629: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2630: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 08 FF 00 00 00 12 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2631: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2632: [RX_DR] W_REGISTER: CONFIG = 0E 
2633: [RX_DR] FLUSH_TX
2634: [RX_DR] FLUSH_RX
2635: [RX_DR] W_REGISTER: STATUS = 70 
2636: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 12 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 368.8us pass --
2637: [TX_DS] W_REGISTER: STATUS = 70 
2638: W_REGISTER: CONFIG = 0F 
2639: FLUSH_TX
2640: FLUSH_RX
2641: W_REGISTER: STATUS = 70 
2642: R_REGISTER: FIFO_STATUS is 11 
2643: W_REGISTER: STATUS = 70 
  -- 0.8ms pass --
2644: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2645: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 02 FF 00 00 00 13 00 00 04 2F 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2646: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2647: [RX_DR] W_REGISTER: CONFIG = 0E 
2648: [RX_DR] FLUSH_TX
2649: [RX_DR] FLUSH_RX
2650: [RX_DR] W_REGISTER: STATUS = 70 
2651: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 13 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 367.5us pass --
2652: [TX_DS] W_REGISTER: STATUS = 70 
2653: W_REGISTER: CONFIG = 0F 
2654: FLUSH_TX
2655: FLUSH_RX
2656: W_REGISTER: STATUS = 70 
2657: R_REGISTER: FIFO_STATUS is 11 
2658: W_REGISTER: STATUS = 70 
  -- 2.8ms pass --
2659: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2660: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: D8 FF 00 80 10 00 E0 FF 46 49 46 4A 00 01 01 00 01 00 01 00 DB FF 00 00 09 00 43 00 07 0D 07 06 
2661: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2662: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2663: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.4us pass --
2664: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2665: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 07 06 00 01 1C 0F 0C 09 06 09 0C 15 1E 0C 09 06 22 30 2B 1C 0A 0C 19 21 19 0C 07 09 31 1C 24 1F 
2666: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2667: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2668: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.4us pass --
2669: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2670: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 39 3D 00 02 1E 2E 1C 34 1C 13 15 12 33 34 28 27 21 37 34 3C 1F 28 22 19 2B 27 33 2E FF 31 34 39 
2671: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2672: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2673: [RX_DR] W_REGISTER: STATUS = 70 
  -- 300.6us pass --
2674: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2675: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 DB 01 80 09 09 01 43 09 18 31 0D 31 31 31 0C 21 31 31 31 31 1C 0C 0A 31 31 31 31 31 31 31 31 
2676: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2677: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2678: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.4us pass --
2679: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2680: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 21 01 01 31 31 31 0D 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 
2681: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2682: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2683: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.3us pass --
2684: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2685: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 31 31 01 02 31 31 31 31 C4 FF 31 31 00 00 1F 00 01 01 05 01 01 01 01 01 00 00 00 00 00 00 00 00 
2686: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2687: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2688: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.6us pass --
2689: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2690: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 02 01 02 80 06 05 04 03 0A 09 08 07 00 C4 FF 0B 02 00 10 B5 02 03 03 01 05 05 03 04 00 00 04 04 
2691: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2692: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2693: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.8us pass --
2694: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2695: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 7D 01 02 01 00 03 02 01 12 05 11 04 06 41 31 21 07 61 51 13 32 14 71 22 08 A1 91 81 C1 B1 42 23 
2696: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2697: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2698: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.7us pass --
2699: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2700: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 52 15 02 02 33 24 F0 D1 09 82 72 62 18 17 16 0A 26 25 1A 19 2A 29 28 27 37 36 35 34 43 3A 39 38 
2701: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2702: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2703: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
2704: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2705: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 44 03 80 49 48 47 46 55 54 53 4A 59 58 57 56 65 64 63 5A 69 68 67 66 75 74 73 6A 79 78 77 76 
2706: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2707: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2708: [RX_DR] W_REGISTER: STATUS = 70 
2709: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2710: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 83 7A 03 01 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 A9 A8 A7 A6 B4 B3 B2 AA 
2711: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2712: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2713: [RX_DR] W_REGISTER: STATUS = 70 
2714: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2715: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: B6 B5 03 02 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 E2 E1 DA D9 E6 E5 E4 E3 
2716: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2717: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2718: [RX_DR] W_REGISTER: STATUS = 70 
2719: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2720: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: E8 E7 04 80 F2 F1 EA E9 F6 F5 F4 F3 FA F9 F8 F7 1F 00 C4 FF 01 03 00 01 01 01 01 01 01 01 01 01 
2721: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2722: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2723: [RX_DR] W_REGISTER: STATUS = 70 
2724: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2725: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 04 01 00 00 00 00 04 03 02 01 08 07 06 05 FF 0B 0A 09 11 B5 00 C4 02 01 02 00 04 03 04 04 
2726: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2727: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2728: [RX_DR] W_REGISTER: STATUS = 70 
2729: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2730: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 07 04 02 01 00 04 04 01 00 77 02 04 11 03 02 06 31 21 05 07 51 41 12 22 13 71 61 14 08 81 32 
2731: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2732: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2733: [RX_DR] W_REGISTER: STATUS = 70 
2734: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2735: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 91 42 05 80 09 C1 B1 A1 F0 52 33 23 D1 72 62 15 34 24 16 0A 17 F1 25 E1 26 1A 19 18 2A 29 28 27 
2736: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2737: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2738: [RX_DR] W_REGISTER: STATUS = 70 
2739: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2740: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 36 35 05 01 3A 39 38 37 46 45 44 43 4A 49 48 47 56 55 54 53 5A 59 58 57 66 65 64 63 6A 69 68 67 
2741: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2742: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2743: [RX_DR] W_REGISTER: STATUS = 70 
2744: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2745: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 74 73 05 02 78 77 76 75 83 82 7A 79 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 
2746: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2747: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2748: [RX_DR] W_REGISTER: STATUS = 70 
2749: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2750: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A7 A6 06 80 B2 AA A9 A8 B6 B5 B4 B3 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 
2751: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2752: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2753: [RX_DR] W_REGISTER: STATUS = 70 
2754: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2755: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: DA D9 06 01 E5 E4 E3 E2 E9 E8 E7 E6 F4 F3 F2 EA F8 F7 F6 F5 C0 FF FA F9 00 08 11 00 03 A0 00 78 
2756: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2757: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2758: [RX_DR] W_REGISTER: STATUS = 70 
2759: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2760: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 21 01 06 02 01 11 02 00 FF 01 11 03 03 0C 00 DA 11 02 00 01 3F 00 11 03 28 BA F1 00 2E 50 14 60 
2761: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2762: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2763: [RX_DR] W_REGISTER: STATUS = 70 
2764: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2765: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 81 07 80 14 05 5B 03 02 A0 28 08 53 14 06 8A 0C 29 0A 62 0A 56 A0 28 14 05 8D 29 C0 50 14 84 
2766: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2767: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2768: [RX_DR] W_REGISTER: STATUS = 70 
2769: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2770: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A0 28 07 01 0A 43 8A 02 A4 28 88 29 F4 31 45 01 A2 00 28 0A 02 45 01 84 41 1B 28 0A 8A 82 00 45 
2771: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2772: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2773: [RX_DR] W_REGISTER: STATUS = 70 
2774: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2775: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: B0 42 07 02 02 7D 4C 51 0A 02 3A 8A A6 28 08 29 0A 03 45 01 80 A2 00 28 68 0B 28 0A 41 D0 51 14 
2776: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2777: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2778: [RX_DR] W_REGISTER: STATUS = 70 
2779: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2780: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 45 08 80 A2 30 50 14 00 14 05 81 C2 B8 4F 51 14 44 5D 8A 29 0A 60 51 C3 A6 28 0C 02 8A 82 FC 
2781: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2782: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2783: [RX_DR] W_REGISTER: STATUS = 70 
2784: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2785: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 FA 08 01 A0 28 08 14 05 14 05 3A D0 10 8A 82 14 05 40 51 80 A2 00 75 51 10 28 0A 00 14 05 40 
2786: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2787: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2788: [RX_DR] W_REGISTER: STATUS = 70 
2789: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2790: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 51 08 02 01 A6 28 C0 14 80 2E 45 03 45 01 50 15 16 45 41 80 3A 8A 82 DA A0 4F 51 A0 0B 29 0A 
2791: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2792: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2793: [RX_DR] W_REGISTER: STATUS = 70 
2794: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2795: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 48 51 09 80 14 60 8A 02 80 A2 30 50 51 10 28 0A 14 05 FA 40 61 A0 28 08 50 14 00 45 41 02 45 01 
2796: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2797: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2798: [RX_DR] W_REGISTER: STATUS = 70 
2799: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2800: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 03 45 09 01 28 08 29 0A 29 0A 43 AA 82 40 51 00 14 05 10 8A C2 40 51 00 14 85 01 8A 8A C2 C4 2D 
2801: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2802: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2803: [RX_DR] W_REGISTER: STATUS = 70 
2804: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2805: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 28 00 09 02 61 8A 02 A0 34 A4 28 D4 82 24 50 14 01 E4 7F 8A 45 01 24 45 00 45 61 03 A2 20 50 14 
2806: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2807: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2808: [RX_DR] W_REGISTER: STATUS = 70 
2809: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2810: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 85 81 0A 80 40 5B 31 14 A2 30 84 A2 84 A2 30 81 61 80 A2 30 50 14 00 45 02 0C 45 01 45 61 42 8A 
2811: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2812: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2813: [RX_DR] W_REGISTER: STATUS = 70 
2814: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2815: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 83 3E 0A 01 0B 50 14 E8 0A 80 A2 60 41 82 B6 28 B0 81 1D 45 14 05 98 A2 61 A0 28 80 50 14 00 45 
2816: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2817: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2818: [RX_DR] W_REGISTER: STATUS = 70 
2819: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2820: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 01 0A 02 20 50 14 00 28 0A 80 A2 08 86 A2 00 A2 30 A4 28 00 14 05 98 14 05 40 51 20 A4 28 C0 
2821: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2822: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2823: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.2ms pass --
2824: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2825: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 80 A2 0B 80 51 18 28 0A 06 8A 82 40 A2 00 53 14 40 51 98 90 14 04 8A C2 80 A2 30 50 A2 20 00 FF 
2826: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2827: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2828: [RX_DR] W_REGISTER: STATUS = 70 
2829: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2830: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 81 0B 01 45 E1 0E 14 1F 28 0A 02 A0 8E A2 40 45 01 50 14 1A 28 0A 02 14 60 28 0A 14 E8 2B 50 
2831: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2832: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2833: [RX_DR] W_REGISTER: STATUS = 70 
  -- 430.1us pass --
2834: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2835: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 13 00 00 04 2F 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2836: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2837: [RX_DR] W_REGISTER: CONFIG = 0E 
2838: [RX_DR] FLUSH_TX
2839: [RX_DR] FLUSH_RX
2840: [RX_DR] W_REGISTER: STATUS = 70 
2841: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 10 FF F0 00 00 0B 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.1us pass --
2842: [TX_DS] W_REGISTER: STATUS = 70 
2843: W_REGISTER: CONFIG = 0F 
2844: FLUSH_TX
2845: FLUSH_RX
2846: W_REGISTER: STATUS = 70 
2847: R_REGISTER: FIFO_STATUS is 11 
2848: W_REGISTER: STATUS = 70 
  -- 680.9us pass --
2849: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2850: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 80 A2 0B 80 51 18 28 0A 06 8A 82 40 A2 00 53 14 40 51 98 90 14 04 8A C2 80 A2 30 50 A2 20 00 FF 
2851: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2852: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2853: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.4us pass --
2854: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2855: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 81 0B 01 45 E1 0E 14 1F 28 0A 02 A0 8E A2 40 45 01 50 14 1A 28 0A 02 14 60 28 0A 14 E8 2B 50 
2856: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2857: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2858: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.1us pass --
2859: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2860: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 01 50 0B 02 51 14 00 45 00 45 61 D0 45 01 50 14 08 50 14 00 00 D9 FF 00 00 00 00 00 00 00 00 00 
2861: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2862: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2863: [RX_DR] W_REGISTER: STATUS = 70 
  -- 401.2us pass --
2864: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2865: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 13 00 00 04 2F 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2866: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2867: [RX_DR] W_REGISTER: CONFIG = 0E 
2868: [RX_DR] FLUSH_TX
2869: [RX_DR] FLUSH_RX
2870: [RX_DR] W_REGISTER: STATUS = 70 
2871: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 13 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 368.6us pass --
2872: [TX_DS] W_REGISTER: STATUS = 70 
2873: W_REGISTER: CONFIG = 0F 
2874: FLUSH_TX
2875: FLUSH_RX
2876: W_REGISTER: STATUS = 70 
2877: R_REGISTER: FIFO_STATUS is 11 
2878: W_REGISTER: STATUS = 70 
  -- 3.3ms pass --
2879: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2880: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 13 00 00 04 2F 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2881: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2882: [RX_DR] W_REGISTER: CONFIG = 0E 
2883: [RX_DR] FLUSH_TX
2884: [RX_DR] FLUSH_RX
2885: [RX_DR] W_REGISTER: STATUS = 70 
2886: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 13 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.9us pass --
2887: [TX_DS] W_REGISTER: STATUS = 70 
2888: W_REGISTER: CONFIG = 0F 
2889: FLUSH_TX
2890: FLUSH_RX
2891: W_REGISTER: STATUS = 70 
2892: R_REGISTER: FIFO_STATUS is 11 
2893: W_REGISTER: STATUS = 70 
  -- 28.6ms pass --
2894: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2895: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 02 FF 00 00 00 14 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2896: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2897: [RX_DR] W_REGISTER: CONFIG = 0E 
2898: [RX_DR] FLUSH_TX
2899: [RX_DR] FLUSH_RX
2900: [RX_DR] W_REGISTER: STATUS = 70 
2901: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 14 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.9us pass --
2902: [TX_DS] W_REGISTER: STATUS = 70 
2903: W_REGISTER: CONFIG = 0F 
2904: FLUSH_TX
2905: FLUSH_RX
2906: W_REGISTER: STATUS = 70 
2907: R_REGISTER: FIFO_STATUS is 11 
2908: W_REGISTER: STATUS = 70 
  -- 755.1us pass --
2909: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2910: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 1A 62 00 81 A1 18 00 2D 32 53 89 A9 88 BC FB B0 8A 39 02 10 83 32 58 23 FA D9 A2 72 CA 90 12 0B 
2911: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2912: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2913: [RX_DR] W_REGISTER: STATUS = 70 
  -- 336.1us pass --
2914: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2915: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 1A DD 00 01 9A B0 09 01 D0 A8 40 8B DD B0 93 8B BA 25 90 2C 15 19 BA FA 39 CB 8A 82 2A 94 11 61 
2916: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2917: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2918: [RX_DR] W_REGISTER: STATUS = 70 
  -- 325.8us pass --
2919: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2920: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 D9 00 02 A0 14 29 A0 13 8A EF BA 99 CA 80 22 11 04 43 51 24 20 99 A9 CB BF 90 41 89 03 11 0C 
2921: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2922: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2923: [RX_DR] W_REGISTER: STATUS = 70 
  -- 307.5us pass --
2924: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2925: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: AC CC 01 81 8A 84 50 21 01 33 19 CA D9 1A 08 12 AB 04 12 3B 11 09 8C FF 9A AB CA 00 BA DD C9 12 
2926: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2927: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2928: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.7us pass --
2929: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2930: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 80 99 01 01 55 3A 88 B8 18 80 00 36 28 00 A2 23 39 88 94 8A BD 98 98 47 30 91 28 CB 38 53 11 54 
2931: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2932: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2933: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.9us pass --
2934: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2935: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 22 15 01 02 8B 2B 83 30 7A 1A 9C 9C A8 82 2A 17 08 26 24 4A 32 88 9C 99 17 91 09 00 61 11 05 28 
2936: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2937: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2938: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.2ms pass --
2939: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2940: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 08 A1 02 81 01 93 8D A8 52 49 C9 A8 81 98 20 07 EA B0 10 48 99 30 A0 AA 37 71 21 AB 38 A1 00 30 
2941: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2942: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2943: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.4us pass --
2944: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2945: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: CA B1 02 01 CD 1A AB AD 32 27 19 9A B2 40 12 03 D9 DE 01 A2 B0 22 99 A8 35 75 20 B9 28 BB A8 08 
2946: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2947: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2948: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.1us pass --
2949: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2950: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 2A 24 02 02 12 89 AA F9 AC B3 24 21 90 67 20 80 00 00 BC 88 00 00 00 00 00 00 00 00 00 00 00 00 
2951: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2952: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2953: [RX_DR] W_REGISTER: STATUS = 70 
  -- 397.9us pass --
2954: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2955: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 08 FF 00 00 00 14 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2956: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2957: [RX_DR] W_REGISTER: CONFIG = 0E 
2958: [RX_DR] FLUSH_TX
2959: [RX_DR] FLUSH_RX
2960: [RX_DR] W_REGISTER: STATUS = 70 
2961: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 14 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.2us pass --
2962: [TX_DS] W_REGISTER: STATUS = 70 
2963: W_REGISTER: CONFIG = 0F 
2964: FLUSH_TX
2965: FLUSH_RX
2966: W_REGISTER: STATUS = 70 
2967: R_REGISTER: FIFO_STATUS is 11 
2968: W_REGISTER: STATUS = 70 
  -- 0.8ms pass --
2969: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2970: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 02 FF 00 00 00 15 00 00 04 25 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
2971: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2972: [RX_DR] W_REGISTER: CONFIG = 0E 
2973: [RX_DR] FLUSH_TX
2974: [RX_DR] FLUSH_RX
2975: [RX_DR] W_REGISTER: STATUS = 70 
2976: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 15 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 367.9us pass --
2977: [TX_DS] W_REGISTER: STATUS = 70 
2978: W_REGISTER: CONFIG = 0F 
2979: FLUSH_TX
2980: FLUSH_RX
2981: W_REGISTER: STATUS = 70 
2982: R_REGISTER: FIFO_STATUS is 11 
2983: W_REGISTER: STATUS = 70 
  -- 2.8ms pass --
2984: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2985: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: D8 FF 00 80 10 00 E0 FF 46 49 46 4A 00 01 01 00 01 00 01 00 DB FF 00 00 09 00 43 00 07 0D 07 06 
2986: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2987: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2988: [RX_DR] W_REGISTER: STATUS = 70 
  -- 336.6us pass --
2989: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2990: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 07 06 00 01 1C 0F 0C 09 06 09 0C 15 1E 0C 09 06 22 30 2B 1C 0A 0C 19 21 19 0C 07 09 31 1C 24 1F 
2991: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2992: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2993: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.5us pass --
2994: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
2995: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 39 3D 00 02 1E 2E 1C 34 1C 13 15 12 33 34 28 27 21 37 34 3C 1F 28 22 19 2B 27 33 2E FF 31 34 39 
2996: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2997: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
2998: [RX_DR] W_REGISTER: STATUS = 70 
  -- 310.9us pass --
2999: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3000: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 DB 01 80 09 09 01 43 09 18 31 0D 31 31 31 0C 21 31 31 31 31 1C 0C 0A 31 31 31 31 31 31 31 31 
3001: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3002: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3003: [RX_DR] W_REGISTER: STATUS = 70 
  -- 325.9us pass --
3004: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3005: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 21 01 01 31 31 31 0D 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 
3006: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3007: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3008: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.3us pass --
3009: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3010: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 31 31 01 02 31 31 31 31 C4 FF 31 31 00 00 1F 00 01 01 05 01 01 01 01 01 00 00 00 00 00 00 00 00 
3011: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3012: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3013: [RX_DR] W_REGISTER: STATUS = 70 
  -- 313.6us pass --
3014: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3015: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 02 01 02 80 06 05 04 03 0A 09 08 07 00 C4 FF 0B 02 00 10 B5 02 03 03 01 05 05 03 04 00 00 04 04 
3016: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3017: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3018: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.8us pass --
3019: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3020: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 7D 01 02 01 00 03 02 01 12 05 11 04 06 41 31 21 07 61 51 13 32 14 71 22 08 A1 91 81 C1 B1 42 23 
3021: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3022: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3023: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.3us pass --
3024: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3025: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 52 15 02 02 33 24 F0 D1 09 82 72 62 18 17 16 0A 26 25 1A 19 2A 29 28 27 37 36 35 34 43 3A 39 38 
3026: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3027: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3028: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
3029: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3030: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 44 03 80 49 48 47 46 55 54 53 4A 59 58 57 56 65 64 63 5A 69 68 67 66 75 74 73 6A 79 78 77 76 
3031: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3032: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3033: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.7us pass --
3034: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3035: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 83 7A 03 01 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 A9 A8 A7 A6 B4 B3 B2 AA 
3036: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3037: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3038: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.6us pass --
3039: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3040: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: B6 B5 03 02 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 E2 E1 DA D9 E6 E5 E4 E3 
3041: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3042: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3043: [RX_DR] W_REGISTER: STATUS = 70 
  -- 315.4us pass --
3044: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3045: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: E8 E7 04 80 F2 F1 EA E9 F6 F5 F4 F3 FA F9 F8 F7 1F 00 C4 FF 01 03 00 01 01 01 01 01 01 01 01 01 
3046: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3047: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3048: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.0us pass --
3049: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3050: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 04 01 00 00 00 00 04 03 02 01 08 07 06 05 FF 0B 0A 09 11 B5 00 C4 02 01 02 00 04 03 04 04 
3051: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3052: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3053: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.2us pass --
3054: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3055: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 07 04 02 01 00 04 04 01 00 77 02 04 11 03 02 06 31 21 05 07 51 41 12 22 13 71 61 14 08 81 32 
3056: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3057: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3058: [RX_DR] W_REGISTER: STATUS = 70 
  -- 313.6us pass --
3059: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3060: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 91 42 05 80 09 C1 B1 A1 F0 52 33 23 D1 72 62 15 34 24 16 0A 17 F1 25 E1 26 1A 19 18 2A 29 28 27 
3061: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3062: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3063: [RX_DR] W_REGISTER: STATUS = 70 
  -- 335.6us pass --
3064: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3065: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 36 35 05 01 3A 39 38 37 46 45 44 43 4A 49 48 47 56 55 54 53 5A 59 58 57 66 65 64 63 6A 69 68 67 
3066: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3067: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3068: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.4us pass --
3069: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3070: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 74 73 05 02 78 77 76 75 83 82 7A 79 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 
3071: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3072: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3073: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
3074: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3075: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A7 A6 06 80 B2 AA A9 A8 B6 B5 B4 B3 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 
3076: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3077: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3078: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.5us pass --
3079: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3080: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: DA D9 06 01 E5 E4 E3 E2 E9 E8 E7 E6 F4 F3 F2 EA F8 F7 F6 F5 C0 FF FA F9 00 08 11 00 03 A0 00 78 
3081: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3082: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3083: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.0us pass --
3084: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3085: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 21 01 06 02 01 11 02 00 FF 01 11 03 03 0C 00 DA 11 02 00 01 3F 00 11 03 28 BA F1 00 2D 81 A2 00 
3086: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3087: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3088: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.9us pass --
3089: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3090: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A 82 07 80 01 50 14 06 51 14 00 45 00 8A 02 D0 42 7D A0 28 28 0A 09 8A 05 40 51 18 28 0A 03 14 
3091: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3092: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3093: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.6us pass --
3094: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3095: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 41 4C 07 01 50 14 00 45 14 00 45 01 98 A2 30 50 28 80 14 05 03 45 41 A0 A2 00 28 0A 00 28 0A 80 
3096: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3097: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3098: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.3us pass --
3099: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3100: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 9A A2 07 02 40 8A 02 D8 81 0E 53 14 14 E8 20 45 00 45 01 50 A2 00 53 14 98 A2 30 90 90 14 85 BA 
3101: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3102: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3103: [RX_DR] W_REGISTER: STATUS = 70 
  -- 315.8us pass --
3104: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3105: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A C2 08 80 A0 A3 28 00 0C 3A 8A 82 45 41 A0 28 0A B6 06 1D 50 14 06 28 00 1D 45 01 45 41 A0 28 
3106: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3107: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3108: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.3us pass --
3109: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3110: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: E8 03 08 01 A2 20 50 14 C0 14 85 81 45 01 A4 28 08 29 0A 30 18 F4 A1 28 85 4D 4C 51 53 14 86 14 
3111: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3112: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3113: [RX_DR] W_REGISTER: STATUS = 70 
  -- 321.0us pass --
3114: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3115: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A2 00 08 02 00 14 05 90 14 05 40 51 05 40 51 00 51 00 FA 14 5D 8A C2 40 00 53 14 44 0A 40 97 A2 
3116: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3117: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3118: [RX_DR] W_REGISTER: STATUS = 70 
  -- 317.0us pass --
3119: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3120: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 80 29 09 80 45 41 48 51 00 28 0A 03 28 0A 80 A2 D0 98 A2 00 42 5D 48 51 51 10 6C 8A A6 28 4C 48 
3121: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3122: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3123: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.1ms pass --
3124: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3125: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 28 80 09 01 80 A2 30 A4 A2 00 28 0A 80 29 0A 80 A2 00 42 51 81 A2 30 81 08 29 0A F4 45 01 A6 28 
3126: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3127: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3128: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.6us pass --
3129: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3130: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: DC 21 09 02 D4 16 A6 28 28 C0 A4 28 40 51 00 A1 51 00 14 05 40 51 18 4C 60 41 8A 82 51 18 9A A2 
3131: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3132: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3133: [RX_DR] W_REGISTER: STATUS = 70 
  -- 313.6us pass --
3134: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3135: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: B8 4B 0A 80 CA 14 85 BA B0 52 14 EA 14 04 8A 82 81 A2 30 50 0A 80 A2 20 A0 28 8C 29 14 40 8A 02 
3136: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3137: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3138: [RX_DR] W_REGISTER: STATUS = 70 
  -- 335.3us pass --
3139: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3140: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 53 0A 01 14 05 90 A2 80 14 05 D8 45 01 A6 28 06 52 14 00 01 E8 53 14 14 05 21 45 C2 40 51 00 
3141: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3142: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3143: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.6us pass --
3144: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3145: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 60 8A 0A 02 A2 00 52 14 C6 14 05 81 A2 00 52 14 AF 14 05 98 A0 28 5C A8 A8 03 8A 02 A2 00 42 51 
3146: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3147: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3148: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.5us pass --
3149: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3150: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 85 81 0B 80 52 14 C4 14 8A 42 1D EA 14 05 A0 2D 05 40 51 00 45 01 EC 14 89 29 0A 20 FC 83 14 85 
3151: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3152: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3153: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.3us pass --
3154: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3155: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A 82 0B 01 08 50 14 06 8A 02 A0 28 18 28 0A 62 14 05 40 51 02 48 51 00 50 14 04 8A 0E 53 14 34 
3156: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3157: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3158: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.9us pass --
3159: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3160: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 E1 0B 02 00 28 0A 20 FF 1F 98 A2 45 01 50 D9 08 50 14 00 00 D9 FF 00 00 00 00 00 00 00 00 00 
3161: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3162: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3163: [RX_DR] W_REGISTER: STATUS = 70 
  -- 408.0us pass --
3164: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3165: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 15 00 00 04 25 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
3166: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3167: [RX_DR] W_REGISTER: CONFIG = 0E 
3168: [RX_DR] FLUSH_TX
3169: [RX_DR] FLUSH_RX
3170: [RX_DR] W_REGISTER: STATUS = 70 
3171: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 15 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.2us pass --
3172: [TX_DS] W_REGISTER: STATUS = 70 
3173: W_REGISTER: CONFIG = 0F 
3174: FLUSH_TX
3175: FLUSH_RX
3176: W_REGISTER: STATUS = 70 
3177: R_REGISTER: FIFO_STATUS is 11 
3178: W_REGISTER: STATUS = 70 
  -- 3.3ms pass --
3179: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3180: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 15 00 00 04 25 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
3181: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3182: [RX_DR] W_REGISTER: CONFIG = 0E 
3183: [RX_DR] FLUSH_TX
3184: [RX_DR] FLUSH_RX
3185: [RX_DR] W_REGISTER: STATUS = 70 
3186: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 15 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.1us pass --
3187: [TX_DS] W_REGISTER: STATUS = 70 
3188: W_REGISTER: CONFIG = 0F 
3189: FLUSH_TX
3190: FLUSH_RX
3191: W_REGISTER: STATUS = 70 
3192: R_REGISTER: FIFO_STATUS is 11 
3193: W_REGISTER: STATUS = 70 
  -- 22.3ms pass --
3194: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3195: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 02 FF 00 00 00 16 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
3196: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3197: [RX_DR] W_REGISTER: CONFIG = 0E 
3198: [RX_DR] FLUSH_TX
3199: [RX_DR] FLUSH_RX
3200: [RX_DR] W_REGISTER: STATUS = 70 
3201: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 16 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.6us pass --
3202: [TX_DS] W_REGISTER: STATUS = 70 
3203: W_REGISTER: CONFIG = 0F 
3204: FLUSH_TX
3205: FLUSH_RX
3206: W_REGISTER: STATUS = 70 
3207: R_REGISTER: FIFO_STATUS is 11 
3208: W_REGISTER: STATUS = 70 
  -- 754.1us pass --
3209: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3210: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 13 00 81 9D BD 00 2A BA 02 24 31 12 50 91 9C 1C FA 18 82 9B C9 11 99 BE 92 48 33 A0 01 61 DA 
3211: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3212: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3213: [RX_DR] W_REGISTER: STATUS = 70 
  -- 338.8us pass --
3214: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3215: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: CA CA 00 01 D9 08 11 10 35 38 99 AD 0A EB BA 80 A9 80 23 24 38 EA 10 9C 9D F8 38 12 91 42 42 90 
3216: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3217: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3218: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.9us pass --
3219: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3220: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: BB B9 00 02 DB 02 26 0A 13 44 19 BA 30 30 B2 10 E9 BA 44 00 B9 29 08 9F 10 34 BB 10 19 C9 0D B3 
3221: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3222: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3223: [RX_DR] W_REGISTER: STATUS = 70 
  -- 306.6us pass --
3224: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3225: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 80 BA 01 81 08 88 87 49 00 16 71 80 38 A9 AB A8 22 CF B3 03 CC CA 01 9A BE A4 BB 31 11 31 24 88 
3226: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3227: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3228: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.3us pass --
3229: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3230: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 53 1A 01 01 0B 81 91 26 8B DC BA 84 9C BB 08 0A 02 11 52 AF 84 19 CA 90 9A 9A E0 21 B9 04 42 12 
3231: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3232: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3233: [RX_DR] W_REGISTER: STATUS = 70 
  -- 326.1us pass --
3234: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3235: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 79 88 01 02 98 EA 13 22 B0 21 20 AB 80 1A BC 9F A8 98 10 63 11 23 37 20 04 19 0B B9 A9 DA 12 26 
3236: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3237: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3238: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.2ms pass --
3239: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3240: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 94 21 02 81 01 B9 80 51 19 A1 47 21 98 05 51 A0 A1 18 B8 01 37 22 24 41 42 18 AC 80 88 BC A8 17 
3241: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3242: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3243: [RX_DR] W_REGISTER: STATUS = 70 
  -- 337.2us pass --
3244: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3245: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 24 30 02 01 72 98 C1 19 88 C9 10 04 9D A2 13 19 08 14 20 9D 37 30 0A 91 99 F9 28 22 88 71 32 AA 
3246: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3247: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3248: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.4us pass --
3249: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3250: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: BB A9 02 02 81 02 36 20 08 20 02 A0 2A 02 CB E9 00 00 C0 F9 00 00 00 00 00 00 00 00 00 00 00 00 
3251: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3252: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3253: [RX_DR] W_REGISTER: STATUS = 70 
  -- 394.6us pass --
3254: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3255: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 08 FF 00 00 00 16 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
3256: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3257: [RX_DR] W_REGISTER: CONFIG = 0E 
3258: [RX_DR] FLUSH_TX
3259: [RX_DR] FLUSH_RX
3260: [RX_DR] W_REGISTER: STATUS = 70 
3261: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 16 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.6us pass --
3262: [TX_DS] W_REGISTER: STATUS = 70 
3263: W_REGISTER: CONFIG = 0F 
3264: FLUSH_TX
3265: FLUSH_RX
3266: W_REGISTER: STATUS = 70 
3267: R_REGISTER: FIFO_STATUS is 11 
3268: W_REGISTER: STATUS = 70 
  -- 0.8ms pass --
3269: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3270: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 02 FF 00 00 00 17 00 00 04 25 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
3271: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3272: [RX_DR] W_REGISTER: CONFIG = 0E 
3273: [RX_DR] FLUSH_TX
3274: [RX_DR] FLUSH_RX
3275: [RX_DR] W_REGISTER: STATUS = 70 
3276: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 17 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 368.9us pass --
3277: [TX_DS] W_REGISTER: STATUS = 70 
3278: W_REGISTER: CONFIG = 0F 
3279: FLUSH_TX
3280: FLUSH_RX
3281: W_REGISTER: STATUS = 70 
3282: R_REGISTER: FIFO_STATUS is 11 
3283: W_REGISTER: STATUS = 70 
  -- 2.8ms pass --
3284: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3285: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: D8 FF 00 80 10 00 E0 FF 46 49 46 4A 00 01 01 00 01 00 01 00 DB FF 00 00 09 00 43 00 07 0D 07 06 
3286: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3287: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3288: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.4us pass --
3289: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3290: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 07 06 00 01 1C 0F 0C 09 06 09 0C 15 1E 0C 09 06 22 30 2B 1C 0A 0C 19 21 19 0C 07 09 31 1C 24 1F 
3291: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3292: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3293: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.9us pass --
3294: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3295: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 39 3D 00 02 1E 2E 1C 34 1C 13 15 12 33 34 28 27 21 37 34 3C 1F 28 22 19 2B 27 33 2E FF 31 34 39 
3296: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3297: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3298: [RX_DR] W_REGISTER: STATUS = 70 
  -- 307.4us pass --
3299: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3300: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 DB 01 80 09 09 01 43 09 18 31 0D 31 31 31 0C 21 31 31 31 31 1C 0C 0A 31 31 31 31 31 31 31 31 
3301: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3302: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3303: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.5us pass --
3304: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3305: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 21 01 01 31 31 31 0D 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 
3306: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3307: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3308: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.9us pass --
3309: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3310: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 31 31 01 02 31 31 31 31 C4 FF 31 31 00 00 1F 00 01 01 05 01 01 01 01 01 00 00 00 00 00 00 00 00 
3311: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3312: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3313: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.4us pass --
3314: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3315: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 02 01 02 80 06 05 04 03 0A 09 08 07 00 C4 FF 0B 02 00 10 B5 02 03 03 01 05 05 03 04 00 00 04 04 
3316: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3317: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3318: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.2us pass --
3319: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3320: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 7D 01 02 01 00 03 02 01 12 05 11 04 06 41 31 21 07 61 51 13 32 14 71 22 08 A1 91 81 C1 B1 42 23 
3321: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3322: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3323: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.2us pass --
3324: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3325: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 52 15 02 02 33 24 F0 D1 09 82 72 62 18 17 16 0A 26 25 1A 19 2A 29 28 27 37 36 35 34 43 3A 39 38 
3326: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3327: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3328: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
3329: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3330: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 44 03 80 49 48 47 46 55 54 53 4A 59 58 57 56 65 64 63 5A 69 68 67 66 75 74 73 6A 79 78 77 76 
3331: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3332: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3333: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.1us pass --
3334: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3335: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 83 7A 03 01 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 A9 A8 A7 A6 B4 B3 B2 AA 
3336: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3337: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3338: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.8us pass --
3339: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3340: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: B6 B5 03 02 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 E2 E1 DA D9 E6 E5 E4 E3 
3341: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3342: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3343: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.4us pass --
3344: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3345: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: E8 E7 04 80 F2 F1 EA E9 F6 F5 F4 F3 FA F9 F8 F7 1F 00 C4 FF 01 03 00 01 01 01 01 01 01 01 01 01 
3346: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3347: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3348: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.9us pass --
3349: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3350: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 04 01 00 00 00 00 04 03 02 01 08 07 06 05 FF 0B 0A 09 11 B5 00 C4 02 01 02 00 04 03 04 04 
3351: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3352: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3353: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.9us pass --
3354: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3355: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 07 04 02 01 00 04 04 01 00 77 02 04 11 03 02 06 31 21 05 07 51 41 12 22 13 71 61 14 08 81 32 
3356: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3357: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3358: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.5us pass --
3359: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3360: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 91 42 05 80 09 C1 B1 A1 F0 52 33 23 D1 72 62 15 34 24 16 0A 17 F1 25 E1 26 1A 19 18 2A 29 28 27 
3361: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3362: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3363: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.5us pass --
3364: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3365: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 36 35 05 01 3A 39 38 37 46 45 44 43 4A 49 48 47 56 55 54 53 5A 59 58 57 66 65 64 63 6A 69 68 67 
3366: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3367: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3368: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.3us pass --
3369: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3370: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 74 73 05 02 78 77 76 75 83 82 7A 79 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 
3371: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3372: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3373: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
3374: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3375: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A7 A6 06 80 B2 AA A9 A8 B6 B5 B4 B3 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 
3376: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3377: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3378: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.6us pass --
3379: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3380: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: DA D9 06 01 E5 E4 E3 E2 E9 E8 E7 E6 F4 F3 F2 EA F8 F7 F6 F5 C0 FF FA F9 00 08 11 00 03 A0 00 78 
3381: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3382: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3383: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.6us pass --
3384: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3385: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 21 01 06 02 01 11 02 00 FF 01 11 03 03 0C 00 DA 11 02 00 01 3F 00 11 03 28 BA F1 00 2D 81 A2 00 
3386: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3387: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3388: [RX_DR] W_REGISTER: STATUS = 70 
  -- 313.7us pass --
3389: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3390: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A 82 07 80 01 50 14 06 51 14 00 45 00 8A 02 D0 42 7D A0 28 28 0A 09 8A 05 40 51 18 28 0A 03 14 
3391: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3392: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3393: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.6us pass --
3394: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3395: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 41 4C 07 01 50 14 00 45 14 00 45 01 98 A2 30 50 28 80 14 05 03 45 41 A0 A2 00 28 0A 00 28 0A 80 
3396: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3397: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3398: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.3us pass --
3399: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3400: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 9A A2 07 02 40 8A 02 D8 81 0E 53 14 14 E8 20 45 00 45 01 50 A2 00 53 14 98 A2 30 90 90 14 85 BA 
3401: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3402: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3403: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.7us pass --
3404: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3405: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A C2 08 80 A0 A3 28 00 0C 3A 8A 82 45 41 A0 28 0A B6 06 1D 50 14 06 28 00 1D 45 01 45 41 A0 28 
3406: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3407: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3408: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.8us pass --
3409: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3410: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: E8 03 08 01 A2 20 50 14 C0 14 85 81 45 01 A4 28 08 29 0A 30 18 F4 A1 28 85 4D 4C 51 53 14 86 14 
3411: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3412: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3413: [RX_DR] W_REGISTER: STATUS = 70 
  -- 318.6us pass --
3414: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3415: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A2 00 08 02 00 14 05 90 14 05 40 51 05 40 51 00 51 00 FA 14 5D 8A C2 40 00 53 14 44 0A 40 97 A2 
3416: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3417: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3418: [RX_DR] W_REGISTER: STATUS = 70 
  -- 314.7us pass --
3419: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3420: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 80 29 09 80 45 41 48 51 00 28 0A 03 28 0A 80 A2 D0 98 A2 00 42 5D 48 51 51 10 6C 8A A6 28 4C 48 
3421: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3422: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3423: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.1ms pass --
3424: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3425: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 28 80 09 01 80 A2 30 A4 A2 00 28 0A 80 29 0A 80 A2 00 42 51 81 A2 30 81 08 29 0A F4 45 01 A6 28 
3426: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3427: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3428: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.5us pass --
3429: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3430: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: DC 21 09 02 D4 16 A6 28 28 C0 A4 28 40 51 00 A1 51 00 14 05 40 51 18 4C 60 41 8A 82 51 18 9A A2 
3431: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3432: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3433: [RX_DR] W_REGISTER: STATUS = 70 
  -- 314.1us pass --
3434: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3435: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: B8 4B 0A 80 CA 14 85 BA B0 52 14 EA 14 04 8A 82 81 A2 30 50 0A 80 A2 20 A0 28 8C 29 14 40 8A 02 
3436: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3437: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3438: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.8us pass --
3439: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3440: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 53 0A 01 14 05 90 A2 80 14 05 D8 45 01 A6 28 06 52 14 00 01 E8 53 14 14 05 21 45 C2 40 51 00 
3441: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3442: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3443: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.4us pass --
3444: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3445: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 60 8A 0A 02 A2 00 52 14 C6 14 05 81 A2 00 52 14 AF 14 05 98 A0 28 5C A8 A8 03 8A 02 A2 00 42 51 
3446: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3447: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3448: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.4us pass --
3449: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3450: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 85 81 0B 80 52 14 C4 14 8A 42 1D EA 14 05 A0 2D 05 40 51 00 45 01 EC 14 89 29 0A 20 FC 83 14 85 
3451: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3452: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3453: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.6us pass --
3454: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3455: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A 82 0B 01 08 50 14 06 8A 02 A0 28 18 28 0A 62 14 05 40 51 02 48 51 00 50 14 04 8A 0E 53 14 34 
3456: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3457: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3458: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.4us pass --
3459: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3460: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 E1 0B 02 00 28 0A 20 FF 1F 98 A2 45 01 50 D9 08 50 14 00 00 D9 FF 00 00 00 00 00 00 00 00 00 
3461: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3462: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3463: [RX_DR] W_REGISTER: STATUS = 70 
  -- 408.8us pass --
3464: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3465: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 17 00 00 04 25 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
3466: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3467: [RX_DR] W_REGISTER: CONFIG = 0E 
3468: [RX_DR] FLUSH_TX
3469: [RX_DR] FLUSH_RX
3470: [RX_DR] W_REGISTER: STATUS = 70 
3471: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 17 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.1us pass --
3472: [TX_DS] W_REGISTER: STATUS = 70 
3473: W_REGISTER: CONFIG = 0F 
3474: FLUSH_TX
3475: FLUSH_RX
3476: W_REGISTER: STATUS = 70 
3477: R_REGISTER: FIFO_STATUS is 11 
3478: W_REGISTER: STATUS = 70 
  -- 3.3ms pass --
3479: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3480: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 17 00 00 04 25 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
3481: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3482: [RX_DR] W_REGISTER: CONFIG = 0E 
3483: [RX_DR] FLUSH_TX
3484: [RX_DR] FLUSH_RX
3485: [RX_DR] W_REGISTER: STATUS = 70 
3486: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 17 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.8us pass --
3487: [TX_DS] W_REGISTER: STATUS = 70 
3488: W_REGISTER: CONFIG = 0F 
3489: FLUSH_TX
3490: FLUSH_RX
3491: W_REGISTER: STATUS = 70 
3492: R_REGISTER: FIFO_STATUS is 11 
3493: W_REGISTER: STATUS = 70 
  -- 28.2ms pass --
3494: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3495: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 02 FF 00 00 00 18 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
3496: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3497: [RX_DR] W_REGISTER: CONFIG = 0E 
3498: [RX_DR] FLUSH_TX
3499: [RX_DR] FLUSH_RX
3500: [RX_DR] W_REGISTER: STATUS = 70 
3501: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 18 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.9us pass --
3502: [TX_DS] W_REGISTER: STATUS = 70 
3503: W_REGISTER: CONFIG = 0F 
3504: FLUSH_TX
3505: FLUSH_RX
3506: W_REGISTER: STATUS = 70 
3507: R_REGISTER: FIFO_STATUS is 11 
3508: W_REGISTER: STATUS = 70 
  -- 749.1us pass --
3509: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3510: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 12 E1 00 81 81 19 00 25 80 D1 88 26 9C CA 90 69 F0 01 32 89 02 90 0A 9C 48 9A CF AA CB 9B 08 08 
3511: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3512: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3513: [RX_DR] W_REGISTER: STATUS = 70 
  -- 336.8us pass --
3514: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3515: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A9 1A 00 01 BC 89 B8 72 81 31 80 9E 37 31 A3 89 49 D8 0B 91 9F A1 90 B2 29 39 B8 28 49 07 A2 9C 
3516: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3517: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3518: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.7us pass --
3519: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3520: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 29 01 00 02 B2 31 92 43 B0 28 84 37 C9 0A 12 8F EC 28 9D AB 0B 82 89 81 2B B8 2C B0 9A 91 57 32 
3521: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3522: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3523: [RX_DR] W_REGISTER: STATUS = 70 
  -- 308.1us pass --
3524: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3525: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: BA 82 01 81 39 06 34 01 04 8B 19 FA A8 0E 91 99 CC 0A DA 09 0A 88 01 31 C0 22 11 57 08 34 21 AC 
3526: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3527: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3528: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.8us pass --
3529: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3530: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: AF C1 01 01 B9 A1 33 20 83 14 38 BF 34 0B EB BC 19 8A E0 11 A9 90 42 51 02 44 0A A8 39 CA 89 C9 
3531: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3532: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3533: [RX_DR] W_REGISTER: STATUS = 70 
  -- 324.8us pass --
3534: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3535: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 82 42 01 02 31 8D F9 0A BE C9 99 13 82 08 23 40 30 01 08 AA 9A FA 11 74 F9 33 41 20 08 81 10 8A 
3536: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3537: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3538: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
3539: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3540: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 30 81 02 81 10 8D E0 04 AC C8 23 24 A8 81 52 18 BD B8 32 29 BA 80 42 70 CA A3 32 0A D8 23 72 88 
3541: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3542: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3543: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.8us pass --
3544: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3545: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 10 AD 02 01 AA EB 12 45 BC 90 14 30 EB 91 34 38 A9 02 62 09 91 53 1A BB 04 33 89 AA 02 26 2A CC 
3546: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3547: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3548: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.2us pass --
3549: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3550: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: BB CA 02 02 BC A0 23 49 BA 91 64 29 CA 23 44 89 00 00 0A AB 00 00 00 00 00 00 00 00 00 00 00 00 
3551: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3552: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3553: [RX_DR] W_REGISTER: STATUS = 70 
  -- 397.0us pass --
3554: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3555: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 08 FF 00 00 00 18 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
3556: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3557: [RX_DR] W_REGISTER: CONFIG = 0E 
3558: [RX_DR] FLUSH_TX
3559: [RX_DR] FLUSH_RX
3560: [RX_DR] W_REGISTER: STATUS = 70 
3561: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 18 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.1us pass --
3562: [TX_DS] W_REGISTER: STATUS = 70 
3563: W_REGISTER: CONFIG = 0F 
3564: FLUSH_TX
3565: FLUSH_RX
3566: W_REGISTER: STATUS = 70 
3567: R_REGISTER: FIFO_STATUS is 11 
3568: W_REGISTER: STATUS = 70 
  -- 0.8ms pass --
3569: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3570: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 02 FF 00 00 00 19 00 00 04 28 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
3571: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3572: [RX_DR] W_REGISTER: CONFIG = 0E 
3573: [RX_DR] FLUSH_TX
3574: [RX_DR] FLUSH_RX
3575: [RX_DR] W_REGISTER: STATUS = 70 
3576: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 19 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 368.3us pass --
3577: [TX_DS] W_REGISTER: STATUS = 70 
3578: W_REGISTER: CONFIG = 0F 
3579: FLUSH_TX
3580: FLUSH_RX
3581: W_REGISTER: STATUS = 70 
3582: R_REGISTER: FIFO_STATUS is 11 
3583: W_REGISTER: STATUS = 70 
  -- 2.8ms pass --
3584: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3585: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: D8 FF 00 80 10 00 E0 FF 46 49 46 4A 00 01 01 00 01 00 01 00 DB FF 00 00 09 00 43 00 07 0D 07 06 
3586: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3587: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3588: [RX_DR] W_REGISTER: STATUS = 70 
  -- 324.6us pass --
3589: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3590: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 07 06 00 01 1C 0F 0C 09 06 09 0C 15 1E 0C 09 06 22 30 2B 1C 0A 0C 19 21 19 0C 07 09 31 1C 24 1F 
3591: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3592: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3593: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.2us pass --
3594: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3595: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 39 3D 00 02 1E 2E 1C 34 1C 13 15 12 33 34 28 27 21 37 34 3C 1F 28 22 19 2B 27 33 2E FF 31 34 39 
3596: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3597: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3598: [RX_DR] W_REGISTER: STATUS = 70 
  -- 310.1us pass --
3599: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3600: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 DB 01 80 09 09 01 43 09 18 31 0D 31 31 31 0C 21 31 31 31 31 1C 0C 0A 31 31 31 31 31 31 31 31 
3601: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3602: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3603: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.3us pass --
3604: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3605: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 21 01 01 31 31 31 0D 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 
3606: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3607: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3608: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.9us pass --
3609: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3610: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 31 31 01 02 31 31 31 31 C4 FF 31 31 00 00 1F 00 01 01 05 01 01 01 01 01 00 00 00 00 00 00 00 00 
3611: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3612: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3613: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.3us pass --
3614: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3615: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 02 01 02 80 06 05 04 03 0A 09 08 07 00 C4 FF 0B 02 00 10 B5 02 03 03 01 05 05 03 04 00 00 04 04 
3616: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3617: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3618: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.3us pass --
3619: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3620: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 7D 01 02 01 00 03 02 01 12 05 11 04 06 41 31 21 07 61 51 13 32 14 71 22 08 A1 91 81 C1 B1 42 23 
3621: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3622: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3623: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.8us pass --
3624: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3625: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 52 15 02 02 33 24 F0 D1 09 82 72 62 18 17 16 0A 26 25 1A 19 2A 29 28 27 37 36 35 34 43 3A 39 38 
3626: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3627: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3628: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
3629: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3630: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 44 03 80 49 48 47 46 55 54 53 4A 59 58 57 56 65 64 63 5A 69 68 67 66 75 74 73 6A 79 78 77 76 
3631: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3632: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3633: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.5us pass --
3634: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3635: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 83 7A 03 01 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 A9 A8 A7 A6 B4 B3 B2 AA 
3636: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3637: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3638: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.4us pass --
3639: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3640: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: B6 B5 03 02 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 E2 E1 DA D9 E6 E5 E4 E3 
3641: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3642: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3643: [RX_DR] W_REGISTER: STATUS = 70 
  -- 315.2us pass --
3644: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3645: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: E8 E7 04 80 F2 F1 EA E9 F6 F5 F4 F3 FA F9 F8 F7 1F 00 C4 FF 01 03 00 01 01 01 01 01 01 01 01 01 
3646: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3647: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3648: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.5us pass --
3649: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3650: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 04 01 00 00 00 00 04 03 02 01 08 07 06 05 FF 0B 0A 09 11 B5 00 C4 02 01 02 00 04 03 04 04 
3651: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3652: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3653: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.3us pass --
3654: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3655: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 07 04 02 01 00 04 04 01 00 77 02 04 11 03 02 06 31 21 05 07 51 41 12 22 13 71 61 14 08 81 32 
3656: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3657: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3658: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.5us pass --
3659: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3660: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 91 42 05 80 09 C1 B1 A1 F0 52 33 23 D1 72 62 15 34 24 16 0A 17 F1 25 E1 26 1A 19 18 2A 29 28 27 
3661: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3662: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3663: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.4us pass --
3664: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3665: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 36 35 05 01 3A 39 38 37 46 45 44 43 4A 49 48 47 56 55 54 53 5A 59 58 57 66 65 64 63 6A 69 68 67 
3666: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3667: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3668: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.6us pass --
3669: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3670: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 74 73 05 02 78 77 76 75 83 82 7A 79 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 
3671: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3672: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3673: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
3674: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3675: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A7 A6 06 80 B2 AA A9 A8 B6 B5 B4 B3 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 
3676: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3677: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3678: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.3us pass --
3679: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3680: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: DA D9 06 01 E5 E4 E3 E2 E9 E8 E7 E6 F4 F3 F2 EA F8 F7 F6 F5 C0 FF FA F9 00 08 11 00 03 A0 00 78 
3681: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3682: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3683: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.0us pass --
3684: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3685: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 21 01 06 02 01 11 02 00 FF 01 11 03 03 0C 00 DA 11 02 00 01 3F 00 11 03 29 BA F1 00 1D A6 28 08 
3686: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3687: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3688: [RX_DR] W_REGISTER: STATUS = 70 
  -- 310.4us pass --
3689: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3690: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A 02 07 80 80 29 0A 43 0A 60 53 51 28 08 BA 2A 20 45 61 A0 51 10 28 0A C0 14 05 40 8A 02 A0 28 
3691: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3692: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3693: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.3us pass --
3694: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3695: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 28 00 07 01 10 8A 02 A0 05 90 14 05 28 D0 C7 14 01 45 41 A0 C2 90 A2 70 51 00 3A 8A A4 28 48 4C 
3696: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3697: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3698: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.3us pass --
3699: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3700: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 01 07 02 18 53 14 00 14 05 40 51 74 40 51 00 A2 00 28 0A 28 D4 C5 95 A3 28 08 A6 00 14 05 A0 
3701: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3702: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3703: [RX_DR] W_REGISTER: STATUS = 70 
  -- 318.6us pass --
3704: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3705: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 48 51 08 80 05 40 51 10 28 0C FA 14 40 51 00 A1 02 48 51 90 A0 28 00 8A 45 41 7E 7D 24 50 14 00 
3706: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3707: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3708: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.4us pass --
3709: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3710: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 51 14 08 01 2E 8A 02 D4 0A 03 45 01 80 A2 00 28 51 80 29 0A 80 14 05 40 A1 2E A6 28 52 14 00 45 
3711: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3712: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3713: [RX_DR] W_REGISTER: STATUS = 70 
  -- 326.5us pass --
3714: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3715: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A2 00 08 02 53 14 E8 80 00 93 A2 00 51 00 8B A2 00 45 61 4C 4C D0 51 14 14 C6 A4 28 4B 51 00 55 
3716: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3717: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3718: [RX_DR] W_REGISTER: STATUS = 70 
  -- 314.4us pass --
3719: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3720: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 82 A0 09 80 00 FF 43 8A 05 81 A2 20 4C 51 00 14 0A 43 8A 02 80 A2 00 28 A2 00 28 0A 06 28 0A 80 
3721: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3722: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3723: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.1ms pass --
3724: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3725: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 50 14 09 01 18 9A A2 20 0A C2 4A 51 A2 28 8C 29 F4 29 0A C2 61 A4 A2 00 28 0A 30 45 05 81 A2 00 
3726: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3727: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3728: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.6us pass --
3729: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3730: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 14 09 02 45 61 48 51 10 28 0A 30 14 C0 4A 51 45 51 18 53 30 50 14 84 14 05 81 A2 4C 51 A0 83 
3731: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3732: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3733: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.5us pass --
3734: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3735: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 61 0A 80 51 A8 0B 2B 4F 51 18 42 02 14 05 A8 51 10 28 0A 00 8A 02 48 02 7D A0 28 8A 82 04 8A 
3736: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3737: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3738: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.2us pass --
3739: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3740: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 28 00 0A 01 A1 28 08 A6 2C A0 28 8C A2 00 52 14 80 29 0A 80 14 05 40 51 48 51 A8 0B 00 76 8A 02 
3741: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3742: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3743: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.1us pass --
3744: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3745: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 84 A2 0A 02 05 98 A2 30 A0 28 80 14 EA 20 45 41 0A 1B 53 14 40 51 10 28 28 80 14 05 03 45 01 A6 
3746: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3747: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3748: [RX_DR] W_REGISTER: STATUS = 70 
  -- 319.7us pass --
3749: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3750: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 29 0A 0B 80 41 4C 51 00 14 85 21 45 30 A6 28 08 28 0A 80 A2 00 45 A1 0E A2 20 50 14 21 45 41 80 
3751: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3752: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3753: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.4us pass --
3754: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3755: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 14 85 0B 01 D0 A4 28 C0 A0 ED 14 05 0A 43 8A 82 40 51 80 29 01 AE 14 05 14 05 31 45 98 A2 30 AC 
3756: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3757: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3758: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.3us pass --
3759: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3760: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A1 2E 0B 02 85 3A 0C 45 53 14 84 14 D9 FF 63 1F 08 50 14 00 00 D9 FF 00 00 00 00 00 00 00 00 00 
3761: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3762: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3763: [RX_DR] W_REGISTER: STATUS = 70 
  -- 409.6us pass --
3764: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3765: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 19 00 00 04 28 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
3766: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3767: [RX_DR] W_REGISTER: CONFIG = 0E 
3768: [RX_DR] FLUSH_TX
3769: [RX_DR] FLUSH_RX
3770: [RX_DR] W_REGISTER: STATUS = 70 
3771: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 19 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.5us pass --
3772: [TX_DS] W_REGISTER: STATUS = 70 
3773: W_REGISTER: CONFIG = 0F 
3774: FLUSH_TX
3775: FLUSH_RX
3776: W_REGISTER: STATUS = 70 
3777: R_REGISTER: FIFO_STATUS is 11 
3778: W_REGISTER: STATUS = 70 
  -- 3.3ms pass --
3779: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3780: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 19 00 00 04 28 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
3781: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3782: [RX_DR] W_REGISTER: CONFIG = 0E 
3783: [RX_DR] FLUSH_TX
3784: [RX_DR] FLUSH_RX
3785: [RX_DR] W_REGISTER: STATUS = 70 
3786: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 19 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.4us pass --
3787: [TX_DS] W_REGISTER: STATUS = 70 
3788: W_REGISTER: CONFIG = 0F 
3789: FLUSH_TX
3790: FLUSH_RX
3791: W_REGISTER: STATUS = 70 
3792: R_REGISTER: FIFO_STATUS is 11 
3793: W_REGISTER: STATUS = 70 
  -- 22.2ms pass --
3794: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3795: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 02 FF 00 00 00 1A 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
3796: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3797: [RX_DR] W_REGISTER: CONFIG = 0E 
3798: [RX_DR] FLUSH_TX
3799: [RX_DR] FLUSH_RX
3800: [RX_DR] W_REGISTER: STATUS = 70 
3801: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 1A 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.8us pass --
3802: [TX_DS] W_REGISTER: STATUS = 70 
3803: W_REGISTER: CONFIG = 0F 
3804: FLUSH_TX
3805: FLUSH_RX
3806: W_REGISTER: STATUS = 70 
3807: R_REGISTER: FIFO_STATUS is 11 
3808: W_REGISTER: STATUS = 70 
  -- 751.4us pass --
3809: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3810: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 0A 55 00 81 A0 44 00 30 02 75 20 BB 02 89 BB BA 82 90 28 82 14 77 3A 8B 20 8B AC 90 10 BB C8 83 
3811: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3812: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3813: [RX_DR] W_REGISTER: STATUS = 70 
3814: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3815: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A0 27 00 01 81 42 68 8B 98 09 9C CB C9 21 88 10 17 33 3C BC 08 9A BB DA 12 9D B1 11 45 43 12 CB 
3816: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3817: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3818: [RX_DR] W_REGISTER: STATUS = 70 
3819: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3820: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: CB 14 00 02 04 20 A0 AB BA 91 AD 8A A0 31 37 38 43 11 BC BD 12 9B 9B 82 16 22 02 46 0D CB 89 B8 
3821: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3822: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3823: [RX_DR] W_REGISTER: STATUS = 70 
3824: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3825: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 99 23 01 81 41 BF 89 A8 FB 82 24 88 16 39 B9 9B 18 99 98 98 B0 37 33 35 53 0B B9 AC 8E BD BA 03 
3826: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3827: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3828: [RX_DR] W_REGISTER: STATUS = 70 
3829: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3830: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 33 01 01 89 CC 04 22 01 22 18 CA 37 39 CC 89 AA A1 52 20 04 2A A9 A9 10 AC F9 28 CB 14 11 42 
3831: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3832: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3833: [RX_DR] W_REGISTER: STATUS = 70 
3834: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3835: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: BB 99 01 02 37 88 31 CB 22 48 8C B1 A9 A9 92 46 08 02 80 AC 28 88 DC 34 8B C0 36 23 1A 88 9A C8 
3836: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3837: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3838: [RX_DR] W_REGISTER: STATUS = 70 
3839: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3840: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 04 73 02 81 55 02 08 99 99 08 AA 02 46 0D B8 9B 28 00 0A 92 12 8B A1 45 28 DC 8C A9 01 08 91 45 
3841: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3842: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3843: [RX_DR] W_REGISTER: STATUS = 70 
3844: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3845: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 24 21 02 01 A9 11 08 C9 34 30 AE CC 38 00 00 11 96 00 0B 04 41 8B EC 8C 80 01 10 04 55 08 A8 30 
3846: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3847: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3848: [RX_DR] W_REGISTER: STATUS = 70 
  -- 424.1us pass --
3849: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3850: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 08 FF 00 00 00 1A 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
3851: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3852: [RX_DR] W_REGISTER: CONFIG = 0E 
3853: [RX_DR] FLUSH_TX
3854: [RX_DR] FLUSH_RX
3855: [RX_DR] W_REGISTER: STATUS = 70 
3856: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 10 FF F0 00 00 02 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.0us pass --
3857: [TX_DS] W_REGISTER: STATUS = 70 
3858: W_REGISTER: CONFIG = 0F 
3859: FLUSH_TX
3860: FLUSH_RX
3861: W_REGISTER: STATUS = 70 
3862: R_REGISTER: FIFO_STATUS is 11 
3863: W_REGISTER: STATUS = 70 
  -- 2.6ms pass --
3864: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3865: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 04 73 02 81 55 02 08 99 99 08 AA 02 46 0D B8 9B 28 00 0A 92 12 8B A1 45 28 DC 8C A9 01 08 91 45 
3866: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3867: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3868: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.5us pass --
3869: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3870: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 24 21 02 01 A9 11 08 C9 34 30 AE CC 38 00 00 11 96 00 0B 04 41 8B EC 8C 80 01 10 04 55 08 A8 30 
3871: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3872: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3873: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.0us pass --
3874: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3875: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: CB A0 02 02 12 32 89 AF 01 A8 02 11 C9 13 72 81 00 00 AC EC 00 00 00 00 00 00 00 00 00 00 00 00 
3876: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3877: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3878: [RX_DR] W_REGISTER: STATUS = 70 
  -- 401.8us pass --
3879: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3880: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 08 FF 00 00 00 1A 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
3881: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3882: [RX_DR] W_REGISTER: CONFIG = 0E 
3883: [RX_DR] FLUSH_TX
3884: [RX_DR] FLUSH_RX
3885: [RX_DR] W_REGISTER: STATUS = 70 
3886: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 1A 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 368.6us pass --
3887: [TX_DS] W_REGISTER: STATUS = 70 
3888: W_REGISTER: CONFIG = 0F 
3889: FLUSH_TX
3890: FLUSH_RX
3891: W_REGISTER: STATUS = 70 
3892: R_REGISTER: FIFO_STATUS is 11 
3893: W_REGISTER: STATUS = 70 
  -- 0.8ms pass --
3894: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3895: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 02 FF 00 00 00 1B 00 00 04 28 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
3896: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3897: [RX_DR] W_REGISTER: CONFIG = 0E 
3898: [RX_DR] FLUSH_TX
3899: [RX_DR] FLUSH_RX
3900: [RX_DR] W_REGISTER: STATUS = 70 
3901: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 1B 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 368.8us pass --
3902: [TX_DS] W_REGISTER: STATUS = 70 
3903: W_REGISTER: CONFIG = 0F 
3904: FLUSH_TX
3905: FLUSH_RX
3906: W_REGISTER: STATUS = 70 
3907: R_REGISTER: FIFO_STATUS is 11 
3908: W_REGISTER: STATUS = 70 
  -- 2.6ms pass --
3909: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3910: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: D8 FF 00 80 10 00 E0 FF 46 49 46 4A 00 01 01 00 01 00 01 00 DB FF 00 00 09 00 43 00 07 0D 07 06 
3911: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3912: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3913: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.1us pass --
3914: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3915: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 07 06 00 01 1C 0F 0C 09 06 09 0C 15 1E 0C 09 06 22 30 2B 1C 0A 0C 19 21 19 0C 07 09 31 1C 24 1F 
3916: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3917: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3918: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.6us pass --
3919: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3920: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 39 3D 00 02 1E 2E 1C 34 1C 13 15 12 33 34 28 27 21 37 34 3C 1F 28 22 19 2B 27 33 2E FF 31 34 39 
3921: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3922: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3923: [RX_DR] W_REGISTER: STATUS = 70 
  -- 308.1us pass --
3924: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3925: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 DB 01 80 09 09 01 43 09 18 31 0D 31 31 31 0C 21 31 31 31 31 1C 0C 0A 31 31 31 31 31 31 31 31 
3926: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3927: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3928: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.2us pass --
3929: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3930: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 21 01 01 31 31 31 0D 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 
3931: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3932: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3933: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.4us pass --
3934: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3935: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 31 31 01 02 31 31 31 31 C4 FF 31 31 00 00 1F 00 01 01 05 01 01 01 01 01 00 00 00 00 00 00 00 00 
3936: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3937: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3938: [RX_DR] W_REGISTER: STATUS = 70 
  -- 315.7us pass --
3939: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3940: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 02 01 02 80 06 05 04 03 0A 09 08 07 00 C4 FF 0B 02 00 10 B5 02 03 03 01 05 05 03 04 00 00 04 04 
3941: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3942: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3943: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.4us pass --
3944: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3945: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 7D 01 02 01 00 03 02 01 12 05 11 04 06 41 31 21 07 61 51 13 32 14 71 22 08 A1 91 81 C1 B1 42 23 
3946: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3947: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3948: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.4us pass --
3949: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3950: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 52 15 02 02 33 24 F0 D1 09 82 72 62 18 17 16 0A 26 25 1A 19 2A 29 28 27 37 36 35 34 43 3A 39 38 
3951: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3952: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3953: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.2ms pass --
3954: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3955: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 44 03 80 49 48 47 46 55 54 53 4A 59 58 57 56 65 64 63 5A 69 68 67 66 75 74 73 6A 79 78 77 76 
3956: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3957: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3958: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.6us pass --
3959: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3960: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 83 7A 03 01 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 A9 A8 A7 A6 B4 B3 B2 AA 
3961: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3962: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3963: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.9us pass --
3964: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3965: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: B6 B5 03 02 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 E2 E1 DA D9 E6 E5 E4 E3 
3966: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3967: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3968: [RX_DR] W_REGISTER: STATUS = 70 
  -- 315.6us pass --
3969: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3970: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: E8 E7 04 80 F2 F1 EA E9 F6 F5 F4 F3 FA F9 F8 F7 1F 00 C4 FF 01 03 00 01 01 01 01 01 01 01 01 01 
3971: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3972: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3973: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.3us pass --
3974: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3975: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 04 01 00 00 00 00 04 03 02 01 08 07 06 05 FF 0B 0A 09 11 B5 00 C4 02 01 02 00 04 03 04 04 
3976: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3977: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3978: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.6us pass --
3979: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3980: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 07 04 02 01 00 04 04 01 00 77 02 04 11 03 02 06 31 21 05 07 51 41 12 22 13 71 61 14 08 81 32 
3981: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3982: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3983: [RX_DR] W_REGISTER: STATUS = 70 
  -- 315.7us pass --
3984: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3985: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 91 42 05 80 09 C1 B1 A1 F0 52 33 23 D1 72 62 15 34 24 16 0A 17 F1 25 E1 26 1A 19 18 2A 29 28 27 
3986: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3987: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3988: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.9us pass --
3989: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3990: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 36 35 05 01 3A 39 38 37 46 45 44 43 4A 49 48 47 56 55 54 53 5A 59 58 57 66 65 64 63 6A 69 68 67 
3991: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3992: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3993: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.0us pass --
3994: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
3995: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 74 73 05 02 78 77 76 75 83 82 7A 79 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 
3996: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3997: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
3998: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
3999: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4000: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A7 A6 06 80 B2 AA A9 A8 B6 B5 B4 B3 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 
4001: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4002: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4003: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.4us pass --
4004: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4005: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: DA D9 06 01 E5 E4 E3 E2 E9 E8 E7 E6 F4 F3 F2 EA F8 F7 F6 F5 C0 FF FA F9 00 08 11 00 03 A0 00 78 
4006: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4007: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4008: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.1us pass --
4009: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4010: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 21 01 06 02 01 11 02 00 FF 01 11 03 03 0C 00 DA 11 02 00 01 3F 00 11 03 29 BA F1 00 1D A6 28 08 
4011: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4012: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4013: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.1us pass --
4014: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4015: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A 02 07 80 80 29 0A 43 0A 60 53 51 28 08 BA 2A 20 45 61 A0 51 10 28 0A C0 14 05 40 8A 02 A0 28 
4016: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4017: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4018: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.2us pass --
4019: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4020: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 28 00 07 01 10 8A 02 A0 05 90 14 05 28 D0 C7 14 01 45 41 A0 C2 90 A2 70 51 00 3A 8A A4 28 48 4C 
4021: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4022: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4023: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.1us pass --
4024: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4025: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 01 07 02 18 53 14 00 14 05 40 51 74 40 51 00 A2 00 28 0A 28 D4 C5 95 A3 28 08 A6 00 14 05 A0 
4026: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4027: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4028: [RX_DR] W_REGISTER: STATUS = 70 
  -- 315.9us pass --
4029: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4030: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 48 51 08 80 05 40 51 10 28 0C FA 14 40 51 00 A1 02 48 51 90 A0 28 00 8A 45 41 7E 7D 24 50 14 00 
4031: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4032: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4033: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.2us pass --
4034: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4035: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 51 14 08 01 2E 8A 02 D4 0A 03 45 01 80 A2 00 28 51 80 29 0A 80 14 05 40 A1 2E A6 28 52 14 00 45 
4036: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4037: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4038: [RX_DR] W_REGISTER: STATUS = 70 
  -- 323.4us pass --
4039: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4040: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A2 00 08 02 53 14 E8 80 00 93 A2 00 51 00 8B A2 00 45 61 4C 4C D0 51 14 14 C6 A4 28 4B 51 00 55 
4041: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4042: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4043: [RX_DR] W_REGISTER: STATUS = 70 
  -- 314.1us pass --
4044: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4045: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 82 A0 09 80 00 FF 43 8A 05 81 A2 20 4C 51 00 14 0A 43 8A 02 80 A2 00 28 A2 00 28 0A 06 28 0A 80 
4046: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4047: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4048: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.1ms pass --
4049: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4050: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 50 14 09 01 18 9A A2 20 0A C2 4A 51 A2 28 8C 29 F4 29 0A C2 61 A4 A2 00 28 0A 30 45 05 81 A2 00 
4051: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4052: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4053: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.6us pass --
4054: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4055: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 14 09 02 45 61 48 51 10 28 0A 30 14 C0 4A 51 45 51 18 53 30 50 14 84 14 05 81 A2 4C 51 A0 83 
4056: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4057: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4058: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.9us pass --
4059: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4060: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 61 0A 80 51 A8 0B 2B 4F 51 18 42 02 14 05 A8 51 10 28 0A 00 8A 02 48 02 7D A0 28 8A 82 04 8A 
4061: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4062: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4063: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.2us pass --
4064: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4065: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 28 00 0A 01 A1 28 08 A6 2C A0 28 8C A2 00 52 14 80 29 0A 80 14 05 40 51 48 51 A8 0B 00 76 8A 02 
4066: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4067: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4068: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.1us pass --
4069: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4070: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 84 A2 0A 02 05 98 A2 30 A0 28 80 14 EA 20 45 41 0A 1B 53 14 40 51 10 28 28 80 14 05 03 45 01 A6 
4071: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4072: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4073: [RX_DR] W_REGISTER: STATUS = 70 
  -- 314.1us pass --
4074: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4075: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 29 0A 0B 80 41 4C 51 00 14 85 21 45 30 A6 28 08 28 0A 80 A2 00 45 A1 0E A2 20 50 14 21 45 41 80 
4076: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4077: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4078: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.1us pass --
4079: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4080: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 14 85 0B 01 D0 A4 28 C0 A0 ED 14 05 0A 43 8A 82 40 51 80 29 01 AE 14 05 14 05 31 45 98 A2 30 AC 
4081: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4082: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4083: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.3us pass --
4084: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4085: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A1 2E 0B 02 85 3A 0C 45 53 14 84 14 D9 FF 63 1F 08 50 14 00 00 D9 FF 00 00 00 00 00 00 00 00 00 
4086: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4087: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4088: [RX_DR] W_REGISTER: STATUS = 70 
  -- 406.9us pass --
4089: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4090: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 1B 00 00 04 28 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
4091: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4092: [RX_DR] W_REGISTER: CONFIG = 0E 
4093: [RX_DR] FLUSH_TX
4094: [RX_DR] FLUSH_RX
4095: [RX_DR] W_REGISTER: STATUS = 70 
4096: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 1B 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.2us pass --
4097: [TX_DS] W_REGISTER: STATUS = 70 
4098: W_REGISTER: CONFIG = 0F 
4099: FLUSH_TX
4100: FLUSH_RX
4101: W_REGISTER: STATUS = 70 
4102: R_REGISTER: FIFO_STATUS is 11 
4103: W_REGISTER: STATUS = 70 
  -- 3.3ms pass --
4104: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4105: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 1B 00 00 04 28 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
4106: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4107: [RX_DR] W_REGISTER: CONFIG = 0E 
4108: [RX_DR] FLUSH_TX
4109: [RX_DR] FLUSH_RX
4110: [RX_DR] W_REGISTER: STATUS = 70 
4111: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 1B 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 371.0us pass --
4112: [TX_DS] W_REGISTER: STATUS = 70 
4113: W_REGISTER: CONFIG = 0F 
4114: FLUSH_TX
4115: FLUSH_RX
4116: W_REGISTER: STATUS = 70 
4117: R_REGISTER: FIFO_STATUS is 11 
4118: W_REGISTER: STATUS = 70 
  -- 22.2ms pass --
4119: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4120: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 02 FF 00 00 00 1C 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
4121: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4122: [RX_DR] W_REGISTER: CONFIG = 0E 
4123: [RX_DR] FLUSH_TX
4124: [RX_DR] FLUSH_RX
4125: [RX_DR] W_REGISTER: STATUS = 70 
4126: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 1C 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.7us pass --
4127: [TX_DS] W_REGISTER: STATUS = 70 
4128: W_REGISTER: CONFIG = 0F 
4129: FLUSH_TX
4130: FLUSH_RX
4131: W_REGISTER: STATUS = 70 
4132: R_REGISTER: FIFO_STATUS is 11 
4133: W_REGISTER: STATUS = 70 
  -- 757.2us pass --
4134: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4135: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 10 7E 00 81 31 08 00 30 26 13 39 13 08 AB DF A8 12 02 20 01 02 61 88 53 8A BF D9 11 A8 10 88 99 
4136: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4137: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4138: [RX_DR] W_REGISTER: STATUS = 70 
4139: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4140: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 16 30 00 01 88 C8 02 11 BD C9 AF B8 19 98 98 8C 11 38 05 31 BC AB DA 00 19 00 8A AE 00 14 27 43 
4141: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4142: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4143: [RX_DR] W_REGISTER: STATUS = 70 
4144: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4145: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 88 80 00 02 9B FD 09 AA 33 10 89 8A 88 01 15 63 FC 98 11 88 88 88 9A CB B1 23 24 44 99 85 19 08 
4146: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4147: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4148: [RX_DR] W_REGISTER: STATUS = 70 
4149: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4150: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 9F F9 01 81 32 08 89 99 01 88 14 13 DB 88 13 42 08 99 AA BE 88 12 15 71 09 13 30 08 89 CA AD FC 
4151: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4152: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4153: [RX_DR] W_REGISTER: STATUS = 70 
4154: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4155: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 41 88 01 01 42 12 23 11 BA 01 22 14 10 AE AE DB 01 10 23 10 A8 28 81 53 9C DB AE D8 24 11 20 88 
4156: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4157: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4158: [RX_DR] W_REGISTER: STATUS = 70 
4159: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4160: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 32 32 01 02 00 30 12 04 89 9A FB ED 11 32 11 11 1A 82 38 05 A9 CF DC B0 32 34 00 A9 22 22 22 43 
4161: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4162: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4163: [RX_DR] W_REGISTER: STATUS = 70 
4164: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4165: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 02 02 81 9A BC AE E8 34 24 33 18 28 32 22 14 BD AE D8 81 44 42 18 AA 21 32 32 31 DD C8 11 22 
4166: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4167: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4168: [RX_DR] W_REGISTER: STATUS = 70 
4169: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4170: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: BB BC 02 01 31 36 32 9A 52 30 22 32 BC ED 98 12 44 22 9A BB 41 02 32 21 EA 08 11 16 10 AB AD BB 
4171: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4172: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4173: [RX_DR] W_REGISTER: STATUS = 70 
  -- 417.1us pass --
4174: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4175: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 08 FF 00 00 00 1C 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
4176: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4177: [RX_DR] W_REGISTER: CONFIG = 0E 
4178: [RX_DR] FLUSH_TX
4179: [RX_DR] FLUSH_RX
4180: [RX_DR] W_REGISTER: STATUS = 70 
4181: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 10 FF F0 00 00 02 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 368.8us pass --
4182: [TX_DS] W_REGISTER: STATUS = 70 
4183: W_REGISTER: CONFIG = 0F 
4184: FLUSH_TX
4185: FLUSH_RX
4186: W_REGISTER: STATUS = 70 
4187: R_REGISTER: FIFO_STATUS is 11 
4188: W_REGISTER: STATUS = 70 
  -- 2.6ms pass --
4189: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4190: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 02 02 81 9A BC AE E8 34 24 33 18 28 32 22 14 BD AE D8 81 44 42 18 AA 21 32 32 31 DD C8 11 22 
4191: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4192: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4193: [RX_DR] W_REGISTER: STATUS = 70 
  -- 324.4us pass --
4194: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4195: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: BB BC 02 01 31 36 32 9A 52 30 22 32 BC ED 98 12 44 22 9A BB 41 02 32 21 EA 08 11 16 10 AB AD BB 
4196: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4197: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4198: [RX_DR] W_REGISTER: STATUS = 70 
  -- 327.8us pass --
4199: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4200: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 43 33 02 02 24 20 02 22 EB D9 18 54 31 11 9A AC 00 00 82 34 00 00 00 00 00 00 00 00 00 00 00 00 
4201: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4202: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4203: [RX_DR] W_REGISTER: STATUS = 70 
  -- 397.5us pass --
4204: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4205: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 08 FF 00 00 00 1C 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
4206: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4207: [RX_DR] W_REGISTER: CONFIG = 0E 
4208: [RX_DR] FLUSH_TX
4209: [RX_DR] FLUSH_RX
4210: [RX_DR] W_REGISTER: STATUS = 70 
4211: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 1C 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.3us pass --
4212: [TX_DS] W_REGISTER: STATUS = 70 
4213: W_REGISTER: CONFIG = 0F 
4214: FLUSH_TX
4215: FLUSH_RX
4216: W_REGISTER: STATUS = 70 
4217: R_REGISTER: FIFO_STATUS is 11 
4218: W_REGISTER: STATUS = 70 
  -- 0.8ms pass --
4219: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4220: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 02 FF 00 00 00 1D 00 00 04 2A 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
4221: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4222: [RX_DR] W_REGISTER: CONFIG = 0E 
4223: [RX_DR] FLUSH_TX
4224: [RX_DR] FLUSH_RX
4225: [RX_DR] W_REGISTER: STATUS = 70 
4226: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 1D 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 368.6us pass --
4227: [TX_DS] W_REGISTER: STATUS = 70 
4228: W_REGISTER: CONFIG = 0F 
4229: FLUSH_TX
4230: FLUSH_RX
4231: W_REGISTER: STATUS = 70 
4232: R_REGISTER: FIFO_STATUS is 11 
4233: W_REGISTER: STATUS = 70 
  -- 2.6ms pass --
4234: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4235: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: D8 FF 00 80 10 00 E0 FF 46 49 46 4A 00 01 01 00 01 00 01 00 DB FF 00 00 09 00 43 00 07 0D 07 06 
4236: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4237: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4238: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.0us pass --
4239: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4240: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 07 06 00 01 1C 0F 0C 09 06 09 0C 15 1E 0C 09 06 22 30 2B 1C 0A 0C 19 21 19 0C 07 09 31 1C 24 1F 
4241: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4242: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4243: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.7us pass --
4244: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4245: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 39 3D 00 02 1E 2E 1C 34 1C 13 15 12 33 34 28 27 21 37 34 3C 1F 28 22 19 2B 27 33 2E FF 31 34 39 
4246: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4247: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4248: [RX_DR] W_REGISTER: STATUS = 70 
  -- 311.2us pass --
4249: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4250: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 DB 01 80 09 09 01 43 09 18 31 0D 31 31 31 0C 21 31 31 31 31 1C 0C 0A 31 31 31 31 31 31 31 31 
4251: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4252: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4253: [RX_DR] W_REGISTER: STATUS = 70 
  -- 337.8us pass --
4254: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4255: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 21 01 01 31 31 31 0D 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 
4256: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4257: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4258: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.2us pass --
4259: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4260: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 31 31 01 02 31 31 31 31 C4 FF 31 31 00 00 1F 00 01 01 05 01 01 01 01 01 00 00 00 00 00 00 00 00 
4261: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4262: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4263: [RX_DR] W_REGISTER: STATUS = 70 
  -- 313.8us pass --
4264: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4265: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 02 01 02 80 06 05 04 03 0A 09 08 07 00 C4 FF 0B 02 00 10 B5 02 03 03 01 05 05 03 04 00 00 04 04 
4266: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4267: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4268: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.6us pass --
4269: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4270: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 7D 01 02 01 00 03 02 01 12 05 11 04 06 41 31 21 07 61 51 13 32 14 71 22 08 A1 91 81 C1 B1 42 23 
4271: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4272: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4273: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.9us pass --
4274: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4275: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 52 15 02 02 33 24 F0 D1 09 82 72 62 18 17 16 0A 26 25 1A 19 2A 29 28 27 37 36 35 34 43 3A 39 38 
4276: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4277: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4278: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.2ms pass --
4279: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4280: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 44 03 80 49 48 47 46 55 54 53 4A 59 58 57 56 65 64 63 5A 69 68 67 66 75 74 73 6A 79 78 77 76 
4281: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4282: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4283: [RX_DR] W_REGISTER: STATUS = 70 
  -- 326.7us pass --
4284: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4285: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 83 7A 03 01 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 A9 A8 A7 A6 B4 B3 B2 AA 
4286: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4287: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4288: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.8us pass --
4289: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4290: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: B6 B5 03 02 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 E2 E1 DA D9 E6 E5 E4 E3 
4291: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4292: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4293: [RX_DR] W_REGISTER: STATUS = 70 
  -- 313.7us pass --
4294: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4295: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: E8 E7 04 80 F2 F1 EA E9 F6 F5 F4 F3 FA F9 F8 F7 1F 00 C4 FF 01 03 00 01 01 01 01 01 01 01 01 01 
4296: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4297: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4298: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.7us pass --
4299: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4300: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 04 01 00 00 00 00 04 03 02 01 08 07 06 05 FF 0B 0A 09 11 B5 00 C4 02 01 02 00 04 03 04 04 
4301: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4302: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4303: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.4us pass --
4304: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4305: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 07 04 02 01 00 04 04 01 00 77 02 04 11 03 02 06 31 21 05 07 51 41 12 22 13 71 61 14 08 81 32 
4306: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4307: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4308: [RX_DR] W_REGISTER: STATUS = 70 
  -- 313.6us pass --
4309: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4310: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 91 42 05 80 09 C1 B1 A1 F0 52 33 23 D1 72 62 15 34 24 16 0A 17 F1 25 E1 26 1A 19 18 2A 29 28 27 
4311: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4312: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4313: [RX_DR] W_REGISTER: STATUS = 70 
  -- 335.4us pass --
4314: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4315: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 36 35 05 01 3A 39 38 37 46 45 44 43 4A 49 48 47 56 55 54 53 5A 59 58 57 66 65 64 63 6A 69 68 67 
4316: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4317: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4318: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.9us pass --
4319: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4320: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 74 73 05 02 78 77 76 75 83 82 7A 79 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 
4321: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4322: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4323: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
4324: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4325: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A7 A6 06 80 B2 AA A9 A8 B6 B5 B4 B3 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 
4326: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4327: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4328: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.9us pass --
4329: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4330: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: DA D9 06 01 E5 E4 E3 E2 E9 E8 E7 E6 F4 F3 F2 EA F8 F7 F6 F5 C0 FF FA F9 00 08 11 00 03 A0 00 78 
4331: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4332: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4333: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.4us pass --
4334: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4335: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 21 01 06 02 01 11 02 00 FF 01 11 03 03 0C 00 DA 11 02 00 01 3F 00 11 03 28 BA F1 00 0A 80 A2 00 
4336: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4337: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4338: [RX_DR] W_REGISTER: STATUS = 70 
  -- 311.3us pass --
4339: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4340: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 28 07 80 51 10 92 A2 4C 51 D0 40 61 0C 45 41 29 0A 02 45 98 A2 50 07 88 3A 8A C2 A2 30 A4 28 
4341: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4342: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4343: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.7us pass --
4344: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4345: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 81 07 01 40 51 00 14 0A 62 8A C2 40 51 18 28 14 40 8A 82 80 A2 30 50 80 3B 45 61 45 41 48 51 
4346: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4347: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4348: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.5us pass --
4349: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4350: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 41 03 07 02 29 0A 30 45 3A 4C 51 00 A0 83 14 05 51 10 42 51 20 45 61 4C F6 50 14 E8 3E 45 81 0E 
4351: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4352: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4353: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.9us pass --
4354: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4355: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 0A C2 08 80 45 81 0E 28 12 29 0A 03 28 28 53 14 03 45 41 A0 10 52 14 E8 28 8C 4D 51 5D 8A 02 A0 
4356: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4357: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4358: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.1us pass --
4359: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4360: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 14 04 08 01 A0 28 08 50 0A 63 8A 02 8E A2 00 28 D4 51 14 A0 14 00 45 41 29 0A 63 52 00 45 E1 8A 
4361: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4362: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4363: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.9us pass --
4364: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4365: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A 82 08 02 01 A4 28 00 28 0A 30 45 02 48 51 18 29 0A 62 8A 48 51 A0 8F 02 A0 28 4C 14 05 01 8A 
4366: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4367: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4368: [RX_DR] W_REGISTER: STATUS = 70 
  -- 314.8us pass --
4369: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4370: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 81 09 80 28 8C FA 14 98 A2 20 A4 51 00 14 05 40 8A C2 40 14 60 53 14 86 A2 20 50 98 90 A2 30 
4371: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4372: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4373: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.1ms pass --
4374: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4375: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 4C 51 09 01 7D 48 8A 02 31 45 41 7E 51 00 14 05 14 EA 60 47 A4 28 C0 50 05 98 A2 30 A0 28 08 14 
4376: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4377: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4378: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.7us pass --
4379: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4380: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A 02 09 02 90 A2 30 18 0C FA 14 05 45 41 A0 28 1D 50 14 00 61 4C 8A 42 A2 30 31 45 14 E8 83 8E 
4381: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4382: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4383: [RX_DR] W_REGISTER: STATUS = 70 
  -- 317.1us pass --
4384: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4385: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 20 50 0A 80 14 85 81 A2 D4 51 14 84 58 1D 45 61 51 00 14 05 08 14 05 40 7F D0 A7 28 20 50 14 E4 
4386: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4387: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4388: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.9us pass --
4389: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4390: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8E A2 0A 01 0C 50 14 80 8A 02 A0 28 20 50 14 06 14 05 90 A2 1D 50 14 C6 C2 04 8A 02 50 14 06 8A 
4391: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4392: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4393: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.0us pass --
4394: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4395: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A2 20 0A 02 03 45 01 84 20 50 14 E8 28 0A 80 A2 0A 80 A2 00 29 0A 20 29 41 A0 28 8C 29 0A 20 45 
4396: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4397: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4398: [RX_DR] W_REGISTER: STATUS = 70 
  -- 317.0us pass --
4399: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4400: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 0A 83 0B 80 4C 51 00 29 40 51 A0 6F C2 06 8A 82 29 0A 42 8A 40 51 A0 8F 28 08 14 05 00 8A 02 A0 
4401: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4402: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4403: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.3us pass --
4404: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4405: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A4 28 0B 01 29 0A 50 BF 00 28 0A B0 14 85 81 A2 00 53 14 84 0A F4 81 A2 14 85 0B 28 98 A2 70 85 
4406: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4407: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4408: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.4us pass --
4409: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4410: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 14 05 0B 02 02 A0 28 0C 14 85 01 8A 8F 40 51 00 08 50 D9 FF 00 D9 FF 00 00 00 00 00 00 00 00 00 
4411: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4412: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4413: [RX_DR] W_REGISTER: STATUS = 70 
  -- 407.7us pass --
4414: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4415: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 1D 00 00 04 2A 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
4416: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4417: [RX_DR] W_REGISTER: CONFIG = 0E 
4418: [RX_DR] FLUSH_TX
4419: [RX_DR] FLUSH_RX
4420: [RX_DR] W_REGISTER: STATUS = 70 
4421: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 1D 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.6us pass --
4422: [TX_DS] W_REGISTER: STATUS = 70 
4423: W_REGISTER: CONFIG = 0F 
4424: FLUSH_TX
4425: FLUSH_RX
4426: W_REGISTER: STATUS = 70 
4427: R_REGISTER: FIFO_STATUS is 11 
4428: W_REGISTER: STATUS = 70 
  -- 3.3ms pass --
4429: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4430: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 1D 00 00 04 2A 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
4431: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4432: [RX_DR] W_REGISTER: CONFIG = 0E 
4433: [RX_DR] FLUSH_TX
4434: [RX_DR] FLUSH_RX
4435: [RX_DR] W_REGISTER: STATUS = 70 
4436: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 1D 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.5us pass --
4437: [TX_DS] W_REGISTER: STATUS = 70 
4438: W_REGISTER: CONFIG = 0F 
4439: FLUSH_TX
4440: FLUSH_RX
4441: W_REGISTER: STATUS = 70 
4442: R_REGISTER: FIFO_STATUS is 11 
4443: W_REGISTER: STATUS = 70 
  -- 22.3ms pass --
4444: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4445: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 02 FF 00 00 00 1E 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
4446: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4447: [RX_DR] W_REGISTER: CONFIG = 0E 
4448: [RX_DR] FLUSH_TX
4449: [RX_DR] FLUSH_RX
4450: [RX_DR] W_REGISTER: STATUS = 70 
4451: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 1E 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.4us pass --
4452: [TX_DS] W_REGISTER: STATUS = 70 
4453: W_REGISTER: CONFIG = 0F 
4454: FLUSH_TX
4455: FLUSH_RX
4456: W_REGISTER: STATUS = 70 
4457: R_REGISTER: FIFO_STATUS is 11 
4458: W_REGISTER: STATUS = 70 
  -- 752.4us pass --
4459: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4460: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 1D BB 00 81 DA 91 00 30 20 8A AA FB 99 82 25 31 93 22 32 41 99 DD BB CE 90 32 32 28 43 33 00 AD 
4461: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4462: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4463: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.8us pass --
4464: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4465: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: DC B0 00 01 08 AB BE BB BD BA 13 32 A8 23 35 2A 9A BC CC BC 99 13 35 51 10 24 2B AA AB FB AB DA 
4466: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4467: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4468: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.5us pass --
4469: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4470: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 51 0A 00 02 9A B8 12 35 89 84 31 10 19 BD CC BA C9 02 34 55 A9 10 88 98 AC E9 AC 9A 01 14 54 88 
4471: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4472: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4473: [RX_DR] W_REGISTER: STATUS = 70 
  -- 308.7us pass --
4474: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4475: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 89 AA 01 81 B9 98 81 19 50 BD C9 98 A9 80 24 46 BC 98 98 8A 9B F9 BB A9 00 13 47 21 98 00 88 AB 
4476: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4477: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4478: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.9us pass --
4479: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4480: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 09 CC 01 01 72 9A A9 81 99 99 23 47 DD 9A 98 8A 8C 99 99 88 88 03 45 52 A9 00 08 AA A9 80 89 AD 
4481: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4482: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4483: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.0us pass --
4484: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4485: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 77 0B 01 02 9A 89 02 43 9D D9 99 18 08 DA 88 99 99 82 34 63 DA 92 10 88 AD 98 09 AA 81 25 37 48 
4486: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4487: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4488: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.2ms pass --
4489: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4490: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 09 98 02 81 AB DB 80 80 40 9D BA 89 A9 00 23 56 CC 91 21 08 99 DB 89 9A A1 12 45 61 88 11 29 98 
4491: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4492: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4493: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.4us pass --
4494: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4495: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 99 EB 02 01 52 8D BA B9 99 A0 12 36 BD 90 22 18 8B BD BA A9 99 11 24 75 A9 22 20 9A CD BC BB BA 
4496: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4497: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4498: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.6us pass --
4499: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4500: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 65 0A 02 02 89 B9 01 24 CB 90 21 00 10 DB BD A8 00 00 13 74 00 00 00 00 00 00 00 00 00 00 00 00 
4501: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4502: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4503: [RX_DR] W_REGISTER: STATUS = 70 
  -- 397.3us pass --
4504: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4505: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 08 FF 00 00 00 1E 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
4506: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4507: [RX_DR] W_REGISTER: CONFIG = 0E 
4508: [RX_DR] FLUSH_TX
4509: [RX_DR] FLUSH_RX
4510: [RX_DR] W_REGISTER: STATUS = 70 
4511: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 1E 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.7us pass --
4512: [TX_DS] W_REGISTER: STATUS = 70 
4513: W_REGISTER: CONFIG = 0F 
4514: FLUSH_TX
4515: FLUSH_RX
4516: W_REGISTER: STATUS = 70 
4517: R_REGISTER: FIFO_STATUS is 11 
4518: W_REGISTER: STATUS = 70 
  -- 0.8ms pass --
4519: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4520: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 02 FF 00 00 00 1F 00 00 04 2A 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
4521: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4522: [RX_DR] W_REGISTER: CONFIG = 0E 
4523: [RX_DR] FLUSH_TX
4524: [RX_DR] FLUSH_RX
4525: [RX_DR] W_REGISTER: STATUS = 70 
4526: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 1F 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 368.6us pass --
4527: [TX_DS] W_REGISTER: STATUS = 70 
4528: W_REGISTER: CONFIG = 0F 
4529: FLUSH_TX
4530: FLUSH_RX
4531: W_REGISTER: STATUS = 70 
4532: R_REGISTER: FIFO_STATUS is 11 
4533: W_REGISTER: STATUS = 70 
  -- 2.8ms pass --
4534: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4535: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: D8 FF 00 80 10 00 E0 FF 46 49 46 4A 00 01 01 00 01 00 01 00 DB FF 00 00 09 00 43 00 07 0D 07 06 
4536: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4537: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4538: [RX_DR] W_REGISTER: STATUS = 70 
  -- 335.6us pass --
4539: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4540: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 07 06 00 01 1C 0F 0C 09 06 09 0C 15 1E 0C 09 06 22 30 2B 1C 0A 0C 19 21 19 0C 07 09 31 1C 24 1F 
4541: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4542: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4543: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.4us pass --
4544: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4545: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 39 3D 00 02 1E 2E 1C 34 1C 13 15 12 33 34 28 27 21 37 34 3C 1F 28 22 19 2B 27 33 2E FF 31 34 39 
4546: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4547: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4548: [RX_DR] W_REGISTER: STATUS = 70 
  -- 308.9us pass --
4549: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4550: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 DB 01 80 09 09 01 43 09 18 31 0D 31 31 31 0C 21 31 31 31 31 1C 0C 0A 31 31 31 31 31 31 31 31 
4551: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4552: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4553: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.4us pass --
4554: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4555: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 21 01 01 31 31 31 0D 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 
4556: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4557: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4558: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.5us pass --
4559: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4560: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 31 31 01 02 31 31 31 31 C4 FF 31 31 00 00 1F 00 01 01 05 01 01 01 01 01 00 00 00 00 00 00 00 00 
4561: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4562: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4563: [RX_DR] W_REGISTER: STATUS = 70 
  -- 313.6us pass --
4564: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4565: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 02 01 02 80 06 05 04 03 0A 09 08 07 00 C4 FF 0B 02 00 10 B5 02 03 03 01 05 05 03 04 00 00 04 04 
4566: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4567: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4568: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.1us pass --
4569: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4570: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 7D 01 02 01 00 03 02 01 12 05 11 04 06 41 31 21 07 61 51 13 32 14 71 22 08 A1 91 81 C1 B1 42 23 
4571: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4572: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4573: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.5us pass --
4574: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4575: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 52 15 02 02 33 24 F0 D1 09 82 72 62 18 17 16 0A 26 25 1A 19 2A 29 28 27 37 36 35 34 43 3A 39 38 
4576: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4577: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4578: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
4579: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4580: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 44 03 80 49 48 47 46 55 54 53 4A 59 58 57 56 65 64 63 5A 69 68 67 66 75 74 73 6A 79 78 77 76 
4581: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4582: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4583: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.4us pass --
4584: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4585: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 83 7A 03 01 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 A9 A8 A7 A6 B4 B3 B2 AA 
4586: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4587: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4588: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.8us pass --
4589: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4590: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: B6 B5 03 02 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 E2 E1 DA D9 E6 E5 E4 E3 
4591: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4592: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4593: [RX_DR] W_REGISTER: STATUS = 70 
  -- 315.8us pass --
4594: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4595: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: E8 E7 04 80 F2 F1 EA E9 F6 F5 F4 F3 FA F9 F8 F7 1F 00 C4 FF 01 03 00 01 01 01 01 01 01 01 01 01 
4596: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4597: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4598: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.6us pass --
4599: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4600: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 04 01 00 00 00 00 04 03 02 01 08 07 06 05 FF 0B 0A 09 11 B5 00 C4 02 01 02 00 04 03 04 04 
4601: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4602: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4603: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.2us pass --
4604: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4605: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 07 04 02 01 00 04 04 01 00 77 02 04 11 03 02 06 31 21 05 07 51 41 12 22 13 71 61 14 08 81 32 
4606: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4607: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4608: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.8us pass --
4609: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4610: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 91 42 05 80 09 C1 B1 A1 F0 52 33 23 D1 72 62 15 34 24 16 0A 17 F1 25 E1 26 1A 19 18 2A 29 28 27 
4611: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4612: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4613: [RX_DR] W_REGISTER: STATUS = 70 
  -- 335.4us pass --
4614: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4615: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 36 35 05 01 3A 39 38 37 46 45 44 43 4A 49 48 47 56 55 54 53 5A 59 58 57 66 65 64 63 6A 69 68 67 
4616: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4617: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4618: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.1us pass --
4619: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4620: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 74 73 05 02 78 77 76 75 83 82 7A 79 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 
4621: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4622: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4623: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
4624: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4625: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A7 A6 06 80 B2 AA A9 A8 B6 B5 B4 B3 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 
4626: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4627: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4628: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.5us pass --
4629: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4630: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: DA D9 06 01 E5 E4 E3 E2 E9 E8 E7 E6 F4 F3 F2 EA F8 F7 F6 F5 C0 FF FA F9 00 08 11 00 03 A0 00 78 
4631: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4632: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4633: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.1us pass --
4634: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4635: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 21 01 06 02 01 11 02 00 FF 01 11 03 03 0C 00 DA 11 02 00 01 3F 00 11 03 28 BA F1 00 0A 80 A2 00 
4636: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4637: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4638: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.9us pass --
4639: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4640: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 28 07 80 51 10 92 A2 4C 51 D0 40 61 0C 45 41 29 0A 02 45 98 A2 50 07 88 3A 8A C2 A2 30 A4 28 
4641: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4642: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4643: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.4us pass --
4644: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4645: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 81 07 01 40 51 00 14 0A 62 8A C2 40 51 18 28 14 40 8A 82 80 A2 30 50 80 3B 45 61 45 41 48 51 
4646: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4647: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4648: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.0us pass --
4649: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4650: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 41 03 07 02 29 0A 30 45 3A 4C 51 00 A0 83 14 05 51 10 42 51 20 45 61 4C F6 50 14 E8 3E 45 81 0E 
4651: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4652: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4653: [RX_DR] W_REGISTER: STATUS = 70 
  -- 319.6us pass --
4654: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4655: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 0A C2 08 80 45 81 0E 28 12 29 0A 03 28 28 53 14 03 45 41 A0 10 52 14 E8 28 8C 4D 51 5D 8A 02 A0 
4656: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4657: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4658: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.4us pass --
4659: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4660: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 14 04 08 01 A0 28 08 50 0A 63 8A 02 8E A2 00 28 D4 51 14 A0 14 00 45 41 29 0A 63 52 00 45 E1 8A 
4661: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4662: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4663: [RX_DR] W_REGISTER: STATUS = 70 
  -- 324.1us pass --
4664: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4665: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A 82 08 02 01 A4 28 00 28 0A 30 45 02 48 51 18 29 0A 62 8A 48 51 A0 8F 02 A0 28 4C 14 05 01 8A 
4666: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4667: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4668: [RX_DR] W_REGISTER: STATUS = 70 
  -- 313.9us pass --
4669: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4670: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 81 09 80 28 8C FA 14 98 A2 20 A4 51 00 14 05 40 8A C2 40 14 60 53 14 86 A2 20 50 98 90 A2 30 
4671: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4672: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4673: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.1ms pass --
4674: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4675: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 4C 51 09 01 7D 48 8A 02 31 45 41 7E 51 00 14 05 14 EA 60 47 A4 28 C0 50 05 98 A2 30 A0 28 08 14 
4676: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4677: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4678: [RX_DR] W_REGISTER: STATUS = 70 
  -- 326.3us pass --
4679: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4680: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A 02 09 02 90 A2 30 18 0C FA 14 05 45 41 A0 28 1D 50 14 00 61 4C 8A 42 A2 30 31 45 14 E8 83 8E 
4681: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4682: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4683: [RX_DR] W_REGISTER: STATUS = 70 
  -- 313.9us pass --
4684: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4685: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 20 50 0A 80 14 85 81 A2 D4 51 14 84 58 1D 45 61 51 00 14 05 08 14 05 40 7F D0 A7 28 20 50 14 E4 
4686: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4687: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4688: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.8us pass --
4689: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4690: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8E A2 0A 01 0C 50 14 80 8A 02 A0 28 20 50 14 06 14 05 90 A2 1D 50 14 C6 C2 04 8A 02 50 14 06 8A 
4691: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4692: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4693: [RX_DR] W_REGISTER: STATUS = 70 
  -- 326.2us pass --
4694: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4695: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A2 20 0A 02 03 45 01 84 20 50 14 E8 28 0A 80 A2 0A 80 A2 00 29 0A 20 29 41 A0 28 8C 29 0A 20 45 
4696: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4697: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4698: [RX_DR] W_REGISTER: STATUS = 70 
  -- 315.7us pass --
4699: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4700: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 0A 83 0B 80 4C 51 00 29 40 51 A0 6F C2 06 8A 82 29 0A 42 8A 40 51 A0 8F 28 08 14 05 00 8A 02 A0 
4701: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4702: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4703: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.0us pass --
4704: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4705: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A4 28 0B 01 29 0A 50 BF 00 28 0A B0 14 85 81 A2 00 53 14 84 0A F4 81 A2 14 85 0B 28 98 A2 70 85 
4706: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4707: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4708: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.3us pass --
4709: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4710: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 14 05 0B 02 02 A0 28 0C 14 85 01 8A 8F 40 51 00 08 50 D9 FF 00 D9 FF 00 00 00 00 00 00 00 00 00 
4711: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4712: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4713: [RX_DR] W_REGISTER: STATUS = 70 
  -- 407.6us pass --
4714: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4715: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 1F 00 00 04 2A 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
4716: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4717: [RX_DR] W_REGISTER: CONFIG = 0E 
4718: [RX_DR] FLUSH_TX
4719: [RX_DR] FLUSH_RX
4720: [RX_DR] W_REGISTER: STATUS = 70 
4721: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 1F 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.1us pass --
4722: [TX_DS] W_REGISTER: STATUS = 70 
4723: W_REGISTER: CONFIG = 0F 
4724: FLUSH_TX
4725: FLUSH_RX
4726: W_REGISTER: STATUS = 70 
4727: R_REGISTER: FIFO_STATUS is 11 
4728: W_REGISTER: STATUS = 70 
  -- 3.3ms pass --
4729: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4730: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 1F 00 00 04 2A 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
4731: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4732: [RX_DR] W_REGISTER: CONFIG = 0E 
4733: [RX_DR] FLUSH_TX
4734: [RX_DR] FLUSH_RX
4735: [RX_DR] W_REGISTER: STATUS = 70 
4736: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 1F 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.6us pass --
4737: [TX_DS] W_REGISTER: STATUS = 70 
4738: W_REGISTER: CONFIG = 0F 
4739: FLUSH_TX
4740: FLUSH_RX
4741: W_REGISTER: STATUS = 70 
4742: R_REGISTER: FIFO_STATUS is 11 
4743: W_REGISTER: STATUS = 70 
  -- 30.2ms pass --
4744: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4745: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 02 FF 00 00 00 20 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
4746: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4747: [RX_DR] W_REGISTER: CONFIG = 0E 
4748: [RX_DR] FLUSH_TX
4749: [RX_DR] FLUSH_RX
4750: [RX_DR] W_REGISTER: STATUS = 70 
4751: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 20 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.6us pass --
4752: [TX_DS] W_REGISTER: STATUS = 70 
4753: W_REGISTER: CONFIG = 0F 
4754: FLUSH_TX
4755: FLUSH_RX
4756: W_REGISTER: STATUS = 70 
4757: R_REGISTER: FIFO_STATUS is 11 
4758: W_REGISTER: STATUS = 70 
  -- 752.7us pass --
4759: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4760: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 14 81 00 81 88 11 00 31 DB AC C9 C9 90 12 74 21 00 18 8A AB CD DB A9 A8 22 35 41 9B 08 89 CC A0 
4761: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4762: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4763: [RX_DR] W_REGISTER: STATUS = 70 
  -- 335.4us pass --
4764: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4765: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 09 91 00 01 89 DD BA C9 B8 13 36 30 32 31 8A BB DA DC D1 11 82 37 31 1A 28 0A BB B9 EA A0 98 24 
4766: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4767: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4768: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.8us pass --
4769: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4770: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 AC 00 02 A9 01 42 56 22 31 89 AA 9D CC DA 92 01 13 62 00 22 9A AB BC CD DB 91 11 22 54 40 89 
4771: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4772: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4773: [RX_DR] W_REGISTER: STATUS = 70 
  -- 309.1us pass --
4774: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4775: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: BA 81 01 81 02 52 29 9B 9C BA EB 88 98 05 43 42 32 88 AC BB AC BD A0 01 22 35 54 19 20 A9 CB A0 
4776: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4777: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4778: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.2us pass --
4779: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4780: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 04 32 01 01 89 9D CC BB B9 12 14 52 43 10 9B DB 99 DD 9B 92 02 24 53 28 51 8B BB B8 CC AA 90 51 
4781: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4782: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4783: [RX_DR] W_REGISTER: STATUS = 70 
  -- 326.3us pass --
4784: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4785: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 29 8A 01 02 DB 02 32 53 23 10 08 EB 0B CB AA A0 02 24 45 41 43 29 AA CA AC D9 90 23 14 27 11 B8 
4786: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4787: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4788: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
4789: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4790: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: BA 81 02 81 22 34 18 8D 88 8B DA 90 98 32 47 13 35 20 9C BB 89 DC A8 22 14 34 40 08 50 9A AC A9 
4791: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4792: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4793: [RX_DR] W_REGISTER: STATUS = 70 
  -- 326.4us pass --
4794: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4795: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 02 33 02 01 0A 98 BB D9 B9 81 43 72 23 51 89 BD A0 9B DA A2 80 25 25 28 54 2B AA AC 8A CC A0 23 
4796: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4797: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4798: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.4us pass --
4799: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4800: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 21 98 02 02 BD BA 23 25 31 36 40 AB 08 98 BB C9 00 00 22 72 00 00 00 00 00 00 00 00 00 00 00 00 
4801: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4802: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4803: [RX_DR] W_REGISTER: STATUS = 70 
  -- 407.4us pass --
4804: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4805: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 08 FF 00 00 00 20 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
4806: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4807: [RX_DR] W_REGISTER: CONFIG = 0E 
4808: [RX_DR] FLUSH_TX
4809: [RX_DR] FLUSH_RX
4810: [RX_DR] W_REGISTER: STATUS = 70 
4811: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 20 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.1us pass --
4812: [TX_DS] W_REGISTER: STATUS = 70 
4813: W_REGISTER: CONFIG = 0F 
4814: FLUSH_TX
4815: FLUSH_RX
4816: W_REGISTER: STATUS = 70 
4817: R_REGISTER: FIFO_STATUS is 11 
4818: W_REGISTER: STATUS = 70 
  -- 0.8ms pass --
4819: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4820: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 02 FF 00 00 00 21 00 00 04 32 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
4821: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4822: [RX_DR] W_REGISTER: CONFIG = 0E 
4823: [RX_DR] FLUSH_TX
4824: [RX_DR] FLUSH_RX
4825: [RX_DR] W_REGISTER: STATUS = 70 
4826: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 21 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 367.7us pass --
4827: [TX_DS] W_REGISTER: STATUS = 70 
4828: W_REGISTER: CONFIG = 0F 
4829: FLUSH_TX
4830: FLUSH_RX
4831: W_REGISTER: STATUS = 70 
4832: R_REGISTER: FIFO_STATUS is 11 
4833: W_REGISTER: STATUS = 70 
  -- 2.8ms pass --
4834: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4835: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: D8 FF 00 80 10 00 E0 FF 46 49 46 4A 00 01 01 00 01 00 01 00 DB FF 00 00 09 00 43 00 07 0D 07 06 
4836: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4837: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4838: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.9us pass --
4839: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4840: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 07 06 00 01 1C 0F 0C 09 06 09 0C 15 1E 0C 09 06 22 30 2B 1C 0A 0C 19 21 19 0C 07 09 31 1C 24 1F 
4841: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4842: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4843: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.1us pass --
4844: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4845: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 39 3D 00 02 1E 2E 1C 34 1C 13 15 12 33 34 28 27 21 37 34 3C 1F 28 22 19 2B 27 33 2E FF 31 34 39 
4846: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4847: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4848: [RX_DR] W_REGISTER: STATUS = 70 
  -- 299.3us pass --
4849: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4850: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 DB 01 80 09 09 01 43 09 18 31 0D 31 31 31 0C 21 31 31 31 31 1C 0C 0A 31 31 31 31 31 31 31 31 
4851: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4852: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4853: [RX_DR] W_REGISTER: STATUS = 70 
  -- 327.8us pass --
4854: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4855: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 21 01 01 31 31 31 0D 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 
4856: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4857: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4858: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.2us pass --
4859: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4860: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 31 31 01 02 31 31 31 31 C4 FF 31 31 00 00 1F 00 01 01 05 01 01 01 01 01 00 00 00 00 00 00 00 00 
4861: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4862: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4863: [RX_DR] W_REGISTER: STATUS = 70 
  -- 313.0us pass --
4864: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4865: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 02 01 02 80 06 05 04 03 0A 09 08 07 00 C4 FF 0B 02 00 10 B5 02 03 03 01 05 05 03 04 00 00 04 04 
4866: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4867: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4868: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.5us pass --
4869: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4870: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 7D 01 02 01 00 03 02 01 12 05 11 04 06 41 31 21 07 61 51 13 32 14 71 22 08 A1 91 81 C1 B1 42 23 
4871: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4872: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4873: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.4us pass --
4874: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4875: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 52 15 02 02 33 24 F0 D1 09 82 72 62 18 17 16 0A 26 25 1A 19 2A 29 28 27 37 36 35 34 43 3A 39 38 
4876: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4877: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4878: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
4879: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4880: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 44 03 80 49 48 47 46 55 54 53 4A 59 58 57 56 65 64 63 5A 69 68 67 66 75 74 73 6A 79 78 77 76 
4881: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4882: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4883: [RX_DR] W_REGISTER: STATUS = 70 
  -- 335.3us pass --
4884: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4885: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 83 7A 03 01 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 A9 A8 A7 A6 B4 B3 B2 AA 
4886: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4887: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4888: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.4us pass --
4889: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4890: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: B6 B5 03 02 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 E2 E1 DA D9 E6 E5 E4 E3 
4891: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4892: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4893: [RX_DR] W_REGISTER: STATUS = 70 
  -- 315.4us pass --
4894: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4895: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: E8 E7 04 80 F2 F1 EA E9 F6 F5 F4 F3 FA F9 F8 F7 1F 00 C4 FF 01 03 00 01 01 01 01 01 01 01 01 01 
4896: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4897: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4898: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.2us pass --
4899: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4900: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 04 01 00 00 00 00 04 03 02 01 08 07 06 05 FF 0B 0A 09 11 B5 00 C4 02 01 02 00 04 03 04 04 
4901: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4902: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4903: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.2us pass --
4904: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4905: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 07 04 02 01 00 04 04 01 00 77 02 04 11 03 02 06 31 21 05 07 51 41 12 22 13 71 61 14 08 81 32 
4906: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4907: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4908: [RX_DR] W_REGISTER: STATUS = 70 
  -- 316.6us pass --
4909: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4910: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 91 42 05 80 09 C1 B1 A1 F0 52 33 23 D1 72 62 15 34 24 16 0A 17 F1 25 E1 26 1A 19 18 2A 29 28 27 
4911: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4912: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4913: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.3us pass --
4914: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4915: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 36 35 05 01 3A 39 38 37 46 45 44 43 4A 49 48 47 56 55 54 53 5A 59 58 57 66 65 64 63 6A 69 68 67 
4916: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4917: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4918: [RX_DR] W_REGISTER: STATUS = 70 
  -- 326.9us pass --
4919: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4920: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 74 73 05 02 78 77 76 75 83 82 7A 79 87 86 85 84 92 8A 89 88 96 95 94 93 9A 99 98 97 A5 A4 A3 A2 
4921: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4922: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4923: [RX_DR] W_REGISTER: STATUS = 70 
  -- 313.9us pass --
4924: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4925: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A7 A6 06 80 B2 AA A9 A8 B6 B5 B4 B3 BA B9 B8 B7 C5 C4 C3 C2 C9 C8 C7 C6 D4 D3 D2 CA D8 D7 D6 D5 
4926: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4927: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4928: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.1ms pass --
4929: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4930: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: DA D9 06 01 E5 E4 E3 E2 E9 E8 E7 E6 F4 F3 F2 EA F8 F7 F6 F5 C0 FF FA F9 00 08 11 00 03 A0 00 78 
4931: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4932: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4933: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.2us pass --
4934: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4935: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 21 01 06 02 01 11 02 00 FF 01 11 03 03 0C 00 DA 11 02 00 01 3F 00 11 03 28 BA F1 00 A6 28 88 7B 
4936: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4937: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4938: [RX_DR] W_REGISTER: STATUS = 70 
  -- 310.9us pass --
4939: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4940: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 98 C6 07 80 8A 02 48 51 84 14 05 10 A2 00 53 14 50 14 C6 86 42 8A 42 1D 51 80 29 0A 00 8A C2 40 
4941: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4942: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4943: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.9us pass --
4944: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4945: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A0 28 07 01 02 0C 45 41 A4 28 00 8A F4 29 0A 16 04 8A C2 1D 14 40 8A C2 48 51 18 53 10 A0 28 4C 
4946: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4947: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4948: [RX_DR] W_REGISTER: STATUS = 70 
  -- 326.8us pass --
4949: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4950: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 4C 51 07 02 02 3A 8A 02 A2 00 28 0A 77 14 85 81 74 40 51 10 00 75 29 0A 8A C2 98 A2 E8 28 0A 42 
4951: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4952: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4953: [RX_DR] W_REGISTER: STATUS = 70 
  -- 314.2us pass --
4954: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4955: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: A2 30 08 80 0A F7 84 9D A2 40 1F 28 80 14 05 81 51 18 AA 28 8A 02 5D 48 A6 28 D8 41 30 26 45 01 
4956: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4957: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4958: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.3us pass --
4959: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4960: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 98 A2 08 01 E8 89 14 05 A3 BE 53 14 2E 14 05 5B 20 29 0A A3 51 80 29 0A 06 8A 82 40 A2 20 50 14 
4961: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4962: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4963: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.5us pass --
4964: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4965: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 85 81 08 02 A0 28 08 14 0C 50 14 2C 8A 02 A0 28 C6 A4 28 00 51 10 53 14 50 45 61 48 F6 04 8A C2 
4966: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4967: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4968: [RX_DR] W_REGISTER: STATUS = 70 
  -- 314.1us pass --
4969: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4970: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 28 0A 09 80 82 90 A2 00 0A 02 3A 8A 40 51 18 28 03 3A 8A 82 00 14 05 D9 51 18 43 51 58 14 05 40 
4971: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4972: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4973: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
4974: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4975: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 8A 02 09 01 00 8A 82 04 8A 02 A0 28 01 8A C2 10 05 21 14 05 28 0A 02 14 01 50 14 04 28 0A 03 45 
4976: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4977: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4978: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.2us pass --
4979: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4980: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 50 17 09 02 14 85 81 A2 02 A0 28 08 14 05 01 8A 81 A2 20 0D 43 28 0A 75 14 06 28 0A 8E A2 20 50 
4981: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4982: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4983: [RX_DR] W_REGISTER: STATUS = 70 
  -- 309.8us pass --
4984: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4985: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 61 83 0A 80 8A 02 0C 45 1D 28 0A 09 A8 03 8A C2 51 18 42 51 06 8A 82 40 A0 03 8A 82 8A 82 40 51 
4986: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4987: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4988: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.3us pass --
4989: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4990: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 14 06 0A 01 28 00 7D 51 8A 82 A0 A3 88 29 0A 43 80 FE A1 28 A2 30 50 14 0C 14 05 81 8A 02 A0 28 
4991: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4992: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4993: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.9us pass --
4994: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
4995: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 85 01 0A 02 A0 28 08 14 1D 2C 8A 02 0C 3A 8A 82 45 01 A6 28 00 14 05 21 A2 30 40 51 03 45 61 80 
4996: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4997: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
4998: [RX_DR] W_REGISTER: STATUS = 70 
  -- 318.6us pass --
4999: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5000: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 28 0A 0B 80 00 8A C2 15 8A 02 A0 28 61 A0 28 00 51 14 00 45 1F 45 41 D4 03 45 01 E6 51 10 28 0A 
5001: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5002: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5003: [RX_DR] W_REGISTER: STATUS = 70 
  -- 330.4us pass --
5004: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5005: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: ED 40 0B 01 00 14 05 F9 14 05 40 51 7D A0 28 08 28 00 8A 02 14 85 2B A4 0C A1 28 C0 45 01 A6 28 
5006: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5007: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5008: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.3us pass --
5009: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5010: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 05 21 0B 02 40 51 00 14 05 81 14 05 42 5D 43 15 45 41 4C 8A 03 28 0A 03 00 00 D9 FF 00 00 00 00 
5011: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5012: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5013: [RX_DR] W_REGISTER: STATUS = 70 
  -- 398.9us pass --
5014: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5015: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 08 FF 00 00 00 21 00 00 04 32 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
5016: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5017: [RX_DR] W_REGISTER: CONFIG = 0E 
5018: [RX_DR] FLUSH_TX
5019: [RX_DR] FLUSH_RX
5020: [RX_DR] W_REGISTER: STATUS = 70 
5021: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 21 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.9us pass --
5022: [TX_DS] W_REGISTER: STATUS = 70 
5023: W_REGISTER: CONFIG = 0F 
5024: FLUSH_TX
5025: FLUSH_RX
5026: W_REGISTER: STATUS = 70 
5027: R_REGISTER: FIFO_STATUS is 11 
5028: W_REGISTER: STATUS = 70 
  -- 26.2ms pass --
5029: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5030: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 02 FF 00 00 00 22 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
5031: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5032: [RX_DR] W_REGISTER: CONFIG = 0E 
5033: [RX_DR] FLUSH_TX
5034: [RX_DR] FLUSH_RX
5035: [RX_DR] W_REGISTER: STATUS = 70 
5036: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 22 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 370.4us pass --
5037: [TX_DS] W_REGISTER: STATUS = 70 
5038: W_REGISTER: CONFIG = 0F 
5039: FLUSH_TX
5040: FLUSH_RX
5041: W_REGISTER: STATUS = 70 
5042: R_REGISTER: FIFO_STATUS is 11 
5043: W_REGISTER: STATUS = 70 
  -- 760.1us pass --
5044: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5045: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 0C 5A 00 81 23 52 00 2F 88 AB CB 04 B8 03 53 18 36 20 AA BD 8B BD 91 24 00 45 28 81 11 09 9C B9 
5046: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5047: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5048: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.6us pass --
5049: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5050: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 04 35 00 01 88 09 AD D9 BE A8 32 20 37 39 21 89 10 9D CA 01 D9 12 22 A8 31 A9 10 AB 8A AF E2 50 
5051: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5052: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5053: [RX_DR] W_REGISTER: STATUS = 70 
  -- 340.0us pass --
5054: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5055: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 89 80 00 02 1A B0 A9 12 26 52 00 24 89 80 AE B0 BC B0 3A 11 30 19 48 04 08 9C D9 17 91 41 18 20 
5056: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5057: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5058: [RX_DR] W_REGISTER: STATUS = 70 
  -- 305.5us pass --
5059: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5060: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 25 38 01 81 82 73 01 03 18 0A A8 BD 80 8A 94 8C 13 80 E1 3A 19 A8 9F FA 80 12 39 A0 12 11 40 44 
5061: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5062: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5063: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.9us pass --
5064: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5065: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: B9 17 01 01 80 88 0A DA B4 9B 21 28 C5 78 A1 38 0A 08 BD BB 00 24 33 A3 36 44 24 12 98 9C AD 98 
5066: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5067: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5068: [RX_DR] W_REGISTER: STATUS = 70 
  -- 329.0us pass --
5069: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5070: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 01 18 01 02 9A 08 D2 31 CD 03 73 82 31 A8 8A CB 98 03 21 24 92 45 37 22 00 AA 8B EA F0 19 23 19 
5071: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5072: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5073: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
5074: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5075: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 88 09 02 81 BF A1 13 61 32 00 B9 8A 88 A0 80 25 98 15 74 32 49 89 9B BB 8B 10 21 26 02 47 43 88 
5076: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5077: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5078: [RX_DR] W_REGISTER: STATUS = 70 
  -- 334.4us pass --
5079: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5080: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: CB B8 02 01 33 51 89 A8 88 9B 90 12 BA 81 34 56 52 88 B8 AE A9 A0 81 32 91 14 75 1A 09 9A 9A D9 
5081: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5082: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5083: [RX_DR] W_REGISTER: STATUS = 70 
  -- 333.5us pass --
5084: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5085: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 21 53 02 02 1A A9 99 80 CA B0 43 47 27 28 BA AB 00 00 88 02 00 00 00 00 00 00 00 00 00 00 00 00 
5086: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5087: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5088: [RX_DR] W_REGISTER: STATUS = 70 
  -- 406.1us pass --
5089: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5090: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 01 08 FF 00 00 00 22 00 00 01 00 00 60 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
5091: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5092: [RX_DR] W_REGISTER: CONFIG = 0E 
5093: [RX_DR] FLUSH_TX
5094: [RX_DR] FLUSH_RX
5095: [RX_DR] W_REGISTER: STATUS = 70 
5096: W_TX_PAYLOAD (32 bytes)
	DATA: 00 01 80 FF 00 00 00 22 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 369.4us pass --
5097: [TX_DS] W_REGISTER: STATUS = 70 
5098: W_REGISTER: CONFIG = 0F 
5099: FLUSH_TX
5100: FLUSH_RX
5101: W_REGISTER: STATUS = 70 
5102: R_REGISTER: FIFO_STATUS is 11 
5103: W_REGISTER: STATUS = 70 
  -- 0.8ms pass --
5104: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5105: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 00 02 FF 00 00 00 23 00 00 04 32 00 60 00 0C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 
5106: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5107: [RX_DR] W_REGISTER: CONFIG = 0E 
5108: [RX_DR] FLUSH_TX
5109: [RX_DR] FLUSH_RX
5110: [RX_DR] W_REGISTER: STATUS = 70 
5111: W_TX_PAYLOAD (32 bytes)
	DATA: 00 00 80 FF 00 00 00 23 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
  -- 368.4us pass --
5112: [TX_DS] W_REGISTER: STATUS = 70 
5113: W_REGISTER: CONFIG = 0F 
5114: FLUSH_TX
5115: FLUSH_RX
5116: W_REGISTER: STATUS = 70 
5117: R_REGISTER: FIFO_STATUS is 11 
5118: W_REGISTER: STATUS = 70 
  -- 2.8ms pass --
5119: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5120: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: D8 FF 00 80 10 00 E0 FF 46 49 46 4A 00 01 01 00 01 00 01 00 DB FF 00 00 09 00 43 00 07 0D 07 06 
5121: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5122: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5123: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.0us pass --
5124: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5125: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 07 06 00 01 1C 0F 0C 09 06 09 0C 15 1E 0C 09 06 22 30 2B 1C 0A 0C 19 21 19 0C 07 09 31 1C 24 1F 
5126: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5127: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5128: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.3us pass --
5129: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5130: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 39 3D 00 02 1E 2E 1C 34 1C 13 15 12 33 34 28 27 21 37 34 3C 1F 28 22 19 2B 27 33 2E FF 31 34 39 
5131: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5132: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5133: [RX_DR] W_REGISTER: STATUS = 70 
  -- 310.5us pass --
5134: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5135: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 00 DB 01 80 09 09 01 43 09 18 31 0D 31 31 31 0C 21 31 31 31 31 1C 0C 0A 31 31 31 31 31 31 31 31 
5136: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5137: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5138: [RX_DR] W_REGISTER: STATUS = 70 
  -- 328.1us pass --
5139: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5140: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 18 21 01 01 31 31 31 0D 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 
5141: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5142: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5143: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.3us pass --
5144: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5145: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 31 31 01 02 31 31 31 31 C4 FF 31 31 00 00 1F 00 01 01 05 01 01 01 01 01 00 00 00 00 00 00 00 00 
5146: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5147: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5148: [RX_DR] W_REGISTER: STATUS = 70 
  -- 314.6us pass --
5149: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5150: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 02 01 02 80 06 05 04 03 0A 09 08 07 00 C4 FF 0B 02 00 10 B5 02 03 03 01 05 05 03 04 00 00 04 04 
5151: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5152: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5153: [RX_DR] W_REGISTER: STATUS = 70 
  -- 332.2us pass --
5154: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5155: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 7D 01 02 01 00 03 02 01 12 05 11 04 06 41 31 21 07 61 51 13 32 14 71 22 08 A1 91 81 C1 B1 42 23 
5156: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5157: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5158: [RX_DR] W_REGISTER: STATUS = 70 
  -- 331.7us pass --
5159: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5160: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 52 15 02 02 33 24 F0 D1 09 82 72 62 18 17 16 0A 26 25 1A 19 2A 29 28 27 37 36 35 34 43 3A 39 38 
5161: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5162: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5163: [RX_DR] W_REGISTER: STATUS = 70 
  -- 2.3ms pass --
5164: [RX_DR] R_REGISTER: FIFO_STATUS is 10 
5165: [RX_DR] R_RX_PAYLOAD (32 bytes)
	DATA: 45 44 03 80 49 48 47 46 55 54 53 4A 59 58 57 56 65 64 63 5A 69 68 67 66 75 74 73 6A 79 78 77 76 
5166: [RX_DR] R_REGISTER: FIFO_STATUS is 11 
5167: [RX_DR] R_REGISTER: FIFO_STATUS is 11