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@debreuil
Created February 27, 2011 05:57
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VHDL Papilio LED animation - pattern, speed, direction
-- File: Blink.VHD -------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity Blink is
Port (
PB : in STD_LOGIC_VECTOR(7 downto 0);
LED : inout BIT_VECTOR(7 downto 0);
clk : in STD_LOGIC
);
end Blink;
architecture Behavioral of Blink is
signal counter : STD_LOGIC_VECTOR(20 downto 0) := (others => '0');
signal ticks : STD_LOGIC_VECTOR(1 downto 0) := (others => '0');
signal dir : BIT := '0';
signal fast : BIT := '0';
constant speed: INTEGER := 19;
begin
process(clk, PB)
begin
if (clk'event and clk = '1') then
counter <= counter + 1;
end if;
if (rising_edge(counter(speed))) then
if(fast = '1') then ticks <= ticks + 2;
else ticks <= ticks + 1;
end if;
end if;
if (PB(0) = '1') then LED <= "00000001";
elsif (PB(2) = '1') then LED <= "00001111";
elsif (PB(4) = '1') then LED <= "01111111";
elsif (PB(6) = '1') then LED <= "11001100";
elsif (PB(1) = '1') then dir <= '0';
elsif (PB(7) = '1') then dir <= '1';
elsif (PB(3) = '1') then fast <= '0';
elsif (PB(5) = '1') then fast <= '1';
elsif rising_edge(ticks(1)) then
if(dir = '0') then LED <= LED ror 1;
else LED <= LED rol 1;
end if;
end if;
end process;
end Behavioral;
##################
## UCF file ##
##################
NET "clk" LOC = "P89" | IOSTANDARD = LVCMOS25 | PERIOD = 31.25ns ;
# Wing2 Column C
NET "LED<7>" LOC = "P91" ;
NET "LED<6>" LOC = "P94" ;
NET "LED<5>" LOC = "P98" ;
NET "LED<4>" LOC = "P3" ;
NET "LED<3>" LOC = "P5" ;
NET "LED<2>" LOC = "P10" ;
NET "LED<1>" LOC = "P12" ;
NET "LED<0>" LOC = "P16" ;
NET "PB<7>" LOC = "P92" ;
NET "PB<6>" LOC = "P95" ;
NET "PB<5>" LOC = "P2" ;
NET "PB<4>" LOC = "P4" ;
NET "PB<3>" LOC = "P9" ;
NET "PB<2>" LOC = "P11" ;
NET "PB<1>" LOC = "P15" ;
NET "PB<0>" LOC = "P17" ;
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