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Created December 24, 2018 02:30
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[ 0%] Built target LLVMDemangle
[ 0%] Built target LLVMTableGen
[ 33%] Built target obj.llvm-tblgen
[100%] Built target LLVMSupport
[100%] Built target llvm-tblgen
[100%] Building Attributes.inc...
[100%] Building IntrinsicEnums.inc...
[100%] Building IntrinsicImpl.inc...
[100%] Built target intrinsics_gen
[100%] Building AlphaGenRegisterInfo.inc...
[100%] Building AlphaGenDAGISel.inc...
[100%] Building AlphaGenSubtargetInfo.inc...
[100%] Building AlphaGenInstrInfo.inc...
[100%] Building AlphaGenCallingConv.inc...
[100%] Building AlphaGenAsmWriter.inc...
[100%] Built target AlphaCommonTableGen
[100%] Building CXX object lib/Target/Alpha/MCTargetDesc/CMakeFiles/LLVMAlphaDesc.dir/AlphaMCTargetDesc.cpp.o
[100%] Built target LLVMAlphaInfo
[100%] Building CXX object lib/Target/Alpha/CMakeFiles/LLVMAlphaCodeGen.dir/AlphaAsmPrinter.cpp.o
[100%] Building CXX object lib/Target/Alpha/CMakeFiles/LLVMAlphaCodeGen.dir/AlphaBranchSelector.cpp.o
[100%] Building CXX object lib/Target/Alpha/CMakeFiles/LLVMAlphaCodeGen.dir/AlphaISelDAGToDAG.cpp.o
[100%] Building CXX object lib/Target/Alpha/CMakeFiles/LLVMAlphaCodeGen.dir/AlphaISelLowering.cpp.o
[100%] Building CXX object lib/Target/Alpha/CMakeFiles/LLVMAlphaCodeGen.dir/AlphaInstrInfo.cpp.o
[100%] Building CXX object lib/Target/Alpha/CMakeFiles/LLVMAlphaCodeGen.dir/AlphaFrameLowering.cpp.o
[100%] Building CXX object lib/Target/Alpha/CMakeFiles/LLVMAlphaCodeGen.dir/AlphaLLRP.cpp.o
[100%] Building CXX object lib/Target/Alpha/CMakeFiles/LLVMAlphaCodeGen.dir/AlphaRegisterInfo.cpp.o
[100%] Building CXX object lib/Target/Alpha/CMakeFiles/LLVMAlphaCodeGen.dir/AlphaSubtarget.cpp.o
[100%] Building CXX object lib/Target/Alpha/CMakeFiles/LLVMAlphaCodeGen.dir/AlphaTargetMachine.cpp.o
[100%] Building CXX object lib/Target/Alpha/CMakeFiles/LLVMAlphaCodeGen.dir/AlphaSelectionDAGInfo.cpp.o
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp: In function ‘llvm::MCSubtargetInfo* createAlphaMCSubtargetInfo(llvm::StringRef, llvm::StringRef, llvm::StringRef)’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp:47:44: error: use of deleted function ‘llvm::MCSubtargetInfo::MCSubtargetInfo()’
MCSubtargetInfo *X = new MCSubtargetInfo();
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp:18:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/MC/MCSubtargetInfo.h:63:3: note: declared here
MCSubtargetInfo() = delete;
^~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp:48:3: error: ‘InitAlphaMCSubtargetInfo’ was not declared in this scope
InitAlphaMCSubtargetInfo(X, TT, CPU, FS);
^~~~~~~~~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp:48:3: note: suggested alternative: ‘createAlphaMCSubtargetInfo’
InitAlphaMCSubtargetInfo(X, TT, CPU, FS);
^~~~~~~~~~~~~~~~~~~~~~~~
createAlphaMCSubtargetInfo
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp: At global scope:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp:52:8: error: ‘MCCodeGenInfo’ does not name a type
static MCCodeGenInfo *createAlphaMCCodeGenInfo(StringRef TT, Reloc::Model RM,
^~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp: In function ‘void LLVMInitializeAlphaTargetMC()’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp:65:19: error: ‘RegisterMCCodeGenInfo’ is not a member of ‘llvm::TargetRegistry’
TargetRegistry::RegisterMCCodeGenInfo(TheAlphaTarget,
^~~~~~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp:66:41: error: ‘createAlphaMCCodeGenInfo’ was not declared in this scope
createAlphaMCCodeGenInfo);
^~~~~~~~~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp:66:41: note: suggested alternative: ‘createAlphaMCRegisterInfo’
createAlphaMCCodeGenInfo);
^~~~~~~~~~~~~~~~~~~~~~~~
createAlphaMCRegisterInfo
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp:72:53: error: invalid conversion from ‘llvm::MCRegisterInfo* (*)(llvm::StringRef)’ to ‘llvm::Target::MCRegInfoCtorFnTy’ {aka ‘llvm::MCRegisterInfo* (*)(const llvm::Triple&)’} [-fpermissive]
TargetRegistry::RegisterMCRegInfo(TheAlphaTarget, createAlphaMCRegisterInfo);
^~~~~~~~~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp:19:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Support/TargetRegistry.h:729:70: note: initializing argument 2 of ‘static void llvm::TargetRegistry::RegisterMCRegInfo(llvm::Target&, llvm::Target::MCRegInfoCtorFnTy)’
static void RegisterMCRegInfo(Target &T, Target::MCRegInfoCtorFnTy Fn) {
~~~~~~~~~~~~~~~~~~~~~~~~~~^~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp:76:43: error: invalid conversion from ‘llvm::MCSubtargetInfo* (*)(llvm::StringRef, llvm::StringRef, llvm::StringRef)’ to ‘llvm::Target::MCSubtargetInfoCtorFnTy’ {aka ‘llvm::MCSubtargetInfo* (*)(const llvm::Triple&, llvm::StringRef, llvm::StringRef)’} [-fpermissive]
createAlphaMCSubtargetInfo);
^~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp:19:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Support/TargetRegistry.h:743:71: note: initializing argument 2 of ‘static void llvm::TargetRegistry::RegisterMCSubtargetInfo(llvm::Target&, llvm::Target::MCSubtargetInfoCtorFnTy)’
Target::MCSubtargetInfoCtorFnTy Fn) {
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~
In file included from /home/dfyz/llvm/build/lib/Target/Alpha/AlphaGenSubtargetInfo.inc:222,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaSubtarget.cpp:19:
/home/dfyz/llvm/build/lib/Target/Alpha/AlphaGenSubtargetInfo.inc: In member function ‘void llvm::AlphaSubtarget::ParseSubtargetFeatures(llvm::StringRef, llvm::StringRef)’:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Support/Debug.h:123:39: error: ‘DEBUG_TYPE’ was not declared in this scope
#define LLVM_DEBUG(X) DEBUG_WITH_TYPE(DEBUG_TYPE, X)
^~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Support/Debug.h:66:60: note: in definition of macro ‘DEBUG_WITH_TYPE’
do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType(TYPE)) { X; } \
^~~~
/home/dfyz/llvm/build/lib/Target/Alpha/AlphaGenSubtargetInfo.inc:228:3: note: in expansion of macro ‘LLVM_DEBUG’
LLVM_DEBUG(dbgs() << "\nFeatures:" << FS);
^~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Support/Debug.h:123:39: note: suggested alternative: ‘DEBUG_WITH_TYPE’
#define LLVM_DEBUG(X) DEBUG_WITH_TYPE(DEBUG_TYPE, X)
^~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Support/Debug.h:66:60: note: in definition of macro ‘DEBUG_WITH_TYPE’
do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType(TYPE)) { X; } \
^~~~
/home/dfyz/llvm/build/lib/Target/Alpha/AlphaGenSubtargetInfo.inc:228:3: note: in expansion of macro ‘LLVM_DEBUG’
LLVM_DEBUG(dbgs() << "\nFeatures:" << FS);
^~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Support/Debug.h:123:39: error: ‘DEBUG_TYPE’ was not declared in this scope
#define LLVM_DEBUG(X) DEBUG_WITH_TYPE(DEBUG_TYPE, X)
^~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Support/Debug.h:66:60: note: in definition of macro ‘DEBUG_WITH_TYPE’
do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType(TYPE)) { X; } \
^~~~
/home/dfyz/llvm/build/lib/Target/Alpha/AlphaGenSubtargetInfo.inc:229:3: note: in expansion of macro ‘LLVM_DEBUG’
LLVM_DEBUG(dbgs() << "\nCPU:" << CPU << "\n\n");
^~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Support/Debug.h:123:39: note: suggested alternative: ‘DEBUG_WITH_TYPE’
#define LLVM_DEBUG(X) DEBUG_WITH_TYPE(DEBUG_TYPE, X)
^~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Support/Debug.h:66:60: note: in definition of macro ‘DEBUG_WITH_TYPE’
do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType(TYPE)) { X; } \
^~~~
/home/dfyz/llvm/build/lib/Target/Alpha/AlphaGenSubtargetInfo.inc:229:3: note: in expansion of macro ‘LLVM_DEBUG’
LLVM_DEBUG(dbgs() << "\nCPU:" << CPU << "\n\n");
^~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaSubtarget.cpp: In constructor ‘llvm::AlphaSubtarget::AlphaSubtarget(const string&, const string&, const string&)’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaSubtarget.cpp:25:52: error: no matching function for call to ‘llvm::AlphaGenSubtargetInfo::AlphaGenSubtargetInfo(const string&, const string&, const string&)’
: AlphaGenSubtargetInfo(TT, CPU, FS), HasCT(false) {
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaSubtarget.cpp:19:
/home/dfyz/llvm/build/lib/Target/Alpha/AlphaGenSubtargetInfo.inc:273:1: note: candidate: ‘llvm::AlphaGenSubtargetInfo::AlphaGenSubtargetInfo(const llvm::Triple&, llvm::StringRef, llvm::StringRef)’
AlphaGenSubtargetInfo::AlphaGenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
^~~~~~~~~~~~~~~~~~~~~
/home/dfyz/llvm/build/lib/Target/Alpha/AlphaGenSubtargetInfo.inc:273:1: note: no known conversion for argument 1 from ‘const string’ {aka ‘const std::__cxx11::basic_string<char>’} to ‘const llvm::Triple&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Support/TargetRegistry.h: In instantiation of ‘static llvm::MCAsmInfo* llvm::RegisterMCAsmInfo<MCAsmInfoImpl>::Allocator(const llvm::MCRegisterInfo&, const llvm::Triple&) [with MCAsmInfoImpl = llvm::AlphaMCAsmInfo]’:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Support/TargetRegistry.h:939:42: required from ‘llvm::RegisterMCAsmInfo<MCAsmInfoImpl>::RegisterMCAsmInfo(llvm::Target&) [with MCAsmInfoImpl = llvm::AlphaMCAsmInfo]’
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp:62:53: required from here
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Support/TargetRegistry.h:945:12: error: no matching function for call to ‘llvm::AlphaMCAsmInfo::AlphaMCAsmInfo(const llvm::Triple&)’
return new MCAsmInfoImpl(TT);
^~~~~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCAsmInfo.h:24:14: note: candidate: ‘llvm::AlphaMCAsmInfo::AlphaMCAsmInfo(const llvm::Target&, llvm::StringRef)’
explicit AlphaMCAsmInfo(const Target &T, StringRef TT);
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCAsmInfo.h:24:14: note: candidate expects 2 arguments, 1 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCAsmInfo.h:23:10: note: candidate: ‘llvm::AlphaMCAsmInfo::AlphaMCAsmInfo(const llvm::AlphaMCAsmInfo&)’
struct AlphaMCAsmInfo : public MCAsmInfo {
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCAsmInfo.h:23:10: note: no known conversion for argument 1 from ‘const llvm::Triple’ to ‘const llvm::AlphaMCAsmInfo&’
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCAsmInfo.h:23:10: note: candidate: ‘llvm::AlphaMCAsmInfo::AlphaMCAsmInfo(llvm::AlphaMCAsmInfo&&)’
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/MCTargetDesc/AlphaMCAsmInfo.h:23:10: note: no known conversion for argument 1 from ‘const llvm::Triple’ to ‘llvm::AlphaMCAsmInfo&&’
make[2]: *** [lib/Target/Alpha/CMakeFiles/LLVMAlphaCodeGen.dir/build.make:167: lib/Target/Alpha/CMakeFiles/LLVMAlphaCodeGen.dir/AlphaSubtarget.cpp.o] Error 1
make[2]: *** Waiting for unfinished jobs....
make[2]: *** [lib/Target/Alpha/MCTargetDesc/CMakeFiles/LLVMAlphaDesc.dir/build.make:63: lib/Target/Alpha/MCTargetDesc/CMakeFiles/LLVMAlphaDesc.dir/AlphaMCTargetDesc.cpp.o] Error 1
make[1]: *** [CMakeFiles/Makefile2:7358: lib/Target/Alpha/MCTargetDesc/CMakeFiles/LLVMAlphaDesc.dir/all] Error 2
make[1]: *** Waiting for unfinished jobs....
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:33:19: error: conflicting return type specified for ‘virtual const unsigned int* llvm::AlphaRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h:462:3: note: overridden function is ‘virtual const MCPhysReg* llvm::TargetRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
getCalleeSavedRegs(const MachineFunction *MF) const = 0;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaBranchSelector.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:33:19: error: conflicting return type specified for ‘virtual const unsigned int* llvm::AlphaRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h:31,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/LiveRegUnits.h:19,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:21,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaBranchSelector.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h:462:3: note: overridden function is ‘virtual const MCPhysReg* llvm::TargetRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
getCalleeSavedRegs(const MachineFunction *MF) const = 0;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaBranchSelector.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:26:27: error: cannot declare field ‘llvm::AlphaInstrInfo::RI’ to be of abstract type ‘llvm::AlphaRegisterInfo’
const AlphaRegisterInfo RI;
^~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaBranchSelector.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:27:8: note: because the following virtual functions are pure within ‘llvm::AlphaRegisterInfo’:
struct AlphaRegisterInfo : public AlphaGenRegisterInfo {
^~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h:31,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/LiveRegUnits.h:19,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:21,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaBranchSelector.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h:956:16: note: ‘virtual void llvm::TargetRegisterInfo::eliminateFrameIndex(llvm::MachineBasicBlock::iterator, int, unsigned int, llvm::RegScavenger*) const’
virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI,
^~~~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaBranchSelector.cpp:29:25: error: conflicting return type specified for ‘virtual const char* {anonymous}::AlphaBSel::getPassName() const’
virtual const char *getPassName() const {
^~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/IR/DataLayout.h:29,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/Target/TargetMachine.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/Alpha.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaBranchSelector.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Pass.h:97:21: note: overridden function is ‘virtual llvm::StringRef llvm::Pass::getPassName() const’
virtual StringRef getPassName() const;
^~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaBranchSelector.cpp: In member function ‘virtual bool {anonymous}::AlphaBSel::runOnMachineFunction(llvm::MachineFunction&)’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaBranchSelector.cpp:47:30: error: cannot convert ‘llvm::MachineFunction::iterator’ {aka ‘llvm::ilist_iterator<llvm::ilist_detail::node_options<llvm::MachineBasicBlock, true, false, void>, false, false>’} to ‘llvm::MachineBasicBlock*’ in initialization
MachineBasicBlock *MBB = MFI;
^~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaBranchSelector.cpp:58:53: error: ‘const class llvm::LLVMTargetMachine’ has no member named ‘getInstrInfo’; did you mean ‘getMCInstrInfo’?
const TargetInstrInfo *TII = Fn.getTarget().getInstrInfo();
^~~~~~~~~~~~
getMCInstrInfo
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:17:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:33:19: error: conflicting return type specified for ‘virtual const unsigned int* llvm::AlphaRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h:31,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/LiveRegUnits.h:19,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:21,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:17:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h:462:3: note: overridden function is ‘virtual const MCPhysReg* llvm::TargetRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
getCalleeSavedRegs(const MachineFunction *MF) const = 0;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:17:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:26:27: error: cannot declare field ‘llvm::AlphaInstrInfo::RI’ to be of abstract type ‘llvm::AlphaRegisterInfo’
const AlphaRegisterInfo RI;
^~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:17:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:27:8: note: because the following virtual functions are pure within ‘llvm::AlphaRegisterInfo’:
struct AlphaRegisterInfo : public AlphaGenRegisterInfo {
^~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h:31,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/LiveRegUnits.h:19,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:21,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:17:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h:956:16: note: ‘virtual void llvm::TargetRegisterInfo::eliminateFrameIndex(llvm::MachineBasicBlock::iterator, int, unsigned int, llvm::RegScavenger*) const’
virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI,
^~~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:33:19: error: conflicting return type specified for ‘virtual const unsigned int* llvm::AlphaRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h:31,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/LiveRegUnits.h:19,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:21,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h:462:3: note: overridden function is ‘virtual const MCPhysReg* llvm::TargetRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
getCalleeSavedRegs(const MachineFunction *MF) const = 0;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:26:27: error: cannot declare field ‘llvm::AlphaInstrInfo::RI’ to be of abstract type ‘llvm::AlphaRegisterInfo’
const AlphaRegisterInfo RI;
^~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:27:8: note: because the following virtual functions are pure within ‘llvm::AlphaRegisterInfo’:
struct AlphaRegisterInfo : public AlphaGenRegisterInfo {
^~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h:31,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/LiveRegUnits.h:19,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:21,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h:956:16: note: ‘virtual void llvm::TargetRegisterInfo::eliminateFrameIndex(llvm::MachineBasicBlock::iterator, int, unsigned int, llvm::RegScavenger*) const’
virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI,
^~~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:33:19: error: conflicting return type specified for ‘virtual const unsigned int* llvm::AlphaRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h:31,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/LiveRegUnits.h:19,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:21,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h:462:3: note: overridden function is ‘virtual const MCPhysReg* llvm::TargetRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
getCalleeSavedRegs(const MachineFunction *MF) const = 0;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:26:27: error: cannot declare field ‘llvm::AlphaInstrInfo::RI’ to be of abstract type ‘llvm::AlphaRegisterInfo’
const AlphaRegisterInfo RI;
^~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:27:8: note: because the following virtual functions are pure within ‘llvm::AlphaRegisterInfo’:
struct AlphaRegisterInfo : public AlphaGenRegisterInfo {
^~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h:31,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/LiveRegUnits.h:19,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:21,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h:956:16: note: ‘virtual void llvm::TargetRegisterInfo::eliminateFrameIndex(llvm::MachineBasicBlock::iterator, int, unsigned int, llvm::RegScavenger*) const’
virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI,
^~~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:33:19: error: conflicting return type specified for ‘virtual const unsigned int* llvm::AlphaRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h:31,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/LiveRegUnits.h:19,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:21,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h:462:3: note: overridden function is ‘virtual const MCPhysReg* llvm::TargetRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
getCalleeSavedRegs(const MachineFunction *MF) const = 0;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:26:27: error: cannot declare field ‘llvm::AlphaInstrInfo::RI’ to be of abstract type ‘llvm::AlphaRegisterInfo’
const AlphaRegisterInfo RI;
^~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:27:8: note: because the following virtual functions are pure within ‘llvm::AlphaRegisterInfo’:
struct AlphaRegisterInfo : public AlphaGenRegisterInfo {
^~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h:31,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/LiveRegUnits.h:19,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:21,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h:956:16: note: ‘virtual void llvm::TargetRegisterInfo::eliminateFrameIndex(llvm::MachineBasicBlock::iterator, int, unsigned int, llvm::RegScavenger*) const’
virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI,
^~~~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaLLRP.cpp:44:25: error: conflicting return type specified for ‘virtual const char* {anonymous}::AlphaLLRPPass::getPassName() const’
virtual const char *getPassName() const {
^~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/IR/DataLayout.h:29,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/Target/TargetMachine.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/Alpha.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaLLRP.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Pass.h:97:21: note: overridden function is ‘virtual llvm::StringRef llvm::Pass::getPassName() const’
virtual StringRef getPassName() const;
^~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaLLRP.cpp: In member function ‘virtual bool {anonymous}::AlphaLLRPPass::runOnMachineFunction(llvm::MachineFunction&)’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaLLRP.cpp:49:50: error: ‘const class llvm::LLVMTargetMachine’ has no member named ‘getInstrInfo’; did you mean ‘getMCInstrInfo’?
const TargetInstrInfo *TII = F.getTarget().getInstrInfo();
^~~~~~~~~~~~
getMCInstrInfo
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaLLRP.cpp:62:31: error: cannot convert ‘llvm::MachineInstrBundleIterator<llvm::MachineInstr>’ to ‘llvm::MachineInstr*’ in initialization
MachineInstr *MI = I++;
^~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp: In member function ‘virtual void llvm::AlphaInstrInfo::storeRegToStackSlot(llvm::MachineBasicBlock&, llvm::MachineBasicBlock::iterator, unsigned int, bool, int, const llvm::TargetRegisterClass*, const llvm::TargetRegisterInfo*) const’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:155:20: error: ‘F4RCRegisterClass’ is not a member of ‘llvm::Alpha’
if (RC == Alpha::F4RCRegisterClass)
^~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:155:20: note: suggested alternative: ‘F4RCRegClass’
if (RC == Alpha::F4RCRegisterClass)
^~~~~~~~~~~~~~~~~
F4RCRegClass
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:159:25: error: ‘F8RCRegisterClass’ is not a member of ‘llvm::Alpha’
else if (RC == Alpha::F8RCRegisterClass)
^~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:159:25: note: suggested alternative: ‘F8RCRegClass’
else if (RC == Alpha::F8RCRegisterClass)
^~~~~~~~~~~~~~~~~
F8RCRegClass
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:163:25: error: ‘GPRCRegisterClass’ is not a member of ‘llvm::Alpha’
else if (RC == Alpha::GPRCRegisterClass)
^~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:163:25: note: suggested alternative: ‘GPRCRegClass’
else if (RC == Alpha::GPRCRegisterClass)
^~~~~~~~~~~~~~~~~
GPRCRegClass
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaSelectionDAGInfo.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:33:19: error: conflicting return type specified for ‘virtual const unsigned int* llvm::AlphaRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h:31,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/LiveRegUnits.h:19,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:21,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaSelectionDAGInfo.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h:462:3: note: overridden function is ‘virtual const MCPhysReg* llvm::TargetRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
getCalleeSavedRegs(const MachineFunction *MF) const = 0;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:33:19: error: conflicting return type specified for ‘virtual const unsigned int* llvm::AlphaRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h:31,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/LiveRegUnits.h:19,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:21,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h:462:3: note: overridden function is ‘virtual const MCPhysReg* llvm::TargetRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
getCalleeSavedRegs(const MachineFunction *MF) const = 0;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaSelectionDAGInfo.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:26:27: error: cannot declare field ‘llvm::AlphaInstrInfo::RI’ to be of abstract type ‘llvm::AlphaRegisterInfo’
const AlphaRegisterInfo RI;
^~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaSelectionDAGInfo.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:27:8: note: because the following virtual functions are pure within ‘llvm::AlphaRegisterInfo’:
struct AlphaRegisterInfo : public AlphaGenRegisterInfo {
^~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h:31,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/LiveRegUnits.h:19,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:21,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaSelectionDAGInfo.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h:956:16: note: ‘virtual void llvm::TargetRegisterInfo::eliminateFrameIndex(llvm::MachineBasicBlock::iterator, int, unsigned int, llvm::RegScavenger*) const’
virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI,
^~~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:26:27: error: cannot declare field ‘llvm::AlphaInstrInfo::RI’ to be of abstract type ‘llvm::AlphaRegisterInfo’
const AlphaRegisterInfo RI;
^~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:27:8: note: because the following virtual functions are pure within ‘llvm::AlphaRegisterInfo’:
struct AlphaRegisterInfo : public AlphaGenRegisterInfo {
^~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h:31,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/LiveRegUnits.h:19,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:21,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h:956:16: note: ‘virtual void llvm::TargetRegisterInfo::eliminateFrameIndex(llvm::MachineBasicBlock::iterator, int, unsigned int, llvm::RegScavenger*) const’
virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI,
^~~~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp: In member function ‘virtual bool llvm::AlphaFrameLowering::hasFP(const llvm::MachineFunction&) const’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp:42:49: error: cannot convert ‘const llvm::MachineFrameInfo’ to ‘const llvm::MachineFrameInfo*’ in initialization
const MachineFrameInfo *MFI = MF.getFrameInfo();
^
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp: In member function ‘void llvm::AlphaFrameLowering::emitPrologue(llvm::MachineFunction&) const’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp:49:43: error: cannot convert ‘llvm::MachineFrameInfo’ to ‘llvm::MachineFrameInfo*’ in initialization
MachineFrameInfo *MFI = MF.getFrameInfo();
^
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp:50:48: error: ‘const class llvm::LLVMTargetMachine’ has no member named ‘getInstrInfo’; did you mean ‘getMCInstrInfo’?
const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
^~~~~~~~~~~~
getMCInstrInfo
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp:57:39: error: no matching function for call to ‘llvm::MachineInstrBuilder::addGlobalAddress(const llvm::Function&)’
.addGlobalAddress(MF.getFunction()).addReg(Alpha::R27).addImm(++curgpdist);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp:19:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineInstrBuilder.h:164:30: note: candidate: ‘const llvm::MachineInstrBuilder& llvm::MachineInstrBuilder::addGlobalAddress(const llvm::GlobalValue*, int64_t, unsigned char) const’
const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV,
^~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineInstrBuilder.h:164:30: note: no known conversion for argument 1 from ‘const llvm::Function’ to ‘const llvm::GlobalValue*’
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp:59:39: error: no matching function for call to ‘llvm::MachineInstrBuilder::addGlobalAddress(const llvm::Function&)’
.addGlobalAddress(MF.getFunction()).addReg(Alpha::R29).addImm(curgpdist);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp:19:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineInstrBuilder.h:164:30: note: candidate: ‘const llvm::MachineInstrBuilder& llvm::MachineInstrBuilder::addGlobalAddress(const llvm::GlobalValue*, int64_t, unsigned char) const’
const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV,
^~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineInstrBuilder.h:164:30: note: no known conversion for argument 1 from ‘const llvm::Function’ to ‘const llvm::GlobalValue*’
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp:62:39: error: no matching function for call to ‘llvm::MachineInstrBuilder::addGlobalAddress(const llvm::Function&)’
.addGlobalAddress(MF.getFunction());
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp:19:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineInstrBuilder.h:164:30: note: candidate: ‘const llvm::MachineInstrBuilder& llvm::MachineInstrBuilder::addGlobalAddress(const llvm::GlobalValue*, int64_t, unsigned char) const’
const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV,
^~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/MachineInstrBuilder.h:164:30: note: no known conversion for argument 1 from ‘const llvm::Function’ to ‘const llvm::GlobalValue*’
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp: In member function ‘virtual void llvm::AlphaFrameLowering::emitEpilogue(llvm::MachineFunction&, llvm::MachineBasicBlock&) const’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp:106:49: error: cannot convert ‘llvm::MachineFrameInfo’ to ‘const llvm::MachineFrameInfo*’ in initialization
const MachineFrameInfo *MFI = MF.getFrameInfo();
^
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.cpp:108:48: error: ‘const class llvm::LLVMTargetMachine’ has no member named ‘getInstrInfo’; did you mean ‘getMCInstrInfo’?
const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
^~~~~~~~~~~~
getMCInstrInfo
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp: In member function ‘virtual void llvm::AlphaInstrInfo::loadRegFromStackSlot(llvm::MachineBasicBlock&, llvm::MachineBasicBlock::iterator, unsigned int, int, const llvm::TargetRegisterClass*, const llvm::TargetRegisterInfo*) const’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:182:20: error: ‘F4RCRegisterClass’ is not a member of ‘llvm::Alpha’
if (RC == Alpha::F4RCRegisterClass)
^~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:182:20: note: suggested alternative: ‘F4RCRegClass’
if (RC == Alpha::F4RCRegisterClass)
^~~~~~~~~~~~~~~~~
F4RCRegClass
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:185:25: error: ‘F8RCRegisterClass’ is not a member of ‘llvm::Alpha’
else if (RC == Alpha::F8RCRegisterClass)
^~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:185:25: note: suggested alternative: ‘F8RCRegClass’
else if (RC == Alpha::F8RCRegisterClass)
^~~~~~~~~~~~~~~~~
F8RCRegClass
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:188:25: error: ‘GPRCRegisterClass’ is not a member of ‘llvm::Alpha’
else if (RC == Alpha::GPRCRegisterClass)
^~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:188:25: note: suggested alternative: ‘GPRCRegClass’
else if (RC == Alpha::GPRCRegisterClass)
^~~~~~~~~~~~~~~~~
GPRCRegClass
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp: In member function ‘bool llvm::AlphaInstrInfo::AnalyzeBranch(llvm::MachineBasicBlock&, llvm::MachineBasicBlock*&, llvm::MachineBasicBlock*&, llvm::SmallVectorImpl<llvm::MachineOperand>&, bool) const’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:232:34: error: no matching function for call to ‘llvm::AlphaInstrInfo::isUnpredicatedTerminator(llvm::MachineBasicBlock::iterator&) const’
if (!isUnpredicatedTerminator(I))
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:1195:16: note: candidate: ‘virtual bool llvm::TargetInstrInfo::isUnpredicatedTerminator(const llvm::MachineInstr&) const’
virtual bool isUnpredicatedTerminator(const MachineInstr &MI) const;
^~~~~~~~~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:1195:16: note: no known conversion for argument 1 from ‘llvm::MachineBasicBlock::iterator’ {aka ‘llvm::MachineInstrBundleIterator<llvm::MachineInstr>’} to ‘const llvm::MachineInstr&’
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:236:28: error: cannot convert ‘llvm::MachineBasicBlock::iterator’ {aka ‘llvm::MachineInstrBundleIterator<llvm::MachineInstr>’} to ‘llvm::MachineInstr*’ in initialization
MachineInstr *LastInst = I;
^
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:239:56: error: no matching function for call to ‘llvm::AlphaInstrInfo::isUnpredicatedTerminator(llvm::MachineInstrBundleIterator<llvm::MachineInstr>&) const’
if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:1195:16: note: candidate: ‘virtual bool llvm::TargetInstrInfo::isUnpredicatedTerminator(const llvm::MachineInstr&) const’
virtual bool isUnpredicatedTerminator(const MachineInstr &MI) const;
^~~~~~~~~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:1195:16: note: no known conversion for argument 1 from ‘llvm::MachineInstrBundleIterator<llvm::MachineInstr>’ to ‘const llvm::MachineInstr&’
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:256:34: error: cannot convert ‘llvm::MachineBasicBlock::iterator’ {aka ‘llvm::MachineInstrBundleIterator<llvm::MachineInstr>’} to ‘llvm::MachineInstr*’ in initialization
MachineInstr *SecondLastInst = I;
^
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:260:35: error: no matching function for call to ‘llvm::AlphaInstrInfo::isUnpredicatedTerminator(llvm::MachineInstrBundleIterator<llvm::MachineInstr>&) const’
isUnpredicatedTerminator(--I))
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:1195:16: note: candidate: ‘virtual bool llvm::TargetInstrInfo::isUnpredicatedTerminator(const llvm::MachineInstr&) const’
virtual bool isUnpredicatedTerminator(const MachineInstr &MI) const;
^~~~~~~~~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetInstrInfo.h:1195:16: note: no known conversion for argument 1 from ‘llvm::MachineInstrBundleIterator<llvm::MachineInstr>’ to ‘const llvm::MachineInstr&’
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp: In member function ‘unsigned int llvm::AlphaInstrInfo::getGlobalBaseReg(llvm::MachineFunction*) const’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:348:48: error: ‘const class llvm::LLVMTargetMachine’ has no member named ‘getInstrInfo’; did you mean ‘getMCInstrInfo’?
const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
^~~~~~~~~~~~
getMCInstrInfo
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp: In member function ‘unsigned int llvm::AlphaInstrInfo::getGlobalRetAddr(llvm::MachineFunction*) const’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:373:48: error: ‘const class llvm::LLVMTargetMachine’ has no member named ‘getInstrInfo’; did you mean ‘getMCInstrInfo’?
const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
^~~~~~~~~~~~
getMCInstrInfo
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:37:
/home/dfyz/llvm/build/lib/Target/Alpha/AlphaGenRegisterInfo.inc: In static member function ‘static const llvm::AlphaFrameLowering* llvm::AlphaGenRegisterInfo::getFrameLowering(const llvm::MachineFunction&)’:
/home/dfyz/llvm/build/lib/Target/Alpha/AlphaGenRegisterInfo.inc:1135:43: error: invalid static_cast from type ‘const llvm::TargetFrameLowering*’ to type ‘const llvm::AlphaFrameLowering*’
MF.getSubtarget().getFrameLowering());
^
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp: In member function ‘void llvm::AlphaRegisterInfo::eliminateCallFramePseudoInstr(llvm::MachineFunction&, llvm::MachineBasicBlock&, llvm::MachineBasicBlock::iterator) const’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:87:51: error: ‘const class llvm::LLVMTargetMachine’ has no member named ‘getFrameLowering’; did you mean ‘getObjFileLowering’?
const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
^~~~~~~~~~~~~~~~
getObjFileLowering
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:93:25: error: cannot convert ‘llvm::MachineBasicBlock::iterator’ {aka ‘llvm::MachineInstrBundleIterator<llvm::MachineInstr>’} to ‘llvm::MachineInstr*’ in initialization
MachineInstr *Old = I;
^
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp: In member function ‘void llvm::AlphaRegisterInfo::eliminateFrameIndex(llvm::MachineBasicBlock::iterator, int, llvm::RegScavenger*) const’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:137:51: error: ‘const class llvm::LLVMTargetMachine’ has no member named ‘getFrameLowering’; did you mean ‘getObjFileLowering’?
const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
^~~~~~~~~~~~~~~~
getObjFileLowering
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:152:33: error: base operand of ‘->’ has non-pointer type ‘llvm::MachineFrameInfo’
int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
^~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:154:3: error: ‘DEBUG’ was not declared in this scope
DEBUG(errs() << "FI: " << FrameIndex << " Offset: " << Offset << "\n");
^~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:156:30: error: base operand of ‘->’ has non-pointer type ‘llvm::MachineFrameInfo’
Offset += MF.getFrameInfo()->getStackSize();
^~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:159:51: error: base operand of ‘->’ has non-pointer type ‘llvm::MachineFrameInfo’
<< " for stack size: " << MF.getFrameInfo()->getStackSize() << "\n");
^~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp: In member function ‘virtual unsigned int llvm::AlphaRegisterInfo::getFrameRegister(const llvm::MachineFunction&) const’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:180:51: error: ‘const class llvm::LLVMTargetMachine’ has no member named ‘getFrameLowering’; did you mean ‘getObjFileLowering’?
const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
^~~~~~~~~~~~~~~~
getObjFileLowering
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp: In static member function ‘static std::__cxx11::string llvm::AlphaRegisterInfo::getPrettyName(unsigned int)’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:197:39: error: no matching function for call to ‘std::__cxx11::basic_string<char>::basic_string(const uint32_t&)’
std::string s(AlphaRegDesc[reg].Name);
^
In file included from /usr/include/c++/8/string:52,
from /usr/include/c++/8/bits/locale_classes.h:40,
from /usr/include/c++/8/bits/ios_base.h:41,
from /usr/include/c++/8/ios:42,
from /usr/include/c++/8/ostream:38,
from /usr/include/c++/8/iterator:64,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/ADT/iterator_range.h:22,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/ADT/SmallVector.h:17,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/ADT/STLExtras.h:21,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/ADT/StringRef.h:13,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/Target/TargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/Alpha.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:15:
/usr/include/c++/8/bits/basic_string.h:614:9: note: candidate: ‘template<class _InputIterator, class> std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::basic_string(_InputIterator, _InputIterator, const _Alloc&)’
basic_string(_InputIterator __beg, _InputIterator __end,
^~~~~~~~~~~~
/usr/include/c++/8/bits/basic_string.h:614:9: note: template argument deduction/substitution failed:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:197:39: note: candidate expects 3 arguments, 1 provided
std::string s(AlphaRegDesc[reg].Name);
^
In file included from /usr/include/c++/8/string:52,
from /usr/include/c++/8/bits/locale_classes.h:40,
from /usr/include/c++/8/bits/ios_base.h:41,
from /usr/include/c++/8/ios:42,
from /usr/include/c++/8/ostream:38,
from /usr/include/c++/8/iterator:64,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/ADT/iterator_range.h:22,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/ADT/SmallVector.h:17,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/ADT/STLExtras.h:21,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/ADT/StringRef.h:13,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/Target/TargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/Alpha.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:15:
/usr/include/c++/8/bits/basic_string.h:576:7: note: candidate: ‘std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::basic_string(std::__cxx11::basic_string<_CharT, _Traits, _Alloc>&&, const _Alloc&) [with _CharT = char; _Traits = std::char_traits<char>; _Alloc = std::allocator<char>]’
basic_string(basic_string&& __str, const _Alloc& __a)
^~~~~~~~~~~~
/usr/include/c++/8/bits/basic_string.h:576:7: note: candidate expects 2 arguments, 1 provided
/usr/include/c++/8/bits/basic_string.h:572:7: note: candidate: ‘std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::basic_string(const std::__cxx11::basic_string<_CharT, _Traits, _Alloc>&, const _Alloc&) [with _CharT = char; _Traits = std::char_traits<char>; _Alloc = std::allocator<char>]’
basic_string(const basic_string& __str, const _Alloc& __a)
^~~~~~~~~~~~
/usr/include/c++/8/bits/basic_string.h:572:7: note: candidate expects 2 arguments, 1 provided
/usr/include/c++/8/bits/basic_string.h:568:7: note: candidate: ‘std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::basic_string(std::initializer_list<_Tp>, const _Alloc&) [with _CharT = char; _Traits = std::char_traits<char>; _Alloc = std::allocator<char>]’
basic_string(initializer_list<_CharT> __l, const _Alloc& __a = _Alloc())
^~~~~~~~~~~~
/usr/include/c++/8/bits/basic_string.h:568:7: note: no known conversion for argument 1 from ‘const uint32_t’ {aka ‘const unsigned int’} to ‘std::initializer_list<char>’
/usr/include/c++/8/bits/basic_string.h:541:7: note: candidate: ‘std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::basic_string(std::__cxx11::basic_string<_CharT, _Traits, _Alloc>&&) [with _CharT = char; _Traits = std::char_traits<char>; _Alloc = std::allocator<char>]’
basic_string(basic_string&& __str) noexcept
^~~~~~~~~~~~
/usr/include/c++/8/bits/basic_string.h:541:7: note: no known conversion for argument 1 from ‘const uint32_t’ {aka ‘const unsigned int’} to ‘std::__cxx11::basic_string<char>&&’
/usr/include/c++/8/bits/basic_string.h:529:7: note: candidate: ‘std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::basic_string(std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::size_type, _CharT, const _Alloc&) [with _CharT = char; _Traits = std::char_traits<char>; _Alloc = std::allocator<char>; std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::size_type = long unsigned int]’
basic_string(size_type __n, _CharT __c, const _Alloc& __a = _Alloc())
^~~~~~~~~~~~
/usr/include/c++/8/bits/basic_string.h:529:7: note: candidate expects 3 arguments, 1 provided
/usr/include/c++/8/bits/basic_string.h:514:7: note: candidate: ‘std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::basic_string(const _CharT*, const _Alloc&) [with _CharT = char; _Traits = std::char_traits<char>; _Alloc = std::allocator<char>]’ <near match>
basic_string(const _CharT* __s, const _Alloc& __a = _Alloc())
^~~~~~~~~~~~
/usr/include/c++/8/bits/basic_string.h:514:7: note: conversion of argument 1 would be ill-formed:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:197:35: error: invalid conversion from ‘uint32_t’ {aka ‘unsigned int’} to ‘const char*’ [-fpermissive]
std::string s(AlphaRegDesc[reg].Name);
~~~~~~~~~~~~~~~~~~^~~~
In file included from /usr/include/c++/8/string:52,
from /usr/include/c++/8/bits/locale_classes.h:40,
from /usr/include/c++/8/bits/ios_base.h:41,
from /usr/include/c++/8/ios:42,
from /usr/include/c++/8/ostream:38,
from /usr/include/c++/8/iterator:64,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/ADT/iterator_range.h:22,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/ADT/SmallVector.h:17,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/ADT/STLExtras.h:21,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/ADT/StringRef.h:13,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/Target/TargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/Alpha.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:15:
/usr/include/c++/8/bits/basic_string.h:499:7: note: candidate: ‘std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::basic_string(const _CharT*, std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::size_type, const _Alloc&) [with _CharT = char; _Traits = std::char_traits<char>; _Alloc = std::allocator<char>; std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::size_type = long unsigned int]’
basic_string(const _CharT* __s, size_type __n,
^~~~~~~~~~~~
/usr/include/c++/8/bits/basic_string.h:499:7: note: candidate expects 3 arguments, 1 provided
/usr/include/c++/8/bits/basic_string.h:481:7: note: candidate: ‘std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::basic_string(const std::__cxx11::basic_string<_CharT, _Traits, _Alloc>&, std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::size_type, std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::size_type, const _Alloc&) [with _CharT = char; _Traits = std::char_traits<char>; _Alloc = std::allocator<char>; std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::size_type = long unsigned int]’
basic_string(const basic_string& __str, size_type __pos,
^~~~~~~~~~~~
/usr/include/c++/8/bits/basic_string.h:481:7: note: candidate expects 4 arguments, 1 provided
/usr/include/c++/8/bits/basic_string.h:465:7: note: candidate: ‘std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::basic_string(const std::__cxx11::basic_string<_CharT, _Traits, _Alloc>&, std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::size_type, std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::size_type) [with _CharT = char; _Traits = std::char_traits<char>; _Alloc = std::allocator<char>; std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::size_type = long unsigned int]’
basic_string(const basic_string& __str, size_type __pos,
^~~~~~~~~~~~
/usr/include/c++/8/bits/basic_string.h:465:7: note: candidate expects 3 arguments, 1 provided
/usr/include/c++/8/bits/basic_string.h:450:7: note: candidate: ‘std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::basic_string(const std::__cxx11::basic_string<_CharT, _Traits, _Alloc>&, std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::size_type, const _Alloc&) [with _CharT = char; _Traits = std::char_traits<char>; _Alloc = std::allocator<char>; std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::size_type = long unsigned int]’
basic_string(const basic_string& __str, size_type __pos,
^~~~~~~~~~~~
/usr/include/c++/8/bits/basic_string.h:450:7: note: candidate expects 3 arguments, 1 provided
/usr/include/c++/8/bits/basic_string.h:437:7: note: candidate: ‘std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::basic_string(const std::__cxx11::basic_string<_CharT, _Traits, _Alloc>&) [with _CharT = char; _Traits = std::char_traits<char>; _Alloc = std::allocator<char>]’
basic_string(const basic_string& __str)
^~~~~~~~~~~~
/usr/include/c++/8/bits/basic_string.h:437:7: note: no known conversion for argument 1 from ‘const uint32_t’ {aka ‘const unsigned int’} to ‘const std::__cxx11::basic_string<char>&’
/usr/include/c++/8/bits/basic_string.h:429:7: note: candidate: ‘std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::basic_string(const _Alloc&) [with _CharT = char; _Traits = std::char_traits<char>; _Alloc = std::allocator<char>]’
basic_string(const _Alloc& __a) _GLIBCXX_NOEXCEPT
^~~~~~~~~~~~
/usr/include/c++/8/bits/basic_string.h:429:7: note: no known conversion for argument 1 from ‘const uint32_t’ {aka ‘const unsigned int’} to ‘const std::allocator<char>&’
/usr/include/c++/8/bits/basic_string.h:420:7: note: candidate: ‘std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::basic_string() [with _CharT = char; _Traits = std::char_traits<char>; _Alloc = std::allocator<char>]’
basic_string()
^~~~~~~~~~~~
/usr/include/c++/8/bits/basic_string.h:420:7: note: candidate expects 0 arguments, 1 provided
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:18:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:31:9: error: ‘TargetData’ does not name a type; did you mean ‘Target’?
const TargetData DataLayout; // Calculates type size & alignment
^~~~~~~~~~
Target
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:57:17: error: ‘TargetData’ does not name a type; did you mean ‘Target’?
virtual const TargetData *getTargetData() const { return &DataLayout; }
^~~~~~~~~~
Target
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:33:22: error: cannot declare field ‘llvm::AlphaTargetMachine::FrameLowering’ to be of abstract type ‘llvm::AlphaFrameLowering’
AlphaFrameLowering FrameLowering;
^~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:18:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.h:24:7: note: because the following virtual functions are pure within ‘llvm::AlphaFrameLowering’:
class AlphaFrameLowering : public TargetFrameLowering {
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:18:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetFrameLowering.h:167:16: note: ‘virtual void llvm::TargetFrameLowering::emitPrologue(llvm::MachineFunction&, llvm::MachineBasicBlock&) const’
virtual void emitPrologue(MachineFunction &MF,
^~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:31:9: error: ‘TargetData’ does not name a type; did you mean ‘Target’?
const TargetData DataLayout; // Calculates type size & alignment
^~~~~~~~~~
Target
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:57:17: error: ‘TargetData’ does not name a type; did you mean ‘Target’?
virtual const TargetData *getTargetData() const { return &DataLayout; }
^~~~~~~~~~
Target
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:33:22: error: cannot declare field ‘llvm::AlphaTargetMachine::FrameLowering’ to be of abstract type ‘llvm::AlphaFrameLowering’
AlphaFrameLowering FrameLowering;
^~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.h:24:7: note: because the following virtual functions are pure within ‘llvm::AlphaFrameLowering’:
class AlphaFrameLowering : public TargetFrameLowering {
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetFrameLowering.h:167:16: note: ‘virtual void llvm::TargetFrameLowering::emitPrologue(llvm::MachineFunction&, llvm::MachineBasicBlock&) const’
virtual void emitPrologue(MachineFunction &MF,
^~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:33:19: error: conflicting return type specified for ‘virtual const unsigned int* llvm::AlphaRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h:26,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:33,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h:462:3: note: overridden function is ‘virtual const MCPhysReg* llvm::TargetRegisterInfo::getCalleeSavedRegs(const llvm::MachineFunction*) const’
getCalleeSavedRegs(const MachineFunction *MF) const = 0;
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:26:27: error: cannot declare field ‘llvm::AlphaInstrInfo::RI’ to be of abstract type ‘llvm::AlphaRegisterInfo’
const AlphaRegisterInfo RI;
^~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaInstrInfo.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:17,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaRegisterInfo.h:27:8: note: because the following virtual functions are pure within ‘llvm::AlphaRegisterInfo’:
struct AlphaRegisterInfo : public AlphaGenRegisterInfo {
^~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h:26,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:33,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h:956:16: note: ‘virtual void llvm::TargetRegisterInfo::eliminateFrameIndex(llvm::MachineBasicBlock::iterator, int, unsigned int, llvm::RegScavenger*) const’
virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI,
^~~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:31:9: error: ‘TargetData’ does not name a type; did you mean ‘Target’?
const TargetData DataLayout; // Calculates type size & alignment
^~~~~~~~~~
Target
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:31:9: error: ‘TargetData’ does not name a type; did you mean ‘Target’?
const TargetData DataLayout; // Calculates type size & alignment
^~~~~~~~~~
Target
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:145:13: error: conflicting return type specified for ‘virtual llvm::SDNode* {anonymous}::AlphaDAGToDAGISel::Select(llvm::SDNode*)’
SDNode *Select(SDNode *N);
^~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:22:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAGISel.h:88:16: note: overridden function is ‘virtual void llvm::SelectionDAGISel::Select(llvm::SDNode*)’
virtual void Select(SDNode *N) = 0;
^~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:147:25: error: conflicting return type specified for ‘virtual const char* {anonymous}::AlphaDAGToDAGISel::getPassName() const’
virtual const char *getPassName() const {
^~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/IR/DataLayout.h:29,
from /home/dfyz/llvm/llvm-project/llvm/include/llvm/Target/TargetMachine.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/Alpha.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Pass.h:97:21: note: overridden function is ‘virtual llvm::StringRef llvm::Pass::getPassName() const’
virtual StringRef getPassName() const;
^~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:57:17: error: ‘TargetData’ does not name a type; did you mean ‘Target’?
virtual const TargetData *getTargetData() const { return &DataLayout; }
^~~~~~~~~~
Target
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:33:22: error: cannot declare field ‘llvm::AlphaTargetMachine::FrameLowering’ to be of abstract type ‘llvm::AlphaFrameLowering’
AlphaFrameLowering FrameLowering;
^~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.h:24:7: note: because the following virtual functions are pure within ‘llvm::AlphaFrameLowering’:
class AlphaFrameLowering : public TargetFrameLowering {
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetFrameLowering.h:167:16: note: ‘virtual void llvm::TargetFrameLowering::emitPrologue(llvm::MachineFunction&, llvm::MachineBasicBlock&) const’
virtual void emitPrologue(MachineFunction &MF,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp: In static member function ‘static uint64_t {anonymous}::AlphaDAGToDAGISel::getNearPower2(uint64_t)’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:115:21: error: ‘CountLeadingZeros_64’ was not declared in this scope
unsigned at = CountLeadingZeros_64(x);
^~~~~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp: In member function ‘llvm::SDValue {anonymous}::AlphaDAGToDAGISel::getI64Imm(int64_t)’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:140:53: error: no matching function for call to ‘llvm::SelectionDAG::getTargetConstant(int64_t&, llvm::MVT::SimpleValueType)’
return CurDAG->getTargetConstant(Imm, MVT::i64);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:573:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getTargetConstant(uint64_t, const llvm::SDLoc&, llvm::EVT, bool)’
SDValue getTargetConstant(uint64_t Val, const SDLoc &DL, EVT VT,
^~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:573:11: note: candidate expects 4 arguments, 2 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:577:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getTargetConstant(const llvm::APInt&, const llvm::SDLoc&, llvm::EVT, bool)’
SDValue getTargetConstant(const APInt &Val, const SDLoc &DL, EVT VT,
^~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:577:11: note: candidate expects 4 arguments, 2 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:581:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getTargetConstant(const llvm::ConstantInt&, const llvm::SDLoc&, llvm::EVT, bool)’
SDValue getTargetConstant(const ConstantInt &Val, const SDLoc &DL, EVT VT,
^~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:581:11: note: candidate expects 4 arguments, 2 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:57:17: error: ‘TargetData’ does not name a type; did you mean ‘Target’?
virtual const TargetData *getTargetData() const { return &DataLayout; }
^~~~~~~~~~
Target
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:33:22: error: cannot declare field ‘llvm::AlphaTargetMachine::FrameLowering’ to be of abstract type ‘llvm::AlphaFrameLowering’
AlphaFrameLowering FrameLowering;
^~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.h:24:7: note: because the following virtual functions are pure within ‘llvm::AlphaFrameLowering’:
class AlphaFrameLowering : public TargetFrameLowering {
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetFrameLowering.h:167:16: note: ‘virtual void llvm::TargetFrameLowering::emitPrologue(llvm::MachineFunction&, llvm::MachineBasicBlock&) const’
virtual void emitPrologue(MachineFunction &MF,
^~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:169:
/home/dfyz/llvm/build/lib/Target/Alpha/AlphaGenDAGISel.inc: In member function ‘virtual llvm::SDValue {anonymous}::AlphaDAGToDAGISel::RunSDNodeXForm(llvm::SDValue, unsigned int)’:
/home/dfyz/llvm/build/lib/Target/Alpha/AlphaGenDAGISel.inc:4269:5: error: ‘abs64’ was not declared in this scope
abs64(N->getZExtValue() - getNearPower2((uint64_t)N->getZExtValue()));
^~~~~
/home/dfyz/llvm/build/lib/Target/Alpha/AlphaGenDAGISel.inc:4269:5: note: suggested alternative: ‘fabsf64’
abs64(N->getZExtValue() - getNearPower2((uint64_t)N->getZExtValue()));
^~~~~
fabsf64
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaSelectionDAGInfo.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:31:9: error: ‘TargetData’ does not name a type; did you mean ‘Target’?
const TargetData DataLayout; // Calculates type size & alignment
^~~~~~~~~~
Target
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:57:17: error: ‘TargetData’ does not name a type; did you mean ‘Target’?
virtual const TargetData *getTargetData() const { return &DataLayout; }
^~~~~~~~~~
Target
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:33:22: error: cannot declare field ‘llvm::AlphaTargetMachine::FrameLowering’ to be of abstract type ‘llvm::AlphaFrameLowering’
AlphaFrameLowering FrameLowering;
^~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaSelectionDAGInfo.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.h:24:7: note: because the following virtual functions are pure within ‘llvm::AlphaFrameLowering’:
class AlphaFrameLowering : public TargetFrameLowering {
^~~~~~~~~~~~~~~~~~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaFrameLowering.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaSelectionDAGInfo.cpp:15:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetFrameLowering.h:167:16: note: ‘virtual void llvm::TargetFrameLowering::emitPrologue(llvm::MachineFunction&, llvm::MachineBasicBlock&) const’
virtual void emitPrologue(MachineFunction &MF,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaSelectionDAGInfo.cpp: In constructor ‘llvm::AlphaSelectionDAGInfo::AlphaSelectionDAGInfo(const llvm::AlphaTargetMachine&)’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaSelectionDAGInfo.cpp:19:5: error: class ‘llvm::AlphaSelectionDAGInfo’ does not have any field named ‘TargetSelectionDAGInfo’
: TargetSelectionDAGInfo(TM) {
^~~~~~~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp: In constructor ‘llvm::AlphaTargetMachine::AlphaTargetMachine(const llvm::Target&, llvm::StringRef, llvm::StringRef, llvm::StringRef, llvm::Reloc::Model, llvm::CodeModel::Model)’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:29:5: error: type ‘llvm::DataLayout’ is not a direct base of ‘llvm::AlphaTargetMachine’
DataLayout("e-f128:128:128-n64"),
^~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:33:17: error: no matching function for call to ‘llvm::LLVMTargetMachine::LLVMTargetMachine(const llvm::Target&, llvm::StringRef&, llvm::StringRef&, llvm::StringRef&, llvm::Reloc::Model&, llvm::CodeModel::Model&)’
TSInfo(*this) {
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/Alpha.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:13:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Target/TargetMachine.h:297:3: note: candidate: ‘llvm::LLVMTargetMachine::LLVMTargetMachine(const llvm::Target&, llvm::StringRef, const llvm::Triple&, llvm::StringRef, llvm::StringRef, const llvm::TargetOptions&, llvm::Reloc::Model, llvm::CodeModel::Model, llvm::CodeGenOpt::Level)’
LLVMTargetMachine(const Target &T, StringRef DataLayoutString,
^~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Target/TargetMachine.h:297:3: note: candidate expects 9 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp: In member function ‘virtual bool llvm::AlphaTargetMachine::addInstSelector(llvm::legacy::PassManagerBase&, llvm::CodeGenOpt::Level)’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:42:3: error: invalid use of incomplete type ‘class llvm::legacy::PassManagerBase’
PM.add(createAlphaISelDag(*this));
^~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/Alpha.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:13:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Target/TargetMachine.h:49:7: note: forward declaration of ‘class llvm::legacy::PassManagerBase’
class PassManagerBase;
^~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp: In member function ‘virtual bool llvm::AlphaTargetMachine::addPreEmitPass(llvm::legacy::PassManagerBase&, llvm::CodeGenOpt::Level)’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:48:3: error: invalid use of incomplete type ‘class llvm::legacy::PassManagerBase’
PM.add(createAlphaBranchSelectionPass());
^~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/Alpha.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:13:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Target/TargetMachine.h:49:7: note: forward declaration of ‘class llvm::legacy::PassManagerBase’
class PassManagerBase;
^~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:49:3: error: invalid use of incomplete type ‘class llvm::legacy::PassManagerBase’
PM.add(createAlphaLLRPPass(*this));
^~
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/Alpha.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp:13:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Target/TargetMachine.h:49:7: note: forward declaration of ‘class llvm::legacy::PassManagerBase’
class PassManagerBase;
^~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp: In member function ‘llvm::SDNode* {anonymous}::AlphaDAGToDAGISel::getGlobalBaseReg()’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:196:49: error: request for member ‘getPointerTy’ in ‘(({anonymous}::AlphaDAGToDAGISel*)this)->{anonymous}::AlphaDAGToDAGISel::<anonymous>.llvm::SelectionDAGISel::TLI’, which is of pointer type ‘const llvm::TargetLowering*’ (maybe you meant to use ‘->’ ?)
return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode();
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp: In member function ‘llvm::SDNode* {anonymous}::AlphaDAGToDAGISel::getGlobalRetAddr()’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:203:49: error: request for member ‘getPointerTy’ in ‘(({anonymous}::AlphaDAGToDAGISel*)this)->{anonymous}::AlphaDAGToDAGISel::<anonymous>.llvm::SelectionDAGISel::TLI’, which is of pointer type ‘const llvm::TargetLowering*’ (maybe you meant to use ‘->’ ?)
return CurDAG->getRegister(GlobalRetAddr, TLI.getPointerTy()).getNode();
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp: In member function ‘virtual llvm::SDNode* {anonymous}::AlphaDAGToDAGISel::Select(llvm::SDNode*)’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:236:46: error: no matching function for call to ‘llvm::SelectionDAG::getCopyToReg(llvm::SDValue&, llvm::DebugLoc&, llvm::Alpha::<unnamed enum>, llvm::SDValue&, llvm::SDValue)’
SDValue(0,0));
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:676:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:676:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:685:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::SDValue, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg, SDValue N,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:685:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:694:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, SDValue Reg, SDValue N,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:694:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:238:51: error: no matching function for call to ‘llvm::SelectionDAG::getCopyToReg(llvm::SDValue&, llvm::DebugLoc&, llvm::Alpha::<unnamed enum>, llvm::SDValue&, llvm::SDValue)’
Chain.getValue(1));
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:676:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:676:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:685:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::SDValue, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg, SDValue N,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:685:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:694:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, SDValue Reg, SDValue N,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:694:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:240:51: error: no matching function for call to ‘llvm::SelectionDAG::getCopyToReg(llvm::SDValue&, llvm::DebugLoc&, llvm::Alpha::<unnamed enum>, llvm::SDValue&, llvm::SDValue)’
Chain.getValue(1));
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:676:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:676:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:685:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::SDValue, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg, SDValue N,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:685:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:694:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, SDValue Reg, SDValue N,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:694:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:243:54: error: no matching function for call to ‘llvm::SelectionDAG::getMachineNode(llvm::Alpha::<unnamed enum>, llvm::DebugLoc&, llvm::MVT::SimpleValueType, llvm::MVT::SimpleValueType, llvm::SDValue&, llvm::SDValue)’
Chain, Chain.getValue(1));
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT);
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate expects 3 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate expects 4 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: candidate expects 5 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate expects 4 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate expects 7 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: candidate expects 5 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate expects 7 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate expects 8 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate expects 4 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, SDVTList VTs,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate expects 4 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:245:53: error: no matching function for call to ‘llvm::SelectionDAG::getCopyFromReg(llvm::SDValue&, llvm::DebugLoc&, llvm::Alpha::<unnamed enum>, llvm::MVT::SimpleValueType, llvm::SDValue)’
SDValue(CNode, 1));
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:702:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyFromReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::EVT)’
SDValue getCopyFromReg(SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT) {
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:702:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:711:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyFromReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::EVT, llvm::SDValue)’
SDValue getCopyFromReg(SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:711:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:252:40: error: no matching function for call to ‘llvm::SelectionDAG::getMachineNode(llvm::Alpha::<unnamed enum>, llvm::DebugLoc&, llvm::MVT::SimpleValueType, llvm::MVT::SimpleValueType, llvm::SDValue&)’
Chain);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT);
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate expects 3 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate expects 8 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, SDVTList VTs,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:260:69: error: no matching function for call to ‘llvm::SelectionDAG::getCopyFromReg(llvm::SDValue, llvm::DebugLoc&, llvm::Alpha::<unnamed enum>, llvm::MVT::SimpleValueType)’
Alpha::R31, MVT::i64);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:702:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyFromReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::EVT)’
SDValue getCopyFromReg(SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT) {
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:702:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:711:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyFromReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::EVT, llvm::SDValue)’
SDValue getCopyFromReg(SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:711:11: note: candidate expects 5 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:279:72: error: no matching function for call to ‘llvm::SelectionDAG::getMachineNode(llvm::Alpha::<unnamed enum>, llvm::DebugLoc&, llvm::MVT::SimpleValueType, llvm::SDValue&, llvm::SDValue)’
SDValue(getGlobalBaseReg(), 0));
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT);
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate expects 3 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate expects 8 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, SDVTList VTs,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:281:77: error: no matching function for call to ‘llvm::SelectionDAG::SelectNodeTo(llvm::SDNode*&, llvm::Alpha::<unnamed enum>, llvm::MVT::SimpleValueType, llvm::MVT::SimpleValueType, llvm::SDValue&, llvm::SDValue, llvm::SDValue)’
CPI, SDValue(Tmp, 0), CurDAG->getEntryNode());
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1159:11: note: candidate: ‘llvm::SDNode* llvm::SelectionDAG::SelectNodeTo(llvm::SDNode*, unsigned int, llvm::EVT)’
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT);
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1159:11: note: candidate expects 3 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1160:11: note: candidate: ‘llvm::SDNode* llvm::SelectionDAG::SelectNodeTo(llvm::SDNode*, unsigned int, llvm::EVT, llvm::SDValue)’
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1);
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1160:11: note: candidate expects 4 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1161:11: note: candidate: ‘llvm::SDNode* llvm::SelectionDAG::SelectNodeTo(llvm::SDNode*, unsigned int, llvm::EVT, llvm::SDValue, llvm::SDValue)’
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1161:11: note: candidate expects 5 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1163:11: note: candidate: ‘llvm::SDNode* llvm::SelectionDAG::SelectNodeTo(llvm::SDNode*, unsigned int, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1163:11: note: candidate expects 6 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1165:11: note: candidate: ‘llvm::SDNode* llvm::SelectionDAG::SelectNodeTo(llvm::SDNode*, unsigned int, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1165:11: note: candidate expects 4 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1167:11: note: candidate: ‘llvm::SDNode* llvm::SelectionDAG::SelectNodeTo(llvm::SDNode*, unsigned int, llvm::EVT, llvm::EVT)’
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2);
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1167:11: note: candidate expects 4 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1168:11: note: candidate: ‘llvm::SDNode* llvm::SelectionDAG::SelectNodeTo(llvm::SDNode*, unsigned int, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1168:11: note: candidate expects 5 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1170:11: note: candidate: ‘llvm::SDNode* llvm::SelectionDAG::SelectNodeTo(llvm::SDNode*, unsigned int, llvm::EVT, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1170:11: note: candidate expects 6 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1172:11: note: candidate: ‘llvm::SDNode* llvm::SelectionDAG::SelectNodeTo(llvm::SDNode*, unsigned int, llvm::EVT, llvm::EVT, llvm::SDValue)’
SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1172:11: note: candidate expects 5 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1174:11: note: candidate: ‘llvm::SDNode* llvm::SelectionDAG::SelectNodeTo(llvm::SDNode*, unsigned int, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1174:11: note: candidate expects 6 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1176:11: note: candidate: ‘llvm::SDNode* llvm::SelectionDAG::SelectNodeTo(llvm::SDNode*, unsigned int, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, SDVTList VTs,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1176:11: note: candidate expects 4 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:310:16: error: ‘DEBUG’ was not declared in this scope
default: DEBUG(N->dump(CurDAG)); llvm_unreachable("Unknown FP comparison!");
^~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:330:73: error: no matching function for call to ‘llvm::SelectionDAG::getMachineNode(unsigned int&, llvm::DebugLoc&, llvm::MVT::SimpleValueType, llvm::SDValue&, llvm::SDValue&)’
SDNode *cmp = CurDAG->getMachineNode(Opc, dl, MVT::f64, tmp1, tmp2);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT);
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate expects 3 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate expects 8 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, SDVTList VTs,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:334:79: error: no matching function for call to ‘llvm::SelectionDAG::getMachineNode(llvm::Alpha::<unnamed enum>, llvm::DebugLoc&, llvm::MVT::SimpleValueType, llvm::SDValue, llvm::SDValue)’
CurDAG->getRegister(Alpha::F31, MVT::f64));
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT);
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate expects 3 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate expects 8 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, SDVTList VTs,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:340:58: error: no matching function for call to ‘llvm::SelectionDAG::getMachineNode(llvm::Alpha::<unnamed enum>, llvm::DebugLoc&, llvm::MVT::SimpleValueType, llvm::SDValue&, llvm::SDValue&)’
tmp1, tmp2);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT);
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate expects 3 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate expects 8 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, SDVTList VTs,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:342:72: error: no matching function for call to ‘llvm::SelectionDAG::getMachineNode(llvm::Alpha::<unnamed enum>, llvm::DebugLoc&, llvm::MVT::SimpleValueType, llvm::SDValue, llvm::SDValue)’
SDValue(cmp2, 0), SDValue(cmp, 0));
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT);
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate expects 3 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate expects 8 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, SDVTList VTs,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:349:68: error: no matching function for call to ‘llvm::SelectionDAG::getMachineNode(llvm::Alpha::<unnamed enum>, llvm::DebugLoc&, llvm::MVT::SimpleValueType, llvm::SDValue)’
MVT::i64, SDValue(cmp, 0));
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT);
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate expects 3 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: candidate expects 5 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate expects 6 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate expects 6 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate expects 7 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: candidate expects 5 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate expects 7 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate expects 8 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate expects 6 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, SDVTList VTs,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:352:50: error: no matching function for call to ‘llvm::SelectionDAG::getMachineNode(llvm::Alpha::<unnamed enum>, llvm::DebugLoc&, llvm::MVT::SimpleValueType, llvm::SDValue, llvm::SDValue)’
SDValue(LD,0));
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT);
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate expects 3 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate expects 8 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, SDVTList VTs,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:379:69: error: no matching function for call to ‘llvm::SelectionDAG::getMachineNode(llvm::Alpha::<unnamed enum>, llvm::DebugLoc&, llvm::MVT::SimpleValueType, const llvm::SDValue&, llvm::SDValue)’
getI64Imm(get_zapImm(mask))), 0);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT);
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate expects 3 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate expects 8 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, SDVTList VTs,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:381:54: error: no matching function for call to ‘llvm::SelectionDAG::getMachineNode(llvm::Alpha::<unnamed enum>, llvm::DebugLoc&, llvm::MVT::SimpleValueType, llvm::SDValue&, llvm::SDValue)’
getI64Imm(sval));
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT);
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate expects 3 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate expects 8 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, SDVTList VTs,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:389:22: error: void value not ignored as it ought to be
return SelectCode(N);
^
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp: In member function ‘void {anonymous}::AlphaDAGToDAGISel::SelectCALL(llvm::SDNode*)’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:402:69: error: no matching function for call to ‘llvm::SelectionDAG::getCopyToReg(llvm::SDValue&, llvm::DebugLoc&, llvm::Alpha::<unnamed enum>, llvm::SDValue&, llvm::SDValue&)’
Chain = CurDAG->getCopyToReg(Chain, dl, Alpha::R29, GOT, InFlag);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:676:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:676:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:685:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::SDValue, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg, SDValue N,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:685:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:694:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, SDValue Reg, SDValue N,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:694:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:406:58: error: no matching function for call to ‘llvm::SelectionDAG::getMachineNode(llvm::Alpha::<unnamed enum>, llvm::DebugLoc&, llvm::MVT::SimpleValueType, llvm::MVT::SimpleValueType, const llvm::SDValue&, llvm::SDValue&, llvm::SDValue&)’
Chain, InFlag), 0);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT);
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate expects 3 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate expects 4 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: candidate expects 5 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate expects 6 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate expects 4 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate expects 6 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: candidate expects 5 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate expects 8 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate expects 6 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate expects 4 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, SDVTList VTs,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate expects 4 arguments, 7 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:408:70: error: no matching function for call to ‘llvm::SelectionDAG::getCopyToReg(llvm::SDValue&, llvm::DebugLoc&, llvm::Alpha::<unnamed enum>, llvm::SDValue&, llvm::SDValue&)’
Chain = CurDAG->getCopyToReg(Chain, dl, Alpha::R27, Addr, InFlag);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:676:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:676:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:685:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::SDValue, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg, SDValue N,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:685:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:694:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, SDValue Reg, SDValue N,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:694:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:411:69: error: no matching function for call to ‘llvm::SelectionDAG::getMachineNode(llvm::Alpha::<unnamed enum>, llvm::DebugLoc&, llvm::MVT::SimpleValueType, llvm::MVT::SimpleValueType, llvm::SDValue&, llvm::SDValue&)’
MVT::Glue, Chain, InFlag), 0);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaTargetMachine.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:16:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT);
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1195:18: note: candidate expects 3 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1196:18: note: candidate expects 4 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1198:18: note: candidate expects 5 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1200:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1202:18: note: candidate expects 4 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1204:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1206:18: note: candidate expects 7 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1208:18: note: candidate expects 5 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1210:18: note: candidate expects 7 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1212:18: note: candidate expects 8 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::EVT, llvm::EVT, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1215:18: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1217:18: note: candidate expects 4 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate: ‘llvm::MachineSDNode* llvm::SelectionDAG::getMachineNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, SDVTList VTs,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1219:18: note: candidate expects 4 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp: In constructor ‘llvm::AlphaTargetLowering::AlphaTargetLowering(llvm::TargetMachine&)’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:48:57: error: no matching function for call to ‘llvm::TargetLowering::TargetLowering(llvm::TargetMachine&, llvm::TargetLoweringObjectFileELF*)’
: TargetLowering(TM, new TargetLoweringObjectFileELF()) {
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:2760:12: note: candidate: ‘llvm::TargetLowering::TargetLowering(const llvm::TargetMachine&)’
explicit TargetLowering(const TargetMachine &TM);
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:2760:12: note: candidate expects 1 argument, 2 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:54:37: error: ‘GPRCRegisterClass’ is not a member of ‘llvm::Alpha’
addRegisterClass(MVT::i64, Alpha::GPRCRegisterClass);
^~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:54:37: note: suggested alternative: ‘GPRCRegClass’
addRegisterClass(MVT::i64, Alpha::GPRCRegisterClass);
^~~~~~~~~~~~~~~~~
GPRCRegClass
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:55:37: error: ‘F8RCRegisterClass’ is not a member of ‘llvm::Alpha’
addRegisterClass(MVT::f64, Alpha::F8RCRegisterClass);
^~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:55:37: note: suggested alternative: ‘F8RCRegClass’
addRegisterClass(MVT::f64, Alpha::F8RCRegisterClass);
^~~~~~~~~~~~~~~~~
F8RCRegClass
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:56:37: error: ‘F4RCRegisterClass’ is not a member of ‘llvm::Alpha’
addRegisterClass(MVT::f32, Alpha::F4RCRegisterClass);
^~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:56:37: note: suggested alternative: ‘F4RCRegClass’
addRegisterClass(MVT::f32, Alpha::F4RCRegisterClass);
^~~~~~~~~~~~~~~~~
F4RCRegClass
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:61:51: error: no matching function for call to ‘llvm::AlphaTargetLowering::setLoadExtAction(llvm::ISD::LoadExtType, llvm::MVT::SimpleValueType, llvm::TargetLoweringBase::LegalizeAction)’
setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:1907:8: note: candidate: ‘void llvm::TargetLoweringBase::setLoadExtAction(unsigned int, llvm::MVT, llvm::MVT, llvm::TargetLoweringBase::LegalizeAction)’
void setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT,
^~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:1907:8: note: candidate expects 4 arguments, 3 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:62:50: error: no matching function for call to ‘llvm::AlphaTargetLowering::setLoadExtAction(llvm::ISD::LoadExtType, llvm::MVT::SimpleValueType, llvm::TargetLoweringBase::LegalizeAction)’
setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:1907:8: note: candidate: ‘void llvm::TargetLoweringBase::setLoadExtAction(unsigned int, llvm::MVT, llvm::MVT, llvm::TargetLoweringBase::LegalizeAction)’
void setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT,
^~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:1907:8: note: candidate expects 4 arguments, 3 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:64:52: error: no matching function for call to ‘llvm::AlphaTargetLowering::setLoadExtAction(llvm::ISD::LoadExtType, llvm::MVT::SimpleValueType, llvm::TargetLoweringBase::LegalizeAction)’
setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:1907:8: note: candidate: ‘void llvm::TargetLoweringBase::setLoadExtAction(unsigned int, llvm::MVT, llvm::MVT, llvm::TargetLoweringBase::LegalizeAction)’
void setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT,
^~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:1907:8: note: candidate expects 4 arguments, 3 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:65:51: error: no matching function for call to ‘llvm::AlphaTargetLowering::setLoadExtAction(llvm::ISD::LoadExtType, llvm::MVT::SimpleValueType, llvm::TargetLoweringBase::LegalizeAction)’
setLoadExtAction(ISD::ZEXTLOAD, MVT::i32, Expand);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:1907:8: note: candidate: ‘void llvm::TargetLoweringBase::setLoadExtAction(unsigned int, llvm::MVT, llvm::MVT, llvm::TargetLoweringBase::LegalizeAction)’
void setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT,
^~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:1907:8: note: candidate expects 4 arguments, 3 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:67:52: error: no matching function for call to ‘llvm::AlphaTargetLowering::setLoadExtAction(llvm::ISD::LoadExtType, llvm::MVT::SimpleValueType, llvm::TargetLoweringBase::LegalizeAction)’
setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:1907:8: note: candidate: ‘void llvm::TargetLoweringBase::setLoadExtAction(unsigned int, llvm::MVT, llvm::MVT, llvm::TargetLoweringBase::LegalizeAction)’
void setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT,
^~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:1907:8: note: candidate expects 4 arguments, 3 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:68:51: error: no matching function for call to ‘llvm::AlphaTargetLowering::setLoadExtAction(llvm::ISD::LoadExtType, llvm::MVT::SimpleValueType, llvm::TargetLoweringBase::LegalizeAction)’
setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Expand);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:1907:8: note: candidate: ‘void llvm::TargetLoweringBase::setLoadExtAction(unsigned int, llvm::MVT, llvm::MVT, llvm::TargetLoweringBase::LegalizeAction)’
void setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT,
^~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:1907:8: note: candidate expects 4 arguments, 3 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:69:51: error: no matching function for call to ‘llvm::AlphaTargetLowering::setLoadExtAction(llvm::ISD::LoadExtType, llvm::MVT::SimpleValueType, llvm::TargetLoweringBase::LegalizeAction)’
setLoadExtAction(ISD::SEXTLOAD, MVT::i16, Expand);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:1907:8: note: candidate: ‘void llvm::TargetLoweringBase::setLoadExtAction(unsigned int, llvm::MVT, llvm::MVT, llvm::TargetLoweringBase::LegalizeAction)’
void setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT,
^~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:1907:8: note: candidate expects 4 arguments, 3 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:88:40: error: no matching function for call to ‘llvm::TargetMachine::getSubtarget<llvm::AlphaSubtarget>()’
if (!TM.getSubtarget<AlphaSubtarget>().hasCT()) {
^
In file included from /home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:56,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Target/TargetMachine.h:121:38: note: candidate: ‘template<class STC> const STC& llvm::TargetMachine::getSubtarget(const llvm::Function&) const’
template <typename STC> const STC &getSubtarget(const Function &F) const {
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/Target/TargetMachine.h:121:38: note: template argument deduction/substitution failed:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:88:40: note: candidate expects 1 argument, 0 provided
if (!TM.getSubtarget<AlphaSubtarget>().hasCT()) {
^
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:167:3: error: ‘setInsertFencesForAtomic’ was not declared in this scope
setInsertFencesForAtomic(true);
^~~~~~~~~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:167:3: note: suggested alternative: ‘shouldInsertFencesForAtomic’
setInsertFencesForAtomic(true);
^~~~~~~~~~~~~~~~~~~~~~~~
shouldInsertFencesForAtomic
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:169:29: error: no matching function for call to ‘llvm::AlphaTargetLowering::computeRegisterProperties()’
computeRegisterProperties();
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:1894:8: note: candidate: ‘void llvm::TargetLoweringBase::computeRegisterProperties(const llvm::TargetRegisterInfo*)’
void computeRegisterProperties(const TargetRegisterInfo *TRI);
^~~~~~~~~~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:1894:8: note: candidate expects 1 argument, 0 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp: In function ‘llvm::SDValue LowerJumpTable(llvm::SDValue, llvm::SelectionDAG&)’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:202:66: error: no matching function for call to ‘llvm::SelectionDAG::getNode(llvm::AlphaISD::NodeType, llvm::DebugLoc&, llvm::MVT::SimpleValueType, llvm::SDValue&, llvm::SDValue)’
DAG.getGLOBAL_OFFSET_TABLE(MVT::i64));
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:860:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDUse>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:860:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:862:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:862:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:864:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, ArrayRef<EVT> ResultTys,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:864:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:866:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:866:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:870:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:870:11: note: candidate expects 3 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:871:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:871:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:873:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:873:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:875:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:875:11: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:878:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:878:11: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:880:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:880:11: note: candidate expects 8 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:885:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:885:11: note: candidate expects 3 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:886:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:886:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:887:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:887:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:889:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:889:11: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:891:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:891:11: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:893:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:893:11: note: candidate expects 8 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:203:68: error: no matching function for call to ‘llvm::SelectionDAG::getNode(llvm::AlphaISD::NodeType, llvm::DebugLoc&, llvm::MVT::SimpleValueType, llvm::SDValue&, llvm::SDValue&)’
SDValue Lo = DAG.getNode(AlphaISD::GPRelLo, dl, MVT::i64, JTI, Hi);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:860:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDUse>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:860:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:862:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:862:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:864:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, ArrayRef<EVT> ResultTys,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:864:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:866:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:866:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:870:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:870:11: note: candidate expects 3 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:871:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:871:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:873:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:873:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:875:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:875:11: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:878:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:878:11: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:880:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:880:11: note: candidate expects 8 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:885:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:885:11: note: candidate expects 3 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:886:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:886:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:887:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:887:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:889:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:889:11: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:891:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:891:11: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:893:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:893:11: note: candidate expects 8 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp: In member function ‘virtual llvm::SDValue llvm::AlphaTargetLowering::LowerCall(llvm::SDValue, llvm::SDValue, llvm::CallingConv::ID, bool, bool&, const llvm::SmallVectorImpl<llvm::ISD::OutputArg>&, const llvm::SmallVectorImpl<llvm::SDValue>&, const llvm::SmallVectorImpl<llvm::ISD::InputArg>&, llvm::DebugLoc, llvm::SelectionDAG&, llvm::SmallVectorImpl<llvm::SDValue>&) const’:
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:243:50: error: no matching function for call to ‘llvm::CCState::CCState(llvm::CallingConv::ID&, bool&, llvm::MachineFunction&, const llvm::TargetMachine&, llvm::SmallVector<llvm::CCValAssign, 16>&, llvm::LLVMContext&)’
getTargetMachine(), ArgLocs, *DAG.getContext());
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:17:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/CallingConvLower.h:257:3: note: candidate: ‘llvm::CCState::CCState(llvm::CallingConv::ID, bool, llvm::MachineFunction&, llvm::SmallVectorImpl<llvm::CCValAssign>&, llvm::LLVMContext&)’
CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/CallingConvLower.h:257:3: note: candidate expects 5 arguments, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/CallingConvLower.h:190:7: note: candidate: ‘llvm::CCState::CCState(const llvm::CCState&)’
class CCState {
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/CallingConvLower.h:190:7: note: candidate expects 1 argument, 6 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/CallingConvLower.h:190:7: note: candidate: ‘llvm::CCState::CCState(llvm::CCState&&)’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/CallingConvLower.h:190:7: note: candidate expects 1 argument, 6 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:251:68: error: no matching function for call to ‘llvm::AlphaTargetLowering::getPointerTy() const’
getPointerTy(), true));
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:238:7: note: candidate: ‘llvm::MVT llvm::TargetLoweringBase::getPointerTy(const llvm::DataLayout&, uint32_t) const’
MVT getPointerTy(const DataLayout &DL, uint32_t AS = 0) const {
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:238:7: note: candidate expects 2 arguments, 0 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:268:67: error: no matching function for call to ‘llvm::SelectionDAG::getNode(llvm::ISD::NodeType, llvm::DebugLoc&, llvm::MVT, llvm::SDValue&)’
Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:860:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDUse>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:860:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:862:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:862:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:864:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, ArrayRef<EVT> ResultTys,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:864:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:866:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:866:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:870:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:870:11: note: candidate expects 3 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:871:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:871:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:873:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:873:11: note: candidate expects 6 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:875:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:875:11: note: candidate expects 7 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:878:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:878:11: note: candidate expects 7 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:880:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:880:11: note: candidate expects 8 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:885:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:885:11: note: candidate expects 3 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:886:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:886:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:887:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:887:11: note: candidate expects 5 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:889:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:889:11: note: candidate expects 6 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:891:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:891:11: note: candidate expects 7 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:893:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:893:11: note: candidate expects 8 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:271:67: error: no matching function for call to ‘llvm::SelectionDAG::getNode(llvm::ISD::NodeType, llvm::DebugLoc&, llvm::MVT, llvm::SDValue&)’
Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:860:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDUse>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:860:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:862:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:862:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:864:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, ArrayRef<EVT> ResultTys,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:864:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:866:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:866:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:870:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:870:11: note: candidate expects 3 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:871:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:871:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:873:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:873:11: note: candidate expects 6 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:875:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:875:11: note: candidate expects 7 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:878:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:878:11: note: candidate expects 7 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:880:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:880:11: note: candidate expects 8 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:885:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:885:11: note: candidate expects 3 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:886:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:886:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:887:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:887:11: note: candidate expects 5 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:889:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:889:11: note: candidate expects 6 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:891:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:891:11: note: candidate expects 7 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:893:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:893:11: note: candidate expects 8 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:274:66: error: no matching function for call to ‘llvm::SelectionDAG::getNode(llvm::ISD::NodeType, llvm::DebugLoc&, llvm::MVT, llvm::SDValue&)’
Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:860:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDUse>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:860:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:862:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:862:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:864:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, ArrayRef<EVT> ResultTys,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:864:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:866:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:866:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:870:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:870:11: note: candidate expects 3 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:871:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:871:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:873:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:873:11: note: candidate expects 6 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:875:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:875:11: note: candidate expects 7 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:878:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:878:11: note: candidate expects 7 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:880:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:880:11: note: candidate expects 8 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:885:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:885:11: note: candidate expects 3 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:886:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:886:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:887:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:887:11: note: candidate expects 5 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:889:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:889:11: note: candidate expects 6 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:891:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:891:11: note: candidate expects 7 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:893:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:893:11: note: candidate expects 8 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:286:70: error: no matching function for call to ‘llvm::SelectionDAG::getCopyFromReg(llvm::SDValue&, llvm::DebugLoc&, llvm::Alpha::<unnamed enum>, llvm::MVT::SimpleValueType)’
StackPtr = DAG.getCopyFromReg(Chain, dl, Alpha::R30, MVT::i64);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:702:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyFromReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::EVT)’
SDValue getCopyFromReg(SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT) {
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:702:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:711:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyFromReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::EVT, llvm::SDValue)’
SDValue getCopyFromReg(SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT,
^~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:711:11: note: candidate expects 5 arguments, 4 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:288:63: error: no matching function for call to ‘llvm::AlphaTargetLowering::getPointerTy() const’
SDValue PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(),
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:19,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:238:7: note: candidate: ‘llvm::MVT llvm::TargetLoweringBase::getPointerTy(const llvm::DataLayout&, uint32_t) const’
MVT getPointerTy(const DataLayout &DL, uint32_t AS = 0) const {
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:238:7: note: candidate expects 2 arguments, 0 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:290:78: error: no matching function for call to ‘llvm::SelectionDAG::getIntPtrConstant(unsigned int)’
DAG.getIntPtrConstant(VA.getLocMemOffset()));
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:571:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getIntPtrConstant(uint64_t, const llvm::SDLoc&, bool)’
SDValue getIntPtrConstant(uint64_t Val, const SDLoc &DL,
^~~~~~~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:571:11: note: candidate expects 3 arguments, 1 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:293:78: error: no matching function for call to ‘llvm::SelectionDAG::getStore(llvm::SDValue&, llvm::DebugLoc&, llvm::SDValue&, llvm::SDValue&, llvm::MachinePointerInfo, bool, bool, int)’
MachinePointerInfo(),false, false, 0));
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1068:3: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getStore(llvm::SDValue, const llvm::SDLoc&, llvm::SDValue, llvm::SDValue, llvm::MachinePointerInfo, unsigned int, llvm::MachineMemOperand::Flags, const llvm::AAMDNodes&)’
getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr,
^~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1068:3: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1072:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getStore(llvm::SDValue, const llvm::SDLoc&, llvm::SDValue, llvm::SDValue, llvm::MachineMemOperand*)’
SDValue getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr,
^~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:1072:11: note: candidate expects 5 arguments, 8 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:301:60: error: no matching function for call to ‘llvm::SelectionDAG::getNode(llvm::ISD::NodeType, llvm::DebugLoc&, llvm::MVT::SimpleValueType, llvm::SDValue*, size_t)’
&MemOpChains[0], MemOpChains.size());
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:860:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDUse>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:860:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:862:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:862:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:864:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, ArrayRef<EVT> ResultTys,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:864:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:866:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:866:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:870:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:870:11: note: candidate expects 3 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:871:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:871:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:873:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:873:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:875:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:875:11: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:878:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:878:11: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:880:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:880:11: note: candidate expects 8 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:885:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:885:11: note: candidate expects 3 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:886:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:886:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:887:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:887:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:889:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:889:11: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:891:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:891:11: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:893:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:893:11: note: candidate expects 8 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:309:58: error: no matching function for call to ‘llvm::SelectionDAG::getCopyToReg(llvm::SDValue&, llvm::DebugLoc&, unsigned int&, llvm::SDValue&, llvm::SDValue&)’
RegsToPass[i].second, InFlag);
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:676:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:676:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:685:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, unsigned int, llvm::SDValue, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg, SDValue N,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:685:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:694:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getCopyToReg(llvm::SDValue, const llvm::SDLoc&, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, SDValue Reg, SDValue N,
^~~~~~~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:694:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:328:71: error: no matching function for call to ‘llvm::SelectionDAG::getNode(llvm::AlphaISD::NodeType, llvm::DebugLoc&, llvm::SDVTList&, llvm::SDValue*, size_t)’
Chain = DAG.getNode(AlphaISD::CALL, dl, NodeTys, &Ops[0], Ops.size());
^
In file included from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.h:18,
from /home/dfyz/llvm/llvm-project/llvm/lib/Target/Alpha/AlphaISelLowering.cpp:14:
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:860:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDUse>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:860:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:862:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::ArrayRef<llvm::SDValue>, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:862:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:864:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::ArrayRef<llvm::EVT>, llvm::ArrayRef<llvm::SDValue>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, ArrayRef<EVT> ResultTys,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:864:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:866:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:866:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:870:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:870:11: note: candidate expects 3 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:871:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:871:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:873:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:873:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:875:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDNodeFlags)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:875:11: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:878:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:878:11: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:880:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::EVT, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:880:11: note: candidate expects 8 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:885:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:885:11: note: candidate expects 3 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:886:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N);
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:886:11: note: candidate expects 4 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:887:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:887:11: note: no known conversion for argument 2 from ‘llvm::DebugLoc’ to ‘const llvm::SDLoc&’
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:889:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:889:11: note: candidate expects 6 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:891:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:891:11: note: candidate expects 7 arguments, 5 provided
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:893:11: note: candidate: ‘llvm::SDValue llvm::SelectionDAG::getNode(unsigned int, const llvm::SDLoc&, llvm::SDVTList, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue)’
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
^~~~~~~
/home/dfyz/llvm/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:893:11: note: candidate expects 8 arguments, 5 provided