arm_mul.asm

	;	BASIC TEST
	mov	r0, #123 ; multicand
	mov	r1, #0xFF00 ; multiplier
	bl	mul ; unsigned
	
	;	CYCLE TEST (add vs lsl)
	mov	r0, #0xA900
	mov	r1, #39
	bl	mul
	;end
	
	;	DWORD TEST
	ldr	r2, =test
	ldmfd	r2, {r0, r1}
	bl	mul
	end
	
	;	uhhhhhhh
	;mov	r0, #-1
	;mov	r1, #25
	;bl	mul
	;end
test	dcd	0x1A739C, 0x31A
mul	cmp	r0, r1 ; hi/lo order check
	bpl	m_hl_o
	;	|
	;	lo/hi
	;	V
	mov	r2, r1 ; no xchg in arm, why
	mov	r1, r0
	mov	r0, r2
m_hl_o	cmp	r1, #4 ; too simple to waste cycles on
	bhi	m_nz
	
	tst	r1, r1 ; if * 0
	addne	r15, r15, r1, lsl #4
	;	can't see how when = 0, it stays here
	;	but then when >= 1, jumps an extra 2 insts
	eor	r0, r0, r0
	mov	r15, r14
	end	; NO NOP WTFFFF?!?!?!!?1//!?1/!/?!/
	end
	end
	
	cmp	r1, #1 ; if * 1
	moveq	r15, r14
	end
	end
	
	cmp	r1, #2 ; if * 2
	lsleq	r0, r0, #1
	moveq	r15, r14
	end
	
	cmp	r1, #3 ; if * 3
	lsleq	r1, r0, #1
	addeq	r0, r1, r0
	moveq	r15, r14
	
	cmp	r1, #4 ; if * 4
	lsleq	r0, r0, #2
	moveq	r15, r14
	end
	
m_nz	cmp	r1, #38 ; if small, use add instead,
	;	to compensate for cycle count in main
	;	46 on VisUAL2, terrible software, these two
	bhi	m_bw
	mov	r2, r0
	sub	r1, r1, #1
m_add	add	r0, r0, r2
	subs	r1, r1, #1
	bne	m_add
	mov	r15, r14
m_bw	eor	r2, r2, r2 ; x86 moment
	mov	r3, #31
	mov	r4, #1
m_main
	;-------------
	tst	r0, r4, lsl r3
	addne	r2, r2, r1, lsl r3
	subs	r3, r3, r4
	;moveq	r15, r14
	;	uncomment this, change bne to b and copy this
	;	block over to reduce cycles from branching
	;-------------
	bne	m_main
	mov	r0, r2
	mov	r15, r14
m_exc	mov	r0, #-1
	mov	r1, #-1
	mov	r2, #-1
	end
	
	;ldmea	r13!, {r0, r1, r2} ; pop
	;stmea	r13!, {r0, r1, r2} ; push