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"""
This implements a simple SPI slave.  It will run on PYBv1.0 and PYBv1.1.
The SPI slave logic is done in software and can cope with an SPI clock
frequency up to 125kHz.

There is no CS line, only SCLK, MOSI, MISO.

Clock format must be mode=0, which is polarity=CPOL=0, phase=CPHA=0 (clock
is low when idle and high when active, and data is sampled on first, rising
edge of clock).

dpgeorge

#!/usr/bin/env python

import time
import argparse
import serial

def drain_input(ser):
    time.sleep(0.1)
    while ser.inWaiting() > 0:
        print('drain:', ser.read(ser.inWaiting())[:20])

dpgeorge

#!/usr/bin/env python

import time
import argparse
import serial

def bootloader(dev):
    ser = serial.Serial(dev)
    time.sleep(0.1)
    while ser.inWaiting() > 0:

dpgeorge

# cycle through standby, stop, wfi, run modes
# uses either rtc wakeup or switch extint
# put pyb.usb_mode(None) in boot.py to save more power
# can also select lower CPU freq using, eg, pyb.freq(64000000)

import pyb, stm
from pyb import Pin

def low_power_test():
    rtc = pyb.RTC()

dpgeorge

// simple, minimal deflate/inflate code
// copyright 2010, Damien P. George

import "std.h";
import "iobuf.h";

uint con BSIZE = 1024;

type buf_history = (
    byte own# buf,