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dragondgold/omap4-panda-es.dts

Last active September 22, 2015 20:13
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Arch Linux - Complete Device Tree Overlay with working UART4 for Pandaboard-ES. Compiled dtb available here: https://copy.com/MV39RCEDxavSpqsR
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omap4-panda-es.dts
/dts-v1/;
/ {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "ti,omap4-panda-es", "ti,omap4-panda", "ti,omap4460", "ti,omap4430", "ti,omap4";
interrupt-parent = <0x1>;
model = "TI OMAP4 PandaBoard-ES";
chosen {
};
aliases {
i2c0 = "/ocp/i2c@48070000";
i2c1 = "/ocp/i2c@48072000";
i2c2 = "/ocp/i2c@48060000";
i2c3 = "/ocp/i2c@48350000";
serial0 = "/ocp/serial@4806a000";
serial1 = "/ocp/serial@4806c000";
serial2 = "/ocp/serial@48020000";
serial3 = "/ocp/serial@4806e000";
display0 = "/connector@0";
display1 = "/connector@1";
};
memory {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
cpus {
#address-cells = <0x1>;
#size-cells = <0x0>;
cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
next-level-cache = <0x2>;
reg = <0x0>;
clocks = <0x3>;
clock-names = "cpu";
clock-latency = <0x493e0>;
operating-points = <0x55730 0xfa3e8 0xaae60 0x124f80 0xe09c0 0x1408e8>;
cooling-min-level = <0x0>;
cooling-max-level = <0x2>;
#cooling-cells = <0x2>;
linux,phandle = <0xa7>;
phandle = <0xa7>;
};
cpu@1 {
compatible = "arm,cortex-a9";
device_type = "cpu";
next-level-cache = <0x2>;
reg = <0x1>;
};
};
interrupt-controller@48241000 {
compatible = "arm,cortex-a9-gic";
interrupt-controller;
#interrupt-cells = <0x3>;
reg = <0x48241000 0x1000 0x48240100 0x100>;
interrupt-parent = <0x4>;
linux,phandle = <0x4>;
phandle = <0x4>;
};
l2-cache-controller@48242000 {
compatible = "arm,pl310-cache";
reg = <0x48242000 0x1000>;
cache-unified;
cache-level = <0x2>;
linux,phandle = <0x2>;
phandle = <0x2>;
};
local-timer@48240600 {
compatible = "arm,cortex-a9-twd-timer";
clocks = <0x5>;
reg = <0x48240600 0x20>;
interrupts = <0x1 0xd 0x304>;
interrupt-parent = <0x4>;
};
interrupt-controller@48281000 {
compatible = "ti,omap4-wugen-mpu";
interrupt-controller;
#interrupt-cells = <0x3>;
reg = <0x48281000 0x1000>;
interrupt-parent = <0x4>;
linux,phandle = <0x1>;
phandle = <0x1>;
};
soc {
compatible = "ti,omap-infra";
mpu {
compatible = "ti,omap4-mpu";
ti,hwmods = "mpu";
sram = <0x6>;
};
dsp {
compatible = "ti,omap3-c64";
ti,hwmods = "dsp";
};
iva {
compatible = "ti,ivahd";
ti,hwmods = "iva";
};
};
ocp {
compatible = "ti,omap4-l3-noc", "simple-bus";
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
reg = <0x44000000 0x1000 0x44800000 0x2000 0x45000000 0x1000>;
interrupts = <0x0 0x9 0x4 0x0 0xa 0x4>;
l4@4a000000 { // pinctrl base address 4a000000
compatible = "ti,omap4-l4-cfg", "simple-bus";
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges = <0x0 0x4a000000 0x1000000>;
linux,phandle = <0xb6>;
phandle = <0xb6>;
cm1@4000 {
compatible = "ti,omap4-cm1";
reg = <0x4000 0x2000>;
linux,phandle = <0xb7>;
phandle = <0xb7>;
clocks {
#address-cells = <0x1>;
#size-cells = <0x0>;
linux,phandle = <0xb8>;
phandle = <0xb8>;
extalt_clkin_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x38444c0>;
linux,phandle = <0x3a>;
phandle = <0x3a>;
};
pad_clks_src_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0xb71b00>;
linux,phandle = <0x7>;
phandle = <0x7>;
};
pad_clks_ck {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x7>;
ti,bit-shift = <0x8>;
reg = <0x108>;
linux,phandle = <0x26>;
phandle = <0x26>;
};
pad_slimbus_core_clks_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0xb71b00>;
linux,phandle = <0x46>;
phandle = <0x46>;
};
secure_32k_clk_src_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x8000>;
linux,phandle = <0xb9>;
phandle = <0xb9>;
};
slimbus_src_clk {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0xb71b00>;
linux,phandle = <0x8>;
phandle = <0x8>;
};
slimbus_clk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x8>;
ti,bit-shift = <0xa>;
reg = <0x108>;
linux,phandle = <0x27>;
phandle = <0x27>;
};
sys_32k_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x8000>;
linux,phandle = <0x2c>;
phandle = <0x2c>;
};
virt_12000000_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0xb71b00>;
linux,phandle = <0x58>;
phandle = <0x58>;
};
virt_13000000_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0xc65d40>;
linux,phandle = <0x59>;
phandle = <0x59>;
};
virt_16800000_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x1005900>;
linux,phandle = <0x5a>;
phandle = <0x5a>;
};
virt_19200000_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x124f800>;
linux,phandle = <0x5b>;
phandle = <0x5b>;
};
virt_26000000_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x18cba80>;
linux,phandle = <0x5c>;
phandle = <0x5c>;
};
virt_27000000_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x19bfcc0>;
linux,phandle = <0x5d>;
phandle = <0x5d>;
};
virt_38400000_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x249f000>;
linux,phandle = <0x5e>;
phandle = <0x5e>;
};
tie_low_clock_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x0>;
linux,phandle = <0x62>;
phandle = <0x62>;
};
utmi_phy_clkout_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x3938700>;
linux,phandle = <0x4d>;
phandle = <0x4d>;
};
xclk60mhsp1_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x3938700>;
linux,phandle = <0x49>;
phandle = <0x49>;
};
xclk60mhsp2_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x3938700>;
linux,phandle = <0x4b>;
phandle = <0x4b>;
};
xclk60motg_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x3938700>;
linux,phandle = <0x4e>;
phandle = <0x4e>;
};
dpll_abe_ck {
#clock-cells = <0x0>;
compatible = "ti,omap4-dpll-m4xen-clock";
clocks = <0x9 0xa>;
reg = <0x1e0 0x1e4 0x1ec 0x1e8>;
linux,phandle = <0xb>;
phandle = <0xb>;
};
dpll_abe_x2_ck {
#clock-cells = <0x0>;
compatible = "ti,omap4-dpll-x2-clock";
clocks = <0xb>;
reg = <0x1f0>;
linux,phandle = <0xc>;
phandle = <0xc>;
};
dpll_abe_m2x2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0xc>;
ti,max-div = <0x1f>;
ti,autoidle-shift = <0x8>;
reg = <0x1f0>;
ti,index-starts-at-one;
ti,invert-autoidle-bit;
linux,phandle = <0xd>;
phandle = <0xd>;
};
abe_24m_fclk {
#clock-cells = <0x0>;
compatible = "fixed-factor-clock";
clocks = <0xd>;
clock-mult = <0x1>;
clock-div = <0x8>;
linux,phandle = <0x22>;
phandle = <0x22>;
};
abe_clk {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0xd>;
ti,max-div = <0x4>;
reg = <0x108>;
ti,index-power-of-two;
linux,phandle = <0xe>;
phandle = <0xe>;
};
aess_fclk {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0xe>;
ti,bit-shift = <0x18>;
ti,max-div = <0x2>;
reg = <0x528>;
linux,phandle = <0x20>;
phandle = <0x20>;
};
dpll_abe_m3x2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0xc>;
ti,max-div = <0x1f>;
ti,autoidle-shift = <0x8>;
reg = <0x1f4>;
ti,index-starts-at-one;
ti,invert-autoidle-bit;
linux,phandle = <0x10>;
phandle = <0x10>;
};
core_hsd_byp_clk_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0xf 0x10>;
ti,bit-shift = <0x17>;
reg = <0x12c>;
linux,phandle = <0x11>;
phandle = <0x11>;
};
dpll_core_ck {
#clock-cells = <0x0>;
compatible = "ti,omap4-dpll-core-clock";
clocks = <0xf 0x11>;
reg = <0x120 0x124 0x12c 0x128>;
linux,phandle = <0x12>;
phandle = <0x12>;
};
dpll_core_x2_ck {
#clock-cells = <0x0>;
compatible = "ti,omap4-dpll-x2-clock";
clocks = <0x12>;
linux,phandle = <0x13>;
phandle = <0x13>;
};
dpll_core_m6x2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x13>;
ti,max-div = <0x1f>;
ti,autoidle-shift = <0x8>;
reg = <0x140>;
ti,index-starts-at-one;
ti,invert-autoidle-bit;
linux,phandle = <0x61>;
phandle = <0x61>;
};
dpll_core_m2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x12>;
ti,max-div = <0x1f>;
ti,autoidle-shift = <0x8>;
reg = <0x130>;
ti,index-starts-at-one;
ti,invert-autoidle-bit;
linux,phandle = <0x14>;
phandle = <0x14>;
};
ddrphy_ck {
#clock-cells = <0x0>;
compatible = "fixed-factor-clock";
clocks = <0x14>;
clock-mult = <0x1>;
clock-div = <0x2>;
linux,phandle = <0xba>;
phandle = <0xba>;
};
dpll_core_m5x2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x13>;
ti,max-div = <0x1f>;
ti,autoidle-shift = <0x8>;
reg = <0x13c>;
ti,index-starts-at-one;
ti,invert-autoidle-bit;
linux,phandle = <0x15>;
phandle = <0x15>;
};
div_core_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x15>;
reg = <0x100>;
ti,max-div = <0x2>;
linux,phandle = <0x1e>;
phandle = <0x1e>;
};
div_iva_hs_clk {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x15>;
ti,max-div = <0x4>;
reg = <0x1dc>;
ti,index-power-of-two;
linux,phandle = <0x19>;
phandle = <0x19>;
};
div_mpu_hs_clk {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x15>;
ti,max-div = <0x4>;
reg = <0x19c>;
ti,index-power-of-two;
linux,phandle = <0x1d>;
phandle = <0x1d>;
};
dpll_core_m4x2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x13>;
ti,max-div = <0x1f>;
ti,autoidle-shift = <0x8>;
reg = <0x138>;
ti,index-starts-at-one;
ti,invert-autoidle-bit;
linux,phandle = <0x16>;
phandle = <0x16>;
};
dll_clk_div_ck {
#clock-cells = <0x0>;
compatible = "fixed-factor-clock";
clocks = <0x16>;
clock-mult = <0x1>;
clock-div = <0x2>;
linux,phandle = <0xbb>;
phandle = <0xbb>;
};
dpll_abe_m2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0xb>;
ti,max-div = <0x1f>;
reg = <0x1f0>;
ti,index-starts-at-one;
linux,phandle = <0x21>;
phandle = <0x21>;
};
dpll_core_m3x2_gate_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-no-wait-gate-clock";
clocks = <0x13>;
ti,bit-shift = <0x8>;
reg = <0x134>;
linux,phandle = <0x17>;
phandle = <0x17>;
};
dpll_core_m3x2_div_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-divider-clock";
clocks = <0x13>;
ti,max-div = <0x1f>;
reg = <0x134>;
ti,index-starts-at-one;
linux,phandle = <0x18>;
phandle = <0x18>;
};
dpll_core_m3x2_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-clock";
clocks = <0x17 0x18>;
linux,phandle = <0x68>;
phandle = <0x68>;
};
dpll_core_m7x2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x13>;
ti,max-div = <0x1f>;
ti,autoidle-shift = <0x8>;
reg = <0x144>;
ti,index-starts-at-one;
ti,invert-autoidle-bit;
linux,phandle = <0x3d>;
phandle = <0x3d>;
};
iva_hsd_byp_clk_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0xf 0x19>;
ti,bit-shift = <0x17>;
reg = <0x1ac>;
linux,phandle = <0x1a>;
phandle = <0x1a>;
};
dpll_iva_ck {
#clock-cells = <0x0>;
compatible = "ti,omap4-dpll-clock";
clocks = <0xf 0x1a>;
reg = <0x1a0 0x1a4 0x1ac 0x1a8>;
linux,phandle = <0x1b>;
phandle = <0x1b>;
};
dpll_iva_x2_ck {
#clock-cells = <0x0>;
compatible = "ti,omap4-dpll-x2-clock";
clocks = <0x1b>;
linux,phandle = <0x1c>;
phandle = <0x1c>;
};
dpll_iva_m4x2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x1c>;
ti,max-div = <0x1f>;
ti,autoidle-shift = <0x8>;
reg = <0x1b8>;
ti,index-starts-at-one;
ti,invert-autoidle-bit;
linux,phandle = <0xbc>;
phandle = <0xbc>;
};
dpll_iva_m5x2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x1c>;
ti,max-div = <0x1f>;
ti,autoidle-shift = <0x8>;
reg = <0x1bc>;
ti,index-starts-at-one;
ti,invert-autoidle-bit;
linux,phandle = <0xbd>;
phandle = <0xbd>;
};
dpll_mpu_ck {
#clock-cells = <0x0>;
compatible = "ti,omap4-dpll-clock";
clocks = <0xf 0x1d>;
reg = <0x160 0x164 0x16c 0x168>;
linux,phandle = <0x3>;
phandle = <0x3>;
};
dpll_mpu_m2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x3>;
ti,max-div = <0x1f>;
ti,autoidle-shift = <0x8>;
reg = <0x170>;
ti,index-starts-at-one;
ti,invert-autoidle-bit;
linux,phandle = <0xbe>;
phandle = <0xbe>;
};
per_hs_clk_div_ck {
#clock-cells = <0x0>;
compatible = "fixed-factor-clock";
clocks = <0x10>;
clock-mult = <0x1>;
clock-div = <0x2>;
linux,phandle = <0x2d>;
phandle = <0x2d>;
};
usb_hs_clk_div_ck {
#clock-cells = <0x0>;
compatible = "fixed-factor-clock";
clocks = <0x10>;
clock-mult = <0x1>;
clock-div = <0x3>;
linux,phandle = <0x33>;
phandle = <0x33>;
};
l3_div_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x1e>;
ti,bit-shift = <0x4>;
ti,max-div = <0x2>;
reg = <0x100>;
linux,phandle = <0x1f>;
phandle = <0x1f>;
};
l4_div_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x1f>;
ti,bit-shift = <0x8>;
ti,max-div = <0x2>;
reg = <0x100>;
linux,phandle = <0x50>;
phandle = <0x50>;
};
lp_clk_div_ck {
#clock-cells = <0x0>;
compatible = "fixed-factor-clock";
clocks = <0xd>;
clock-mult = <0x1>;
clock-div = <0x10>;
linux,phandle = <0x5f>;
phandle = <0x5f>;
};
mpu_periphclk {
#clock-cells = <0x0>;
compatible = "fixed-factor-clock";
clocks = <0x3>;
clock-mult = <0x1>;
clock-div = <0x2>;
linux,phandle = <0x5>;
phandle = <0x5>;
};
ocp_abe_iclk {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x20>;
ti,bit-shift = <0x18>;
reg = <0x528>;
ti,dividers = <0x2 0x1>;
linux,phandle = <0xbf>;
phandle = <0xbf>;
};
per_abe_24m_fclk {
#clock-cells = <0x0>;
compatible = "fixed-factor-clock";
clocks = <0x21>;
clock-mult = <0x1>;
clock-div = <0x4>;
linux,phandle = <0x44>;
phandle = <0x44>;
};
dmic_sync_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x22 0x23 0x24>;
ti,bit-shift = <0x19>;
reg = <0x538>;
linux,phandle = <0x25>;
phandle = <0x25>;
};
func_dmic_abe_gfclk {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x25 0x26 0x27>;
ti,bit-shift = <0x18>;
reg = <0x538>;
linux,phandle = <0xc0>;
phandle = <0xc0>;
};
mcasp_sync_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x22 0x23 0x24>;
ti,bit-shift = <0x19>;
reg = <0x540>;
linux,phandle = <0x28>;
phandle = <0x28>;
};
func_mcasp_abe_gfclk {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x28 0x26 0x27>;
ti,bit-shift = <0x18>;
reg = <0x540>;
linux,phandle = <0xc1>;
phandle = <0xc1>;
};
mcbsp1_sync_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x22 0x23 0x24>;
ti,bit-shift = <0x19>;
reg = <0x548>;
linux,phandle = <0x29>;
phandle = <0x29>;
};
func_mcbsp1_gfclk {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x29 0x26 0x27>;
ti,bit-shift = <0x18>;
reg = <0x548>;
linux,phandle = <0xc2>;
phandle = <0xc2>;
};
mcbsp2_sync_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x22 0x23 0x24>;
ti,bit-shift = <0x19>;
reg = <0x550>;
linux,phandle = <0x2a>;
phandle = <0x2a>;
};
func_mcbsp2_gfclk {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x2a 0x26 0x27>;
ti,bit-shift = <0x18>;
reg = <0x550>;
linux,phandle = <0xc3>;
phandle = <0xc3>;
};
mcbsp3_sync_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x22 0x23 0x24>;
ti,bit-shift = <0x19>;
reg = <0x558>;
linux,phandle = <0x2b>;
phandle = <0x2b>;
};
func_mcbsp3_gfclk {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x2b 0x26 0x27>;
ti,bit-shift = <0x18>;
reg = <0x558>;
linux,phandle = <0xc4>;
phandle = <0xc4>;
};
slimbus1_fclk_1 {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x24>;
ti,bit-shift = <0x9>;
reg = <0x560>;
linux,phandle = <0xc5>;
phandle = <0xc5>;
};
slimbus1_fclk_0 {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x22>;
ti,bit-shift = <0x8>;
reg = <0x560>;
linux,phandle = <0xc6>;
phandle = <0xc6>;
};
slimbus1_fclk_2 {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x26>;
ti,bit-shift = <0xa>;
reg = <0x560>;
linux,phandle = <0xc7>;
phandle = <0xc7>;
};
slimbus1_slimbus_clk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x27>;
ti,bit-shift = <0xb>;
reg = <0x560>;
linux,phandle = <0xc8>;
phandle = <0xc8>;
};
timer5_sync_mux {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x23 0x2c>;
ti,bit-shift = <0x18>;
reg = <0x568>;
linux,phandle = <0xc9>;
phandle = <0xc9>;
};
timer6_sync_mux {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x23 0x2c>;
ti,bit-shift = <0x18>;
reg = <0x570>;
linux,phandle = <0xca>;
phandle = <0xca>;
};
timer7_sync_mux {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x23 0x2c>;
ti,bit-shift = <0x18>;
reg = <0x578>;
linux,phandle = <0xcb>;
phandle = <0xcb>;
};
timer8_sync_mux {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x23 0x2c>;
ti,bit-shift = <0x18>;
reg = <0x580>;
linux,phandle = <0xcc>;
phandle = <0xcc>;
};
dummy_ck {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x0>;
linux,phandle = <0xcd>;
phandle = <0xcd>;
};
};
clockdomains {
linux,phandle = <0xce>;
phandle = <0xce>;
};
};
cm2@8000 {
compatible = "ti,omap4-cm2";
reg = <0x8000 0x3000>;
linux,phandle = <0xcf>;
phandle = <0xcf>;
clocks {
#address-cells = <0x1>;
#size-cells = <0x0>;
linux,phandle = <0xd0>;
phandle = <0xd0>;
per_hsd_byp_clk_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0xf 0x2d>;
ti,bit-shift = <0x17>;
reg = <0x14c>;
linux,phandle = <0x2e>;
phandle = <0x2e>;
};
dpll_per_ck {
#clock-cells = <0x0>;
compatible = "ti,omap4-dpll-clock";
clocks = <0xf 0x2e>;
reg = <0x140 0x144 0x14c 0x148>;
linux,phandle = <0x2f>;
phandle = <0x2f>;
};
dpll_per_m2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x2f>;
ti,max-div = <0x1f>;
reg = <0x150>;
ti,index-starts-at-one;
linux,phandle = <0x37>;
phandle = <0x37>;
};
dpll_per_x2_ck {
#clock-cells = <0x0>;
compatible = "ti,omap4-dpll-x2-clock";
clocks = <0x2f>;
reg = <0x150>;
linux,phandle = <0x30>;
phandle = <0x30>;
};
dpll_per_m2x2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x30>;
ti,max-div = <0x1f>;
ti,autoidle-shift = <0x8>;
reg = <0x150>;
ti,index-starts-at-one;
ti,invert-autoidle-bit;
linux,phandle = <0x36>;
phandle = <0x36>;
};
dpll_per_m3x2_gate_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-no-wait-gate-clock";
clocks = <0x30>;
ti,bit-shift = <0x8>;
reg = <0x154>;
linux,phandle = <0x31>;
phandle = <0x31>;
};
dpll_per_m3x2_div_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-divider-clock";
clocks = <0x30>;
ti,max-div = <0x1f>;
reg = <0x154>;
ti,index-starts-at-one;
linux,phandle = <0x32>;
phandle = <0x32>;
};
dpll_per_m3x2_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-clock";
clocks = <0x31 0x32>;
linux,phandle = <0x69>;
phandle = <0x69>;
};
dpll_per_m4x2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x30>;
ti,max-div = <0x1f>;
ti,autoidle-shift = <0x8>;
reg = <0x158>;
ti,index-starts-at-one;
ti,invert-autoidle-bit;
linux,phandle = <0x38>;
phandle = <0x38>;
};
dpll_per_m5x2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x30>;
ti,max-div = <0x1f>;
ti,autoidle-shift = <0x8>;
reg = <0x15c>;
ti,index-starts-at-one;
ti,invert-autoidle-bit;
linux,phandle = <0x3b>;
phandle = <0x3b>;
};
dpll_per_m6x2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x30>;
ti,max-div = <0x1f>;
ti,autoidle-shift = <0x8>;
reg = <0x160>;
ti,index-starts-at-one;
ti,invert-autoidle-bit;
linux,phandle = <0x35>;
phandle = <0x35>;
};
dpll_per_m7x2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x30>;
ti,max-div = <0x1f>;
ti,autoidle-shift = <0x8>;
reg = <0x164>;
ti,index-starts-at-one;
ti,invert-autoidle-bit;
linux,phandle = <0x3e>;
phandle = <0x3e>;
};
dpll_usb_ck {
#clock-cells = <0x0>;
compatible = "ti,omap4-dpll-j-type-clock";
clocks = <0xf 0x33>;
reg = <0x180 0x184 0x18c 0x188>;
linux,phandle = <0x34>;
phandle = <0x34>;
};
dpll_usb_clkdcoldo_ck {
#clock-cells = <0x0>;
compatible = "ti,fixed-factor-clock";
clocks = <0x34>;
ti,clock-div = <0x1>;
ti,autoidle-shift = <0x8>;
reg = <0x1b4>;
ti,clock-mult = <0x1>;
ti,invert-autoidle-bit;
linux,phandle = <0xd1>;
phandle = <0xd1>;
};
dpll_usb_m2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x34>;
ti,max-div = <0x7f>;
ti,autoidle-shift = <0x8>;
reg = <0x190>;
ti,index-starts-at-one;
ti,invert-autoidle-bit;
linux,phandle = <0x39>;
phandle = <0x39>;
};
ducati_clk_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x1e 0x35>;
reg = <0x100>;
linux,phandle = <0xd2>;
phandle = <0xd2>;
};
func_12m_fclk {
#clock-cells = <0x0>;
compatible = "fixed-factor-clock";
clocks = <0x36>;
clock-mult = <0x1>;
clock-div = <0x10>;
linux,phandle = <0xd3>;
phandle = <0xd3>;
};
func_24m_clk {
#clock-cells = <0x0>;
compatible = "fixed-factor-clock";
clocks = <0x37>;
clock-mult = <0x1>;
clock-div = <0x4>;
linux,phandle = <0x24>;
phandle = <0x24>;
};
func_24mc_fclk {
#clock-cells = <0x0>;
compatible = "fixed-factor-clock";
clocks = <0x36>;
clock-mult = <0x1>;
clock-div = <0x8>;
linux,phandle = <0x45>;
phandle = <0x45>;
};
func_48m_fclk {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x36>;
reg = <0x108>;
ti,dividers = <0x4 0x8>;
linux,phandle = <0x43>;
phandle = <0x43>;
};
func_48mc_fclk {
#clock-cells = <0x0>;
compatible = "fixed-factor-clock";
clocks = <0x36>;
clock-mult = <0x1>;
clock-div = <0x4>;
linux,phandle = <0x3c>;
phandle = <0x3c>;
};
func_64m_fclk {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x38>;
reg = <0x108>;
ti,dividers = <0x2 0x4>;
linux,phandle = <0x42>;
phandle = <0x42>;
};
func_96m_fclk {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x36>;
reg = <0x108>;
ti,dividers = <0x2 0x4>;
linux,phandle = <0x3f>;
phandle = <0x3f>;
};
init_60m_fclk {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x39>;
reg = <0x104>;
ti,dividers = <0x1 0x8>;
linux,phandle = <0x48>;
phandle = <0x48>;
};
per_abe_nc_fclk {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x21>;
reg = <0x108>;
ti,max-div = <0x2>;
linux,phandle = <0x40>;
phandle = <0x40>;
};
aes1_fck {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x1f>;
ti,bit-shift = <0x1>;
reg = <0x15a0>;
linux,phandle = <0xd4>;
phandle = <0xd4>;
};
aes2_fck {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x1f>;
ti,bit-shift = <0x1>;
reg = <0x15a8>;
linux,phandle = <0xd5>;
phandle = <0xd5>;
};
dss_sys_clk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x23>;
ti,bit-shift = <0xa>;
reg = <0x1120>;
linux,phandle = <0x9e>;
phandle = <0x9e>;
};
dss_tv_clk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x3a>;
ti,bit-shift = <0xb>;
reg = <0x1120>;
linux,phandle = <0x9d>;
phandle = <0x9d>;
};
dss_dss_clk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x3b>;
ti,bit-shift = <0x8>;
reg = <0x1120>;
ti,set-rate-parent;
linux,phandle = <0x9c>;
phandle = <0x9c>;
};
dss_48mhz_clk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x3c>;
ti,bit-shift = <0x9>;
reg = <0x1120>;
linux,phandle = <0xa0>;
phandle = <0xa0>;
};
fdif_fck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x38>;
ti,bit-shift = <0x18>;
ti,max-div = <0x4>;
reg = <0x1028>;
ti,index-power-of-two;
linux,phandle = <0xd6>;
phandle = <0xd6>;
};
gpio2_dbclk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x2c>;
ti,bit-shift = <0x8>;
reg = <0x1460>;
linux,phandle = <0xd7>;
phandle = <0xd7>;
};
gpio3_dbclk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x2c>;
ti,bit-shift = <0x8>;
reg = <0x1468>;
linux,phandle = <0xd8>;
phandle = <0xd8>;
};
gpio4_dbclk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x2c>;
ti,bit-shift = <0x8>;
reg = <0x1470>;
linux,phandle = <0xd9>;
phandle = <0xd9>;
};
gpio5_dbclk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x2c>;
ti,bit-shift = <0x8>;
reg = <0x1478>;
linux,phandle = <0xda>;
phandle = <0xda>;
};
gpio6_dbclk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x2c>;
ti,bit-shift = <0x8>;
reg = <0x1480>;
linux,phandle = <0xdb>;
phandle = <0xdb>;
};
sgx_clk_mux {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x3d 0x3e>;
ti,bit-shift = <0x18>;
reg = <0x1220>;
linux,phandle = <0xdc>;
phandle = <0xdc>;
};
hsi_fck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x36>;
ti,bit-shift = <0x18>;
ti,max-div = <0x4>;
reg = <0x1338>;
ti,index-power-of-two;
linux,phandle = <0xdd>;
phandle = <0xdd>;
};
iss_ctrlclk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x3f>;
ti,bit-shift = <0x8>;
reg = <0x1020>;
linux,phandle = <0xde>;
phandle = <0xde>;
};
mcbsp4_sync_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x3f 0x40>;
ti,bit-shift = <0x19>;
reg = <0x14e0>;
linux,phandle = <0x41>;
phandle = <0x41>;
};
per_mcbsp4_gfclk {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x41 0x26>;
ti,bit-shift = <0x18>;
reg = <0x14e0>;
linux,phandle = <0xdf>;
phandle = <0xdf>;
};
hsmmc1_fclk {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x42 0x3f>;
ti,bit-shift = <0x18>;
reg = <0x1328>;
linux,phandle = <0xe0>;
phandle = <0xe0>;
};
hsmmc2_fclk {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x42 0x3f>;
ti,bit-shift = <0x18>;
reg = <0x1330>;
linux,phandle = <0xe1>;
phandle = <0xe1>;
};
ocp2scp_usb_phy_phy_48m {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x43>;
ti,bit-shift = <0x8>;
reg = <0x13e0>;
linux,phandle = <0xe2>;
phandle = <0xe2>;
};
sha2md5_fck {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x1f>;
ti,bit-shift = <0x1>;
reg = <0x15c8>;
linux,phandle = <0xe3>;
phandle = <0xe3>;
};
slimbus2_fclk_1 {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x44>;
ti,bit-shift = <0x9>;
reg = <0x1538>;
linux,phandle = <0xe4>;
phandle = <0xe4>;
};
slimbus2_fclk_0 {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x45>;
ti,bit-shift = <0x8>;
reg = <0x1538>;
linux,phandle = <0xe5>;
phandle = <0xe5>;
};
slimbus2_slimbus_clk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x46>;
ti,bit-shift = <0xa>;
reg = <0x1538>;
linux,phandle = <0xe6>;
phandle = <0xe6>;
};
smartreflex_core_fck {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x47>;
ti,bit-shift = <0x1>;
reg = <0x638>;
linux,phandle = <0xe7>;
phandle = <0xe7>;
};
smartreflex_iva_fck {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x47>;
ti,bit-shift = <0x1>;
reg = <0x630>;
linux,phandle = <0xe8>;
phandle = <0xe8>;
};
smartreflex_mpu_fck {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x47>;
ti,bit-shift = <0x1>;
reg = <0x628>;
linux,phandle = <0xe9>;
phandle = <0xe9>;
};
cm2_dm10_mux {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0xf 0x2c>;
ti,bit-shift = <0x18>;
reg = <0x1428>;
linux,phandle = <0xea>;
phandle = <0xea>;
};
cm2_dm11_mux {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0xf 0x2c>;
ti,bit-shift = <0x18>;
reg = <0x1430>;
linux,phandle = <0xeb>;
phandle = <0xeb>;
};
cm2_dm2_mux {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0xf 0x2c>;
ti,bit-shift = <0x18>;
reg = <0x1438>;
linux,phandle = <0xec>;
phandle = <0xec>;
};
cm2_dm3_mux {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0xf 0x2c>;
ti,bit-shift = <0x18>;
reg = <0x1440>;
linux,phandle = <0xed>;
phandle = <0xed>;
};
cm2_dm4_mux {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0xf 0x2c>;
ti,bit-shift = <0x18>;
reg = <0x1448>;
linux,phandle = <0xee>;
phandle = <0xee>;
};
cm2_dm9_mux {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0xf 0x2c>;
ti,bit-shift = <0x18>;
reg = <0x1450>;
linux,phandle = <0xef>;
phandle = <0xef>;
};
usb_host_fs_fck {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x3c>;
ti,bit-shift = <0x1>;
reg = <0x13d0>;
linux,phandle = <0x51>;
phandle = <0x51>;
};
utmi_p1_gfclk {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x48 0x49>;
ti,bit-shift = <0x18>;
reg = <0x1358>;
linux,phandle = <0x4a>;
phandle = <0x4a>;
};
usb_host_hs_utmi_p1_clk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x4a>;
ti,bit-shift = <0x8>;
reg = <0x1358>;
linux,phandle = <0xf0>;
phandle = <0xf0>;
};
utmi_p2_gfclk {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x48 0x4b>;
ti,bit-shift = <0x19>;
reg = <0x1358>;
linux,phandle = <0x4c>;
phandle = <0x4c>;
};
usb_host_hs_utmi_p2_clk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x4c>;
ti,bit-shift = <0x9>;
reg = <0x1358>;
linux,phandle = <0xf1>;
phandle = <0xf1>;
};
usb_host_hs_utmi_p3_clk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x48>;
ti,bit-shift = <0xa>;
reg = <0x1358>;
linux,phandle = <0xf2>;
phandle = <0xf2>;
};
usb_host_hs_hsic480m_p1_clk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x39>;
ti,bit-shift = <0xd>;
reg = <0x1358>;
linux,phandle = <0xf3>;
phandle = <0xf3>;
};
usb_host_hs_hsic60m_p1_clk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x48>;
ti,bit-shift = <0xb>;
reg = <0x1358>;
linux,phandle = <0xf4>;
phandle = <0xf4>;
};
usb_host_hs_hsic60m_p2_clk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x48>;
ti,bit-shift = <0xc>;
reg = <0x1358>;
linux,phandle = <0xf5>;
phandle = <0xf5>;
};
usb_host_hs_hsic480m_p2_clk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x39>;
ti,bit-shift = <0xe>;
reg = <0x1358>;
linux,phandle = <0xf6>;
phandle = <0xf6>;
};
usb_host_hs_func48mclk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x3c>;
ti,bit-shift = <0xf>;
reg = <0x1358>;
linux,phandle = <0xf7>;
phandle = <0xf7>;
};
usb_host_hs_fck {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x48>;
ti,bit-shift = <0x1>;
reg = <0x1358>;
linux,phandle = <0xf8>;
phandle = <0xf8>;
};
otg_60m_gfclk {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x4d 0x4e>;
ti,bit-shift = <0x18>;
reg = <0x1360>;
linux,phandle = <0x4f>;
phandle = <0x4f>;
};
usb_otg_hs_xclk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x4f>;
ti,bit-shift = <0x8>;
reg = <0x1360>;
linux,phandle = <0xf9>;
phandle = <0xf9>;
};
usb_otg_hs_ick {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x1f>;
ti,bit-shift = <0x0>;
reg = <0x1360>;
linux,phandle = <0xfa>;
phandle = <0xfa>;
};
usb_phy_cm_clk32k {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x2c>;
ti,bit-shift = <0x8>;
reg = <0x640>;
linux,phandle = <0x98>;
phandle = <0x98>;
};
usb_tll_hs_usb_ch2_clk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x48>;
ti,bit-shift = <0xa>;
reg = <0x1368>;
linux,phandle = <0xfb>;
phandle = <0xfb>;
};
usb_tll_hs_usb_ch0_clk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x48>;
ti,bit-shift = <0x8>;
reg = <0x1368>;
linux,phandle = <0xfc>;
phandle = <0xfc>;
};
usb_tll_hs_usb_ch1_clk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x48>;
ti,bit-shift = <0x9>;
reg = <0x1368>;
linux,phandle = <0xfd>;
phandle = <0xfd>;
};
usb_tll_hs_ick {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x50>;
ti,bit-shift = <0x0>;
reg = <0x1368>;
linux,phandle = <0xfe>;
phandle = <0xfe>;
};
};
clockdomains {
linux,phandle = <0xff>;
phandle = <0xff>;
l3_init_clkdm {
compatible = "ti,clockdomain";
clocks = <0x34 0x51>;
linux,phandle = <0x100>;
phandle = <0x100>;
};
};
};
scm@2000 {
compatible = "ti,omap4-scm-core", "simple-bus";
reg = <0x2000 0x1000>;
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges = <0x0 0x2000 0x1000>;
linux,phandle = <0x101>;
phandle = <0x101>;
scm_conf@0 {
compatible = "syscon";
reg = <0x0 0x800>;
#address-cells = <0x1>;
#size-cells = <0x1>;
linux,phandle = <0x102>;
phandle = <0x102>;
};
};
scm@100000 {
compatible = "ti,omap4-scm-padconf-core", "simple-bus";
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges = <0x0 0x100000 0x1000>;
linux,phandle = <0x103>;
phandle = <0x103>;
pinmux@40 {
compatible = "ti,omap4-padconf", "pinctrl-single";
reg = <0x40 0x196>;
#address-cells = <0x1>;
#size-cells = <0x0>;
#interrupt-cells = <0x1>;
interrupt-controller;
pinctrl-single,register-width = <0x10>;
pinctrl-single,function-mask = <0x7fff>;
pinctrl-names = "default";
pinctrl-0 = <0x52 0x53 0x54 0x55 0x56>;
linux,phandle = <0x82>;
phandle = <0x82>;
pinmux_twl6040_pins {
pinctrl-single,pins = <0xe0 0x3 0x160 0x100>;
linux,phandle = <0x87>;
phandle = <0x87>;
};
pinmux_mcpdm_pins {
pinctrl-single,pins = <0xc6 0x108 0xc8 0x108 0xca 0x118 0xcc 0x108 0xce 0x108>;
linux,phandle = <0x94>;
phandle = <0x94>;
};
pinmux_mcbsp1_pins {
pinctrl-single,pins = <0xbe 0x100 0xc0 0x108 0xc2 0x8 0xc4 0x100>;
linux,phandle = <0x95>;
phandle = <0x95>;
};
pinmux_dss_dpi_pins {
pinctrl-single,pins = <0x122 0x5 0x124 0x5 0x126 0x5 0x128 0x5 0x12a 0x5 0x12c 0x5 0x12e 0x5 0x130 0x5 0x132 0x5 0x134 0x5 0x136 0x5 0x174 0x5 0x176 0x5 0x178 0x5 0x17a 0x5 0x17c 0x5 0x17e 0x5 0x180 0x5 0x182 0x5 0x184 0x5 0x186 0x5 0x188 0x5 0x18a 0x5 0x18c 0x5 0x18e 0x5 0x190 0x5 0x192 0x5 0x194 0x5>;
linux,phandle = <0x52>;
phandle = <0x52>;
};
pinmux_tfp410_pins {
pinctrl-single,pins = <0x144 0x3>;
linux,phandle = <0x53>;
phandle = <0x53>;
};
pinmux_dss_hdmi_pins {
pinctrl-single,pins = <0x5a 0x118 0x5c 0x100 0x5e 0x100>;
linux,phandle = <0x54>;
phandle = <0x54>;
};
pinmux_tpd12s015_pins {
pinctrl-single,pins = <0x22 0x3 0x48 0x3 0x58 0x10b>;
linux,phandle = <0x55>;
phandle = <0x55>;
};
pinmux_hsusbb1_pins {
pinctrl-single,pins = <0x82 0x10c 0x84 0x4 0x86 0x10c 0x88 0x10c 0x8a 0x10c 0x8c 0x10c 0x8e 0x10c 0x90 0x10c 0x92 0x10c 0x94 0x10c 0x96 0x10c 0x98 0x10c>;
linux,phandle = <0x56>;
phandle = <0x56>;
};
pinmux_i2c1_pins {
pinctrl-single,pins = <0xe2 0x118 0xe4 0x118>;
linux,phandle = <0x83>;
phandle = <0x83>;
};
pinmux_i2c2_pins {
pinctrl-single,pins = <0xe6 0x118 0xe8 0x118>;
linux,phandle = <0x8b>;
phandle = <0x8b>;
};
pinmux_i2c3_pins {
pinctrl-single,pins = <0xea 0x118 0xec 0x118>;
linux,phandle = <0x8c>;
phandle = <0x8c>;
};
pinmux_i2c4_pins {
pinctrl-single,pins = <0xee 0x118 0xf0 0x118>;
linux,phandle = <0x8d>;
phandle = <0x8d>;
};
pinmux_wl12xx_gpio {
pinctrl-single,pins = <0x26 0x3 0x2c 0x3 0x30 0x1b 0x32 0x1b>;
linux,phandle = <0xae>;
phandle = <0xae>;
};
pinmux_wl12xx_pins {
pinctrl-single,pins = <0x38 0x103 0x3a 0x103 0x108 0x118 0x10a 0x118 0x10c 0x118 0x10e 0x118 0x110 0x118 0x112 0x118>;
linux,phandle = <0x91>;
phandle = <0x91>;
};
pinmux_twl6030_pins {
pinctrl-single,pins = <0x15e 0x4118>;
linux,phandle = <0x84>;
phandle = <0x84>;
};
// Set the UART4 MUX, it doesn't come by default so I had to add it
// "linux,phandle" has the same value aas "phandle", it's just a reference number, just make sure
// it is not being used in another part of the tree (it will refuse to compile if you do it wrong)
// The phandle is used for reference in "serial@4806e000" at "pinctrl-0"
pinmux_uart4_pins {
pinctrl-single,pins = <
0x11c 0x100 // uart4_rx.uart4_rx INPUT | MODE0
0x11e 0 // uart4_tx.uart4_tx OUTPUT | MODE0
>;
linux,phandle = <0xfff>;
phandle = <0xfff>;
};
gpio_led_pmx {
pinctrl-single,pins = <0xb6 0x3>;
linux,phandle = <0xa8>;
phandle = <0xa8>;
};
};
omap4_padconf_global@5a0 {
compatible = "syscon", "simple-bus";
reg = <0x5a0 0x170>;
#address-cells = <0x1>;
#size-cells = <0x1>;
linux,phandle = <0x57>;
phandle = <0x57>;
pbias_regulator {
compatible = "ti,pbias-omap";
reg = <0x60 0x4>;
syscon = <0x57>;
linux,phandle = <0x104>;
phandle = <0x104>;
pbias_mmc_omap4 {
regulator-name = "pbias_mmc_omap4";
regulator-min-microvolt = <0x1b7740>;
regulator-max-microvolt = <0x2dc6c0>;
linux,phandle = <0x8f>;
phandle = <0x8f>;
};
};
};
};
l4@300000 {
compatible = "ti,omap4-l4-wkup", "simple-bus";
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges = <0x0 0x300000 0x40000>;
linux,phandle = <0x105>;
phandle = <0x105>;
counter@4000 {
compatible = "ti,omap-counter32k";
reg = <0x4000 0x20>;
ti,hwmods = "counter_32k";
linux,phandle = <0x106>;
phandle = <0x106>;
};
prm@6000 {
compatible = "ti,omap4-prm";
reg = <0x6000 0x3000>;
interrupts = <0x0 0xb 0x4>;
linux,phandle = <0x107>;
phandle = <0x107>;
clocks {
#address-cells = <0x1>;
#size-cells = <0x0>;
linux,phandle = <0x108>;
phandle = <0x108>;
sys_clkin_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e>;
reg = <0x110>;
ti,index-starts-at-one;
linux,phandle = <0xf>;
phandle = <0xf>;
};
abe_dpll_bypass_clk_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0xf 0x2c>;
ti,bit-shift = <0x18>;
reg = <0x108>;
linux,phandle = <0xa>;
phandle = <0xa>;
};
abe_dpll_refclk_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0xf 0x2c>;
reg = <0x10c>;
linux,phandle = <0x9>;
phandle = <0x9>;
};
dbgclk_mux_ck {
#clock-cells = <0x0>;
compatible = "fixed-factor-clock";
clocks = <0xf>;
clock-mult = <0x1>;
clock-div = <0x1>;
linux,phandle = <0x109>;
phandle = <0x109>;
};
l4_wkup_clk_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0xf 0x5f>;
reg = <0x108>;
linux,phandle = <0x47>;
phandle = <0x47>;
};
syc_clk_div_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0xf>;
reg = <0x100>;
ti,max-div = <0x2>;
linux,phandle = <0x23>;
phandle = <0x23>;
};
gpio1_dbclk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x2c>;
ti,bit-shift = <0x8>;
reg = <0x1838>;
linux,phandle = <0x10a>;
phandle = <0x10a>;
};
dmt1_clk_mux {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0xf 0x2c>;
ti,bit-shift = <0x18>;
reg = <0x1840>;
linux,phandle = <0x10b>;
phandle = <0x10b>;
};
usim_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x38>;
ti,bit-shift = <0x18>;
reg = <0x1858>;
ti,dividers = <0xe 0x12>;
linux,phandle = <0x60>;
phandle = <0x60>;
};
usim_fclk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x60>;
ti,bit-shift = <0x8>;
reg = <0x1858>;
linux,phandle = <0x10c>;
phandle = <0x10c>;
};
pmd_stm_clock_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0xf 0x61 0x62>;
ti,bit-shift = <0x14>;
reg = <0x1a20>;
linux,phandle = <0x63>;
phandle = <0x63>;
};
pmd_trace_clk_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0xf 0x61 0x62>;
ti,bit-shift = <0x16>;
reg = <0x1a20>;
linux,phandle = <0x64>;
phandle = <0x64>;
};
stm_clk_div_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x63>;
ti,bit-shift = <0x1b>;
ti,max-div = <0x40>;
reg = <0x1a20>;
ti,index-power-of-two;
linux,phandle = <0x10d>;
phandle = <0x10d>;
};
trace_clk_div_div_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x64>;
ti,bit-shift = <0x18>;
reg = <0x1a20>;
ti,dividers = <0x0 0x1 0x2 0x0 0x4>;
linux,phandle = <0x65>;
phandle = <0x65>;
};
trace_clk_div_ck {
#clock-cells = <0x0>;
compatible = "ti,clkdm-gate-clock";
clocks = <0x65>;
linux,phandle = <0x67>;
phandle = <0x67>;
};
div_ts_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x47>;
ti,bit-shift = <0x18>;
reg = <0x1888>;
ti,dividers = <0x8 0x10 0x20>;
linux,phandle = <0x66>;
phandle = <0x66>;
};
bandgap_ts_fclk {
#clock-cells = <0x0>;
compatible = "ti,gate-clock";
clocks = <0x66>;
ti,bit-shift = <0x8>;
reg = <0x1888>;
linux,phandle = <0x10e>;
phandle = <0x10e>;
};
};
clockdomains {
linux,phandle = <0x10f>;
phandle = <0x10f>;
emu_sys_clkdm {
compatible = "ti,clockdomain";
clocks = <0x67>;
linux,phandle = <0x110>;
phandle = <0x110>;
};
};
};
scrm@a000 {
compatible = "ti,omap4-scrm";
reg = <0xa000 0x2000>;
linux,phandle = <0x111>;
phandle = <0x111>;
clocks {
#address-cells = <0x1>;
#size-cells = <0x0>;
linux,phandle = <0x112>;
phandle = <0x112>;
auxclk0_src_gate_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-no-wait-gate-clock";
clocks = <0x68>;
ti,bit-shift = <0x8>;
reg = <0x310>;
linux,phandle = <0x6a>;
phandle = <0x6a>;
};
auxclk0_src_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-mux-clock";
clocks = <0xf 0x68 0x69>;
ti,bit-shift = <0x1>;
reg = <0x310>;
linux,phandle = <0x6b>;
phandle = <0x6b>;
};
auxclk0_src_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-clock";
clocks = <0x6a 0x6b>;
linux,phandle = <0x6c>;
phandle = <0x6c>;
};
auxclk0_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x6c>;
ti,bit-shift = <0x10>;
ti,max-div = <0x10>;
reg = <0x310>;
linux,phandle = <0x7c>;
phandle = <0x7c>;
};
auxclk1_src_gate_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-no-wait-gate-clock";
clocks = <0x68>;
ti,bit-shift = <0x8>;
reg = <0x314>;
linux,phandle = <0x6d>;
phandle = <0x6d>;
};
auxclk1_src_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-mux-clock";
clocks = <0xf 0x68 0x69>;
ti,bit-shift = <0x1>;
reg = <0x314>;
linux,phandle = <0x6e>;
phandle = <0x6e>;
};
auxclk1_src_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-clock";
clocks = <0x6d 0x6e>;
linux,phandle = <0x6f>;
phandle = <0x6f>;
};
auxclk1_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x6f>;
ti,bit-shift = <0x10>;
ti,max-div = <0x10>;
reg = <0x314>;
linux,phandle = <0x7d>;
phandle = <0x7d>;
};
auxclk2_src_gate_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-no-wait-gate-clock";
clocks = <0x68>;
ti,bit-shift = <0x8>;
reg = <0x318>;
linux,phandle = <0x70>;
phandle = <0x70>;
};
auxclk2_src_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-mux-clock";
clocks = <0xf 0x68 0x69>;
ti,bit-shift = <0x1>;
reg = <0x318>;
linux,phandle = <0x71>;
phandle = <0x71>;
};
auxclk2_src_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-clock";
clocks = <0x70 0x71>;
linux,phandle = <0x72>;
phandle = <0x72>;
};
auxclk2_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x72>;
ti,bit-shift = <0x10>;
ti,max-div = <0x10>;
reg = <0x318>;
linux,phandle = <0x7e>;
phandle = <0x7e>;
};
auxclk3_src_gate_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-no-wait-gate-clock";
clocks = <0x68>;
ti,bit-shift = <0x8>;
reg = <0x31c>;
linux,phandle = <0x73>;
phandle = <0x73>;
};
auxclk3_src_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-mux-clock";
clocks = <0xf 0x68 0x69>;
ti,bit-shift = <0x1>;
reg = <0x31c>;
linux,phandle = <0x74>;
phandle = <0x74>;
};
auxclk3_src_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-clock";
clocks = <0x73 0x74>;
linux,phandle = <0x75>;
phandle = <0x75>;
};
auxclk3_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x75>;
ti,bit-shift = <0x10>;
ti,max-div = <0x10>;
reg = <0x31c>;
linux,phandle = <0x7f>;
phandle = <0x7f>;
};
auxclk4_src_gate_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-no-wait-gate-clock";
clocks = <0x68>;
ti,bit-shift = <0x8>;
reg = <0x320>;
linux,phandle = <0x76>;
phandle = <0x76>;
};
auxclk4_src_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-mux-clock";
clocks = <0xf 0x68 0x69>;
ti,bit-shift = <0x1>;
reg = <0x320>;
linux,phandle = <0x77>;
phandle = <0x77>;
};
auxclk4_src_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-clock";
clocks = <0x76 0x77>;
linux,phandle = <0x78>;
phandle = <0x78>;
};
auxclk4_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x78>;
ti,bit-shift = <0x10>;
ti,max-div = <0x10>;
reg = <0x320>;
linux,phandle = <0x80>;
phandle = <0x80>;
};
auxclk5_src_gate_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-no-wait-gate-clock";
clocks = <0x68>;
ti,bit-shift = <0x8>;
reg = <0x324>;
linux,phandle = <0x79>;
phandle = <0x79>;
};
auxclk5_src_mux_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-mux-clock";
clocks = <0xf 0x68 0x69>;
ti,bit-shift = <0x1>;
reg = <0x324>;
linux,phandle = <0x7a>;
phandle = <0x7a>;
};
auxclk5_src_ck {
#clock-cells = <0x0>;
compatible = "ti,composite-clock";
clocks = <0x79 0x7a>;
linux,phandle = <0x7b>;
phandle = <0x7b>;
};
auxclk5_ck {
#clock-cells = <0x0>;
compatible = "ti,divider-clock";
clocks = <0x7b>;
ti,bit-shift = <0x10>;
ti,max-div = <0x10>;
reg = <0x324>;
linux,phandle = <0x81>;
phandle = <0x81>;
};
auxclkreq0_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x7c 0x7d 0x7e 0x7f 0x80 0x81>;
ti,bit-shift = <0x2>;
reg = <0x210>;
linux,phandle = <0x113>;
phandle = <0x113>;
};
auxclkreq1_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x7c 0x7d 0x7e 0x7f 0x80 0x81>;
ti,bit-shift = <0x2>;
reg = <0x214>;
linux,phandle = <0x114>;
phandle = <0x114>;
};
auxclkreq2_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x7c 0x7d 0x7e 0x7f 0x80 0x81>;
ti,bit-shift = <0x2>;
reg = <0x218>;
linux,phandle = <0x115>;
phandle = <0x115>;
};
auxclkreq3_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x7c 0x7d 0x7e 0x7f 0x80 0x81>;
ti,bit-shift = <0x2>;
reg = <0x21c>;
linux,phandle = <0x116>;
phandle = <0x116>;
};
auxclkreq4_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x7c 0x7d 0x7e 0x7f 0x80 0x81>;
ti,bit-shift = <0x2>;
reg = <0x220>;
linux,phandle = <0x117>;
phandle = <0x117>;
};
auxclkreq5_ck {
#clock-cells = <0x0>;
compatible = "ti,mux-clock";
clocks = <0x7c 0x7d 0x7e 0x7f 0x80 0x81>;
ti,bit-shift = <0x2>;
reg = <0x224>;
linux,phandle = <0x118>;
phandle = <0x118>;
};
};
clockdomains {
linux,phandle = <0x119>;
phandle = <0x119>;
};
};
pinmux@1e040 {
compatible = "ti,omap4-padconf", "pinctrl-single";
reg = <0x1e040 0x38>;
#address-cells = <0x1>;
#size-cells = <0x0>;
#interrupt-cells = <0x1>;
interrupt-controller;
pinctrl-single,register-width = <0x10>;
pinctrl-single,function-mask = <0x7fff>;
linux,phandle = <0x11a>;
phandle = <0x11a>;
pinmux_leds_wkpins {
pinctrl-single,pins = <0x1c 0x3>;
linux,phandle = <0xa9>;
phandle = <0xa9>;
};
pinmux_twl6030_wkup_pins {
pinctrl-single,pins = <0x14 0x2>;
linux,phandle = <0x85>;
phandle = <0x85>;
};
};
};
};
ocmcram@40304000 {
compatible = "mmio-sram";
reg = <0x40304000 0xa000>;
linux,phandle = <0x6>;
phandle = <0x6>;
};
dma-controller@4a056000 {
compatible = "ti,omap4430-sdma";
reg = <0x4a056000 0x1000>;
interrupts = <0x0 0xc 0x4 0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4>;
#dma-cells = <0x1>;
dma-channels = <0x20>;
dma-requests = <0x7f>;
linux,phandle = <0x8e>;
phandle = <0x8e>;
};
gpio@4a310000 {
compatible = "ti,omap4-gpio";
reg = <0x4a310000 0x200>;
interrupts = <0x0 0x1d 0x4>;
ti,hwmods = "gpio1";
ti,gpio-always-on;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
ti,no-reset-on-init;
linux,phandle = <0xaa>;
phandle = <0xaa>;
};
gpio@48055000 {
compatible = "ti,omap4-gpio";
reg = <0x48055000 0x200>;
interrupts = <0x0 0x1e 0x4>;
ti,hwmods = "gpio2";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x93>;
phandle = <0x93>;
};
gpio@48057000 {
compatible = "ti,omap4-gpio";
reg = <0x48057000 0x200>;
interrupts = <0x0 0x1f 0x4>;
ti,hwmods = "gpio3";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0xa4>;
phandle = <0xa4>;
};
gpio@48059000 {
compatible = "ti,omap4-gpio";
reg = <0x48059000 0x200>;
interrupts = <0x0 0x20 0x4>;
ti,hwmods = "gpio4";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x88>;
phandle = <0x88>;
};
gpio@4805b000 {
compatible = "ti,omap4-gpio";
reg = <0x4805b000 0x200>;
interrupts = <0x0 0x21 0x4>;
ti,hwmods = "gpio5";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x11b>;
phandle = <0x11b>;
};
gpio@4805d000 {
compatible = "ti,omap4-gpio";
reg = <0x4805d000 0x200>;
interrupts = <0x0 0x22 0x4>;
ti,hwmods = "gpio6";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x11c>;
phandle = <0x11c>;
};
gpmc@50000000 {
compatible = "ti,omap4430-gpmc";
reg = <0x50000000 0x1000>;
#address-cells = <0x2>;
#size-cells = <0x1>;
interrupts = <0x0 0x14 0x4>;
gpmc,num-cs = <0x8>;
gpmc,num-waitpins = <0x4>;
ti,hwmods = "gpmc";
ti,no-idle-on-init;
clocks = <0x1f>;
clock-names = "fck";
linux,phandle = <0x11d>;
phandle = <0x11d>;
};
serial@4806a000 {
compatible = "ti,omap4-uart";
reg = <0x4806a000 0x100>;
interrupts = <0x0 0x48 0x4>;
ti,hwmods = "uart1";
clock-frequency = <0x2dc6c00>;
linux,phandle = <0x11e>;
phandle = <0x11e>;
};
serial@4806c000 {
compatible = "ti,omap4-uart";
reg = <0x4806c000 0x100>;
interrupts = <0x0 0x49 0x4>;
ti,hwmods = "uart2";
clock-frequency = <0x2dc6c00>;
interrupts-extended = <0x1 0x0 0x49 0x4 0x82 0xdc>;
linux,phandle = <0x11f>;
phandle = <0x11f>;
};
serial@48020000 {
compatible = "ti,omap4-uart";
reg = <0x48020000 0x100>;
interrupts = <0x0 0x4a 0x4>;
ti,hwmods = "uart3";
clock-frequency = <0x2dc6c00>;
interrupts-extended = <0x1 0x0 0x4a 0x4 0x82 0x104>;
linux,phandle = <0x120>;
phandle = <0x120>;
};
serial@4806e000 {
compatible = "ti,omap4-uart";
reg = <0x4806e000 0x100>;
interrupts = <0x0 0x46 0x4>;
ti,hwmods = "uart4";
pinctrl-names = "default";
pinctrl-0 = <0xfff>;
clock-frequency = <0x2dc6c00>;
interrupts-extended = <0x1 0x0 0x46 0x4 0x82 0x11c>;
linux,phandle = <0x121>;
phandle = <0x121>;
};
spinlock@4a0f6000 {
compatible = "ti,omap4-hwspinlock";
reg = <0x4a0f6000 0x1000>;
ti,hwmods = "spinlock";
#hwlock-cells = <0x1>;
linux,phandle = <0x122>;
phandle = <0x122>;
};
i2c@48070000 {
compatible = "ti,omap4-i2c";
reg = <0x48070000 0x100>;
interrupts = <0x0 0x38 0x4>;
#address-cells = <0x1>;
#size-cells = <0x0>;
ti,hwmods = "i2c1";
pinctrl-names = "default";
pinctrl-0 = <0x83>;
clock-frequency = <0x61a80>;
linux,phandle = <0x123>;
phandle = <0x123>;
twl@48 {
reg = <0x48>;
interrupts = <0x0 0x7 0x4>;
compatible = "ti,twl6030";
interrupt-controller;
#interrupt-cells = <0x1>;
pinctrl-names = "default";
pinctrl-0 = <0x84 0x85>;
linux,phandle = <0x124>;
phandle = <0x124>;
rtc {
compatible = "ti,twl4030-rtc";
interrupts = <0xb>;
};
regulator-vaux1 {
compatible = "ti,twl6030-vaux1";
regulator-min-microvolt = <0xf4240>;
regulator-max-microvolt = <0x2dc6c0>;
linux,phandle = <0x125>;
phandle = <0x125>;
};
regulator-vaux2 {
compatible = "ti,twl6030-vaux2";
regulator-min-microvolt = <0x124f80>;
regulator-max-microvolt = <0x2ab980>;
linux,phandle = <0x126>;
phandle = <0x126>;
};
regulator-vaux3 {
compatible = "ti,twl6030-vaux3";
regulator-min-microvolt = <0xf4240>;
regulator-max-microvolt = <0x2dc6c0>;
linux,phandle = <0x127>;
phandle = <0x127>;
};
regulator-vmmc {
compatible = "ti,twl6030-vmmc";
regulator-min-microvolt = <0x124f80>;
regulator-max-microvolt = <0x2dc6c0>;
linux,phandle = <0x90>;
phandle = <0x90>;
};
regulator-vpp {
compatible = "ti,twl6030-vpp";
regulator-min-microvolt = <0x1b7740>;
regulator-max-microvolt = <0x2625a0>;
linux,phandle = <0x128>;
phandle = <0x128>;
};
regulator-vusim {
compatible = "ti,twl6030-vusim";
regulator-min-microvolt = <0x124f80>;
regulator-max-microvolt = <0x2c4020>;
linux,phandle = <0x129>;
phandle = <0x129>;
};
regulator-vdac {
compatible = "ti,twl6030-vdac";
linux,phandle = <0xa1>;
phandle = <0xa1>;
};
regulator-vana {
compatible = "ti,twl6030-vana";
linux,phandle = <0x12a>;
phandle = <0x12a>;
};
regulator-vcxio {
compatible = "ti,twl6030-vcxio";
regulator-always-on;
linux,phandle = <0x9f>;
phandle = <0x9f>;
};
regulator-vusb {
compatible = "ti,twl6030-vusb";
linux,phandle = <0x86>;
phandle = <0x86>;
};
regulator-v1v8 {
compatible = "ti,twl6030-v1v8";
regulator-always-on;
linux,phandle = <0x89>;
phandle = <0x89>;
};
regulator-v2v1 {
compatible = "ti,twl6030-v2v1";
regulator-always-on;
linux,phandle = <0x8a>;
phandle = <0x8a>;
};
usb-comparator {
compatible = "ti,twl6030-usb";
interrupts = <0x4 0xa>;
usb-supply = <0x86>;
linux,phandle = <0x12b>;
phandle = <0x12b>;
};
pwm {
compatible = "ti,twl6030-pwm";
#pwm-cells = <0x2>;
linux,phandle = <0x12c>;
phandle = <0x12c>;
};
pwmled {
compatible = "ti,twl6030-pwmled";
#pwm-cells = <0x2>;
linux,phandle = <0x12d>;
phandle = <0x12d>;
};
};
twl@4b {
compatible = "ti,twl6040";
reg = <0x4b>;
pinctrl-names = "default";
pinctrl-0 = <0x87>;
interrupts = <0x0 0x77 0x4>;
ti,audpwron-gpio = <0x88 0x1f 0x0>;
vio-supply = <0x89>;
v2v1-supply = <0x8a>;
enable-active-high;
linux,phandle = <0xac>;
phandle = <0xac>;
};
};
i2c@48072000 {
compatible = "ti,omap4-i2c";
reg = <0x48072000 0x100>;
interrupts = <0x0 0x39 0x4>;
#address-cells = <0x1>;
#size-cells = <0x0>;
ti,hwmods = "i2c2";
pinctrl-names = "default";
pinctrl-0 = <0x8b>;
clock-frequency = <0x61a80>;
linux,phandle = <0x12e>;
phandle = <0x12e>;
};
i2c@48060000 {
compatible = "ti,omap4-i2c";
reg = <0x48060000 0x100>;
interrupts = <0x0 0x3d 0x4>;
#address-cells = <0x1>;
#size-cells = <0x0>;
ti,hwmods = "i2c3";
pinctrl-names = "default";
pinctrl-0 = <0x8c>;
clock-frequency = <0x186a0>;
linux,phandle = <0xb1>;
phandle = <0xb1>;
eeprom@50 {
compatible = "ti,eeprom";
reg = <0x50>;
};
};
i2c@48350000 {
compatible = "ti,omap4-i2c";
reg = <0x48350000 0x100>;
interrupts = <0x0 0x3e 0x4>;
#address-cells = <0x1>;
#size-cells = <0x0>;
ti,hwmods = "i2c4";
pinctrl-names = "default";
pinctrl-0 = <0x8d>;
clock-frequency = <0x61a80>;
linux,phandle = <0x12f>;
phandle = <0x12f>;
};
spi@48098000 {
compatible = "ti,omap4-mcspi";
reg = <0x48098000 0x200>;
interrupts = <0x0 0x41 0x4>;
#address-cells = <0x1>;
#size-cells = <0x0>;
ti,hwmods = "mcspi1";
ti,spi-num-cs = <0x4>;
dmas = <0x8e 0x23 0x8e 0x24 0x8e 0x25 0x8e 0x26 0x8e 0x27 0x8e 0x28 0x8e 0x29 0x8e 0x2a>;
dma-names = "tx0", "rx0", "tx1", "rx1", "tx2", "rx2", "tx3", "rx3";
linux,phandle = <0x130>;
phandle = <0x130>;
};
spi@4809a000 {
compatible = "ti,omap4-mcspi";
reg = <0x4809a000 0x200>;
interrupts = <0x0 0x42 0x4>;
#address-cells = <0x1>;
#size-cells = <0x0>;
ti,hwmods = "mcspi2";
ti,spi-num-cs = <0x2>;
dmas = <0x8e 0x2b 0x8e 0x2c 0x8e 0x2d 0x8e 0x2e>;
dma-names = "tx0", "rx0", "tx1", "rx1";
linux,phandle = <0x131>;
phandle = <0x131>;
};
spi@480b8000 {
compatible = "ti,omap4-mcspi";
reg = <0x480b8000 0x200>;
interrupts = <0x0 0x5b 0x4>;
#address-cells = <0x1>;
#size-cells = <0x0>;
ti,hwmods = "mcspi3";
ti,spi-num-cs = <0x2>;
dmas = <0x8e 0xf 0x8e 0x10>;
dma-names = "tx0", "rx0";
linux,phandle = <0x132>;
phandle = <0x132>;
};
spi@480ba000 {
compatible = "ti,omap4-mcspi";
reg = <0x480ba000 0x200>;
interrupts = <0x0 0x30 0x4>;
#address-cells = <0x1>;
#size-cells = <0x0>;
ti,hwmods = "mcspi4";
ti,spi-num-cs = <0x1>;
dmas = <0x8e 0x46 0x8e 0x47>;
dma-names = "tx0", "rx0";
linux,phandle = <0x133>;
phandle = <0x133>;
};
mmc@4809c000 {
compatible = "ti,omap4-hsmmc";
reg = <0x4809c000 0x400>;
interrupts = <0x0 0x53 0x4>;
ti,hwmods = "mmc1";
ti,dual-volt;
ti,needs-special-reset;
dmas = <0x8e 0x3d 0x8e 0x3e>;
dma-names = "tx", "rx";
pbias-supply = <0x8f>;
vmmc-supply = <0x90>;
bus-width = <0x8>;
linux,phandle = <0x134>;
phandle = <0x134>;
};
mmc@480b4000 {
compatible = "ti,omap4-hsmmc";
reg = <0x480b4000 0x400>;
interrupts = <0x0 0x56 0x4>;
ti,hwmods = "mmc2";
ti,needs-special-reset;
dmas = <0x8e 0x2f 0x8e 0x30>;
dma-names = "tx", "rx";
status = "disabled";
linux,phandle = <0x135>;
phandle = <0x135>;
};
mmc@480ad000 {
compatible = "ti,omap4-hsmmc";
reg = <0x480ad000 0x400>;
interrupts = <0x0 0x5e 0x4>;
ti,hwmods = "mmc3";
ti,needs-special-reset;
dmas = <0x8e 0x4d 0x8e 0x4e>;
dma-names = "tx", "rx";
status = "disabled";
linux,phandle = <0x136>;
phandle = <0x136>;
};
mmc@480d1000 {
compatible = "ti,omap4-hsmmc";
reg = <0x480d1000 0x400>;
interrupts = <0x0 0x60 0x4>;
ti,hwmods = "mmc4";
ti,needs-special-reset;
dmas = <0x8e 0x39 0x8e 0x3a>;
dma-names = "tx", "rx";
status = "disabled";
linux,phandle = <0x137>;
phandle = <0x137>;
};
mmc@480d5000 {
compatible = "ti,omap4-hsmmc";
reg = <0x480d5000 0x400>;
interrupts = <0x0 0x3b 0x4>;
ti,hwmods = "mmc5";
ti,needs-special-reset;
dmas = <0x8e 0x3b 0x8e 0x3c>;
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <0x91>;
vmmc-supply = <0x92>;
non-removable;
bus-width = <0x4>;
cap-power-off-card;
#address-cells = <0x1>;
#size-cells = <0x0>;
linux,phandle = <0x138>;
phandle = <0x138>;
wlcore@2 {
compatible = "ti,wl1271";
reg = <0x2>;
interrupt-parent = <0x93>;
interrupts = <0x15 0x4>;
ref-clock-frequency = <0x249f000>;
linux,phandle = <0x139>;
phandle = <0x139>;
};
};
mmu@4a066000 {
compatible = "ti,omap4-iommu";
reg = <0x4a066000 0x100>;
interrupts = <0x0 0x1c 0x4>;
ti,hwmods = "mmu_dsp";
#iommu-cells = <0x0>;
linux,phandle = <0x13a>;
phandle = <0x13a>;
};
mmu@55082000 {
compatible = "ti,omap4-iommu";
reg = <0x55082000 0x100>;
interrupts = <0x0 0x64 0x4>;
ti,hwmods = "mmu_ipu";
#iommu-cells = <0x0>;
ti,iommu-bus-err-back;
linux,phandle = <0x13b>;
phandle = <0x13b>;
};
wdt@4a314000 {
compatible = "ti,omap4-wdt", "ti,omap3-wdt";
reg = <0x4a314000 0x80>;
interrupts = <0x0 0x50 0x4>;
ti,hwmods = "wd_timer2";
linux,phandle = <0x13c>;
phandle = <0x13c>;
};
mcpdm@40132000 {
compatible = "ti,omap4-mcpdm";
reg = <0x40132000 0x7f 0x49032000 0x7f>;
reg-names = "mpu", "dma";
interrupts = <0x0 0x70 0x4>;
ti,hwmods = "mcpdm";
dmas = <0x8e 0x41 0x8e 0x42>;
dma-names = "up_link", "dn_link";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <0x94>;
linux,phandle = <0xab>;
phandle = <0xab>;
};
dmic@4012e000 {
compatible = "ti,omap4-dmic";
reg = <0x4012e000 0x7f 0x4902e000 0x7f>;
reg-names = "mpu", "dma";
interrupts = <0x0 0x72 0x4>;
ti,hwmods = "dmic";
dmas = <0x8e 0x43>;
dma-names = "up_link";
status = "disabled";
linux,phandle = <0x13d>;
phandle = <0x13d>;
};
mcbsp@40122000 {
compatible = "ti,omap4-mcbsp";
reg = <0x40122000 0xff 0x49022000 0xff>;
reg-names = "mpu", "dma";
interrupts = <0x0 0x11 0x4>;
interrupt-names = "common";
ti,buffer-size = <0x80>;
ti,hwmods = "mcbsp1";
dmas = <0x8e 0x21 0x8e 0x22>;
dma-names = "tx", "rx";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <0x95>;
linux,phandle = <0x13e>;
phandle = <0x13e>;
};
mcbsp@40124000 {
compatible = "ti,omap4-mcbsp";
reg = <0x40124000 0xff 0x49024000 0xff>;
reg-names = "mpu", "dma";
interrupts = <0x0 0x16 0x4>;
interrupt-names = "common";
ti,buffer-size = <0x80>;
ti,hwmods = "mcbsp2";
dmas = <0x8e 0x11 0x8e 0x12>;
dma-names = "tx", "rx";
status = "disabled";
linux,phandle = <0x13f>;
phandle = <0x13f>;
};
mcbsp@40126000 {
compatible = "ti,omap4-mcbsp";
reg = <0x40126000 0xff 0x49026000 0xff>;
reg-names = "mpu", "dma";
interrupts = <0x0 0x17 0x4>;
interrupt-names = "common";
ti,buffer-size = <0x80>;
ti,hwmods = "mcbsp3";
dmas = <0x8e 0x13 0x8e 0x14>;
dma-names = "tx", "rx";
status = "disabled";
linux,phandle = <0x140>;
phandle = <0x140>;
};
mcbsp@48096000 {
compatible = "ti,omap4-mcbsp";
reg = <0x48096000 0xff>;
reg-names = "mpu";
interrupts = <0x0 0x10 0x4>;
interrupt-names = "common";
ti,buffer-size = <0x80>;
ti,hwmods = "mcbsp4";
dmas = <0x8e 0x1f 0x8e 0x20>;
dma-names = "tx", "rx";
status = "disabled";
linux,phandle = <0x141>;
phandle = <0x141>;
};
keypad@4a31c000 {
compatible = "ti,omap4-keypad";
reg = <0x4a31c000 0x80>;
interrupts = <0x0 0x78 0x4>;
reg-names = "mpu";
ti,hwmods = "kbd";
linux,phandle = <0x142>;
phandle = <0x142>;
};
dmm@4e000000 {
compatible = "ti,omap4-dmm";
reg = <0x4e000000 0x800>;
interrupts = <0x0 0x71 0x4>;
ti,hwmods = "dmm";
};
emif@4c000000 {
compatible = "ti,emif-4d";
reg = <0x4c000000 0x100>;
interrupts = <0x0 0x6e 0x4>;
ti,hwmods = "emif1";
ti,no-idle-on-init;
phy-type = <0x1>;
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
hw-caps-temp-alert;
status = "ok";
cs1-used;
device-handle = <0x96>;
linux,phandle = <0x143>;
phandle = <0x143>;
};
emif@4d000000 {
compatible = "ti,emif-4d";
reg = <0x4d000000 0x100>;
interrupts = <0x0 0x6f 0x4>;
ti,hwmods = "emif2";
ti,no-idle-on-init;
phy-type = <0x1>;
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
hw-caps-temp-alert;
status = "ok";
cs1-used;
device-handle = <0x96>;
linux,phandle = <0x144>;
phandle = <0x144>;
};
ocp2scp@4a0ad000 {
compatible = "ti,omap-ocp2scp";
reg = <0x4a0ad000 0x1f>;
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
ti,hwmods = "ocp2scp_usb_phy";
usb2phy@4a0ad080 {
compatible = "ti,omap-usb2";
reg = <0x4a0ad080 0x58>;
ctrl-module = <0x97>;
clocks = <0x98>;
clock-names = "wkupclk";
#phy-cells = <0x0>;
linux,phandle = <0x9a>;
phandle = <0x9a>;
};
};
mailbox@4a0f4000 {
compatible = "ti,omap4-mailbox";
reg = <0x4a0f4000 0x200>;
interrupts = <0x0 0x1a 0x4>;
ti,hwmods = "mailbox";
#mbox-cells = <0x1>;
ti,mbox-num-users = <0x3>;
ti,mbox-num-fifos = <0x8>;
linux,phandle = <0x145>;
phandle = <0x145>;
mbox_ipu {
ti,mbox-tx = <0x0 0x0 0x0>;
ti,mbox-rx = <0x1 0x0 0x0>;
linux,phandle = <0x146>;
phandle = <0x146>;
};
mbox_dsp {
ti,mbox-tx = <0x3 0x0 0x0>;
ti,mbox-rx = <0x2 0x0 0x0>;
linux,phandle = <0x147>;
phandle = <0x147>;
};
};
timer@4a318000 {
compatible = "ti,omap3430-timer";
reg = <0x4a318000 0x80>;
interrupts = <0x0 0x25 0x4>;
ti,hwmods = "timer1";
ti,timer-alwon;
linux,phandle = <0x148>;
phandle = <0x148>;
};
timer@48032000 {
compatible = "ti,omap3430-timer";
reg = <0x48032000 0x80>;
interrupts = <0x0 0x26 0x4>;
ti,hwmods = "timer2";
linux,phandle = <0x149>;
phandle = <0x149>;
};
timer@48034000 {
compatible = "ti,omap4430-timer";
reg = <0x48034000 0x80>;
interrupts = <0x0 0x27 0x4>;
ti,hwmods = "timer3";
linux,phandle = <0x14a>;
phandle = <0x14a>;
};
timer@48036000 {
compatible = "ti,omap4430-timer";
reg = <0x48036000 0x80>;
interrupts = <0x0 0x28 0x4>;
ti,hwmods = "timer4";
linux,phandle = <0x14b>;
phandle = <0x14b>;
};
timer@40138000 {
compatible = "ti,omap4430-timer";
reg = <0x40138000 0x80 0x49038000 0x80>;
interrupts = <0x0 0x29 0x4>;
ti,hwmods = "timer5";
ti,timer-dsp;
linux,phandle = <0x14c>;
phandle = <0x14c>;
};
timer@4013a000 {
compatible = "ti,omap4430-timer";
reg = <0x4013a000 0x80 0x4903a000 0x80>;
interrupts = <0x0 0x2a 0x4>;
ti,hwmods = "timer6";
ti,timer-dsp;
linux,phandle = <0x14d>;
phandle = <0x14d>;
};
timer@4013c000 {
compatible = "ti,omap4430-timer";
reg = <0x4013c000 0x80 0x4903c000 0x80>;
interrupts = <0x0 0x2b 0x4>;
ti,hwmods = "timer7";
ti,timer-dsp;
linux,phandle = <0x14e>;
phandle = <0x14e>;
};
timer@4013e000 {
compatible = "ti,omap4430-timer";
reg = <0x4013e000 0x80 0x4903e000 0x80>;
interrupts = <0x0 0x2c 0x4>;
ti,hwmods = "timer8";
ti,timer-pwm;
ti,timer-dsp;
linux,phandle = <0x14f>;
phandle = <0x14f>;
};
timer@4803e000 {
compatible = "ti,omap4430-timer";
reg = <0x4803e000 0x80>;
interrupts = <0x0 0x2d 0x4>;
ti,hwmods = "timer9";
ti,timer-pwm;
linux,phandle = <0x150>;
phandle = <0x150>;
};
timer@48086000 {
compatible = "ti,omap3430-timer";
reg = <0x48086000 0x80>;
interrupts = <0x0 0x2e 0x4>;
ti,hwmods = "timer10";
ti,timer-pwm;
linux,phandle = <0x151>;
phandle = <0x151>;
};
timer@48088000 {
compatible = "ti,omap4430-timer";
reg = <0x48088000 0x80>;
interrupts = <0x0 0x2f 0x4>;
ti,hwmods = "timer11";
ti,timer-pwm;
linux,phandle = <0x152>;
phandle = <0x152>;
};
usbhstll@4a062000 {
compatible = "ti,usbhs-tll";
reg = <0x4a062000 0x1000>;
interrupts = <0x0 0x4e 0x4>;
ti,hwmods = "usb_tll_hs";
linux,phandle = <0x153>;
phandle = <0x153>;
};
usbhshost@4a064000 {
compatible = "ti,usbhs-host";
reg = <0x4a064000 0x800>;
ti,hwmods = "usb_host_hs";
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
clocks = <0x48 0x49 0x4b>;
clock-names = "refclk_60m_int", "refclk_60m_ext_p1", "refclk_60m_ext_p2";
port1-mode = "ehci-phy";
linux,phandle = <0x154>;
phandle = <0x154>;
ohci@4a064800 {
compatible = "ti,ohci-omap3";
reg = <0x4a064800 0x400>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x4c 0x4>;
linux,phandle = <0x155>;
phandle = <0x155>;
};
ehci@4a064c00 {
compatible = "ti,ehci-omap";
reg = <0x4a064c00 0x400>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x4d 0x4>;
phys = <0x99>;
linux,phandle = <0x156>;
phandle = <0x156>;
};
};
control-phy@4a002300 {
compatible = "ti,control-phy-usb2";
reg = <0x4a002300 0x4>;
reg-names = "power";
linux,phandle = <0x97>;
phandle = <0x97>;
};
control-phy@4a00233c {
compatible = "ti,control-phy-otghs";
reg = <0x4a00233c 0x4>;
reg-names = "otghs_control";
linux,phandle = <0x9b>;
phandle = <0x9b>;
};
usb_otg_hs@4a0ab000 {
compatible = "ti,omap4-musb";
reg = <0x4a0ab000 0x7ff>;
interrupts = <0x0 0x5c 0x4 0x0 0x5d 0x4>;
interrupt-names = "mc", "dma";
ti,hwmods = "usb_otg_hs";
usb-phy = <0x9a>;
phys = <0x9a>;
phy-names = "usb2-phy";
multipoint = <0x1>;
num-eps = <0x10>;
ram-bits = <0xc>;
ctrl-module = <0x9b>;
interface-type = <0x1>;
mode = <0x3>;
power = <0x32>;
linux,phandle = <0x157>;
phandle = <0x157>;
};
aes@4b501000 {
compatible = "ti,omap4-aes";
ti,hwmods = "aes";
reg = <0x4b501000 0xa0>;
interrupts = <0x0 0x55 0x4>;
dmas = <0x8e 0x6f 0x8e 0x6e>;
dma-names = "tx", "rx";
linux,phandle = <0x158>;
phandle = <0x158>;
};
des@480a5000 {
compatible = "ti,omap4-des";
ti,hwmods = "des";
reg = <0x480a5000 0xa0>;
interrupts = <0x0 0x52 0x4>;
dmas = <0x8e 0x75 0x8e 0x74>;
dma-names = "tx", "rx";
linux,phandle = <0x159>;
phandle = <0x159>;
};
regulator-abb-mpu {
compatible = "ti,abb-v2";
regulator-name = "abb_mpu";
#address-cells = <0x0>;
#size-cells = <0x0>;
ti,tranxdone-status-mask = <0x80>;
clocks = <0xf>;
ti,settling-time = <0x32>;
ti,clock-cycles = <0x10>;
status = "okay";
reg = <0x4a307bd0 0x8 0x4a306014 0x4 0x4a002268 0x4>;
reg-names = "base-address", "int-address", "efuse-address";
ti,abb_info = <0xfa3e8 0x0 0x0 0x0 0x0 0x0 0x124f80 0x0 0x0 0x0 0x0 0x0 0x1408e8 0x0 0x0 0x100000 0x40000 0x0 0x14fb18 0x1 0x0 0x0 0x0 0x0 0x1531c8 0x1 0x0 0x0 0x0 0x0>;
linux,phandle = <0x15a>;
phandle = <0x15a>;
};
regulator-abb-iva {
compatible = "ti,abb-v2";
regulator-name = "abb_iva";
#address-cells = <0x0>;
#size-cells = <0x0>;
ti,tranxdone-status-mask = <0x80000000>;
clocks = <0xf>;
ti,settling-time = <0x32>;
ti,clock-cycles = <0x10>;
status = "okay";
reg = <0x4a307bd8 0x8 0x4a306010 0x4 0x4a002268 0x4>;
reg-names = "base-address", "int-address", "efuse-address";
ti,abb_info = <0xe7ef0 0x0 0x0 0x0 0x0 0x0 0x116520 0x0 0x0 0x0 0x0 0x0 0x13b2f8 0x0 0x0 0x200000 0x0 0x0 0x14fb18 0x1 0x0 0x0 0x0 0x0 0x14ff00 0x1 0x0 0x0 0x0 0x0>;
linux,phandle = <0x15b>;
phandle = <0x15b>;
};
dss@58000000 {
compatible = "ti,omap4-dss";
reg = <0x58000000 0x80>;
status = "ok";
ti,hwmods = "dss_core";
clocks = <0x9c>;
clock-names = "fck";
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
linux,phandle = <0x15c>;
phandle = <0x15c>;
dispc@58001000 {
compatible = "ti,omap4-dispc";
reg = <0x58001000 0x1000>;
interrupts = <0x0 0x19 0x4>;
ti,hwmods = "dss_dispc";
clocks = <0x9c>;
clock-names = "fck";
};
encoder@58002000 {
compatible = "ti,omap4-rfbi";
reg = <0x58002000 0x1000>;
status = "disabled";
ti,hwmods = "dss_rfbi";
clocks = <0x9c 0x1f>;
clock-names = "fck", "ick";
linux,phandle = <0x15d>;
phandle = <0x15d>;
};
encoder@58003000 {
compatible = "ti,omap4-venc";
reg = <0x58003000 0x1000>;
status = "disabled";
ti,hwmods = "dss_venc";
clocks = <0x9d>;
clock-names = "fck";
linux,phandle = <0x15e>;
phandle = <0x15e>;
};
encoder@58004000 {
compatible = "ti,omap4-dsi";
reg = <0x58004000 0x200 0x58004200 0x40 0x58004300 0x20>;
reg-names = "proto", "phy", "pll";
interrupts = <0x0 0x35 0x4>;
status = "disabled";
ti,hwmods = "dss_dsi1";
clocks = <0x9c 0x9e>;
clock-names = "fck", "sys_clk";
linux,phandle = <0x15f>;
phandle = <0x15f>;
};
encoder@58005000 {
compatible = "ti,omap4-dsi";
reg = <0x58005000 0x200 0x58005200 0x40 0x58005300 0x20>;
reg-names = "proto", "phy", "pll";
interrupts = <0x0 0x54 0x4>;
status = "ok";
ti,hwmods = "dss_dsi2";
clocks = <0x9c 0x9e>;
clock-names = "fck", "sys_clk";
vdd-supply = <0x9f>;
linux,phandle = <0x160>;
phandle = <0x160>;
};
encoder@58006000 {
compatible = "ti,omap4-hdmi";
reg = <0x58006000 0x200 0x58006200 0x100 0x58006300 0x100 0x58006400 0x1000>;
reg-names = "wp", "pll", "phy", "core";
interrupts = <0x0 0x65 0x4>;
status = "ok";
ti,hwmods = "dss_hdmi";
clocks = <0xa0 0x9e>;
clock-names = "fck", "sys_clk";
dmas = <0x8e 0x4c>;
dma-names = "audio_tx";
vdda-supply = <0xa1>;
linux,phandle = <0x161>;
phandle = <0x161>;
port {
endpoint {
remote-endpoint = <0xa2>;
linux,phandle = <0xb3>;
phandle = <0xb3>;
};
};
};
port {
endpoint {
remote-endpoint = <0xa3>;
data-lines = <0x18>;
linux,phandle = <0xaf>;
phandle = <0xaf>;
};
};
};
bandgap {
reg = <0x4a002260 0x4 0x4a00232c 0x4 0x4a002378 0x18>;
compatible = "ti,omap4460-bandgap";
interrupts = <0x0 0x7e 0x4>;
gpios = <0xa4 0x16 0x0>;
#thermal-sensor-cells = <0x0>;
linux,phandle = <0xa5>;
phandle = <0xa5>;
};
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0x0 0x36 0x4 0x0 0x37 0x4>;
ti,hwmods = "debugss";
};
thermal-zones {
cpu_thermal {
polling-delay-passive = <0xfa>;
polling-delay = <0x3e8>;
thermal-sensors = <0xa5 0x0>;
linux,phandle = <0x162>;
phandle = <0x162>;
trips {
linux,phandle = <0x163>;
phandle = <0x163>;
cpu_alert {
temperature = <0x186a0>;
hysteresis = <0x7d0>;
type = "passive";
linux,phandle = <0xa6>;
phandle = <0xa6>;
};
cpu_crit {
temperature = <0x1e848>;
hysteresis = <0x7d0>;
type = "critical";
linux,phandle = <0x164>;
phandle = <0x164>;
};
};
cooling-maps {
linux,phandle = <0x165>;
phandle = <0x165>;
map0 {
trip = <0xa6>;
cooling-device = <0xa7 0xffffffff 0xffffffff>;
};
};
};
};
lpddr2 {
compatible = "Elpida,ECB240ABACN", "jedec,lpddr2-s4";
density = <0x800>;
io-width = <0x20>;
tRPab-min-tck = <0x3>;
tRCD-min-tck = <0x3>;
tWR-min-tck = <0x3>;
tRASmin-min-tck = <0x3>;
tRRD-min-tck = <0x2>;
tWTR-min-tck = <0x2>;
tXP-min-tck = <0x2>;
tRTP-min-tck = <0x2>;
tCKE-min-tck = <0x3>;
tCKESR-min-tck = <0x3>;
tFAW-min-tck = <0x8>;
linux,phandle = <0x96>;
phandle = <0x96>;
lpddr2-timings@0 {
compatible = "jedec,lpddr2-timings";
min-freq = <0x989680>;
max-freq = <0x17d78400>;
tRPab = <0x5208>;
tRCD = <0x4650>;
tWR = <0x3a98>;
tRAS-min = <0xa410>;
tRRD = <0x2710>;
tWTR = <0x1d4c>;
tXP = <0x1d4c>;
tRTP = <0x1d4c>;
tCKESR = <0x3a98>;
tDQSCK-max = <0x157c>;
tFAW = <0xc350>;
tZQCS = <0x15f90>;
tZQCL = <0x57e40>;
tZQinit = <0xf4240>;
tRAS-max-ns = <0x11170>;
tDQSCK-max-derated = <0x1770>;
linux,phandle = <0x166>;
phandle = <0x166>;
};
lpddr2-timings@1 {
compatible = "jedec,lpddr2-timings";
min-freq = <0x989680>;
max-freq = <0xbebc200>;
tRPab = <0x5208>;
tRCD = <0x4650>;
tWR = <0x3a98>;
tRAS-min = <0xa410>;
tRRD = <0x2710>;
tWTR = <0x2710>;
tXP = <0x1d4c>;
tRTP = <0x1d4c>;
tCKESR = <0x3a98>;
tDQSCK-max = <0x157c>;
tFAW = <0xc350>;
tZQCS = <0x15f90>;
tZQCL = <0x57e40>;
tZQinit = <0xf4240>;
tRAS-max-ns = <0x11170>;
tDQSCK-max-derated = <0x1770>;
linux,phandle = <0x167>;
phandle = <0x167>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <0xa8 0xa9>;
linux,phandle = <0x168>;
phandle = <0x168>;
heartbeat {
label = "pandaboard::status1";
gpios = <0x88 0xe 0x0>;
linux,default-trigger = "heartbeat";
};
mmc {
label = "pandaboard::status2";
gpios = <0xaa 0x8 0x0>;
linux,default-trigger = "mmc0";
};
};
sound {
compatible = "ti,abe-twl6040";
ti,model = "PandaBoardES";
ti,mclk-freq = <0x249f000>;
ti,mcpdm = <0xab>;
ti,twl6040 = <0xac>;
ti,audio-routing = "Headset Stereophone", "HSOL", "Headset Stereophone", "HSOR", "Ext Spk", "HFL", "Ext Spk", "HFR", "Line Out", "AUXL", "Line Out", "AUXR", "AFML", "Line In", "AFMR", "Line In";
linux,phandle = <0x169>;
phandle = <0x169>;
};
hsusb1_power_reg {
compatible = "regulator-fixed";
regulator-name = "hsusb1_vbus";
regulator-min-microvolt = <0x325aa0>;
regulator-max-microvolt = <0x325aa0>;
gpio = <0xaa 0x1 0x0>;
startup-delay-us = <0x11170>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
linux,phandle = <0xad>;
phandle = <0xad>;
};
hsusb1_phy {
compatible = "usb-nop-xceiv";
reset-gpios = <0x93 0x1e 0x1>;
vcc-supply = <0xad>;
clocks = <0x7f>;
clock-names = "main_clk";
clock-frequency = <0x124f800>;
linux,phandle = <0x99>;
phandle = <0x99>;
};
wl12xx_vmmc {
pinctrl-names = "default";
pinctrl-0 = <0xae>;
compatible = "regulator-fixed";
regulator-name = "vwl1271";
regulator-min-microvolt = <0x1b7740>;
regulator-max-microvolt = <0x1b7740>;
gpio = <0x93 0xb 0x0>;
startup-delay-us = <0x11170>;
enable-active-high;
linux,phandle = <0x92>;
phandle = <0x92>;
};
encoder@0 {
compatible = "ti,tfp410";
powerdown-gpios = <0xaa 0x0 0x1>;
linux,phandle = <0x16a>;
phandle = <0x16a>;
ports {
#address-cells = <0x1>;
#size-cells = <0x0>;
port@0 {
reg = <0x0>;
endpoint@0 {
remote-endpoint = <0xaf>;
linux,phandle = <0xa3>;
phandle = <0xa3>;
};
};
port@1 {
reg = <0x1>;
endpoint@0 {
remote-endpoint = <0xb0>;
linux,phandle = <0xb2>;
phandle = <0xb2>;
};
};
};
};
connector@0 {
compatible = "dvi-connector";
label = "dvi";
digital;
ddc-i2c-bus = <0xb1>;
linux,phandle = <0x16b>;
phandle = <0x16b>;
port {
endpoint {
remote-endpoint = <0xb2>;
linux,phandle = <0xb0>;
phandle = <0xb0>;
};
};
};
encoder@1 {
compatible = "ti,tpd12s015";
gpios = <0x93 0x1c 0x0 0x93 0x9 0x0 0x93 0x1f 0x0>;
linux,phandle = <0x16c>;
phandle = <0x16c>;
ports {
#address-cells = <0x1>;
#size-cells = <0x0>;
port@0 {
reg = <0x0>;
endpoint@0 {
remote-endpoint = <0xb3>;
linux,phandle = <0xa2>;
phandle = <0xa2>;
};
};
port@1 {
reg = <0x1>;
endpoint@0 {
remote-endpoint = <0xb4>;
linux,phandle = <0xb5>;
phandle = <0xb5>;
};
};
};
};
connector@1 {
compatible = "hdmi-connector";
label = "hdmi";
type = [61 00];
linux,phandle = <0x16d>;
phandle = <0x16d>;
port {
endpoint {
remote-endpoint = <0xb5>;
linux,phandle = <0xb4>;
phandle = <0xb4>;
};
};
};
__symbols__ {
cpu0 = "/cpus/cpu@0";
gic = "/interrupt-controller@48241000";
L2 = "/l2-cache-controller@48242000";
wakeupgen = "/interrupt-controller@48281000";
l4_cfg = "/ocp/l4@4a000000";
cm1 = "/ocp/l4@4a000000/cm1@4000";
cm1_clocks = "/ocp/l4@4a000000/cm1@4000/clocks";
extalt_clkin_ck = "/ocp/l4@4a000000/cm1@4000/clocks/extalt_clkin_ck";
pad_clks_src_ck = "/ocp/l4@4a000000/cm1@4000/clocks/pad_clks_src_ck";
pad_clks_ck = "/ocp/l4@4a000000/cm1@4000/clocks/pad_clks_ck";
pad_slimbus_core_clks_ck = "/ocp/l4@4a000000/cm1@4000/clocks/pad_slimbus_core_clks_ck";
secure_32k_clk_src_ck = "/ocp/l4@4a000000/cm1@4000/clocks/secure_32k_clk_src_ck";
slimbus_src_clk = "/ocp/l4@4a000000/cm1@4000/clocks/slimbus_src_clk";
slimbus_clk = "/ocp/l4@4a000000/cm1@4000/clocks/slimbus_clk";
sys_32k_ck = "/ocp/l4@4a000000/cm1@4000/clocks/sys_32k_ck";
virt_12000000_ck = "/ocp/l4@4a000000/cm1@4000/clocks/virt_12000000_ck";
virt_13000000_ck = "/ocp/l4@4a000000/cm1@4000/clocks/virt_13000000_ck";
virt_16800000_ck = "/ocp/l4@4a000000/cm1@4000/clocks/virt_16800000_ck";
virt_19200000_ck = "/ocp/l4@4a000000/cm1@4000/clocks/virt_19200000_ck";
virt_26000000_ck = "/ocp/l4@4a000000/cm1@4000/clocks/virt_26000000_ck";
virt_27000000_ck = "/ocp/l4@4a000000/cm1@4000/clocks/virt_27000000_ck";
virt_38400000_ck = "/ocp/l4@4a000000/cm1@4000/clocks/virt_38400000_ck";
tie_low_clock_ck = "/ocp/l4@4a000000/cm1@4000/clocks/tie_low_clock_ck";
utmi_phy_clkout_ck = "/ocp/l4@4a000000/cm1@4000/clocks/utmi_phy_clkout_ck";
xclk60mhsp1_ck = "/ocp/l4@4a000000/cm1@4000/clocks/xclk60mhsp1_ck";
xclk60mhsp2_ck = "/ocp/l4@4a000000/cm1@4000/clocks/xclk60mhsp2_ck";
xclk60motg_ck = "/ocp/l4@4a000000/cm1@4000/clocks/xclk60motg_ck";
dpll_abe_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_abe_ck";
dpll_abe_x2_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_abe_x2_ck";
dpll_abe_m2x2_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_abe_m2x2_ck";
abe_24m_fclk = "/ocp/l4@4a000000/cm1@4000/clocks/abe_24m_fclk";
abe_clk = "/ocp/l4@4a000000/cm1@4000/clocks/abe_clk";
aess_fclk = "/ocp/l4@4a000000/cm1@4000/clocks/aess_fclk";
dpll_abe_m3x2_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_abe_m3x2_ck";
core_hsd_byp_clk_mux_ck = "/ocp/l4@4a000000/cm1@4000/clocks/core_hsd_byp_clk_mux_ck";
dpll_core_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_core_ck";
dpll_core_x2_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_core_x2_ck";
dpll_core_m6x2_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_core_m6x2_ck";
dpll_core_m2_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_core_m2_ck";
ddrphy_ck = "/ocp/l4@4a000000/cm1@4000/clocks/ddrphy_ck";
dpll_core_m5x2_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_core_m5x2_ck";
div_core_ck = "/ocp/l4@4a000000/cm1@4000/clocks/div_core_ck";
div_iva_hs_clk = "/ocp/l4@4a000000/cm1@4000/clocks/div_iva_hs_clk";
div_mpu_hs_clk = "/ocp/l4@4a000000/cm1@4000/clocks/div_mpu_hs_clk";
dpll_core_m4x2_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_core_m4x2_ck";
dll_clk_div_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dll_clk_div_ck";
dpll_abe_m2_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_abe_m2_ck";
dpll_core_m3x2_gate_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_core_m3x2_gate_ck";
dpll_core_m3x2_div_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_core_m3x2_div_ck";
dpll_core_m3x2_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_core_m3x2_ck";
dpll_core_m7x2_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_core_m7x2_ck";
iva_hsd_byp_clk_mux_ck = "/ocp/l4@4a000000/cm1@4000/clocks/iva_hsd_byp_clk_mux_ck";
dpll_iva_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_iva_ck";
dpll_iva_x2_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_iva_x2_ck";
dpll_iva_m4x2_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_iva_m4x2_ck";
dpll_iva_m5x2_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_iva_m5x2_ck";
dpll_mpu_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_mpu_ck";
dpll_mpu_m2_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dpll_mpu_m2_ck";
per_hs_clk_div_ck = "/ocp/l4@4a000000/cm1@4000/clocks/per_hs_clk_div_ck";
usb_hs_clk_div_ck = "/ocp/l4@4a000000/cm1@4000/clocks/usb_hs_clk_div_ck";
l3_div_ck = "/ocp/l4@4a000000/cm1@4000/clocks/l3_div_ck";
l4_div_ck = "/ocp/l4@4a000000/cm1@4000/clocks/l4_div_ck";
lp_clk_div_ck = "/ocp/l4@4a000000/cm1@4000/clocks/lp_clk_div_ck";
mpu_periphclk = "/ocp/l4@4a000000/cm1@4000/clocks/mpu_periphclk";
ocp_abe_iclk = "/ocp/l4@4a000000/cm1@4000/clocks/ocp_abe_iclk";
per_abe_24m_fclk = "/ocp/l4@4a000000/cm1@4000/clocks/per_abe_24m_fclk";
dmic_sync_mux_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dmic_sync_mux_ck";
func_dmic_abe_gfclk = "/ocp/l4@4a000000/cm1@4000/clocks/func_dmic_abe_gfclk";
mcasp_sync_mux_ck = "/ocp/l4@4a000000/cm1@4000/clocks/mcasp_sync_mux_ck";
func_mcasp_abe_gfclk = "/ocp/l4@4a000000/cm1@4000/clocks/func_mcasp_abe_gfclk";
mcbsp1_sync_mux_ck = "/ocp/l4@4a000000/cm1@4000/clocks/mcbsp1_sync_mux_ck";
func_mcbsp1_gfclk = "/ocp/l4@4a000000/cm1@4000/clocks/func_mcbsp1_gfclk";
mcbsp2_sync_mux_ck = "/ocp/l4@4a000000/cm1@4000/clocks/mcbsp2_sync_mux_ck";
func_mcbsp2_gfclk = "/ocp/l4@4a000000/cm1@4000/clocks/func_mcbsp2_gfclk";
mcbsp3_sync_mux_ck = "/ocp/l4@4a000000/cm1@4000/clocks/mcbsp3_sync_mux_ck";
func_mcbsp3_gfclk = "/ocp/l4@4a000000/cm1@4000/clocks/func_mcbsp3_gfclk";
slimbus1_fclk_1 = "/ocp/l4@4a000000/cm1@4000/clocks/slimbus1_fclk_1";
slimbus1_fclk_0 = "/ocp/l4@4a000000/cm1@4000/clocks/slimbus1_fclk_0";
slimbus1_fclk_2 = "/ocp/l4@4a000000/cm1@4000/clocks/slimbus1_fclk_2";
slimbus1_slimbus_clk = "/ocp/l4@4a000000/cm1@4000/clocks/slimbus1_slimbus_clk";
timer5_sync_mux = "/ocp/l4@4a000000/cm1@4000/clocks/timer5_sync_mux";
timer6_sync_mux = "/ocp/l4@4a000000/cm1@4000/clocks/timer6_sync_mux";
timer7_sync_mux = "/ocp/l4@4a000000/cm1@4000/clocks/timer7_sync_mux";
timer8_sync_mux = "/ocp/l4@4a000000/cm1@4000/clocks/timer8_sync_mux";
dummy_ck = "/ocp/l4@4a000000/cm1@4000/clocks/dummy_ck";
cm1_clockdomains = "/ocp/l4@4a000000/cm1@4000/clockdomains";
cm2 = "/ocp/l4@4a000000/cm2@8000";
cm2_clocks = "/ocp/l4@4a000000/cm2@8000/clocks";
per_hsd_byp_clk_mux_ck = "/ocp/l4@4a000000/cm2@8000/clocks/per_hsd_byp_clk_mux_ck";
dpll_per_ck = "/ocp/l4@4a000000/cm2@8000/clocks/dpll_per_ck";
dpll_per_m2_ck = "/ocp/l4@4a000000/cm2@8000/clocks/dpll_per_m2_ck";
dpll_per_x2_ck = "/ocp/l4@4a000000/cm2@8000/clocks/dpll_per_x2_ck";
dpll_per_m2x2_ck = "/ocp/l4@4a000000/cm2@8000/clocks/dpll_per_m2x2_ck";
dpll_per_m3x2_gate_ck = "/ocp/l4@4a000000/cm2@8000/clocks/dpll_per_m3x2_gate_ck";
dpll_per_m3x2_div_ck = "/ocp/l4@4a000000/cm2@8000/clocks/dpll_per_m3x2_div_ck";
dpll_per_m3x2_ck = "/ocp/l4@4a000000/cm2@8000/clocks/dpll_per_m3x2_ck";
dpll_per_m4x2_ck = "/ocp/l4@4a000000/cm2@8000/clocks/dpll_per_m4x2_ck";
dpll_per_m5x2_ck = "/ocp/l4@4a000000/cm2@8000/clocks/dpll_per_m5x2_ck";
dpll_per_m6x2_ck = "/ocp/l4@4a000000/cm2@8000/clocks/dpll_per_m6x2_ck";
dpll_per_m7x2_ck = "/ocp/l4@4a000000/cm2@8000/clocks/dpll_per_m7x2_ck";
dpll_usb_ck = "/ocp/l4@4a000000/cm2@8000/clocks/dpll_usb_ck";
dpll_usb_clkdcoldo_ck = "/ocp/l4@4a000000/cm2@8000/clocks/dpll_usb_clkdcoldo_ck";
dpll_usb_m2_ck = "/ocp/l4@4a000000/cm2@8000/clocks/dpll_usb_m2_ck";
ducati_clk_mux_ck = "/ocp/l4@4a000000/cm2@8000/clocks/ducati_clk_mux_ck";
func_12m_fclk = "/ocp/l4@4a000000/cm2@8000/clocks/func_12m_fclk";
func_24m_clk = "/ocp/l4@4a000000/cm2@8000/clocks/func_24m_clk";
func_24mc_fclk = "/ocp/l4@4a000000/cm2@8000/clocks/func_24mc_fclk";
func_48m_fclk = "/ocp/l4@4a000000/cm2@8000/clocks/func_48m_fclk";
func_48mc_fclk = "/ocp/l4@4a000000/cm2@8000/clocks/func_48mc_fclk";
func_64m_fclk = "/ocp/l4@4a000000/cm2@8000/clocks/func_64m_fclk";
func_96m_fclk = "/ocp/l4@4a000000/cm2@8000/clocks/func_96m_fclk";
init_60m_fclk = "/ocp/l4@4a000000/cm2@8000/clocks/init_60m_fclk";
per_abe_nc_fclk = "/ocp/l4@4a000000/cm2@8000/clocks/per_abe_nc_fclk";
aes1_fck = "/ocp/l4@4a000000/cm2@8000/clocks/aes1_fck";
aes2_fck = "/ocp/l4@4a000000/cm2@8000/clocks/aes2_fck";
dss_sys_clk = "/ocp/l4@4a000000/cm2@8000/clocks/dss_sys_clk";
dss_tv_clk = "/ocp/l4@4a000000/cm2@8000/clocks/dss_tv_clk";
dss_dss_clk = "/ocp/l4@4a000000/cm2@8000/clocks/dss_dss_clk";
dss_48mhz_clk = "/ocp/l4@4a000000/cm2@8000/clocks/dss_48mhz_clk";
fdif_fck = "/ocp/l4@4a000000/cm2@8000/clocks/fdif_fck";
gpio2_dbclk = "/ocp/l4@4a000000/cm2@8000/clocks/gpio2_dbclk";
gpio3_dbclk = "/ocp/l4@4a000000/cm2@8000/clocks/gpio3_dbclk";
gpio4_dbclk = "/ocp/l4@4a000000/cm2@8000/clocks/gpio4_dbclk";
gpio5_dbclk = "/ocp/l4@4a000000/cm2@8000/clocks/gpio5_dbclk";
gpio6_dbclk = "/ocp/l4@4a000000/cm2@8000/clocks/gpio6_dbclk";
sgx_clk_mux = "/ocp/l4@4a000000/cm2@8000/clocks/sgx_clk_mux";
hsi_fck = "/ocp/l4@4a000000/cm2@8000/clocks/hsi_fck";
iss_ctrlclk = "/ocp/l4@4a000000/cm2@8000/clocks/iss_ctrlclk";
mcbsp4_sync_mux_ck = "/ocp/l4@4a000000/cm2@8000/clocks/mcbsp4_sync_mux_ck";
per_mcbsp4_gfclk = "/ocp/l4@4a000000/cm2@8000/clocks/per_mcbsp4_gfclk";
hsmmc1_fclk = "/ocp/l4@4a000000/cm2@8000/clocks/hsmmc1_fclk";
hsmmc2_fclk = "/ocp/l4@4a000000/cm2@8000/clocks/hsmmc2_fclk";
ocp2scp_usb_phy_phy_48m = "/ocp/l4@4a000000/cm2@8000/clocks/ocp2scp_usb_phy_phy_48m";
sha2md5_fck = "/ocp/l4@4a000000/cm2@8000/clocks/sha2md5_fck";
slimbus2_fclk_1 = "/ocp/l4@4a000000/cm2@8000/clocks/slimbus2_fclk_1";
slimbus2_fclk_0 = "/ocp/l4@4a000000/cm2@8000/clocks/slimbus2_fclk_0";
slimbus2_slimbus_clk = "/ocp/l4@4a000000/cm2@8000/clocks/slimbus2_slimbus_clk";
smartreflex_core_fck = "/ocp/l4@4a000000/cm2@8000/clocks/smartreflex_core_fck";
smartreflex_iva_fck = "/ocp/l4@4a000000/cm2@8000/clocks/smartreflex_iva_fck";
smartreflex_mpu_fck = "/ocp/l4@4a000000/cm2@8000/clocks/smartreflex_mpu_fck";
cm2_dm10_mux = "/ocp/l4@4a000000/cm2@8000/clocks/cm2_dm10_mux";
cm2_dm11_mux = "/ocp/l4@4a000000/cm2@8000/clocks/cm2_dm11_mux";
cm2_dm2_mux = "/ocp/l4@4a000000/cm2@8000/clocks/cm2_dm2_mux";
cm2_dm3_mux = "/ocp/l4@4a000000/cm2@8000/clocks/cm2_dm3_mux";
cm2_dm4_mux = "/ocp/l4@4a000000/cm2@8000/clocks/cm2_dm4_mux";
cm2_dm9_mux = "/ocp/l4@4a000000/cm2@8000/clocks/cm2_dm9_mux";
usb_host_fs_fck = "/ocp/l4@4a000000/cm2@8000/clocks/usb_host_fs_fck";
utmi_p1_gfclk = "/ocp/l4@4a000000/cm2@8000/clocks/utmi_p1_gfclk";
usb_host_hs_utmi_p1_clk = "/ocp/l4@4a000000/cm2@8000/clocks/usb_host_hs_utmi_p1_clk";
utmi_p2_gfclk = "/ocp/l4@4a000000/cm2@8000/clocks/utmi_p2_gfclk";
usb_host_hs_utmi_p2_clk = "/ocp/l4@4a000000/cm2@8000/clocks/usb_host_hs_utmi_p2_clk";
usb_host_hs_utmi_p3_clk = "/ocp/l4@4a000000/cm2@8000/clocks/usb_host_hs_utmi_p3_clk";
usb_host_hs_hsic480m_p1_clk = "/ocp/l4@4a000000/cm2@8000/clocks/usb_host_hs_hsic480m_p1_clk";
usb_host_hs_hsic60m_p1_clk = "/ocp/l4@4a000000/cm2@8000/clocks/usb_host_hs_hsic60m_p1_clk";
usb_host_hs_hsic60m_p2_clk = "/ocp/l4@4a000000/cm2@8000/clocks/usb_host_hs_hsic60m_p2_clk";
usb_host_hs_hsic480m_p2_clk = "/ocp/l4@4a000000/cm2@8000/clocks/usb_host_hs_hsic480m_p2_clk";
usb_host_hs_func48mclk = "/ocp/l4@4a000000/cm2@8000/clocks/usb_host_hs_func48mclk";
usb_host_hs_fck = "/ocp/l4@4a000000/cm2@8000/clocks/usb_host_hs_fck";
otg_60m_gfclk = "/ocp/l4@4a000000/cm2@8000/clocks/otg_60m_gfclk";
usb_otg_hs_xclk = "/ocp/l4@4a000000/cm2@8000/clocks/usb_otg_hs_xclk";
usb_otg_hs_ick = "/ocp/l4@4a000000/cm2@8000/clocks/usb_otg_hs_ick";
usb_phy_cm_clk32k = "/ocp/l4@4a000000/cm2@8000/clocks/usb_phy_cm_clk32k";
usb_tll_hs_usb_ch2_clk = "/ocp/l4@4a000000/cm2@8000/clocks/usb_tll_hs_usb_ch2_clk";
usb_tll_hs_usb_ch0_clk = "/ocp/l4@4a000000/cm2@8000/clocks/usb_tll_hs_usb_ch0_clk";
usb_tll_hs_usb_ch1_clk = "/ocp/l4@4a000000/cm2@8000/clocks/usb_tll_hs_usb_ch1_clk";
usb_tll_hs_ick = "/ocp/l4@4a000000/cm2@8000/clocks/usb_tll_hs_ick";
cm2_clockdomains = "/ocp/l4@4a000000/cm2@8000/clockdomains";
l3_init_clkdm = "/ocp/l4@4a000000/cm2@8000/clockdomains/l3_init_clkdm";
omap4_scm_core = "/ocp/l4@4a000000/scm@2000";
scm_conf = "/ocp/l4@4a000000/scm@2000/scm_conf@0";
omap4_padconf_core = "/ocp/l4@4a000000/scm@100000";
omap4_pmx_core = "/ocp/l4@4a000000/scm@100000/pinmux@40";
twl6040_pins = "/ocp/l4@4a000000/scm@100000/pinmux@40/pinmux_twl6040_pins";
mcpdm_pins = "/ocp/l4@4a000000/scm@100000/pinmux@40/pinmux_mcpdm_pins";
mcbsp1_pins = "/ocp/l4@4a000000/scm@100000/pinmux@40/pinmux_mcbsp1_pins";
dss_dpi_pins = "/ocp/l4@4a000000/scm@100000/pinmux@40/pinmux_dss_dpi_pins";
tfp410_pins = "/ocp/l4@4a000000/scm@100000/pinmux@40/pinmux_tfp410_pins";
dss_hdmi_pins = "/ocp/l4@4a000000/scm@100000/pinmux@40/pinmux_dss_hdmi_pins";
tpd12s015_pins = "/ocp/l4@4a000000/scm@100000/pinmux@40/pinmux_tpd12s015_pins";
hsusbb1_pins = "/ocp/l4@4a000000/scm@100000/pinmux@40/pinmux_hsusbb1_pins";
i2c1_pins = "/ocp/l4@4a000000/scm@100000/pinmux@40/pinmux_i2c1_pins";
i2c2_pins = "/ocp/l4@4a000000/scm@100000/pinmux@40/pinmux_i2c2_pins";
i2c3_pins = "/ocp/l4@4a000000/scm@100000/pinmux@40/pinmux_i2c3_pins";
i2c4_pins = "/ocp/l4@4a000000/scm@100000/pinmux@40/pinmux_i2c4_pins";
wl12xx_gpio = "/ocp/l4@4a000000/scm@100000/pinmux@40/pinmux_wl12xx_gpio";
wl12xx_pins = "/ocp/l4@4a000000/scm@100000/pinmux@40/pinmux_wl12xx_pins";
twl6030_pins = "/ocp/l4@4a000000/scm@100000/pinmux@40/pinmux_twl6030_pins";
uart4_pins = "/ocp/l4@4a000000/scm@100000/pinmux@40/pinmux_uart4_pins";
led_gpio_pins = "/ocp/l4@4a000000/scm@100000/pinmux@40/gpio_led_pmx";
omap4_padconf_global = "/ocp/l4@4a000000/scm@100000/omap4_padconf_global@5a0";
pbias_regulator = "/ocp/l4@4a000000/scm@100000/omap4_padconf_global@5a0/pbias_regulator";
pbias_mmc_reg = "/ocp/l4@4a000000/scm@100000/omap4_padconf_global@5a0/pbias_regulator/pbias_mmc_omap4";
l4_wkup = "/ocp/l4@4a000000/l4@300000";
counter32k = "/ocp/l4@4a000000/l4@300000/counter@4000";
prm = "/ocp/l4@4a000000/l4@300000/prm@6000";
prm_clocks = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks";
sys_clkin_ck = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks/sys_clkin_ck";
abe_dpll_bypass_clk_mux_ck = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks/abe_dpll_bypass_clk_mux_ck";
abe_dpll_refclk_mux_ck = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks/abe_dpll_refclk_mux_ck";
dbgclk_mux_ck = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks/dbgclk_mux_ck";
l4_wkup_clk_mux_ck = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks/l4_wkup_clk_mux_ck";
syc_clk_div_ck = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks/syc_clk_div_ck";
gpio1_dbclk = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks/gpio1_dbclk";
dmt1_clk_mux = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks/dmt1_clk_mux";
usim_ck = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks/usim_ck";
usim_fclk = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks/usim_fclk";
pmd_stm_clock_mux_ck = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks/pmd_stm_clock_mux_ck";
pmd_trace_clk_mux_ck = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks/pmd_trace_clk_mux_ck";
stm_clk_div_ck = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks/stm_clk_div_ck";
trace_clk_div_div_ck = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks/trace_clk_div_div_ck";
trace_clk_div_ck = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks/trace_clk_div_ck";
div_ts_ck = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks/div_ts_ck";
bandgap_ts_fclk = "/ocp/l4@4a000000/l4@300000/prm@6000/clocks/bandgap_ts_fclk";
prm_clockdomains = "/ocp/l4@4a000000/l4@300000/prm@6000/clockdomains";
emu_sys_clkdm = "/ocp/l4@4a000000/l4@300000/prm@6000/clockdomains/emu_sys_clkdm";
scrm = "/ocp/l4@4a000000/l4@300000/scrm@a000";
scrm_clocks = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks";
auxclk0_src_gate_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk0_src_gate_ck";
auxclk0_src_mux_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk0_src_mux_ck";
auxclk0_src_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk0_src_ck";
auxclk0_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk0_ck";
auxclk1_src_gate_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk1_src_gate_ck";
auxclk1_src_mux_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk1_src_mux_ck";
auxclk1_src_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk1_src_ck";
auxclk1_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk1_ck";
auxclk2_src_gate_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk2_src_gate_ck";
auxclk2_src_mux_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk2_src_mux_ck";
auxclk2_src_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk2_src_ck";
auxclk2_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk2_ck";
auxclk3_src_gate_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk3_src_gate_ck";
auxclk3_src_mux_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk3_src_mux_ck";
auxclk3_src_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk3_src_ck";
auxclk3_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk3_ck";
auxclk4_src_gate_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk4_src_gate_ck";
auxclk4_src_mux_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk4_src_mux_ck";
auxclk4_src_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk4_src_ck";
auxclk4_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk4_ck";
auxclk5_src_gate_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk5_src_gate_ck";
auxclk5_src_mux_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk5_src_mux_ck";
auxclk5_src_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk5_src_ck";
auxclk5_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclk5_ck";
auxclkreq0_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclkreq0_ck";
auxclkreq1_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclkreq1_ck";
auxclkreq2_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclkreq2_ck";
auxclkreq3_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclkreq3_ck";
auxclkreq4_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclkreq4_ck";
auxclkreq5_ck = "/ocp/l4@4a000000/l4@300000/scrm@a000/clocks/auxclkreq5_ck";
scrm_clockdomains = "/ocp/l4@4a000000/l4@300000/scrm@a000/clockdomains";
omap4_pmx_wkup = "/ocp/l4@4a000000/l4@300000/pinmux@1e040";
led_wkgpio_pins = "/ocp/l4@4a000000/l4@300000/pinmux@1e040/pinmux_leds_wkpins";
twl6030_wkup_pins = "/ocp/l4@4a000000/l4@300000/pinmux@1e040/pinmux_twl6030_wkup_pins";
ocmcram = "/ocp/ocmcram@40304000";
sdma = "/ocp/dma-controller@4a056000";
gpio1 = "/ocp/gpio@4a310000";
gpio2 = "/ocp/gpio@48055000";
gpio3 = "/ocp/gpio@48057000";
gpio4 = "/ocp/gpio@48059000";
gpio5 = "/ocp/gpio@4805b000";
gpio6 = "/ocp/gpio@4805d000";
gpmc = "/ocp/gpmc@50000000";
uart1 = "/ocp/serial@4806a000";
uart2 = "/ocp/serial@4806c000";
uart3 = "/ocp/serial@48020000";
uart4 = "/ocp/serial@4806e000";
hwspinlock = "/ocp/spinlock@4a0f6000";
i2c1 = "/ocp/i2c@48070000";
twl = "/ocp/i2c@48070000/twl@48";
vaux1 = "/ocp/i2c@48070000/twl@48/regulator-vaux1";
vaux2 = "/ocp/i2c@48070000/twl@48/regulator-vaux2";
vaux3 = "/ocp/i2c@48070000/twl@48/regulator-vaux3";
vmmc = "/ocp/i2c@48070000/twl@48/regulator-vmmc";
vpp = "/ocp/i2c@48070000/twl@48/regulator-vpp";
vusim = "/ocp/i2c@48070000/twl@48/regulator-vusim";
vdac = "/ocp/i2c@48070000/twl@48/regulator-vdac";
vana = "/ocp/i2c@48070000/twl@48/regulator-vana";
vcxio = "/ocp/i2c@48070000/twl@48/regulator-vcxio";
vusb = "/ocp/i2c@48070000/twl@48/regulator-vusb";
v1v8 = "/ocp/i2c@48070000/twl@48/regulator-v1v8";
v2v1 = "/ocp/i2c@48070000/twl@48/regulator-v2v1";
twl_usb_comparator = "/ocp/i2c@48070000/twl@48/usb-comparator";
twl_pwm = "/ocp/i2c@48070000/twl@48/pwm";
twl_pwmled = "/ocp/i2c@48070000/twl@48/pwmled";
twl6040 = "/ocp/i2c@48070000/twl@4b";
i2c2 = "/ocp/i2c@48072000";
i2c3 = "/ocp/i2c@48060000";
i2c4 = "/ocp/i2c@48350000";
mcspi1 = "/ocp/spi@48098000";
mcspi2 = "/ocp/spi@4809a000";
mcspi3 = "/ocp/spi@480b8000";
mcspi4 = "/ocp/spi@480ba000";
mmc1 = "/ocp/mmc@4809c000";
mmc2 = "/ocp/mmc@480b4000";
mmc3 = "/ocp/mmc@480ad000";
mmc4 = "/ocp/mmc@480d1000";
mmc5 = "/ocp/mmc@480d5000";
wlcore = "/ocp/mmc@480d5000/wlcore@2";
mmu_dsp = "/ocp/mmu@4a066000";
mmu_ipu = "/ocp/mmu@55082000";
wdt2 = "/ocp/wdt@4a314000";
mcpdm = "/ocp/mcpdm@40132000";
dmic = "/ocp/dmic@4012e000";
mcbsp1 = "/ocp/mcbsp@40122000";
mcbsp2 = "/ocp/mcbsp@40124000";
mcbsp3 = "/ocp/mcbsp@40126000";
mcbsp4 = "/ocp/mcbsp@48096000";
keypad = "/ocp/keypad@4a31c000";
emif1 = "/ocp/emif@4c000000";
emif2 = "/ocp/emif@4d000000";
usb2_phy = "/ocp/ocp2scp@4a0ad000/usb2phy@4a0ad080";
mailbox = "/ocp/mailbox@4a0f4000";
mbox_ipu = "/ocp/mailbox@4a0f4000/mbox_ipu";
mbox_dsp = "/ocp/mailbox@4a0f4000/mbox_dsp";
timer1 = "/ocp/timer@4a318000";
timer2 = "/ocp/timer@48032000";
timer3 = "/ocp/timer@48034000";
timer4 = "/ocp/timer@48036000";
timer5 = "/ocp/timer@40138000";
timer6 = "/ocp/timer@4013a000";
timer7 = "/ocp/timer@4013c000";
timer8 = "/ocp/timer@4013e000";
timer9 = "/ocp/timer@4803e000";
timer10 = "/ocp/timer@48086000";
timer11 = "/ocp/timer@48088000";
usbhstll = "/ocp/usbhstll@4a062000";
usbhshost = "/ocp/usbhshost@4a064000";
usbhsohci = "/ocp/usbhshost@4a064000/ohci@4a064800";
usbhsehci = "/ocp/usbhshost@4a064000/ehci@4a064c00";
omap_control_usb2phy = "/ocp/control-phy@4a002300";
omap_control_usbotg = "/ocp/control-phy@4a00233c";
usb_otg_hs = "/ocp/usb_otg_hs@4a0ab000";
aes = "/ocp/aes@4b501000";
des = "/ocp/des@480a5000";
abb_mpu = "/ocp/regulator-abb-mpu";
abb_iva = "/ocp/regulator-abb-iva";
dss = "/ocp/dss@58000000";
rfbi = "/ocp/dss@58000000/encoder@58002000";
venc = "/ocp/dss@58000000/encoder@58003000";
dsi1 = "/ocp/dss@58000000/encoder@58004000";
dsi2 = "/ocp/dss@58000000/encoder@58005000";
hdmi = "/ocp/dss@58000000/encoder@58006000";
hdmi_out = "/ocp/dss@58000000/encoder@58006000/port/endpoint";
dpi_out = "/ocp/dss@58000000/port/endpoint";
bandgap = "/ocp/bandgap";
cpu_thermal = "/thermal-zones/cpu_thermal";
cpu_trips = "/thermal-zones/cpu_thermal/trips";
cpu_alert0 = "/thermal-zones/cpu_thermal/trips/cpu_alert";
cpu_crit = "/thermal-zones/cpu_thermal/trips/cpu_crit";
cpu_cooling_maps = "/thermal-zones/cpu_thermal/cooling-maps";
elpida_ECB240ABACN = "/lpddr2";
timings_elpida_ECB240ABACN_400mhz = "/lpddr2/lpddr2-timings@0";
timings_elpida_ECB240ABACN_200mhz = "/lpddr2/lpddr2-timings@1";
leds = "/leds";
sound = "/sound";
hsusb1_power = "/hsusb1_power_reg";
hsusb1_phy = "/hsusb1_phy";
wl12xx_vmmc = "/wl12xx_vmmc";
tfp410 = "/encoder@0";
tfp410_in = "/encoder@0/ports/port@0/endpoint@0";
tfp410_out = "/encoder@0/ports/port@1/endpoint@0";
dvi0 = "/connector@0";
dvi_connector_in = "/connector@0/port/endpoint";
tpd12s015 = "/encoder@1";
tpd12s015_in = "/encoder@1/ports/port@0/endpoint@0";
tpd12s015_out = "/encoder@1/ports/port@1/endpoint@0";
hdmi0 = "/connector@1";
hdmi_connector_in = "/connector@1/port/endpoint";
};
__local_fixups__ {
interrupt-parent = <0x0>;
cpus {
cpu@0 {
next-level-cache = <0x0>;
clocks = <0x0>;
};
cpu@1 {
next-level-cache = <0x0>;
};
};
interrupt-controller@48241000 {
interrupt-parent = <0x0>;
};
local-timer@48240600 {
clocks = <0x0>;
interrupt-parent = <0x0>;
};
interrupt-controller@48281000 {
interrupt-parent = <0x0>;
};
soc {
mpu {
sram = <0x0>;
};
};
ocp {
l4@4a000000 {
cm1@4000 {
clocks {
pad_clks_ck {
clocks = <0x0>;
};
slimbus_clk {
clocks = <0x0>;
};
dpll_abe_ck {
clocks = <0x0 0x4>;
};
dpll_abe_x2_ck {
clocks = <0x0>;
};
dpll_abe_m2x2_ck {
clocks = <0x0>;
};
abe_24m_fclk {
clocks = <0x0>;
};
abe_clk {
clocks = <0x0>;
};
aess_fclk {
clocks = <0x0>;
};
dpll_abe_m3x2_ck {
clocks = <0x0>;
};
core_hsd_byp_clk_mux_ck {
clocks = <0x0 0x4>;
};
dpll_core_ck {
clocks = <0x0 0x4>;
};
dpll_core_x2_ck {
clocks = <0x0>;
};
dpll_core_m6x2_ck {
clocks = <0x0>;
};
dpll_core_m2_ck {
clocks = <0x0>;
};
ddrphy_ck {
clocks = <0x0>;
};
dpll_core_m5x2_ck {
clocks = <0x0>;
};
div_core_ck {
clocks = <0x0>;
};
div_iva_hs_clk {
clocks = <0x0>;
};
div_mpu_hs_clk {
clocks = <0x0>;
};
dpll_core_m4x2_ck {
clocks = <0x0>;
};
dll_clk_div_ck {
clocks = <0x0>;
};
dpll_abe_m2_ck {
clocks = <0x0>;
};
dpll_core_m3x2_gate_ck {
clocks = <0x0>;
};
dpll_core_m3x2_div_ck {
clocks = <0x0>;
};
dpll_core_m3x2_ck {
clocks = <0x0 0x4>;
};
dpll_core_m7x2_ck {
clocks = <0x0>;
};
iva_hsd_byp_clk_mux_ck {
clocks = <0x0 0x4>;
};
dpll_iva_ck {
clocks = <0x0 0x4>;
};
dpll_iva_x2_ck {
clocks = <0x0>;
};
dpll_iva_m4x2_ck {
clocks = <0x0>;
};
dpll_iva_m5x2_ck {
clocks = <0x0>;
};
dpll_mpu_ck {
clocks = <0x0 0x4>;
};
dpll_mpu_m2_ck {
clocks = <0x0>;
};
per_hs_clk_div_ck {
clocks = <0x0>;
};
usb_hs_clk_div_ck {
clocks = <0x0>;
};
l3_div_ck {
clocks = <0x0>;
};
l4_div_ck {
clocks = <0x0>;
};
lp_clk_div_ck {
clocks = <0x0>;
};
mpu_periphclk {
clocks = <0x0>;
};
ocp_abe_iclk {
clocks = <0x0>;
};
per_abe_24m_fclk {
clocks = <0x0>;
};
dmic_sync_mux_ck {
clocks = <0x0 0x4 0x8>;
};
func_dmic_abe_gfclk {
clocks = <0x0 0x4 0x8>;
};
mcasp_sync_mux_ck {
clocks = <0x0 0x4 0x8>;
};
func_mcasp_abe_gfclk {
clocks = <0x0 0x4 0x8>;
};
mcbsp1_sync_mux_ck {
clocks = <0x0 0x4 0x8>;
};
func_mcbsp1_gfclk {
clocks = <0x0 0x4 0x8>;
};
mcbsp2_sync_mux_ck {
clocks = <0x0 0x4 0x8>;
};
func_mcbsp2_gfclk {
clocks = <0x0 0x4 0x8>;
};
mcbsp3_sync_mux_ck {
clocks = <0x0 0x4 0x8>;
};
func_mcbsp3_gfclk {
clocks = <0x0 0x4 0x8>;
};
slimbus1_fclk_1 {
clocks = <0x0>;
};
slimbus1_fclk_0 {
clocks = <0x0>;
};
slimbus1_fclk_2 {
clocks = <0x0>;
};
slimbus1_slimbus_clk {
clocks = <0x0>;
};
timer5_sync_mux {
clocks = <0x0 0x4>;
};
timer6_sync_mux {
clocks = <0x0 0x4>;
};
timer7_sync_mux {
clocks = <0x0 0x4>;
};
timer8_sync_mux {
clocks = <0x0 0x4>;
};
};
};
cm2@8000 {
clocks {
per_hsd_byp_clk_mux_ck {
clocks = <0x0 0x4>;
};
dpll_per_ck {
clocks = <0x0 0x4>;
};
dpll_per_m2_ck {
clocks = <0x0>;
};
dpll_per_x2_ck {
clocks = <0x0>;
};
dpll_per_m2x2_ck {
clocks = <0x0>;
};
dpll_per_m3x2_gate_ck {
clocks = <0x0>;
};
dpll_per_m3x2_div_ck {
clocks = <0x0>;
};
dpll_per_m3x2_ck {
clocks = <0x0 0x4>;
};
dpll_per_m4x2_ck {
clocks = <0x0>;
};
dpll_per_m5x2_ck {
clocks = <0x0>;
};
dpll_per_m6x2_ck {
clocks = <0x0>;
};
dpll_per_m7x2_ck {
clocks = <0x0>;
};
dpll_usb_ck {
clocks = <0x0 0x4>;
};
dpll_usb_clkdcoldo_ck {
clocks = <0x0>;
};
dpll_usb_m2_ck {
clocks = <0x0>;
};
ducati_clk_mux_ck {
clocks = <0x0 0x4>;
};
func_12m_fclk {
clocks = <0x0>;
};
func_24m_clk {
clocks = <0x0>;
};
func_24mc_fclk {
clocks = <0x0>;
};
func_48m_fclk {
clocks = <0x0>;
};
func_48mc_fclk {
clocks = <0x0>;
};
func_64m_fclk {
clocks = <0x0>;
};
func_96m_fclk {
clocks = <0x0>;
};
init_60m_fclk {
clocks = <0x0>;
};
per_abe_nc_fclk {
clocks = <0x0>;
};
aes1_fck {
clocks = <0x0>;
};
aes2_fck {
clocks = <0x0>;
};
dss_sys_clk {
clocks = <0x0>;
};
dss_tv_clk {
clocks = <0x0>;
};
dss_dss_clk {
clocks = <0x0>;
};
dss_48mhz_clk {
clocks = <0x0>;
};
fdif_fck {
clocks = <0x0>;
};
gpio2_dbclk {
clocks = <0x0>;
};
gpio3_dbclk {
clocks = <0x0>;
};
gpio4_dbclk {
clocks = <0x0>;
};
gpio5_dbclk {
clocks = <0x0>;
};
gpio6_dbclk {
clocks = <0x0>;
};
sgx_clk_mux {
clocks = <0x0 0x4>;
};
hsi_fck {
clocks = <0x0>;
};
iss_ctrlclk {
clocks = <0x0>;
};
mcbsp4_sync_mux_ck {
clocks = <0x0 0x4>;
};
per_mcbsp4_gfclk {
clocks = <0x0 0x4>;
};
hsmmc1_fclk {
clocks = <0x0 0x4>;
};
hsmmc2_fclk {
clocks = <0x0 0x4>;
};
ocp2scp_usb_phy_phy_48m {
clocks = <0x0>;
};
sha2md5_fck {
clocks = <0x0>;
};
slimbus2_fclk_1 {
clocks = <0x0>;
};
slimbus2_fclk_0 {
clocks = <0x0>;
};
slimbus2_slimbus_clk {
clocks = <0x0>;
};
smartreflex_core_fck {
clocks = <0x0>;
};
smartreflex_iva_fck {
clocks = <0x0>;
};
smartreflex_mpu_fck {
clocks = <0x0>;
};
cm2_dm10_mux {
clocks = <0x0 0x4>;
};
cm2_dm11_mux {
clocks = <0x0 0x4>;
};
cm2_dm2_mux {
clocks = <0x0 0x4>;
};
cm2_dm3_mux {
clocks = <0x0 0x4>;
};
cm2_dm4_mux {
clocks = <0x0 0x4>;
};
cm2_dm9_mux {
clocks = <0x0 0x4>;
};
usb_host_fs_fck {
clocks = <0x0>;
};
utmi_p1_gfclk {
clocks = <0x0 0x4>;
};
usb_host_hs_utmi_p1_clk {
clocks = <0x0>;
};
utmi_p2_gfclk {
clocks = <0x0 0x4>;
};
usb_host_hs_utmi_p2_clk {
clocks = <0x0>;
};
usb_host_hs_utmi_p3_clk {
clocks = <0x0>;
};
usb_host_hs_hsic480m_p1_clk {
clocks = <0x0>;
};
usb_host_hs_hsic60m_p1_clk {
clocks = <0x0>;
};
usb_host_hs_hsic60m_p2_clk {
clocks = <0x0>;
};
usb_host_hs_hsic480m_p2_clk {
clocks = <0x0>;
};
usb_host_hs_func48mclk {
clocks = <0x0>;
};
usb_host_hs_fck {
clocks = <0x0>;
};
otg_60m_gfclk {
clocks = <0x0 0x4>;
};
usb_otg_hs_xclk {
clocks = <0x0>;
};
usb_otg_hs_ick {
clocks = <0x0>;
};
usb_phy_cm_clk32k {
clocks = <0x0>;
};
usb_tll_hs_usb_ch2_clk {
clocks = <0x0>;
};
usb_tll_hs_usb_ch0_clk {
clocks = <0x0>;
};
usb_tll_hs_usb_ch1_clk {
clocks = <0x0>;
};
usb_tll_hs_ick {
clocks = <0x0>;
};
};
clockdomains {
l3_init_clkdm {
clocks = <0x0 0x4>;
};
};
};
scm@100000 {
pinmux@40 {
pinctrl-0 = <0x0 0x4 0x8 0xc 0x10>;
};
omap4_padconf_global@5a0 {
pbias_regulator {
syscon = <0x0>;
};
};
};
l4@300000 {
prm@6000 {
clocks {
sys_clkin_ck {
clocks = <0x0 0x4 0x8 0xc 0x10 0x14 0x18>;
};
abe_dpll_bypass_clk_mux_ck {
clocks = <0x0 0x4>;
};
abe_dpll_refclk_mux_ck {
clocks = <0x0 0x4>;
};
dbgclk_mux_ck {
clocks = <0x0>;
};
l4_wkup_clk_mux_ck {
clocks = <0x0 0x4>;
};
syc_clk_div_ck {
clocks = <0x0>;
};
gpio1_dbclk {
clocks = <0x0>;
};
dmt1_clk_mux {
clocks = <0x0 0x4>;
};
usim_ck {
clocks = <0x0>;
};
usim_fclk {
clocks = <0x0>;
};
pmd_stm_clock_mux_ck {
clocks = <0x0 0x4 0x8>;
};
pmd_trace_clk_mux_ck {
clocks = <0x0 0x4 0x8>;
};
stm_clk_div_ck {
clocks = <0x0>;
};
trace_clk_div_div_ck {
clocks = <0x0>;
};
trace_clk_div_ck {
clocks = <0x0>;
};
div_ts_ck {
clocks = <0x0>;
};
bandgap_ts_fclk {
clocks = <0x0>;
};
};
clockdomains {
emu_sys_clkdm {
clocks = <0x0>;
};
};
};
scrm@a000 {
clocks {
auxclk0_src_gate_ck {
clocks = <0x0>;
};
auxclk0_src_mux_ck {
clocks = <0x0 0x4 0x8>;
};
auxclk0_src_ck {
clocks = <0x0 0x4>;
};
auxclk0_ck {
clocks = <0x0>;
};
auxclk1_src_gate_ck {
clocks = <0x0>;
};
auxclk1_src_mux_ck {
clocks = <0x0 0x4 0x8>;
};
auxclk1_src_ck {
clocks = <0x0 0x4>;
};
auxclk1_ck {
clocks = <0x0>;
};
auxclk2_src_gate_ck {
clocks = <0x0>;
};
auxclk2_src_mux_ck {
clocks = <0x0 0x4 0x8>;
};
auxclk2_src_ck {
clocks = <0x0 0x4>;
};
auxclk2_ck {
clocks = <0x0>;
};
auxclk3_src_gate_ck {
clocks = <0x0>;
};
auxclk3_src_mux_ck {
clocks = <0x0 0x4 0x8>;
};
auxclk3_src_ck {
clocks = <0x0 0x4>;
};
auxclk3_ck {
clocks = <0x0>;
};
auxclk4_src_gate_ck {
clocks = <0x0>;
};
auxclk4_src_mux_ck {
clocks = <0x0 0x4 0x8>;
};
auxclk4_src_ck {
clocks = <0x0 0x4>;
};
auxclk4_ck {
clocks = <0x0>;
};
auxclk5_src_gate_ck {
clocks = <0x0>;
};
auxclk5_src_mux_ck {
clocks = <0x0 0x4 0x8>;
};
auxclk5_src_ck {
clocks = <0x0 0x4>;
};
auxclk5_ck {
clocks = <0x0>;
};
auxclkreq0_ck {
clocks = <0x0 0x4 0x8 0xc 0x10 0x14>;
};
auxclkreq1_ck {
clocks = <0x0 0x4 0x8 0xc 0x10 0x14>;
};
auxclkreq2_ck {
clocks = <0x0 0x4 0x8 0xc 0x10 0x14>;
};
auxclkreq3_ck {
clocks = <0x0 0x4 0x8 0xc 0x10 0x14>;
};
auxclkreq4_ck {
clocks = <0x0 0x4 0x8 0xc 0x10 0x14>;
};
auxclkreq5_ck {
clocks = <0x0 0x4 0x8 0xc 0x10 0x14>;
};
};
};
};
};
gpmc@50000000 {
clocks = <0x0>;
};
serial@4806c000 {
interrupts-extended = <0x0 0x10>;
};
serial@48020000 {
interrupts-extended = <0x0 0x10>;
};
serial@4806e000 {
interrupts-extended = <0x0 0x10>;
};
i2c@48070000 {
pinctrl-0 = <0x0>;
twl@48 {
pinctrl-0 = <0x0 0x4>;
usb-comparator {
usb-supply = <0x0>;
};
};
twl@4b {
pinctrl-0 = <0x0>;
ti,audpwron-gpio = <0x0>;
vio-supply = <0x0>;
v2v1-supply = <0x0>;
};
};
i2c@48072000 {
pinctrl-0 = <0x0>;
};
i2c@48060000 {
pinctrl-0 = <0x0>;
};
i2c@48350000 {
pinctrl-0 = <0x0>;
};
spi@48098000 {
dmas = <0x0 0x8 0x10 0x18 0x20 0x28 0x30 0x38>;
};
spi@4809a000 {
dmas = <0x0 0x8 0x10 0x18>;
};
spi@480b8000 {
dmas = <0x0 0x8>;
};
spi@480ba000 {
dmas = <0x0 0x8>;
};
mmc@4809c000 {
dmas = <0x0 0x8>;
pbias-supply = <0x0>;
vmmc-supply = <0x0>;
};
mmc@480b4000 {
dmas = <0x0 0x8>;
};
mmc@480ad000 {
dmas = <0x0 0x8>;
};
mmc@480d1000 {
dmas = <0x0 0x8>;
};
mmc@480d5000 {
dmas = <0x0 0x8>;
pinctrl-0 = <0x0>;
vmmc-supply = <0x0>;
wlcore@2 {
interrupt-parent = <0x0>;
};
};
mcpdm@40132000 {
dmas = <0x0 0x8>;
pinctrl-0 = <0x0>;
};
dmic@4012e000 {
dmas = <0x0>;
};
mcbsp@40122000 {
dmas = <0x0 0x8>;
pinctrl-0 = <0x0>;
};
mcbsp@40124000 {
dmas = <0x0 0x8>;
};
mcbsp@40126000 {
dmas = <0x0 0x8>;
};
mcbsp@48096000 {
dmas = <0x0 0x8>;
};
emif@4c000000 {
device-handle = <0x0>;
};
emif@4d000000 {
device-handle = <0x0>;
};
ocp2scp@4a0ad000 {
usb2phy@4a0ad080 {
ctrl-module = <0x0>;
clocks = <0x0>;
};
};
usbhshost@4a064000 {
clocks = <0x0 0x4 0x8>;
ohci@4a064800 {
interrupt-parent = <0x0>;
};
ehci@4a064c00 {
interrupt-parent = <0x0>;
phys = <0x0>;
};
};
usb_otg_hs@4a0ab000 {
usb-phy = <0x0>;
phys = <0x0>;
ctrl-module = <0x0>;
};
aes@4b501000 {
dmas = <0x0 0x8>;
};
des@480a5000 {
dmas = <0x0 0x8>;
};
regulator-abb-mpu {
clocks = <0x0>;
};
regulator-abb-iva {
clocks = <0x0>;
};
dss@58000000 {
clocks = <0x0>;
dispc@58001000 {
clocks = <0x0>;
};
encoder@58002000 {
clocks = <0x0 0x4>;
};
encoder@58003000 {
clocks = <0x0>;
};
encoder@58004000 {
clocks = <0x0 0x4>;
};
encoder@58005000 {
clocks = <0x0 0x4>;
vdd-supply = <0x0>;
};
encoder@58006000 {
clocks = <0x0 0x4>;
dmas = <0x0>;
vdda-supply = <0x0>;
port {
endpoint {
remote-endpoint = <0x0>;
};
};
};
port {
endpoint {
remote-endpoint = <0x0>;
};
};
};
bandgap {
gpios = <0x0>;
};
};
thermal-zones {
cpu_thermal {
thermal-sensors = <0x0>;
cooling-maps {
map0 {
trip = <0x0>;
cooling-device = <0x0>;
};
};
};
};
leds {
pinctrl-0 = <0x0 0x4>;
heartbeat {
gpios = <0x0>;
};
mmc {
gpios = <0x0>;
};
};
sound {
ti,mcpdm = <0x0>;
ti,twl6040 = <0x0>;
};
hsusb1_power_reg {
gpio = <0x0>;
};
hsusb1_phy {
reset-gpios = <0x0>;
vcc-supply = <0x0>;
clocks = <0x0>;
};
wl12xx_vmmc {
pinctrl-0 = <0x0>;
gpio = <0x0>;
};
encoder@0 {
powerdown-gpios = <0x0>;
ports {
port@0 {
endpoint@0 {
remote-endpoint = <0x0>;
};
};
port@1 {
endpoint@0 {
remote-endpoint = <0x0>;
};
};
};
};
connector@0 {
ddc-i2c-bus = <0x0>;
port {
endpoint {
remote-endpoint = <0x0>;
};
};
};
encoder@1 {
gpios = <0x0 0xc 0x18>;
ports {
port@0 {
endpoint@0 {
remote-endpoint = <0x0>;
};
};
port@1 {
endpoint@0 {
remote-endpoint = <0x0>;
};
};
};
};
connector@1 {
port {
endpoint {
remote-endpoint = <0x0>;
};
};
};
};
};
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