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@dustin
Created Apr 7, 2016
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volatile bool tx_sumd = false;
volatile bool timedout = false;
// Set tx_sumd = true every 10ms
void initSUMDTimer() {
cli();
TCCR1A = 0;
TCCR1B = 0;
TCNT1 = 0;
OCR1A = 2500; // compare match register 16MHz/64/10Hz
TCCR1B |= (1 << WGM12); // CTC mode
TCCR1B |= (1 << CS11) | (1 << CS10); // 64 prescaler
TIMSK1 |= (1 << OCIE1A); // enable timer compare interrupt
sei();
}
#define T2_9MS (255-141)
#define T2_10MS (255-156)
// Set timeout = true every 9ms (unless we got a packet)
void initTimeoutTimer() {
cli();
TCCR2A = 0;
TCCR2B = 0;
TCNT2 = T2_9MS; // about 9ms to go
TCCR2B |= (1 << CS22) | (1 << CS21) | (1 << CS20); // 1024 prescaler
TIMSK2 |= (1 << TOIE2); // enable timer overflow interrupt
sei();
}
ISR(TIMER1_COMPA_vect) {
tx_sumd = true;
}
ISR(TIMER2_OVF_vect) {
timedout = true;
}
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