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OSX patch for RISC-V emulator riscvemu-2016-12-20.1
Raw
README.md

Build riscvemu on OSX

$ curl -O http://bellard.org/riscvemu/riscvemu-2016-12-20.1.tar.gz
$ tar xfz riscvemu-2016-12-20.1.tar.gz
$ cd riscvemu-2016-12-20.1
$ patch -p0 < ../riscvemu-2016-12-20.1-osx.patch
$ make

Test

$ ./riscvemu rv128test.bin
RISCV dynamic base ISA change:
RV64I:  max register value=18446744073709551615
FP64:   sqrt(2)=1.414213562373095
RV32I:  max register value=4294967295
FP32:   sqrt(2)=1.414213

Power off.
$

Prepare Linux

$ cd ..
$ curl -O http://bellard.org/riscvemu/diskimage-linux-riscv64-2016-12-19.1.tar.gz
$ tar xfz diskimage-linux-riscv64-2016-12-19.1.tar.gz 
$ cd diskimage-linux-riscv64-2016-12-19.1

Launch Linux on riscvemu

$ ../riscvemu-2016-12-20.1/riscvemu bbl.bin root.bin
              vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
                  vvvvvvvvvvvvvvvvvvvvvvvvvvvv
rrrrrrrrrrrrr       vvvvvvvvvvvvvvvvvvvvvvvvvv
rrrrrrrrrrrrrrrr      vvvvvvvvvvvvvvvvvvvvvvvv
rrrrrrrrrrrrrrrrrr    vvvvvvvvvvvvvvvvvvvvvvvv
rrrrrrrrrrrrrrrrrr    vvvvvvvvvvvvvvvvvvvvvvvv
rrrrrrrrrrrrrrrrrr    vvvvvvvvvvvvvvvvvvvvvvvv
rrrrrrrrrrrrrrrr      vvvvvvvvvvvvvvvvvvvvvv  
rrrrrrrrrrrrr       vvvvvvvvvvvvvvvvvvvvvv    
rr                vvvvvvvvvvvvvvvvvvvvvv      
rr            vvvvvvvvvvvvvvvvvvvvvvvv      rr
rrrr      vvvvvvvvvvvvvvvvvvvvvvvvvv      rrrr
rrrrrr      vvvvvvvvvvvvvvvvvvvvvv      rrrrrr
rrrrrrrr      vvvvvvvvvvvvvvvvvv      rrrrrrrr
rrrrrrrrrr      vvvvvvvvvvvvvv      rrrrrrrrrr
rrrrrrrrrrrr      vvvvvvvvvv      rrrrrrrrrrrr
rrrrrrrrrrrrrr      vvvvvv      rrrrrrrrrrrrrr
rrrrrrrrrrrrrrrr      vv      rrrrrrrrrrrrrrrr
rrrrrrrrrrrrrrrrrr          rrrrrrrrrrrrrrrrrr
rrrrrrrrrrrrrrrrrrrr      rrrrrrrrrrrrrrrrrrrr
rrrrrrrrrrrrrrrrrrrrrr  rrrrrrrrrrrrrrrrrrrrrr

       INSTRUCTION SETS WANT TO BE FREE
[    0.000000] Linux version 4.6.2-00042-g8493175-dirty (bellard@localhost.localdomain) (gcc version 6.1.0 (GCC) ) #2 Mon Dec 19 23:12:51 CET 2016
[    0.000000] Available physical memory: 252MB
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000080400000-0x000000008fffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000080400000-0x000000008fffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000080400000-0x000000008fffffff]
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 63630
[    0.000000] Kernel command line: root=/dev/hda ide_core.noprobe=0.1 ro  
[    0.000000] PID hash table entries: 1024 (order: 1, 8192 bytes)
[    0.000000] Dentry cache hash table entries: 32768 (order: 6, 262144 bytes)
[    0.000000] Inode-cache hash table entries: 16384 (order: 5, 131072 bytes)
[    0.000000] Sorting __ex_table...
[    0.000000] Memory: 251400K/258048K available (1743K kernel code, 119K rwdata, 512K rodata, 56K init, 230K bss, 6648K reserved, 0K cma-reserved)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] NR_IRQS:0 nr_irqs:0 0
[    0.000000] clocksource: riscv_clocksource: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 191126044627 ns
[    0.000000] Calibrating delay loop (skipped), value calculated using timer frequency.. 20.00 BogoMIPS (lpj=100000)
[    0.000000] pid_max: default: 32768 minimum: 301
[    0.000000] Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
[    0.000000] Mountpoint-cache hash table entries: 512 (order: 0, 4096 bytes)
[    0.000000] devtmpfs: initialized
[    0.000000] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.010000] NET: Registered protocol family 16
[    0.020000] vgaarb: loaded
[    0.030000] clocksource: Switched to clocksource riscv_clocksource
[    0.040000] NET: Registered protocol family 2
[    0.040000] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
[    0.040000] TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
[    0.040000] TCP: Hash tables configured (established 2048 bind 2048)
[    0.040000] UDP hash table entries: 256 (order: 1, 8192 bytes)
[    0.040000] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
[    0.040000] NET: Registered protocol family 1
[    0.040000] console [sbi_console0] enabled
[    0.070000] futex hash table entries: 256 (order: 0, 6144 bytes)
[    0.070000] workingset: timestamp_bits=61 max_order=16 bucket_order=0
[    0.180000] io scheduler noop registered
[    0.180000] io scheduler cfq registered (default)
[    0.450000] Uniform Multi-Platform E-IDE driver
[    0.450000] ide-gd driver 1.18
[    0.450000] ide: skipping probe for hdb
[    0.510000] hda: RISCVEMU HARDDISK, ATA DISK drive
[    0.510000] ide0 at 0xffffffff78002000-0xffffffff7800201c,0xffffffff78004020 on irq 1
[    0.510000] hda: max request size: 128KiB
[    0.510000] hda: 524288 sectors (268 MB) w/256KiB Cache, CHS=520/16/63
[    0.540000] EXT4-fs (hda): couldn't mount as ext3 due to feature incompatibilities
[    0.540000] EXT4-fs (hda): mounting ext2 file system using the ext4 subsystem
[    0.560000] EXT4-fs (hda): mounted filesystem without journal. Opts: (null)
[    0.560000] VFS: Mounted root (ext2 filesystem) readonly on device 3:0.
[    0.570000] devtmpfs: mounted
[    0.570000] Freeing unused kernel memory: 56K (ffffffff80000000 - ffffffff8000e000)
[    0.570000] This architecture does not have kernel memory protection.

Welcome to RISCVEMU (64 bits)
sh-4.3# ls -l      
total 20
-rw-r--r-- 1 root root  185 Dec 18  2016 hello.c
-rw-r--r-- 1 root root  139 Dec 18  2016 readme.txt
-rw-r--r-- 1 root root 8256 Dec 19  2016 rv128test.bin
sh-4.3# gcc hello.c
sh-4.3# ./a.out
Hello World
sh-4.3# uname -a
Linux ucbvax 4.6.2-00042-g8493175-dirty #2 Mon Dec 19 23:12:51 CET 2016 riscv64 GNU/Linux
sh-4.3# riscvemu -b 128 rv128test.bin 
RISCV dynamic base ISA change:
RV128I: max register value=340282366920938463463374607431768211455
FP128:  sqrt(2)=1.414213562373095048801688724209698
RV64I:  max register value=18446744073709551615
FP64:   sqrt(2)=1.414213562373095
RV32I:  max register value=4294967295
FP32:   sqrt(2)=1.414213

Power off.
sh-4.3#

Terminate riscvemu

On other terminal,

$ killall riscvemu

Reference

Raw
riscvemu-2016-12-20.1-osx.patch
diff -c ../riscvemu-2016-12-20.1/Makefile ./Makefile
*** ../riscvemu-2016-12-20.1/Makefile Wed Dec 21 04:16:21 2016
--- ./Makefile Fri Dec 30 12:01:21 2016
***************
*** 22,34 ****
RISCVEMU_OBJS:=softfp.o ide.o
riscvemu32: riscvemu32.o $(RISCVEMU_OBJS)
! $(CC) $(LDFLAGS) -o $@ $^ -lrt
riscvemu64: riscvemu64.o $(RISCVEMU_OBJS)
! $(CC) $(LDFLAGS) -o $@ $^ -lrt
riscvemu128: riscvemu128.o $(RISCVEMU_OBJS)
! $(CC) $(LDFLAGS) -o $@ $^ -lrt
riscvemu32.o: riscvemu.c
$(CC) $(CFLAGS) -DMAX_XLEN=32 -c -o $@ $<
--- 22,34 ----
RISCVEMU_OBJS:=softfp.o ide.o
riscvemu32: riscvemu32.o $(RISCVEMU_OBJS)
! $(CC) $(LDFLAGS) -o $@ $^ #-lrt
riscvemu64: riscvemu64.o $(RISCVEMU_OBJS)
! $(CC) $(LDFLAGS) -o $@ $^ #-lrt
riscvemu128: riscvemu128.o $(RISCVEMU_OBJS)
! $(CC) $(LDFLAGS) -o $@ $^ #-lrt
riscvemu32.o: riscvemu.c
$(CC) $(CFLAGS) -DMAX_XLEN=32 -c -o $@ $<
Common subdirectories: ../riscvemu-2016-12-20.1/js and ./js
Common subdirectories: ../riscvemu-2016-12-20.1/patches and ./patches
diff -c ../riscvemu-2016-12-20.1/riscvemu.c ./riscvemu.c
*** ../riscvemu-2016-12-20.1/riscvemu.c Wed Dec 21 04:16:21 2016
--- ./riscvemu.c Fri Dec 30 12:14:30 2016
***************
*** 31,36 ****
--- 31,40 ----
#include <errno.h>
#include <unistd.h>
#include <time.h>
+ #ifdef __MACH__
+ #include <mach/clock.h>
+ #include <mach/mach.h>
+ #endif
#ifdef EMSCRIPTEN
#include "list.h"
#include <emscripten.h>
***************
*** 1691,1697 ****
--- 1695,1713 ----
static uint64_t rtc_get_real_time(RISCVMachine *s)
{
struct timespec ts;
+
+ #ifdef __MACH__ // OS X does not have clock_gettime, use clock_get_time
+ clock_serv_t cclock;
+ mach_timespec_t mts;
+ host_get_clock_service(mach_host_self(), CALENDAR_CLOCK, &cclock);
+ clock_get_time(cclock, &mts);
+ mach_port_deallocate(mach_task_self(), cclock);
+ ts.tv_sec = mts.tv_sec;
+ ts.tv_nsec = mts.tv_nsec;
+ #else
clock_gettime(CLOCK_MONOTONIC, &ts);
+ #endif
+
return (uint64_t)ts.tv_sec * RTC_FREQ +
(ts.tv_nsec / (1000000000 / RTC_FREQ));
}
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