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gistfile1.txt
Searching 6027 files for "^( +)[^ \n][^\n][^\n][^\n][^\n][^\n][^\n][^(\n][^(\n][^(\n][^\n]*= *\n\1 [^ ]" (regex)
qemu/qemu-char.c:
837 static void cfmakeraw (struct termios *termios_p)
838 {
839: termios_p->c_iflag &=
840: ~(IGNBRK|BRKINT|PARMRK|ISTRIP|INLCR|IGNCR|ICRNL|IXON);
841 termios_p->c_oflag &= ~OPOST;
842 termios_p->c_lflag &= ~(ECHO|ECHONL|ICANON|ISIG|IEXTEN);
qemu/block/linux-aio.c:
93 for (i = 0; i < nevents; i++) {
94 struct iocb *iocb = events[i].obj;
95: struct qemu_laiocb *laiocb =
96: container_of(iocb, struct qemu_laiocb, iocb);
97
98 laiocb->ret = io_event_ret(&events[i]);
qemu/hw/blizzard.c:
964 switch (ds_get_bits_per_pixel(s->state)) {
965 case 0:
966: s->line_fn_tab[0] = s->line_fn_tab[1] =
967: g_malloc0(sizeof(blizzard_fn_t) * 0x10);
968 break;
969 case 8:
qemu/hw/bt-hci.c:
644 hci->lm.role_bmp |= 1 << hci->lm.last_handle;
645
646: hci->lm.handle[hci->lm.last_handle].lmp_acl_data =
647: link->slave->lmp_acl_data;
648 } else {
649 /* We are the slave side of an ACL link */
650 hci->lm.role_bmp &= ~(1 << hci->lm.last_handle);
651
652: hci->lm.handle[hci->lm.last_handle].lmp_acl_data =
653: link->host->lmp_acl_resp;
654 }
655
...
657 if (master) {
658 link->acl_mode = acl_active;
659: hci->lm.handle[hci->lm.last_handle].acl_mode_timer =
660: qemu_new_timer_ns(vm_clock, bt_hci_mode_tick, link);
661 }
662 }
...
875 uint16_t handle, int reason)
876 {
877: struct bt_link_s *btlink =
878: hci->lm.handle[handle & ~HCI_HANDLE_OFFSET].link;
879 struct bt_hci_link_s *link;
880 evt_disconn_complete params;
...
1849
1850 /* TODO: check that the remaining bits are all 0 */
1851: hci->device.inquiry_scan =
1852: !!(PARAM(write_scan_enable, scan_enable) & SCAN_INQUIRY);
1853: hci->device.page_scan =
1854: !!(PARAM(write_scan_enable, scan_enable) & SCAN_PAGE);
1855 bt_hci_event_complete_status(hci, HCI_SUCCESS);
1856 break;
....
2144 s->lm.inquiry_done = qemu_new_timer_ns(vm_clock, bt_hci_inquiry_done, s);
2145 s->lm.inquiry_next = qemu_new_timer_ns(vm_clock, bt_hci_inquiry_next, s);
2146: s->conn_accept_timer =
2147: qemu_new_timer_ns(vm_clock, bt_hci_conn_accept_timeout, s);
2148
2149 s->evt_packet = bt_hci_evt_packet;
qemu/hw/bt-hid.c:
151 static void bt_hid_send_handshake(struct bt_hid_device_s *s, int result)
152 {
153: *s->control->sdu_out(s->control, 1) =
154: (BT_HANDSHAKE << 4) | result;
155 s->control->sdu_submit(s->control);
156 }
...
158 static void bt_hid_send_control(struct bt_hid_device_s *s, int operation)
159 {
160: *s->control->sdu_out(s->control, 1) =
161: (BT_HID_CONTROL << 4) | operation;
162 s->control->sdu_submit(s->control);
163 }
...
519 {
520 struct bt_hid_device_s *s = g_malloc0(sizeof(*s));
521: uint32_t class =
522: /* Format type */
523 (0 << 0) |
524 /* Device class */
qemu/hw/bt-l2cap.c:
1273 {
1274 struct bt_l2cap_device_s *dev = (struct bt_l2cap_device_s *) link->host;
1275: struct l2cap_instance_s *l2cap =
1276: /* TODO: Retrieve from upper layer */ (void *) dev;
1277
1278 /* Signal to upper layer */
....
1283 static void l2cap_lmp_disconnect_slave(struct bt_link_s *link)
1284 {
1285: struct slave_l2cap_instance_s *l2cap =
1286: (struct slave_l2cap_instance_s *) link;
1287
1288 l2cap_teardown(&l2cap->l2cap, 0);
....
1292 const uint8_t *data, int start, int len)
1293 {
1294: struct slave_l2cap_instance_s *l2cap =
1295: (struct slave_l2cap_instance_s *) link;
1296
1297 if (start)
....
1306 {
1307 struct bt_l2cap_device_s *dev = (struct bt_l2cap_device_s *) link->host;
1308: struct l2cap_instance_s *l2cap =
1309: /* TODO: Retrieve from upper layer */ (void *) dev;
1310
1311 if (start)
qemu/hw/bt-sdp.c:
709 }
710 record->uuids = 1 << ffs(record->uuids - 1);
711: record->attribute_list =
712: g_malloc0(record->attributes * sizeof(*record->attribute_list));
713: record->uuid =
714: g_malloc0(record->uuids * sizeof(*record->uuid));
715 data = g_malloc(len);
716
...
753 while (service[sdp->services])
754 sdp->services ++;
755: sdp->service_list =
756: g_malloc0(sdp->services * sizeof(*sdp->service_list));
757
758 sdp->services = 0;
qemu/hw/cadence_uart.c:
336
337 if (s->rx_count) {
338: uint32_t rx_rpos =
339: (RX_FIFO_SIZE + s->rx_wpos - s->rx_count) % RX_FIFO_SIZE;
340 *c = s->r_fifo[rx_rpos];
341 s->rx_count--;
qemu/hw/exynos4210_combiner.c:
177 exynos4210_combiner_read(void *opaque, hwaddr offset, unsigned size)
178 {
179: struct Exynos4210CombinerState *s =
180: (struct Exynos4210CombinerState *)opaque;
181 uint32_t req_quad_base_n; /* Base of registers quad. Multiply it by 4 and
182 get a start of corresponding group quad */
...
228 static void exynos4210_combiner_update(void *opaque, uint8_t group_n)
229 {
230: struct Exynos4210CombinerState *s =
231: (struct Exynos4210CombinerState *)opaque;
232
233 /* Send interrupt if needed */
...
270 uint64_t val, unsigned size)
271 {
272: struct Exynos4210CombinerState *s =
273: (struct Exynos4210CombinerState *)opaque;
274 uint32_t req_quad_base_n; /* Base of registers quad. Multiply it by 4 and
275 get a start of corresponding group quad */
...
360 static void exynos4210_combiner_handler(void *opaque, int irq, int level)
361 {
362: struct Exynos4210CombinerState *s =
363: (struct Exynos4210CombinerState *)opaque;
364 uint8_t bit_n, group_n;
365
...
406 {
407 unsigned int i;
408: struct Exynos4210CombinerState *s =
409: FROM_SYSBUS(struct Exynos4210CombinerState, dev);
410
411 /* Allocate general purpose input signals and connect a handler to each of
qemu/hw/exynos4210_fimd.c:
946 case 0:
947 w->draw_line = draw_line_palette_1;
948: w->pixel_to_rgb =
949: palette_data_format[exynos4210_fimd_palette_format(s, win)];
950 break;
951 case 1:
952 w->draw_line = draw_line_palette_2;
953: w->pixel_to_rgb =
954: palette_data_format[exynos4210_fimd_palette_format(s, win)];
955 break;
956 case 2:
957 w->draw_line = draw_line_palette_4;
958: w->pixel_to_rgb =
959: palette_data_format[exynos4210_fimd_palette_format(s, win)];
960 break;
961 case 3:
962 w->draw_line = draw_line_palette_8;
963: w->pixel_to_rgb =
964: palette_data_format[exynos4210_fimd_palette_format(s, win)];
965 break;
966 case 4:
...
1822 exynos4210_update_resolution(s);
1823 exynos4210_fimd_invalidate(s);
1824: exynos4210_fimd_enable(s, (s->vidcon[0] & FIMD_VIDCON0_ENVID_MASK) ==
1825: FIMD_VIDCON0_ENVID_MASK);
1826 return 0;
1827 }
qemu/hw/exynos4210_gic.c:
413 static void exynos4210_irq_gate_reset(DeviceState *d)
414 {
415: Exynos4210IRQGateState *s =
416: DO_UPCAST(Exynos4210IRQGateState, busdev.qdev, d);
417
418 memset(s->level, 0, s->n_in * sizeof(*s->level));
qemu/hw/exynos4210_i2c.c:
192 if (EXYNOS4_I2C_MODE(s->i2cstat) == I2CMODE_MASTER_Tx) {
193 exynos4210_i2c_data_send(s);
194: } else if (EXYNOS4_I2C_MODE(s->i2cstat) ==
195: I2CMODE_MASTER_Rx) {
196 exynos4210_i2c_data_receive(s);
197 }
...
204 break;
205 case I2CSTAT_ADDR:
206: s->i2cstat =
207: (s->i2cstat & I2CSTAT_START_BUSY) | (v & ~I2CSTAT_START_BUSY);
208
209 if (!(s->i2cstat & I2CSTAT_OUTPUT_EN)) {
qemu/hw/exynos4210_mct.c:
1155 index = GET_G_COMP_IDX(offset);
1156 shift = 8 * (offset & 0x4);
1157: s->g_timer.reg.comp[index] =
1158: (s->g_timer.reg.comp[index] &
1159 (((uint64_t)UINT32_MAX << 32) >> shift)) +
1160 (value << shift);
....
1331 s->l_timer[lt_i].reg.cnt[L_REG_CNT_TCNTB] < MCT_LT_CNT_LOW_LIMIT) {
1332 if (!s->l_timer[lt_i].reg.cnt[L_REG_CNT_TCNTB]) {
1333: s->l_timer[lt_i].reg.cnt[L_REG_CNT_ICNTB] =
1334: MCT_LT_CNT_LOW_LIMIT;
1335 } else {
1336: s->l_timer[lt_i].reg.cnt[L_REG_CNT_ICNTB] =
1337: MCT_LT_CNT_LOW_LIMIT /
1338 s->l_timer[lt_i].reg.cnt[L_REG_CNT_TCNTB];
1339 }
qemu/hw/exynos4210_pmu.c:
444 static void exynos4210_pmu_reset(DeviceState *dev)
445 {
446: Exynos4210PmuState *s =
447: container_of(dev, Exynos4210PmuState, busdev.qdev);
448 unsigned i;
449
qemu/hw/exynos4210_uart.c:
539 static void exynos4210_uart_reset(DeviceState *dev)
540 {
541: Exynos4210UartState *s =
542: container_of(dev, Exynos4210UartState, busdev.qdev);
543 int regs_number = sizeof(exynos4210_uart_regs)/sizeof(Exynos4210UartReg);
544 int i;
qemu/hw/exynos4_boards.c:
106 exynos4_board_binfo.ram_size = exynos4_board_ram_size[board_type];
107 exynos4_board_binfo.board_id = exynos4_board_id[board_type];
108: exynos4_board_binfo.smp_bootreg_addr =
109: exynos4_board_smp_bootreg_addr[board_type];
110 exynos4_board_binfo.kernel_filename = args->kernel_filename;
111 exynos4_board_binfo.initrd_filename = args->initrd_filename;
112 exynos4_board_binfo.kernel_cmdline = args->kernel_cmdline;
113: exynos4_board_binfo.gic_cpu_if_addr =
114: EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100;
115
116 PRINT_DEBUG("\n ram_size: %luMiB [0x%08lx]\n"
qemu/hw/fdc.c:
1726 return;
1727 } else {
1728: fdctrl->fifo[0] =
1729: (fdctrl->status0 & ~(FD_SR0_HEAD | FD_SR0_DS1 | FD_SR0_DS0))
1730 | GET_CUR_DRV(fdctrl);
1731 }
qemu/hw/lan9118.c:
1326 QEMUBH *bh;
1327 int i;
1328: const MemoryRegionOps *mem_ops =
1329: s->mode_16bit ? &lan9118_16bit_mem_ops : &lan9118_mem_ops;
1330
1331 memory_region_init_io(&s->mmio, mem_ops, s, "lan9118-mmio", 0x100);
qemu/hw/lm832x.c:
487 }
488
489: s->kbd.fifo[(s->kbd.start + s->kbd.len ++) & (sizeof(s->kbd.fifo) - 1)] =
490: key | (state << 7);
491
492 /* We never set ERR_KEYOVR because we support multiple keys fine. */
qemu/hw/lpc_ich9.c:
280 BusState *bus = qdev_get_parent_bus(&pci_dev->qdev);
281 PCIBus *pci_bus = PCI_BUS(bus);
282: PCIDevice *lpc_pdev =
283: pci_bus->devices[PCI_DEVFN(ICH9_LPC_DEV, ICH9_LPC_FUNC)];
284 ICH9LPCState *lpc = ICH9_LPC_DEVICE(lpc_pdev);
285
qemu/hw/milkymist-memcard.c:
232 static void milkymist_memcard_reset(DeviceState *d)
233 {
234: MilkymistMemcardState *s =
235: container_of(d, MilkymistMemcardState, busdev.qdev);
236 int i;
237
qemu/hw/milkymist-minimac2.c:
432 static void milkymist_minimac2_reset(DeviceState *d)
433 {
434: MilkymistMinimac2State *s =
435: container_of(d, MilkymistMinimac2State, busdev.qdev);
436 int i;
437
qemu/hw/milkymist-softusb.c:
221 static void softusb_mouse_hid_datain(HIDState *hs)
222 {
223: MilkymistSoftUsbState *s =
224: container_of(hs, MilkymistSoftUsbState, hid_mouse);
225 int len;
226
...
240 static void milkymist_softusb_reset(DeviceState *d)
241 {
242: MilkymistSoftUsbState *s =
243: container_of(d, MilkymistSoftUsbState, busdev.qdev);
244 int i;
245
qemu/hw/milkymist-sysctl.c:
247 static void milkymist_sysctl_reset(DeviceState *d)
248 {
249: MilkymistSysctlState *s =
250: container_of(d, MilkymistSysctlState, busdev.qdev);
251 int i;
252
qemu/hw/nand.c:
400 return -1;
401 }
402: if (bdrv_getlength(s->bdrv) >=
403: (s->pages << s->page_shift) + (s->pages << s->oob_shift)) {
404 pagesize = 0;
405 s->mem_oob = 0;
qemu/hw/nseries.c:
437 s->sleep = 1;
438 s->booster = 0;
439: s->selfcheck =
440: (1 << 7) | /* Register loading OK. */
441 (1 << 5) | /* The chip is attached. */
442 (1 << 4); /* Display glass still in one piece. */
...
971 static void n800_gpmc_init(struct n800_s *s)
972 {
973: uint32_t config7 =
974: (0xf << 8) | /* MASKADDRESS */
975 (1 << 6) | /* CSVALID */
976 (4 << 0); /* BASEADDRESS */
qemu/hw/omap1.c:
672
673 /* Enter the desired mode. */
674: s->ulpd_pm_regs[addr >> 2] =
675: (s->ulpd_pm_regs[addr >> 2] & 0xfffe) |
676 ((s->ulpd_pm_regs[addr >> 2] >> 4) & 1);
677
...
2730 #endif
2731 if (s->pm_am)
2732: s->alarm_tm.tm_hour =
2733: ((from_bcd(value & 0x3f)) % 12) +
2734 ((value >> 7) & 1) * 12;
2735 else
....
3378 s->tx_req -= 4;
3379 if (s->codec && s->codec->cts) {
3380: s->codec->out.fifo[s->codec->out.len ++] =
3381: (value >> 24) & 0xff;
3382: s->codec->out.fifo[s->codec->out.len ++] =
3383: (value >> 16) & 0xff;
3384: s->codec->out.fifo[s->codec->out.len ++] =
3385: (value >> 8) & 0xff;
3386: s->codec->out.fifo[s->codec->out.len ++] =
3387: (value >> 0) & 0xff;
3388 }
3389 if (s->tx_req < 4)
qemu/hw/omap_dma.c:
1582 case omap_dma_4:
1583 /* XXX Only available for sDMA */
1584: s->caps[0] =
1585: (1 << 19) | /* Constant Fill Capability */
1586 (1 << 18); /* Transparent BLT Capability */
1587: s->caps[1] =
1588: (1 << 1); /* 1-bit palettized capability (DMA 3.2 only) */
1589: s->caps[2] =
1590: (1 << 8) | /* SEPARATE_SRC_AND_DST_INDEX_CPBLTY */
1591 (1 << 7) | /* DST_DOUBLE_INDEX_ADRS_CPBLTY */
1592 (1 << 6) | /* DST_SINGLE_INDEX_ADRS_CPBLTY */
....
1597 (1 << 1) | /* SRC_POST_INCRMNT_ADRS_CPBLTY */
1598 (1 << 0); /* SRC_CONST_ADRS_CPBLTY */
1599: s->caps[3] =
1600: (1 << 6) | /* BLOCK_SYNCHR_CPBLTY (DMA 4 only) */
1601 (1 << 7) | /* PKT_SYNCHR_CPBLTY (DMA 4 only) */
1602 (1 << 5) | /* CHANNEL_CHAINING_CPBLTY */
....
1606 (1 << 1) | /* FRAME_SYNCHR_CPBLTY */
1607 (1 << 0); /* ELMNT_SYNCHR_CPBLTY */
1608: s->caps[4] =
1609: (1 << 7) | /* PKT_INTERRUPT_CPBLTY (DMA 4 only) */
1610 (1 << 6) | /* SYNC_STATUS_CPBLTY */
1611 (1 << 5) | /* BLOCK_INTERRUPT_CPBLTY */
qemu/hw/omap_mmc.c:
234 if (-- host->blen_counter) {
235 value = sd_read_data(host->card);
236: host->fifo[(host->fifo_start + host->fifo_len) & 31] |=
237: value << 8;
238 host->blen_counter --;
239 }
qemu/hw/pxa2xx_mmci.c:
372 case MMC_TXFIFO:
373 while (s->ac_width -- && s->tx_len < 0x20)
374: s->tx_fifo[(s->tx_start + (s->tx_len ++)) & 0x1f] =
375: (value >> (s->ac_width << 3)) & 0xff;
376 s->intreq &= ~INT_TXFIFO_REQ;
377 pxa2xx_mmci_fifo_update(s);
qemu/hw/pxa2xx_timer.c:
315 /* XXX Stop if running (shouldn't happen) */
316 if ((value & (1 << 7)) || !(tm & 1))
317: s->tm4[tm].freq =
318: pxa2xx_timer4_freq[(value & (1 << 8)) ? 0 : (value & 7)];
319 else {
320 s->tm4[tm].freq = 0;
qemu/hw/qxl.c:
1006 rom->client_monitors_config.count = monitors_config->num_of_monitors;
1007 /* monitors_config->flags ignored */
1008: if (rom->client_monitors_config.count >=
1009: ARRAY_SIZE(rom->client_monitors_config.heads)) {
1010 trace_qxl_client_monitors_config_capped(qxl->id,
1011 monitors_config->num_of_monitors,
qemu/hw/scsi-disk.c:
592 case 0xb0: /* block limits */
593 {
594: unsigned int unmap_sectors =
595: s->qdev.conf.discard_granularity / s->qdev.blocksize;
596: unsigned int min_io_size =
597: s->qdev.conf.min_io_size / s->qdev.blocksize;
598: unsigned int opt_io_size =
599: s->qdev.conf.opt_io_size / s->qdev.blocksize;
600
601 if (s->qdev.type == TYPE_ROM) {
qemu/hw/smbios.c:
121
122 smbios_entries_len += sizeof(*field) + len;
123: (*(uint16_t *)smbios_entries) =
124: cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1);
125 }
126
...
216
217 smbios_entries_len += sizeof(*table) + size;
218: (*(uint16_t *)smbios_entries) =
219: cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1);
220 return 0;
221 }
qemu/hw/xen_platform.c:
86 {
87 /* We have to ignore passthrough devices */
88: if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
89: PCI_CLASS_NETWORK_ETHERNET
90 && strcmp(d->name, "xen-pci-passthrough") != 0) {
91 qdev_free(&d->qdev);
..
101 {
102 /* We have to ignore passthrough devices */
103: if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
104: PCI_CLASS_STORAGE_IDE
105 && strcmp(d->name, "xen-pci-passthrough") != 0) {
106 qdev_unplug(&(d->qdev), NULL);
qemu/hw/xilinx_spi.c:
121 uint32_t pending;
122
123: s->regs[R_IPISR] |=
124: (!fifo8_is_empty(&s->rx_fifo) ? IRQ_DRR_NOT_EMPTY : 0) |
125 (fifo8_is_full(&s->rx_fifo) ? IRQ_DRR_FULL : 0);
126
qemu/hw/zynq_slcr.c:
160 {
161 int i;
162: ZynqSLCRState *s =
163: FROM_SYSBUS(ZynqSLCRState, sysbus_from_qdev(d));
164
165 DB_PRINT("RESET\n");
...
193
194 /* 0x170 - 0x1AC */
195: s->fpga[0][CLK_CTRL] = s->fpga[1][CLK_CTRL] = s->fpga[2][CLK_CTRL] =
196: s->fpga[3][CLK_CTRL] = 0x00101800;
197: s->fpga[0][THR_STA] = s->fpga[1][THR_STA] = s->fpga[2][THR_STA] =
198: s->fpga[3][THR_STA] = 0x00010000;
199
200 /* 0x1B0 - 0x1D8 */
...
218 s->mio_func[2] = s->mio_func[3] = 0xFFFFFFFF;
219
220: s->cpu_ram[0] = s->cpu_ram[1] = s->cpu_ram[3] =
221: s->cpu_ram[4] = s->cpu_ram[7] = 0x00010101;
222 s->cpu_ram[2] = s->cpu_ram[5] = 0x01010101;
223 s->cpu_ram[6] = 0x00000001;
qemu/hw/s390x/event-facility.c:
171 /* if no early error, then execute */
172 if (sccb->h.response_code == be16_to_cpu(SCLP_RC_NORMAL_COMPLETION)) {
173: sccb->h.response_code =
174: cpu_to_be16(handle_sccb_write_events(ef, sccb));
175 }
176
...
241 case SCLP_SELECTIVE_READ:
242 if (!(sclp_cp_receive_mask & be32_to_cpu(red->mask))) {
243: sccb->h.response_code =
244: cpu_to_be16(SCLP_RC_INVALID_SELECTION_MASK);
245 goto out;
246 }
qemu/hw/usb/dev-network.c:
852 static void *rndis_queue_response(USBNetState *s, unsigned int length)
853 {
854: struct rndis_response *r =
855: g_malloc0(sizeof(struct rndis_response) + length);
856
857 if (QTAILQ_EMPTY(&s->rndis_resp)) {
...
877 static int rndis_init_response(USBNetState *s, rndis_init_msg_type *buf)
878 {
879: rndis_init_cmplt_type *resp =
880: rndis_queue_response(s, sizeof(rndis_init_cmplt_type));
881
882 if (!resp)
...
937
938 resp->Status = cpu_to_le32(RNDIS_STATUS_SUCCESS);
939: resp->InformationBufferOffset =
940: cpu_to_le32(infobuflen ? sizeof(rndis_query_cmplt_type) - 8 : 0);
941 resp->InformationBufferLength = cpu_to_le32(infobuflen);
942 memcpy(resp + 1, infobuf, infobuflen);
...
948 rndis_set_msg_type *buf, unsigned int length)
949 {
950: rndis_set_cmplt_type *resp =
951: rndis_queue_response(s, sizeof(rndis_set_cmplt_type));
952 uint32_t bufoffs, buflen;
953 int ret;
...
978 static int rndis_reset_response(USBNetState *s, rndis_reset_msg_type *buf)
979 {
980: rndis_reset_cmplt_type *resp =
981: rndis_queue_response(s, sizeof(rndis_reset_cmplt_type));
982
983 if (!resp)
...
995 rndis_keepalive_msg_type *buf)
996 {
997: rndis_keepalive_cmplt_type *resp =
998: rndis_queue_response(s, sizeof(rndis_keepalive_cmplt_type));
999
1000 if (!resp)
....
1180 {
1181 int sz = sizeof(s->out_buf) - s->out_ptr;
1182: struct rndis_packet_msg_type *msg =
1183: (struct rndis_packet_msg_type *) s->out_buf;
1184 uint32_t len;
1185
qemu/hw/usb/hcd-musb.c:
1164 s->ep[ep].fifostart[0] = 0;
1165 if (ep)
1166: s->ep[ep].csr[0] &=
1167: ~(MGC_M_TXCSR_FIFONOTEMPTY | MGC_M_TXCSR_TXPKTRDY);
1168 else
1169: s->ep[ep].csr[0] &=
1170: ~(MGC_M_CSR0_TXPKTRDY | MGC_M_CSR0_RXPKTRDY);
1171 }
1172 if (
....
1462 case MUSB_HDRC_TXFIFOADDR:
1463 s->ep[s->idx].fifoaddr[0] = value;
1464: s->ep[s->idx].buf[0] =
1465: s->buf + ((value << 3) & 0x7ff );
1466 break;
1467 case MUSB_HDRC_RXFIFOADDR:
1468 s->ep[s->idx].fifoaddr[1] = value;
1469: s->ep[s->idx].buf[1] =
1470: s->buf + ((value << 3) & 0x7ff);
1471 break;
1472
Unable to open qemu/libdis/Makefile
Unable to open qemu/libdis-user/Makefile
Unable to open qemu/libuser/Makefile
qemu/linux-user/signal.c:
283 info->si_pid = tswap32(tinfo->_sifields._rt._pid);
284 info->si_uid = tswap32(tinfo->_sifields._rt._uid);
285: info->si_value.sival_ptr =
286: (void *)(long)tswapal(tinfo->_sifields._rt._sigval.sival_ptr);
287 }
288
qemu/net/hub.c:
265 if (nc->info->type == NET_CLIENT_OPTIONS_KIND_HUBPORT) {
266 port = DO_UPCAST(NetHubPort, nc, nc);
267: } else if (nc->peer != NULL && nc->peer->info->type ==
268: NET_CLIENT_OPTIONS_KIND_HUBPORT) {
269 port = DO_UPCAST(NetHubPort, nc, nc->peer);
270 } else {
Unable to open qemu/roms/seabios/Makefile
Unable to open qemu/roms/vgabios/Makefile
qemu/target-i386/cpu.c:
893 x86_cpu_def->xlevel2 = eax;
894 host_cpuid(0xC0000001, 0, &eax, &ebx, &ecx, &edx);
895: x86_cpu_def->ext4_features =
896: kvm_arch_get_supported_cpuid(s, 0xC0000001, 0, R_EDX);
897 }
898 }
qemu/target-i386/kvm.c:
957 memset(sregs.interrupt_bitmap, 0, sizeof(sregs.interrupt_bitmap));
958 if (env->interrupt_injected >= 0) {
959: sregs.interrupt_bitmap[env->interrupt_injected / 64] |=
960: (uint64_t)1 << (env->interrupt_injected % 64);
961 }
962
97 matches across 44 files
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