lcd-testing.c

#ifdef QUANTUM_PAINTER_SPI_DC_RESET_SHIFT_REG_ENABLE
uint32_t qp_comms_spi_send_data_shift_reg(painter_device_t device, const void *data, uint32_t byte_count) {
    struct painter_driver_t *              driver         = (struct painter_driver_t *)device;
    struct qp_comms_spi_dc_reset_config_t *comms_config   = (struct qp_comms_spi_dc_reset_config_t *)driver->comms_config;
    const uint8_t *                       p               = (const uint8_t *)data;
    uint32_t                              bytes_remaining = byte_count;

    while (bytes_remaining > 0) {
        uint32_t bytes_this_loop = bytes_remaining < 2 ? bytes_remaining : 2;
        writePinLow(comms_config->spi_config.chip_select_pin);
        spi_transmit(p, bytes_this_loop);
        //Padding for odd byte_count
        if (bytes_this_loop%2)
            spi_write(0);
        writePinHigh(comms_config->spi_config.chip_select_pin);
        p += bytes_this_loop;
        bytes_remaining -= bytes_this_loop;
    }

    return byte_count - bytes_remaining;
}
#endif //QUANTUM_PAINTER_SPI_DC_RESET_SHIFT_REG_ENABLE

uint32_t qp_comms_spi_dc_reset_send_data(painter_device_t device, const void *data, uint32_t byte_count) {
    struct painter_driver_t *              driver       = (struct painter_driver_t *)device;
    struct qp_comms_spi_dc_reset_config_t *comms_config = (struct qp_comms_spi_dc_reset_config_t *)driver->comms_config;

    writePinHigh(comms_config->dc_pin);
#ifdef QUANTUM_PAINTER_SPI_DC_RESET_SHIFT_REG_ENABLE
    return qp_comms_spi_send_data_shift_reg(device, data, byte_count);
#else
    return qp_comms_spi_send_data(device, data, byte_count);
#endif //QUANTUM_PAINTER_SPI_DC_RESET_SHIFT_REG_ENABLE
}

void qp_comms_spi_dc_reset_send_command(painter_device_t device, uint8_t cmd) {
    struct painter_driver_t *              driver       = (struct painter_driver_t *)device;
    struct qp_comms_spi_dc_reset_config_t *comms_config = (struct qp_comms_spi_dc_reset_config_t *)driver->comms_config;

    writePinLow(comms_config->dc_pin);

#ifdef QUANTUM_PAINTER_SPI_DC_RESET_SHIFT_REG_ENABLE
    writePinLow(comms_config->spi_config.chip_select_pin);
#endif //QUANTUM_PAINTER_SPI_DC_RESET_SHIFT_REG_ENABLE

    spi_write(cmd);


#ifdef QUANTUM_PAINTER_SPI_DC_RESET_SHIFT_REG_ENABLE
    writePinHigh(comms_config->spi_config.chip_select_pin);
#endif //QUANTUM_PAINTER_SPI_DC_RESET_SHIFT_REG_ENABLE

}

const struct painter_comms_with_command_vtable_t spi_comms_with_dc_vtable = {
    .base =
        {
            .comms_init  = qp_comms_spi_dc_reset_init,
            .comms_start = qp_comms_spi_start,
            .comms_send  = qp_comms_spi_dc_reset_send_data,
            .comms_stop  = qp_comms_spi_stop,
        },
    .send_command          = qp_comms_spi_dc_reset_send_command,
    .bulk_command_sequence = qp_comms_spi_dc_reset_bulk_command_sequence,
    .send_parameters       = qp_comms_spi_dc_reset_send_data
};